diff options
309 files changed, 22229 insertions, 3424 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index 3db69a086c41..c34f0db78a30 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 | |||
@@ -48,14 +48,9 @@ following: | |||
48 | The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial | 48 | The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial |
49 | Controller. | 49 | Controller. |
50 | 50 | ||
51 | If you do NOT see the 24x3 device at function 3, and you can't figure out | ||
52 | any way in the BIOS to enable it, | ||
53 | |||
54 | The ICH chips are quite similar to Intel's PIIX4 chip, at least in the | 51 | The ICH chips are quite similar to Intel's PIIX4 chip, at least in the |
55 | SMBus controller. | 52 | SMBus controller. |
56 | 53 | ||
57 | See the file i2c-piix4 for some additional information. | ||
58 | |||
59 | 54 | ||
60 | Process Call Support | 55 | Process Call Support |
61 | -------------------- | 56 | -------------------- |
@@ -74,6 +69,61 @@ SMBus 2.0 Support | |||
74 | 69 | ||
75 | The 82801DB (ICH4) and later chips support several SMBus 2.0 features. | 70 | The 82801DB (ICH4) and later chips support several SMBus 2.0 features. |
76 | 71 | ||
72 | |||
73 | Hidden ICH SMBus | ||
74 | ---------------- | ||
75 | |||
76 | If your system has an Intel ICH south bridge, but you do NOT see the | ||
77 | SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the | ||
78 | BIOS to enable it, it means it has been hidden by the BIOS code. Asus is | ||
79 | well known for first doing this on their P4B motherboard, and many other | ||
80 | boards after that. Some vendor machines are affected as well. | ||
81 | |||
82 | The first thing to try is the "i2c_ec" ACPI driver. It could be that the | ||
83 | SMBus was hidden on purpose because it'll be driven by ACPI. If the | ||
84 | i2c_ec driver works for you, just forget about the i2c-i801 driver and | ||
85 | don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you | ||
86 | better make sure that the SMBus isn't used by the ACPI code. Try loading | ||
87 | the "fan" and "thermal" drivers, and check in /proc/acpi/fan and | ||
88 | /proc/acpi/thermal_zone. If you find anything there, it's likely that | ||
89 | the ACPI is accessing the SMBus and it's safer not to unhide it. Only | ||
90 | once you are certain that ACPI isn't using the SMBus, you can attempt | ||
91 | to unhide it. | ||
92 | |||
93 | In order to unhide the SMBus, we need to change the value of a PCI | ||
94 | register before the kernel enumerates the PCI devices. This is done in | ||
95 | drivers/pci/quirks.c, where all affected boards must be listed (see | ||
96 | function asus_hides_smbus_hostbridge.) If the SMBus device is missing, | ||
97 | and you think there's something interesting on the SMBus (e.g. a | ||
98 | hardware monitoring chip), you need to add your board to the list. | ||
99 | |||
100 | The motherboard is identified using the subvendor and subdevice IDs of the | ||
101 | host bridge PCI device. Get yours with "lspci -n -v -s 00:00.0": | ||
102 | |||
103 | 00:00.0 Class 0600: 8086:2570 (rev 02) | ||
104 | Subsystem: 1043:80f2 | ||
105 | Flags: bus master, fast devsel, latency 0 | ||
106 | Memory at fc000000 (32-bit, prefetchable) [size=32M] | ||
107 | Capabilities: [e4] #09 [2106] | ||
108 | Capabilities: [a0] AGP version 3.0 | ||
109 | |||
110 | Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043 | ||
111 | (Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic | ||
112 | names for the bridge ID and the subvendor ID in include/linux/pci_ids.h, | ||
113 | and then add a case for your subdevice ID at the right place in | ||
114 | drivers/pci/quirks.c. Then please give it very good testing, to make sure | ||
115 | that the unhidden SMBus doesn't conflict with e.g. ACPI. | ||
116 | |||
117 | If it works, proves useful (i.e. there are usable chips on the SMBus) | ||
118 | and seems safe, please submit a patch for inclusion into the kernel. | ||
119 | |||
120 | Note: There's a useful script in lm_sensors 2.10.2 and later, named | ||
121 | unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to | ||
122 | temporarily unhide the SMBus without having to patch and recompile your | ||
123 | kernel. It's very convenient if you just want to check if there's | ||
124 | anything interesting on your hidden ICH SMBus. | ||
125 | |||
126 | |||
77 | ********************** | 127 | ********************** |
78 | The lm_sensors project gratefully acknowledges the support of Texas | 128 | The lm_sensors project gratefully acknowledges the support of Texas |
79 | Instruments in the initial development of this driver. | 129 | Instruments in the initial development of this driver. |
diff --git a/Documentation/i2c/busses/i2c-parport b/Documentation/i2c/busses/i2c-parport index 77b995dfca22..dceaba1ad930 100644 --- a/Documentation/i2c/busses/i2c-parport +++ b/Documentation/i2c/busses/i2c-parport | |||
@@ -19,6 +19,7 @@ It currently supports the following devices: | |||
19 | * (type=4) Analog Devices ADM1032 evaluation board | 19 | * (type=4) Analog Devices ADM1032 evaluation board |
20 | * (type=5) Analog Devices evaluation boards: ADM1025, ADM1030, ADM1031 | 20 | * (type=5) Analog Devices evaluation boards: ADM1025, ADM1030, ADM1031 |
21 | * (type=6) Barco LPT->DVI (K5800236) adapter | 21 | * (type=6) Barco LPT->DVI (K5800236) adapter |
22 | * (type=7) One For All JP1 parallel port adapter | ||
22 | 23 | ||
23 | These devices use different pinout configurations, so you have to tell | 24 | These devices use different pinout configurations, so you have to tell |
24 | the driver what you have, using the type module parameter. There is no | 25 | the driver what you have, using the type module parameter. There is no |
@@ -157,3 +158,17 @@ many more, using /dev/velleman. | |||
157 | http://home.wanadoo.nl/hihihi/libk8005.htm | 158 | http://home.wanadoo.nl/hihihi/libk8005.htm |
158 | http://struyve.mine.nu:8080/index.php?block=k8000 | 159 | http://struyve.mine.nu:8080/index.php?block=k8000 |
159 | http://sourceforge.net/projects/libk8005/ | 160 | http://sourceforge.net/projects/libk8005/ |
161 | |||
162 | |||
163 | One For All JP1 parallel port adapter | ||
164 | ------------------------------------- | ||
165 | |||
166 | The JP1 project revolves around a set of remote controls which expose | ||
167 | the I2C bus their internal configuration EEPROM lives on via a 6 pin | ||
168 | jumper in the battery compartment. More details can be found at: | ||
169 | |||
170 | http://www.hifi-remote.com/jp1/ | ||
171 | |||
172 | Details of the simple parallel port hardware can be found at: | ||
173 | |||
174 | http://www.hifi-remote.com/jp1/hardware.shtml | ||
diff --git a/Documentation/i2c/busses/i2c-piix4 b/Documentation/i2c/busses/i2c-piix4 index 921476333235..7cbe43fa2701 100644 --- a/Documentation/i2c/busses/i2c-piix4 +++ b/Documentation/i2c/busses/i2c-piix4 | |||
@@ -6,7 +6,7 @@ Supported adapters: | |||
6 | Datasheet: Publicly available at the Intel website | 6 | Datasheet: Publicly available at the Intel website |
7 | * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges | 7 | * ServerWorks OSB4, CSB5, CSB6 and HT-1000 southbridges |
8 | Datasheet: Only available via NDA from ServerWorks | 8 | Datasheet: Only available via NDA from ServerWorks |
9 | * ATI IXP southbridges IXP200, IXP300, IXP400 | 9 | * ATI IXP200, IXP300, IXP400 and SB600 southbridges |
10 | Datasheet: Not publicly available | 10 | Datasheet: Not publicly available |
11 | * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge | 11 | * Standard Microsystems (SMSC) SLC90E66 (Victory66) southbridge |
12 | Datasheet: Publicly available at the SMSC website http://www.smsc.com | 12 | Datasheet: Publicly available at the SMSC website http://www.smsc.com |
diff --git a/Documentation/i2c/busses/i2c-viapro b/Documentation/i2c/busses/i2c-viapro index 25680346e0ac..775f489e86f6 100644 --- a/Documentation/i2c/busses/i2c-viapro +++ b/Documentation/i2c/busses/i2c-viapro | |||
@@ -13,6 +13,9 @@ Supported adapters: | |||
13 | * VIA Technologies, Inc. VT8235, VT8237R, VT8237A, VT8251 | 13 | * VIA Technologies, Inc. VT8235, VT8237R, VT8237A, VT8251 |
14 | Datasheet: available on request and under NDA from VIA | 14 | Datasheet: available on request and under NDA from VIA |
15 | 15 | ||
16 | * VIA Technologies, Inc. CX700 | ||
17 | Datasheet: available on request and under NDA from VIA | ||
18 | |||
16 | Authors: | 19 | Authors: |
17 | Kyösti Mälkki <kmalkki@cc.hut.fi>, | 20 | Kyösti Mälkki <kmalkki@cc.hut.fi>, |
18 | Mark D. Studebaker <mdsxyz123@yahoo.com>, | 21 | Mark D. Studebaker <mdsxyz123@yahoo.com>, |
@@ -44,6 +47,7 @@ Your lspci -n listing must show one of these : | |||
44 | device 1106:3227 (VT8237R) | 47 | device 1106:3227 (VT8237R) |
45 | device 1106:3337 (VT8237A) | 48 | device 1106:3337 (VT8237A) |
46 | device 1106:3287 (VT8251) | 49 | device 1106:3287 (VT8251) |
50 | device 1106:8324 (CX700) | ||
47 | 51 | ||
48 | If none of these show up, you should look in the BIOS for settings like | 52 | If none of these show up, you should look in the BIOS for settings like |
49 | enable ACPI / SMBus or even USB. | 53 | enable ACPI / SMBus or even USB. |
@@ -51,3 +55,6 @@ enable ACPI / SMBus or even USB. | |||
51 | Except for the oldest chips (VT82C596A/B, VT82C686A and most probably | 55 | Except for the oldest chips (VT82C596A/B, VT82C686A and most probably |
52 | VT8231), this driver supports I2C block transactions. Such transactions | 56 | VT8231), this driver supports I2C block transactions. Such transactions |
53 | are mainly useful to read from and write to EEPROMs. | 57 | are mainly useful to read from and write to EEPROMs. |
58 | |||
59 | The CX700 additionally appears to support SMBus PEC, although this driver | ||
60 | doesn't implement it yet. | ||
diff --git a/Documentation/i2c/porting-clients b/Documentation/i2c/porting-clients index f03c2a02f806..ca272b263a92 100644 --- a/Documentation/i2c/porting-clients +++ b/Documentation/i2c/porting-clients | |||
@@ -129,6 +129,12 @@ Technical changes: | |||
129 | structure, those name member should be initialized to a driver name | 129 | structure, those name member should be initialized to a driver name |
130 | string. i2c_driver itself has no name member anymore. | 130 | string. i2c_driver itself has no name member anymore. |
131 | 131 | ||
132 | * [Driver model] Instead of shutdown or reboot notifiers, provide a | ||
133 | shutdown() method in your driver. | ||
134 | |||
135 | * [Power management] Use the driver model suspend() and resume() | ||
136 | callbacks instead of the obsolete pm_register() calls. | ||
137 | |||
132 | Coding policy: | 138 | Coding policy: |
133 | 139 | ||
134 | * [Copyright] Use (C), not (c), for copyright. | 140 | * [Copyright] Use (C), not (c), for copyright. |
diff --git a/Documentation/i2c/smbus-protocol b/Documentation/i2c/smbus-protocol index 09f5e5ca4927..8a653c60d25a 100644 --- a/Documentation/i2c/smbus-protocol +++ b/Documentation/i2c/smbus-protocol | |||
@@ -97,7 +97,7 @@ SMBus Write Word Data | |||
97 | ===================== | 97 | ===================== |
98 | 98 | ||
99 | This is the opposite operation of the Read Word Data command. 16 bits | 99 | This is the opposite operation of the Read Word Data command. 16 bits |
100 | of data is read from a device, from a designated register that is | 100 | of data is written to a device, to the designated register that is |
101 | specified through the Comm byte. | 101 | specified through the Comm byte. |
102 | 102 | ||
103 | S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P | 103 | S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P |
diff --git a/Documentation/i2c/writing-clients b/Documentation/i2c/writing-clients index 3a057c8e5507..fbcff96f4ca1 100644 --- a/Documentation/i2c/writing-clients +++ b/Documentation/i2c/writing-clients | |||
@@ -21,20 +21,26 @@ The driver structure | |||
21 | 21 | ||
22 | Usually, you will implement a single driver structure, and instantiate | 22 | Usually, you will implement a single driver structure, and instantiate |
23 | all clients from it. Remember, a driver structure contains general access | 23 | all clients from it. Remember, a driver structure contains general access |
24 | routines, a client structure specific information like the actual I2C | 24 | routines, and should be zero-initialized except for fields with data you |
25 | address. | 25 | provide. A client structure holds device-specific information like the |
26 | driver model device node, and its I2C address. | ||
26 | 27 | ||
27 | static struct i2c_driver foo_driver = { | 28 | static struct i2c_driver foo_driver = { |
28 | .driver = { | 29 | .driver = { |
29 | .name = "foo", | 30 | .name = "foo", |
30 | }, | 31 | }, |
31 | .attach_adapter = &foo_attach_adapter, | 32 | .attach_adapter = foo_attach_adapter, |
32 | .detach_client = &foo_detach_client, | 33 | .detach_client = foo_detach_client, |
33 | .command = &foo_command /* may be NULL */ | 34 | .shutdown = foo_shutdown, /* optional */ |
35 | .suspend = foo_suspend, /* optional */ | ||
36 | .resume = foo_resume, /* optional */ | ||
37 | .command = foo_command, /* optional */ | ||
34 | } | 38 | } |
35 | 39 | ||
36 | The name field must match the driver name, including the case. It must not | 40 | The name field is the driver name, and must not contain spaces. It |
37 | contain spaces, and may be up to 31 characters long. | 41 | should match the module name (if the driver can be compiled as a module), |
42 | although you can use MODULE_ALIAS (passing "foo" in this example) to add | ||
43 | another name for the module. | ||
38 | 44 | ||
39 | All other fields are for call-back functions which will be explained | 45 | All other fields are for call-back functions which will be explained |
40 | below. | 46 | below. |
@@ -43,11 +49,18 @@ below. | |||
43 | Extra client data | 49 | Extra client data |
44 | ================= | 50 | ================= |
45 | 51 | ||
46 | The client structure has a special `data' field that can point to any | 52 | Each client structure has a special `data' field that can point to any |
47 | structure at all. You can use this to keep client-specific data. You | 53 | structure at all. You should use this to keep device-specific data, |
54 | especially in drivers that handle multiple I2C or SMBUS devices. You | ||
48 | do not always need this, but especially for `sensors' drivers, it can | 55 | do not always need this, but especially for `sensors' drivers, it can |
49 | be very useful. | 56 | be very useful. |
50 | 57 | ||
58 | /* store the value */ | ||
59 | void i2c_set_clientdata(struct i2c_client *client, void *data); | ||
60 | |||
61 | /* retrieve the value */ | ||
62 | void *i2c_get_clientdata(struct i2c_client *client); | ||
63 | |||
51 | An example structure is below. | 64 | An example structure is below. |
52 | 65 | ||
53 | struct foo_data { | 66 | struct foo_data { |
@@ -493,6 +506,33 @@ by `__init_data'. Hose functions and structures can be removed after | |||
493 | kernel booting (or module loading) is completed. | 506 | kernel booting (or module loading) is completed. |
494 | 507 | ||
495 | 508 | ||
509 | Power Management | ||
510 | ================ | ||
511 | |||
512 | If your I2C device needs special handling when entering a system low | ||
513 | power state -- like putting a transceiver into a low power mode, or | ||
514 | activating a system wakeup mechanism -- do that in the suspend() method. | ||
515 | The resume() method should reverse what the suspend() method does. | ||
516 | |||
517 | These are standard driver model calls, and they work just like they | ||
518 | would for any other driver stack. The calls can sleep, and can use | ||
519 | I2C messaging to the device being suspended or resumed (since their | ||
520 | parent I2C adapter is active when these calls are issued, and IRQs | ||
521 | are still enabled). | ||
522 | |||
523 | |||
524 | System Shutdown | ||
525 | =============== | ||
526 | |||
527 | If your I2C device needs special handling when the system shuts down | ||
528 | or reboots (including kexec) -- like turning something off -- use a | ||
529 | shutdown() method. | ||
530 | |||
531 | Again, this is a standard driver model call, working just like it | ||
532 | would for any other driver stack: the calls can sleep, and can use | ||
533 | I2C messaging. | ||
534 | |||
535 | |||
496 | Command function | 536 | Command function |
497 | ================ | 537 | ================ |
498 | 538 | ||
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt index 33994271cb3b..3b514672b80e 100644 --- a/Documentation/powerpc/booting-without-of.txt +++ b/Documentation/powerpc/booting-without-of.txt | |||
@@ -1334,6 +1334,9 @@ platforms are moved over to use the flattened-device-tree model. | |||
1334 | fsl-usb2-mph compatible controllers. Either this property or | 1334 | fsl-usb2-mph compatible controllers. Either this property or |
1335 | "port0" (or both) must be defined for "fsl-usb2-mph" compatible | 1335 | "port0" (or both) must be defined for "fsl-usb2-mph" compatible |
1336 | controllers. | 1336 | controllers. |
1337 | - dr_mode : indicates the working mode for "fsl-usb2-dr" compatible | ||
1338 | controllers. Can be "host", "peripheral", or "otg". Default to | ||
1339 | "host" if not defined for backward compatibility. | ||
1337 | 1340 | ||
1338 | Recommended properties : | 1341 | Recommended properties : |
1339 | - interrupts : <a b> where a is the interrupt number and b is a | 1342 | - interrupts : <a b> where a is the interrupt number and b is a |
@@ -1367,6 +1370,7 @@ platforms are moved over to use the flattened-device-tree model. | |||
1367 | #size-cells = <0>; | 1370 | #size-cells = <0>; |
1368 | interrupt-parent = <700>; | 1371 | interrupt-parent = <700>; |
1369 | interrupts = <26 1>; | 1372 | interrupts = <26 1>; |
1373 | dr_mode = "otg"; | ||
1370 | phy = "ulpi"; | 1374 | phy = "ulpi"; |
1371 | }; | 1375 | }; |
1372 | 1376 | ||
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt index 69f016f02bb0..e59fcbbe338c 100644 --- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt +++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt | |||
@@ -1,7 +1,7 @@ | |||
1 | MPC52xx Device Tree Bindings | 1 | MPC5200 Device Tree Bindings |
2 | ---------------------------- | 2 | ---------------------------- |
3 | 3 | ||
4 | (c) 2006 Secret Lab Technologies Ltd | 4 | (c) 2006-2007 Secret Lab Technologies Ltd |
5 | Grant Likely <grant.likely at secretlab.ca> | 5 | Grant Likely <grant.likely at secretlab.ca> |
6 | 6 | ||
7 | ********** DRAFT *********** | 7 | ********** DRAFT *********** |
@@ -20,11 +20,11 @@ described in Documentation/powerpc/booting-without-of.txt), or passed | |||
20 | by Open Firmare (IEEE 1275) compatible firmware using an OF compatible | 20 | by Open Firmare (IEEE 1275) compatible firmware using an OF compatible |
21 | client interface API. | 21 | client interface API. |
22 | 22 | ||
23 | This document specifies the requirements on the device-tree for mpc52xx | 23 | This document specifies the requirements on the device-tree for mpc5200 |
24 | based boards. These requirements are above and beyond the details | 24 | based boards. These requirements are above and beyond the details |
25 | specified in either the OpenFirmware spec or booting-without-of.txt | 25 | specified in either the OpenFirmware spec or booting-without-of.txt |
26 | 26 | ||
27 | All new mpc52xx-based boards are expected to match this document. In | 27 | All new mpc5200-based boards are expected to match this document. In |
28 | cases where this document is not sufficient to support a new board port, | 28 | cases where this document is not sufficient to support a new board port, |
29 | this document should be updated as part of adding the new board support. | 29 | this document should be updated as part of adding the new board support. |
30 | 30 | ||
@@ -32,26 +32,26 @@ II - Philosophy | |||
32 | =============== | 32 | =============== |
33 | The core of this document is naming convention. The whole point of | 33 | The core of this document is naming convention. The whole point of |
34 | defining this convention is to reduce or eliminate the number of | 34 | defining this convention is to reduce or eliminate the number of |
35 | special cases required to support a 52xx board. If all 52xx boards | 35 | special cases required to support a 5200 board. If all 5200 boards |
36 | follow the same convention, then generic 52xx support code will work | 36 | follow the same convention, then generic 5200 support code will work |
37 | rather than coding special cases for each new board. | 37 | rather than coding special cases for each new board. |
38 | 38 | ||
39 | This section tries to capture the thought process behind why the naming | 39 | This section tries to capture the thought process behind why the naming |
40 | convention is what it is. | 40 | convention is what it is. |
41 | 41 | ||
42 | 1. Node names | 42 | 1. names |
43 | ------------- | 43 | --------- |
44 | There is strong convention/requirements already established for children | 44 | There is strong convention/requirements already established for children |
45 | of the root node. 'cpus' describes the processor cores, 'memory' | 45 | of the root node. 'cpus' describes the processor cores, 'memory' |
46 | describes memory, and 'chosen' provides boot configuration. Other nodes | 46 | describes memory, and 'chosen' provides boot configuration. Other nodes |
47 | are added to describe devices attached to the processor local bus. | 47 | are added to describe devices attached to the processor local bus. |
48 | |||
48 | Following convention already established with other system-on-chip | 49 | Following convention already established with other system-on-chip |
49 | processors, MPC52xx boards must have an 'soc5200' node as a child of the | 50 | processors, 5200 device trees should use the name 'soc5200' for the |
50 | root node. | 51 | parent node of on chip devices, and the root node should be its parent. |
51 | 52 | ||
52 | The soc5200 node holds child nodes for all on chip devices. Child nodes | 53 | Child nodes are typically named after the configured function. ie. |
53 | are typically named after the configured function. ie. the FEC node is | 54 | the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'. |
54 | named 'ethernet', and a PSC in uart mode is named 'serial'. | ||
55 | 55 | ||
56 | 2. device_type property | 56 | 2. device_type property |
57 | ----------------------- | 57 | ----------------------- |
@@ -66,28 +66,47 @@ exactly. | |||
66 | Since device_type isn't enough to match devices to drivers, there also | 66 | Since device_type isn't enough to match devices to drivers, there also |
67 | needs to be a naming convention for the compatible property. Compatible | 67 | needs to be a naming convention for the compatible property. Compatible |
68 | is an list of device descriptions sorted from specific to generic. For | 68 | is an list of device descriptions sorted from specific to generic. For |
69 | the mpc52xx, the required format for each compatible value is | 69 | the mpc5200, the required format for each compatible value is |
70 | <chip>-<device>[-<mode>]. At the minimum, the list shall contain two | 70 | <chip>-<device>[-<mode>]. The OS should be able to match a device driver |
71 | items; the first specifying the exact chip, and the second specifying | 71 | to the device based solely on the compatible value. If two drivers |
72 | mpc52xx for the chip. | 72 | match on the compatible list; the 'most compatible' driver should be |
73 | 73 | selected. | |
74 | ie. ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc52xx-ethernet" | 74 | |
75 | 75 | The split between the MPC5200 and the MPC5200B leaves a bit of a | |
76 | The idea here is that most drivers will match to the most generic field | 76 | connundrum. How should the compatible property be set up to provide |
77 | in the compatible list (mpc52xx-*), but can also test the more specific | 77 | maximum compatability information; but still acurately describe the |
78 | field for enabling bug fixes or extra features. | 78 | chip? For the MPC5200; the answer is easy. Most of the SoC devices |
79 | originally appeared on the MPC5200. Since they didn't exist anywhere | ||
80 | else; the 5200 compatible properties will contain only one item; | ||
81 | "mpc5200-<device>". | ||
82 | |||
83 | The 5200B is almost the same as the 5200, but not quite. It fixes | ||
84 | silicon bugs and it adds a small number of enhancements. Most of the | ||
85 | devices either provide exactly the same interface as on the 5200. A few | ||
86 | devices have extra functions but still have a backwards compatible mode. | ||
87 | To express this infomation as completely as possible, 5200B device trees | ||
88 | should have two items in the compatible list; | ||
89 | "mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended | ||
90 | that 5200B device trees follow this convention (instead of only listing | ||
91 | the base mpc5200 item). | ||
92 | |||
93 | If another chip appear on the market with one of the mpc5200 SoC | ||
94 | devices, then the compatible list should include mpc5200-<device>. | ||
95 | |||
96 | ie. ethernet on mpc5200: compatible = "mpc5200-ethernet" | ||
97 | ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet" | ||
79 | 98 | ||
80 | Modal devices, like PSCs, also append the configured function to the | 99 | Modal devices, like PSCs, also append the configured function to the |
81 | end of the compatible field. ie. A PSC in i2s mode would specify | 100 | end of the compatible field. ie. A PSC in i2s mode would specify |
82 | "mpc52xx-psc-i2s", not "mpc52xx-i2s". This convention is chosen to | 101 | "mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to |
83 | avoid naming conflicts with non-psc devices providing the same | 102 | avoid naming conflicts with non-psc devices providing the same |
84 | function. For example, "mpc52xx-spi" and "mpc52xx-psc-spi" describe | 103 | function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe |
85 | the mpc5200 simple spi device and a PSC spi mode respectively. | 104 | the mpc5200 simple spi device and a PSC spi mode respectively. |
86 | 105 | ||
87 | If the soc device is more generic and present on other SOCs, the | 106 | If the soc device is more generic and present on other SOCs, the |
88 | compatible property can specify the more generic device type also. | 107 | compatible property can specify the more generic device type also. |
89 | 108 | ||
90 | ie. mscan: compatible = "mpc5200-mscan\0mpc52xx-mscan\0fsl,mscan"; | 109 | ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan"; |
91 | 110 | ||
92 | At the time of writing, exact chip may be either 'mpc5200' or | 111 | At the time of writing, exact chip may be either 'mpc5200' or |
93 | 'mpc5200b'. | 112 | 'mpc5200b'. |
@@ -96,7 +115,7 @@ Device drivers should always try to match as generically as possible. | |||
96 | 115 | ||
97 | III - Structure | 116 | III - Structure |
98 | =============== | 117 | =============== |
99 | The device tree for an mpc52xx board follows the structure defined in | 118 | The device tree for an mpc5200 board follows the structure defined in |
100 | booting-without-of.txt with the following additional notes: | 119 | booting-without-of.txt with the following additional notes: |
101 | 120 | ||
102 | 0) the root node | 121 | 0) the root node |
@@ -115,7 +134,7 @@ Typical memory description node; see booting-without-of. | |||
115 | 134 | ||
116 | 3) The soc5200 node | 135 | 3) The soc5200 node |
117 | ------------------- | 136 | ------------------- |
118 | This node describes the on chip SOC peripherals. Every mpc52xx based | 137 | This node describes the on chip SOC peripherals. Every mpc5200 based |
119 | board will have this node, and as such there is a common naming | 138 | board will have this node, and as such there is a common naming |
120 | convention for SOC devices. | 139 | convention for SOC devices. |
121 | 140 | ||
@@ -125,71 +144,111 @@ name type description | |||
125 | device_type string must be "soc" | 144 | device_type string must be "soc" |
126 | ranges int should be <0 baseaddr baseaddr+10000> | 145 | ranges int should be <0 baseaddr baseaddr+10000> |
127 | reg int must be <baseaddr 10000> | 146 | reg int must be <baseaddr 10000> |
147 | compatible string mpc5200: "mpc5200-soc" | ||
148 | mpc5200b: "mpc5200b-soc\0mpc5200-soc" | ||
149 | system-frequency int Fsystem frequency; source of all | ||
150 | other clocks. | ||
151 | bus-frequency int IPB bus frequency in HZ. Clock rate | ||
152 | used by most of the soc devices. | ||
153 | #interrupt-cells int must be <3>. | ||
128 | 154 | ||
129 | Recommended properties: | 155 | Recommended properties: |
130 | name type description | 156 | name type description |
131 | ---- ---- ----------- | 157 | ---- ---- ----------- |
132 | compatible string should be "<chip>-soc\0mpc52xx-soc" | 158 | model string Exact model of the chip; |
133 | ie. "mpc5200b-soc\0mpc52xx-soc" | 159 | ie: model="fsl,mpc5200" |
134 | #interrupt-cells int must be <3>. If it is not defined | 160 | revision string Silicon revision of chip |
135 | here then it must be defined in every | 161 | ie: revision="M08A" |
136 | soc device node. | 162 | |
137 | bus-frequency int IPB bus frequency in HZ. Clock rate | 163 | The 'model' and 'revision' properties are *strongly* recommended. Having |
138 | used by most of the soc devices. | 164 | them presence acts as a bit of a safety net for working around as yet |
139 | Defining it here avoids needing it | 165 | undiscovered bugs on one version of silicon. For example, device drivers |
140 | added to every device node. | 166 | can use the model and revision properties to decide if a bug fix should |
167 | be turned on. | ||
141 | 168 | ||
142 | 4) soc5200 child nodes | 169 | 4) soc5200 child nodes |
143 | ---------------------- | 170 | ---------------------- |
144 | Any on chip SOC devices available to Linux must appear as soc5200 child nodes. | 171 | Any on chip SOC devices available to Linux must appear as soc5200 child nodes. |
145 | 172 | ||
146 | Note: in the tables below, '*' matches all <chip> values. ie. | 173 | Note: The tables below show the value for the mpc5200. A mpc5200b device |
147 | *-pic would translate to "mpc5200-pic\0mpc52xx-pic" | 174 | tree should use the "mpc5200b-<device>\0mpc5200-<device> form. |
148 | 175 | ||
149 | Required soc5200 child nodes: | 176 | Required soc5200 child nodes: |
150 | name device_type compatible Description | 177 | name device_type compatible Description |
151 | ---- ----------- ---------- ----------- | 178 | ---- ----------- ---------- ----------- |
152 | cdm@<addr> cdm *-cmd Clock Distribution | 179 | cdm@<addr> cdm mpc5200-cmd Clock Distribution |
153 | pic@<addr> interrupt-controller *-pic need an interrupt | 180 | pic@<addr> interrupt-controller mpc5200-pic need an interrupt |
154 | controller to boot | 181 | controller to boot |
155 | bestcomm@<addr> dma-controller *-bestcomm 52xx pic also requires | 182 | bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires |
156 | the bestcomm device | 183 | the bestcomm device |
157 | 184 | ||
158 | Recommended soc5200 child nodes; populate as needed for your board | 185 | Recommended soc5200 child nodes; populate as needed for your board |
159 | name device_type compatible Description | 186 | name device_type compatible Description |
160 | ---- ----------- ---------- ----------- | 187 | ---- ----------- ---------- ----------- |
161 | gpt@<addr> gpt *-gpt General purpose timers | 188 | gpt@<addr> gpt mpc5200-gpt General purpose timers |
162 | rtc@<addr> rtc *-rtc Real time clock | 189 | rtc@<addr> rtc mpc5200-rtc Real time clock |
163 | mscan@<addr> mscan *-mscan CAN bus controller | 190 | mscan@<addr> mscan mpc5200-mscan CAN bus controller |
164 | pci@<addr> pci *-pci PCI bridge | 191 | pci@<addr> pci mpc5200-pci PCI bridge |
165 | serial@<addr> serial *-psc-uart PSC in serial mode | 192 | serial@<addr> serial mpc5200-psc-uart PSC in serial mode |
166 | i2s@<addr> sound *-psc-i2s PSC in i2s mode | 193 | i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode |
167 | ac97@<addr> sound *-psc-ac97 PSC in ac97 mode | 194 | ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode |
168 | spi@<addr> spi *-psc-spi PSC in spi mode | 195 | spi@<addr> spi mpc5200-psc-spi PSC in spi mode |
169 | irda@<addr> irda *-psc-irda PSC in IrDA mode | 196 | irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode |
170 | spi@<addr> spi *-spi MPC52xx spi device | 197 | spi@<addr> spi mpc5200-spi MPC5200 spi device |
171 | ethernet@<addr> network *-fec MPC52xx ethernet device | 198 | ethernet@<addr> network mpc5200-fec MPC5200 ethernet device |
172 | ata@<addr> ata *-ata IDE ATA interface | 199 | ata@<addr> ata mpc5200-ata IDE ATA interface |
173 | i2c@<addr> i2c *-i2c I2C controller | 200 | i2c@<addr> i2c mpc5200-i2c I2C controller |
174 | usb@<addr> usb-ohci-be *-ohci,ohci-be USB controller | 201 | usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller |
175 | xlb@<addr> xlb *-xlb XLB arbritrator | 202 | xlb@<addr> xlb mpc5200-xlb XLB arbritrator |
203 | |||
204 | Important child node properties | ||
205 | name type description | ||
206 | ---- ---- ----------- | ||
207 | cell-index int When multiple devices are present, is the | ||
208 | index of the device in the hardware (ie. There | ||
209 | are 6 PSC on the 5200 numbered PSC1 to PSC6) | ||
210 | PSC1 has 'cell-index = <0>' | ||
211 | PSC4 has 'cell-index = <3>' | ||
212 | |||
213 | 5) General Purpose Timer nodes (child of soc5200 node) | ||
214 | On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board | ||
215 | design supports the internal wdt, then the device node for GPT0 should | ||
216 | include the empty property 'has-wdt'. | ||
217 | |||
218 | 6) PSC nodes (child of soc5200 node) | ||
219 | PSC nodes can define the optional 'port-number' property to force assignment | ||
220 | order of serial ports. For example, PSC5 might be physically connected to | ||
221 | the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would | ||
222 | have a "port-number = <0>" property, and PSC1 would have "port-number = <1>". | ||
223 | |||
224 | PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in | ||
225 | i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the | ||
226 | compatible field. | ||
176 | 227 | ||
177 | IV - Extra Notes | 228 | IV - Extra Notes |
178 | ================ | 229 | ================ |
179 | 230 | ||
180 | 1. Interrupt mapping | 231 | 1. Interrupt mapping |
181 | -------------------- | 232 | -------------------- |
182 | The mpc52xx pic driver splits hardware IRQ numbers into two levels. The | 233 | The mpc5200 pic driver splits hardware IRQ numbers into two levels. The |
183 | split reflects the layout of the PIC hardware itself, which groups | 234 | split reflects the layout of the PIC hardware itself, which groups |
184 | interrupts into one of three groups; CRIT, MAIN or PERP. Also, the | 235 | interrupts into one of three groups; CRIT, MAIN or PERP. Also, the |
185 | Bestcomm dma engine has it's own set of interrupt sources which are | 236 | Bestcomm dma engine has it's own set of interrupt sources which are |
186 | cascaded off of peripheral interrupt 0, which the driver interprets as a | 237 | cascaded off of peripheral interrupt 0, which the driver interprets as a |
187 | fourth group, SDMA. | 238 | fourth group, SDMA. |
188 | 239 | ||
189 | The interrupts property for device nodes using the mpc52xx pic consists | 240 | The interrupts property for device nodes using the mpc5200 pic consists |
190 | of three cells; <L1 L2 level> | 241 | of three cells; <L1 L2 level> |
191 | 242 | ||
192 | L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3] | 243 | L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3] |
193 | L2 := interrupt number; directly mapped from the value in the | 244 | L2 := interrupt number; directly mapped from the value in the |
194 | "ICTL PerStat, MainStat, CritStat Encoded Register" | 245 | "ICTL PerStat, MainStat, CritStat Encoded Register" |
195 | level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3] | 246 | level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3] |
247 | |||
248 | 2. Shared registers | ||
249 | ------------------- | ||
250 | Some SoC devices share registers between them. ie. the i2c devices use | ||
251 | a single clock control register, and almost all device are affected by | ||
252 | the port_config register. Devices which need to manipulate shared regs | ||
253 | should look to the parent SoC node. The soc node is responsible | ||
254 | for arbitrating all shared register access. | ||
diff --git a/MAINTAINERS b/MAINTAINERS index f85c603b02a3..93a338daedd8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -2523,6 +2523,12 @@ M: olof@lixom.net | |||
2523 | L: netdev@vger.kernel.org | 2523 | L: netdev@vger.kernel.org |
2524 | S: Maintained | 2524 | S: Maintained |
2525 | 2525 | ||
2526 | PA SEMI SMBUS DRIVER | ||
2527 | P: Olof Johansson | ||
2528 | M: olof@lixom.net | ||
2529 | L: i2c@lm-sensors.org | ||
2530 | S: Maintained | ||
2531 | |||
2526 | PARALLEL PORT SUPPORT | 2532 | PARALLEL PORT SUPPORT |
2527 | P: Phil Blundell | 2533 | P: Phil Blundell |
2528 | M: philb@gnu.org | 2534 | M: philb@gnu.org |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 5fe195a41a80..a92ce6bd7cf1 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -598,8 +598,6 @@ config SGI_IP32 | |||
598 | select ARC | 598 | select ARC |
599 | select ARC32 | 599 | select ARC32 |
600 | select BOOT_ELF32 | 600 | select BOOT_ELF32 |
601 | select OWN_DMA | ||
602 | select DMA_IP32 | ||
603 | select DMA_NONCOHERENT | 601 | select DMA_NONCOHERENT |
604 | select HW_HAS_PCI | 602 | select HW_HAS_PCI |
605 | select R5000_CPU_SCACHE | 603 | select R5000_CPU_SCACHE |
@@ -883,9 +881,6 @@ config DMA_NONCOHERENT | |||
883 | config DMA_NEED_PCI_MAP_STATE | 881 | config DMA_NEED_PCI_MAP_STATE |
884 | bool | 882 | bool |
885 | 883 | ||
886 | config OWN_DMA | ||
887 | bool | ||
888 | |||
889 | config EARLY_PRINTK | 884 | config EARLY_PRINTK |
890 | bool | 885 | bool |
891 | 886 | ||
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 96090f28373b..f21186c12d81 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig | |||
@@ -264,7 +264,7 @@ CONFIG_BINFMT_ELF=y | |||
264 | CONFIG_MIPS32_COMPAT=y | 264 | CONFIG_MIPS32_COMPAT=y |
265 | CONFIG_COMPAT=y | 265 | CONFIG_COMPAT=y |
266 | CONFIG_MIPS32_O32=y | 266 | CONFIG_MIPS32_O32=y |
267 | # CONFIG_MIPS32_N32 is not set | 267 | CONFIG_MIPS32_N32=y |
268 | CONFIG_BINFMT_ELF32=y | 268 | CONFIG_BINFMT_ELF32=y |
269 | 269 | ||
270 | # | 270 | # |
diff --git a/arch/mips/dec/int-handler.S b/arch/mips/dec/int-handler.S index b251ef864c33..00cecdcc75f2 100644 --- a/arch/mips/dec/int-handler.S +++ b/arch/mips/dec/int-handler.S | |||
@@ -264,9 +264,6 @@ | |||
264 | srlv t3,t1,t2 | 264 | srlv t3,t1,t2 |
265 | 265 | ||
266 | handle_it: | 266 | handle_it: |
267 | LONG_L s0, TI_REGS($28) | ||
268 | LONG_S sp, TI_REGS($28) | ||
269 | PTR_LA ra, ret_from_irq | ||
270 | j dec_irq_dispatch | 267 | j dec_irq_dispatch |
271 | nop | 268 | nop |
272 | 269 | ||
@@ -277,7 +274,6 @@ fpu: | |||
277 | #endif | 274 | #endif |
278 | 275 | ||
279 | spurious: | 276 | spurious: |
280 | PTR_LA ra, _ret_from_irq | ||
281 | j spurious_interrupt | 277 | j spurious_interrupt |
282 | nop | 278 | nop |
283 | END(plat_irq_dispatch) | 279 | END(plat_irq_dispatch) |
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index f10b6a19f8bf..0b78fcbf044a 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S | |||
@@ -21,24 +21,21 @@ | |||
21 | #endif | 21 | #endif |
22 | 22 | ||
23 | #ifndef CONFIG_PREEMPT | 23 | #ifndef CONFIG_PREEMPT |
24 | .macro preempt_stop | ||
25 | local_irq_disable | ||
26 | .endm | ||
27 | #define resume_kernel restore_all | 24 | #define resume_kernel restore_all |
25 | #else | ||
26 | #define __ret_from_irq ret_from_exception | ||
28 | #endif | 27 | #endif |
29 | 28 | ||
30 | .text | 29 | .text |
31 | .align 5 | 30 | .align 5 |
32 | FEXPORT(ret_from_irq) | 31 | #ifndef CONFIG_PREEMPT |
33 | LONG_S s0, TI_REGS($28) | ||
34 | #ifdef CONFIG_PREEMPT | ||
35 | FEXPORT(ret_from_exception) | ||
36 | #else | ||
37 | b _ret_from_irq | ||
38 | FEXPORT(ret_from_exception) | 32 | FEXPORT(ret_from_exception) |
39 | preempt_stop | 33 | local_irq_disable # preempt stop |
34 | b __ret_from_irq | ||
40 | #endif | 35 | #endif |
41 | FEXPORT(_ret_from_irq) | 36 | FEXPORT(ret_from_irq) |
37 | LONG_S s0, TI_REGS($28) | ||
38 | FEXPORT(__ret_from_irq) | ||
42 | LONG_L t0, PT_STATUS(sp) # returning to kernel mode? | 39 | LONG_L t0, PT_STATUS(sp) # returning to kernel mode? |
43 | andi t0, t0, KU_USER | 40 | andi t0, t0, KU_USER |
44 | beqz t0, resume_kernel | 41 | beqz t0, resume_kernel |
diff --git a/arch/mips/kernel/linux32.c b/arch/mips/kernel/linux32.c index ca7ad78f4def..fc4dd6c9dd80 100644 --- a/arch/mips/kernel/linux32.c +++ b/arch/mips/kernel/linux32.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <net/sock.h> | 39 | #include <net/sock.h> |
40 | #include <net/scm.h> | 40 | #include <net/scm.h> |
41 | 41 | ||
42 | #include <asm/compat-signal.h> | ||
42 | #include <asm/ipc.h> | 43 | #include <asm/ipc.h> |
43 | #include <asm/sim.h> | 44 | #include <asm/sim.h> |
44 | #include <asm/uaccess.h> | 45 | #include <asm/uaccess.h> |
@@ -736,3 +737,49 @@ _sys32_clone(nabi_no_regargs struct pt_regs regs) | |||
736 | return do_fork(clone_flags, newsp, ®s, 0, | 737 | return do_fork(clone_flags, newsp, ®s, 0, |
737 | parent_tidptr, child_tidptr); | 738 | parent_tidptr, child_tidptr); |
738 | } | 739 | } |
740 | |||
741 | /* | ||
742 | * Implement the event wait interface for the eventpoll file. It is the kernel | ||
743 | * part of the user space epoll_pwait(2). | ||
744 | */ | ||
745 | asmlinkage long compat_sys_epoll_pwait(int epfd, | ||
746 | struct epoll_event __user *events, int maxevents, int timeout, | ||
747 | const compat_sigset_t __user *sigmask, size_t sigsetsize) | ||
748 | { | ||
749 | int error; | ||
750 | sigset_t ksigmask, sigsaved; | ||
751 | |||
752 | /* | ||
753 | * If the caller wants a certain signal mask to be set during the wait, | ||
754 | * we apply it here. | ||
755 | */ | ||
756 | if (sigmask) { | ||
757 | if (sigsetsize != sizeof(sigset_t)) | ||
758 | return -EINVAL; | ||
759 | if (!access_ok(VERIFY_READ, sigmask, sizeof(ksigmask))) | ||
760 | return -EFAULT; | ||
761 | if (__copy_conv_sigset_from_user(&ksigmask, sigmask)) | ||
762 | return -EFAULT; | ||
763 | sigdelsetmask(&ksigmask, sigmask(SIGKILL) | sigmask(SIGSTOP)); | ||
764 | sigprocmask(SIG_SETMASK, &ksigmask, &sigsaved); | ||
765 | } | ||
766 | |||
767 | error = sys_epoll_wait(epfd, events, maxevents, timeout); | ||
768 | |||
769 | /* | ||
770 | * If we changed the signal mask, we need to restore the original one. | ||
771 | * In case we've got a signal while waiting, we do not restore the | ||
772 | * signal mask yet, and we allow do_signal() to deliver the signal on | ||
773 | * the way back to userspace, before the signal mask is restored. | ||
774 | */ | ||
775 | if (sigmask) { | ||
776 | if (error == -EINTR) { | ||
777 | memcpy(¤t->saved_sigmask, &sigsaved, | ||
778 | sizeof(sigsaved)); | ||
779 | set_thread_flag(TIF_RESTORE_SIGMASK); | ||
780 | } else | ||
781 | sigprocmask(SIG_SETMASK, &sigsaved, NULL); | ||
782 | } | ||
783 | |||
784 | return error; | ||
785 | } | ||
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index e569b846e9a3..10e9a18630aa 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
@@ -470,4 +470,4 @@ sys_call_table: | |||
470 | PTR sys_get_robust_list | 470 | PTR sys_get_robust_list |
471 | PTR sys_kexec_load /* 5270 */ | 471 | PTR sys_kexec_load /* 5270 */ |
472 | PTR sys_getcpu | 472 | PTR sys_getcpu |
473 | PTR sys_epoll_pwait | 473 | PTR compat_sys_epoll_pwait |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index ee8802b59758..2ceda4644a4d 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -396,4 +396,4 @@ EXPORT(sysn32_call_table) | |||
396 | PTR compat_sys_get_robust_list | 396 | PTR compat_sys_get_robust_list |
397 | PTR compat_sys_kexec_load | 397 | PTR compat_sys_kexec_load |
398 | PTR sys_getcpu | 398 | PTR sys_getcpu |
399 | PTR sys_epoll_pwait | 399 | PTR compat_sys_epoll_pwait |
diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h index 9a8abd67ec5c..fdbdbdc65b54 100644 --- a/arch/mips/kernel/signal-common.h +++ b/arch/mips/kernel/signal-common.h | |||
@@ -19,37 +19,7 @@ | |||
19 | # define DEBUGP(fmt, args...) | 19 | # define DEBUGP(fmt, args...) |
20 | #endif | 20 | #endif |
21 | 21 | ||
22 | /* | 22 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) |
23 | * Horribly complicated - with the bloody RM9000 workarounds enabled | ||
24 | * the signal trampolines is moving to the end of the structure so we can | ||
25 | * increase the alignment without breaking software compatibility. | ||
26 | */ | ||
27 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 | ||
28 | |||
29 | struct sigframe { | ||
30 | u32 sf_ass[4]; /* argument save space for o32 */ | ||
31 | u32 sf_code[2]; /* signal trampoline */ | ||
32 | struct sigcontext sf_sc; | ||
33 | sigset_t sf_mask; | ||
34 | }; | ||
35 | |||
36 | #else /* ICACHE_REFILLS_WORKAROUND_WAR */ | ||
37 | |||
38 | struct sigframe { | ||
39 | u32 sf_ass[4]; /* argument save space for o32 */ | ||
40 | u32 sf_pad[2]; | ||
41 | struct sigcontext sf_sc; /* hw context */ | ||
42 | sigset_t sf_mask; | ||
43 | u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */ | ||
44 | }; | ||
45 | |||
46 | #endif /* !ICACHE_REFILLS_WORKAROUND_WAR */ | ||
47 | |||
48 | /* | ||
49 | * handle hardware context | ||
50 | */ | ||
51 | extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *); | ||
52 | extern int restore_sigcontext(struct pt_regs *, struct sigcontext __user *); | ||
53 | 23 | ||
54 | /* | 24 | /* |
55 | * Determine which stack to use.. | 25 | * Determine which stack to use.. |
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 54398af2371f..b2e9ab1bb101 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c | |||
@@ -34,10 +34,20 @@ | |||
34 | 34 | ||
35 | #include "signal-common.h" | 35 | #include "signal-common.h" |
36 | 36 | ||
37 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | 37 | /* |
38 | 38 | * Horribly complicated - with the bloody RM9000 workarounds enabled | |
39 | * the signal trampolines is moving to the end of the structure so we can | ||
40 | * increase the alignment without breaking software compatibility. | ||
41 | */ | ||
39 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 | 42 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 |
40 | 43 | ||
44 | struct sigframe { | ||
45 | u32 sf_ass[4]; /* argument save space for o32 */ | ||
46 | u32 sf_code[2]; /* signal trampoline */ | ||
47 | struct sigcontext sf_sc; | ||
48 | sigset_t sf_mask; | ||
49 | }; | ||
50 | |||
41 | struct rt_sigframe { | 51 | struct rt_sigframe { |
42 | u32 rs_ass[4]; /* argument save space for o32 */ | 52 | u32 rs_ass[4]; /* argument save space for o32 */ |
43 | u32 rs_code[2]; /* signal trampoline */ | 53 | u32 rs_code[2]; /* signal trampoline */ |
@@ -47,6 +57,14 @@ struct rt_sigframe { | |||
47 | 57 | ||
48 | #else | 58 | #else |
49 | 59 | ||
60 | struct sigframe { | ||
61 | u32 sf_ass[4]; /* argument save space for o32 */ | ||
62 | u32 sf_pad[2]; | ||
63 | struct sigcontext sf_sc; /* hw context */ | ||
64 | sigset_t sf_mask; | ||
65 | u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */ | ||
66 | }; | ||
67 | |||
50 | struct rt_sigframe { | 68 | struct rt_sigframe { |
51 | u32 rs_ass[4]; /* argument save space for o32 */ | 69 | u32 rs_ass[4]; /* argument save space for o32 */ |
52 | u32 rs_pad[2]; | 70 | u32 rs_pad[2]; |
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 183fc7e55f34..c28cb21514c8 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c | |||
@@ -8,6 +8,7 @@ | |||
8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | 8 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
9 | */ | 9 | */ |
10 | #include <linux/cache.h> | 10 | #include <linux/cache.h> |
11 | #include <linux/compat.h> | ||
11 | #include <linux/sched.h> | 12 | #include <linux/sched.h> |
12 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
13 | #include <linux/smp.h> | 14 | #include <linux/smp.h> |
@@ -24,6 +25,7 @@ | |||
24 | 25 | ||
25 | #include <asm/abi.h> | 26 | #include <asm/abi.h> |
26 | #include <asm/asm.h> | 27 | #include <asm/asm.h> |
28 | #include <asm/compat-signal.h> | ||
27 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
28 | #include <asm/cacheflush.h> | 30 | #include <asm/cacheflush.h> |
29 | #include <asm/sim.h> | 31 | #include <asm/sim.h> |
@@ -104,8 +106,6 @@ typedef struct compat_siginfo { | |||
104 | #define __NR_O32_rt_sigreturn 4193 | 106 | #define __NR_O32_rt_sigreturn 4193 |
105 | #define __NR_O32_restart_syscall 4253 | 107 | #define __NR_O32_restart_syscall 4253 |
106 | 108 | ||
107 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | ||
108 | |||
109 | /* 32-bit compatibility types */ | 109 | /* 32-bit compatibility types */ |
110 | 110 | ||
111 | #define _NSIG_BPW32 32 | 111 | #define _NSIG_BPW32 32 |
@@ -139,8 +139,20 @@ struct ucontext32 { | |||
139 | sigset_t32 uc_sigmask; /* mask last for extensibility */ | 139 | sigset_t32 uc_sigmask; /* mask last for extensibility */ |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* | ||
143 | * Horribly complicated - with the bloody RM9000 workarounds enabled | ||
144 | * the signal trampolines is moving to the end of the structure so we can | ||
145 | * increase the alignment without breaking software compatibility. | ||
146 | */ | ||
142 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 | 147 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 |
143 | 148 | ||
149 | struct sigframe32 { | ||
150 | u32 sf_ass[4]; /* argument save space for o32 */ | ||
151 | u32 sf_code[2]; /* signal trampoline */ | ||
152 | struct sigcontext32 sf_sc; | ||
153 | sigset_t sf_mask; | ||
154 | }; | ||
155 | |||
144 | struct rt_sigframe32 { | 156 | struct rt_sigframe32 { |
145 | u32 rs_ass[4]; /* argument save space for o32 */ | 157 | u32 rs_ass[4]; /* argument save space for o32 */ |
146 | u32 rs_code[2]; /* signal trampoline */ | 158 | u32 rs_code[2]; /* signal trampoline */ |
@@ -150,6 +162,14 @@ struct rt_sigframe32 { | |||
150 | 162 | ||
151 | #else /* ICACHE_REFILLS_WORKAROUND_WAR */ | 163 | #else /* ICACHE_REFILLS_WORKAROUND_WAR */ |
152 | 164 | ||
165 | struct sigframe32 { | ||
166 | u32 sf_ass[4]; /* argument save space for o32 */ | ||
167 | u32 sf_pad[2]; | ||
168 | struct sigcontext32 sf_sc; /* hw context */ | ||
169 | sigset_t sf_mask; | ||
170 | u32 sf_code[8] ____cacheline_aligned; /* signal trampoline */ | ||
171 | }; | ||
172 | |||
153 | struct rt_sigframe32 { | 173 | struct rt_sigframe32 { |
154 | u32 rs_ass[4]; /* argument save space for o32 */ | 174 | u32 rs_ass[4]; /* argument save space for o32 */ |
155 | u32 rs_pad[2]; | 175 | u32 rs_pad[2]; |
@@ -493,13 +513,13 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, siginfo_t *from) | |||
493 | 513 | ||
494 | asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs) | 514 | asmlinkage void sys32_sigreturn(nabi_no_regargs struct pt_regs regs) |
495 | { | 515 | { |
496 | struct sigframe __user *frame; | 516 | struct sigframe32 __user *frame; |
497 | sigset_t blocked; | 517 | sigset_t blocked; |
498 | 518 | ||
499 | frame = (struct sigframe __user *) regs.regs[29]; | 519 | frame = (struct sigframe32 __user *) regs.regs[29]; |
500 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | 520 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) |
501 | goto badframe; | 521 | goto badframe; |
502 | if (__copy_from_user(&blocked, &frame->sf_mask, sizeof(blocked))) | 522 | if (__copy_conv_sigset_from_user(&blocked, &frame->sf_mask)) |
503 | goto badframe; | 523 | goto badframe; |
504 | 524 | ||
505 | sigdelsetmask(&blocked, ~_BLOCKABLE); | 525 | sigdelsetmask(&blocked, ~_BLOCKABLE); |
@@ -536,7 +556,7 @@ asmlinkage void sys32_rt_sigreturn(nabi_no_regargs struct pt_regs regs) | |||
536 | frame = (struct rt_sigframe32 __user *) regs.regs[29]; | 556 | frame = (struct rt_sigframe32 __user *) regs.regs[29]; |
537 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | 557 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) |
538 | goto badframe; | 558 | goto badframe; |
539 | if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set))) | 559 | if (__copy_conv_sigset_from_user(&set, &frame->rs_uc.uc_sigmask)) |
540 | goto badframe; | 560 | goto badframe; |
541 | 561 | ||
542 | sigdelsetmask(&set, ~_BLOCKABLE); | 562 | sigdelsetmask(&set, ~_BLOCKABLE); |
@@ -581,7 +601,7 @@ badframe: | |||
581 | int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs, | 601 | int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs, |
582 | int signr, sigset_t *set) | 602 | int signr, sigset_t *set) |
583 | { | 603 | { |
584 | struct sigframe __user *frame; | 604 | struct sigframe32 __user *frame; |
585 | int err = 0; | 605 | int err = 0; |
586 | 606 | ||
587 | frame = get_sigframe(ka, regs, sizeof(*frame)); | 607 | frame = get_sigframe(ka, regs, sizeof(*frame)); |
@@ -591,7 +611,8 @@ int setup_frame_32(struct k_sigaction * ka, struct pt_regs *regs, | |||
591 | err |= install_sigtramp(frame->sf_code, __NR_O32_sigreturn); | 611 | err |= install_sigtramp(frame->sf_code, __NR_O32_sigreturn); |
592 | 612 | ||
593 | err |= setup_sigcontext32(regs, &frame->sf_sc); | 613 | err |= setup_sigcontext32(regs, &frame->sf_sc); |
594 | err |= __copy_to_user(&frame->sf_mask, set, sizeof(*set)); | 614 | err |= __copy_conv_sigset_to_user(&frame->sf_mask, set); |
615 | |||
595 | if (err) | 616 | if (err) |
596 | goto give_sigsegv; | 617 | goto give_sigsegv; |
597 | 618 | ||
@@ -650,7 +671,7 @@ int setup_rt_frame_32(struct k_sigaction * ka, struct pt_regs *regs, | |||
650 | err |= __put_user(current->sas_ss_size, | 671 | err |= __put_user(current->sas_ss_size, |
651 | &frame->rs_uc.uc_stack.ss_size); | 672 | &frame->rs_uc.uc_stack.ss_size); |
652 | err |= setup_sigcontext32(regs, &frame->rs_uc.uc_mcontext); | 673 | err |= setup_sigcontext32(regs, &frame->rs_uc.uc_mcontext); |
653 | err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set)); | 674 | err |= __copy_conv_sigset_to_user(&frame->rs_uc.uc_sigmask, set); |
654 | 675 | ||
655 | if (err) | 676 | if (err) |
656 | goto give_sigsegv; | 677 | goto give_sigsegv; |
diff --git a/arch/mips/kernel/signal_n32.c b/arch/mips/kernel/signal_n32.c index 57456e6a0c62..7ca2a078841f 100644 --- a/arch/mips/kernel/signal_n32.c +++ b/arch/mips/kernel/signal_n32.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include <asm/asm.h> | 32 | #include <asm/asm.h> |
33 | #include <asm/cacheflush.h> | 33 | #include <asm/cacheflush.h> |
34 | #include <asm/compat-signal.h> | ||
34 | #include <asm/sim.h> | 35 | #include <asm/sim.h> |
35 | #include <asm/uaccess.h> | 36 | #include <asm/uaccess.h> |
36 | #include <asm/ucontext.h> | 37 | #include <asm/ucontext.h> |
@@ -47,7 +48,9 @@ | |||
47 | #define __NR_N32_rt_sigreturn 6211 | 48 | #define __NR_N32_rt_sigreturn 6211 |
48 | #define __NR_N32_restart_syscall 6214 | 49 | #define __NR_N32_restart_syscall 6214 |
49 | 50 | ||
50 | #define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP))) | 51 | extern int setup_sigcontext(struct pt_regs *, struct sigcontext __user *); |
52 | extern int restore_sigcontext(struct pt_regs *, struct sigcontext __user *); | ||
53 | |||
51 | 54 | ||
52 | /* IRIX compatible stack_t */ | 55 | /* IRIX compatible stack_t */ |
53 | typedef struct sigaltstack32 { | 56 | typedef struct sigaltstack32 { |
@@ -61,7 +64,7 @@ struct ucontextn32 { | |||
61 | s32 uc_link; | 64 | s32 uc_link; |
62 | stack32_t uc_stack; | 65 | stack32_t uc_stack; |
63 | struct sigcontext uc_mcontext; | 66 | struct sigcontext uc_mcontext; |
64 | sigset_t uc_sigmask; /* mask last for extensibility */ | 67 | compat_sigset_t uc_sigmask; /* mask last for extensibility */ |
65 | }; | 68 | }; |
66 | 69 | ||
67 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 | 70 | #if ICACHE_REFILLS_WORKAROUND_WAR == 0 |
@@ -127,7 +130,7 @@ asmlinkage void sysn32_rt_sigreturn(nabi_no_regargs struct pt_regs regs) | |||
127 | frame = (struct rt_sigframe_n32 __user *) regs.regs[29]; | 130 | frame = (struct rt_sigframe_n32 __user *) regs.regs[29]; |
128 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | 131 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) |
129 | goto badframe; | 132 | goto badframe; |
130 | if (__copy_from_user(&set, &frame->rs_uc.uc_sigmask, sizeof(set))) | 133 | if (__copy_conv_sigset_from_user(&set, &frame->rs_uc.uc_sigmask)) |
131 | goto badframe; | 134 | goto badframe; |
132 | 135 | ||
133 | sigdelsetmask(&set, ~_BLOCKABLE); | 136 | sigdelsetmask(&set, ~_BLOCKABLE); |
@@ -193,7 +196,7 @@ int setup_rt_frame_n32(struct k_sigaction * ka, | |||
193 | err |= __put_user(current->sas_ss_size, | 196 | err |= __put_user(current->sas_ss_size, |
194 | &frame->rs_uc.uc_stack.ss_size); | 197 | &frame->rs_uc.uc_stack.ss_size); |
195 | err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext); | 198 | err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext); |
196 | err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set)); | 199 | err |= __copy_conv_sigset_to_user(&frame->rs_uc.uc_sigmask, set); |
197 | 200 | ||
198 | if (err) | 201 | if (err) |
199 | goto give_sigsegv; | 202 | goto give_sigsegv; |
diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 19e41fd186c4..de5727385bc6 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile | |||
@@ -2,8 +2,8 @@ | |||
2 | # Makefile for the Linux/MIPS-specific parts of the memory manager. | 2 | # Makefile for the Linux/MIPS-specific parts of the memory manager. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += cache.o extable.o fault.o init.o pgtable.o \ | 5 | obj-y += cache.o dma-default.o extable.o fault.o \ |
6 | tlbex.o tlbex-fault.o | 6 | init.o pgtable.o tlbex.o tlbex-fault.o |
7 | 7 | ||
8 | obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o | 8 | obj-$(CONFIG_32BIT) += ioremap.o pgtable-32.o |
9 | obj-$(CONFIG_64BIT) += pgtable-64.o | 9 | obj-$(CONFIG_64BIT) += pgtable-64.o |
@@ -32,14 +32,4 @@ obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o | |||
32 | obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o | 32 | obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o |
33 | obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o | 33 | obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o |
34 | 34 | ||
35 | # | ||
36 | # Choose one DMA coherency model | ||
37 | # | ||
38 | ifndef CONFIG_OWN_DMA | ||
39 | obj-$(CONFIG_DMA_COHERENT) += dma-coherent.o | ||
40 | obj-$(CONFIG_DMA_NONCOHERENT) += dma-noncoherent.o | ||
41 | endif | ||
42 | obj-$(CONFIG_DMA_IP27) += dma-ip27.o | ||
43 | obj-$(CONFIG_DMA_IP32) += dma-ip32.o | ||
44 | |||
45 | EXTRA_AFLAGS := $(CFLAGS) | 35 | EXTRA_AFLAGS := $(CFLAGS) |
diff --git a/arch/mips/mm/c-sb1.c b/arch/mips/mm/c-sb1.c index 3a8afd47feaa..9ea460b16bda 100644 --- a/arch/mips/mm/c-sb1.c +++ b/arch/mips/mm/c-sb1.c | |||
@@ -259,6 +259,12 @@ static void sb1_flush_cache_data_page(unsigned long addr) | |||
259 | on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1); | 259 | on_each_cpu(sb1_flush_cache_data_page_ipi, (void *) addr, 1, 1); |
260 | } | 260 | } |
261 | #else | 261 | #else |
262 | |||
263 | static void local_sb1_flush_cache_data_page(unsigned long addr) | ||
264 | { | ||
265 | __sb1_writeback_inv_dcache_range(addr, addr + PAGE_SIZE); | ||
266 | } | ||
267 | |||
262 | void sb1_flush_cache_data_page(unsigned long) | 268 | void sb1_flush_cache_data_page(unsigned long) |
263 | __attribute__((alias("local_sb1_flush_cache_data_page"))); | 269 | __attribute__((alias("local_sb1_flush_cache_data_page"))); |
264 | #endif | 270 | #endif |
diff --git a/arch/mips/mm/dma-coherent.c b/arch/mips/mm/dma-coherent.c deleted file mode 100644 index 5697c6e250a3..000000000000 --- a/arch/mips/mm/dma-coherent.c +++ /dev/null | |||
@@ -1,254 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> | ||
7 | * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> | ||
8 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. | ||
9 | */ | ||
10 | #include <linux/types.h> | ||
11 | #include <linux/dma-mapping.h> | ||
12 | #include <linux/mm.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/string.h> | ||
15 | |||
16 | #include <asm/cache.h> | ||
17 | #include <asm/io.h> | ||
18 | |||
19 | void *dma_alloc_noncoherent(struct device *dev, size_t size, | ||
20 | dma_addr_t * dma_handle, gfp_t gfp) | ||
21 | { | ||
22 | void *ret; | ||
23 | /* ignore region specifiers */ | ||
24 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | ||
25 | |||
26 | if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) | ||
27 | gfp |= GFP_DMA; | ||
28 | ret = (void *) __get_free_pages(gfp, get_order(size)); | ||
29 | |||
30 | if (ret != NULL) { | ||
31 | memset(ret, 0, size); | ||
32 | *dma_handle = virt_to_phys(ret); | ||
33 | } | ||
34 | |||
35 | return ret; | ||
36 | } | ||
37 | |||
38 | EXPORT_SYMBOL(dma_alloc_noncoherent); | ||
39 | |||
40 | void *dma_alloc_coherent(struct device *dev, size_t size, | ||
41 | dma_addr_t * dma_handle, gfp_t gfp) | ||
42 | __attribute__((alias("dma_alloc_noncoherent"))); | ||
43 | |||
44 | EXPORT_SYMBOL(dma_alloc_coherent); | ||
45 | |||
46 | void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, | ||
47 | dma_addr_t dma_handle) | ||
48 | { | ||
49 | unsigned long addr = (unsigned long) vaddr; | ||
50 | |||
51 | free_pages(addr, get_order(size)); | ||
52 | } | ||
53 | |||
54 | EXPORT_SYMBOL(dma_free_noncoherent); | ||
55 | |||
56 | void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | ||
57 | dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent"))); | ||
58 | |||
59 | EXPORT_SYMBOL(dma_free_coherent); | ||
60 | |||
61 | dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, | ||
62 | enum dma_data_direction direction) | ||
63 | { | ||
64 | BUG_ON(direction == DMA_NONE); | ||
65 | |||
66 | return __pa(ptr); | ||
67 | } | ||
68 | |||
69 | EXPORT_SYMBOL(dma_map_single); | ||
70 | |||
71 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
72 | enum dma_data_direction direction) | ||
73 | { | ||
74 | BUG_ON(direction == DMA_NONE); | ||
75 | } | ||
76 | |||
77 | EXPORT_SYMBOL(dma_unmap_single); | ||
78 | |||
79 | int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | ||
80 | enum dma_data_direction direction) | ||
81 | { | ||
82 | int i; | ||
83 | |||
84 | BUG_ON(direction == DMA_NONE); | ||
85 | |||
86 | for (i = 0; i < nents; i++, sg++) { | ||
87 | sg->dma_address = (dma_addr_t)page_to_phys(sg->page) + sg->offset; | ||
88 | } | ||
89 | |||
90 | return nents; | ||
91 | } | ||
92 | |||
93 | EXPORT_SYMBOL(dma_map_sg); | ||
94 | |||
95 | dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
96 | unsigned long offset, size_t size, enum dma_data_direction direction) | ||
97 | { | ||
98 | BUG_ON(direction == DMA_NONE); | ||
99 | |||
100 | return page_to_phys(page) + offset; | ||
101 | } | ||
102 | |||
103 | EXPORT_SYMBOL(dma_map_page); | ||
104 | |||
105 | void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | ||
106 | enum dma_data_direction direction) | ||
107 | { | ||
108 | BUG_ON(direction == DMA_NONE); | ||
109 | } | ||
110 | |||
111 | EXPORT_SYMBOL(dma_unmap_page); | ||
112 | |||
113 | void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | ||
114 | enum dma_data_direction direction) | ||
115 | { | ||
116 | BUG_ON(direction == DMA_NONE); | ||
117 | } | ||
118 | |||
119 | EXPORT_SYMBOL(dma_unmap_sg); | ||
120 | |||
121 | void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
122 | size_t size, enum dma_data_direction direction) | ||
123 | { | ||
124 | BUG_ON(direction == DMA_NONE); | ||
125 | } | ||
126 | |||
127 | EXPORT_SYMBOL(dma_sync_single_for_cpu); | ||
128 | |||
129 | void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, | ||
130 | size_t size, enum dma_data_direction direction) | ||
131 | { | ||
132 | BUG_ON(direction == DMA_NONE); | ||
133 | } | ||
134 | |||
135 | EXPORT_SYMBOL(dma_sync_single_for_device); | ||
136 | |||
137 | void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
138 | unsigned long offset, size_t size, | ||
139 | enum dma_data_direction direction) | ||
140 | { | ||
141 | BUG_ON(direction == DMA_NONE); | ||
142 | } | ||
143 | |||
144 | EXPORT_SYMBOL(dma_sync_single_range_for_cpu); | ||
145 | |||
146 | void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | ||
147 | unsigned long offset, size_t size, | ||
148 | enum dma_data_direction direction) | ||
149 | { | ||
150 | BUG_ON(direction == DMA_NONE); | ||
151 | } | ||
152 | |||
153 | EXPORT_SYMBOL(dma_sync_single_range_for_device); | ||
154 | |||
155 | void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | ||
156 | enum dma_data_direction direction) | ||
157 | { | ||
158 | BUG_ON(direction == DMA_NONE); | ||
159 | } | ||
160 | |||
161 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); | ||
162 | |||
163 | void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | ||
164 | enum dma_data_direction direction) | ||
165 | { | ||
166 | BUG_ON(direction == DMA_NONE); | ||
167 | } | ||
168 | |||
169 | EXPORT_SYMBOL(dma_sync_sg_for_device); | ||
170 | |||
171 | int dma_mapping_error(dma_addr_t dma_addr) | ||
172 | { | ||
173 | return 0; | ||
174 | } | ||
175 | |||
176 | EXPORT_SYMBOL(dma_mapping_error); | ||
177 | |||
178 | int dma_supported(struct device *dev, u64 mask) | ||
179 | { | ||
180 | /* | ||
181 | * we fall back to GFP_DMA when the mask isn't all 1s, | ||
182 | * so we can't guarantee allocations that must be | ||
183 | * within a tighter range than GFP_DMA.. | ||
184 | */ | ||
185 | if (mask < 0x00ffffff) | ||
186 | return 0; | ||
187 | |||
188 | return 1; | ||
189 | } | ||
190 | |||
191 | EXPORT_SYMBOL(dma_supported); | ||
192 | |||
193 | int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) | ||
194 | { | ||
195 | return 1; | ||
196 | } | ||
197 | |||
198 | EXPORT_SYMBOL(dma_is_consistent); | ||
199 | |||
200 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
201 | enum dma_data_direction direction) | ||
202 | { | ||
203 | BUG_ON(direction == DMA_NONE); | ||
204 | } | ||
205 | |||
206 | EXPORT_SYMBOL(dma_cache_sync); | ||
207 | |||
208 | /* The DAC routines are a PCIism.. */ | ||
209 | |||
210 | #ifdef CONFIG_PCI | ||
211 | |||
212 | #include <linux/pci.h> | ||
213 | |||
214 | dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, | ||
215 | struct page *page, unsigned long offset, int direction) | ||
216 | { | ||
217 | return (dma64_addr_t)page_to_phys(page) + offset; | ||
218 | } | ||
219 | |||
220 | EXPORT_SYMBOL(pci_dac_page_to_dma); | ||
221 | |||
222 | struct page *pci_dac_dma_to_page(struct pci_dev *pdev, | ||
223 | dma64_addr_t dma_addr) | ||
224 | { | ||
225 | return mem_map + (dma_addr >> PAGE_SHIFT); | ||
226 | } | ||
227 | |||
228 | EXPORT_SYMBOL(pci_dac_dma_to_page); | ||
229 | |||
230 | unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, | ||
231 | dma64_addr_t dma_addr) | ||
232 | { | ||
233 | return dma_addr & ~PAGE_MASK; | ||
234 | } | ||
235 | |||
236 | EXPORT_SYMBOL(pci_dac_dma_to_offset); | ||
237 | |||
238 | void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, | ||
239 | dma64_addr_t dma_addr, size_t len, int direction) | ||
240 | { | ||
241 | BUG_ON(direction == PCI_DMA_NONE); | ||
242 | } | ||
243 | |||
244 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu); | ||
245 | |||
246 | void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, | ||
247 | dma64_addr_t dma_addr, size_t len, int direction) | ||
248 | { | ||
249 | BUG_ON(direction == PCI_DMA_NONE); | ||
250 | } | ||
251 | |||
252 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device); | ||
253 | |||
254 | #endif /* CONFIG_PCI */ | ||
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-default.c index 8cecef0957c3..4a32e939698f 100644 --- a/arch/mips/mm/dma-noncoherent.c +++ b/arch/mips/mm/dma-default.c | |||
@@ -4,28 +4,39 @@ | |||
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> | 6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> |
7 | * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> | 7 | * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org> |
8 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. | 8 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. |
9 | */ | 9 | */ |
10 | |||
10 | #include <linux/types.h> | 11 | #include <linux/types.h> |
12 | #include <linux/dma-mapping.h> | ||
11 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
12 | #include <linux/module.h> | 14 | #include <linux/module.h> |
13 | #include <linux/string.h> | 15 | #include <linux/string.h> |
14 | #include <linux/dma-mapping.h> | ||
15 | 16 | ||
16 | #include <asm/cache.h> | 17 | #include <asm/cache.h> |
17 | #include <asm/io.h> | 18 | #include <asm/io.h> |
18 | 19 | ||
20 | #include <dma-coherence.h> | ||
21 | |||
19 | /* | 22 | /* |
20 | * Warning on the terminology - Linux calls an uncached area coherent; | 23 | * Warning on the terminology - Linux calls an uncached area coherent; |
21 | * MIPS terminology calls memory areas with hardware maintained coherency | 24 | * MIPS terminology calls memory areas with hardware maintained coherency |
22 | * coherent. | 25 | * coherent. |
23 | */ | 26 | */ |
24 | 27 | ||
28 | static inline int cpu_is_noncoherent_r10000(struct device *dev) | ||
29 | { | ||
30 | return !plat_device_is_coherent(dev) && | ||
31 | (current_cpu_data.cputype == CPU_R10000 && | ||
32 | current_cpu_data.cputype == CPU_R12000); | ||
33 | } | ||
34 | |||
25 | void *dma_alloc_noncoherent(struct device *dev, size_t size, | 35 | void *dma_alloc_noncoherent(struct device *dev, size_t size, |
26 | dma_addr_t * dma_handle, gfp_t gfp) | 36 | dma_addr_t * dma_handle, gfp_t gfp) |
27 | { | 37 | { |
28 | void *ret; | 38 | void *ret; |
39 | |||
29 | /* ignore region specifiers */ | 40 | /* ignore region specifiers */ |
30 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | 41 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); |
31 | 42 | ||
@@ -35,7 +46,7 @@ void *dma_alloc_noncoherent(struct device *dev, size_t size, | |||
35 | 46 | ||
36 | if (ret != NULL) { | 47 | if (ret != NULL) { |
37 | memset(ret, 0, size); | 48 | memset(ret, 0, size); |
38 | *dma_handle = virt_to_phys(ret); | 49 | *dma_handle = plat_map_dma_mem(dev, ret, size); |
39 | } | 50 | } |
40 | 51 | ||
41 | return ret; | 52 | return ret; |
@@ -48,10 +59,21 @@ void *dma_alloc_coherent(struct device *dev, size_t size, | |||
48 | { | 59 | { |
49 | void *ret; | 60 | void *ret; |
50 | 61 | ||
51 | ret = dma_alloc_noncoherent(dev, size, dma_handle, gfp); | 62 | /* ignore region specifiers */ |
63 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | ||
64 | |||
65 | if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) | ||
66 | gfp |= GFP_DMA; | ||
67 | ret = (void *) __get_free_pages(gfp, get_order(size)); | ||
68 | |||
52 | if (ret) { | 69 | if (ret) { |
53 | dma_cache_wback_inv((unsigned long) ret, size); | 70 | memset(ret, 0, size); |
54 | ret = UNCAC_ADDR(ret); | 71 | *dma_handle = plat_map_dma_mem(dev, ret, size); |
72 | |||
73 | if (!plat_device_is_coherent(dev)) { | ||
74 | dma_cache_wback_inv((unsigned long) ret, size); | ||
75 | ret = UNCAC_ADDR(ret); | ||
76 | } | ||
55 | } | 77 | } |
56 | 78 | ||
57 | return ret; | 79 | return ret; |
@@ -72,7 +94,9 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | |||
72 | { | 94 | { |
73 | unsigned long addr = (unsigned long) vaddr; | 95 | unsigned long addr = (unsigned long) vaddr; |
74 | 96 | ||
75 | addr = CAC_ADDR(addr); | 97 | if (!plat_device_is_coherent(dev)) |
98 | addr = CAC_ADDR(addr); | ||
99 | |||
76 | free_pages(addr, get_order(size)); | 100 | free_pages(addr, get_order(size)); |
77 | } | 101 | } |
78 | 102 | ||
@@ -104,9 +128,10 @@ dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, | |||
104 | { | 128 | { |
105 | unsigned long addr = (unsigned long) ptr; | 129 | unsigned long addr = (unsigned long) ptr; |
106 | 130 | ||
107 | __dma_sync(addr, size, direction); | 131 | if (!plat_device_is_coherent(dev)) |
132 | __dma_sync(addr, size, direction); | ||
108 | 133 | ||
109 | return virt_to_phys(ptr); | 134 | return plat_map_dma_mem(dev, ptr, size); |
110 | } | 135 | } |
111 | 136 | ||
112 | EXPORT_SYMBOL(dma_map_single); | 137 | EXPORT_SYMBOL(dma_map_single); |
@@ -114,10 +139,11 @@ EXPORT_SYMBOL(dma_map_single); | |||
114 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | 139 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, |
115 | enum dma_data_direction direction) | 140 | enum dma_data_direction direction) |
116 | { | 141 | { |
117 | unsigned long addr; | 142 | if (cpu_is_noncoherent_r10000(dev)) |
118 | addr = dma_addr + PAGE_OFFSET; | 143 | __dma_sync(plat_dma_addr_to_phys(dma_addr) + PAGE_OFFSET, size, |
144 | direction); | ||
119 | 145 | ||
120 | //__dma_sync(addr, size, direction); | 146 | plat_unmap_dma_mem(dma_addr); |
121 | } | 147 | } |
122 | 148 | ||
123 | EXPORT_SYMBOL(dma_unmap_single); | 149 | EXPORT_SYMBOL(dma_unmap_single); |
@@ -133,11 +159,10 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | |||
133 | unsigned long addr; | 159 | unsigned long addr; |
134 | 160 | ||
135 | addr = (unsigned long) page_address(sg->page); | 161 | addr = (unsigned long) page_address(sg->page); |
136 | if (addr) { | 162 | if (!plat_device_is_coherent(dev) && addr) |
137 | __dma_sync(addr + sg->offset, sg->length, direction); | 163 | __dma_sync(addr + sg->offset, sg->length, direction); |
138 | sg->dma_address = (dma_addr_t)page_to_phys(sg->page) | 164 | sg->dma_address = plat_map_dma_mem_page(dev, sg->page) + |
139 | + sg->offset; | 165 | sg->offset; |
140 | } | ||
141 | } | 166 | } |
142 | 167 | ||
143 | return nents; | 168 | return nents; |
@@ -148,14 +173,16 @@ EXPORT_SYMBOL(dma_map_sg); | |||
148 | dma_addr_t dma_map_page(struct device *dev, struct page *page, | 173 | dma_addr_t dma_map_page(struct device *dev, struct page *page, |
149 | unsigned long offset, size_t size, enum dma_data_direction direction) | 174 | unsigned long offset, size_t size, enum dma_data_direction direction) |
150 | { | 175 | { |
151 | unsigned long addr; | ||
152 | |||
153 | BUG_ON(direction == DMA_NONE); | 176 | BUG_ON(direction == DMA_NONE); |
154 | 177 | ||
155 | addr = (unsigned long) page_address(page) + offset; | 178 | if (!plat_device_is_coherent(dev)) { |
156 | dma_cache_wback_inv(addr, size); | 179 | unsigned long addr; |
180 | |||
181 | addr = (unsigned long) page_address(page) + offset; | ||
182 | dma_cache_wback_inv(addr, size); | ||
183 | } | ||
157 | 184 | ||
158 | return page_to_phys(page) + offset; | 185 | return plat_map_dma_mem_page(dev, page) + offset; |
159 | } | 186 | } |
160 | 187 | ||
161 | EXPORT_SYMBOL(dma_map_page); | 188 | EXPORT_SYMBOL(dma_map_page); |
@@ -165,12 +192,14 @@ void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | |||
165 | { | 192 | { |
166 | BUG_ON(direction == DMA_NONE); | 193 | BUG_ON(direction == DMA_NONE); |
167 | 194 | ||
168 | if (direction != DMA_TO_DEVICE) { | 195 | if (!plat_device_is_coherent(dev) && direction != DMA_TO_DEVICE) { |
169 | unsigned long addr; | 196 | unsigned long addr; |
170 | 197 | ||
171 | addr = dma_address + PAGE_OFFSET; | 198 | addr = plat_dma_addr_to_phys(dma_address); |
172 | dma_cache_wback_inv(addr, size); | 199 | dma_cache_wback_inv(addr, size); |
173 | } | 200 | } |
201 | |||
202 | plat_unmap_dma_mem(dma_address); | ||
174 | } | 203 | } |
175 | 204 | ||
176 | EXPORT_SYMBOL(dma_unmap_page); | 205 | EXPORT_SYMBOL(dma_unmap_page); |
@@ -183,13 +212,15 @@ void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | |||
183 | 212 | ||
184 | BUG_ON(direction == DMA_NONE); | 213 | BUG_ON(direction == DMA_NONE); |
185 | 214 | ||
186 | if (direction == DMA_TO_DEVICE) | ||
187 | return; | ||
188 | |||
189 | for (i = 0; i < nhwentries; i++, sg++) { | 215 | for (i = 0; i < nhwentries; i++, sg++) { |
190 | addr = (unsigned long) page_address(sg->page); | 216 | if (!plat_device_is_coherent(dev) && |
191 | if (addr) | 217 | direction != DMA_TO_DEVICE) { |
192 | __dma_sync(addr + sg->offset, sg->length, direction); | 218 | addr = (unsigned long) page_address(sg->page); |
219 | if (addr) | ||
220 | __dma_sync(addr + sg->offset, sg->length, | ||
221 | direction); | ||
222 | } | ||
223 | plat_unmap_dma_mem(sg->dma_address); | ||
193 | } | 224 | } |
194 | } | 225 | } |
195 | 226 | ||
@@ -198,12 +229,14 @@ EXPORT_SYMBOL(dma_unmap_sg); | |||
198 | void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, | 229 | void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, |
199 | size_t size, enum dma_data_direction direction) | 230 | size_t size, enum dma_data_direction direction) |
200 | { | 231 | { |
201 | unsigned long addr; | ||
202 | |||
203 | BUG_ON(direction == DMA_NONE); | 232 | BUG_ON(direction == DMA_NONE); |
204 | 233 | ||
205 | addr = dma_handle + PAGE_OFFSET; | 234 | if (cpu_is_noncoherent_r10000(dev)) { |
206 | __dma_sync(addr, size, direction); | 235 | unsigned long addr; |
236 | |||
237 | addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); | ||
238 | __dma_sync(addr, size, direction); | ||
239 | } | ||
207 | } | 240 | } |
208 | 241 | ||
209 | EXPORT_SYMBOL(dma_sync_single_for_cpu); | 242 | EXPORT_SYMBOL(dma_sync_single_for_cpu); |
@@ -211,12 +244,14 @@ EXPORT_SYMBOL(dma_sync_single_for_cpu); | |||
211 | void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, | 244 | void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, |
212 | size_t size, enum dma_data_direction direction) | 245 | size_t size, enum dma_data_direction direction) |
213 | { | 246 | { |
214 | unsigned long addr; | ||
215 | |||
216 | BUG_ON(direction == DMA_NONE); | 247 | BUG_ON(direction == DMA_NONE); |
217 | 248 | ||
218 | addr = dma_handle + PAGE_OFFSET; | 249 | if (cpu_is_noncoherent_r10000(dev)) { |
219 | __dma_sync(addr, size, direction); | 250 | unsigned long addr; |
251 | |||
252 | addr = plat_dma_addr_to_phys(dma_handle); | ||
253 | __dma_sync(addr, size, direction); | ||
254 | } | ||
220 | } | 255 | } |
221 | 256 | ||
222 | EXPORT_SYMBOL(dma_sync_single_for_device); | 257 | EXPORT_SYMBOL(dma_sync_single_for_device); |
@@ -224,12 +259,14 @@ EXPORT_SYMBOL(dma_sync_single_for_device); | |||
224 | void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | 259 | void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, |
225 | unsigned long offset, size_t size, enum dma_data_direction direction) | 260 | unsigned long offset, size_t size, enum dma_data_direction direction) |
226 | { | 261 | { |
227 | unsigned long addr; | ||
228 | |||
229 | BUG_ON(direction == DMA_NONE); | 262 | BUG_ON(direction == DMA_NONE); |
230 | 263 | ||
231 | addr = dma_handle + offset + PAGE_OFFSET; | 264 | if (cpu_is_noncoherent_r10000(dev)) { |
232 | __dma_sync(addr, size, direction); | 265 | unsigned long addr; |
266 | |||
267 | addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); | ||
268 | __dma_sync(addr + offset, size, direction); | ||
269 | } | ||
233 | } | 270 | } |
234 | 271 | ||
235 | EXPORT_SYMBOL(dma_sync_single_range_for_cpu); | 272 | EXPORT_SYMBOL(dma_sync_single_range_for_cpu); |
@@ -237,12 +274,14 @@ EXPORT_SYMBOL(dma_sync_single_range_for_cpu); | |||
237 | void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | 274 | void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, |
238 | unsigned long offset, size_t size, enum dma_data_direction direction) | 275 | unsigned long offset, size_t size, enum dma_data_direction direction) |
239 | { | 276 | { |
240 | unsigned long addr; | ||
241 | |||
242 | BUG_ON(direction == DMA_NONE); | 277 | BUG_ON(direction == DMA_NONE); |
243 | 278 | ||
244 | addr = dma_handle + offset + PAGE_OFFSET; | 279 | if (cpu_is_noncoherent_r10000(dev)) { |
245 | __dma_sync(addr, size, direction); | 280 | unsigned long addr; |
281 | |||
282 | addr = PAGE_OFFSET + plat_dma_addr_to_phys(dma_handle); | ||
283 | __dma_sync(addr + offset, size, direction); | ||
284 | } | ||
246 | } | 285 | } |
247 | 286 | ||
248 | EXPORT_SYMBOL(dma_sync_single_range_for_device); | 287 | EXPORT_SYMBOL(dma_sync_single_range_for_device); |
@@ -255,9 +294,12 @@ void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | |||
255 | BUG_ON(direction == DMA_NONE); | 294 | BUG_ON(direction == DMA_NONE); |
256 | 295 | ||
257 | /* Make sure that gcc doesn't leave the empty loop body. */ | 296 | /* Make sure that gcc doesn't leave the empty loop body. */ |
258 | for (i = 0; i < nelems; i++, sg++) | 297 | for (i = 0; i < nelems; i++, sg++) { |
259 | __dma_sync((unsigned long)page_address(sg->page), | 298 | if (!plat_device_is_coherent(dev)) |
260 | sg->length, direction); | 299 | __dma_sync((unsigned long)page_address(sg->page), |
300 | sg->length, direction); | ||
301 | plat_unmap_dma_mem(sg->dma_address); | ||
302 | } | ||
261 | } | 303 | } |
262 | 304 | ||
263 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); | 305 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); |
@@ -270,9 +312,12 @@ void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nele | |||
270 | BUG_ON(direction == DMA_NONE); | 312 | BUG_ON(direction == DMA_NONE); |
271 | 313 | ||
272 | /* Make sure that gcc doesn't leave the empty loop body. */ | 314 | /* Make sure that gcc doesn't leave the empty loop body. */ |
273 | for (i = 0; i < nelems; i++, sg++) | 315 | for (i = 0; i < nelems; i++, sg++) { |
274 | __dma_sync((unsigned long)page_address(sg->page), | 316 | if (!plat_device_is_coherent(dev)) |
275 | sg->length, direction); | 317 | __dma_sync((unsigned long)page_address(sg->page), |
318 | sg->length, direction); | ||
319 | plat_unmap_dma_mem(sg->dma_address); | ||
320 | } | ||
276 | } | 321 | } |
277 | 322 | ||
278 | EXPORT_SYMBOL(dma_sync_sg_for_device); | 323 | EXPORT_SYMBOL(dma_sync_sg_for_device); |
@@ -301,70 +346,18 @@ EXPORT_SYMBOL(dma_supported); | |||
301 | 346 | ||
302 | int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) | 347 | int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) |
303 | { | 348 | { |
304 | return 1; | 349 | return plat_device_is_coherent(dev); |
305 | } | 350 | } |
306 | 351 | ||
307 | EXPORT_SYMBOL(dma_is_consistent); | 352 | EXPORT_SYMBOL(dma_is_consistent); |
308 | 353 | ||
309 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | 354 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
310 | enum dma_data_direction direction) | 355 | enum dma_data_direction direction) |
311 | { | 356 | { |
312 | if (direction == DMA_NONE) | 357 | BUG_ON(direction == DMA_NONE); |
313 | return; | ||
314 | 358 | ||
315 | dma_cache_wback_inv((unsigned long)vaddr, size); | 359 | if (!plat_device_is_coherent(dev)) |
360 | dma_cache_wback_inv((unsigned long)vaddr, size); | ||
316 | } | 361 | } |
317 | 362 | ||
318 | EXPORT_SYMBOL(dma_cache_sync); | 363 | EXPORT_SYMBOL(dma_cache_sync); |
319 | |||
320 | /* The DAC routines are a PCIism.. */ | ||
321 | |||
322 | #ifdef CONFIG_PCI | ||
323 | |||
324 | #include <linux/pci.h> | ||
325 | |||
326 | dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, | ||
327 | struct page *page, unsigned long offset, int direction) | ||
328 | { | ||
329 | return (dma64_addr_t)page_to_phys(page) + offset; | ||
330 | } | ||
331 | |||
332 | EXPORT_SYMBOL(pci_dac_page_to_dma); | ||
333 | |||
334 | struct page *pci_dac_dma_to_page(struct pci_dev *pdev, | ||
335 | dma64_addr_t dma_addr) | ||
336 | { | ||
337 | return mem_map + (dma_addr >> PAGE_SHIFT); | ||
338 | } | ||
339 | |||
340 | EXPORT_SYMBOL(pci_dac_dma_to_page); | ||
341 | |||
342 | unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, | ||
343 | dma64_addr_t dma_addr) | ||
344 | { | ||
345 | return dma_addr & ~PAGE_MASK; | ||
346 | } | ||
347 | |||
348 | EXPORT_SYMBOL(pci_dac_dma_to_offset); | ||
349 | |||
350 | void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, | ||
351 | dma64_addr_t dma_addr, size_t len, int direction) | ||
352 | { | ||
353 | BUG_ON(direction == PCI_DMA_NONE); | ||
354 | |||
355 | dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len); | ||
356 | } | ||
357 | |||
358 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu); | ||
359 | |||
360 | void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, | ||
361 | dma64_addr_t dma_addr, size_t len, int direction) | ||
362 | { | ||
363 | BUG_ON(direction == PCI_DMA_NONE); | ||
364 | |||
365 | dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len); | ||
366 | } | ||
367 | |||
368 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device); | ||
369 | |||
370 | #endif /* CONFIG_PCI */ | ||
diff --git a/arch/mips/mm/dma-ip27.c b/arch/mips/mm/dma-ip27.c deleted file mode 100644 index f088344db465..000000000000 --- a/arch/mips/mm/dma-ip27.c +++ /dev/null | |||
@@ -1,257 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> | ||
7 | * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> | ||
8 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. | ||
9 | */ | ||
10 | #include <linux/types.h> | ||
11 | #include <linux/mm.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/string.h> | ||
14 | #include <linux/pci.h> | ||
15 | |||
16 | #include <asm/cache.h> | ||
17 | #include <asm/pci/bridge.h> | ||
18 | |||
19 | #define pdev_to_baddr(pdev, addr) \ | ||
20 | (BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr)) | ||
21 | #define dev_to_baddr(dev, addr) \ | ||
22 | pdev_to_baddr(to_pci_dev(dev), (addr)) | ||
23 | |||
24 | void *dma_alloc_noncoherent(struct device *dev, size_t size, | ||
25 | dma_addr_t * dma_handle, gfp_t gfp) | ||
26 | { | ||
27 | void *ret; | ||
28 | |||
29 | /* ignore region specifiers */ | ||
30 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | ||
31 | |||
32 | if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) | ||
33 | gfp |= GFP_DMA; | ||
34 | ret = (void *) __get_free_pages(gfp, get_order(size)); | ||
35 | |||
36 | if (ret != NULL) { | ||
37 | memset(ret, 0, size); | ||
38 | *dma_handle = dev_to_baddr(dev, virt_to_phys(ret)); | ||
39 | } | ||
40 | |||
41 | return ret; | ||
42 | } | ||
43 | |||
44 | EXPORT_SYMBOL(dma_alloc_noncoherent); | ||
45 | |||
46 | void *dma_alloc_coherent(struct device *dev, size_t size, | ||
47 | dma_addr_t * dma_handle, gfp_t gfp) | ||
48 | __attribute__((alias("dma_alloc_noncoherent"))); | ||
49 | |||
50 | EXPORT_SYMBOL(dma_alloc_coherent); | ||
51 | |||
52 | void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, | ||
53 | dma_addr_t dma_handle) | ||
54 | { | ||
55 | unsigned long addr = (unsigned long) vaddr; | ||
56 | |||
57 | free_pages(addr, get_order(size)); | ||
58 | } | ||
59 | |||
60 | EXPORT_SYMBOL(dma_free_noncoherent); | ||
61 | |||
62 | void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | ||
63 | dma_addr_t dma_handle) __attribute__((alias("dma_free_noncoherent"))); | ||
64 | |||
65 | EXPORT_SYMBOL(dma_free_coherent); | ||
66 | |||
67 | dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, | ||
68 | enum dma_data_direction direction) | ||
69 | { | ||
70 | BUG_ON(direction == DMA_NONE); | ||
71 | |||
72 | return dev_to_baddr(dev, __pa(ptr)); | ||
73 | } | ||
74 | |||
75 | EXPORT_SYMBOL(dma_map_single); | ||
76 | |||
77 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
78 | enum dma_data_direction direction) | ||
79 | { | ||
80 | BUG_ON(direction == DMA_NONE); | ||
81 | } | ||
82 | |||
83 | EXPORT_SYMBOL(dma_unmap_single); | ||
84 | |||
85 | int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | ||
86 | enum dma_data_direction direction) | ||
87 | { | ||
88 | int i; | ||
89 | |||
90 | BUG_ON(direction == DMA_NONE); | ||
91 | |||
92 | for (i = 0; i < nents; i++, sg++) { | ||
93 | sg->dma_address = (dma_addr_t) dev_to_baddr(dev, | ||
94 | page_to_phys(sg->page) + sg->offset); | ||
95 | } | ||
96 | |||
97 | return nents; | ||
98 | } | ||
99 | |||
100 | EXPORT_SYMBOL(dma_map_sg); | ||
101 | |||
102 | dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
103 | unsigned long offset, size_t size, enum dma_data_direction direction) | ||
104 | { | ||
105 | BUG_ON(direction == DMA_NONE); | ||
106 | |||
107 | return dev_to_baddr(dev, page_to_phys(page) + offset); | ||
108 | } | ||
109 | |||
110 | EXPORT_SYMBOL(dma_map_page); | ||
111 | |||
112 | void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | ||
113 | enum dma_data_direction direction) | ||
114 | { | ||
115 | BUG_ON(direction == DMA_NONE); | ||
116 | } | ||
117 | |||
118 | EXPORT_SYMBOL(dma_unmap_page); | ||
119 | |||
120 | void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | ||
121 | enum dma_data_direction direction) | ||
122 | { | ||
123 | BUG_ON(direction == DMA_NONE); | ||
124 | } | ||
125 | |||
126 | EXPORT_SYMBOL(dma_unmap_sg); | ||
127 | |||
128 | void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size, | ||
129 | enum dma_data_direction direction) | ||
130 | { | ||
131 | BUG_ON(direction == DMA_NONE); | ||
132 | } | ||
133 | |||
134 | EXPORT_SYMBOL(dma_sync_single_for_cpu); | ||
135 | |||
136 | void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size, | ||
137 | enum dma_data_direction direction) | ||
138 | { | ||
139 | BUG_ON(direction == DMA_NONE); | ||
140 | } | ||
141 | |||
142 | EXPORT_SYMBOL(dma_sync_single_for_device); | ||
143 | |||
144 | void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
145 | unsigned long offset, size_t size, | ||
146 | enum dma_data_direction direction) | ||
147 | { | ||
148 | BUG_ON(direction == DMA_NONE); | ||
149 | } | ||
150 | |||
151 | EXPORT_SYMBOL(dma_sync_single_range_for_cpu); | ||
152 | |||
153 | void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | ||
154 | unsigned long offset, size_t size, | ||
155 | enum dma_data_direction direction) | ||
156 | { | ||
157 | BUG_ON(direction == DMA_NONE); | ||
158 | } | ||
159 | |||
160 | EXPORT_SYMBOL(dma_sync_single_range_for_device); | ||
161 | |||
162 | void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | ||
163 | enum dma_data_direction direction) | ||
164 | { | ||
165 | BUG_ON(direction == DMA_NONE); | ||
166 | } | ||
167 | |||
168 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); | ||
169 | |||
170 | void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | ||
171 | enum dma_data_direction direction) | ||
172 | { | ||
173 | BUG_ON(direction == DMA_NONE); | ||
174 | } | ||
175 | |||
176 | EXPORT_SYMBOL(dma_sync_sg_for_device); | ||
177 | |||
178 | int dma_mapping_error(dma_addr_t dma_addr) | ||
179 | { | ||
180 | return 0; | ||
181 | } | ||
182 | |||
183 | EXPORT_SYMBOL(dma_mapping_error); | ||
184 | |||
185 | int dma_supported(struct device *dev, u64 mask) | ||
186 | { | ||
187 | /* | ||
188 | * we fall back to GFP_DMA when the mask isn't all 1s, | ||
189 | * so we can't guarantee allocations that must be | ||
190 | * within a tighter range than GFP_DMA.. | ||
191 | */ | ||
192 | if (mask < 0x00ffffff) | ||
193 | return 0; | ||
194 | |||
195 | return 1; | ||
196 | } | ||
197 | |||
198 | EXPORT_SYMBOL(dma_supported); | ||
199 | |||
200 | int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) | ||
201 | { | ||
202 | return 1; | ||
203 | } | ||
204 | |||
205 | EXPORT_SYMBOL(dma_is_consistent); | ||
206 | |||
207 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
208 | enum dma_data_direction direction) | ||
209 | { | ||
210 | BUG_ON(direction == DMA_NONE); | ||
211 | } | ||
212 | |||
213 | EXPORT_SYMBOL(dma_cache_sync); | ||
214 | |||
215 | dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, | ||
216 | struct page *page, unsigned long offset, int direction) | ||
217 | { | ||
218 | dma64_addr_t addr = page_to_phys(page) + offset; | ||
219 | |||
220 | return (dma64_addr_t) pdev_to_baddr(pdev, addr); | ||
221 | } | ||
222 | |||
223 | EXPORT_SYMBOL(pci_dac_page_to_dma); | ||
224 | |||
225 | struct page *pci_dac_dma_to_page(struct pci_dev *pdev, | ||
226 | dma64_addr_t dma_addr) | ||
227 | { | ||
228 | struct bridge_controller *bc = BRIDGE_CONTROLLER(pdev->bus); | ||
229 | |||
230 | return pfn_to_page((dma_addr - bc->baddr) >> PAGE_SHIFT); | ||
231 | } | ||
232 | |||
233 | EXPORT_SYMBOL(pci_dac_dma_to_page); | ||
234 | |||
235 | unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, | ||
236 | dma64_addr_t dma_addr) | ||
237 | { | ||
238 | return dma_addr & ~PAGE_MASK; | ||
239 | } | ||
240 | |||
241 | EXPORT_SYMBOL(pci_dac_dma_to_offset); | ||
242 | |||
243 | void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, | ||
244 | dma64_addr_t dma_addr, size_t len, int direction) | ||
245 | { | ||
246 | BUG_ON(direction == PCI_DMA_NONE); | ||
247 | } | ||
248 | |||
249 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu); | ||
250 | |||
251 | void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, | ||
252 | dma64_addr_t dma_addr, size_t len, int direction) | ||
253 | { | ||
254 | BUG_ON(direction == PCI_DMA_NONE); | ||
255 | } | ||
256 | |||
257 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device); | ||
diff --git a/arch/mips/mm/dma-ip32.c b/arch/mips/mm/dma-ip32.c deleted file mode 100644 index b42b6f7456e6..000000000000 --- a/arch/mips/mm/dma-ip32.c +++ /dev/null | |||
@@ -1,383 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> | ||
7 | * Copyright (C) 2000, 2001 Ralf Baechle <ralf@gnu.org> | ||
8 | * Copyright (C) 2005 Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com> | ||
9 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. | ||
10 | * IP32 changes by Ilya. | ||
11 | */ | ||
12 | #include <linux/types.h> | ||
13 | #include <linux/mm.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/dma-mapping.h> | ||
17 | |||
18 | #include <asm/cache.h> | ||
19 | #include <asm/io.h> | ||
20 | #include <asm/ip32/crime.h> | ||
21 | |||
22 | /* | ||
23 | * Warning on the terminology - Linux calls an uncached area coherent; | ||
24 | * MIPS terminology calls memory areas with hardware maintained coherency | ||
25 | * coherent. | ||
26 | */ | ||
27 | |||
28 | /* | ||
29 | * Few notes. | ||
30 | * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M | ||
31 | * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for native-endian) | ||
32 | * 3. All other devices see memory as one big chunk at 0x40000000 | ||
33 | * 4. Non-PCI devices will pass NULL as struct device* | ||
34 | * Thus we translate differently, depending on device. | ||
35 | */ | ||
36 | |||
37 | #define RAM_OFFSET_MASK 0x3fffffff | ||
38 | |||
39 | void *dma_alloc_noncoherent(struct device *dev, size_t size, | ||
40 | dma_addr_t * dma_handle, gfp_t gfp) | ||
41 | { | ||
42 | void *ret; | ||
43 | /* ignore region specifiers */ | ||
44 | gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); | ||
45 | |||
46 | if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) | ||
47 | gfp |= GFP_DMA; | ||
48 | ret = (void *) __get_free_pages(gfp, get_order(size)); | ||
49 | |||
50 | if (ret != NULL) { | ||
51 | unsigned long addr = virt_to_phys(ret)&RAM_OFFSET_MASK; | ||
52 | memset(ret, 0, size); | ||
53 | if(dev==NULL) | ||
54 | addr+= CRIME_HI_MEM_BASE; | ||
55 | *dma_handle = addr; | ||
56 | } | ||
57 | |||
58 | return ret; | ||
59 | } | ||
60 | |||
61 | EXPORT_SYMBOL(dma_alloc_noncoherent); | ||
62 | |||
63 | void *dma_alloc_coherent(struct device *dev, size_t size, | ||
64 | dma_addr_t * dma_handle, gfp_t gfp) | ||
65 | { | ||
66 | void *ret; | ||
67 | |||
68 | ret = dma_alloc_noncoherent(dev, size, dma_handle, gfp); | ||
69 | if (ret) { | ||
70 | dma_cache_wback_inv((unsigned long) ret, size); | ||
71 | ret = UNCAC_ADDR(ret); | ||
72 | } | ||
73 | |||
74 | return ret; | ||
75 | } | ||
76 | |||
77 | EXPORT_SYMBOL(dma_alloc_coherent); | ||
78 | |||
79 | void dma_free_noncoherent(struct device *dev, size_t size, void *vaddr, | ||
80 | dma_addr_t dma_handle) | ||
81 | { | ||
82 | free_pages((unsigned long) vaddr, get_order(size)); | ||
83 | } | ||
84 | |||
85 | EXPORT_SYMBOL(dma_free_noncoherent); | ||
86 | |||
87 | void dma_free_coherent(struct device *dev, size_t size, void *vaddr, | ||
88 | dma_addr_t dma_handle) | ||
89 | { | ||
90 | unsigned long addr = (unsigned long) vaddr; | ||
91 | |||
92 | addr = CAC_ADDR(addr); | ||
93 | free_pages(addr, get_order(size)); | ||
94 | } | ||
95 | |||
96 | EXPORT_SYMBOL(dma_free_coherent); | ||
97 | |||
98 | static inline void __dma_sync(unsigned long addr, size_t size, | ||
99 | enum dma_data_direction direction) | ||
100 | { | ||
101 | switch (direction) { | ||
102 | case DMA_TO_DEVICE: | ||
103 | dma_cache_wback(addr, size); | ||
104 | break; | ||
105 | |||
106 | case DMA_FROM_DEVICE: | ||
107 | dma_cache_inv(addr, size); | ||
108 | break; | ||
109 | |||
110 | case DMA_BIDIRECTIONAL: | ||
111 | dma_cache_wback_inv(addr, size); | ||
112 | break; | ||
113 | |||
114 | default: | ||
115 | BUG(); | ||
116 | } | ||
117 | } | ||
118 | |||
119 | dma_addr_t dma_map_single(struct device *dev, void *ptr, size_t size, | ||
120 | enum dma_data_direction direction) | ||
121 | { | ||
122 | unsigned long addr = (unsigned long) ptr; | ||
123 | |||
124 | switch (direction) { | ||
125 | case DMA_TO_DEVICE: | ||
126 | dma_cache_wback(addr, size); | ||
127 | break; | ||
128 | |||
129 | case DMA_FROM_DEVICE: | ||
130 | dma_cache_inv(addr, size); | ||
131 | break; | ||
132 | |||
133 | case DMA_BIDIRECTIONAL: | ||
134 | dma_cache_wback_inv(addr, size); | ||
135 | break; | ||
136 | |||
137 | default: | ||
138 | BUG(); | ||
139 | } | ||
140 | |||
141 | addr = virt_to_phys(ptr)&RAM_OFFSET_MASK; | ||
142 | if(dev == NULL) | ||
143 | addr+=CRIME_HI_MEM_BASE; | ||
144 | return (dma_addr_t)addr; | ||
145 | } | ||
146 | |||
147 | EXPORT_SYMBOL(dma_map_single); | ||
148 | |||
149 | void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size, | ||
150 | enum dma_data_direction direction) | ||
151 | { | ||
152 | switch (direction) { | ||
153 | case DMA_TO_DEVICE: | ||
154 | break; | ||
155 | |||
156 | case DMA_FROM_DEVICE: | ||
157 | break; | ||
158 | |||
159 | case DMA_BIDIRECTIONAL: | ||
160 | break; | ||
161 | |||
162 | default: | ||
163 | BUG(); | ||
164 | } | ||
165 | } | ||
166 | |||
167 | EXPORT_SYMBOL(dma_unmap_single); | ||
168 | |||
169 | int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents, | ||
170 | enum dma_data_direction direction) | ||
171 | { | ||
172 | int i; | ||
173 | |||
174 | BUG_ON(direction == DMA_NONE); | ||
175 | |||
176 | for (i = 0; i < nents; i++, sg++) { | ||
177 | unsigned long addr; | ||
178 | |||
179 | addr = (unsigned long) page_address(sg->page)+sg->offset; | ||
180 | if (addr) | ||
181 | __dma_sync(addr, sg->length, direction); | ||
182 | addr = __pa(addr)&RAM_OFFSET_MASK; | ||
183 | if(dev == NULL) | ||
184 | addr += CRIME_HI_MEM_BASE; | ||
185 | sg->dma_address = (dma_addr_t)addr; | ||
186 | } | ||
187 | |||
188 | return nents; | ||
189 | } | ||
190 | |||
191 | EXPORT_SYMBOL(dma_map_sg); | ||
192 | |||
193 | dma_addr_t dma_map_page(struct device *dev, struct page *page, | ||
194 | unsigned long offset, size_t size, enum dma_data_direction direction) | ||
195 | { | ||
196 | unsigned long addr; | ||
197 | |||
198 | BUG_ON(direction == DMA_NONE); | ||
199 | |||
200 | addr = (unsigned long) page_address(page) + offset; | ||
201 | dma_cache_wback_inv(addr, size); | ||
202 | addr = __pa(addr)&RAM_OFFSET_MASK; | ||
203 | if(dev == NULL) | ||
204 | addr += CRIME_HI_MEM_BASE; | ||
205 | |||
206 | return (dma_addr_t)addr; | ||
207 | } | ||
208 | |||
209 | EXPORT_SYMBOL(dma_map_page); | ||
210 | |||
211 | void dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size, | ||
212 | enum dma_data_direction direction) | ||
213 | { | ||
214 | BUG_ON(direction == DMA_NONE); | ||
215 | |||
216 | if (direction != DMA_TO_DEVICE) { | ||
217 | unsigned long addr; | ||
218 | |||
219 | dma_address&=RAM_OFFSET_MASK; | ||
220 | addr = dma_address + PAGE_OFFSET; | ||
221 | if(dma_address>=256*1024*1024) | ||
222 | addr+=CRIME_HI_MEM_BASE; | ||
223 | dma_cache_wback_inv(addr, size); | ||
224 | } | ||
225 | } | ||
226 | |||
227 | EXPORT_SYMBOL(dma_unmap_page); | ||
228 | |||
229 | void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries, | ||
230 | enum dma_data_direction direction) | ||
231 | { | ||
232 | unsigned long addr; | ||
233 | int i; | ||
234 | |||
235 | BUG_ON(direction == DMA_NONE); | ||
236 | |||
237 | if (direction == DMA_TO_DEVICE) | ||
238 | return; | ||
239 | |||
240 | for (i = 0; i < nhwentries; i++, sg++) { | ||
241 | addr = (unsigned long) page_address(sg->page); | ||
242 | if (!addr) | ||
243 | continue; | ||
244 | dma_cache_wback_inv(addr + sg->offset, sg->length); | ||
245 | } | ||
246 | } | ||
247 | |||
248 | EXPORT_SYMBOL(dma_unmap_sg); | ||
249 | |||
250 | void dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
251 | size_t size, enum dma_data_direction direction) | ||
252 | { | ||
253 | unsigned long addr; | ||
254 | |||
255 | BUG_ON(direction == DMA_NONE); | ||
256 | |||
257 | dma_handle&=RAM_OFFSET_MASK; | ||
258 | addr = dma_handle + PAGE_OFFSET; | ||
259 | if(dma_handle>=256*1024*1024) | ||
260 | addr+=CRIME_HI_MEM_BASE; | ||
261 | __dma_sync(addr, size, direction); | ||
262 | } | ||
263 | |||
264 | EXPORT_SYMBOL(dma_sync_single_for_cpu); | ||
265 | |||
266 | void dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, | ||
267 | size_t size, enum dma_data_direction direction) | ||
268 | { | ||
269 | unsigned long addr; | ||
270 | |||
271 | BUG_ON(direction == DMA_NONE); | ||
272 | |||
273 | dma_handle&=RAM_OFFSET_MASK; | ||
274 | addr = dma_handle + PAGE_OFFSET; | ||
275 | if(dma_handle>=256*1024*1024) | ||
276 | addr+=CRIME_HI_MEM_BASE; | ||
277 | __dma_sync(addr, size, direction); | ||
278 | } | ||
279 | |||
280 | EXPORT_SYMBOL(dma_sync_single_for_device); | ||
281 | |||
282 | void dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle, | ||
283 | unsigned long offset, size_t size, enum dma_data_direction direction) | ||
284 | { | ||
285 | unsigned long addr; | ||
286 | |||
287 | BUG_ON(direction == DMA_NONE); | ||
288 | |||
289 | dma_handle&=RAM_OFFSET_MASK; | ||
290 | addr = dma_handle + offset + PAGE_OFFSET; | ||
291 | if(dma_handle>=256*1024*1024) | ||
292 | addr+=CRIME_HI_MEM_BASE; | ||
293 | __dma_sync(addr, size, direction); | ||
294 | } | ||
295 | |||
296 | EXPORT_SYMBOL(dma_sync_single_range_for_cpu); | ||
297 | |||
298 | void dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle, | ||
299 | unsigned long offset, size_t size, enum dma_data_direction direction) | ||
300 | { | ||
301 | unsigned long addr; | ||
302 | |||
303 | BUG_ON(direction == DMA_NONE); | ||
304 | |||
305 | dma_handle&=RAM_OFFSET_MASK; | ||
306 | addr = dma_handle + offset + PAGE_OFFSET; | ||
307 | if(dma_handle>=256*1024*1024) | ||
308 | addr+=CRIME_HI_MEM_BASE; | ||
309 | __dma_sync(addr, size, direction); | ||
310 | } | ||
311 | |||
312 | EXPORT_SYMBOL(dma_sync_single_range_for_device); | ||
313 | |||
314 | void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems, | ||
315 | enum dma_data_direction direction) | ||
316 | { | ||
317 | int i; | ||
318 | |||
319 | BUG_ON(direction == DMA_NONE); | ||
320 | |||
321 | /* Make sure that gcc doesn't leave the empty loop body. */ | ||
322 | for (i = 0; i < nelems; i++, sg++) | ||
323 | __dma_sync((unsigned long)page_address(sg->page), | ||
324 | sg->length, direction); | ||
325 | } | ||
326 | |||
327 | EXPORT_SYMBOL(dma_sync_sg_for_cpu); | ||
328 | |||
329 | void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems, | ||
330 | enum dma_data_direction direction) | ||
331 | { | ||
332 | int i; | ||
333 | |||
334 | BUG_ON(direction == DMA_NONE); | ||
335 | |||
336 | /* Make sure that gcc doesn't leave the empty loop body. */ | ||
337 | for (i = 0; i < nelems; i++, sg++) | ||
338 | __dma_sync((unsigned long)page_address(sg->page), | ||
339 | sg->length, direction); | ||
340 | } | ||
341 | |||
342 | EXPORT_SYMBOL(dma_sync_sg_for_device); | ||
343 | |||
344 | int dma_mapping_error(dma_addr_t dma_addr) | ||
345 | { | ||
346 | return 0; | ||
347 | } | ||
348 | |||
349 | EXPORT_SYMBOL(dma_mapping_error); | ||
350 | |||
351 | int dma_supported(struct device *dev, u64 mask) | ||
352 | { | ||
353 | /* | ||
354 | * we fall back to GFP_DMA when the mask isn't all 1s, | ||
355 | * so we can't guarantee allocations that must be | ||
356 | * within a tighter range than GFP_DMA.. | ||
357 | */ | ||
358 | if (mask < 0x00ffffff) | ||
359 | return 0; | ||
360 | |||
361 | return 1; | ||
362 | } | ||
363 | |||
364 | EXPORT_SYMBOL(dma_supported); | ||
365 | |||
366 | int dma_is_consistent(struct device *dev, dma_addr_t dma_addr) | ||
367 | { | ||
368 | return 1; | ||
369 | } | ||
370 | |||
371 | EXPORT_SYMBOL(dma_is_consistent); | ||
372 | |||
373 | void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | ||
374 | enum dma_data_direction direction) | ||
375 | { | ||
376 | if (direction == DMA_NONE) | ||
377 | return; | ||
378 | |||
379 | dma_cache_wback_inv((unsigned long)vaddr, size); | ||
380 | } | ||
381 | |||
382 | EXPORT_SYMBOL(dma_cache_sync); | ||
383 | |||
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 82b20c28bef8..bf85995ca042 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the PCI specific kernel interface routines under Linux. | 2 | # Makefile for the PCI specific kernel interface routines under Linux. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += pci.o | 5 | obj-y += pci.o pci-dac.o |
6 | 6 | ||
7 | # | 7 | # |
8 | # PCI bus host bridge specific code | 8 | # PCI bus host bridge specific code |
diff --git a/arch/mips/pci/pci-dac.c b/arch/mips/pci/pci-dac.c new file mode 100644 index 000000000000..0f0ea1b7d4dd --- /dev/null +++ b/arch/mips/pci/pci-dac.c | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2000 Ani Joshi <ajoshi@unixbox.com> | ||
7 | * Copyright (C) 2000, 2001, 06 Ralf Baechle <ralf@linux-mips.org> | ||
8 | * swiped from i386, and cloned for MIPS by Geert, polished by Ralf. | ||
9 | */ | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | #include <linux/dma-mapping.h> | ||
13 | #include <linux/mm.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/string.h> | ||
16 | |||
17 | #include <asm/cache.h> | ||
18 | #include <asm/io.h> | ||
19 | |||
20 | #include <dma-coherence.h> | ||
21 | |||
22 | #include <linux/pci.h> | ||
23 | |||
24 | dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, | ||
25 | struct page *page, unsigned long offset, int direction) | ||
26 | { | ||
27 | struct device *dev = &pdev->dev; | ||
28 | |||
29 | BUG_ON(direction == DMA_NONE); | ||
30 | |||
31 | if (!plat_device_is_coherent(dev)) { | ||
32 | unsigned long addr; | ||
33 | |||
34 | addr = (unsigned long) page_address(page) + offset; | ||
35 | dma_cache_wback_inv(addr, PAGE_SIZE); | ||
36 | } | ||
37 | |||
38 | return plat_map_dma_mem_page(dev, page) + offset; | ||
39 | } | ||
40 | |||
41 | EXPORT_SYMBOL(pci_dac_page_to_dma); | ||
42 | |||
43 | struct page *pci_dac_dma_to_page(struct pci_dev *pdev, | ||
44 | dma64_addr_t dma_addr) | ||
45 | { | ||
46 | return pfn_to_page(plat_dma_addr_to_phys(dma_addr) >> PAGE_SHIFT); | ||
47 | } | ||
48 | |||
49 | EXPORT_SYMBOL(pci_dac_dma_to_page); | ||
50 | |||
51 | unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, | ||
52 | dma64_addr_t dma_addr) | ||
53 | { | ||
54 | return dma_addr & ~PAGE_MASK; | ||
55 | } | ||
56 | |||
57 | EXPORT_SYMBOL(pci_dac_dma_to_offset); | ||
58 | |||
59 | void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, | ||
60 | dma64_addr_t dma_addr, size_t len, int direction) | ||
61 | { | ||
62 | BUG_ON(direction == PCI_DMA_NONE); | ||
63 | |||
64 | if (!plat_device_is_coherent(&pdev->dev)) | ||
65 | dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len); | ||
66 | } | ||
67 | |||
68 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_cpu); | ||
69 | |||
70 | void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, | ||
71 | dma64_addr_t dma_addr, size_t len, int direction) | ||
72 | { | ||
73 | BUG_ON(direction == PCI_DMA_NONE); | ||
74 | |||
75 | if (!plat_device_is_coherent(&pdev->dev)) | ||
76 | dma_cache_wback_inv(dma_addr + PAGE_OFFSET, len); | ||
77 | } | ||
78 | |||
79 | EXPORT_SYMBOL(pci_dac_dma_sync_single_for_device); | ||
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 0088c5ebca78..340d9beab6d1 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -876,7 +876,7 @@ config ARCH_SPARSEMEM_ENABLE | |||
876 | 876 | ||
877 | config ARCH_SPARSEMEM_DEFAULT | 877 | config ARCH_SPARSEMEM_DEFAULT |
878 | def_bool y | 878 | def_bool y |
879 | depends on (SMP && PPC_PSERIES) || PPC_CELL | 879 | depends on (SMP && PPC_PSERIES) || PPC_PS3 |
880 | 880 | ||
881 | config ARCH_POPULATES_NODE_MAP | 881 | config ARCH_POPULATES_NODE_MAP |
882 | def_bool y | 882 | def_bool y |
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts new file mode 100644 index 000000000000..096e94ac415f --- /dev/null +++ b/arch/powerpc/boot/dts/kuroboxHD.dts | |||
@@ -0,0 +1,148 @@ | |||
1 | /* | ||
2 | * Device Tree Souce for Buffalo KuroboxHD | ||
3 | * | ||
4 | * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use | ||
5 | * the default configuration linkstation_defconfig. | ||
6 | * | ||
7 | * Based on sandpoint.dts | ||
8 | * | ||
9 | * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de> | ||
10 | * | ||
11 | * This file is licensed under | ||
12 | * the terms of the GNU General Public License version 2. This program | ||
13 | * is licensed "as is" without any warranty of any kind, whether express | ||
14 | * or implied. | ||
15 | |||
16 | XXXX add flash parts, rtc, ?? | ||
17 | |||
18 | build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts" | ||
19 | |||
20 | |||
21 | */ | ||
22 | |||
23 | / { | ||
24 | linux,phandle = <1000>; | ||
25 | model = "KuroboxHD"; | ||
26 | compatible = "linkstation"; | ||
27 | #address-cells = <1>; | ||
28 | #size-cells = <1>; | ||
29 | |||
30 | cpus { | ||
31 | linux,phandle = <2000>; | ||
32 | #cpus = <1>; | ||
33 | #address-cells = <1>; | ||
34 | #size-cells = <0>; | ||
35 | |||
36 | PowerPC,603e { /* Really 8241 */ | ||
37 | linux,phandle = <2100>; | ||
38 | linux,boot-cpu; | ||
39 | device_type = "cpu"; | ||
40 | reg = <0>; | ||
41 | clock-frequency = <bebc200>; /* Fixed by bootwrapper */ | ||
42 | timebase-frequency = <1743000>; /* Fixed by bootwrapper */ | ||
43 | bus-frequency = <0>; /* From bootloader */ | ||
44 | /* Following required by dtc but not used */ | ||
45 | i-cache-line-size = <0>; | ||
46 | d-cache-line-size = <0>; | ||
47 | i-cache-size = <4000>; | ||
48 | d-cache-size = <4000>; | ||
49 | }; | ||
50 | }; | ||
51 | |||
52 | memory { | ||
53 | linux,phandle = <3000>; | ||
54 | device_type = "memory"; | ||
55 | reg = <00000000 04000000>; | ||
56 | }; | ||
57 | |||
58 | soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */ | ||
59 | linux,phandle = <4000>; | ||
60 | #address-cells = <1>; | ||
61 | #size-cells = <1>; | ||
62 | #interrupt-cells = <2>; | ||
63 | device_type = "soc"; | ||
64 | compatible = "mpc10x"; | ||
65 | store-gathering = <0>; /* 0 == off, !0 == on */ | ||
66 | reg = <80000000 00100000>; | ||
67 | ranges = <80000000 80000000 70000000 /* pci mem space */ | ||
68 | fc000000 fc000000 00100000 /* EUMB */ | ||
69 | fe000000 fe000000 00c00000 /* pci i/o space */ | ||
70 | fec00000 fec00000 00300000 /* pci cfg regs */ | ||
71 | fef00000 fef00000 00100000>; /* pci iack */ | ||
72 | |||
73 | i2c@80003000 { | ||
74 | linux,phandle = <4300>; | ||
75 | device_type = "i2c"; | ||
76 | compatible = "fsl-i2c"; | ||
77 | reg = <80003000 1000>; | ||
78 | interrupts = <5 2>; | ||
79 | interrupt-parent = <4400>; | ||
80 | }; | ||
81 | |||
82 | serial@80004500 { | ||
83 | linux,phandle = <4511>; | ||
84 | device_type = "serial"; | ||
85 | compatible = "ns16550"; | ||
86 | reg = <80004500 8>; | ||
87 | clock-frequency = <5d08d88>; | ||
88 | current-speed = <2580>; | ||
89 | interrupts = <9 2>; | ||
90 | interrupt-parent = <4400>; | ||
91 | }; | ||
92 | |||
93 | serial@80004600 { | ||
94 | linux,phandle = <4512>; | ||
95 | device_type = "serial"; | ||
96 | compatible = "ns16550"; | ||
97 | reg = <80004600 8>; | ||
98 | clock-frequency = <5d08d88>; | ||
99 | current-speed = <e100>; | ||
100 | interrupts = <a 0>; | ||
101 | interrupt-parent = <4400>; | ||
102 | }; | ||
103 | |||
104 | pic@80040000 { | ||
105 | linux,phandle = <4400>; | ||
106 | #interrupt-cells = <2>; | ||
107 | #address-cells = <0>; | ||
108 | device_type = "open-pic"; | ||
109 | compatible = "chrp,open-pic"; | ||
110 | interrupt-controller; | ||
111 | reg = <80040000 40000>; | ||
112 | built-in; | ||
113 | }; | ||
114 | |||
115 | pci@fec00000 { | ||
116 | linux,phandle = <4500>; | ||
117 | #address-cells = <3>; | ||
118 | #size-cells = <2>; | ||
119 | #interrupt-cells = <1>; | ||
120 | device_type = "pci"; | ||
121 | compatible = "mpc10x-pci"; | ||
122 | reg = <fec00000 400000>; | ||
123 | ranges = <01000000 0 0 fe000000 0 00c00000 | ||
124 | 02000000 0 80000000 80000000 0 70000000>; | ||
125 | bus-range = <0 ff>; | ||
126 | clock-frequency = <7f28155>; | ||
127 | interrupt-parent = <4400>; | ||
128 | interrupt-map-mask = <f800 0 0 7>; | ||
129 | interrupt-map = < | ||
130 | /* IDSEL 0x11 - IRQ0 ETH */ | ||
131 | 5800 0 0 1 4400 0 1 | ||
132 | 5800 0 0 2 4400 1 1 | ||
133 | 5800 0 0 3 4400 2 1 | ||
134 | 5800 0 0 4 4400 3 1 | ||
135 | /* IDSEL 0x12 - IRQ1 IDE0 */ | ||
136 | 6000 0 0 1 4400 1 1 | ||
137 | 6000 0 0 2 4400 2 1 | ||
138 | 6000 0 0 3 4400 3 1 | ||
139 | 6000 0 0 4 4400 0 1 | ||
140 | /* IDSEL 0x14 - IRQ3 USB2.0 */ | ||
141 | 7000 0 0 1 4400 3 1 | ||
142 | 7000 0 0 2 4400 3 1 | ||
143 | 7000 0 0 3 4400 3 1 | ||
144 | 7000 0 0 4 4400 3 1 | ||
145 | >; | ||
146 | }; | ||
147 | }; | ||
148 | }; | ||
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index 186870704ad9..c03103c63285 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Lite5200 board Device Tree Source | 2 | * Lite5200 board Device Tree Source |
3 | * | 3 | * |
4 | * Copyright 2006 Secret Lab Technologies Ltd. | 4 | * Copyright 2006-2007 Secret Lab Technologies Ltd. |
5 | * Grant Likely <grant.likely@secretlab.ca> | 5 | * Grant Likely <grant.likely@secretlab.ca> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -17,8 +17,9 @@ | |||
17 | */ | 17 | */ |
18 | 18 | ||
19 | / { | 19 | / { |
20 | model = "Lite5200"; | 20 | model = "fsl,lite5200"; |
21 | compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx"; | 21 | // revision = "1.0"; |
22 | compatible = "fsl,lite5200\0generic-mpc5200"; | ||
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
23 | #size-cells = <1>; | 24 | #size-cells = <1>; |
24 | 25 | ||
@@ -47,14 +48,17 @@ | |||
47 | }; | 48 | }; |
48 | 49 | ||
49 | soc5200@f0000000 { | 50 | soc5200@f0000000 { |
51 | model = "fsl,mpc5200"; | ||
52 | revision = "" // from bootloader | ||
50 | #interrupt-cells = <3>; | 53 | #interrupt-cells = <3>; |
51 | device_type = "soc"; | 54 | device_type = "soc"; |
52 | ranges = <0 f0000000 f0010000>; | 55 | ranges = <0 f0000000 f0010000>; |
53 | reg = <f0000000 00010000>; | 56 | reg = <f0000000 00010000>; |
54 | bus-frequency = <0>; // from bootloader | 57 | bus-frequency = <0>; // from bootloader |
58 | system-frequency = <0>; // from bootloader | ||
55 | 59 | ||
56 | cdm@200 { | 60 | cdm@200 { |
57 | compatible = "mpc5200-cdm\0mpc52xx-cdm"; | 61 | compatible = "mpc5200-cdm"; |
58 | reg = <200 38>; | 62 | reg = <200 38>; |
59 | }; | 63 | }; |
60 | 64 | ||
@@ -64,77 +68,86 @@ | |||
64 | interrupt-controller; | 68 | interrupt-controller; |
65 | #interrupt-cells = <3>; | 69 | #interrupt-cells = <3>; |
66 | device_type = "interrupt-controller"; | 70 | device_type = "interrupt-controller"; |
67 | compatible = "mpc5200-pic\0mpc52xx-pic"; | 71 | compatible = "mpc5200-pic"; |
68 | reg = <500 80>; | 72 | reg = <500 80>; |
69 | built-in; | 73 | built-in; |
70 | }; | 74 | }; |
71 | 75 | ||
72 | gpt@600 { // General Purpose Timer | 76 | gpt@600 { // General Purpose Timer |
73 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 77 | compatible = "mpc5200-gpt"; |
74 | device_type = "gpt"; | 78 | device_type = "gpt"; |
79 | cell-index = <0>; | ||
75 | reg = <600 10>; | 80 | reg = <600 10>; |
76 | interrupts = <1 9 0>; | 81 | interrupts = <1 9 0>; |
77 | interrupt-parent = <500>; | 82 | interrupt-parent = <500>; |
83 | has-wdt; | ||
78 | }; | 84 | }; |
79 | 85 | ||
80 | gpt@610 { // General Purpose Timer | 86 | gpt@610 { // General Purpose Timer |
81 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 87 | compatible = "mpc5200-gpt"; |
82 | device_type = "gpt"; | 88 | device_type = "gpt"; |
89 | cell-index = <1>; | ||
83 | reg = <610 10>; | 90 | reg = <610 10>; |
84 | interrupts = <1 a 0>; | 91 | interrupts = <1 a 0>; |
85 | interrupt-parent = <500>; | 92 | interrupt-parent = <500>; |
86 | }; | 93 | }; |
87 | 94 | ||
88 | gpt@620 { // General Purpose Timer | 95 | gpt@620 { // General Purpose Timer |
89 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 96 | compatible = "mpc5200-gpt"; |
90 | device_type = "gpt"; | 97 | device_type = "gpt"; |
98 | cell-index = <2>; | ||
91 | reg = <620 10>; | 99 | reg = <620 10>; |
92 | interrupts = <1 b 0>; | 100 | interrupts = <1 b 0>; |
93 | interrupt-parent = <500>; | 101 | interrupt-parent = <500>; |
94 | }; | 102 | }; |
95 | 103 | ||
96 | gpt@630 { // General Purpose Timer | 104 | gpt@630 { // General Purpose Timer |
97 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 105 | compatible = "mpc5200-gpt"; |
98 | device_type = "gpt"; | 106 | device_type = "gpt"; |
107 | cell-index = <3>; | ||
99 | reg = <630 10>; | 108 | reg = <630 10>; |
100 | interrupts = <1 c 0>; | 109 | interrupts = <1 c 0>; |
101 | interrupt-parent = <500>; | 110 | interrupt-parent = <500>; |
102 | }; | 111 | }; |
103 | 112 | ||
104 | gpt@640 { // General Purpose Timer | 113 | gpt@640 { // General Purpose Timer |
105 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 114 | compatible = "mpc5200-gpt"; |
106 | device_type = "gpt"; | 115 | device_type = "gpt"; |
116 | cell-index = <4>; | ||
107 | reg = <640 10>; | 117 | reg = <640 10>; |
108 | interrupts = <1 d 0>; | 118 | interrupts = <1 d 0>; |
109 | interrupt-parent = <500>; | 119 | interrupt-parent = <500>; |
110 | }; | 120 | }; |
111 | 121 | ||
112 | gpt@650 { // General Purpose Timer | 122 | gpt@650 { // General Purpose Timer |
113 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 123 | compatible = "mpc5200-gpt"; |
114 | device_type = "gpt"; | 124 | device_type = "gpt"; |
125 | cell-index = <5>; | ||
115 | reg = <650 10>; | 126 | reg = <650 10>; |
116 | interrupts = <1 e 0>; | 127 | interrupts = <1 e 0>; |
117 | interrupt-parent = <500>; | 128 | interrupt-parent = <500>; |
118 | }; | 129 | }; |
119 | 130 | ||
120 | gpt@660 { // General Purpose Timer | 131 | gpt@660 { // General Purpose Timer |
121 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 132 | compatible = "mpc5200-gpt"; |
122 | device_type = "gpt"; | 133 | device_type = "gpt"; |
134 | cell-index = <6>; | ||
123 | reg = <660 10>; | 135 | reg = <660 10>; |
124 | interrupts = <1 f 0>; | 136 | interrupts = <1 f 0>; |
125 | interrupt-parent = <500>; | 137 | interrupt-parent = <500>; |
126 | }; | 138 | }; |
127 | 139 | ||
128 | gpt@670 { // General Purpose Timer | 140 | gpt@670 { // General Purpose Timer |
129 | compatible = "mpc5200-gpt\0mpc52xx-gpt"; | 141 | compatible = "mpc5200-gpt"; |
130 | device_type = "gpt"; | 142 | device_type = "gpt"; |
143 | cell-index = <7>; | ||
131 | reg = <670 10>; | 144 | reg = <670 10>; |
132 | interrupts = <1 10 0>; | 145 | interrupts = <1 10 0>; |
133 | interrupt-parent = <500>; | 146 | interrupt-parent = <500>; |
134 | }; | 147 | }; |
135 | 148 | ||
136 | rtc@800 { // Real time clock | 149 | rtc@800 { // Real time clock |
137 | compatible = "mpc5200-rtc\0mpc52xx-rtc"; | 150 | compatible = "mpc5200-rtc"; |
138 | device_type = "rtc"; | 151 | device_type = "rtc"; |
139 | reg = <800 100>; | 152 | reg = <800 100>; |
140 | interrupts = <1 5 0 1 6 0>; | 153 | interrupts = <1 5 0 1 6 0>; |
@@ -143,7 +156,8 @@ | |||
143 | 156 | ||
144 | mscan@900 { | 157 | mscan@900 { |
145 | device_type = "mscan"; | 158 | device_type = "mscan"; |
146 | compatible = "mpc5200-mscan\0mpc52xx-mscan"; | 159 | compatible = "mpc5200-mscan"; |
160 | cell-index = <0>; | ||
147 | interrupts = <2 11 0>; | 161 | interrupts = <2 11 0>; |
148 | interrupt-parent = <500>; | 162 | interrupt-parent = <500>; |
149 | reg = <900 80>; | 163 | reg = <900 80>; |
@@ -151,21 +165,22 @@ | |||
151 | 165 | ||
152 | mscan@980 { | 166 | mscan@980 { |
153 | device_type = "mscan"; | 167 | device_type = "mscan"; |
154 | compatible = "mpc5200-mscan\0mpc52xx-mscan"; | 168 | compatible = "mpc5200-mscan"; |
169 | cell-index = <1>; | ||
155 | interrupts = <1 12 0>; | 170 | interrupts = <1 12 0>; |
156 | interrupt-parent = <500>; | 171 | interrupt-parent = <500>; |
157 | reg = <980 80>; | 172 | reg = <980 80>; |
158 | }; | 173 | }; |
159 | 174 | ||
160 | gpio@b00 { | 175 | gpio@b00 { |
161 | compatible = "mpc5200-gpio\0mpc52xx-gpio"; | 176 | compatible = "mpc5200-gpio"; |
162 | reg = <b00 40>; | 177 | reg = <b00 40>; |
163 | interrupts = <1 7 0>; | 178 | interrupts = <1 7 0>; |
164 | interrupt-parent = <500>; | 179 | interrupt-parent = <500>; |
165 | }; | 180 | }; |
166 | 181 | ||
167 | gpio-wkup@b00 { | 182 | gpio-wkup@b00 { |
168 | compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup"; | 183 | compatible = "mpc5200-gpio-wkup"; |
169 | reg = <c00 40>; | 184 | reg = <c00 40>; |
170 | interrupts = <1 8 0 0 3 0>; | 185 | interrupts = <1 8 0 0 3 0>; |
171 | interrupt-parent = <500>; | 186 | interrupt-parent = <500>; |
@@ -176,7 +191,7 @@ | |||
176 | #size-cells = <2>; | 191 | #size-cells = <2>; |
177 | #address-cells = <3>; | 192 | #address-cells = <3>; |
178 | device_type = "pci"; | 193 | device_type = "pci"; |
179 | compatible = "mpc5200-pci\0mpc52xx-pci"; | 194 | compatible = "mpc5200-pci"; |
180 | reg = <d00 100>; | 195 | reg = <d00 100>; |
181 | interrupt-map-mask = <f800 0 0 7>; | 196 | interrupt-map-mask = <f800 0 0 7>; |
182 | interrupt-map = <c000 0 0 1 500 0 0 3 | 197 | interrupt-map = <c000 0 0 1 500 0 0 3 |
@@ -194,7 +209,7 @@ | |||
194 | 209 | ||
195 | spi@f00 { | 210 | spi@f00 { |
196 | device_type = "spi"; | 211 | device_type = "spi"; |
197 | compatible = "mpc5200-spi\0mpc52xx-spi"; | 212 | compatible = "mpc5200-spi"; |
198 | reg = <f00 20>; | 213 | reg = <f00 20>; |
199 | interrupts = <2 d 0 2 e 0>; | 214 | interrupts = <2 d 0 2 e 0>; |
200 | interrupt-parent = <500>; | 215 | interrupt-parent = <500>; |
@@ -202,7 +217,7 @@ | |||
202 | 217 | ||
203 | usb@1000 { | 218 | usb@1000 { |
204 | device_type = "usb-ohci-be"; | 219 | device_type = "usb-ohci-be"; |
205 | compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be"; | 220 | compatible = "mpc5200-ohci\0ohci-be"; |
206 | reg = <1000 ff>; | 221 | reg = <1000 ff>; |
207 | interrupts = <2 6 0>; | 222 | interrupts = <2 6 0>; |
208 | interrupt-parent = <500>; | 223 | interrupt-parent = <500>; |
@@ -210,7 +225,7 @@ | |||
210 | 225 | ||
211 | bestcomm@1200 { | 226 | bestcomm@1200 { |
212 | device_type = "dma-controller"; | 227 | device_type = "dma-controller"; |
213 | compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm"; | 228 | compatible = "mpc5200-bestcomm"; |
214 | reg = <1200 80>; | 229 | reg = <1200 80>; |
215 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | 230 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 |
216 | 3 4 0 3 5 0 3 6 0 3 7 0 | 231 | 3 4 0 3 5 0 3 6 0 3 7 0 |
@@ -220,67 +235,73 @@ | |||
220 | }; | 235 | }; |
221 | 236 | ||
222 | xlb@1f00 { | 237 | xlb@1f00 { |
223 | compatible = "mpc5200-xlb\0mpc52xx-xlb"; | 238 | compatible = "mpc5200-xlb"; |
224 | reg = <1f00 100>; | 239 | reg = <1f00 100>; |
225 | }; | 240 | }; |
226 | 241 | ||
227 | serial@2000 { // PSC1 | 242 | serial@2000 { // PSC1 |
228 | device_type = "serial"; | 243 | device_type = "serial"; |
229 | compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; | 244 | compatible = "mpc5200-psc-uart"; |
230 | port-number = <0>; // Logical port assignment | 245 | port-number = <0>; // Logical port assignment |
246 | cell-index = <0>; | ||
231 | reg = <2000 100>; | 247 | reg = <2000 100>; |
232 | interrupts = <2 1 0>; | 248 | interrupts = <2 1 0>; |
233 | interrupt-parent = <500>; | 249 | interrupt-parent = <500>; |
234 | }; | 250 | }; |
235 | 251 | ||
236 | // PSC2 in spi mode example | 252 | // PSC2 in ac97 mode example |
237 | spi@2200 { // PSC2 | 253 | //ac97@2200 { // PSC2 |
238 | device_type = "spi"; | 254 | // device_type = "sound"; |
239 | compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi"; | 255 | // compatible = "mpc5200-psc-ac97"; |
240 | reg = <2200 100>; | 256 | // cell-index = <1>; |
241 | interrupts = <2 2 0>; | 257 | // reg = <2200 100>; |
242 | interrupt-parent = <500>; | 258 | // interrupts = <2 2 0>; |
243 | }; | 259 | // interrupt-parent = <500>; |
260 | //}; | ||
244 | 261 | ||
245 | // PSC3 in CODEC mode example | 262 | // PSC3 in CODEC mode example |
246 | i2s@2400 { // PSC3 | 263 | //i2s@2400 { // PSC3 |
247 | device_type = "sound"; | 264 | // device_type = "sound"; |
248 | compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s"; | 265 | // compatible = "mpc5200-psc-i2s"; |
249 | reg = <2400 100>; | 266 | // cell-index = <2>; |
250 | interrupts = <2 3 0>; | 267 | // reg = <2400 100>; |
251 | interrupt-parent = <500>; | 268 | // interrupts = <2 3 0>; |
252 | }; | 269 | // interrupt-parent = <500>; |
270 | //}; | ||
253 | 271 | ||
254 | // PSC4 unconfigured | 272 | // PSC4 in uart mode example |
255 | //serial@2600 { // PSC4 | 273 | //serial@2600 { // PSC4 |
256 | // device_type = "serial"; | 274 | // device_type = "serial"; |
257 | // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; | 275 | // compatible = "mpc5200-psc-uart"; |
276 | // cell-index = <3>; | ||
258 | // reg = <2600 100>; | 277 | // reg = <2600 100>; |
259 | // interrupts = <2 b 0>; | 278 | // interrupts = <2 b 0>; |
260 | // interrupt-parent = <500>; | 279 | // interrupt-parent = <500>; |
261 | //}; | 280 | //}; |
262 | 281 | ||
263 | // PSC5 unconfigured | 282 | // PSC5 in uart mode example |
264 | //serial@2800 { // PSC5 | 283 | //serial@2800 { // PSC5 |
265 | // device_type = "serial"; | 284 | // device_type = "serial"; |
266 | // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; | 285 | // compatible = "mpc5200-psc-uart"; |
286 | // cell-index = <4>; | ||
267 | // reg = <2800 100>; | 287 | // reg = <2800 100>; |
268 | // interrupts = <2 c 0>; | 288 | // interrupts = <2 c 0>; |
269 | // interrupt-parent = <500>; | 289 | // interrupt-parent = <500>; |
270 | //}; | 290 | //}; |
271 | 291 | ||
272 | // PSC6 in AC97 mode example | 292 | // PSC6 in spi mode example |
273 | ac97@2c00 { // PSC6 | 293 | //spi@2c00 { // PSC6 |
274 | device_type = "sound"; | 294 | // device_type = "spi"; |
275 | compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97"; | 295 | // compatible = "mpc5200-psc-spi"; |
276 | reg = <2c00 100>; | 296 | // cell-index = <5>; |
277 | interrupts = <2 4 0>; | 297 | // reg = <2c00 100>; |
278 | interrupt-parent = <500>; | 298 | // interrupts = <2 4 0>; |
279 | }; | 299 | // interrupt-parent = <500>; |
300 | //}; | ||
280 | 301 | ||
281 | ethernet@3000 { | 302 | ethernet@3000 { |
282 | device_type = "network"; | 303 | device_type = "network"; |
283 | compatible = "mpc5200-fec\0mpc52xx-fec"; | 304 | compatible = "mpc5200-fec"; |
284 | reg = <3000 800>; | 305 | reg = <3000 800>; |
285 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! | 306 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! |
286 | interrupts = <2 5 0>; | 307 | interrupts = <2 5 0>; |
@@ -289,7 +310,7 @@ | |||
289 | 310 | ||
290 | ata@3a00 { | 311 | ata@3a00 { |
291 | device_type = "ata"; | 312 | device_type = "ata"; |
292 | compatible = "mpc5200-ata\0mpc52xx-ata"; | 313 | compatible = "mpc5200-ata"; |
293 | reg = <3a00 100>; | 314 | reg = <3a00 100>; |
294 | interrupts = <2 7 0>; | 315 | interrupts = <2 7 0>; |
295 | interrupt-parent = <500>; | 316 | interrupt-parent = <500>; |
@@ -297,7 +318,8 @@ | |||
297 | 318 | ||
298 | i2c@3d00 { | 319 | i2c@3d00 { |
299 | device_type = "i2c"; | 320 | device_type = "i2c"; |
300 | compatible = "mpc5200-i2c\0mpc52xx-i2c"; | 321 | compatible = "mpc5200-i2c"; |
322 | cell-index = <0>; | ||
301 | reg = <3d00 40>; | 323 | reg = <3d00 40>; |
302 | interrupts = <2 f 0>; | 324 | interrupts = <2 f 0>; |
303 | interrupt-parent = <500>; | 325 | interrupt-parent = <500>; |
@@ -305,14 +327,15 @@ | |||
305 | 327 | ||
306 | i2c@3d40 { | 328 | i2c@3d40 { |
307 | device_type = "i2c"; | 329 | device_type = "i2c"; |
308 | compatible = "mpc5200-i2c\0mpc52xx-i2c"; | 330 | compatible = "mpc5200-i2c"; |
331 | cell-index = <1>; | ||
309 | reg = <3d40 40>; | 332 | reg = <3d40 40>; |
310 | interrupts = <2 10 0>; | 333 | interrupts = <2 10 0>; |
311 | interrupt-parent = <500>; | 334 | interrupt-parent = <500>; |
312 | }; | 335 | }; |
313 | sram@8000 { | 336 | sram@8000 { |
314 | device_type = "sram"; | 337 | device_type = "sram"; |
315 | compatible = "mpc5200-sram\0mpc52xx-sram\0sram"; | 338 | compatible = "mpc5200-sram\0sram"; |
316 | reg = <8000 4000>; | 339 | reg = <8000 4000>; |
317 | }; | 340 | }; |
318 | }; | 341 | }; |
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 5bb2760d7c30..3875ca9a9a62 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Lite5200B board Device Tree Source | 2 | * Lite5200B board Device Tree Source |
3 | * | 3 | * |
4 | * Copyright 2006 Secret Lab Technologies Ltd. | 4 | * Copyright 2006-2007 Secret Lab Technologies Ltd. |
5 | * Grant Likely <grant.likely@secretlab.ca> | 5 | * Grant Likely <grant.likely@secretlab.ca> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -17,8 +17,9 @@ | |||
17 | */ | 17 | */ |
18 | 18 | ||
19 | / { | 19 | / { |
20 | model = "Lite5200b"; | 20 | model = "fsl,lite5200b"; |
21 | compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx"; | 21 | // revision = "1.0"; |
22 | compatible = "fsl,lite5200b\0generic-mpc5200"; | ||
22 | #address-cells = <1>; | 23 | #address-cells = <1>; |
23 | #size-cells = <1>; | 24 | #size-cells = <1>; |
24 | 25 | ||
@@ -47,14 +48,17 @@ | |||
47 | }; | 48 | }; |
48 | 49 | ||
49 | soc5200@f0000000 { | 50 | soc5200@f0000000 { |
51 | model = "fsl,mpc5200b"; | ||
52 | revision = ""; // from bootloader | ||
50 | #interrupt-cells = <3>; | 53 | #interrupt-cells = <3>; |
51 | device_type = "soc"; | 54 | device_type = "soc"; |
52 | ranges = <0 f0000000 f0010000>; | 55 | ranges = <0 f0000000 f0010000>; |
53 | reg = <f0000000 00010000>; | 56 | reg = <f0000000 00010000>; |
54 | bus-frequency = <0>; // from bootloader | 57 | bus-frequency = <0>; // from bootloader |
58 | system-frequency = <0>; // from bootloader | ||
55 | 59 | ||
56 | cdm@200 { | 60 | cdm@200 { |
57 | compatible = "mpc5200b-cdm\0mpc52xx-cdm"; | 61 | compatible = "mpc5200b-cdm\0mpc5200-cdm"; |
58 | reg = <200 38>; | 62 | reg = <200 38>; |
59 | }; | 63 | }; |
60 | 64 | ||
@@ -64,77 +68,86 @@ | |||
64 | interrupt-controller; | 68 | interrupt-controller; |
65 | #interrupt-cells = <3>; | 69 | #interrupt-cells = <3>; |
66 | device_type = "interrupt-controller"; | 70 | device_type = "interrupt-controller"; |
67 | compatible = "mpc5200b-pic\0mpc52xx-pic"; | 71 | compatible = "mpc5200b-pic\0mpc5200-pic"; |
68 | reg = <500 80>; | 72 | reg = <500 80>; |
69 | built-in; | 73 | built-in; |
70 | }; | 74 | }; |
71 | 75 | ||
72 | gpt@600 { // General Purpose Timer | 76 | gpt@600 { // General Purpose Timer |
73 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 77 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
74 | device_type = "gpt"; | 78 | device_type = "gpt"; |
79 | cell-index = <0>; | ||
75 | reg = <600 10>; | 80 | reg = <600 10>; |
76 | interrupts = <1 9 0>; | 81 | interrupts = <1 9 0>; |
77 | interrupt-parent = <500>; | 82 | interrupt-parent = <500>; |
83 | has-wdt; | ||
78 | }; | 84 | }; |
79 | 85 | ||
80 | gpt@610 { // General Purpose Timer | 86 | gpt@610 { // General Purpose Timer |
81 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 87 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
82 | device_type = "gpt"; | 88 | device_type = "gpt"; |
89 | cell-index = <1>; | ||
83 | reg = <610 10>; | 90 | reg = <610 10>; |
84 | interrupts = <1 a 0>; | 91 | interrupts = <1 a 0>; |
85 | interrupt-parent = <500>; | 92 | interrupt-parent = <500>; |
86 | }; | 93 | }; |
87 | 94 | ||
88 | gpt@620 { // General Purpose Timer | 95 | gpt@620 { // General Purpose Timer |
89 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 96 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
90 | device_type = "gpt"; | 97 | device_type = "gpt"; |
98 | cell-index = <2>; | ||
91 | reg = <620 10>; | 99 | reg = <620 10>; |
92 | interrupts = <1 b 0>; | 100 | interrupts = <1 b 0>; |
93 | interrupt-parent = <500>; | 101 | interrupt-parent = <500>; |
94 | }; | 102 | }; |
95 | 103 | ||
96 | gpt@630 { // General Purpose Timer | 104 | gpt@630 { // General Purpose Timer |
97 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 105 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
98 | device_type = "gpt"; | 106 | device_type = "gpt"; |
107 | cell-index = <3>; | ||
99 | reg = <630 10>; | 108 | reg = <630 10>; |
100 | interrupts = <1 c 0>; | 109 | interrupts = <1 c 0>; |
101 | interrupt-parent = <500>; | 110 | interrupt-parent = <500>; |
102 | }; | 111 | }; |
103 | 112 | ||
104 | gpt@640 { // General Purpose Timer | 113 | gpt@640 { // General Purpose Timer |
105 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 114 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
106 | device_type = "gpt"; | 115 | device_type = "gpt"; |
116 | cell-index = <4>; | ||
107 | reg = <640 10>; | 117 | reg = <640 10>; |
108 | interrupts = <1 d 0>; | 118 | interrupts = <1 d 0>; |
109 | interrupt-parent = <500>; | 119 | interrupt-parent = <500>; |
110 | }; | 120 | }; |
111 | 121 | ||
112 | gpt@650 { // General Purpose Timer | 122 | gpt@650 { // General Purpose Timer |
113 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 123 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
114 | device_type = "gpt"; | 124 | device_type = "gpt"; |
125 | cell-index = <5>; | ||
115 | reg = <650 10>; | 126 | reg = <650 10>; |
116 | interrupts = <1 e 0>; | 127 | interrupts = <1 e 0>; |
117 | interrupt-parent = <500>; | 128 | interrupt-parent = <500>; |
118 | }; | 129 | }; |
119 | 130 | ||
120 | gpt@660 { // General Purpose Timer | 131 | gpt@660 { // General Purpose Timer |
121 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 132 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
122 | device_type = "gpt"; | 133 | device_type = "gpt"; |
134 | cell-index = <6>; | ||
123 | reg = <660 10>; | 135 | reg = <660 10>; |
124 | interrupts = <1 f 0>; | 136 | interrupts = <1 f 0>; |
125 | interrupt-parent = <500>; | 137 | interrupt-parent = <500>; |
126 | }; | 138 | }; |
127 | 139 | ||
128 | gpt@670 { // General Purpose Timer | 140 | gpt@670 { // General Purpose Timer |
129 | compatible = "mpc5200b-gpt\0mpc52xx-gpt"; | 141 | compatible = "mpc5200b-gpt\0mpc5200-gpt"; |
130 | device_type = "gpt"; | 142 | device_type = "gpt"; |
143 | cell-index = <7>; | ||
131 | reg = <670 10>; | 144 | reg = <670 10>; |
132 | interrupts = <1 10 0>; | 145 | interrupts = <1 10 0>; |
133 | interrupt-parent = <500>; | 146 | interrupt-parent = <500>; |
134 | }; | 147 | }; |
135 | 148 | ||
136 | rtc@800 { // Real time clock | 149 | rtc@800 { // Real time clock |
137 | compatible = "mpc5200b-rtc\0mpc52xx-rtc"; | 150 | compatible = "mpc5200b-rtc\0mpc5200-rtc"; |
138 | device_type = "rtc"; | 151 | device_type = "rtc"; |
139 | reg = <800 100>; | 152 | reg = <800 100>; |
140 | interrupts = <1 5 0 1 6 0>; | 153 | interrupts = <1 5 0 1 6 0>; |
@@ -143,7 +156,8 @@ | |||
143 | 156 | ||
144 | mscan@900 { | 157 | mscan@900 { |
145 | device_type = "mscan"; | 158 | device_type = "mscan"; |
146 | compatible = "mpc5200b-mscan\0mpc52xx-mscan"; | 159 | compatible = "mpc5200b-mscan\0mpc5200-mscan"; |
160 | cell-index = <0>; | ||
147 | interrupts = <2 11 0>; | 161 | interrupts = <2 11 0>; |
148 | interrupt-parent = <500>; | 162 | interrupt-parent = <500>; |
149 | reg = <900 80>; | 163 | reg = <900 80>; |
@@ -151,21 +165,22 @@ | |||
151 | 165 | ||
152 | mscan@980 { | 166 | mscan@980 { |
153 | device_type = "mscan"; | 167 | device_type = "mscan"; |
154 | compatible = "mpc5200b-mscan\0mpc52xx-mscan"; | 168 | compatible = "mpc5200b-mscan\0mpc5200-mscan"; |
169 | cell-index = <1>; | ||
155 | interrupts = <1 12 0>; | 170 | interrupts = <1 12 0>; |
156 | interrupt-parent = <500>; | 171 | interrupt-parent = <500>; |
157 | reg = <980 80>; | 172 | reg = <980 80>; |
158 | }; | 173 | }; |
159 | 174 | ||
160 | gpio@b00 { | 175 | gpio@b00 { |
161 | compatible = "mpc5200b-gpio\0mpc52xx-gpio"; | 176 | compatible = "mpc5200b-gpio\0mpc5200-gpio"; |
162 | reg = <b00 40>; | 177 | reg = <b00 40>; |
163 | interrupts = <1 7 0>; | 178 | interrupts = <1 7 0>; |
164 | interrupt-parent = <500>; | 179 | interrupt-parent = <500>; |
165 | }; | 180 | }; |
166 | 181 | ||
167 | gpio-wkup@b00 { | 182 | gpio-wkup@b00 { |
168 | compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup"; | 183 | compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup"; |
169 | reg = <c00 40>; | 184 | reg = <c00 40>; |
170 | interrupts = <1 8 0 0 3 0>; | 185 | interrupts = <1 8 0 0 3 0>; |
171 | interrupt-parent = <500>; | 186 | interrupt-parent = <500>; |
@@ -176,7 +191,7 @@ | |||
176 | #size-cells = <2>; | 191 | #size-cells = <2>; |
177 | #address-cells = <3>; | 192 | #address-cells = <3>; |
178 | device_type = "pci"; | 193 | device_type = "pci"; |
179 | compatible = "mpc5200b-pci\0mpc52xx-pci"; | 194 | compatible = "mpc5200b-pci\0mpc5200-pci"; |
180 | reg = <d00 100>; | 195 | reg = <d00 100>; |
181 | interrupt-map-mask = <f800 0 0 7>; | 196 | interrupt-map-mask = <f800 0 0 7>; |
182 | interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot | 197 | interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot |
@@ -199,7 +214,7 @@ | |||
199 | 214 | ||
200 | spi@f00 { | 215 | spi@f00 { |
201 | device_type = "spi"; | 216 | device_type = "spi"; |
202 | compatible = "mpc5200b-spi\0mpc52xx-spi"; | 217 | compatible = "mpc5200b-spi\0mpc5200-spi"; |
203 | reg = <f00 20>; | 218 | reg = <f00 20>; |
204 | interrupts = <2 d 0 2 e 0>; | 219 | interrupts = <2 d 0 2 e 0>; |
205 | interrupt-parent = <500>; | 220 | interrupt-parent = <500>; |
@@ -207,7 +222,7 @@ | |||
207 | 222 | ||
208 | usb@1000 { | 223 | usb@1000 { |
209 | device_type = "usb-ohci-be"; | 224 | device_type = "usb-ohci-be"; |
210 | compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be"; | 225 | compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be"; |
211 | reg = <1000 ff>; | 226 | reg = <1000 ff>; |
212 | interrupts = <2 6 0>; | 227 | interrupts = <2 6 0>; |
213 | interrupt-parent = <500>; | 228 | interrupt-parent = <500>; |
@@ -215,7 +230,7 @@ | |||
215 | 230 | ||
216 | bestcomm@1200 { | 231 | bestcomm@1200 { |
217 | device_type = "dma-controller"; | 232 | device_type = "dma-controller"; |
218 | compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm"; | 233 | compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm"; |
219 | reg = <1200 80>; | 234 | reg = <1200 80>; |
220 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 | 235 | interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 |
221 | 3 4 0 3 5 0 3 6 0 3 7 0 | 236 | 3 4 0 3 5 0 3 6 0 3 7 0 |
@@ -225,67 +240,73 @@ | |||
225 | }; | 240 | }; |
226 | 241 | ||
227 | xlb@1f00 { | 242 | xlb@1f00 { |
228 | compatible = "mpc5200b-xlb\0mpc52xx-xlb"; | 243 | compatible = "mpc5200b-xlb\0mpc5200-xlb"; |
229 | reg = <1f00 100>; | 244 | reg = <1f00 100>; |
230 | }; | 245 | }; |
231 | 246 | ||
232 | serial@2000 { // PSC1 | 247 | serial@2000 { // PSC1 |
233 | device_type = "serial"; | 248 | device_type = "serial"; |
234 | compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; | 249 | compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; |
235 | port-number = <0>; // Logical port assignment | 250 | port-number = <0>; // Logical port assignment |
251 | cell-index = <0>; | ||
236 | reg = <2000 100>; | 252 | reg = <2000 100>; |
237 | interrupts = <2 1 0>; | 253 | interrupts = <2 1 0>; |
238 | interrupt-parent = <500>; | 254 | interrupt-parent = <500>; |
239 | }; | 255 | }; |
240 | 256 | ||
241 | // PSC2 in spi mode example | 257 | // PSC2 in ac97 mode example |
242 | spi@2200 { // PSC2 | 258 | //ac97@2200 { // PSC2 |
243 | device_type = "spi"; | 259 | // device_type = "sound"; |
244 | compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi"; | 260 | // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97"; |
245 | reg = <2200 100>; | 261 | // cell-index = <1>; |
246 | interrupts = <2 2 0>; | 262 | // reg = <2200 100>; |
247 | interrupt-parent = <500>; | 263 | // interrupts = <2 2 0>; |
248 | }; | 264 | // interrupt-parent = <500>; |
265 | //}; | ||
249 | 266 | ||
250 | // PSC3 in CODEC mode example | 267 | // PSC3 in CODEC mode example |
251 | i2s@2400 { // PSC3 | 268 | //i2s@2400 { // PSC3 |
252 | device_type = "sound"; | 269 | // device_type = "sound"; |
253 | compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s"; | 270 | // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible |
254 | reg = <2400 100>; | 271 | // cell-index = <2>; |
255 | interrupts = <2 3 0>; | 272 | // reg = <2400 100>; |
256 | interrupt-parent = <500>; | 273 | // interrupts = <2 3 0>; |
257 | }; | 274 | // interrupt-parent = <500>; |
275 | //}; | ||
258 | 276 | ||
259 | // PSC4 unconfigured | 277 | // PSC4 in uart mode example |
260 | //serial@2600 { // PSC4 | 278 | //serial@2600 { // PSC4 |
261 | // device_type = "serial"; | 279 | // device_type = "serial"; |
262 | // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; | 280 | // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; |
281 | // cell-index = <3>; | ||
263 | // reg = <2600 100>; | 282 | // reg = <2600 100>; |
264 | // interrupts = <2 b 0>; | 283 | // interrupts = <2 b 0>; |
265 | // interrupt-parent = <500>; | 284 | // interrupt-parent = <500>; |
266 | //}; | 285 | //}; |
267 | 286 | ||
268 | // PSC5 unconfigured | 287 | // PSC5 in uart mode example |
269 | //serial@2800 { // PSC5 | 288 | //serial@2800 { // PSC5 |
270 | // device_type = "serial"; | 289 | // device_type = "serial"; |
271 | // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; | 290 | // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart"; |
291 | // cell-index = <4>; | ||
272 | // reg = <2800 100>; | 292 | // reg = <2800 100>; |
273 | // interrupts = <2 c 0>; | 293 | // interrupts = <2 c 0>; |
274 | // interrupt-parent = <500>; | 294 | // interrupt-parent = <500>; |
275 | //}; | 295 | //}; |
276 | 296 | ||
277 | // PSC6 in AC97 mode example | 297 | // PSC6 in spi mode example |
278 | ac97@2c00 { // PSC6 | 298 | //spi@2c00 { // PSC6 |
279 | device_type = "sound"; | 299 | // device_type = "spi"; |
280 | compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97"; | 300 | // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi"; |
281 | reg = <2c00 100>; | 301 | // cell-index = <5>; |
282 | interrupts = <2 4 0>; | 302 | // reg = <2c00 100>; |
283 | interrupt-parent = <500>; | 303 | // interrupts = <2 4 0>; |
284 | }; | 304 | // interrupt-parent = <500>; |
305 | //}; | ||
285 | 306 | ||
286 | ethernet@3000 { | 307 | ethernet@3000 { |
287 | device_type = "network"; | 308 | device_type = "network"; |
288 | compatible = "mpc5200b-fec\0mpc52xx-fec"; | 309 | compatible = "mpc5200b-fec\0mpc5200-fec"; |
289 | reg = <3000 800>; | 310 | reg = <3000 800>; |
290 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! | 311 | mac-address = [ 02 03 04 05 06 07 ]; // Bad! |
291 | interrupts = <2 5 0>; | 312 | interrupts = <2 5 0>; |
@@ -294,7 +315,7 @@ | |||
294 | 315 | ||
295 | ata@3a00 { | 316 | ata@3a00 { |
296 | device_type = "ata"; | 317 | device_type = "ata"; |
297 | compatible = "mpc5200b-ata\0mpc52xx-ata"; | 318 | compatible = "mpc5200b-ata\0mpc5200-ata"; |
298 | reg = <3a00 100>; | 319 | reg = <3a00 100>; |
299 | interrupts = <2 7 0>; | 320 | interrupts = <2 7 0>; |
300 | interrupt-parent = <500>; | 321 | interrupt-parent = <500>; |
@@ -302,7 +323,8 @@ | |||
302 | 323 | ||
303 | i2c@3d00 { | 324 | i2c@3d00 { |
304 | device_type = "i2c"; | 325 | device_type = "i2c"; |
305 | compatible = "mpc5200b-i2c\0mpc52xx-i2c"; | 326 | compatible = "mpc5200b-i2c\0mpc5200-i2c"; |
327 | cell-index = <0>; | ||
306 | reg = <3d00 40>; | 328 | reg = <3d00 40>; |
307 | interrupts = <2 f 0>; | 329 | interrupts = <2 f 0>; |
308 | interrupt-parent = <500>; | 330 | interrupt-parent = <500>; |
@@ -310,14 +332,15 @@ | |||
310 | 332 | ||
311 | i2c@3d40 { | 333 | i2c@3d40 { |
312 | device_type = "i2c"; | 334 | device_type = "i2c"; |
313 | compatible = "mpc5200b-i2c\0mpc52xx-i2c"; | 335 | compatible = "mpc5200b-i2c\0mpc5200-i2c"; |
336 | cell-index = <1>; | ||
314 | reg = <3d40 40>; | 337 | reg = <3d40 40>; |
315 | interrupts = <2 10 0>; | 338 | interrupts = <2 10 0>; |
316 | interrupt-parent = <500>; | 339 | interrupt-parent = <500>; |
317 | }; | 340 | }; |
318 | sram@8000 { | 341 | sram@8000 { |
319 | device_type = "sram"; | 342 | device_type = "sram"; |
320 | compatible = "mpc5200b-sram\0mpc52xx-sram\0sram"; | 343 | compatible = "mpc5200b-sram\0mpc5200-sram\0sram"; |
321 | reg = <8000 4000>; | 344 | reg = <8000 4000>; |
322 | }; | 345 | }; |
323 | }; | 346 | }; |
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts new file mode 100644 index 000000000000..3d2f5a06df3f --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts | |||
@@ -0,0 +1,219 @@ | |||
1 | /* | ||
2 | * MPC8313E RDB Device Tree Source | ||
3 | * | ||
4 | * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | / { | ||
13 | model = "MPC8313ERDB"; | ||
14 | compatible = "MPC83xx"; | ||
15 | #address-cells = <1>; | ||
16 | #size-cells = <1>; | ||
17 | |||
18 | cpus { | ||
19 | #cpus = <1>; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <0>; | ||
22 | |||
23 | PowerPC,8313@0 { | ||
24 | device_type = "cpu"; | ||
25 | reg = <0>; | ||
26 | d-cache-line-size = <20>; // 32 bytes | ||
27 | i-cache-line-size = <20>; // 32 bytes | ||
28 | d-cache-size = <4000>; // L1, 16K | ||
29 | i-cache-size = <4000>; // L1, 16K | ||
30 | timebase-frequency = <0>; // from bootloader | ||
31 | bus-frequency = <0>; // from bootloader | ||
32 | clock-frequency = <0>; // from bootloader | ||
33 | 32-bit; | ||
34 | }; | ||
35 | }; | ||
36 | |||
37 | memory { | ||
38 | device_type = "memory"; | ||
39 | reg = <00000000 08000000>; // 128MB at 0 | ||
40 | }; | ||
41 | |||
42 | soc8313@e0000000 { | ||
43 | #address-cells = <1>; | ||
44 | #size-cells = <1>; | ||
45 | #interrupt-cells = <2>; | ||
46 | device_type = "soc"; | ||
47 | ranges = <0 e0000000 00100000>; | ||
48 | reg = <e0000000 00000200>; | ||
49 | bus-frequency = <0>; | ||
50 | |||
51 | wdt@200 { | ||
52 | device_type = "watchdog"; | ||
53 | compatible = "mpc83xx_wdt"; | ||
54 | reg = <200 100>; | ||
55 | }; | ||
56 | |||
57 | i2c@3000 { | ||
58 | device_type = "i2c"; | ||
59 | compatible = "fsl-i2c"; | ||
60 | reg = <3000 100>; | ||
61 | interrupts = <e 8>; | ||
62 | interrupt-parent = <700>; | ||
63 | dfsrr; | ||
64 | }; | ||
65 | |||
66 | i2c@3100 { | ||
67 | device_type = "i2c"; | ||
68 | compatible = "fsl-i2c"; | ||
69 | reg = <3100 100>; | ||
70 | interrupts = <f 8>; | ||
71 | interrupt-parent = <700>; | ||
72 | dfsrr; | ||
73 | }; | ||
74 | |||
75 | spi@7000 { | ||
76 | device_type = "spi"; | ||
77 | compatible = "mpc83xx_spi"; | ||
78 | reg = <7000 1000>; | ||
79 | interrupts = <10 8>; | ||
80 | interrupt-parent = <700>; | ||
81 | mode = <0>; | ||
82 | }; | ||
83 | |||
84 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | ||
85 | usb@23000 { | ||
86 | device_type = "usb"; | ||
87 | compatible = "fsl-usb2-dr"; | ||
88 | reg = <23000 1000>; | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | interrupt-parent = <700>; | ||
92 | interrupts = <26 2>; | ||
93 | phy_type = "utmi_wide"; | ||
94 | }; | ||
95 | |||
96 | mdio@24520 { | ||
97 | device_type = "mdio"; | ||
98 | compatible = "gianfar"; | ||
99 | reg = <24520 20>; | ||
100 | #address-cells = <1>; | ||
101 | #size-cells = <0>; | ||
102 | linux,phandle = <24520>; | ||
103 | ethernet-phy@1 { | ||
104 | linux,phandle = <2452001>; | ||
105 | interrupt-parent = <700>; | ||
106 | interrupts = <13 2>; | ||
107 | reg = <1>; | ||
108 | device_type = "ethernet-phy"; | ||
109 | }; | ||
110 | ethernet-phy@4 { | ||
111 | linux,phandle = <2452004>; | ||
112 | interrupt-parent = <700>; | ||
113 | interrupts = <14 2>; | ||
114 | reg = <4>; | ||
115 | device_type = "ethernet-phy"; | ||
116 | }; | ||
117 | }; | ||
118 | |||
119 | ethernet@24000 { | ||
120 | device_type = "network"; | ||
121 | model = "eTSEC"; | ||
122 | compatible = "gianfar"; | ||
123 | reg = <24000 1000>; | ||
124 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
125 | interrupts = <25 8 24 8 23 8>; | ||
126 | interrupt-parent = <700>; | ||
127 | phy-handle = <2452001>; | ||
128 | }; | ||
129 | |||
130 | ethernet@25000 { | ||
131 | device_type = "network"; | ||
132 | model = "eTSEC"; | ||
133 | compatible = "gianfar"; | ||
134 | reg = <25000 1000>; | ||
135 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
136 | interrupts = <22 8 21 8 20 8>; | ||
137 | interrupt-parent = <700>; | ||
138 | phy-handle = <2452004>; | ||
139 | }; | ||
140 | |||
141 | serial@4500 { | ||
142 | device_type = "serial"; | ||
143 | compatible = "ns16550"; | ||
144 | reg = <4500 100>; | ||
145 | clock-frequency = <0>; | ||
146 | interrupts = <9 8>; | ||
147 | interrupt-parent = <700>; | ||
148 | }; | ||
149 | |||
150 | serial@4600 { | ||
151 | device_type = "serial"; | ||
152 | compatible = "ns16550"; | ||
153 | reg = <4600 100>; | ||
154 | clock-frequency = <0>; | ||
155 | interrupts = <a 8>; | ||
156 | interrupt-parent = <700>; | ||
157 | }; | ||
158 | |||
159 | pci@8500 { | ||
160 | interrupt-map-mask = <f800 0 0 7>; | ||
161 | interrupt-map = < | ||
162 | |||
163 | /* IDSEL 0x0E -mini PCI */ | ||
164 | 7000 0 0 1 700 12 8 | ||
165 | 7000 0 0 2 700 12 8 | ||
166 | 7000 0 0 3 700 12 8 | ||
167 | 7000 0 0 4 700 12 8 | ||
168 | |||
169 | /* IDSEL 0x0F - PCI slot */ | ||
170 | 7800 0 0 1 700 11 8 | ||
171 | 7800 0 0 2 700 12 8 | ||
172 | 7800 0 0 3 700 11 8 | ||
173 | 7800 0 0 4 700 12 8>; | ||
174 | interrupt-parent = <700>; | ||
175 | interrupts = <42 8>; | ||
176 | bus-range = <0 0>; | ||
177 | ranges = <02000000 0 90000000 90000000 0 10000000 | ||
178 | 42000000 0 80000000 80000000 0 10000000 | ||
179 | 01000000 0 00000000 e2000000 0 00100000>; | ||
180 | clock-frequency = <3f940aa>; | ||
181 | #interrupt-cells = <1>; | ||
182 | #size-cells = <2>; | ||
183 | #address-cells = <3>; | ||
184 | reg = <8500 100>; | ||
185 | compatible = "83xx"; | ||
186 | device_type = "pci"; | ||
187 | }; | ||
188 | |||
189 | crypto@30000 { | ||
190 | device_type = "crypto"; | ||
191 | model = "SEC2"; | ||
192 | compatible = "talitos"; | ||
193 | reg = <30000 7000>; | ||
194 | interrupts = <b 8>; | ||
195 | interrupt-parent = <700>; | ||
196 | /* Rev. 2.2 */ | ||
197 | num-channels = <1>; | ||
198 | channel-fifo-len = <18>; | ||
199 | exec-units-mask = <0000004c>; | ||
200 | descriptor-types-mask = <0122003f>; | ||
201 | }; | ||
202 | |||
203 | /* IPIC | ||
204 | * interrupts cell = <intr #, sense> | ||
205 | * sense values match linux IORESOURCE_IRQ_* defines: | ||
206 | * sense == 8: Level, low assertion | ||
207 | * sense == 2: Edge, high-to-low change | ||
208 | */ | ||
209 | pic@700 { | ||
210 | linux,phandle = <700>; | ||
211 | interrupt-controller; | ||
212 | #address-cells = <0>; | ||
213 | #interrupt-cells = <2>; | ||
214 | reg = <700 100>; | ||
215 | built-in; | ||
216 | device_type = "ipic"; | ||
217 | }; | ||
218 | }; | ||
219 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts new file mode 100644 index 000000000000..3190774de1d8 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts | |||
@@ -0,0 +1,187 @@ | |||
1 | /* | ||
2 | * MPC8349E-mITX-GP Device Tree Source | ||
3 | * | ||
4 | * Copyright 2007 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | / { | ||
12 | model = "MPC8349EMITXGP"; | ||
13 | compatible = "MPC834xMITXGP"; | ||
14 | #address-cells = <1>; | ||
15 | #size-cells = <1>; | ||
16 | |||
17 | cpus { | ||
18 | #cpus = <1>; | ||
19 | #address-cells = <1>; | ||
20 | #size-cells = <0>; | ||
21 | |||
22 | PowerPC,8349@0 { | ||
23 | device_type = "cpu"; | ||
24 | reg = <0>; | ||
25 | d-cache-line-size = <20>; | ||
26 | i-cache-line-size = <20>; | ||
27 | d-cache-size = <8000>; | ||
28 | i-cache-size = <8000>; | ||
29 | timebase-frequency = <0>; // from bootloader | ||
30 | bus-frequency = <0>; // from bootloader | ||
31 | clock-frequency = <0>; // from bootloader | ||
32 | 32-bit; | ||
33 | }; | ||
34 | }; | ||
35 | |||
36 | memory { | ||
37 | device_type = "memory"; | ||
38 | reg = <00000000 10000000>; | ||
39 | }; | ||
40 | |||
41 | soc8349@e0000000 { | ||
42 | #address-cells = <1>; | ||
43 | #size-cells = <1>; | ||
44 | #interrupt-cells = <2>; | ||
45 | device_type = "soc"; | ||
46 | ranges = <0 e0000000 00100000>; | ||
47 | reg = <e0000000 00000200>; | ||
48 | bus-frequency = <0>; // from bootloader | ||
49 | |||
50 | wdt@200 { | ||
51 | device_type = "watchdog"; | ||
52 | compatible = "mpc83xx_wdt"; | ||
53 | reg = <200 100>; | ||
54 | }; | ||
55 | |||
56 | i2c@3000 { | ||
57 | device_type = "i2c"; | ||
58 | compatible = "fsl-i2c"; | ||
59 | reg = <3000 100>; | ||
60 | interrupts = <e 8>; | ||
61 | interrupt-parent = <700>; | ||
62 | dfsrr; | ||
63 | }; | ||
64 | |||
65 | i2c@3100 { | ||
66 | device_type = "i2c"; | ||
67 | compatible = "fsl-i2c"; | ||
68 | reg = <3100 100>; | ||
69 | interrupts = <f 8>; | ||
70 | interrupt-parent = <700>; | ||
71 | dfsrr; | ||
72 | }; | ||
73 | |||
74 | spi@7000 { | ||
75 | device_type = "spi"; | ||
76 | compatible = "mpc83xx_spi"; | ||
77 | reg = <7000 1000>; | ||
78 | interrupts = <10 8>; | ||
79 | interrupt-parent = <700>; | ||
80 | mode = <0>; | ||
81 | }; | ||
82 | |||
83 | usb@23000 { | ||
84 | device_type = "usb"; | ||
85 | compatible = "fsl-usb2-dr"; | ||
86 | reg = <23000 1000>; | ||
87 | #address-cells = <1>; | ||
88 | #size-cells = <0>; | ||
89 | interrupt-parent = <700>; | ||
90 | interrupts = <26 2>; | ||
91 | dr_mode = "otg"; | ||
92 | phy_type = "ulpi"; | ||
93 | }; | ||
94 | |||
95 | mdio@24520 { | ||
96 | device_type = "mdio"; | ||
97 | compatible = "gianfar"; | ||
98 | reg = <24520 20>; | ||
99 | #address-cells = <1>; | ||
100 | #size-cells = <0>; | ||
101 | linux,phandle = <24520>; | ||
102 | |||
103 | /* Vitesse 8201 */ | ||
104 | ethernet-phy@1c { | ||
105 | linux,phandle = <245201c>; | ||
106 | interrupt-parent = <700>; | ||
107 | interrupts = <12 2>; | ||
108 | reg = <1c>; | ||
109 | device_type = "ethernet-phy"; | ||
110 | }; | ||
111 | }; | ||
112 | |||
113 | ethernet@24000 { | ||
114 | device_type = "network"; | ||
115 | model = "TSEC"; | ||
116 | compatible = "gianfar"; | ||
117 | reg = <24000 1000>; | ||
118 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
119 | interrupts = <20 8 21 8 22 8>; | ||
120 | interrupt-parent = <700>; | ||
121 | phy-handle = <245201c>; | ||
122 | }; | ||
123 | |||
124 | serial@4500 { | ||
125 | device_type = "serial"; | ||
126 | compatible = "ns16550"; | ||
127 | reg = <4500 100>; | ||
128 | clock-frequency = <0>; // from bootloader | ||
129 | interrupts = <9 8>; | ||
130 | interrupt-parent = <700>; | ||
131 | }; | ||
132 | |||
133 | serial@4600 { | ||
134 | device_type = "serial"; | ||
135 | compatible = "ns16550"; | ||
136 | reg = <4600 100>; | ||
137 | clock-frequency = <0>; // from bootloader | ||
138 | interrupts = <a 8>; | ||
139 | interrupt-parent = <700>; | ||
140 | }; | ||
141 | |||
142 | pci@8600 { | ||
143 | interrupt-map-mask = <f800 0 0 7>; | ||
144 | interrupt-map = < | ||
145 | /* IDSEL 0x0F - PCI Slot */ | ||
146 | 7800 0 0 1 700 14 8 /* PCI_INTA */ | ||
147 | 7800 0 0 2 700 15 8 /* PCI_INTB */ | ||
148 | >; | ||
149 | interrupt-parent = <700>; | ||
150 | interrupts = <43 8>; | ||
151 | bus-range = <1 1>; | ||
152 | ranges = <42000000 0 a0000000 a0000000 0 10000000 | ||
153 | 02000000 0 b0000000 b0000000 0 10000000 | ||
154 | 01000000 0 00000000 e3000000 0 01000000>; | ||
155 | clock-frequency = <3f940aa>; | ||
156 | #interrupt-cells = <1>; | ||
157 | #size-cells = <2>; | ||
158 | #address-cells = <3>; | ||
159 | reg = <8600 100>; | ||
160 | compatible = "83xx"; | ||
161 | device_type = "pci"; | ||
162 | }; | ||
163 | |||
164 | crypto@30000 { | ||
165 | device_type = "crypto"; | ||
166 | model = "SEC2"; | ||
167 | compatible = "talitos"; | ||
168 | reg = <30000 10000>; | ||
169 | interrupts = <b 8>; | ||
170 | interrupt-parent = <700>; | ||
171 | num-channels = <4>; | ||
172 | channel-fifo-len = <18>; | ||
173 | exec-units-mask = <0000007e>; | ||
174 | descriptor-types-mask = <01010ebf>; | ||
175 | }; | ||
176 | |||
177 | pic@700 { | ||
178 | linux,phandle = <700>; | ||
179 | interrupt-controller; | ||
180 | #address-cells = <0>; | ||
181 | #interrupt-cells = <2>; | ||
182 | reg = <700 100>; | ||
183 | built-in; | ||
184 | device_type = "ipic"; | ||
185 | }; | ||
186 | }; | ||
187 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index efceb3432653..dc121b3cb4a9 100644 --- a/arch/powerpc/boot/dts/mpc8349emds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts | |||
@@ -39,6 +39,11 @@ | |||
39 | reg = <00000000 10000000>; // 256MB at 0 | 39 | reg = <00000000 10000000>; // 256MB at 0 |
40 | }; | 40 | }; |
41 | 41 | ||
42 | bcsr@e2400000 { | ||
43 | device_type = "board-control"; | ||
44 | reg = <e2400000 8000>; | ||
45 | }; | ||
46 | |||
42 | soc8349@e0000000 { | 47 | soc8349@e0000000 { |
43 | #address-cells = <1>; | 48 | #address-cells = <1>; |
44 | #size-cells = <1>; | 49 | #size-cells = <1>; |
@@ -103,6 +108,7 @@ | |||
103 | #size-cells = <0>; | 108 | #size-cells = <0>; |
104 | interrupt-parent = <700>; | 109 | interrupt-parent = <700>; |
105 | interrupts = <26 2>; | 110 | interrupts = <26 2>; |
111 | dr_mode = "otg"; | ||
106 | phy_type = "ulpi"; | 112 | phy_type = "ulpi"; |
107 | }; | 113 | }; |
108 | 114 | ||
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts new file mode 100644 index 000000000000..06d24653e422 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
@@ -0,0 +1,380 @@ | |||
1 | /* | ||
2 | * MPC8568E MDS Device Tree Source | ||
3 | * | ||
4 | * Copyright 2007 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | |||
13 | /* | ||
14 | /memreserve/ 00000000 1000000; | ||
15 | */ | ||
16 | |||
17 | / { | ||
18 | model = "MPC8568EMDS"; | ||
19 | compatible = "MPC85xxMDS"; | ||
20 | #address-cells = <1>; | ||
21 | #size-cells = <1>; | ||
22 | linux,phandle = <100>; | ||
23 | |||
24 | cpus { | ||
25 | #cpus = <1>; | ||
26 | #address-cells = <1>; | ||
27 | #size-cells = <0>; | ||
28 | linux,phandle = <200>; | ||
29 | |||
30 | PowerPC,8568@0 { | ||
31 | device_type = "cpu"; | ||
32 | reg = <0>; | ||
33 | d-cache-line-size = <20>; // 32 bytes | ||
34 | i-cache-line-size = <20>; // 32 bytes | ||
35 | d-cache-size = <8000>; // L1, 32K | ||
36 | i-cache-size = <8000>; // L1, 32K | ||
37 | timebase-frequency = <0>; | ||
38 | bus-frequency = <0>; | ||
39 | clock-frequency = <0>; | ||
40 | 32-bit; | ||
41 | linux,phandle = <201>; | ||
42 | }; | ||
43 | }; | ||
44 | |||
45 | memory { | ||
46 | device_type = "memory"; | ||
47 | linux,phandle = <300>; | ||
48 | reg = <00000000 10000000>; | ||
49 | }; | ||
50 | |||
51 | bcsr@f8000000 { | ||
52 | device_type = "board-control"; | ||
53 | reg = <f8000000 8000>; | ||
54 | }; | ||
55 | |||
56 | soc8568@e0000000 { | ||
57 | #address-cells = <1>; | ||
58 | #size-cells = <1>; | ||
59 | #interrupt-cells = <2>; | ||
60 | device_type = "soc"; | ||
61 | ranges = <0 e0000000 00100000>; | ||
62 | reg = <e0000000 00100000>; | ||
63 | bus-frequency = <0>; | ||
64 | |||
65 | i2c@3000 { | ||
66 | device_type = "i2c"; | ||
67 | compatible = "fsl-i2c"; | ||
68 | reg = <3000 100>; | ||
69 | interrupts = <1b 2>; | ||
70 | interrupt-parent = <40000>; | ||
71 | dfsrr; | ||
72 | }; | ||
73 | |||
74 | i2c@3100 { | ||
75 | device_type = "i2c"; | ||
76 | compatible = "fsl-i2c"; | ||
77 | reg = <3100 100>; | ||
78 | interrupts = <1b 2>; | ||
79 | interrupt-parent = <40000>; | ||
80 | dfsrr; | ||
81 | }; | ||
82 | |||
83 | mdio@24520 { | ||
84 | #address-cells = <1>; | ||
85 | #size-cells = <0>; | ||
86 | device_type = "mdio"; | ||
87 | compatible = "gianfar"; | ||
88 | reg = <24520 20>; | ||
89 | linux,phandle = <24520>; | ||
90 | ethernet-phy@0 { | ||
91 | linux,phandle = <2452000>; | ||
92 | interrupt-parent = <40000>; | ||
93 | interrupts = <31 1>; | ||
94 | reg = <0>; | ||
95 | device_type = "ethernet-phy"; | ||
96 | }; | ||
97 | ethernet-phy@1 { | ||
98 | linux,phandle = <2452001>; | ||
99 | interrupt-parent = <40000>; | ||
100 | interrupts = <32 1>; | ||
101 | reg = <1>; | ||
102 | device_type = "ethernet-phy"; | ||
103 | }; | ||
104 | |||
105 | ethernet-phy@2 { | ||
106 | linux,phandle = <2452002>; | ||
107 | interrupt-parent = <40000>; | ||
108 | interrupts = <31 1>; | ||
109 | reg = <2>; | ||
110 | device_type = "ethernet-phy"; | ||
111 | }; | ||
112 | ethernet-phy@3 { | ||
113 | linux,phandle = <2452003>; | ||
114 | interrupt-parent = <40000>; | ||
115 | interrupts = <32 1>; | ||
116 | reg = <3>; | ||
117 | device_type = "ethernet-phy"; | ||
118 | }; | ||
119 | }; | ||
120 | |||
121 | ethernet@24000 { | ||
122 | #address-cells = <1>; | ||
123 | #size-cells = <0>; | ||
124 | device_type = "network"; | ||
125 | model = "eTSEC"; | ||
126 | compatible = "gianfar"; | ||
127 | reg = <24000 1000>; | ||
128 | mac-address = [ 00 00 00 00 00 00 ]; | ||
129 | interrupts = <d 2 e 2 12 2>; | ||
130 | interrupt-parent = <40000>; | ||
131 | phy-handle = <2452002>; | ||
132 | }; | ||
133 | |||
134 | ethernet@25000 { | ||
135 | #address-cells = <1>; | ||
136 | #size-cells = <0>; | ||
137 | device_type = "network"; | ||
138 | model = "eTSEC"; | ||
139 | compatible = "gianfar"; | ||
140 | reg = <25000 1000>; | ||
141 | mac-address = [ 00 00 00 00 00 00]; | ||
142 | interrupts = <13 2 14 2 18 2>; | ||
143 | interrupt-parent = <40000>; | ||
144 | phy-handle = <2452003>; | ||
145 | }; | ||
146 | |||
147 | serial@4500 { | ||
148 | device_type = "serial"; | ||
149 | compatible = "ns16550"; | ||
150 | reg = <4500 100>; | ||
151 | clock-frequency = <0>; | ||
152 | interrupts = <1a 2>; | ||
153 | interrupt-parent = <40000>; | ||
154 | }; | ||
155 | |||
156 | serial@4600 { | ||
157 | device_type = "serial"; | ||
158 | compatible = "ns16550"; | ||
159 | reg = <4600 100>; | ||
160 | clock-frequency = <0>; | ||
161 | interrupts = <1a 2>; | ||
162 | interrupt-parent = <40000>; | ||
163 | }; | ||
164 | |||
165 | crypto@30000 { | ||
166 | device_type = "crypto"; | ||
167 | model = "SEC2"; | ||
168 | compatible = "talitos"; | ||
169 | reg = <30000 f000>; | ||
170 | interrupts = <1d 2>; | ||
171 | interrupt-parent = <40000>; | ||
172 | num-channels = <4>; | ||
173 | channel-fifo-len = <18>; | ||
174 | exec-units-mask = <000000fe>; | ||
175 | descriptor-types-mask = <012b0ebf>; | ||
176 | }; | ||
177 | |||
178 | pic@40000 { | ||
179 | linux,phandle = <40000>; | ||
180 | clock-frequency = <0>; | ||
181 | interrupt-controller; | ||
182 | #address-cells = <0>; | ||
183 | #interrupt-cells = <2>; | ||
184 | reg = <40000 40000>; | ||
185 | built-in; | ||
186 | compatible = "chrp,open-pic"; | ||
187 | device_type = "open-pic"; | ||
188 | big-endian; | ||
189 | }; | ||
190 | par_io@e0100 { | ||
191 | reg = <e0100 100>; | ||
192 | device_type = "par_io"; | ||
193 | num-ports = <7>; | ||
194 | |||
195 | ucc_pin@01 { | ||
196 | linux,phandle = <e010001>; | ||
197 | pio-map = < | ||
198 | /* port pin dir open_drain assignment has_irq */ | ||
199 | 4 0a 1 0 2 0 /* TxD0 */ | ||
200 | 4 09 1 0 2 0 /* TxD1 */ | ||
201 | 4 08 1 0 2 0 /* TxD2 */ | ||
202 | 4 07 1 0 2 0 /* TxD3 */ | ||
203 | 4 17 1 0 2 0 /* TxD4 */ | ||
204 | 4 16 1 0 2 0 /* TxD5 */ | ||
205 | 4 15 1 0 2 0 /* TxD6 */ | ||
206 | 4 14 1 0 2 0 /* TxD7 */ | ||
207 | 4 0f 2 0 2 0 /* RxD0 */ | ||
208 | 4 0e 2 0 2 0 /* RxD1 */ | ||
209 | 4 0d 2 0 2 0 /* RxD2 */ | ||
210 | 4 0c 2 0 2 0 /* RxD3 */ | ||
211 | 4 1d 2 0 2 0 /* RxD4 */ | ||
212 | 4 1c 2 0 2 0 /* RxD5 */ | ||
213 | 4 1b 2 0 2 0 /* RxD6 */ | ||
214 | 4 1a 2 0 2 0 /* RxD7 */ | ||
215 | 4 0b 1 0 2 0 /* TX_EN */ | ||
216 | 4 18 1 0 2 0 /* TX_ER */ | ||
217 | 4 0f 2 0 2 0 /* RX_DV */ | ||
218 | 4 1e 2 0 2 0 /* RX_ER */ | ||
219 | 4 11 2 0 2 0 /* RX_CLK */ | ||
220 | 4 13 1 0 2 0 /* GTX_CLK */ | ||
221 | 1 1f 2 0 3 0>; /* GTX125 */ | ||
222 | }; | ||
223 | ucc_pin@02 { | ||
224 | linux,phandle = <e010002>; | ||
225 | pio-map = < | ||
226 | /* port pin dir open_drain assignment has_irq */ | ||
227 | 5 0a 1 0 2 0 /* TxD0 */ | ||
228 | 5 09 1 0 2 0 /* TxD1 */ | ||
229 | 5 08 1 0 2 0 /* TxD2 */ | ||
230 | 5 07 1 0 2 0 /* TxD3 */ | ||
231 | 5 17 1 0 2 0 /* TxD4 */ | ||
232 | 5 16 1 0 2 0 /* TxD5 */ | ||
233 | 5 15 1 0 2 0 /* TxD6 */ | ||
234 | 5 14 1 0 2 0 /* TxD7 */ | ||
235 | 5 0f 2 0 2 0 /* RxD0 */ | ||
236 | 5 0e 2 0 2 0 /* RxD1 */ | ||
237 | 5 0d 2 0 2 0 /* RxD2 */ | ||
238 | 5 0c 2 0 2 0 /* RxD3 */ | ||
239 | 5 1d 2 0 2 0 /* RxD4 */ | ||
240 | 5 1c 2 0 2 0 /* RxD5 */ | ||
241 | 5 1b 2 0 2 0 /* RxD6 */ | ||
242 | 5 1a 2 0 2 0 /* RxD7 */ | ||
243 | 5 0b 1 0 2 0 /* TX_EN */ | ||
244 | 5 18 1 0 2 0 /* TX_ER */ | ||
245 | 5 10 2 0 2 0 /* RX_DV */ | ||
246 | 5 1e 2 0 2 0 /* RX_ER */ | ||
247 | 5 11 2 0 2 0 /* RX_CLK */ | ||
248 | 5 13 1 0 2 0 /* GTX_CLK */ | ||
249 | 1 1f 2 0 3 0 /* GTX125 */ | ||
250 | 4 06 3 0 2 0 /* MDIO */ | ||
251 | 4 05 1 0 2 0>; /* MDC */ | ||
252 | }; | ||
253 | }; | ||
254 | }; | ||
255 | |||
256 | qe@e0080000 { | ||
257 | #address-cells = <1>; | ||
258 | #size-cells = <1>; | ||
259 | device_type = "qe"; | ||
260 | model = "QE"; | ||
261 | ranges = <0 e0080000 00040000>; | ||
262 | reg = <e0080000 480>; | ||
263 | brg-frequency = <0>; | ||
264 | bus-frequency = <179A7B00>; | ||
265 | |||
266 | muram@10000 { | ||
267 | device_type = "muram"; | ||
268 | ranges = <0 00010000 0000c000>; | ||
269 | |||
270 | data-only@0{ | ||
271 | reg = <0 c000>; | ||
272 | }; | ||
273 | }; | ||
274 | |||
275 | spi@4c0 { | ||
276 | device_type = "spi"; | ||
277 | compatible = "fsl_spi"; | ||
278 | reg = <4c0 40>; | ||
279 | interrupts = <2>; | ||
280 | interrupt-parent = <80>; | ||
281 | mode = "cpu"; | ||
282 | }; | ||
283 | |||
284 | spi@500 { | ||
285 | device_type = "spi"; | ||
286 | compatible = "fsl_spi"; | ||
287 | reg = <500 40>; | ||
288 | interrupts = <1>; | ||
289 | interrupt-parent = <80>; | ||
290 | mode = "cpu"; | ||
291 | }; | ||
292 | |||
293 | ucc@2000 { | ||
294 | device_type = "network"; | ||
295 | compatible = "ucc_geth"; | ||
296 | model = "UCC"; | ||
297 | device-id = <1>; | ||
298 | reg = <2000 200>; | ||
299 | interrupts = <20>; | ||
300 | interrupt-parent = <80>; | ||
301 | mac-address = [ 00 04 9f 00 23 23 ]; | ||
302 | rx-clock = <0>; | ||
303 | tx-clock = <19>; | ||
304 | phy-handle = <212000>; | ||
305 | pio-handle = <e010001>; | ||
306 | }; | ||
307 | |||
308 | ucc@3000 { | ||
309 | device_type = "network"; | ||
310 | compatible = "ucc_geth"; | ||
311 | model = "UCC"; | ||
312 | device-id = <2>; | ||
313 | reg = <3000 200>; | ||
314 | interrupts = <21>; | ||
315 | interrupt-parent = <80>; | ||
316 | mac-address = [ 00 11 22 33 44 55 ]; | ||
317 | rx-clock = <0>; | ||
318 | tx-clock = <14>; | ||
319 | phy-handle = <212001>; | ||
320 | pio-handle = <e010002>; | ||
321 | }; | ||
322 | |||
323 | mdio@2120 { | ||
324 | #address-cells = <1>; | ||
325 | #size-cells = <0>; | ||
326 | reg = <2120 18>; | ||
327 | device_type = "mdio"; | ||
328 | compatible = "ucc_geth_phy"; | ||
329 | |||
330 | /* These are the same PHYs as on | ||
331 | * gianfar's MDIO bus */ | ||
332 | ethernet-phy@00 { | ||
333 | linux,phandle = <212000>; | ||
334 | interrupt-parent = <40000>; | ||
335 | interrupts = <31 1>; | ||
336 | reg = <0>; | ||
337 | device_type = "ethernet-phy"; | ||
338 | interface = <6>; //ENET_1000_GMII | ||
339 | }; | ||
340 | ethernet-phy@01 { | ||
341 | linux,phandle = <212001>; | ||
342 | interrupt-parent = <40000>; | ||
343 | interrupts = <32 1>; | ||
344 | reg = <1>; | ||
345 | device_type = "ethernet-phy"; | ||
346 | interface = <6>; | ||
347 | }; | ||
348 | ethernet-phy@02 { | ||
349 | linux,phandle = <212002>; | ||
350 | interrupt-parent = <40000>; | ||
351 | interrupts = <31 1>; | ||
352 | reg = <2>; | ||
353 | device_type = "ethernet-phy"; | ||
354 | interface = <6>; //ENET_1000_GMII | ||
355 | }; | ||
356 | ethernet-phy@03 { | ||
357 | linux,phandle = <212003>; | ||
358 | interrupt-parent = <40000>; | ||
359 | interrupts = <32 1>; | ||
360 | reg = <3>; | ||
361 | device_type = "ethernet-phy"; | ||
362 | interface = <6>; //ENET_1000_GMII | ||
363 | }; | ||
364 | }; | ||
365 | |||
366 | qeic@80 { | ||
367 | linux,phandle = <80>; | ||
368 | interrupt-controller; | ||
369 | device_type = "qeic"; | ||
370 | #address-cells = <0>; | ||
371 | #interrupt-cells = <1>; | ||
372 | reg = <80 80>; | ||
373 | built-in; | ||
374 | big-endian; | ||
375 | interrupts = <1e 2 1e 2>; //high:30 low:30 | ||
376 | interrupt-parent = <40000>; | ||
377 | }; | ||
378 | |||
379 | }; | ||
380 | }; | ||
diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig index 405c1c908213..dde66a597a8d 100644 --- a/arch/powerpc/configs/linkstation_defconfig +++ b/arch/powerpc/configs/linkstation_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.20-rc5 | 3 | # Linux kernel version: 2.6.20-rc6 |
4 | # Mon Jan 22 22:17:58 2007 | 4 | # Sun Jan 28 23:13:56 2007 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | CONFIG_PPC32=y | 7 | CONFIG_PPC32=y |
@@ -58,7 +58,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32 | |||
58 | # | 58 | # |
59 | # General setup | 59 | # General setup |
60 | # | 60 | # |
61 | CONFIG_LOCALVERSION="-kuroboxHG" | 61 | CONFIG_LOCALVERSION="" |
62 | CONFIG_LOCALVERSION_AUTO=y | 62 | CONFIG_LOCALVERSION_AUTO=y |
63 | CONFIG_SWAP=y | 63 | CONFIG_SWAP=y |
64 | CONFIG_SYSVIPC=y | 64 | CONFIG_SYSVIPC=y |
@@ -206,7 +206,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 | |||
206 | CONFIG_PROC_DEVICETREE=y | 206 | CONFIG_PROC_DEVICETREE=y |
207 | # CONFIG_CMDLINE_BOOL is not set | 207 | # CONFIG_CMDLINE_BOOL is not set |
208 | # CONFIG_PM is not set | 208 | # CONFIG_PM is not set |
209 | # CONFIG_SECCOMP is not set | 209 | CONFIG_SECCOMP=y |
210 | CONFIG_ISA_DMA_API=y | 210 | CONFIG_ISA_DMA_API=y |
211 | 211 | ||
212 | # | 212 | # |
@@ -312,39 +312,40 @@ CONFIG_NF_CONNTRACK=m | |||
312 | # CONFIG_NF_CT_ACCT is not set | 312 | # CONFIG_NF_CT_ACCT is not set |
313 | # CONFIG_NF_CONNTRACK_MARK is not set | 313 | # CONFIG_NF_CONNTRACK_MARK is not set |
314 | # CONFIG_NF_CONNTRACK_EVENTS is not set | 314 | # CONFIG_NF_CONNTRACK_EVENTS is not set |
315 | # CONFIG_NF_CT_PROTO_SCTP is not set | 315 | CONFIG_NF_CT_PROTO_GRE=m |
316 | # CONFIG_NF_CONNTRACK_AMANDA is not set | 316 | CONFIG_NF_CT_PROTO_SCTP=m |
317 | CONFIG_NF_CONNTRACK_AMANDA=m | ||
317 | CONFIG_NF_CONNTRACK_FTP=m | 318 | CONFIG_NF_CONNTRACK_FTP=m |
318 | # CONFIG_NF_CONNTRACK_H323 is not set | 319 | CONFIG_NF_CONNTRACK_H323=m |
319 | CONFIG_NF_CONNTRACK_IRC=m | 320 | CONFIG_NF_CONNTRACK_IRC=m |
320 | # CONFIG_NF_CONNTRACK_NETBIOS_NS is not set | 321 | CONFIG_NF_CONNTRACK_NETBIOS_NS=m |
321 | # CONFIG_NF_CONNTRACK_PPTP is not set | 322 | CONFIG_NF_CONNTRACK_PPTP=m |
322 | # CONFIG_NF_CONNTRACK_SIP is not set | 323 | CONFIG_NF_CONNTRACK_SIP=m |
323 | CONFIG_NF_CONNTRACK_TFTP=m | 324 | CONFIG_NF_CONNTRACK_TFTP=m |
324 | CONFIG_NETFILTER_XTABLES=m | 325 | CONFIG_NETFILTER_XTABLES=m |
325 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | 326 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set |
326 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | 327 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set |
327 | CONFIG_NETFILTER_XT_TARGET_MARK=m | 328 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set |
328 | # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set | 329 | # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set |
329 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m | 330 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set |
330 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | 331 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set |
331 | # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set | 332 | # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set |
332 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | 333 | # CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set |
333 | # CONFIG_NETFILTER_XT_MATCH_DCCP is not set | 334 | # CONFIG_NETFILTER_XT_MATCH_DCCP is not set |
334 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set | 335 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set |
335 | CONFIG_NETFILTER_XT_MATCH_ESP=m | 336 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set |
336 | CONFIG_NETFILTER_XT_MATCH_HELPER=m | 337 | # CONFIG_NETFILTER_XT_MATCH_HELPER is not set |
337 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | 338 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set |
338 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | 339 | # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set |
339 | CONFIG_NETFILTER_XT_MATCH_MAC=m | 340 | CONFIG_NETFILTER_XT_MATCH_MAC=m |
340 | CONFIG_NETFILTER_XT_MATCH_MARK=m | 341 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set |
341 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set | 342 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set |
342 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | 343 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set |
343 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | 344 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m |
344 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | 345 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set |
345 | # CONFIG_NETFILTER_XT_MATCH_REALM is not set | 346 | # CONFIG_NETFILTER_XT_MATCH_REALM is not set |
346 | # CONFIG_NETFILTER_XT_MATCH_SCTP is not set | 347 | # CONFIG_NETFILTER_XT_MATCH_SCTP is not set |
347 | # CONFIG_NETFILTER_XT_MATCH_STATE is not set | 348 | CONFIG_NETFILTER_XT_MATCH_STATE=m |
348 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | 349 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set |
349 | # CONFIG_NETFILTER_XT_MATCH_STRING is not set | 350 | # CONFIG_NETFILTER_XT_MATCH_STRING is not set |
350 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | 351 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set |
@@ -359,12 +360,12 @@ CONFIG_NF_CONNTRACK_PROC_COMPAT=y | |||
359 | CONFIG_IP_NF_IPTABLES=m | 360 | CONFIG_IP_NF_IPTABLES=m |
360 | CONFIG_IP_NF_MATCH_IPRANGE=m | 361 | CONFIG_IP_NF_MATCH_IPRANGE=m |
361 | # CONFIG_IP_NF_MATCH_TOS is not set | 362 | # CONFIG_IP_NF_MATCH_TOS is not set |
362 | # CONFIG_IP_NF_MATCH_RECENT is not set | 363 | CONFIG_IP_NF_MATCH_RECENT=m |
363 | # CONFIG_IP_NF_MATCH_ECN is not set | 364 | # CONFIG_IP_NF_MATCH_ECN is not set |
364 | # CONFIG_IP_NF_MATCH_AH is not set | 365 | # CONFIG_IP_NF_MATCH_AH is not set |
365 | # CONFIG_IP_NF_MATCH_TTL is not set | 366 | # CONFIG_IP_NF_MATCH_TTL is not set |
366 | # CONFIG_IP_NF_MATCH_OWNER is not set | 367 | CONFIG_IP_NF_MATCH_OWNER=m |
367 | # CONFIG_IP_NF_MATCH_ADDRTYPE is not set | 368 | CONFIG_IP_NF_MATCH_ADDRTYPE=m |
368 | CONFIG_IP_NF_FILTER=m | 369 | CONFIG_IP_NF_FILTER=m |
369 | CONFIG_IP_NF_TARGET_REJECT=m | 370 | CONFIG_IP_NF_TARGET_REJECT=m |
370 | # CONFIG_IP_NF_TARGET_LOG is not set | 371 | # CONFIG_IP_NF_TARGET_LOG is not set |
@@ -374,16 +375,17 @@ CONFIG_NF_NAT=m | |||
374 | CONFIG_NF_NAT_NEEDED=y | 375 | CONFIG_NF_NAT_NEEDED=y |
375 | CONFIG_IP_NF_TARGET_MASQUERADE=m | 376 | CONFIG_IP_NF_TARGET_MASQUERADE=m |
376 | CONFIG_IP_NF_TARGET_REDIRECT=m | 377 | CONFIG_IP_NF_TARGET_REDIRECT=m |
377 | CONFIG_IP_NF_TARGET_NETMAP=m | 378 | # CONFIG_IP_NF_TARGET_NETMAP is not set |
378 | CONFIG_IP_NF_TARGET_SAME=m | 379 | # CONFIG_IP_NF_TARGET_SAME is not set |
379 | # CONFIG_NF_NAT_SNMP_BASIC is not set | 380 | # CONFIG_NF_NAT_SNMP_BASIC is not set |
381 | CONFIG_NF_NAT_PROTO_GRE=m | ||
380 | CONFIG_NF_NAT_FTP=m | 382 | CONFIG_NF_NAT_FTP=m |
381 | CONFIG_NF_NAT_IRC=m | 383 | CONFIG_NF_NAT_IRC=m |
382 | CONFIG_NF_NAT_TFTP=m | 384 | CONFIG_NF_NAT_TFTP=m |
383 | # CONFIG_NF_NAT_AMANDA is not set | 385 | CONFIG_NF_NAT_AMANDA=m |
384 | # CONFIG_NF_NAT_PPTP is not set | 386 | CONFIG_NF_NAT_PPTP=m |
385 | # CONFIG_NF_NAT_H323 is not set | 387 | CONFIG_NF_NAT_H323=m |
386 | # CONFIG_NF_NAT_SIP is not set | 388 | CONFIG_NF_NAT_SIP=m |
387 | CONFIG_IP_NF_MANGLE=m | 389 | CONFIG_IP_NF_MANGLE=m |
388 | CONFIG_IP_NF_TARGET_TOS=m | 390 | CONFIG_IP_NF_TARGET_TOS=m |
389 | CONFIG_IP_NF_TARGET_ECN=m | 391 | CONFIG_IP_NF_TARGET_ECN=m |
@@ -472,6 +474,7 @@ CONFIG_MTD_PARTITIONS=y | |||
472 | # User Modules And Translation Layers | 474 | # User Modules And Translation Layers |
473 | # | 475 | # |
474 | CONFIG_MTD_CHAR=y | 476 | CONFIG_MTD_CHAR=y |
477 | CONFIG_MTD_BLKDEVS=y | ||
475 | CONFIG_MTD_BLOCK=y | 478 | CONFIG_MTD_BLOCK=y |
476 | # CONFIG_FTL is not set | 479 | # CONFIG_FTL is not set |
477 | # CONFIG_NFTL is not set | 480 | # CONFIG_NFTL is not set |
@@ -518,6 +521,7 @@ CONFIG_MTD_PHYSMAP=y | |||
518 | CONFIG_MTD_PHYSMAP_START=0xffc00000 | 521 | CONFIG_MTD_PHYSMAP_START=0xffc00000 |
519 | CONFIG_MTD_PHYSMAP_LEN=0x400000 | 522 | CONFIG_MTD_PHYSMAP_LEN=0x400000 |
520 | CONFIG_MTD_PHYSMAP_BANKWIDTH=1 | 523 | CONFIG_MTD_PHYSMAP_BANKWIDTH=1 |
524 | # CONFIG_MTD_PHYSMAP_OF is not set | ||
521 | # CONFIG_MTD_PLATRAM is not set | 525 | # CONFIG_MTD_PLATRAM is not set |
522 | 526 | ||
523 | # | 527 | # |
@@ -540,6 +544,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1 | |||
540 | # NAND Flash Device Drivers | 544 | # NAND Flash Device Drivers |
541 | # | 545 | # |
542 | # CONFIG_MTD_NAND is not set | 546 | # CONFIG_MTD_NAND is not set |
547 | # CONFIG_MTD_NAND_CAFE is not set | ||
543 | 548 | ||
544 | # | 549 | # |
545 | # OneNAND Flash Device Drivers | 550 | # OneNAND Flash Device Drivers |
@@ -696,7 +701,7 @@ CONFIG_ATA=y | |||
696 | # CONFIG_PATA_HPT37X is not set | 701 | # CONFIG_PATA_HPT37X is not set |
697 | # CONFIG_PATA_HPT3X2N is not set | 702 | # CONFIG_PATA_HPT3X2N is not set |
698 | # CONFIG_PATA_HPT3X3 is not set | 703 | # CONFIG_PATA_HPT3X3 is not set |
699 | # CONFIG_PATA_IT821X is not set | 704 | CONFIG_PATA_IT821X=y |
700 | # CONFIG_PATA_JMICRON is not set | 705 | # CONFIG_PATA_JMICRON is not set |
701 | # CONFIG_PATA_TRIFLEX is not set | 706 | # CONFIG_PATA_TRIFLEX is not set |
702 | # CONFIG_PATA_MARVELL is not set | 707 | # CONFIG_PATA_MARVELL is not set |
@@ -763,11 +768,33 @@ CONFIG_TUN=m | |||
763 | # | 768 | # |
764 | # PHY device support | 769 | # PHY device support |
765 | # | 770 | # |
771 | # CONFIG_PHYLIB is not set | ||
766 | 772 | ||
767 | # | 773 | # |
768 | # Ethernet (10 or 100Mbit) | 774 | # Ethernet (10 or 100Mbit) |
769 | # | 775 | # |
770 | # CONFIG_NET_ETHERNET is not set | 776 | CONFIG_NET_ETHERNET=y |
777 | # CONFIG_MII is not set | ||
778 | # CONFIG_HAPPYMEAL is not set | ||
779 | # CONFIG_SUNGEM is not set | ||
780 | # CONFIG_CASSINI is not set | ||
781 | # CONFIG_NET_VENDOR_3COM is not set | ||
782 | |||
783 | # | ||
784 | # Tulip family network device support | ||
785 | # | ||
786 | CONFIG_NET_TULIP=y | ||
787 | # CONFIG_DE2104X is not set | ||
788 | CONFIG_TULIP=y | ||
789 | # CONFIG_TULIP_MWI is not set | ||
790 | CONFIG_TULIP_MMIO=y | ||
791 | # CONFIG_TULIP_NAPI is not set | ||
792 | # CONFIG_DE4X5 is not set | ||
793 | # CONFIG_WINBOND_840 is not set | ||
794 | # CONFIG_DM9102 is not set | ||
795 | # CONFIG_ULI526X is not set | ||
796 | # CONFIG_HP100 is not set | ||
797 | # CONFIG_NET_PCI is not set | ||
771 | 798 | ||
772 | # | 799 | # |
773 | # Ethernet (1000 Mbit) | 800 | # Ethernet (1000 Mbit) |
@@ -829,7 +856,8 @@ CONFIG_NET_RADIO=y | |||
829 | # CONFIG_USB_ZD1201 is not set | 856 | # CONFIG_USB_ZD1201 is not set |
830 | # CONFIG_HOSTAP is not set | 857 | # CONFIG_HOSTAP is not set |
831 | # CONFIG_BCM43XX is not set | 858 | # CONFIG_BCM43XX is not set |
832 | # CONFIG_ZD1211RW is not set | 859 | CONFIG_ZD1211RW=m |
860 | # CONFIG_ZD1211RW_DEBUG is not set | ||
833 | CONFIG_NET_WIRELESS=y | 861 | CONFIG_NET_WIRELESS=y |
834 | 862 | ||
835 | # | 863 | # |
@@ -1098,7 +1126,7 @@ CONFIG_DUMMY_CONSOLE=y | |||
1098 | # | 1126 | # |
1099 | # HID Devices | 1127 | # HID Devices |
1100 | # | 1128 | # |
1101 | CONFIG_HID=y | 1129 | CONFIG_HID=m |
1102 | 1130 | ||
1103 | # | 1131 | # |
1104 | # USB support | 1132 | # USB support |
@@ -1115,7 +1143,6 @@ CONFIG_USB=y | |||
1115 | CONFIG_USB_DEVICEFS=y | 1143 | CONFIG_USB_DEVICEFS=y |
1116 | # CONFIG_USB_BANDWIDTH is not set | 1144 | # CONFIG_USB_BANDWIDTH is not set |
1117 | # CONFIG_USB_DYNAMIC_MINORS is not set | 1145 | # CONFIG_USB_DYNAMIC_MINORS is not set |
1118 | # CONFIG_USB_MULTITHREAD_PROBE is not set | ||
1119 | # CONFIG_USB_OTG is not set | 1146 | # CONFIG_USB_OTG is not set |
1120 | 1147 | ||
1121 | # | 1148 | # |
@@ -1136,7 +1163,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y | |||
1136 | # USB Device Class drivers | 1163 | # USB Device Class drivers |
1137 | # | 1164 | # |
1138 | # CONFIG_USB_ACM is not set | 1165 | # CONFIG_USB_ACM is not set |
1139 | # CONFIG_USB_PRINTER is not set | 1166 | CONFIG_USB_PRINTER=m |
1140 | 1167 | ||
1141 | # | 1168 | # |
1142 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | 1169 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' |
@@ -1371,7 +1398,11 @@ CONFIG_FS_MBCACHE=y | |||
1371 | # CONFIG_REISERFS_FS is not set | 1398 | # CONFIG_REISERFS_FS is not set |
1372 | # CONFIG_JFS_FS is not set | 1399 | # CONFIG_JFS_FS is not set |
1373 | CONFIG_FS_POSIX_ACL=y | 1400 | CONFIG_FS_POSIX_ACL=y |
1374 | # CONFIG_XFS_FS is not set | 1401 | CONFIG_XFS_FS=m |
1402 | # CONFIG_XFS_QUOTA is not set | ||
1403 | # CONFIG_XFS_SECURITY is not set | ||
1404 | # CONFIG_XFS_POSIX_ACL is not set | ||
1405 | # CONFIG_XFS_RT is not set | ||
1375 | # CONFIG_GFS2_FS is not set | 1406 | # CONFIG_GFS2_FS is not set |
1376 | # CONFIG_OCFS2_FS is not set | 1407 | # CONFIG_OCFS2_FS is not set |
1377 | # CONFIG_MINIX_FS is not set | 1408 | # CONFIG_MINIX_FS is not set |
@@ -1461,7 +1492,12 @@ CONFIG_SUNRPC_GSS=y | |||
1461 | CONFIG_RPCSEC_GSS_KRB5=y | 1492 | CONFIG_RPCSEC_GSS_KRB5=y |
1462 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | 1493 | # CONFIG_RPCSEC_GSS_SPKM3 is not set |
1463 | # CONFIG_SMB_FS is not set | 1494 | # CONFIG_SMB_FS is not set |
1464 | # CONFIG_CIFS is not set | 1495 | CONFIG_CIFS=m |
1496 | # CONFIG_CIFS_STATS is not set | ||
1497 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1498 | # CONFIG_CIFS_XATTR is not set | ||
1499 | # CONFIG_CIFS_DEBUG2 is not set | ||
1500 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
1465 | # CONFIG_NCP_FS is not set | 1501 | # CONFIG_NCP_FS is not set |
1466 | # CONFIG_CODA_FS is not set | 1502 | # CONFIG_CODA_FS is not set |
1467 | # CONFIG_AFS_FS is not set | 1503 | # CONFIG_AFS_FS is not set |
@@ -1495,7 +1531,7 @@ CONFIG_NLS_CODEPAGE_437=m | |||
1495 | # CONFIG_NLS_CODEPAGE_869 is not set | 1531 | # CONFIG_NLS_CODEPAGE_869 is not set |
1496 | # CONFIG_NLS_CODEPAGE_936 is not set | 1532 | # CONFIG_NLS_CODEPAGE_936 is not set |
1497 | # CONFIG_NLS_CODEPAGE_950 is not set | 1533 | # CONFIG_NLS_CODEPAGE_950 is not set |
1498 | # CONFIG_NLS_CODEPAGE_932 is not set | 1534 | CONFIG_NLS_CODEPAGE_932=m |
1499 | # CONFIG_NLS_CODEPAGE_949 is not set | 1535 | # CONFIG_NLS_CODEPAGE_949 is not set |
1500 | # CONFIG_NLS_CODEPAGE_874 is not set | 1536 | # CONFIG_NLS_CODEPAGE_874 is not set |
1501 | # CONFIG_NLS_ISO8859_8 is not set | 1537 | # CONFIG_NLS_ISO8859_8 is not set |
@@ -1526,12 +1562,14 @@ CONFIG_NLS_UTF8=m | |||
1526 | # Library routines | 1562 | # Library routines |
1527 | # | 1563 | # |
1528 | CONFIG_BITREVERSE=y | 1564 | CONFIG_BITREVERSE=y |
1529 | # CONFIG_CRC_CCITT is not set | 1565 | CONFIG_CRC_CCITT=m |
1530 | # CONFIG_CRC16 is not set | 1566 | # CONFIG_CRC16 is not set |
1531 | CONFIG_CRC32=y | 1567 | CONFIG_CRC32=y |
1532 | CONFIG_LIBCRC32C=m | 1568 | CONFIG_LIBCRC32C=m |
1533 | CONFIG_ZLIB_INFLATE=m | 1569 | CONFIG_ZLIB_INFLATE=m |
1534 | CONFIG_ZLIB_DEFLATE=m | 1570 | CONFIG_ZLIB_DEFLATE=m |
1571 | CONFIG_TEXTSEARCH=y | ||
1572 | CONFIG_TEXTSEARCH_KMP=m | ||
1535 | CONFIG_PLIST=y | 1573 | CONFIG_PLIST=y |
1536 | CONFIG_IOMAP_COPY=y | 1574 | CONFIG_IOMAP_COPY=y |
1537 | 1575 | ||
diff --git a/arch/powerpc/configs/mpc8313_rdb_defconfig b/arch/powerpc/configs/mpc8313_rdb_defconfig new file mode 100644 index 000000000000..f87523716c44 --- /dev/null +++ b/arch/powerpc/configs/mpc8313_rdb_defconfig | |||
@@ -0,0 +1,1409 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.20 | ||
4 | # Wed Feb 7 22:08:04 2007 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_IRQ_PER_CPU=y | ||
12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
13 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
14 | CONFIG_GENERIC_HWEIGHT=y | ||
15 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
16 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
17 | CONFIG_PPC=y | ||
18 | CONFIG_EARLY_PRINTK=y | ||
19 | CONFIG_GENERIC_NVRAM=y | ||
20 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
21 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
22 | CONFIG_PPC_OF=y | ||
23 | CONFIG_PPC_UDBG_16550=y | ||
24 | # CONFIG_GENERIC_TBSYNC is not set | ||
25 | CONFIG_AUDIT_ARCH=y | ||
26 | CONFIG_GENERIC_BUG=y | ||
27 | CONFIG_DEFAULT_UIMAGE=y | ||
28 | |||
29 | # | ||
30 | # Processor support | ||
31 | # | ||
32 | # CONFIG_CLASSIC32 is not set | ||
33 | # CONFIG_PPC_82xx is not set | ||
34 | CONFIG_PPC_83xx=y | ||
35 | # CONFIG_PPC_85xx is not set | ||
36 | # CONFIG_PPC_86xx is not set | ||
37 | # CONFIG_PPC_8xx is not set | ||
38 | # CONFIG_40x is not set | ||
39 | # CONFIG_44x is not set | ||
40 | # CONFIG_E200 is not set | ||
41 | CONFIG_6xx=y | ||
42 | CONFIG_83xx=y | ||
43 | CONFIG_PPC_FPU=y | ||
44 | # CONFIG_PPC_DCR_NATIVE is not set | ||
45 | # CONFIG_PPC_DCR_MMIO is not set | ||
46 | CONFIG_PPC_STD_MMU=y | ||
47 | CONFIG_PPC_STD_MMU_32=y | ||
48 | # CONFIG_SMP is not set | ||
49 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
50 | |||
51 | # | ||
52 | # Code maturity level options | ||
53 | # | ||
54 | CONFIG_EXPERIMENTAL=y | ||
55 | CONFIG_BROKEN_ON_SMP=y | ||
56 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
57 | |||
58 | # | ||
59 | # General setup | ||
60 | # | ||
61 | CONFIG_LOCALVERSION="" | ||
62 | CONFIG_LOCALVERSION_AUTO=y | ||
63 | CONFIG_SWAP=y | ||
64 | CONFIG_SYSVIPC=y | ||
65 | # CONFIG_IPC_NS is not set | ||
66 | # CONFIG_POSIX_MQUEUE is not set | ||
67 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
68 | # CONFIG_TASKSTATS is not set | ||
69 | # CONFIG_UTS_NS is not set | ||
70 | # CONFIG_AUDIT is not set | ||
71 | # CONFIG_IKCONFIG is not set | ||
72 | CONFIG_SYSFS_DEPRECATED=y | ||
73 | # CONFIG_RELAY is not set | ||
74 | CONFIG_INITRAMFS_SOURCE="" | ||
75 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
76 | CONFIG_SYSCTL=y | ||
77 | CONFIG_EMBEDDED=y | ||
78 | CONFIG_SYSCTL_SYSCALL=y | ||
79 | # CONFIG_KALLSYMS is not set | ||
80 | CONFIG_HOTPLUG=y | ||
81 | CONFIG_PRINTK=y | ||
82 | CONFIG_BUG=y | ||
83 | CONFIG_ELF_CORE=y | ||
84 | CONFIG_BASE_FULL=y | ||
85 | CONFIG_FUTEX=y | ||
86 | # CONFIG_EPOLL is not set | ||
87 | CONFIG_SHMEM=y | ||
88 | CONFIG_SLAB=y | ||
89 | CONFIG_VM_EVENT_COUNTERS=y | ||
90 | CONFIG_RT_MUTEXES=y | ||
91 | # CONFIG_TINY_SHMEM is not set | ||
92 | CONFIG_BASE_SMALL=0 | ||
93 | # CONFIG_SLOB is not set | ||
94 | |||
95 | # | ||
96 | # Loadable module support | ||
97 | # | ||
98 | CONFIG_MODULES=y | ||
99 | CONFIG_MODULE_UNLOAD=y | ||
100 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
101 | # CONFIG_MODVERSIONS is not set | ||
102 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
103 | # CONFIG_KMOD is not set | ||
104 | |||
105 | # | ||
106 | # Block layer | ||
107 | # | ||
108 | CONFIG_BLOCK=y | ||
109 | # CONFIG_LBD is not set | ||
110 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
111 | # CONFIG_LSF is not set | ||
112 | |||
113 | # | ||
114 | # IO Schedulers | ||
115 | # | ||
116 | CONFIG_IOSCHED_NOOP=y | ||
117 | CONFIG_IOSCHED_AS=y | ||
118 | CONFIG_IOSCHED_DEADLINE=y | ||
119 | CONFIG_IOSCHED_CFQ=y | ||
120 | CONFIG_DEFAULT_AS=y | ||
121 | # CONFIG_DEFAULT_DEADLINE is not set | ||
122 | # CONFIG_DEFAULT_CFQ is not set | ||
123 | # CONFIG_DEFAULT_NOOP is not set | ||
124 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
125 | CONFIG_PPC_GEN550=y | ||
126 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
127 | |||
128 | # | ||
129 | # Platform support | ||
130 | # | ||
131 | CONFIG_MPC8313_RDB=y | ||
132 | # CONFIG_MPC832x_MDS is not set | ||
133 | # CONFIG_MPC834x_SYS is not set | ||
134 | # CONFIG_MPC834x_ITX is not set | ||
135 | # CONFIG_MPC8360E_PB is not set | ||
136 | CONFIG_PPC_MPC831x=y | ||
137 | # CONFIG_MPIC is not set | ||
138 | |||
139 | # | ||
140 | # Kernel options | ||
141 | # | ||
142 | # CONFIG_HIGHMEM is not set | ||
143 | # CONFIG_HZ_100 is not set | ||
144 | CONFIG_HZ_250=y | ||
145 | # CONFIG_HZ_300 is not set | ||
146 | # CONFIG_HZ_1000 is not set | ||
147 | CONFIG_HZ=250 | ||
148 | CONFIG_PREEMPT_NONE=y | ||
149 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
150 | # CONFIG_PREEMPT is not set | ||
151 | CONFIG_BINFMT_ELF=y | ||
152 | # CONFIG_BINFMT_MISC is not set | ||
153 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
154 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
155 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
156 | CONFIG_SELECT_MEMORY_MODEL=y | ||
157 | CONFIG_FLATMEM_MANUAL=y | ||
158 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
159 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
160 | CONFIG_FLATMEM=y | ||
161 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
162 | # CONFIG_SPARSEMEM_STATIC is not set | ||
163 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
164 | # CONFIG_RESOURCES_64BIT is not set | ||
165 | CONFIG_PROC_DEVICETREE=y | ||
166 | # CONFIG_CMDLINE_BOOL is not set | ||
167 | # CONFIG_PM is not set | ||
168 | CONFIG_SECCOMP=y | ||
169 | CONFIG_ISA_DMA_API=y | ||
170 | |||
171 | # | ||
172 | # Bus options | ||
173 | # | ||
174 | CONFIG_GENERIC_ISA_DMA=y | ||
175 | # CONFIG_MPIC_WEIRD is not set | ||
176 | # CONFIG_PPC_I8259 is not set | ||
177 | CONFIG_PPC_INDIRECT_PCI=y | ||
178 | CONFIG_FSL_SOC=y | ||
179 | CONFIG_PCI=y | ||
180 | CONFIG_PCI_DOMAINS=y | ||
181 | # CONFIG_PCIEPORTBUS is not set | ||
182 | # CONFIG_PCI_DEBUG is not set | ||
183 | |||
184 | # | ||
185 | # PCCARD (PCMCIA/CardBus) support | ||
186 | # | ||
187 | # CONFIG_PCCARD is not set | ||
188 | |||
189 | # | ||
190 | # PCI Hotplug Support | ||
191 | # | ||
192 | # CONFIG_HOTPLUG_PCI is not set | ||
193 | |||
194 | # | ||
195 | # Advanced setup | ||
196 | # | ||
197 | # CONFIG_ADVANCED_OPTIONS is not set | ||
198 | |||
199 | # | ||
200 | # Default settings for advanced configuration options are used | ||
201 | # | ||
202 | CONFIG_HIGHMEM_START=0xfe000000 | ||
203 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
204 | CONFIG_KERNEL_START=0xc0000000 | ||
205 | CONFIG_TASK_SIZE=0x80000000 | ||
206 | CONFIG_BOOT_LOAD=0x00800000 | ||
207 | |||
208 | # | ||
209 | # Networking | ||
210 | # | ||
211 | CONFIG_NET=y | ||
212 | |||
213 | # | ||
214 | # Networking options | ||
215 | # | ||
216 | # CONFIG_NETDEBUG is not set | ||
217 | CONFIG_PACKET=y | ||
218 | # CONFIG_PACKET_MMAP is not set | ||
219 | CONFIG_UNIX=y | ||
220 | CONFIG_XFRM=y | ||
221 | # CONFIG_XFRM_USER is not set | ||
222 | # CONFIG_XFRM_SUB_POLICY is not set | ||
223 | # CONFIG_NET_KEY is not set | ||
224 | CONFIG_INET=y | ||
225 | CONFIG_IP_MULTICAST=y | ||
226 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
227 | CONFIG_IP_FIB_HASH=y | ||
228 | CONFIG_IP_PNP=y | ||
229 | CONFIG_IP_PNP_DHCP=y | ||
230 | CONFIG_IP_PNP_BOOTP=y | ||
231 | # CONFIG_IP_PNP_RARP is not set | ||
232 | # CONFIG_NET_IPIP is not set | ||
233 | # CONFIG_NET_IPGRE is not set | ||
234 | # CONFIG_IP_MROUTE is not set | ||
235 | # CONFIG_ARPD is not set | ||
236 | CONFIG_SYN_COOKIES=y | ||
237 | # CONFIG_INET_AH is not set | ||
238 | # CONFIG_INET_ESP is not set | ||
239 | # CONFIG_INET_IPCOMP is not set | ||
240 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
241 | # CONFIG_INET_TUNNEL is not set | ||
242 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
243 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
244 | CONFIG_INET_XFRM_MODE_BEET=y | ||
245 | CONFIG_INET_DIAG=y | ||
246 | CONFIG_INET_TCP_DIAG=y | ||
247 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
248 | CONFIG_TCP_CONG_CUBIC=y | ||
249 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
250 | # CONFIG_TCP_MD5SIG is not set | ||
251 | # CONFIG_IPV6 is not set | ||
252 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
253 | # CONFIG_INET6_TUNNEL is not set | ||
254 | # CONFIG_NETWORK_SECMARK is not set | ||
255 | # CONFIG_NETFILTER is not set | ||
256 | |||
257 | # | ||
258 | # DCCP Configuration (EXPERIMENTAL) | ||
259 | # | ||
260 | # CONFIG_IP_DCCP is not set | ||
261 | |||
262 | # | ||
263 | # SCTP Configuration (EXPERIMENTAL) | ||
264 | # | ||
265 | # CONFIG_IP_SCTP is not set | ||
266 | |||
267 | # | ||
268 | # TIPC Configuration (EXPERIMENTAL) | ||
269 | # | ||
270 | # CONFIG_TIPC is not set | ||
271 | # CONFIG_ATM is not set | ||
272 | # CONFIG_BRIDGE is not set | ||
273 | # CONFIG_VLAN_8021Q is not set | ||
274 | # CONFIG_DECNET is not set | ||
275 | # CONFIG_LLC2 is not set | ||
276 | # CONFIG_IPX is not set | ||
277 | # CONFIG_ATALK is not set | ||
278 | # CONFIG_X25 is not set | ||
279 | # CONFIG_LAPB is not set | ||
280 | # CONFIG_ECONET is not set | ||
281 | # CONFIG_WAN_ROUTER is not set | ||
282 | |||
283 | # | ||
284 | # QoS and/or fair queueing | ||
285 | # | ||
286 | # CONFIG_NET_SCHED is not set | ||
287 | |||
288 | # | ||
289 | # Network testing | ||
290 | # | ||
291 | # CONFIG_NET_PKTGEN is not set | ||
292 | # CONFIG_HAMRADIO is not set | ||
293 | # CONFIG_IRDA is not set | ||
294 | # CONFIG_BT is not set | ||
295 | # CONFIG_IEEE80211 is not set | ||
296 | |||
297 | # | ||
298 | # Device Drivers | ||
299 | # | ||
300 | |||
301 | # | ||
302 | # Generic Driver Options | ||
303 | # | ||
304 | CONFIG_STANDALONE=y | ||
305 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
306 | # CONFIG_FW_LOADER is not set | ||
307 | # CONFIG_DEBUG_DRIVER is not set | ||
308 | # CONFIG_SYS_HYPERVISOR is not set | ||
309 | |||
310 | # | ||
311 | # Connector - unified userspace <-> kernelspace linker | ||
312 | # | ||
313 | # CONFIG_CONNECTOR is not set | ||
314 | |||
315 | # | ||
316 | # Memory Technology Devices (MTD) | ||
317 | # | ||
318 | CONFIG_MTD=y | ||
319 | # CONFIG_MTD_DEBUG is not set | ||
320 | # CONFIG_MTD_CONCAT is not set | ||
321 | # CONFIG_MTD_PARTITIONS is not set | ||
322 | |||
323 | # | ||
324 | # User Modules And Translation Layers | ||
325 | # | ||
326 | CONFIG_MTD_CHAR=y | ||
327 | # CONFIG_MTD_BLKDEVS is not set | ||
328 | # CONFIG_MTD_BLOCK is not set | ||
329 | # CONFIG_MTD_BLOCK_RO is not set | ||
330 | # CONFIG_FTL is not set | ||
331 | # CONFIG_NFTL is not set | ||
332 | # CONFIG_INFTL is not set | ||
333 | # CONFIG_RFD_FTL is not set | ||
334 | # CONFIG_SSFDC is not set | ||
335 | |||
336 | # | ||
337 | # RAM/ROM/Flash chip drivers | ||
338 | # | ||
339 | CONFIG_MTD_CFI=y | ||
340 | # CONFIG_MTD_JEDECPROBE is not set | ||
341 | CONFIG_MTD_GEN_PROBE=y | ||
342 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
343 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
344 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
345 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
346 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
347 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
348 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
349 | CONFIG_MTD_CFI_I1=y | ||
350 | CONFIG_MTD_CFI_I2=y | ||
351 | # CONFIG_MTD_CFI_I4 is not set | ||
352 | # CONFIG_MTD_CFI_I8 is not set | ||
353 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
354 | CONFIG_MTD_CFI_AMDSTD=y | ||
355 | # CONFIG_MTD_CFI_STAA is not set | ||
356 | CONFIG_MTD_CFI_UTIL=y | ||
357 | # CONFIG_MTD_RAM is not set | ||
358 | # CONFIG_MTD_ROM is not set | ||
359 | # CONFIG_MTD_ABSENT is not set | ||
360 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
361 | |||
362 | # | ||
363 | # Mapping drivers for chip access | ||
364 | # | ||
365 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
366 | CONFIG_MTD_PHYSMAP=y | ||
367 | CONFIG_MTD_PHYSMAP_START=0xfe000000 | ||
368 | CONFIG_MTD_PHYSMAP_LEN=0x1000000 | ||
369 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
370 | # CONFIG_MTD_PHYSMAP_OF is not set | ||
371 | # CONFIG_MTD_PLATRAM is not set | ||
372 | |||
373 | # | ||
374 | # Self-contained MTD device drivers | ||
375 | # | ||
376 | # CONFIG_MTD_PMC551 is not set | ||
377 | # CONFIG_MTD_DATAFLASH is not set | ||
378 | # CONFIG_MTD_M25P80 is not set | ||
379 | # CONFIG_MTD_SLRAM is not set | ||
380 | # CONFIG_MTD_PHRAM is not set | ||
381 | # CONFIG_MTD_MTDRAM is not set | ||
382 | # CONFIG_MTD_BLOCK2MTD is not set | ||
383 | |||
384 | # | ||
385 | # Disk-On-Chip Device Drivers | ||
386 | # | ||
387 | # CONFIG_MTD_DOC2000 is not set | ||
388 | # CONFIG_MTD_DOC2001 is not set | ||
389 | # CONFIG_MTD_DOC2001PLUS is not set | ||
390 | |||
391 | # | ||
392 | # NAND Flash Device Drivers | ||
393 | # | ||
394 | # CONFIG_MTD_NAND is not set | ||
395 | # CONFIG_MTD_NAND_CAFE is not set | ||
396 | |||
397 | # | ||
398 | # OneNAND Flash Device Drivers | ||
399 | # | ||
400 | # CONFIG_MTD_ONENAND is not set | ||
401 | |||
402 | # | ||
403 | # Parallel port support | ||
404 | # | ||
405 | # CONFIG_PARPORT is not set | ||
406 | |||
407 | # | ||
408 | # Plug and Play support | ||
409 | # | ||
410 | |||
411 | # | ||
412 | # Block devices | ||
413 | # | ||
414 | # CONFIG_BLK_DEV_FD is not set | ||
415 | # CONFIG_BLK_CPQ_DA is not set | ||
416 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
417 | # CONFIG_BLK_DEV_DAC960 is not set | ||
418 | # CONFIG_BLK_DEV_UMEM is not set | ||
419 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
420 | CONFIG_BLK_DEV_LOOP=y | ||
421 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
422 | # CONFIG_BLK_DEV_NBD is not set | ||
423 | # CONFIG_BLK_DEV_SX8 is not set | ||
424 | # CONFIG_BLK_DEV_UB is not set | ||
425 | CONFIG_BLK_DEV_RAM=y | ||
426 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
427 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
428 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
429 | CONFIG_BLK_DEV_INITRD=y | ||
430 | # CONFIG_CDROM_PKTCDVD is not set | ||
431 | # CONFIG_ATA_OVER_ETH is not set | ||
432 | |||
433 | # | ||
434 | # Misc devices | ||
435 | # | ||
436 | # CONFIG_SGI_IOC4 is not set | ||
437 | # CONFIG_TIFM_CORE is not set | ||
438 | |||
439 | # | ||
440 | # ATA/ATAPI/MFM/RLL support | ||
441 | # | ||
442 | # CONFIG_IDE is not set | ||
443 | |||
444 | # | ||
445 | # SCSI device support | ||
446 | # | ||
447 | # CONFIG_RAID_ATTRS is not set | ||
448 | CONFIG_SCSI=y | ||
449 | # CONFIG_SCSI_TGT is not set | ||
450 | # CONFIG_SCSI_NETLINK is not set | ||
451 | CONFIG_SCSI_PROC_FS=y | ||
452 | |||
453 | # | ||
454 | # SCSI support type (disk, tape, CD-ROM) | ||
455 | # | ||
456 | # CONFIG_BLK_DEV_SD is not set | ||
457 | # CONFIG_CHR_DEV_ST is not set | ||
458 | # CONFIG_CHR_DEV_OSST is not set | ||
459 | # CONFIG_BLK_DEV_SR is not set | ||
460 | CONFIG_CHR_DEV_SG=y | ||
461 | # CONFIG_CHR_DEV_SCH is not set | ||
462 | |||
463 | # | ||
464 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
465 | # | ||
466 | # CONFIG_SCSI_MULTI_LUN is not set | ||
467 | # CONFIG_SCSI_CONSTANTS is not set | ||
468 | # CONFIG_SCSI_LOGGING is not set | ||
469 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
470 | |||
471 | # | ||
472 | # SCSI Transports | ||
473 | # | ||
474 | CONFIG_SCSI_SPI_ATTRS=y | ||
475 | # CONFIG_SCSI_FC_ATTRS is not set | ||
476 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
477 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
478 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
479 | |||
480 | # | ||
481 | # SCSI low-level drivers | ||
482 | # | ||
483 | # CONFIG_ISCSI_TCP is not set | ||
484 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
485 | # CONFIG_SCSI_3W_9XXX is not set | ||
486 | # CONFIG_SCSI_ACARD is not set | ||
487 | # CONFIG_SCSI_AACRAID is not set | ||
488 | # CONFIG_SCSI_AIC7XXX is not set | ||
489 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
490 | # CONFIG_SCSI_AIC79XX is not set | ||
491 | # CONFIG_SCSI_AIC94XX is not set | ||
492 | # CONFIG_SCSI_DPT_I2O is not set | ||
493 | # CONFIG_SCSI_ARCMSR is not set | ||
494 | # CONFIG_MEGARAID_NEWGEN is not set | ||
495 | # CONFIG_MEGARAID_LEGACY is not set | ||
496 | # CONFIG_MEGARAID_SAS is not set | ||
497 | # CONFIG_SCSI_HPTIOP is not set | ||
498 | # CONFIG_SCSI_BUSLOGIC is not set | ||
499 | # CONFIG_SCSI_DMX3191D is not set | ||
500 | # CONFIG_SCSI_EATA is not set | ||
501 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
502 | # CONFIG_SCSI_GDTH is not set | ||
503 | # CONFIG_SCSI_IPS is not set | ||
504 | # CONFIG_SCSI_INITIO is not set | ||
505 | # CONFIG_SCSI_INIA100 is not set | ||
506 | # CONFIG_SCSI_STEX is not set | ||
507 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
508 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
509 | # CONFIG_SCSI_QLA_FC is not set | ||
510 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
511 | # CONFIG_SCSI_LPFC is not set | ||
512 | # CONFIG_SCSI_DC395x is not set | ||
513 | # CONFIG_SCSI_DC390T is not set | ||
514 | # CONFIG_SCSI_NSP32 is not set | ||
515 | # CONFIG_SCSI_DEBUG is not set | ||
516 | # CONFIG_SCSI_SRP is not set | ||
517 | |||
518 | # | ||
519 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
520 | # | ||
521 | # CONFIG_ATA is not set | ||
522 | |||
523 | # | ||
524 | # Multi-device support (RAID and LVM) | ||
525 | # | ||
526 | CONFIG_MD=y | ||
527 | CONFIG_BLK_DEV_MD=y | ||
528 | CONFIG_MD_LINEAR=y | ||
529 | CONFIG_MD_RAID0=y | ||
530 | CONFIG_MD_RAID1=y | ||
531 | # CONFIG_MD_RAID10 is not set | ||
532 | # CONFIG_MD_RAID456 is not set | ||
533 | # CONFIG_MD_MULTIPATH is not set | ||
534 | # CONFIG_MD_FAULTY is not set | ||
535 | # CONFIG_BLK_DEV_DM is not set | ||
536 | |||
537 | # | ||
538 | # Fusion MPT device support | ||
539 | # | ||
540 | # CONFIG_FUSION is not set | ||
541 | # CONFIG_FUSION_SPI is not set | ||
542 | # CONFIG_FUSION_FC is not set | ||
543 | # CONFIG_FUSION_SAS is not set | ||
544 | |||
545 | # | ||
546 | # IEEE 1394 (FireWire) support | ||
547 | # | ||
548 | # CONFIG_IEEE1394 is not set | ||
549 | |||
550 | # | ||
551 | # I2O device support | ||
552 | # | ||
553 | # CONFIG_I2O is not set | ||
554 | |||
555 | # | ||
556 | # Macintosh device drivers | ||
557 | # | ||
558 | # CONFIG_MAC_EMUMOUSEBTN is not set | ||
559 | # CONFIG_WINDFARM is not set | ||
560 | |||
561 | # | ||
562 | # Network device support | ||
563 | # | ||
564 | CONFIG_NETDEVICES=y | ||
565 | # CONFIG_DUMMY is not set | ||
566 | # CONFIG_BONDING is not set | ||
567 | # CONFIG_EQUALIZER is not set | ||
568 | # CONFIG_TUN is not set | ||
569 | |||
570 | # | ||
571 | # ARCnet devices | ||
572 | # | ||
573 | # CONFIG_ARCNET is not set | ||
574 | |||
575 | # | ||
576 | # PHY device support | ||
577 | # | ||
578 | CONFIG_PHYLIB=y | ||
579 | |||
580 | # | ||
581 | # MII PHY device drivers | ||
582 | # | ||
583 | # CONFIG_MARVELL_PHY is not set | ||
584 | # CONFIG_DAVICOM_PHY is not set | ||
585 | # CONFIG_QSEMI_PHY is not set | ||
586 | # CONFIG_LXT_PHY is not set | ||
587 | CONFIG_CICADA_PHY=y | ||
588 | # CONFIG_VITESSE_PHY is not set | ||
589 | # CONFIG_SMSC_PHY is not set | ||
590 | # CONFIG_BROADCOM_PHY is not set | ||
591 | # CONFIG_FIXED_PHY is not set | ||
592 | |||
593 | # | ||
594 | # Ethernet (10 or 100Mbit) | ||
595 | # | ||
596 | CONFIG_NET_ETHERNET=y | ||
597 | CONFIG_MII=y | ||
598 | # CONFIG_HAPPYMEAL is not set | ||
599 | # CONFIG_SUNGEM is not set | ||
600 | # CONFIG_CASSINI is not set | ||
601 | # CONFIG_NET_VENDOR_3COM is not set | ||
602 | |||
603 | # | ||
604 | # Tulip family network device support | ||
605 | # | ||
606 | # CONFIG_NET_TULIP is not set | ||
607 | # CONFIG_HP100 is not set | ||
608 | CONFIG_NET_PCI=y | ||
609 | # CONFIG_PCNET32 is not set | ||
610 | # CONFIG_AMD8111_ETH is not set | ||
611 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
612 | # CONFIG_B44 is not set | ||
613 | # CONFIG_FORCEDETH is not set | ||
614 | # CONFIG_DGRS is not set | ||
615 | # CONFIG_EEPRO100 is not set | ||
616 | CONFIG_E100=y | ||
617 | # CONFIG_FEALNX is not set | ||
618 | # CONFIG_NATSEMI is not set | ||
619 | # CONFIG_NE2K_PCI is not set | ||
620 | # CONFIG_8139CP is not set | ||
621 | # CONFIG_8139TOO is not set | ||
622 | # CONFIG_SIS900 is not set | ||
623 | # CONFIG_EPIC100 is not set | ||
624 | # CONFIG_SUNDANCE is not set | ||
625 | # CONFIG_TLAN is not set | ||
626 | # CONFIG_VIA_RHINE is not set | ||
627 | |||
628 | # | ||
629 | # Ethernet (1000 Mbit) | ||
630 | # | ||
631 | # CONFIG_ACENIC is not set | ||
632 | # CONFIG_DL2K is not set | ||
633 | # CONFIG_E1000 is not set | ||
634 | # CONFIG_NS83820 is not set | ||
635 | # CONFIG_HAMACHI is not set | ||
636 | # CONFIG_YELLOWFIN is not set | ||
637 | # CONFIG_R8169 is not set | ||
638 | # CONFIG_SIS190 is not set | ||
639 | # CONFIG_SKGE is not set | ||
640 | # CONFIG_SKY2 is not set | ||
641 | # CONFIG_SK98LIN is not set | ||
642 | # CONFIG_VIA_VELOCITY is not set | ||
643 | # CONFIG_TIGON3 is not set | ||
644 | # CONFIG_BNX2 is not set | ||
645 | CONFIG_GIANFAR=y | ||
646 | CONFIG_GFAR_NAPI=y | ||
647 | # CONFIG_QLA3XXX is not set | ||
648 | |||
649 | # | ||
650 | # Ethernet (10000 Mbit) | ||
651 | # | ||
652 | # CONFIG_CHELSIO_T1 is not set | ||
653 | # CONFIG_IXGB is not set | ||
654 | # CONFIG_S2IO is not set | ||
655 | # CONFIG_MYRI10GE is not set | ||
656 | # CONFIG_NETXEN_NIC is not set | ||
657 | |||
658 | # | ||
659 | # Token Ring devices | ||
660 | # | ||
661 | # CONFIG_TR is not set | ||
662 | |||
663 | # | ||
664 | # Wireless LAN (non-hamradio) | ||
665 | # | ||
666 | # CONFIG_NET_RADIO is not set | ||
667 | |||
668 | # | ||
669 | # Wan interfaces | ||
670 | # | ||
671 | # CONFIG_WAN is not set | ||
672 | # CONFIG_FDDI is not set | ||
673 | # CONFIG_HIPPI is not set | ||
674 | # CONFIG_PPP is not set | ||
675 | # CONFIG_SLIP is not set | ||
676 | # CONFIG_NET_FC is not set | ||
677 | # CONFIG_SHAPER is not set | ||
678 | # CONFIG_NETCONSOLE is not set | ||
679 | # CONFIG_NETPOLL is not set | ||
680 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
681 | |||
682 | # | ||
683 | # ISDN subsystem | ||
684 | # | ||
685 | # CONFIG_ISDN is not set | ||
686 | |||
687 | # | ||
688 | # Telephony Support | ||
689 | # | ||
690 | # CONFIG_PHONE is not set | ||
691 | |||
692 | # | ||
693 | # Input device support | ||
694 | # | ||
695 | CONFIG_INPUT=y | ||
696 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
697 | |||
698 | # | ||
699 | # Userland interfaces | ||
700 | # | ||
701 | # CONFIG_INPUT_MOUSEDEV is not set | ||
702 | # CONFIG_INPUT_JOYDEV is not set | ||
703 | # CONFIG_INPUT_TSDEV is not set | ||
704 | # CONFIG_INPUT_EVDEV is not set | ||
705 | # CONFIG_INPUT_EVBUG is not set | ||
706 | |||
707 | # | ||
708 | # Input Device Drivers | ||
709 | # | ||
710 | # CONFIG_INPUT_KEYBOARD is not set | ||
711 | # CONFIG_INPUT_MOUSE is not set | ||
712 | # CONFIG_INPUT_JOYSTICK is not set | ||
713 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
714 | # CONFIG_INPUT_MISC is not set | ||
715 | |||
716 | # | ||
717 | # Hardware I/O ports | ||
718 | # | ||
719 | # CONFIG_SERIO is not set | ||
720 | # CONFIG_GAMEPORT is not set | ||
721 | |||
722 | # | ||
723 | # Character devices | ||
724 | # | ||
725 | # CONFIG_VT is not set | ||
726 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
727 | |||
728 | # | ||
729 | # Serial drivers | ||
730 | # | ||
731 | CONFIG_SERIAL_8250=y | ||
732 | CONFIG_SERIAL_8250_CONSOLE=y | ||
733 | CONFIG_SERIAL_8250_PCI=y | ||
734 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
735 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
736 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
737 | |||
738 | # | ||
739 | # Non-8250 serial port support | ||
740 | # | ||
741 | # CONFIG_SERIAL_UARTLITE is not set | ||
742 | CONFIG_SERIAL_CORE=y | ||
743 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
744 | # CONFIG_SERIAL_JSM is not set | ||
745 | CONFIG_UNIX98_PTYS=y | ||
746 | CONFIG_LEGACY_PTYS=y | ||
747 | CONFIG_LEGACY_PTY_COUNT=256 | ||
748 | |||
749 | # | ||
750 | # IPMI | ||
751 | # | ||
752 | # CONFIG_IPMI_HANDLER is not set | ||
753 | |||
754 | # | ||
755 | # Watchdog Cards | ||
756 | # | ||
757 | CONFIG_WATCHDOG=y | ||
758 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
759 | |||
760 | # | ||
761 | # Watchdog Device Drivers | ||
762 | # | ||
763 | # CONFIG_SOFT_WATCHDOG is not set | ||
764 | CONFIG_83xx_WDT=y | ||
765 | |||
766 | # | ||
767 | # PCI-based Watchdog Cards | ||
768 | # | ||
769 | # CONFIG_PCIPCWATCHDOG is not set | ||
770 | # CONFIG_WDTPCI is not set | ||
771 | |||
772 | # | ||
773 | # USB-based Watchdog Cards | ||
774 | # | ||
775 | # CONFIG_USBPCWATCHDOG is not set | ||
776 | CONFIG_HW_RANDOM=y | ||
777 | # CONFIG_NVRAM is not set | ||
778 | # CONFIG_GEN_RTC is not set | ||
779 | # CONFIG_DTLK is not set | ||
780 | # CONFIG_R3964 is not set | ||
781 | # CONFIG_APPLICOM is not set | ||
782 | # CONFIG_AGP is not set | ||
783 | # CONFIG_DRM is not set | ||
784 | # CONFIG_RAW_DRIVER is not set | ||
785 | |||
786 | # | ||
787 | # TPM devices | ||
788 | # | ||
789 | # CONFIG_TCG_TPM is not set | ||
790 | |||
791 | # | ||
792 | # I2C support | ||
793 | # | ||
794 | CONFIG_I2C=y | ||
795 | CONFIG_I2C_CHARDEV=y | ||
796 | |||
797 | # | ||
798 | # I2C Algorithms | ||
799 | # | ||
800 | # CONFIG_I2C_ALGOBIT is not set | ||
801 | # CONFIG_I2C_ALGOPCF is not set | ||
802 | # CONFIG_I2C_ALGOPCA is not set | ||
803 | |||
804 | # | ||
805 | # I2C Hardware Bus support | ||
806 | # | ||
807 | # CONFIG_I2C_ALI1535 is not set | ||
808 | # CONFIG_I2C_ALI1563 is not set | ||
809 | # CONFIG_I2C_ALI15X3 is not set | ||
810 | # CONFIG_I2C_AMD756 is not set | ||
811 | # CONFIG_I2C_AMD8111 is not set | ||
812 | # CONFIG_I2C_I801 is not set | ||
813 | # CONFIG_I2C_I810 is not set | ||
814 | # CONFIG_I2C_PIIX4 is not set | ||
815 | CONFIG_I2C_MPC=y | ||
816 | # CONFIG_I2C_NFORCE2 is not set | ||
817 | # CONFIG_I2C_OCORES is not set | ||
818 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
819 | # CONFIG_I2C_PROSAVAGE is not set | ||
820 | # CONFIG_I2C_SAVAGE4 is not set | ||
821 | # CONFIG_I2C_SIS5595 is not set | ||
822 | # CONFIG_I2C_SIS630 is not set | ||
823 | # CONFIG_I2C_SIS96X is not set | ||
824 | # CONFIG_I2C_STUB is not set | ||
825 | # CONFIG_I2C_VIA is not set | ||
826 | # CONFIG_I2C_VIAPRO is not set | ||
827 | # CONFIG_I2C_VOODOO3 is not set | ||
828 | # CONFIG_I2C_PCA_ISA is not set | ||
829 | |||
830 | # | ||
831 | # Miscellaneous I2C Chip support | ||
832 | # | ||
833 | # CONFIG_SENSORS_DS1337 is not set | ||
834 | # CONFIG_SENSORS_DS1374 is not set | ||
835 | # CONFIG_SENSORS_EEPROM is not set | ||
836 | # CONFIG_SENSORS_PCF8574 is not set | ||
837 | # CONFIG_SENSORS_PCA9539 is not set | ||
838 | # CONFIG_SENSORS_PCF8591 is not set | ||
839 | # CONFIG_SENSORS_M41T00 is not set | ||
840 | # CONFIG_SENSORS_MAX6875 is not set | ||
841 | # CONFIG_I2C_DEBUG_CORE is not set | ||
842 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
843 | # CONFIG_I2C_DEBUG_BUS is not set | ||
844 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
845 | |||
846 | # | ||
847 | # SPI support | ||
848 | # | ||
849 | CONFIG_SPI=y | ||
850 | # CONFIG_SPI_DEBUG is not set | ||
851 | CONFIG_SPI_MASTER=y | ||
852 | |||
853 | # | ||
854 | # SPI Master Controller Drivers | ||
855 | # | ||
856 | CONFIG_SPI_BITBANG=y | ||
857 | CONFIG_SPI_MPC83xx=y | ||
858 | |||
859 | # | ||
860 | # SPI Protocol Masters | ||
861 | # | ||
862 | |||
863 | # | ||
864 | # Dallas's 1-wire bus | ||
865 | # | ||
866 | # CONFIG_W1 is not set | ||
867 | |||
868 | # | ||
869 | # Hardware Monitoring support | ||
870 | # | ||
871 | CONFIG_HWMON=y | ||
872 | # CONFIG_HWMON_VID is not set | ||
873 | # CONFIG_SENSORS_ABITUGURU is not set | ||
874 | # CONFIG_SENSORS_ADM1021 is not set | ||
875 | # CONFIG_SENSORS_ADM1025 is not set | ||
876 | # CONFIG_SENSORS_ADM1026 is not set | ||
877 | # CONFIG_SENSORS_ADM1031 is not set | ||
878 | # CONFIG_SENSORS_ADM9240 is not set | ||
879 | # CONFIG_SENSORS_ASB100 is not set | ||
880 | # CONFIG_SENSORS_ATXP1 is not set | ||
881 | # CONFIG_SENSORS_DS1621 is not set | ||
882 | # CONFIG_SENSORS_F71805F is not set | ||
883 | # CONFIG_SENSORS_FSCHER is not set | ||
884 | # CONFIG_SENSORS_FSCPOS is not set | ||
885 | # CONFIG_SENSORS_GL518SM is not set | ||
886 | # CONFIG_SENSORS_GL520SM is not set | ||
887 | # CONFIG_SENSORS_IT87 is not set | ||
888 | # CONFIG_SENSORS_LM63 is not set | ||
889 | # CONFIG_SENSORS_LM70 is not set | ||
890 | # CONFIG_SENSORS_LM75 is not set | ||
891 | # CONFIG_SENSORS_LM77 is not set | ||
892 | # CONFIG_SENSORS_LM78 is not set | ||
893 | # CONFIG_SENSORS_LM80 is not set | ||
894 | # CONFIG_SENSORS_LM83 is not set | ||
895 | # CONFIG_SENSORS_LM85 is not set | ||
896 | # CONFIG_SENSORS_LM87 is not set | ||
897 | # CONFIG_SENSORS_LM90 is not set | ||
898 | # CONFIG_SENSORS_LM92 is not set | ||
899 | # CONFIG_SENSORS_MAX1619 is not set | ||
900 | # CONFIG_SENSORS_PC87360 is not set | ||
901 | # CONFIG_SENSORS_PC87427 is not set | ||
902 | # CONFIG_SENSORS_SIS5595 is not set | ||
903 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
904 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
905 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
906 | # CONFIG_SENSORS_VIA686A is not set | ||
907 | # CONFIG_SENSORS_VT1211 is not set | ||
908 | # CONFIG_SENSORS_VT8231 is not set | ||
909 | # CONFIG_SENSORS_W83781D is not set | ||
910 | # CONFIG_SENSORS_W83791D is not set | ||
911 | # CONFIG_SENSORS_W83792D is not set | ||
912 | # CONFIG_SENSORS_W83793 is not set | ||
913 | # CONFIG_SENSORS_W83L785TS is not set | ||
914 | # CONFIG_SENSORS_W83627HF is not set | ||
915 | # CONFIG_SENSORS_W83627EHF is not set | ||
916 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
917 | |||
918 | # | ||
919 | # Multimedia devices | ||
920 | # | ||
921 | # CONFIG_VIDEO_DEV is not set | ||
922 | |||
923 | # | ||
924 | # Digital Video Broadcasting Devices | ||
925 | # | ||
926 | # CONFIG_DVB is not set | ||
927 | # CONFIG_USB_DABUSB is not set | ||
928 | |||
929 | # | ||
930 | # Graphics support | ||
931 | # | ||
932 | CONFIG_FIRMWARE_EDID=y | ||
933 | # CONFIG_FB is not set | ||
934 | # CONFIG_FB_IBM_GXT4500 is not set | ||
935 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
936 | |||
937 | # | ||
938 | # Sound | ||
939 | # | ||
940 | # CONFIG_SOUND is not set | ||
941 | |||
942 | # | ||
943 | # HID Devices | ||
944 | # | ||
945 | CONFIG_HID=y | ||
946 | |||
947 | # | ||
948 | # USB support | ||
949 | # | ||
950 | CONFIG_USB_ARCH_HAS_HCD=y | ||
951 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
952 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
953 | CONFIG_USB=y | ||
954 | # CONFIG_USB_DEBUG is not set | ||
955 | |||
956 | # | ||
957 | # Miscellaneous USB options | ||
958 | # | ||
959 | CONFIG_USB_DEVICEFS=y | ||
960 | # CONFIG_USB_BANDWIDTH is not set | ||
961 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
962 | # CONFIG_USB_OTG is not set | ||
963 | |||
964 | # | ||
965 | # USB Host Controller Drivers | ||
966 | # | ||
967 | CONFIG_USB_EHCI_HCD=y | ||
968 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | ||
969 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
970 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
971 | # CONFIG_USB_ISP116X_HCD is not set | ||
972 | CONFIG_USB_OHCI_HCD=y | ||
973 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | ||
974 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
975 | CONFIG_USB_UHCI_HCD=y | ||
976 | # CONFIG_USB_SL811_HCD is not set | ||
977 | |||
978 | # | ||
979 | # USB Device Class drivers | ||
980 | # | ||
981 | # CONFIG_USB_ACM is not set | ||
982 | # CONFIG_USB_PRINTER is not set | ||
983 | |||
984 | # | ||
985 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
986 | # | ||
987 | |||
988 | # | ||
989 | # may also be needed; see USB_STORAGE Help for more information | ||
990 | # | ||
991 | CONFIG_USB_STORAGE=y | ||
992 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
993 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
994 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
995 | # CONFIG_USB_STORAGE_DPCM is not set | ||
996 | # CONFIG_USB_STORAGE_USBAT is not set | ||
997 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
998 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
999 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1000 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1001 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1002 | # CONFIG_USB_LIBUSUAL is not set | ||
1003 | |||
1004 | # | ||
1005 | # USB Input Devices | ||
1006 | # | ||
1007 | # CONFIG_USB_HID is not set | ||
1008 | |||
1009 | # | ||
1010 | # USB HID Boot Protocol drivers | ||
1011 | # | ||
1012 | # CONFIG_USB_KBD is not set | ||
1013 | # CONFIG_USB_MOUSE is not set | ||
1014 | # CONFIG_USB_AIPTEK is not set | ||
1015 | # CONFIG_USB_WACOM is not set | ||
1016 | # CONFIG_USB_ACECAD is not set | ||
1017 | # CONFIG_USB_KBTAB is not set | ||
1018 | # CONFIG_USB_POWERMATE is not set | ||
1019 | # CONFIG_USB_TOUCHSCREEN is not set | ||
1020 | # CONFIG_USB_YEALINK is not set | ||
1021 | # CONFIG_USB_XPAD is not set | ||
1022 | # CONFIG_USB_ATI_REMOTE is not set | ||
1023 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
1024 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
1025 | # CONFIG_USB_APPLETOUCH is not set | ||
1026 | |||
1027 | # | ||
1028 | # USB Imaging devices | ||
1029 | # | ||
1030 | # CONFIG_USB_MDC800 is not set | ||
1031 | # CONFIG_USB_MICROTEK is not set | ||
1032 | |||
1033 | # | ||
1034 | # USB Network Adapters | ||
1035 | # | ||
1036 | # CONFIG_USB_CATC is not set | ||
1037 | # CONFIG_USB_KAWETH is not set | ||
1038 | # CONFIG_USB_PEGASUS is not set | ||
1039 | # CONFIG_USB_RTL8150 is not set | ||
1040 | # CONFIG_USB_USBNET_MII is not set | ||
1041 | # CONFIG_USB_USBNET is not set | ||
1042 | CONFIG_USB_MON=y | ||
1043 | |||
1044 | # | ||
1045 | # USB port drivers | ||
1046 | # | ||
1047 | |||
1048 | # | ||
1049 | # USB Serial Converter support | ||
1050 | # | ||
1051 | # CONFIG_USB_SERIAL is not set | ||
1052 | |||
1053 | # | ||
1054 | # USB Miscellaneous drivers | ||
1055 | # | ||
1056 | # CONFIG_USB_EMI62 is not set | ||
1057 | # CONFIG_USB_EMI26 is not set | ||
1058 | # CONFIG_USB_ADUTUX is not set | ||
1059 | # CONFIG_USB_AUERSWALD is not set | ||
1060 | # CONFIG_USB_RIO500 is not set | ||
1061 | # CONFIG_USB_LEGOTOWER is not set | ||
1062 | # CONFIG_USB_LCD is not set | ||
1063 | # CONFIG_USB_LED is not set | ||
1064 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1065 | # CONFIG_USB_CYTHERM is not set | ||
1066 | # CONFIG_USB_PHIDGET is not set | ||
1067 | # CONFIG_USB_IDMOUSE is not set | ||
1068 | # CONFIG_USB_FTDI_ELAN is not set | ||
1069 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1070 | # CONFIG_USB_SISUSBVGA is not set | ||
1071 | # CONFIG_USB_LD is not set | ||
1072 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1073 | # CONFIG_USB_TEST is not set | ||
1074 | |||
1075 | # | ||
1076 | # USB DSL modem support | ||
1077 | # | ||
1078 | |||
1079 | # | ||
1080 | # USB Gadget Support | ||
1081 | # | ||
1082 | CONFIG_USB_GADGET=y | ||
1083 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
1084 | CONFIG_USB_GADGET_SELECTED=y | ||
1085 | CONFIG_USB_GADGET_NET2280=y | ||
1086 | CONFIG_USB_NET2280=y | ||
1087 | # CONFIG_USB_GADGET_PXA2XX is not set | ||
1088 | # CONFIG_USB_GADGET_GOKU is not set | ||
1089 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
1090 | # CONFIG_USB_GADGET_OMAP is not set | ||
1091 | # CONFIG_USB_GADGET_AT91 is not set | ||
1092 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
1093 | CONFIG_USB_GADGET_DUALSPEED=y | ||
1094 | # CONFIG_USB_ZERO is not set | ||
1095 | CONFIG_USB_ETH=y | ||
1096 | CONFIG_USB_ETH_RNDIS=y | ||
1097 | # CONFIG_USB_GADGETFS is not set | ||
1098 | # CONFIG_USB_FILE_STORAGE is not set | ||
1099 | # CONFIG_USB_G_SERIAL is not set | ||
1100 | # CONFIG_USB_MIDI_GADGET is not set | ||
1101 | |||
1102 | # | ||
1103 | # MMC/SD Card support | ||
1104 | # | ||
1105 | # CONFIG_MMC is not set | ||
1106 | |||
1107 | # | ||
1108 | # LED devices | ||
1109 | # | ||
1110 | # CONFIG_NEW_LEDS is not set | ||
1111 | |||
1112 | # | ||
1113 | # LED drivers | ||
1114 | # | ||
1115 | |||
1116 | # | ||
1117 | # LED Triggers | ||
1118 | # | ||
1119 | |||
1120 | # | ||
1121 | # InfiniBand support | ||
1122 | # | ||
1123 | # CONFIG_INFINIBAND is not set | ||
1124 | |||
1125 | # | ||
1126 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
1127 | # | ||
1128 | |||
1129 | # | ||
1130 | # Real Time Clock | ||
1131 | # | ||
1132 | CONFIG_RTC_LIB=y | ||
1133 | CONFIG_RTC_CLASS=y | ||
1134 | CONFIG_RTC_HCTOSYS=y | ||
1135 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
1136 | # CONFIG_RTC_DEBUG is not set | ||
1137 | |||
1138 | # | ||
1139 | # RTC interfaces | ||
1140 | # | ||
1141 | CONFIG_RTC_INTF_SYSFS=y | ||
1142 | CONFIG_RTC_INTF_PROC=y | ||
1143 | CONFIG_RTC_INTF_DEV=y | ||
1144 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
1145 | |||
1146 | # | ||
1147 | # RTC drivers | ||
1148 | # | ||
1149 | # CONFIG_RTC_DRV_X1205 is not set | ||
1150 | CONFIG_RTC_DRV_DS1307=y | ||
1151 | # CONFIG_RTC_DRV_DS1553 is not set | ||
1152 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
1153 | # CONFIG_RTC_DRV_DS1672 is not set | ||
1154 | # CONFIG_RTC_DRV_DS1742 is not set | ||
1155 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
1156 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
1157 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
1158 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
1159 | # CONFIG_RTC_DRV_M48T86 is not set | ||
1160 | # CONFIG_RTC_DRV_TEST is not set | ||
1161 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
1162 | # CONFIG_RTC_DRV_V3020 is not set | ||
1163 | |||
1164 | # | ||
1165 | # DMA Engine support | ||
1166 | # | ||
1167 | CONFIG_DMA_ENGINE=y | ||
1168 | |||
1169 | # | ||
1170 | # DMA Clients | ||
1171 | # | ||
1172 | CONFIG_NET_DMA=y | ||
1173 | |||
1174 | # | ||
1175 | # DMA Devices | ||
1176 | # | ||
1177 | CONFIG_INTEL_IOATDMA=y | ||
1178 | |||
1179 | # | ||
1180 | # Virtualization | ||
1181 | # | ||
1182 | |||
1183 | # | ||
1184 | # File systems | ||
1185 | # | ||
1186 | CONFIG_EXT2_FS=y | ||
1187 | # CONFIG_EXT2_FS_XATTR is not set | ||
1188 | # CONFIG_EXT2_FS_XIP is not set | ||
1189 | CONFIG_EXT3_FS=y | ||
1190 | CONFIG_EXT3_FS_XATTR=y | ||
1191 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
1192 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1193 | # CONFIG_EXT4DEV_FS is not set | ||
1194 | CONFIG_JBD=y | ||
1195 | # CONFIG_JBD_DEBUG is not set | ||
1196 | CONFIG_FS_MBCACHE=y | ||
1197 | # CONFIG_REISERFS_FS is not set | ||
1198 | # CONFIG_JFS_FS is not set | ||
1199 | # CONFIG_FS_POSIX_ACL is not set | ||
1200 | # CONFIG_XFS_FS is not set | ||
1201 | # CONFIG_GFS2_FS is not set | ||
1202 | # CONFIG_OCFS2_FS is not set | ||
1203 | # CONFIG_MINIX_FS is not set | ||
1204 | # CONFIG_ROMFS_FS is not set | ||
1205 | CONFIG_INOTIFY=y | ||
1206 | CONFIG_INOTIFY_USER=y | ||
1207 | # CONFIG_QUOTA is not set | ||
1208 | CONFIG_DNOTIFY=y | ||
1209 | # CONFIG_AUTOFS_FS is not set | ||
1210 | # CONFIG_AUTOFS4_FS is not set | ||
1211 | # CONFIG_FUSE_FS is not set | ||
1212 | |||
1213 | # | ||
1214 | # CD-ROM/DVD Filesystems | ||
1215 | # | ||
1216 | # CONFIG_ISO9660_FS is not set | ||
1217 | # CONFIG_UDF_FS is not set | ||
1218 | |||
1219 | # | ||
1220 | # DOS/FAT/NT Filesystems | ||
1221 | # | ||
1222 | # CONFIG_MSDOS_FS is not set | ||
1223 | # CONFIG_VFAT_FS is not set | ||
1224 | # CONFIG_NTFS_FS is not set | ||
1225 | |||
1226 | # | ||
1227 | # Pseudo filesystems | ||
1228 | # | ||
1229 | CONFIG_PROC_FS=y | ||
1230 | CONFIG_PROC_KCORE=y | ||
1231 | CONFIG_PROC_SYSCTL=y | ||
1232 | CONFIG_SYSFS=y | ||
1233 | CONFIG_TMPFS=y | ||
1234 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1235 | # CONFIG_HUGETLB_PAGE is not set | ||
1236 | CONFIG_RAMFS=y | ||
1237 | # CONFIG_CONFIGFS_FS is not set | ||
1238 | |||
1239 | # | ||
1240 | # Miscellaneous filesystems | ||
1241 | # | ||
1242 | # CONFIG_ADFS_FS is not set | ||
1243 | # CONFIG_AFFS_FS is not set | ||
1244 | # CONFIG_HFS_FS is not set | ||
1245 | # CONFIG_HFSPLUS_FS is not set | ||
1246 | # CONFIG_BEFS_FS is not set | ||
1247 | # CONFIG_BFS_FS is not set | ||
1248 | # CONFIG_EFS_FS is not set | ||
1249 | # CONFIG_JFFS2_FS is not set | ||
1250 | # CONFIG_CRAMFS is not set | ||
1251 | # CONFIG_VXFS_FS is not set | ||
1252 | # CONFIG_HPFS_FS is not set | ||
1253 | # CONFIG_QNX4FS_FS is not set | ||
1254 | # CONFIG_SYSV_FS is not set | ||
1255 | # CONFIG_UFS_FS is not set | ||
1256 | |||
1257 | # | ||
1258 | # Network File Systems | ||
1259 | # | ||
1260 | CONFIG_NFS_FS=y | ||
1261 | CONFIG_NFS_V3=y | ||
1262 | # CONFIG_NFS_V3_ACL is not set | ||
1263 | CONFIG_NFS_V4=y | ||
1264 | # CONFIG_NFS_DIRECTIO is not set | ||
1265 | # CONFIG_NFSD is not set | ||
1266 | CONFIG_ROOT_NFS=y | ||
1267 | CONFIG_LOCKD=y | ||
1268 | CONFIG_LOCKD_V4=y | ||
1269 | CONFIG_NFS_COMMON=y | ||
1270 | CONFIG_SUNRPC=y | ||
1271 | CONFIG_SUNRPC_GSS=y | ||
1272 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1273 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1274 | # CONFIG_SMB_FS is not set | ||
1275 | # CONFIG_CIFS is not set | ||
1276 | # CONFIG_NCP_FS is not set | ||
1277 | # CONFIG_CODA_FS is not set | ||
1278 | # CONFIG_AFS_FS is not set | ||
1279 | # CONFIG_9P_FS is not set | ||
1280 | |||
1281 | # | ||
1282 | # Partition Types | ||
1283 | # | ||
1284 | CONFIG_PARTITION_ADVANCED=y | ||
1285 | # CONFIG_ACORN_PARTITION is not set | ||
1286 | # CONFIG_OSF_PARTITION is not set | ||
1287 | # CONFIG_AMIGA_PARTITION is not set | ||
1288 | # CONFIG_ATARI_PARTITION is not set | ||
1289 | # CONFIG_MAC_PARTITION is not set | ||
1290 | CONFIG_MSDOS_PARTITION=y | ||
1291 | # CONFIG_BSD_DISKLABEL is not set | ||
1292 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1293 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1294 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1295 | # CONFIG_LDM_PARTITION is not set | ||
1296 | # CONFIG_SGI_PARTITION is not set | ||
1297 | # CONFIG_ULTRIX_PARTITION is not set | ||
1298 | # CONFIG_SUN_PARTITION is not set | ||
1299 | # CONFIG_KARMA_PARTITION is not set | ||
1300 | # CONFIG_EFI_PARTITION is not set | ||
1301 | |||
1302 | # | ||
1303 | # Native Language Support | ||
1304 | # | ||
1305 | # CONFIG_NLS is not set | ||
1306 | |||
1307 | # | ||
1308 | # Distributed Lock Manager | ||
1309 | # | ||
1310 | # CONFIG_DLM is not set | ||
1311 | |||
1312 | # | ||
1313 | # Library routines | ||
1314 | # | ||
1315 | CONFIG_BITREVERSE=y | ||
1316 | # CONFIG_CRC_CCITT is not set | ||
1317 | # CONFIG_CRC16 is not set | ||
1318 | CONFIG_CRC32=y | ||
1319 | # CONFIG_LIBCRC32C is not set | ||
1320 | CONFIG_PLIST=y | ||
1321 | CONFIG_IOMAP_COPY=y | ||
1322 | |||
1323 | # | ||
1324 | # Instrumentation Support | ||
1325 | # | ||
1326 | # CONFIG_PROFILING is not set | ||
1327 | |||
1328 | # | ||
1329 | # Kernel hacking | ||
1330 | # | ||
1331 | # CONFIG_PRINTK_TIME is not set | ||
1332 | CONFIG_ENABLE_MUST_CHECK=y | ||
1333 | # CONFIG_MAGIC_SYSRQ is not set | ||
1334 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1335 | # CONFIG_DEBUG_FS is not set | ||
1336 | # CONFIG_HEADERS_CHECK is not set | ||
1337 | CONFIG_DEBUG_KERNEL=y | ||
1338 | CONFIG_LOG_BUF_SHIFT=14 | ||
1339 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1340 | # CONFIG_SCHEDSTATS is not set | ||
1341 | # CONFIG_DEBUG_SLAB is not set | ||
1342 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1343 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1344 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1345 | # CONFIG_DEBUG_MUTEXES is not set | ||
1346 | # CONFIG_DEBUG_RWSEMS is not set | ||
1347 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1348 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1349 | # CONFIG_DEBUG_KOBJECT is not set | ||
1350 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1351 | # CONFIG_DEBUG_INFO is not set | ||
1352 | # CONFIG_DEBUG_VM is not set | ||
1353 | # CONFIG_DEBUG_LIST is not set | ||
1354 | CONFIG_FORCED_INLINING=y | ||
1355 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1356 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1357 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1358 | # CONFIG_DEBUGGER is not set | ||
1359 | # CONFIG_BDI_SWITCH is not set | ||
1360 | # CONFIG_BOOTX_TEXT is not set | ||
1361 | # CONFIG_SERIAL_TEXT_DEBUG is not set | ||
1362 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1363 | |||
1364 | # | ||
1365 | # Security options | ||
1366 | # | ||
1367 | # CONFIG_KEYS is not set | ||
1368 | # CONFIG_SECURITY is not set | ||
1369 | |||
1370 | # | ||
1371 | # Cryptographic options | ||
1372 | # | ||
1373 | CONFIG_CRYPTO=y | ||
1374 | CONFIG_CRYPTO_ALGAPI=y | ||
1375 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1376 | CONFIG_CRYPTO_MANAGER=y | ||
1377 | # CONFIG_CRYPTO_HMAC is not set | ||
1378 | # CONFIG_CRYPTO_XCBC is not set | ||
1379 | # CONFIG_CRYPTO_NULL is not set | ||
1380 | # CONFIG_CRYPTO_MD4 is not set | ||
1381 | CONFIG_CRYPTO_MD5=y | ||
1382 | # CONFIG_CRYPTO_SHA1 is not set | ||
1383 | # CONFIG_CRYPTO_SHA256 is not set | ||
1384 | # CONFIG_CRYPTO_SHA512 is not set | ||
1385 | # CONFIG_CRYPTO_WP512 is not set | ||
1386 | # CONFIG_CRYPTO_TGR192 is not set | ||
1387 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1388 | # CONFIG_CRYPTO_ECB is not set | ||
1389 | CONFIG_CRYPTO_CBC=y | ||
1390 | # CONFIG_CRYPTO_LRW is not set | ||
1391 | CONFIG_CRYPTO_DES=y | ||
1392 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1393 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1394 | # CONFIG_CRYPTO_SERPENT is not set | ||
1395 | # CONFIG_CRYPTO_AES is not set | ||
1396 | # CONFIG_CRYPTO_CAST5 is not set | ||
1397 | # CONFIG_CRYPTO_CAST6 is not set | ||
1398 | # CONFIG_CRYPTO_TEA is not set | ||
1399 | # CONFIG_CRYPTO_ARC4 is not set | ||
1400 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1401 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1402 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1403 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1404 | # CONFIG_CRYPTO_CRC32C is not set | ||
1405 | # CONFIG_CRYPTO_TEST is not set | ||
1406 | |||
1407 | # | ||
1408 | # Hardware crypto devices | ||
1409 | # | ||
diff --git a/arch/powerpc/configs/mpc834x_itx_defconfig b/arch/powerpc/configs/mpc834x_itx_defconfig index 7902806429f8..23d8964846e0 100644 --- a/arch/powerpc/configs/mpc834x_itx_defconfig +++ b/arch/powerpc/configs/mpc834x_itx_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.20-rc5 | 3 | # Linux kernel version: 2.6.20 |
4 | # Fri Jan 26 00:19:02 2007 | 4 | # Wed Feb 7 13:12:18 2007 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | CONFIG_PPC32=y | 7 | CONFIG_PPC32=y |
@@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y | |||
34 | CONFIG_PPC_83xx=y | 34 | CONFIG_PPC_83xx=y |
35 | # CONFIG_PPC_85xx is not set | 35 | # CONFIG_PPC_85xx is not set |
36 | # CONFIG_PPC_86xx is not set | 36 | # CONFIG_PPC_86xx is not set |
37 | # CONFIG_PPC_8xx is not set | ||
37 | # CONFIG_40x is not set | 38 | # CONFIG_40x is not set |
38 | # CONFIG_44x is not set | 39 | # CONFIG_44x is not set |
39 | # CONFIG_8xx is not set | ||
40 | # CONFIG_E200 is not set | 40 | # CONFIG_E200 is not set |
41 | CONFIG_6xx=y | 41 | CONFIG_6xx=y |
42 | CONFIG_83xx=y | 42 | CONFIG_83xx=y |
@@ -178,7 +178,6 @@ CONFIG_FSL_SOC=y | |||
178 | CONFIG_PCI=y | 178 | CONFIG_PCI=y |
179 | CONFIG_PCI_DOMAINS=y | 179 | CONFIG_PCI_DOMAINS=y |
180 | # CONFIG_PCIEPORTBUS is not set | 180 | # CONFIG_PCIEPORTBUS is not set |
181 | # CONFIG_PCI_DEBUG is not set | ||
182 | 181 | ||
183 | # | 182 | # |
184 | # PCCARD (PCMCIA/CardBus) support | 183 | # PCCARD (PCMCIA/CardBus) support |
@@ -303,7 +302,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" | |||
303 | CONFIG_STANDALONE=y | 302 | CONFIG_STANDALONE=y |
304 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 303 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
305 | # CONFIG_FW_LOADER is not set | 304 | # CONFIG_FW_LOADER is not set |
306 | # CONFIG_DEBUG_DRIVER is not set | ||
307 | # CONFIG_SYS_HYPERVISOR is not set | 305 | # CONFIG_SYS_HYPERVISOR is not set |
308 | 306 | ||
309 | # | 307 | # |
@@ -523,6 +521,7 @@ CONFIG_SCSI_SPI_ATTRS=y | |||
523 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | 521 | # Serial ATA (prod) and Parallel ATA (experimental) drivers |
524 | # | 522 | # |
525 | CONFIG_ATA=y | 523 | CONFIG_ATA=y |
524 | # CONFIG_ATA_NONSTANDARD is not set | ||
526 | # CONFIG_SATA_AHCI is not set | 525 | # CONFIG_SATA_AHCI is not set |
527 | # CONFIG_SATA_SVW is not set | 526 | # CONFIG_SATA_SVW is not set |
528 | # CONFIG_ATA_PIIX is not set | 527 | # CONFIG_ATA_PIIX is not set |
@@ -647,37 +646,7 @@ CONFIG_CICADA_PHY=y | |||
647 | # | 646 | # |
648 | # Ethernet (10 or 100Mbit) | 647 | # Ethernet (10 or 100Mbit) |
649 | # | 648 | # |
650 | CONFIG_NET_ETHERNET=y | 649 | # CONFIG_NET_ETHERNET is not set |
651 | CONFIG_MII=y | ||
652 | # CONFIG_HAPPYMEAL is not set | ||
653 | # CONFIG_SUNGEM is not set | ||
654 | # CONFIG_CASSINI is not set | ||
655 | # CONFIG_NET_VENDOR_3COM is not set | ||
656 | |||
657 | # | ||
658 | # Tulip family network device support | ||
659 | # | ||
660 | # CONFIG_NET_TULIP is not set | ||
661 | # CONFIG_HP100 is not set | ||
662 | CONFIG_NET_PCI=y | ||
663 | # CONFIG_PCNET32 is not set | ||
664 | # CONFIG_AMD8111_ETH is not set | ||
665 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
666 | # CONFIG_B44 is not set | ||
667 | # CONFIG_FORCEDETH is not set | ||
668 | # CONFIG_DGRS is not set | ||
669 | # CONFIG_EEPRO100 is not set | ||
670 | CONFIG_E100=y | ||
671 | # CONFIG_FEALNX is not set | ||
672 | # CONFIG_NATSEMI is not set | ||
673 | # CONFIG_NE2K_PCI is not set | ||
674 | # CONFIG_8139CP is not set | ||
675 | # CONFIG_8139TOO is not set | ||
676 | # CONFIG_SIS900 is not set | ||
677 | # CONFIG_EPIC100 is not set | ||
678 | # CONFIG_SUNDANCE is not set | ||
679 | # CONFIG_TLAN is not set | ||
680 | # CONFIG_VIA_RHINE is not set | ||
681 | 650 | ||
682 | # | 651 | # |
683 | # Ethernet (1000 Mbit) | 652 | # Ethernet (1000 Mbit) |
@@ -693,7 +662,6 @@ CONFIG_E100=y | |||
693 | # CONFIG_SKGE is not set | 662 | # CONFIG_SKGE is not set |
694 | # CONFIG_SKY2 is not set | 663 | # CONFIG_SKY2 is not set |
695 | # CONFIG_SK98LIN is not set | 664 | # CONFIG_SK98LIN is not set |
696 | # CONFIG_VIA_VELOCITY is not set | ||
697 | # CONFIG_TIGON3 is not set | 665 | # CONFIG_TIGON3 is not set |
698 | # CONFIG_BNX2 is not set | 666 | # CONFIG_BNX2 is not set |
699 | CONFIG_GIANFAR=y | 667 | CONFIG_GIANFAR=y |
@@ -746,26 +714,7 @@ CONFIG_GFAR_NAPI=y | |||
746 | # | 714 | # |
747 | # Input device support | 715 | # Input device support |
748 | # | 716 | # |
749 | CONFIG_INPUT=y | 717 | # CONFIG_INPUT is not set |
750 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
751 | |||
752 | # | ||
753 | # Userland interfaces | ||
754 | # | ||
755 | # CONFIG_INPUT_MOUSEDEV is not set | ||
756 | # CONFIG_INPUT_JOYDEV is not set | ||
757 | # CONFIG_INPUT_TSDEV is not set | ||
758 | # CONFIG_INPUT_EVDEV is not set | ||
759 | # CONFIG_INPUT_EVBUG is not set | ||
760 | |||
761 | # | ||
762 | # Input Device Drivers | ||
763 | # | ||
764 | # CONFIG_INPUT_KEYBOARD is not set | ||
765 | # CONFIG_INPUT_MOUSE is not set | ||
766 | # CONFIG_INPUT_JOYSTICK is not set | ||
767 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
768 | # CONFIG_INPUT_MISC is not set | ||
769 | 718 | ||
770 | # | 719 | # |
771 | # Hardware I/O ports | 720 | # Hardware I/O ports |
@@ -784,7 +733,7 @@ CONFIG_INPUT=y | |||
784 | # | 733 | # |
785 | CONFIG_SERIAL_8250=y | 734 | CONFIG_SERIAL_8250=y |
786 | CONFIG_SERIAL_8250_CONSOLE=y | 735 | CONFIG_SERIAL_8250_CONSOLE=y |
787 | CONFIG_SERIAL_8250_PCI=y | 736 | # CONFIG_SERIAL_8250_PCI is not set |
788 | CONFIG_SERIAL_8250_NR_UARTS=4 | 737 | CONFIG_SERIAL_8250_NR_UARTS=4 |
789 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | 738 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 |
790 | # CONFIG_SERIAL_8250_EXTENDED is not set | 739 | # CONFIG_SERIAL_8250_EXTENDED is not set |
@@ -887,7 +836,7 @@ CONFIG_I2C_MPC=y | |||
887 | # CONFIG_SENSORS_DS1337 is not set | 836 | # CONFIG_SENSORS_DS1337 is not set |
888 | # CONFIG_SENSORS_DS1374 is not set | 837 | # CONFIG_SENSORS_DS1374 is not set |
889 | # CONFIG_SENSORS_EEPROM is not set | 838 | # CONFIG_SENSORS_EEPROM is not set |
890 | # CONFIG_SENSORS_PCF8574 is not set | 839 | CONFIG_SENSORS_PCF8574=y |
891 | # CONFIG_SENSORS_PCA9539 is not set | 840 | # CONFIG_SENSORS_PCA9539 is not set |
892 | # CONFIG_SENSORS_PCF8591 is not set | 841 | # CONFIG_SENSORS_PCF8591 is not set |
893 | # CONFIG_SENSORS_M41T00 is not set | 842 | # CONFIG_SENSORS_M41T00 is not set |
@@ -901,7 +850,6 @@ CONFIG_I2C_MPC=y | |||
901 | # SPI support | 850 | # SPI support |
902 | # | 851 | # |
903 | CONFIG_SPI=y | 852 | CONFIG_SPI=y |
904 | # CONFIG_SPI_DEBUG is not set | ||
905 | CONFIG_SPI_MASTER=y | 853 | CONFIG_SPI_MASTER=y |
906 | 854 | ||
907 | # | 855 | # |
@@ -922,52 +870,8 @@ CONFIG_SPI_MPC83xx=y | |||
922 | # | 870 | # |
923 | # Hardware Monitoring support | 871 | # Hardware Monitoring support |
924 | # | 872 | # |
925 | CONFIG_HWMON=y | 873 | # CONFIG_HWMON is not set |
926 | # CONFIG_HWMON_VID is not set | 874 | # CONFIG_HWMON_VID is not set |
927 | # CONFIG_SENSORS_ABITUGURU is not set | ||
928 | # CONFIG_SENSORS_ADM1021 is not set | ||
929 | # CONFIG_SENSORS_ADM1025 is not set | ||
930 | # CONFIG_SENSORS_ADM1026 is not set | ||
931 | # CONFIG_SENSORS_ADM1031 is not set | ||
932 | # CONFIG_SENSORS_ADM9240 is not set | ||
933 | # CONFIG_SENSORS_ASB100 is not set | ||
934 | # CONFIG_SENSORS_ATXP1 is not set | ||
935 | # CONFIG_SENSORS_DS1621 is not set | ||
936 | # CONFIG_SENSORS_F71805F is not set | ||
937 | # CONFIG_SENSORS_FSCHER is not set | ||
938 | # CONFIG_SENSORS_FSCPOS is not set | ||
939 | # CONFIG_SENSORS_GL518SM is not set | ||
940 | # CONFIG_SENSORS_GL520SM is not set | ||
941 | # CONFIG_SENSORS_IT87 is not set | ||
942 | # CONFIG_SENSORS_LM63 is not set | ||
943 | # CONFIG_SENSORS_LM70 is not set | ||
944 | # CONFIG_SENSORS_LM75 is not set | ||
945 | # CONFIG_SENSORS_LM77 is not set | ||
946 | # CONFIG_SENSORS_LM78 is not set | ||
947 | # CONFIG_SENSORS_LM80 is not set | ||
948 | # CONFIG_SENSORS_LM83 is not set | ||
949 | # CONFIG_SENSORS_LM85 is not set | ||
950 | # CONFIG_SENSORS_LM87 is not set | ||
951 | # CONFIG_SENSORS_LM90 is not set | ||
952 | # CONFIG_SENSORS_LM92 is not set | ||
953 | # CONFIG_SENSORS_MAX1619 is not set | ||
954 | # CONFIG_SENSORS_PC87360 is not set | ||
955 | # CONFIG_SENSORS_PC87427 is not set | ||
956 | # CONFIG_SENSORS_SIS5595 is not set | ||
957 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
958 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
959 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
960 | # CONFIG_SENSORS_VIA686A is not set | ||
961 | # CONFIG_SENSORS_VT1211 is not set | ||
962 | # CONFIG_SENSORS_VT8231 is not set | ||
963 | # CONFIG_SENSORS_W83781D is not set | ||
964 | # CONFIG_SENSORS_W83791D is not set | ||
965 | # CONFIG_SENSORS_W83792D is not set | ||
966 | # CONFIG_SENSORS_W83793 is not set | ||
967 | # CONFIG_SENSORS_W83L785TS is not set | ||
968 | # CONFIG_SENSORS_W83627HF is not set | ||
969 | # CONFIG_SENSORS_W83627EHF is not set | ||
970 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
971 | 875 | ||
972 | # | 876 | # |
973 | # Multimedia devices | 877 | # Multimedia devices |
@@ -983,7 +887,7 @@ CONFIG_HWMON=y | |||
983 | # | 887 | # |
984 | # Graphics support | 888 | # Graphics support |
985 | # | 889 | # |
986 | CONFIG_FIRMWARE_EDID=y | 890 | # CONFIG_FIRMWARE_EDID is not set |
987 | # CONFIG_FB is not set | 891 | # CONFIG_FB is not set |
988 | # CONFIG_FB_IBM_GXT4500 is not set | 892 | # CONFIG_FB_IBM_GXT4500 is not set |
989 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 893 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
@@ -994,11 +898,6 @@ CONFIG_FIRMWARE_EDID=y | |||
994 | # CONFIG_SOUND is not set | 898 | # CONFIG_SOUND is not set |
995 | 899 | ||
996 | # | 900 | # |
997 | # HID Devices | ||
998 | # | ||
999 | CONFIG_HID=y | ||
1000 | |||
1001 | # | ||
1002 | # USB support | 901 | # USB support |
1003 | # | 902 | # |
1004 | CONFIG_USB_ARCH_HAS_HCD=y | 903 | CONFIG_USB_ARCH_HAS_HCD=y |
@@ -1023,10 +922,8 @@ CONFIG_USB_EHCI_HCD=y | |||
1023 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | 922 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set |
1024 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | 923 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set |
1025 | # CONFIG_USB_ISP116X_HCD is not set | 924 | # CONFIG_USB_ISP116X_HCD is not set |
1026 | CONFIG_USB_OHCI_HCD=y | 925 | # CONFIG_USB_OHCI_HCD is not set |
1027 | # CONFIG_USB_OHCI_BIG_ENDIAN is not set | 926 | # CONFIG_USB_UHCI_HCD is not set |
1028 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1029 | CONFIG_USB_UHCI_HCD=y | ||
1030 | # CONFIG_USB_SL811_HCD is not set | 927 | # CONFIG_USB_SL811_HCD is not set |
1031 | 928 | ||
1032 | # | 929 | # |
@@ -1058,25 +955,10 @@ CONFIG_USB_STORAGE=y | |||
1058 | # | 955 | # |
1059 | # USB Input Devices | 956 | # USB Input Devices |
1060 | # | 957 | # |
1061 | # CONFIG_USB_HID is not set | ||
1062 | 958 | ||
1063 | # | 959 | # |
1064 | # USB HID Boot Protocol drivers | 960 | # USB HID Boot Protocol drivers |
1065 | # | 961 | # |
1066 | # CONFIG_USB_KBD is not set | ||
1067 | # CONFIG_USB_MOUSE is not set | ||
1068 | # CONFIG_USB_AIPTEK is not set | ||
1069 | # CONFIG_USB_WACOM is not set | ||
1070 | # CONFIG_USB_ACECAD is not set | ||
1071 | # CONFIG_USB_KBTAB is not set | ||
1072 | # CONFIG_USB_POWERMATE is not set | ||
1073 | # CONFIG_USB_TOUCHSCREEN is not set | ||
1074 | # CONFIG_USB_YEALINK is not set | ||
1075 | # CONFIG_USB_XPAD is not set | ||
1076 | # CONFIG_USB_ATI_REMOTE is not set | ||
1077 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
1078 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
1079 | # CONFIG_USB_APPLETOUCH is not set | ||
1080 | 962 | ||
1081 | # | 963 | # |
1082 | # USB Imaging devices | 964 | # USB Imaging devices |
@@ -1133,25 +1015,7 @@ CONFIG_USB_MON=y | |||
1133 | # | 1015 | # |
1134 | # USB Gadget Support | 1016 | # USB Gadget Support |
1135 | # | 1017 | # |
1136 | CONFIG_USB_GADGET=y | 1018 | # CONFIG_USB_GADGET is not set |
1137 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
1138 | CONFIG_USB_GADGET_SELECTED=y | ||
1139 | CONFIG_USB_GADGET_NET2280=y | ||
1140 | CONFIG_USB_NET2280=y | ||
1141 | # CONFIG_USB_GADGET_PXA2XX is not set | ||
1142 | # CONFIG_USB_GADGET_GOKU is not set | ||
1143 | # CONFIG_USB_GADGET_LH7A40X is not set | ||
1144 | # CONFIG_USB_GADGET_OMAP is not set | ||
1145 | # CONFIG_USB_GADGET_AT91 is not set | ||
1146 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
1147 | CONFIG_USB_GADGET_DUALSPEED=y | ||
1148 | # CONFIG_USB_ZERO is not set | ||
1149 | CONFIG_USB_ETH=y | ||
1150 | CONFIG_USB_ETH_RNDIS=y | ||
1151 | # CONFIG_USB_GADGETFS is not set | ||
1152 | # CONFIG_USB_FILE_STORAGE is not set | ||
1153 | # CONFIG_USB_G_SERIAL is not set | ||
1154 | # CONFIG_USB_MIDI_GADGET is not set | ||
1155 | 1019 | ||
1156 | # | 1020 | # |
1157 | # MMC/SD Card support | 1021 | # MMC/SD Card support |
@@ -1273,8 +1137,11 @@ CONFIG_DNOTIFY=y | |||
1273 | # | 1137 | # |
1274 | # DOS/FAT/NT Filesystems | 1138 | # DOS/FAT/NT Filesystems |
1275 | # | 1139 | # |
1276 | # CONFIG_MSDOS_FS is not set | 1140 | CONFIG_FAT_FS=y |
1277 | # CONFIG_VFAT_FS is not set | 1141 | CONFIG_MSDOS_FS=y |
1142 | CONFIG_VFAT_FS=y | ||
1143 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1144 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1278 | # CONFIG_NTFS_FS is not set | 1145 | # CONFIG_NTFS_FS is not set |
1279 | 1146 | ||
1280 | # | 1147 | # |
@@ -1340,7 +1207,7 @@ CONFIG_PARTITION_ADVANCED=y | |||
1340 | # CONFIG_OSF_PARTITION is not set | 1207 | # CONFIG_OSF_PARTITION is not set |
1341 | # CONFIG_AMIGA_PARTITION is not set | 1208 | # CONFIG_AMIGA_PARTITION is not set |
1342 | # CONFIG_ATARI_PARTITION is not set | 1209 | # CONFIG_ATARI_PARTITION is not set |
1343 | # CONFIG_MAC_PARTITION is not set | 1210 | CONFIG_MAC_PARTITION=y |
1344 | CONFIG_MSDOS_PARTITION=y | 1211 | CONFIG_MSDOS_PARTITION=y |
1345 | # CONFIG_BSD_DISKLABEL is not set | 1212 | # CONFIG_BSD_DISKLABEL is not set |
1346 | # CONFIG_MINIX_SUBPARTITION is not set | 1213 | # CONFIG_MINIX_SUBPARTITION is not set |
@@ -1356,7 +1223,46 @@ CONFIG_MSDOS_PARTITION=y | |||
1356 | # | 1223 | # |
1357 | # Native Language Support | 1224 | # Native Language Support |
1358 | # | 1225 | # |
1359 | # CONFIG_NLS is not set | 1226 | CONFIG_NLS=y |
1227 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1228 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1229 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1230 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1231 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1232 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1233 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1234 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1235 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1236 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1237 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1238 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1239 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1240 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1241 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1242 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1243 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1244 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1245 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1246 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1247 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1248 | # CONFIG_NLS_ISO8859_8 is not set | ||
1249 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1250 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1251 | # CONFIG_NLS_ASCII is not set | ||
1252 | # CONFIG_NLS_ISO8859_1 is not set | ||
1253 | # CONFIG_NLS_ISO8859_2 is not set | ||
1254 | # CONFIG_NLS_ISO8859_3 is not set | ||
1255 | # CONFIG_NLS_ISO8859_4 is not set | ||
1256 | # CONFIG_NLS_ISO8859_5 is not set | ||
1257 | # CONFIG_NLS_ISO8859_6 is not set | ||
1258 | # CONFIG_NLS_ISO8859_7 is not set | ||
1259 | # CONFIG_NLS_ISO8859_9 is not set | ||
1260 | # CONFIG_NLS_ISO8859_13 is not set | ||
1261 | # CONFIG_NLS_ISO8859_14 is not set | ||
1262 | # CONFIG_NLS_ISO8859_15 is not set | ||
1263 | # CONFIG_NLS_KOI8_R is not set | ||
1264 | # CONFIG_NLS_KOI8_U is not set | ||
1265 | # CONFIG_NLS_UTF8 is not set | ||
1360 | 1266 | ||
1361 | # | 1267 | # |
1362 | # Distributed Lock Manager | 1268 | # Distributed Lock Manager |
@@ -1388,27 +1294,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1388 | # CONFIG_UNUSED_SYMBOLS is not set | 1294 | # CONFIG_UNUSED_SYMBOLS is not set |
1389 | # CONFIG_DEBUG_FS is not set | 1295 | # CONFIG_DEBUG_FS is not set |
1390 | # CONFIG_HEADERS_CHECK is not set | 1296 | # CONFIG_HEADERS_CHECK is not set |
1391 | CONFIG_DEBUG_KERNEL=y | 1297 | # CONFIG_DEBUG_KERNEL is not set |
1392 | CONFIG_LOG_BUF_SHIFT=14 | 1298 | CONFIG_LOG_BUF_SHIFT=14 |
1393 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1394 | # CONFIG_SCHEDSTATS is not set | ||
1395 | # CONFIG_DEBUG_SLAB is not set | ||
1396 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1397 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1398 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1399 | # CONFIG_DEBUG_MUTEXES is not set | ||
1400 | # CONFIG_DEBUG_RWSEMS is not set | ||
1401 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1402 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1403 | # CONFIG_DEBUG_KOBJECT is not set | ||
1404 | # CONFIG_DEBUG_BUGVERBOSE is not set | 1299 | # CONFIG_DEBUG_BUGVERBOSE is not set |
1405 | # CONFIG_DEBUG_INFO is not set | ||
1406 | # CONFIG_DEBUG_VM is not set | ||
1407 | # CONFIG_DEBUG_LIST is not set | ||
1408 | CONFIG_FORCED_INLINING=y | ||
1409 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1410 | # CONFIG_DEBUGGER is not set | ||
1411 | # CONFIG_BDI_SWITCH is not set | ||
1412 | # CONFIG_BOOTX_TEXT is not set | 1300 | # CONFIG_BOOTX_TEXT is not set |
1413 | # CONFIG_SERIAL_TEXT_DEBUG is not set | 1301 | # CONFIG_SERIAL_TEXT_DEBUG is not set |
1414 | # CONFIG_PPC_EARLY_DEBUG is not set | 1302 | # CONFIG_PPC_EARLY_DEBUG is not set |
diff --git a/arch/powerpc/configs/mpc834x_itxgp_defconfig b/arch/powerpc/configs/mpc834x_itxgp_defconfig new file mode 100644 index 000000000000..4aa666c9cb94 --- /dev/null +++ b/arch/powerpc/configs/mpc834x_itxgp_defconfig | |||
@@ -0,0 +1,1174 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.20 | ||
4 | # Fri Feb 9 13:28:19 2007 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_IRQ_PER_CPU=y | ||
12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
13 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
14 | CONFIG_GENERIC_HWEIGHT=y | ||
15 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
16 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
17 | CONFIG_PPC=y | ||
18 | CONFIG_EARLY_PRINTK=y | ||
19 | CONFIG_GENERIC_NVRAM=y | ||
20 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
21 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
22 | CONFIG_PPC_OF=y | ||
23 | CONFIG_PPC_UDBG_16550=y | ||
24 | # CONFIG_GENERIC_TBSYNC is not set | ||
25 | CONFIG_AUDIT_ARCH=y | ||
26 | CONFIG_GENERIC_BUG=y | ||
27 | CONFIG_DEFAULT_UIMAGE=y | ||
28 | |||
29 | # | ||
30 | # Processor support | ||
31 | # | ||
32 | # CONFIG_CLASSIC32 is not set | ||
33 | # CONFIG_PPC_82xx is not set | ||
34 | CONFIG_PPC_83xx=y | ||
35 | # CONFIG_PPC_85xx is not set | ||
36 | # CONFIG_PPC_86xx is not set | ||
37 | # CONFIG_PPC_8xx is not set | ||
38 | # CONFIG_40x is not set | ||
39 | # CONFIG_44x is not set | ||
40 | # CONFIG_E200 is not set | ||
41 | CONFIG_6xx=y | ||
42 | CONFIG_83xx=y | ||
43 | CONFIG_PPC_FPU=y | ||
44 | # CONFIG_PPC_DCR_NATIVE is not set | ||
45 | # CONFIG_PPC_DCR_MMIO is not set | ||
46 | CONFIG_PPC_STD_MMU=y | ||
47 | CONFIG_PPC_STD_MMU_32=y | ||
48 | # CONFIG_SMP is not set | ||
49 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
50 | |||
51 | # | ||
52 | # Code maturity level options | ||
53 | # | ||
54 | CONFIG_EXPERIMENTAL=y | ||
55 | CONFIG_BROKEN_ON_SMP=y | ||
56 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
57 | |||
58 | # | ||
59 | # General setup | ||
60 | # | ||
61 | CONFIG_LOCALVERSION="" | ||
62 | CONFIG_LOCALVERSION_AUTO=y | ||
63 | CONFIG_SWAP=y | ||
64 | CONFIG_SYSVIPC=y | ||
65 | # CONFIG_IPC_NS is not set | ||
66 | # CONFIG_POSIX_MQUEUE is not set | ||
67 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
68 | # CONFIG_TASKSTATS is not set | ||
69 | # CONFIG_UTS_NS is not set | ||
70 | # CONFIG_AUDIT is not set | ||
71 | # CONFIG_IKCONFIG is not set | ||
72 | CONFIG_SYSFS_DEPRECATED=y | ||
73 | # CONFIG_RELAY is not set | ||
74 | CONFIG_INITRAMFS_SOURCE="" | ||
75 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
76 | CONFIG_SYSCTL=y | ||
77 | CONFIG_EMBEDDED=y | ||
78 | CONFIG_SYSCTL_SYSCALL=y | ||
79 | # CONFIG_KALLSYMS is not set | ||
80 | CONFIG_HOTPLUG=y | ||
81 | CONFIG_PRINTK=y | ||
82 | CONFIG_BUG=y | ||
83 | CONFIG_ELF_CORE=y | ||
84 | CONFIG_BASE_FULL=y | ||
85 | CONFIG_FUTEX=y | ||
86 | # CONFIG_EPOLL is not set | ||
87 | CONFIG_SHMEM=y | ||
88 | CONFIG_SLAB=y | ||
89 | CONFIG_VM_EVENT_COUNTERS=y | ||
90 | CONFIG_RT_MUTEXES=y | ||
91 | # CONFIG_TINY_SHMEM is not set | ||
92 | CONFIG_BASE_SMALL=0 | ||
93 | # CONFIG_SLOB is not set | ||
94 | |||
95 | # | ||
96 | # Loadable module support | ||
97 | # | ||
98 | CONFIG_MODULES=y | ||
99 | CONFIG_MODULE_UNLOAD=y | ||
100 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
101 | # CONFIG_MODVERSIONS is not set | ||
102 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
103 | # CONFIG_KMOD is not set | ||
104 | |||
105 | # | ||
106 | # Block layer | ||
107 | # | ||
108 | CONFIG_BLOCK=y | ||
109 | # CONFIG_LBD is not set | ||
110 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
111 | # CONFIG_LSF is not set | ||
112 | |||
113 | # | ||
114 | # IO Schedulers | ||
115 | # | ||
116 | CONFIG_IOSCHED_NOOP=y | ||
117 | CONFIG_IOSCHED_AS=y | ||
118 | CONFIG_IOSCHED_DEADLINE=y | ||
119 | CONFIG_IOSCHED_CFQ=y | ||
120 | CONFIG_DEFAULT_AS=y | ||
121 | # CONFIG_DEFAULT_DEADLINE is not set | ||
122 | # CONFIG_DEFAULT_CFQ is not set | ||
123 | # CONFIG_DEFAULT_NOOP is not set | ||
124 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
125 | CONFIG_PPC_GEN550=y | ||
126 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
127 | |||
128 | # | ||
129 | # Platform support | ||
130 | # | ||
131 | # CONFIG_MPC832x_MDS is not set | ||
132 | # CONFIG_MPC834x_SYS is not set | ||
133 | CONFIG_MPC834x_ITX=y | ||
134 | # CONFIG_MPC8360E_PB is not set | ||
135 | CONFIG_MPC834x=y | ||
136 | # CONFIG_MPIC is not set | ||
137 | |||
138 | # | ||
139 | # Kernel options | ||
140 | # | ||
141 | # CONFIG_HIGHMEM is not set | ||
142 | # CONFIG_HZ_100 is not set | ||
143 | CONFIG_HZ_250=y | ||
144 | # CONFIG_HZ_300 is not set | ||
145 | # CONFIG_HZ_1000 is not set | ||
146 | CONFIG_HZ=250 | ||
147 | CONFIG_PREEMPT_NONE=y | ||
148 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
149 | # CONFIG_PREEMPT is not set | ||
150 | CONFIG_BINFMT_ELF=y | ||
151 | # CONFIG_BINFMT_MISC is not set | ||
152 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
153 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
154 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
155 | CONFIG_SELECT_MEMORY_MODEL=y | ||
156 | CONFIG_FLATMEM_MANUAL=y | ||
157 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
158 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
159 | CONFIG_FLATMEM=y | ||
160 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
161 | # CONFIG_SPARSEMEM_STATIC is not set | ||
162 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
163 | # CONFIG_RESOURCES_64BIT is not set | ||
164 | CONFIG_PROC_DEVICETREE=y | ||
165 | # CONFIG_CMDLINE_BOOL is not set | ||
166 | # CONFIG_PM is not set | ||
167 | CONFIG_SECCOMP=y | ||
168 | CONFIG_ISA_DMA_API=y | ||
169 | |||
170 | # | ||
171 | # Bus options | ||
172 | # | ||
173 | CONFIG_GENERIC_ISA_DMA=y | ||
174 | # CONFIG_MPIC_WEIRD is not set | ||
175 | # CONFIG_PPC_I8259 is not set | ||
176 | CONFIG_PPC_INDIRECT_PCI=y | ||
177 | CONFIG_FSL_SOC=y | ||
178 | CONFIG_PCI=y | ||
179 | CONFIG_PCI_DOMAINS=y | ||
180 | # CONFIG_PCIEPORTBUS is not set | ||
181 | |||
182 | # | ||
183 | # PCCARD (PCMCIA/CardBus) support | ||
184 | # | ||
185 | # CONFIG_PCCARD is not set | ||
186 | |||
187 | # | ||
188 | # PCI Hotplug Support | ||
189 | # | ||
190 | # CONFIG_HOTPLUG_PCI is not set | ||
191 | |||
192 | # | ||
193 | # Advanced setup | ||
194 | # | ||
195 | # CONFIG_ADVANCED_OPTIONS is not set | ||
196 | |||
197 | # | ||
198 | # Default settings for advanced configuration options are used | ||
199 | # | ||
200 | CONFIG_HIGHMEM_START=0xfe000000 | ||
201 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
202 | CONFIG_KERNEL_START=0xc0000000 | ||
203 | CONFIG_TASK_SIZE=0x80000000 | ||
204 | CONFIG_BOOT_LOAD=0x00800000 | ||
205 | |||
206 | # | ||
207 | # Networking | ||
208 | # | ||
209 | CONFIG_NET=y | ||
210 | |||
211 | # | ||
212 | # Networking options | ||
213 | # | ||
214 | # CONFIG_NETDEBUG is not set | ||
215 | CONFIG_PACKET=y | ||
216 | # CONFIG_PACKET_MMAP is not set | ||
217 | CONFIG_UNIX=y | ||
218 | CONFIG_XFRM=y | ||
219 | # CONFIG_XFRM_USER is not set | ||
220 | # CONFIG_XFRM_SUB_POLICY is not set | ||
221 | # CONFIG_NET_KEY is not set | ||
222 | CONFIG_INET=y | ||
223 | CONFIG_IP_MULTICAST=y | ||
224 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
225 | CONFIG_IP_FIB_HASH=y | ||
226 | CONFIG_IP_PNP=y | ||
227 | CONFIG_IP_PNP_DHCP=y | ||
228 | CONFIG_IP_PNP_BOOTP=y | ||
229 | # CONFIG_IP_PNP_RARP is not set | ||
230 | # CONFIG_NET_IPIP is not set | ||
231 | # CONFIG_NET_IPGRE is not set | ||
232 | # CONFIG_IP_MROUTE is not set | ||
233 | # CONFIG_ARPD is not set | ||
234 | CONFIG_SYN_COOKIES=y | ||
235 | # CONFIG_INET_AH is not set | ||
236 | # CONFIG_INET_ESP is not set | ||
237 | # CONFIG_INET_IPCOMP is not set | ||
238 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
239 | # CONFIG_INET_TUNNEL is not set | ||
240 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
241 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
242 | CONFIG_INET_XFRM_MODE_BEET=y | ||
243 | CONFIG_INET_DIAG=y | ||
244 | CONFIG_INET_TCP_DIAG=y | ||
245 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
246 | CONFIG_TCP_CONG_CUBIC=y | ||
247 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
248 | # CONFIG_TCP_MD5SIG is not set | ||
249 | # CONFIG_IPV6 is not set | ||
250 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
251 | # CONFIG_INET6_TUNNEL is not set | ||
252 | # CONFIG_NETWORK_SECMARK is not set | ||
253 | # CONFIG_NETFILTER is not set | ||
254 | |||
255 | # | ||
256 | # DCCP Configuration (EXPERIMENTAL) | ||
257 | # | ||
258 | # CONFIG_IP_DCCP is not set | ||
259 | |||
260 | # | ||
261 | # SCTP Configuration (EXPERIMENTAL) | ||
262 | # | ||
263 | # CONFIG_IP_SCTP is not set | ||
264 | |||
265 | # | ||
266 | # TIPC Configuration (EXPERIMENTAL) | ||
267 | # | ||
268 | # CONFIG_TIPC is not set | ||
269 | # CONFIG_ATM is not set | ||
270 | # CONFIG_BRIDGE is not set | ||
271 | # CONFIG_VLAN_8021Q is not set | ||
272 | # CONFIG_DECNET is not set | ||
273 | # CONFIG_LLC2 is not set | ||
274 | # CONFIG_IPX is not set | ||
275 | # CONFIG_ATALK is not set | ||
276 | # CONFIG_X25 is not set | ||
277 | # CONFIG_LAPB is not set | ||
278 | # CONFIG_ECONET is not set | ||
279 | # CONFIG_WAN_ROUTER is not set | ||
280 | |||
281 | # | ||
282 | # QoS and/or fair queueing | ||
283 | # | ||
284 | # CONFIG_NET_SCHED is not set | ||
285 | |||
286 | # | ||
287 | # Network testing | ||
288 | # | ||
289 | # CONFIG_NET_PKTGEN is not set | ||
290 | # CONFIG_HAMRADIO is not set | ||
291 | # CONFIG_IRDA is not set | ||
292 | # CONFIG_BT is not set | ||
293 | # CONFIG_IEEE80211 is not set | ||
294 | |||
295 | # | ||
296 | # Device Drivers | ||
297 | # | ||
298 | |||
299 | # | ||
300 | # Generic Driver Options | ||
301 | # | ||
302 | CONFIG_STANDALONE=y | ||
303 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
304 | # CONFIG_FW_LOADER is not set | ||
305 | # CONFIG_SYS_HYPERVISOR is not set | ||
306 | |||
307 | # | ||
308 | # Connector - unified userspace <-> kernelspace linker | ||
309 | # | ||
310 | # CONFIG_CONNECTOR is not set | ||
311 | |||
312 | # | ||
313 | # Memory Technology Devices (MTD) | ||
314 | # | ||
315 | CONFIG_MTD=y | ||
316 | # CONFIG_MTD_DEBUG is not set | ||
317 | # CONFIG_MTD_CONCAT is not set | ||
318 | # CONFIG_MTD_PARTITIONS is not set | ||
319 | |||
320 | # | ||
321 | # User Modules And Translation Layers | ||
322 | # | ||
323 | CONFIG_MTD_CHAR=y | ||
324 | # CONFIG_MTD_BLKDEVS is not set | ||
325 | # CONFIG_MTD_BLOCK is not set | ||
326 | # CONFIG_MTD_BLOCK_RO is not set | ||
327 | # CONFIG_FTL is not set | ||
328 | # CONFIG_NFTL is not set | ||
329 | # CONFIG_INFTL is not set | ||
330 | # CONFIG_RFD_FTL is not set | ||
331 | # CONFIG_SSFDC is not set | ||
332 | |||
333 | # | ||
334 | # RAM/ROM/Flash chip drivers | ||
335 | # | ||
336 | CONFIG_MTD_CFI=y | ||
337 | # CONFIG_MTD_JEDECPROBE is not set | ||
338 | CONFIG_MTD_GEN_PROBE=y | ||
339 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
340 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
341 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
342 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
343 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
344 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
345 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
346 | CONFIG_MTD_CFI_I1=y | ||
347 | CONFIG_MTD_CFI_I2=y | ||
348 | # CONFIG_MTD_CFI_I4 is not set | ||
349 | # CONFIG_MTD_CFI_I8 is not set | ||
350 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
351 | CONFIG_MTD_CFI_AMDSTD=y | ||
352 | # CONFIG_MTD_CFI_STAA is not set | ||
353 | CONFIG_MTD_CFI_UTIL=y | ||
354 | # CONFIG_MTD_RAM is not set | ||
355 | # CONFIG_MTD_ROM is not set | ||
356 | # CONFIG_MTD_ABSENT is not set | ||
357 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
358 | |||
359 | # | ||
360 | # Mapping drivers for chip access | ||
361 | # | ||
362 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
363 | CONFIG_MTD_PHYSMAP=y | ||
364 | CONFIG_MTD_PHYSMAP_START=0xfe000000 | ||
365 | CONFIG_MTD_PHYSMAP_LEN=0x800000 | ||
366 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
367 | # CONFIG_MTD_PHYSMAP_OF is not set | ||
368 | # CONFIG_MTD_PLATRAM is not set | ||
369 | |||
370 | # | ||
371 | # Self-contained MTD device drivers | ||
372 | # | ||
373 | # CONFIG_MTD_PMC551 is not set | ||
374 | # CONFIG_MTD_DATAFLASH is not set | ||
375 | # CONFIG_MTD_M25P80 is not set | ||
376 | # CONFIG_MTD_SLRAM is not set | ||
377 | # CONFIG_MTD_PHRAM is not set | ||
378 | # CONFIG_MTD_MTDRAM is not set | ||
379 | # CONFIG_MTD_BLOCK2MTD is not set | ||
380 | |||
381 | # | ||
382 | # Disk-On-Chip Device Drivers | ||
383 | # | ||
384 | # CONFIG_MTD_DOC2000 is not set | ||
385 | # CONFIG_MTD_DOC2001 is not set | ||
386 | # CONFIG_MTD_DOC2001PLUS is not set | ||
387 | |||
388 | # | ||
389 | # NAND Flash Device Drivers | ||
390 | # | ||
391 | # CONFIG_MTD_NAND is not set | ||
392 | # CONFIG_MTD_NAND_CAFE is not set | ||
393 | |||
394 | # | ||
395 | # OneNAND Flash Device Drivers | ||
396 | # | ||
397 | # CONFIG_MTD_ONENAND is not set | ||
398 | |||
399 | # | ||
400 | # Parallel port support | ||
401 | # | ||
402 | # CONFIG_PARPORT is not set | ||
403 | |||
404 | # | ||
405 | # Plug and Play support | ||
406 | # | ||
407 | |||
408 | # | ||
409 | # Block devices | ||
410 | # | ||
411 | # CONFIG_BLK_DEV_FD is not set | ||
412 | # CONFIG_BLK_CPQ_DA is not set | ||
413 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
414 | # CONFIG_BLK_DEV_DAC960 is not set | ||
415 | # CONFIG_BLK_DEV_UMEM is not set | ||
416 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
417 | CONFIG_BLK_DEV_LOOP=y | ||
418 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
419 | # CONFIG_BLK_DEV_NBD is not set | ||
420 | # CONFIG_BLK_DEV_SX8 is not set | ||
421 | CONFIG_BLK_DEV_RAM=y | ||
422 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
423 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
424 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
425 | CONFIG_BLK_DEV_INITRD=y | ||
426 | # CONFIG_CDROM_PKTCDVD is not set | ||
427 | # CONFIG_ATA_OVER_ETH is not set | ||
428 | |||
429 | # | ||
430 | # Misc devices | ||
431 | # | ||
432 | # CONFIG_SGI_IOC4 is not set | ||
433 | # CONFIG_TIFM_CORE is not set | ||
434 | |||
435 | # | ||
436 | # ATA/ATAPI/MFM/RLL support | ||
437 | # | ||
438 | # CONFIG_IDE is not set | ||
439 | |||
440 | # | ||
441 | # SCSI device support | ||
442 | # | ||
443 | # CONFIG_RAID_ATTRS is not set | ||
444 | CONFIG_SCSI=y | ||
445 | # CONFIG_SCSI_TGT is not set | ||
446 | # CONFIG_SCSI_NETLINK is not set | ||
447 | CONFIG_SCSI_PROC_FS=y | ||
448 | |||
449 | # | ||
450 | # SCSI support type (disk, tape, CD-ROM) | ||
451 | # | ||
452 | CONFIG_BLK_DEV_SD=y | ||
453 | # CONFIG_CHR_DEV_ST is not set | ||
454 | # CONFIG_CHR_DEV_OSST is not set | ||
455 | # CONFIG_BLK_DEV_SR is not set | ||
456 | CONFIG_CHR_DEV_SG=y | ||
457 | # CONFIG_CHR_DEV_SCH is not set | ||
458 | |||
459 | # | ||
460 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
461 | # | ||
462 | # CONFIG_SCSI_MULTI_LUN is not set | ||
463 | # CONFIG_SCSI_CONSTANTS is not set | ||
464 | # CONFIG_SCSI_LOGGING is not set | ||
465 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
466 | |||
467 | # | ||
468 | # SCSI Transports | ||
469 | # | ||
470 | CONFIG_SCSI_SPI_ATTRS=y | ||
471 | # CONFIG_SCSI_FC_ATTRS is not set | ||
472 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
473 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
474 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
475 | |||
476 | # | ||
477 | # SCSI low-level drivers | ||
478 | # | ||
479 | # CONFIG_ISCSI_TCP is not set | ||
480 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
481 | # CONFIG_SCSI_3W_9XXX is not set | ||
482 | # CONFIG_SCSI_ACARD is not set | ||
483 | # CONFIG_SCSI_AACRAID is not set | ||
484 | # CONFIG_SCSI_AIC7XXX is not set | ||
485 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
486 | # CONFIG_SCSI_AIC79XX is not set | ||
487 | # CONFIG_SCSI_AIC94XX is not set | ||
488 | # CONFIG_SCSI_DPT_I2O is not set | ||
489 | # CONFIG_SCSI_ARCMSR is not set | ||
490 | # CONFIG_MEGARAID_NEWGEN is not set | ||
491 | # CONFIG_MEGARAID_LEGACY is not set | ||
492 | # CONFIG_MEGARAID_SAS is not set | ||
493 | # CONFIG_SCSI_HPTIOP is not set | ||
494 | # CONFIG_SCSI_BUSLOGIC is not set | ||
495 | # CONFIG_SCSI_DMX3191D is not set | ||
496 | # CONFIG_SCSI_EATA is not set | ||
497 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
498 | # CONFIG_SCSI_GDTH is not set | ||
499 | # CONFIG_SCSI_IPS is not set | ||
500 | # CONFIG_SCSI_INITIO is not set | ||
501 | # CONFIG_SCSI_INIA100 is not set | ||
502 | # CONFIG_SCSI_STEX is not set | ||
503 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
504 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
505 | # CONFIG_SCSI_QLA_FC is not set | ||
506 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
507 | # CONFIG_SCSI_LPFC is not set | ||
508 | # CONFIG_SCSI_DC395x is not set | ||
509 | # CONFIG_SCSI_DC390T is not set | ||
510 | # CONFIG_SCSI_NSP32 is not set | ||
511 | # CONFIG_SCSI_DEBUG is not set | ||
512 | # CONFIG_SCSI_SRP is not set | ||
513 | |||
514 | # | ||
515 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
516 | # | ||
517 | # CONFIG_ATA is not set | ||
518 | |||
519 | # | ||
520 | # Multi-device support (RAID and LVM) | ||
521 | # | ||
522 | # CONFIG_MD is not set | ||
523 | |||
524 | # | ||
525 | # Fusion MPT device support | ||
526 | # | ||
527 | # CONFIG_FUSION is not set | ||
528 | # CONFIG_FUSION_SPI is not set | ||
529 | # CONFIG_FUSION_FC is not set | ||
530 | # CONFIG_FUSION_SAS is not set | ||
531 | |||
532 | # | ||
533 | # IEEE 1394 (FireWire) support | ||
534 | # | ||
535 | # CONFIG_IEEE1394 is not set | ||
536 | |||
537 | # | ||
538 | # I2O device support | ||
539 | # | ||
540 | # CONFIG_I2O is not set | ||
541 | |||
542 | # | ||
543 | # Macintosh device drivers | ||
544 | # | ||
545 | # CONFIG_MAC_EMUMOUSEBTN is not set | ||
546 | # CONFIG_WINDFARM is not set | ||
547 | |||
548 | # | ||
549 | # Network device support | ||
550 | # | ||
551 | CONFIG_NETDEVICES=y | ||
552 | # CONFIG_DUMMY is not set | ||
553 | # CONFIG_BONDING is not set | ||
554 | # CONFIG_EQUALIZER is not set | ||
555 | # CONFIG_TUN is not set | ||
556 | |||
557 | # | ||
558 | # ARCnet devices | ||
559 | # | ||
560 | # CONFIG_ARCNET is not set | ||
561 | |||
562 | # | ||
563 | # PHY device support | ||
564 | # | ||
565 | CONFIG_PHYLIB=y | ||
566 | |||
567 | # | ||
568 | # MII PHY device drivers | ||
569 | # | ||
570 | # CONFIG_MARVELL_PHY is not set | ||
571 | # CONFIG_DAVICOM_PHY is not set | ||
572 | # CONFIG_QSEMI_PHY is not set | ||
573 | # CONFIG_LXT_PHY is not set | ||
574 | CONFIG_CICADA_PHY=y | ||
575 | # CONFIG_VITESSE_PHY is not set | ||
576 | # CONFIG_SMSC_PHY is not set | ||
577 | # CONFIG_BROADCOM_PHY is not set | ||
578 | # CONFIG_FIXED_PHY is not set | ||
579 | |||
580 | # | ||
581 | # Ethernet (10 or 100Mbit) | ||
582 | # | ||
583 | # CONFIG_NET_ETHERNET is not set | ||
584 | |||
585 | # | ||
586 | # Ethernet (1000 Mbit) | ||
587 | # | ||
588 | # CONFIG_ACENIC is not set | ||
589 | # CONFIG_DL2K is not set | ||
590 | # CONFIG_E1000 is not set | ||
591 | # CONFIG_NS83820 is not set | ||
592 | # CONFIG_HAMACHI is not set | ||
593 | # CONFIG_YELLOWFIN is not set | ||
594 | # CONFIG_R8169 is not set | ||
595 | # CONFIG_SIS190 is not set | ||
596 | # CONFIG_SKGE is not set | ||
597 | # CONFIG_SKY2 is not set | ||
598 | # CONFIG_SK98LIN is not set | ||
599 | # CONFIG_TIGON3 is not set | ||
600 | # CONFIG_BNX2 is not set | ||
601 | CONFIG_GIANFAR=y | ||
602 | CONFIG_GFAR_NAPI=y | ||
603 | # CONFIG_QLA3XXX is not set | ||
604 | |||
605 | # | ||
606 | # Ethernet (10000 Mbit) | ||
607 | # | ||
608 | # CONFIG_CHELSIO_T1 is not set | ||
609 | # CONFIG_IXGB is not set | ||
610 | # CONFIG_S2IO is not set | ||
611 | # CONFIG_MYRI10GE is not set | ||
612 | # CONFIG_NETXEN_NIC is not set | ||
613 | |||
614 | # | ||
615 | # Token Ring devices | ||
616 | # | ||
617 | # CONFIG_TR is not set | ||
618 | |||
619 | # | ||
620 | # Wireless LAN (non-hamradio) | ||
621 | # | ||
622 | # CONFIG_NET_RADIO is not set | ||
623 | |||
624 | # | ||
625 | # Wan interfaces | ||
626 | # | ||
627 | # CONFIG_WAN is not set | ||
628 | # CONFIG_FDDI is not set | ||
629 | # CONFIG_HIPPI is not set | ||
630 | # CONFIG_PPP is not set | ||
631 | # CONFIG_SLIP is not set | ||
632 | # CONFIG_NET_FC is not set | ||
633 | # CONFIG_SHAPER is not set | ||
634 | # CONFIG_NETCONSOLE is not set | ||
635 | # CONFIG_NETPOLL is not set | ||
636 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
637 | |||
638 | # | ||
639 | # ISDN subsystem | ||
640 | # | ||
641 | # CONFIG_ISDN is not set | ||
642 | |||
643 | # | ||
644 | # Telephony Support | ||
645 | # | ||
646 | # CONFIG_PHONE is not set | ||
647 | |||
648 | # | ||
649 | # Input device support | ||
650 | # | ||
651 | # CONFIG_INPUT is not set | ||
652 | |||
653 | # | ||
654 | # Hardware I/O ports | ||
655 | # | ||
656 | # CONFIG_SERIO is not set | ||
657 | # CONFIG_GAMEPORT is not set | ||
658 | |||
659 | # | ||
660 | # Character devices | ||
661 | # | ||
662 | # CONFIG_VT is not set | ||
663 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
664 | |||
665 | # | ||
666 | # Serial drivers | ||
667 | # | ||
668 | CONFIG_SERIAL_8250=y | ||
669 | CONFIG_SERIAL_8250_CONSOLE=y | ||
670 | # CONFIG_SERIAL_8250_PCI is not set | ||
671 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
672 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
673 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
674 | |||
675 | # | ||
676 | # Non-8250 serial port support | ||
677 | # | ||
678 | # CONFIG_SERIAL_UARTLITE is not set | ||
679 | CONFIG_SERIAL_CORE=y | ||
680 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
681 | # CONFIG_SERIAL_JSM is not set | ||
682 | CONFIG_UNIX98_PTYS=y | ||
683 | CONFIG_LEGACY_PTYS=y | ||
684 | CONFIG_LEGACY_PTY_COUNT=256 | ||
685 | |||
686 | # | ||
687 | # IPMI | ||
688 | # | ||
689 | # CONFIG_IPMI_HANDLER is not set | ||
690 | |||
691 | # | ||
692 | # Watchdog Cards | ||
693 | # | ||
694 | CONFIG_WATCHDOG=y | ||
695 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
696 | |||
697 | # | ||
698 | # Watchdog Device Drivers | ||
699 | # | ||
700 | # CONFIG_SOFT_WATCHDOG is not set | ||
701 | CONFIG_83xx_WDT=y | ||
702 | |||
703 | # | ||
704 | # PCI-based Watchdog Cards | ||
705 | # | ||
706 | # CONFIG_PCIPCWATCHDOG is not set | ||
707 | # CONFIG_WDTPCI is not set | ||
708 | CONFIG_HW_RANDOM=y | ||
709 | # CONFIG_NVRAM is not set | ||
710 | # CONFIG_GEN_RTC is not set | ||
711 | # CONFIG_DTLK is not set | ||
712 | # CONFIG_R3964 is not set | ||
713 | # CONFIG_APPLICOM is not set | ||
714 | # CONFIG_AGP is not set | ||
715 | # CONFIG_DRM is not set | ||
716 | # CONFIG_RAW_DRIVER is not set | ||
717 | |||
718 | # | ||
719 | # TPM devices | ||
720 | # | ||
721 | # CONFIG_TCG_TPM is not set | ||
722 | |||
723 | # | ||
724 | # I2C support | ||
725 | # | ||
726 | CONFIG_I2C=y | ||
727 | CONFIG_I2C_CHARDEV=y | ||
728 | |||
729 | # | ||
730 | # I2C Algorithms | ||
731 | # | ||
732 | # CONFIG_I2C_ALGOBIT is not set | ||
733 | # CONFIG_I2C_ALGOPCF is not set | ||
734 | # CONFIG_I2C_ALGOPCA is not set | ||
735 | |||
736 | # | ||
737 | # I2C Hardware Bus support | ||
738 | # | ||
739 | # CONFIG_I2C_ALI1535 is not set | ||
740 | # CONFIG_I2C_ALI1563 is not set | ||
741 | # CONFIG_I2C_ALI15X3 is not set | ||
742 | # CONFIG_I2C_AMD756 is not set | ||
743 | # CONFIG_I2C_AMD8111 is not set | ||
744 | # CONFIG_I2C_I801 is not set | ||
745 | # CONFIG_I2C_I810 is not set | ||
746 | # CONFIG_I2C_PIIX4 is not set | ||
747 | CONFIG_I2C_MPC=y | ||
748 | # CONFIG_I2C_NFORCE2 is not set | ||
749 | # CONFIG_I2C_OCORES is not set | ||
750 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
751 | # CONFIG_I2C_PROSAVAGE is not set | ||
752 | # CONFIG_I2C_SAVAGE4 is not set | ||
753 | # CONFIG_I2C_SIS5595 is not set | ||
754 | # CONFIG_I2C_SIS630 is not set | ||
755 | # CONFIG_I2C_SIS96X is not set | ||
756 | # CONFIG_I2C_STUB is not set | ||
757 | # CONFIG_I2C_VIA is not set | ||
758 | # CONFIG_I2C_VIAPRO is not set | ||
759 | # CONFIG_I2C_VOODOO3 is not set | ||
760 | # CONFIG_I2C_PCA_ISA is not set | ||
761 | |||
762 | # | ||
763 | # Miscellaneous I2C Chip support | ||
764 | # | ||
765 | # CONFIG_SENSORS_DS1337 is not set | ||
766 | # CONFIG_SENSORS_DS1374 is not set | ||
767 | # CONFIG_SENSORS_EEPROM is not set | ||
768 | CONFIG_SENSORS_PCF8574=y | ||
769 | # CONFIG_SENSORS_PCA9539 is not set | ||
770 | # CONFIG_SENSORS_PCF8591 is not set | ||
771 | # CONFIG_SENSORS_M41T00 is not set | ||
772 | # CONFIG_SENSORS_MAX6875 is not set | ||
773 | # CONFIG_I2C_DEBUG_CORE is not set | ||
774 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
775 | # CONFIG_I2C_DEBUG_BUS is not set | ||
776 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
777 | |||
778 | # | ||
779 | # SPI support | ||
780 | # | ||
781 | CONFIG_SPI=y | ||
782 | CONFIG_SPI_MASTER=y | ||
783 | |||
784 | # | ||
785 | # SPI Master Controller Drivers | ||
786 | # | ||
787 | CONFIG_SPI_BITBANG=y | ||
788 | CONFIG_SPI_MPC83xx=y | ||
789 | |||
790 | # | ||
791 | # SPI Protocol Masters | ||
792 | # | ||
793 | |||
794 | # | ||
795 | # Dallas's 1-wire bus | ||
796 | # | ||
797 | # CONFIG_W1 is not set | ||
798 | |||
799 | # | ||
800 | # Hardware Monitoring support | ||
801 | # | ||
802 | # CONFIG_HWMON is not set | ||
803 | # CONFIG_HWMON_VID is not set | ||
804 | |||
805 | # | ||
806 | # Multimedia devices | ||
807 | # | ||
808 | # CONFIG_VIDEO_DEV is not set | ||
809 | |||
810 | # | ||
811 | # Digital Video Broadcasting Devices | ||
812 | # | ||
813 | # CONFIG_DVB is not set | ||
814 | |||
815 | # | ||
816 | # Graphics support | ||
817 | # | ||
818 | # CONFIG_FIRMWARE_EDID is not set | ||
819 | # CONFIG_FB is not set | ||
820 | # CONFIG_FB_IBM_GXT4500 is not set | ||
821 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
822 | |||
823 | # | ||
824 | # Sound | ||
825 | # | ||
826 | # CONFIG_SOUND is not set | ||
827 | |||
828 | # | ||
829 | # USB support | ||
830 | # | ||
831 | CONFIG_USB_ARCH_HAS_HCD=y | ||
832 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
833 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
834 | # CONFIG_USB is not set | ||
835 | |||
836 | # | ||
837 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
838 | # | ||
839 | |||
840 | # | ||
841 | # USB Gadget Support | ||
842 | # | ||
843 | # CONFIG_USB_GADGET is not set | ||
844 | |||
845 | # | ||
846 | # MMC/SD Card support | ||
847 | # | ||
848 | # CONFIG_MMC is not set | ||
849 | |||
850 | # | ||
851 | # LED devices | ||
852 | # | ||
853 | # CONFIG_NEW_LEDS is not set | ||
854 | |||
855 | # | ||
856 | # LED drivers | ||
857 | # | ||
858 | |||
859 | # | ||
860 | # LED Triggers | ||
861 | # | ||
862 | |||
863 | # | ||
864 | # InfiniBand support | ||
865 | # | ||
866 | # CONFIG_INFINIBAND is not set | ||
867 | |||
868 | # | ||
869 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
870 | # | ||
871 | |||
872 | # | ||
873 | # Real Time Clock | ||
874 | # | ||
875 | CONFIG_RTC_LIB=y | ||
876 | CONFIG_RTC_CLASS=y | ||
877 | CONFIG_RTC_HCTOSYS=y | ||
878 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
879 | # CONFIG_RTC_DEBUG is not set | ||
880 | |||
881 | # | ||
882 | # RTC interfaces | ||
883 | # | ||
884 | CONFIG_RTC_INTF_SYSFS=y | ||
885 | CONFIG_RTC_INTF_PROC=y | ||
886 | CONFIG_RTC_INTF_DEV=y | ||
887 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | ||
888 | |||
889 | # | ||
890 | # RTC drivers | ||
891 | # | ||
892 | # CONFIG_RTC_DRV_X1205 is not set | ||
893 | CONFIG_RTC_DRV_DS1307=y | ||
894 | # CONFIG_RTC_DRV_DS1553 is not set | ||
895 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
896 | # CONFIG_RTC_DRV_DS1672 is not set | ||
897 | # CONFIG_RTC_DRV_DS1742 is not set | ||
898 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
899 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
900 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
901 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
902 | # CONFIG_RTC_DRV_M48T86 is not set | ||
903 | # CONFIG_RTC_DRV_TEST is not set | ||
904 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
905 | # CONFIG_RTC_DRV_V3020 is not set | ||
906 | |||
907 | # | ||
908 | # DMA Engine support | ||
909 | # | ||
910 | CONFIG_DMA_ENGINE=y | ||
911 | |||
912 | # | ||
913 | # DMA Clients | ||
914 | # | ||
915 | CONFIG_NET_DMA=y | ||
916 | |||
917 | # | ||
918 | # DMA Devices | ||
919 | # | ||
920 | CONFIG_INTEL_IOATDMA=y | ||
921 | |||
922 | # | ||
923 | # Virtualization | ||
924 | # | ||
925 | |||
926 | # | ||
927 | # File systems | ||
928 | # | ||
929 | CONFIG_EXT2_FS=y | ||
930 | # CONFIG_EXT2_FS_XATTR is not set | ||
931 | # CONFIG_EXT2_FS_XIP is not set | ||
932 | CONFIG_EXT3_FS=y | ||
933 | CONFIG_EXT3_FS_XATTR=y | ||
934 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
935 | # CONFIG_EXT3_FS_SECURITY is not set | ||
936 | # CONFIG_EXT4DEV_FS is not set | ||
937 | CONFIG_JBD=y | ||
938 | # CONFIG_JBD_DEBUG is not set | ||
939 | CONFIG_FS_MBCACHE=y | ||
940 | # CONFIG_REISERFS_FS is not set | ||
941 | # CONFIG_JFS_FS is not set | ||
942 | # CONFIG_FS_POSIX_ACL is not set | ||
943 | # CONFIG_XFS_FS is not set | ||
944 | # CONFIG_GFS2_FS is not set | ||
945 | # CONFIG_OCFS2_FS is not set | ||
946 | # CONFIG_MINIX_FS is not set | ||
947 | # CONFIG_ROMFS_FS is not set | ||
948 | CONFIG_INOTIFY=y | ||
949 | CONFIG_INOTIFY_USER=y | ||
950 | # CONFIG_QUOTA is not set | ||
951 | CONFIG_DNOTIFY=y | ||
952 | # CONFIG_AUTOFS_FS is not set | ||
953 | # CONFIG_AUTOFS4_FS is not set | ||
954 | # CONFIG_FUSE_FS is not set | ||
955 | |||
956 | # | ||
957 | # CD-ROM/DVD Filesystems | ||
958 | # | ||
959 | # CONFIG_ISO9660_FS is not set | ||
960 | # CONFIG_UDF_FS is not set | ||
961 | |||
962 | # | ||
963 | # DOS/FAT/NT Filesystems | ||
964 | # | ||
965 | CONFIG_FAT_FS=y | ||
966 | CONFIG_MSDOS_FS=y | ||
967 | CONFIG_VFAT_FS=y | ||
968 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
969 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
970 | # CONFIG_NTFS_FS is not set | ||
971 | |||
972 | # | ||
973 | # Pseudo filesystems | ||
974 | # | ||
975 | CONFIG_PROC_FS=y | ||
976 | CONFIG_PROC_KCORE=y | ||
977 | CONFIG_PROC_SYSCTL=y | ||
978 | CONFIG_SYSFS=y | ||
979 | CONFIG_TMPFS=y | ||
980 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
981 | # CONFIG_HUGETLB_PAGE is not set | ||
982 | CONFIG_RAMFS=y | ||
983 | # CONFIG_CONFIGFS_FS is not set | ||
984 | |||
985 | # | ||
986 | # Miscellaneous filesystems | ||
987 | # | ||
988 | # CONFIG_ADFS_FS is not set | ||
989 | # CONFIG_AFFS_FS is not set | ||
990 | # CONFIG_HFS_FS is not set | ||
991 | # CONFIG_HFSPLUS_FS is not set | ||
992 | # CONFIG_BEFS_FS is not set | ||
993 | # CONFIG_BFS_FS is not set | ||
994 | # CONFIG_EFS_FS is not set | ||
995 | # CONFIG_JFFS2_FS is not set | ||
996 | # CONFIG_CRAMFS is not set | ||
997 | # CONFIG_VXFS_FS is not set | ||
998 | # CONFIG_HPFS_FS is not set | ||
999 | # CONFIG_QNX4FS_FS is not set | ||
1000 | # CONFIG_SYSV_FS is not set | ||
1001 | # CONFIG_UFS_FS is not set | ||
1002 | |||
1003 | # | ||
1004 | # Network File Systems | ||
1005 | # | ||
1006 | CONFIG_NFS_FS=y | ||
1007 | CONFIG_NFS_V3=y | ||
1008 | # CONFIG_NFS_V3_ACL is not set | ||
1009 | CONFIG_NFS_V4=y | ||
1010 | # CONFIG_NFS_DIRECTIO is not set | ||
1011 | # CONFIG_NFSD is not set | ||
1012 | CONFIG_ROOT_NFS=y | ||
1013 | CONFIG_LOCKD=y | ||
1014 | CONFIG_LOCKD_V4=y | ||
1015 | CONFIG_NFS_COMMON=y | ||
1016 | CONFIG_SUNRPC=y | ||
1017 | CONFIG_SUNRPC_GSS=y | ||
1018 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1019 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1020 | # CONFIG_SMB_FS is not set | ||
1021 | # CONFIG_CIFS is not set | ||
1022 | # CONFIG_NCP_FS is not set | ||
1023 | # CONFIG_CODA_FS is not set | ||
1024 | # CONFIG_AFS_FS is not set | ||
1025 | # CONFIG_9P_FS is not set | ||
1026 | |||
1027 | # | ||
1028 | # Partition Types | ||
1029 | # | ||
1030 | CONFIG_PARTITION_ADVANCED=y | ||
1031 | # CONFIG_ACORN_PARTITION is not set | ||
1032 | # CONFIG_OSF_PARTITION is not set | ||
1033 | # CONFIG_AMIGA_PARTITION is not set | ||
1034 | # CONFIG_ATARI_PARTITION is not set | ||
1035 | CONFIG_MAC_PARTITION=y | ||
1036 | CONFIG_MSDOS_PARTITION=y | ||
1037 | # CONFIG_BSD_DISKLABEL is not set | ||
1038 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1039 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1040 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1041 | # CONFIG_LDM_PARTITION is not set | ||
1042 | # CONFIG_SGI_PARTITION is not set | ||
1043 | # CONFIG_ULTRIX_PARTITION is not set | ||
1044 | # CONFIG_SUN_PARTITION is not set | ||
1045 | # CONFIG_KARMA_PARTITION is not set | ||
1046 | # CONFIG_EFI_PARTITION is not set | ||
1047 | |||
1048 | # | ||
1049 | # Native Language Support | ||
1050 | # | ||
1051 | CONFIG_NLS=y | ||
1052 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1053 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1054 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1055 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1056 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1057 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1058 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1059 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1060 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1061 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1062 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1063 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1064 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1065 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1066 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1067 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1068 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1069 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1070 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1071 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1072 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1073 | # CONFIG_NLS_ISO8859_8 is not set | ||
1074 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1075 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1076 | # CONFIG_NLS_ASCII is not set | ||
1077 | # CONFIG_NLS_ISO8859_1 is not set | ||
1078 | # CONFIG_NLS_ISO8859_2 is not set | ||
1079 | # CONFIG_NLS_ISO8859_3 is not set | ||
1080 | # CONFIG_NLS_ISO8859_4 is not set | ||
1081 | # CONFIG_NLS_ISO8859_5 is not set | ||
1082 | # CONFIG_NLS_ISO8859_6 is not set | ||
1083 | # CONFIG_NLS_ISO8859_7 is not set | ||
1084 | # CONFIG_NLS_ISO8859_9 is not set | ||
1085 | # CONFIG_NLS_ISO8859_13 is not set | ||
1086 | # CONFIG_NLS_ISO8859_14 is not set | ||
1087 | # CONFIG_NLS_ISO8859_15 is not set | ||
1088 | # CONFIG_NLS_KOI8_R is not set | ||
1089 | # CONFIG_NLS_KOI8_U is not set | ||
1090 | # CONFIG_NLS_UTF8 is not set | ||
1091 | |||
1092 | # | ||
1093 | # Distributed Lock Manager | ||
1094 | # | ||
1095 | # CONFIG_DLM is not set | ||
1096 | |||
1097 | # | ||
1098 | # Library routines | ||
1099 | # | ||
1100 | CONFIG_BITREVERSE=y | ||
1101 | # CONFIG_CRC_CCITT is not set | ||
1102 | # CONFIG_CRC16 is not set | ||
1103 | CONFIG_CRC32=y | ||
1104 | # CONFIG_LIBCRC32C is not set | ||
1105 | CONFIG_PLIST=y | ||
1106 | CONFIG_IOMAP_COPY=y | ||
1107 | |||
1108 | # | ||
1109 | # Instrumentation Support | ||
1110 | # | ||
1111 | # CONFIG_PROFILING is not set | ||
1112 | |||
1113 | # | ||
1114 | # Kernel hacking | ||
1115 | # | ||
1116 | # CONFIG_PRINTK_TIME is not set | ||
1117 | CONFIG_ENABLE_MUST_CHECK=y | ||
1118 | # CONFIG_MAGIC_SYSRQ is not set | ||
1119 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1120 | # CONFIG_DEBUG_FS is not set | ||
1121 | # CONFIG_HEADERS_CHECK is not set | ||
1122 | # CONFIG_DEBUG_KERNEL is not set | ||
1123 | CONFIG_LOG_BUF_SHIFT=14 | ||
1124 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1125 | # CONFIG_BOOTX_TEXT is not set | ||
1126 | # CONFIG_SERIAL_TEXT_DEBUG is not set | ||
1127 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1128 | |||
1129 | # | ||
1130 | # Security options | ||
1131 | # | ||
1132 | # CONFIG_KEYS is not set | ||
1133 | # CONFIG_SECURITY is not set | ||
1134 | |||
1135 | # | ||
1136 | # Cryptographic options | ||
1137 | # | ||
1138 | CONFIG_CRYPTO=y | ||
1139 | CONFIG_CRYPTO_ALGAPI=y | ||
1140 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1141 | CONFIG_CRYPTO_MANAGER=y | ||
1142 | # CONFIG_CRYPTO_HMAC is not set | ||
1143 | # CONFIG_CRYPTO_XCBC is not set | ||
1144 | # CONFIG_CRYPTO_NULL is not set | ||
1145 | # CONFIG_CRYPTO_MD4 is not set | ||
1146 | CONFIG_CRYPTO_MD5=y | ||
1147 | # CONFIG_CRYPTO_SHA1 is not set | ||
1148 | # CONFIG_CRYPTO_SHA256 is not set | ||
1149 | # CONFIG_CRYPTO_SHA512 is not set | ||
1150 | # CONFIG_CRYPTO_WP512 is not set | ||
1151 | # CONFIG_CRYPTO_TGR192 is not set | ||
1152 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1153 | # CONFIG_CRYPTO_ECB is not set | ||
1154 | CONFIG_CRYPTO_CBC=y | ||
1155 | # CONFIG_CRYPTO_LRW is not set | ||
1156 | CONFIG_CRYPTO_DES=y | ||
1157 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1158 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1159 | # CONFIG_CRYPTO_SERPENT is not set | ||
1160 | # CONFIG_CRYPTO_AES is not set | ||
1161 | # CONFIG_CRYPTO_CAST5 is not set | ||
1162 | # CONFIG_CRYPTO_CAST6 is not set | ||
1163 | # CONFIG_CRYPTO_TEA is not set | ||
1164 | # CONFIG_CRYPTO_ARC4 is not set | ||
1165 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1166 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1167 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1168 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1169 | # CONFIG_CRYPTO_CRC32C is not set | ||
1170 | # CONFIG_CRYPTO_TEST is not set | ||
1171 | |||
1172 | # | ||
1173 | # Hardware crypto devices | ||
1174 | # | ||
diff --git a/arch/powerpc/configs/mpc834x_mds_defconfig b/arch/powerpc/configs/mpc834x_mds_defconfig index 9eaed3a36983..2e3f8efb6ab1 100644 --- a/arch/powerpc/configs/mpc834x_mds_defconfig +++ b/arch/powerpc/configs/mpc834x_mds_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.20-rc5 | 3 | # Linux kernel version: 2.6.20 |
4 | # Fri Jan 26 00:19:27 2007 | 4 | # Thu Feb 8 01:00:48 2007 |
5 | # | 5 | # |
6 | # CONFIG_PPC64 is not set | 6 | # CONFIG_PPC64 is not set |
7 | CONFIG_PPC32=y | 7 | CONFIG_PPC32=y |
@@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y | |||
34 | CONFIG_PPC_83xx=y | 34 | CONFIG_PPC_83xx=y |
35 | # CONFIG_PPC_85xx is not set | 35 | # CONFIG_PPC_85xx is not set |
36 | # CONFIG_PPC_86xx is not set | 36 | # CONFIG_PPC_86xx is not set |
37 | # CONFIG_PPC_8xx is not set | ||
37 | # CONFIG_40x is not set | 38 | # CONFIG_40x is not set |
38 | # CONFIG_44x is not set | 39 | # CONFIG_44x is not set |
39 | # CONFIG_8xx is not set | ||
40 | # CONFIG_E200 is not set | 40 | # CONFIG_E200 is not set |
41 | CONFIG_6xx=y | 41 | CONFIG_6xx=y |
42 | CONFIG_83xx=y | 42 | CONFIG_83xx=y |
@@ -128,8 +128,9 @@ CONFIG_PPC_GEN550=y | |||
128 | # | 128 | # |
129 | # Platform support | 129 | # Platform support |
130 | # | 130 | # |
131 | # CONFIG_MPC8313_RDB is not set | ||
131 | # CONFIG_MPC832x_MDS is not set | 132 | # CONFIG_MPC832x_MDS is not set |
132 | CONFIG_MPC834x_SYS=y | 133 | CONFIG_MPC834x_MDS=y |
133 | # CONFIG_MPC834x_ITX is not set | 134 | # CONFIG_MPC834x_ITX is not set |
134 | # CONFIG_MPC8360E_PB is not set | 135 | # CONFIG_MPC8360E_PB is not set |
135 | CONFIG_MPC834x=y | 136 | CONFIG_MPC834x=y |
diff --git a/arch/powerpc/configs/mpc8568mds_defconfig b/arch/powerpc/configs/mpc8568mds_defconfig new file mode 100644 index 000000000000..058e06d88bc1 --- /dev/null +++ b/arch/powerpc/configs/mpc8568mds_defconfig | |||
@@ -0,0 +1,992 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.20-rc5 | ||
4 | # Wed Feb 7 23:54:25 2007 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | CONFIG_PPC32=y | ||
8 | CONFIG_PPC_MERGE=y | ||
9 | CONFIG_MMU=y | ||
10 | CONFIG_GENERIC_HARDIRQS=y | ||
11 | CONFIG_IRQ_PER_CPU=y | ||
12 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
13 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
14 | CONFIG_GENERIC_HWEIGHT=y | ||
15 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
16 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
17 | CONFIG_PPC=y | ||
18 | CONFIG_EARLY_PRINTK=y | ||
19 | CONFIG_GENERIC_NVRAM=y | ||
20 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
21 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
22 | CONFIG_PPC_OF=y | ||
23 | CONFIG_PPC_UDBG_16550=y | ||
24 | # CONFIG_GENERIC_TBSYNC is not set | ||
25 | CONFIG_AUDIT_ARCH=y | ||
26 | CONFIG_GENERIC_BUG=y | ||
27 | CONFIG_DEFAULT_UIMAGE=y | ||
28 | |||
29 | # | ||
30 | # Processor support | ||
31 | # | ||
32 | # CONFIG_CLASSIC32 is not set | ||
33 | # CONFIG_PPC_82xx is not set | ||
34 | # CONFIG_PPC_83xx is not set | ||
35 | CONFIG_PPC_85xx=y | ||
36 | # CONFIG_PPC_86xx is not set | ||
37 | # CONFIG_40x is not set | ||
38 | # CONFIG_44x is not set | ||
39 | # CONFIG_8xx is not set | ||
40 | # CONFIG_E200 is not set | ||
41 | CONFIG_85xx=y | ||
42 | CONFIG_E500=y | ||
43 | # CONFIG_PPC_DCR_NATIVE is not set | ||
44 | # CONFIG_PPC_DCR_MMIO is not set | ||
45 | CONFIG_BOOKE=y | ||
46 | CONFIG_FSL_BOOKE=y | ||
47 | # CONFIG_PHYS_64BIT is not set | ||
48 | CONFIG_SPE=y | ||
49 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
50 | |||
51 | # | ||
52 | # Code maturity level options | ||
53 | # | ||
54 | CONFIG_EXPERIMENTAL=y | ||
55 | CONFIG_BROKEN_ON_SMP=y | ||
56 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
57 | |||
58 | # | ||
59 | # General setup | ||
60 | # | ||
61 | CONFIG_LOCALVERSION="" | ||
62 | CONFIG_LOCALVERSION_AUTO=y | ||
63 | CONFIG_SWAP=y | ||
64 | CONFIG_SYSVIPC=y | ||
65 | # CONFIG_IPC_NS is not set | ||
66 | # CONFIG_POSIX_MQUEUE is not set | ||
67 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
68 | # CONFIG_TASKSTATS is not set | ||
69 | # CONFIG_UTS_NS is not set | ||
70 | # CONFIG_AUDIT is not set | ||
71 | # CONFIG_IKCONFIG is not set | ||
72 | CONFIG_SYSFS_DEPRECATED=y | ||
73 | # CONFIG_RELAY is not set | ||
74 | CONFIG_INITRAMFS_SOURCE="" | ||
75 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
76 | CONFIG_SYSCTL=y | ||
77 | CONFIG_EMBEDDED=y | ||
78 | CONFIG_SYSCTL_SYSCALL=y | ||
79 | # CONFIG_KALLSYMS is not set | ||
80 | CONFIG_HOTPLUG=y | ||
81 | CONFIG_PRINTK=y | ||
82 | CONFIG_BUG=y | ||
83 | CONFIG_ELF_CORE=y | ||
84 | CONFIG_BASE_FULL=y | ||
85 | CONFIG_FUTEX=y | ||
86 | # CONFIG_EPOLL is not set | ||
87 | CONFIG_SHMEM=y | ||
88 | CONFIG_SLAB=y | ||
89 | CONFIG_VM_EVENT_COUNTERS=y | ||
90 | CONFIG_RT_MUTEXES=y | ||
91 | # CONFIG_TINY_SHMEM is not set | ||
92 | CONFIG_BASE_SMALL=0 | ||
93 | # CONFIG_SLOB is not set | ||
94 | |||
95 | # | ||
96 | # Loadable module support | ||
97 | # | ||
98 | CONFIG_MODULES=y | ||
99 | CONFIG_MODULE_UNLOAD=y | ||
100 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
101 | # CONFIG_MODVERSIONS is not set | ||
102 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
103 | # CONFIG_KMOD is not set | ||
104 | |||
105 | # | ||
106 | # Block layer | ||
107 | # | ||
108 | CONFIG_BLOCK=y | ||
109 | # CONFIG_LBD is not set | ||
110 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
111 | # CONFIG_LSF is not set | ||
112 | |||
113 | # | ||
114 | # IO Schedulers | ||
115 | # | ||
116 | CONFIG_IOSCHED_NOOP=y | ||
117 | CONFIG_IOSCHED_AS=y | ||
118 | CONFIG_IOSCHED_DEADLINE=y | ||
119 | CONFIG_IOSCHED_CFQ=y | ||
120 | CONFIG_DEFAULT_AS=y | ||
121 | # CONFIG_DEFAULT_DEADLINE is not set | ||
122 | # CONFIG_DEFAULT_CFQ is not set | ||
123 | # CONFIG_DEFAULT_NOOP is not set | ||
124 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
125 | # CONFIG_WANT_EARLY_SERIAL is not set | ||
126 | |||
127 | # | ||
128 | # Platform support | ||
129 | # | ||
130 | # CONFIG_MPC8540_ADS is not set | ||
131 | # CONFIG_MPC8560_ADS is not set | ||
132 | # CONFIG_MPC85xx_CDS is not set | ||
133 | CONFIG_MPC8568_MDS=y | ||
134 | CONFIG_MPC85xx=y | ||
135 | CONFIG_PPC_INDIRECT_PCI_BE=y | ||
136 | CONFIG_MPIC=y | ||
137 | |||
138 | # | ||
139 | # Kernel options | ||
140 | # | ||
141 | # CONFIG_HIGHMEM is not set | ||
142 | # CONFIG_HZ_100 is not set | ||
143 | CONFIG_HZ_250=y | ||
144 | # CONFIG_HZ_300 is not set | ||
145 | # CONFIG_HZ_1000 is not set | ||
146 | CONFIG_HZ=250 | ||
147 | CONFIG_PREEMPT_NONE=y | ||
148 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
149 | # CONFIG_PREEMPT is not set | ||
150 | CONFIG_BINFMT_ELF=y | ||
151 | # CONFIG_BINFMT_MISC is not set | ||
152 | CONFIG_MATH_EMULATION=y | ||
153 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
154 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
155 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
156 | CONFIG_SELECT_MEMORY_MODEL=y | ||
157 | CONFIG_FLATMEM_MANUAL=y | ||
158 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
159 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
160 | CONFIG_FLATMEM=y | ||
161 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
162 | # CONFIG_SPARSEMEM_STATIC is not set | ||
163 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
164 | # CONFIG_RESOURCES_64BIT is not set | ||
165 | CONFIG_PROC_DEVICETREE=y | ||
166 | # CONFIG_CMDLINE_BOOL is not set | ||
167 | # CONFIG_PM is not set | ||
168 | CONFIG_SECCOMP=y | ||
169 | CONFIG_ISA_DMA_API=y | ||
170 | |||
171 | # | ||
172 | # Bus options | ||
173 | # | ||
174 | # CONFIG_MPIC_WEIRD is not set | ||
175 | # CONFIG_PPC_I8259 is not set | ||
176 | CONFIG_PPC_INDIRECT_PCI=y | ||
177 | CONFIG_FSL_SOC=y | ||
178 | # CONFIG_PCI is not set | ||
179 | # CONFIG_PCI_DOMAINS is not set | ||
180 | |||
181 | # | ||
182 | # PCCARD (PCMCIA/CardBus) support | ||
183 | # | ||
184 | # CONFIG_PCCARD is not set | ||
185 | |||
186 | # | ||
187 | # PCI Hotplug Support | ||
188 | # | ||
189 | |||
190 | # | ||
191 | # Advanced setup | ||
192 | # | ||
193 | # CONFIG_ADVANCED_OPTIONS is not set | ||
194 | |||
195 | # | ||
196 | # Default settings for advanced configuration options are used | ||
197 | # | ||
198 | CONFIG_HIGHMEM_START=0xfe000000 | ||
199 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
200 | CONFIG_KERNEL_START=0xc0000000 | ||
201 | CONFIG_TASK_SIZE=0x80000000 | ||
202 | CONFIG_BOOT_LOAD=0x00800000 | ||
203 | |||
204 | # | ||
205 | # Networking | ||
206 | # | ||
207 | CONFIG_NET=y | ||
208 | |||
209 | # | ||
210 | # Networking options | ||
211 | # | ||
212 | # CONFIG_NETDEBUG is not set | ||
213 | CONFIG_PACKET=y | ||
214 | # CONFIG_PACKET_MMAP is not set | ||
215 | CONFIG_UNIX=y | ||
216 | CONFIG_XFRM=y | ||
217 | # CONFIG_XFRM_USER is not set | ||
218 | # CONFIG_XFRM_SUB_POLICY is not set | ||
219 | # CONFIG_NET_KEY is not set | ||
220 | CONFIG_INET=y | ||
221 | CONFIG_IP_MULTICAST=y | ||
222 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
223 | CONFIG_IP_FIB_HASH=y | ||
224 | CONFIG_IP_PNP=y | ||
225 | CONFIG_IP_PNP_DHCP=y | ||
226 | CONFIG_IP_PNP_BOOTP=y | ||
227 | # CONFIG_IP_PNP_RARP is not set | ||
228 | # CONFIG_NET_IPIP is not set | ||
229 | # CONFIG_NET_IPGRE is not set | ||
230 | # CONFIG_IP_MROUTE is not set | ||
231 | # CONFIG_ARPD is not set | ||
232 | CONFIG_SYN_COOKIES=y | ||
233 | # CONFIG_INET_AH is not set | ||
234 | # CONFIG_INET_ESP is not set | ||
235 | # CONFIG_INET_IPCOMP is not set | ||
236 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
237 | # CONFIG_INET_TUNNEL is not set | ||
238 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
239 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
240 | CONFIG_INET_XFRM_MODE_BEET=y | ||
241 | CONFIG_INET_DIAG=y | ||
242 | CONFIG_INET_TCP_DIAG=y | ||
243 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
244 | CONFIG_TCP_CONG_CUBIC=y | ||
245 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
246 | # CONFIG_TCP_MD5SIG is not set | ||
247 | # CONFIG_IPV6 is not set | ||
248 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
249 | # CONFIG_INET6_TUNNEL is not set | ||
250 | # CONFIG_NETWORK_SECMARK is not set | ||
251 | # CONFIG_NETFILTER is not set | ||
252 | |||
253 | # | ||
254 | # DCCP Configuration (EXPERIMENTAL) | ||
255 | # | ||
256 | # CONFIG_IP_DCCP is not set | ||
257 | |||
258 | # | ||
259 | # SCTP Configuration (EXPERIMENTAL) | ||
260 | # | ||
261 | # CONFIG_IP_SCTP is not set | ||
262 | |||
263 | # | ||
264 | # TIPC Configuration (EXPERIMENTAL) | ||
265 | # | ||
266 | # CONFIG_TIPC is not set | ||
267 | # CONFIG_ATM is not set | ||
268 | # CONFIG_BRIDGE is not set | ||
269 | # CONFIG_VLAN_8021Q is not set | ||
270 | # CONFIG_DECNET is not set | ||
271 | # CONFIG_LLC2 is not set | ||
272 | # CONFIG_IPX is not set | ||
273 | # CONFIG_ATALK is not set | ||
274 | # CONFIG_X25 is not set | ||
275 | # CONFIG_LAPB is not set | ||
276 | # CONFIG_ECONET is not set | ||
277 | # CONFIG_WAN_ROUTER is not set | ||
278 | |||
279 | # | ||
280 | # QoS and/or fair queueing | ||
281 | # | ||
282 | # CONFIG_NET_SCHED is not set | ||
283 | |||
284 | # | ||
285 | # Network testing | ||
286 | # | ||
287 | # CONFIG_NET_PKTGEN is not set | ||
288 | # CONFIG_HAMRADIO is not set | ||
289 | # CONFIG_IRDA is not set | ||
290 | # CONFIG_BT is not set | ||
291 | # CONFIG_IEEE80211 is not set | ||
292 | |||
293 | # | ||
294 | # Device Drivers | ||
295 | # | ||
296 | |||
297 | # | ||
298 | # Generic Driver Options | ||
299 | # | ||
300 | CONFIG_STANDALONE=y | ||
301 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
302 | # CONFIG_FW_LOADER is not set | ||
303 | # CONFIG_DEBUG_DRIVER is not set | ||
304 | # CONFIG_SYS_HYPERVISOR is not set | ||
305 | |||
306 | # | ||
307 | # Connector - unified userspace <-> kernelspace linker | ||
308 | # | ||
309 | # CONFIG_CONNECTOR is not set | ||
310 | |||
311 | # | ||
312 | # Memory Technology Devices (MTD) | ||
313 | # | ||
314 | # CONFIG_MTD is not set | ||
315 | |||
316 | # | ||
317 | # Parallel port support | ||
318 | # | ||
319 | # CONFIG_PARPORT is not set | ||
320 | |||
321 | # | ||
322 | # Plug and Play support | ||
323 | # | ||
324 | |||
325 | # | ||
326 | # Block devices | ||
327 | # | ||
328 | # CONFIG_BLK_DEV_FD is not set | ||
329 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
330 | CONFIG_BLK_DEV_LOOP=y | ||
331 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
332 | # CONFIG_BLK_DEV_NBD is not set | ||
333 | CONFIG_BLK_DEV_RAM=y | ||
334 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
335 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
336 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
337 | CONFIG_BLK_DEV_INITRD=y | ||
338 | # CONFIG_CDROM_PKTCDVD is not set | ||
339 | # CONFIG_ATA_OVER_ETH is not set | ||
340 | |||
341 | # | ||
342 | # Misc devices | ||
343 | # | ||
344 | # CONFIG_TIFM_CORE is not set | ||
345 | |||
346 | # | ||
347 | # ATA/ATAPI/MFM/RLL support | ||
348 | # | ||
349 | # CONFIG_IDE is not set | ||
350 | |||
351 | # | ||
352 | # SCSI device support | ||
353 | # | ||
354 | # CONFIG_RAID_ATTRS is not set | ||
355 | CONFIG_SCSI=y | ||
356 | # CONFIG_SCSI_TGT is not set | ||
357 | # CONFIG_SCSI_NETLINK is not set | ||
358 | CONFIG_SCSI_PROC_FS=y | ||
359 | |||
360 | # | ||
361 | # SCSI support type (disk, tape, CD-ROM) | ||
362 | # | ||
363 | # CONFIG_BLK_DEV_SD is not set | ||
364 | # CONFIG_CHR_DEV_ST is not set | ||
365 | # CONFIG_CHR_DEV_OSST is not set | ||
366 | # CONFIG_BLK_DEV_SR is not set | ||
367 | # CONFIG_CHR_DEV_SG is not set | ||
368 | # CONFIG_CHR_DEV_SCH is not set | ||
369 | |||
370 | # | ||
371 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
372 | # | ||
373 | # CONFIG_SCSI_MULTI_LUN is not set | ||
374 | # CONFIG_SCSI_CONSTANTS is not set | ||
375 | # CONFIG_SCSI_LOGGING is not set | ||
376 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
377 | |||
378 | # | ||
379 | # SCSI Transports | ||
380 | # | ||
381 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
382 | # CONFIG_SCSI_FC_ATTRS is not set | ||
383 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
384 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
385 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
386 | |||
387 | # | ||
388 | # SCSI low-level drivers | ||
389 | # | ||
390 | # CONFIG_ISCSI_TCP is not set | ||
391 | # CONFIG_SCSI_DEBUG is not set | ||
392 | |||
393 | # | ||
394 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
395 | # | ||
396 | # CONFIG_ATA is not set | ||
397 | |||
398 | # | ||
399 | # Multi-device support (RAID and LVM) | ||
400 | # | ||
401 | # CONFIG_MD is not set | ||
402 | |||
403 | # | ||
404 | # Fusion MPT device support | ||
405 | # | ||
406 | # CONFIG_FUSION is not set | ||
407 | |||
408 | # | ||
409 | # IEEE 1394 (FireWire) support | ||
410 | # | ||
411 | |||
412 | # | ||
413 | # I2O device support | ||
414 | # | ||
415 | |||
416 | # | ||
417 | # Macintosh device drivers | ||
418 | # | ||
419 | # CONFIG_MAC_EMUMOUSEBTN is not set | ||
420 | # CONFIG_WINDFARM is not set | ||
421 | |||
422 | # | ||
423 | # Network device support | ||
424 | # | ||
425 | CONFIG_NETDEVICES=y | ||
426 | # CONFIG_DUMMY is not set | ||
427 | # CONFIG_BONDING is not set | ||
428 | # CONFIG_EQUALIZER is not set | ||
429 | # CONFIG_TUN is not set | ||
430 | |||
431 | # | ||
432 | # PHY device support | ||
433 | # | ||
434 | CONFIG_PHYLIB=y | ||
435 | |||
436 | # | ||
437 | # MII PHY device drivers | ||
438 | # | ||
439 | CONFIG_MARVELL_PHY=y | ||
440 | # CONFIG_DAVICOM_PHY is not set | ||
441 | # CONFIG_QSEMI_PHY is not set | ||
442 | # CONFIG_LXT_PHY is not set | ||
443 | # CONFIG_CICADA_PHY is not set | ||
444 | # CONFIG_VITESSE_PHY is not set | ||
445 | # CONFIG_SMSC_PHY is not set | ||
446 | # CONFIG_BROADCOM_PHY is not set | ||
447 | # CONFIG_FIXED_PHY is not set | ||
448 | |||
449 | # | ||
450 | # Ethernet (10 or 100Mbit) | ||
451 | # | ||
452 | CONFIG_NET_ETHERNET=y | ||
453 | CONFIG_MII=y | ||
454 | |||
455 | # | ||
456 | # Ethernet (1000 Mbit) | ||
457 | # | ||
458 | CONFIG_GIANFAR=y | ||
459 | CONFIG_GFAR_NAPI=y | ||
460 | |||
461 | # | ||
462 | # Ethernet (10000 Mbit) | ||
463 | # | ||
464 | |||
465 | # | ||
466 | # Token Ring devices | ||
467 | # | ||
468 | |||
469 | # | ||
470 | # Wireless LAN (non-hamradio) | ||
471 | # | ||
472 | # CONFIG_NET_RADIO is not set | ||
473 | |||
474 | # | ||
475 | # Wan interfaces | ||
476 | # | ||
477 | # CONFIG_WAN is not set | ||
478 | # CONFIG_PPP is not set | ||
479 | # CONFIG_SLIP is not set | ||
480 | # CONFIG_SHAPER is not set | ||
481 | # CONFIG_NETCONSOLE is not set | ||
482 | # CONFIG_NETPOLL is not set | ||
483 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
484 | |||
485 | # | ||
486 | # ISDN subsystem | ||
487 | # | ||
488 | # CONFIG_ISDN is not set | ||
489 | |||
490 | # | ||
491 | # Telephony Support | ||
492 | # | ||
493 | # CONFIG_PHONE is not set | ||
494 | |||
495 | # | ||
496 | # Input device support | ||
497 | # | ||
498 | CONFIG_INPUT=y | ||
499 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
500 | |||
501 | # | ||
502 | # Userland interfaces | ||
503 | # | ||
504 | # CONFIG_INPUT_MOUSEDEV is not set | ||
505 | # CONFIG_INPUT_JOYDEV is not set | ||
506 | # CONFIG_INPUT_TSDEV is not set | ||
507 | # CONFIG_INPUT_EVDEV is not set | ||
508 | # CONFIG_INPUT_EVBUG is not set | ||
509 | |||
510 | # | ||
511 | # Input Device Drivers | ||
512 | # | ||
513 | # CONFIG_INPUT_KEYBOARD is not set | ||
514 | # CONFIG_INPUT_MOUSE is not set | ||
515 | # CONFIG_INPUT_JOYSTICK is not set | ||
516 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
517 | # CONFIG_INPUT_MISC is not set | ||
518 | |||
519 | # | ||
520 | # Hardware I/O ports | ||
521 | # | ||
522 | # CONFIG_SERIO is not set | ||
523 | # CONFIG_GAMEPORT is not set | ||
524 | |||
525 | # | ||
526 | # Character devices | ||
527 | # | ||
528 | # CONFIG_VT is not set | ||
529 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
530 | |||
531 | # | ||
532 | # Serial drivers | ||
533 | # | ||
534 | CONFIG_SERIAL_8250=y | ||
535 | CONFIG_SERIAL_8250_CONSOLE=y | ||
536 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
537 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
538 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
539 | |||
540 | # | ||
541 | # Non-8250 serial port support | ||
542 | # | ||
543 | # CONFIG_SERIAL_UARTLITE is not set | ||
544 | CONFIG_SERIAL_CORE=y | ||
545 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
546 | CONFIG_UNIX98_PTYS=y | ||
547 | CONFIG_LEGACY_PTYS=y | ||
548 | CONFIG_LEGACY_PTY_COUNT=256 | ||
549 | |||
550 | # | ||
551 | # IPMI | ||
552 | # | ||
553 | # CONFIG_IPMI_HANDLER is not set | ||
554 | |||
555 | # | ||
556 | # Watchdog Cards | ||
557 | # | ||
558 | CONFIG_WATCHDOG=y | ||
559 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
560 | |||
561 | # | ||
562 | # Watchdog Device Drivers | ||
563 | # | ||
564 | # CONFIG_SOFT_WATCHDOG is not set | ||
565 | # CONFIG_BOOKE_WDT is not set | ||
566 | CONFIG_HW_RANDOM=y | ||
567 | # CONFIG_NVRAM is not set | ||
568 | CONFIG_GEN_RTC=y | ||
569 | # CONFIG_GEN_RTC_X is not set | ||
570 | # CONFIG_DTLK is not set | ||
571 | # CONFIG_R3964 is not set | ||
572 | # CONFIG_RAW_DRIVER is not set | ||
573 | |||
574 | # | ||
575 | # TPM devices | ||
576 | # | ||
577 | # CONFIG_TCG_TPM is not set | ||
578 | |||
579 | # | ||
580 | # I2C support | ||
581 | # | ||
582 | CONFIG_I2C=y | ||
583 | CONFIG_I2C_CHARDEV=y | ||
584 | |||
585 | # | ||
586 | # I2C Algorithms | ||
587 | # | ||
588 | # CONFIG_I2C_ALGOBIT is not set | ||
589 | # CONFIG_I2C_ALGOPCF is not set | ||
590 | # CONFIG_I2C_ALGOPCA is not set | ||
591 | |||
592 | # | ||
593 | # I2C Hardware Bus support | ||
594 | # | ||
595 | CONFIG_I2C_MPC=y | ||
596 | # CONFIG_I2C_OCORES is not set | ||
597 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
598 | # CONFIG_I2C_STUB is not set | ||
599 | # CONFIG_I2C_PCA_ISA is not set | ||
600 | |||
601 | # | ||
602 | # Miscellaneous I2C Chip support | ||
603 | # | ||
604 | # CONFIG_SENSORS_DS1337 is not set | ||
605 | # CONFIG_SENSORS_DS1374 is not set | ||
606 | # CONFIG_SENSORS_EEPROM is not set | ||
607 | # CONFIG_SENSORS_PCF8574 is not set | ||
608 | # CONFIG_SENSORS_PCA9539 is not set | ||
609 | # CONFIG_SENSORS_PCF8591 is not set | ||
610 | # CONFIG_SENSORS_M41T00 is not set | ||
611 | # CONFIG_SENSORS_MAX6875 is not set | ||
612 | # CONFIG_I2C_DEBUG_CORE is not set | ||
613 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
614 | # CONFIG_I2C_DEBUG_BUS is not set | ||
615 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
616 | |||
617 | # | ||
618 | # SPI support | ||
619 | # | ||
620 | # CONFIG_SPI is not set | ||
621 | # CONFIG_SPI_MASTER is not set | ||
622 | |||
623 | # | ||
624 | # Dallas's 1-wire bus | ||
625 | # | ||
626 | # CONFIG_W1 is not set | ||
627 | |||
628 | # | ||
629 | # Hardware Monitoring support | ||
630 | # | ||
631 | CONFIG_HWMON=y | ||
632 | # CONFIG_HWMON_VID is not set | ||
633 | # CONFIG_SENSORS_ABITUGURU is not set | ||
634 | # CONFIG_SENSORS_ADM1021 is not set | ||
635 | # CONFIG_SENSORS_ADM1025 is not set | ||
636 | # CONFIG_SENSORS_ADM1026 is not set | ||
637 | # CONFIG_SENSORS_ADM1031 is not set | ||
638 | # CONFIG_SENSORS_ADM9240 is not set | ||
639 | # CONFIG_SENSORS_ASB100 is not set | ||
640 | # CONFIG_SENSORS_ATXP1 is not set | ||
641 | # CONFIG_SENSORS_DS1621 is not set | ||
642 | # CONFIG_SENSORS_F71805F is not set | ||
643 | # CONFIG_SENSORS_FSCHER is not set | ||
644 | # CONFIG_SENSORS_FSCPOS is not set | ||
645 | # CONFIG_SENSORS_GL518SM is not set | ||
646 | # CONFIG_SENSORS_GL520SM is not set | ||
647 | # CONFIG_SENSORS_IT87 is not set | ||
648 | # CONFIG_SENSORS_LM63 is not set | ||
649 | # CONFIG_SENSORS_LM75 is not set | ||
650 | # CONFIG_SENSORS_LM77 is not set | ||
651 | # CONFIG_SENSORS_LM78 is not set | ||
652 | # CONFIG_SENSORS_LM80 is not set | ||
653 | # CONFIG_SENSORS_LM83 is not set | ||
654 | # CONFIG_SENSORS_LM85 is not set | ||
655 | # CONFIG_SENSORS_LM87 is not set | ||
656 | # CONFIG_SENSORS_LM90 is not set | ||
657 | # CONFIG_SENSORS_LM92 is not set | ||
658 | # CONFIG_SENSORS_MAX1619 is not set | ||
659 | # CONFIG_SENSORS_PC87360 is not set | ||
660 | # CONFIG_SENSORS_PC87427 is not set | ||
661 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
662 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
663 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
664 | # CONFIG_SENSORS_VT1211 is not set | ||
665 | # CONFIG_SENSORS_W83781D is not set | ||
666 | # CONFIG_SENSORS_W83791D is not set | ||
667 | # CONFIG_SENSORS_W83792D is not set | ||
668 | # CONFIG_SENSORS_W83793 is not set | ||
669 | # CONFIG_SENSORS_W83L785TS is not set | ||
670 | # CONFIG_SENSORS_W83627HF is not set | ||
671 | # CONFIG_SENSORS_W83627EHF is not set | ||
672 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
673 | |||
674 | # | ||
675 | # Multimedia devices | ||
676 | # | ||
677 | # CONFIG_VIDEO_DEV is not set | ||
678 | |||
679 | # | ||
680 | # Digital Video Broadcasting Devices | ||
681 | # | ||
682 | # CONFIG_DVB is not set | ||
683 | |||
684 | # | ||
685 | # Graphics support | ||
686 | # | ||
687 | CONFIG_FIRMWARE_EDID=y | ||
688 | # CONFIG_FB is not set | ||
689 | # CONFIG_FB_IBM_GXT4500 is not set | ||
690 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
691 | |||
692 | # | ||
693 | # Sound | ||
694 | # | ||
695 | # CONFIG_SOUND is not set | ||
696 | |||
697 | # | ||
698 | # HID Devices | ||
699 | # | ||
700 | CONFIG_HID=y | ||
701 | |||
702 | # | ||
703 | # USB support | ||
704 | # | ||
705 | # CONFIG_USB_ARCH_HAS_HCD is not set | ||
706 | # CONFIG_USB_ARCH_HAS_OHCI is not set | ||
707 | # CONFIG_USB_ARCH_HAS_EHCI is not set | ||
708 | |||
709 | # | ||
710 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
711 | # | ||
712 | |||
713 | # | ||
714 | # USB Gadget Support | ||
715 | # | ||
716 | # CONFIG_USB_GADGET is not set | ||
717 | |||
718 | # | ||
719 | # MMC/SD Card support | ||
720 | # | ||
721 | # CONFIG_MMC is not set | ||
722 | |||
723 | # | ||
724 | # LED devices | ||
725 | # | ||
726 | # CONFIG_NEW_LEDS is not set | ||
727 | |||
728 | # | ||
729 | # LED drivers | ||
730 | # | ||
731 | |||
732 | # | ||
733 | # LED Triggers | ||
734 | # | ||
735 | |||
736 | # | ||
737 | # InfiniBand support | ||
738 | # | ||
739 | |||
740 | # | ||
741 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
742 | # | ||
743 | |||
744 | # | ||
745 | # Real Time Clock | ||
746 | # | ||
747 | # CONFIG_RTC_CLASS is not set | ||
748 | |||
749 | # | ||
750 | # DMA Engine support | ||
751 | # | ||
752 | # CONFIG_DMA_ENGINE is not set | ||
753 | |||
754 | # | ||
755 | # DMA Clients | ||
756 | # | ||
757 | |||
758 | # | ||
759 | # DMA Devices | ||
760 | # | ||
761 | |||
762 | # | ||
763 | # Virtualization | ||
764 | # | ||
765 | |||
766 | # | ||
767 | # File systems | ||
768 | # | ||
769 | CONFIG_EXT2_FS=y | ||
770 | # CONFIG_EXT2_FS_XATTR is not set | ||
771 | # CONFIG_EXT2_FS_XIP is not set | ||
772 | CONFIG_EXT3_FS=y | ||
773 | CONFIG_EXT3_FS_XATTR=y | ||
774 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
775 | # CONFIG_EXT3_FS_SECURITY is not set | ||
776 | # CONFIG_EXT4DEV_FS is not set | ||
777 | CONFIG_JBD=y | ||
778 | # CONFIG_JBD_DEBUG is not set | ||
779 | CONFIG_FS_MBCACHE=y | ||
780 | # CONFIG_REISERFS_FS is not set | ||
781 | # CONFIG_JFS_FS is not set | ||
782 | # CONFIG_FS_POSIX_ACL is not set | ||
783 | # CONFIG_XFS_FS is not set | ||
784 | # CONFIG_GFS2_FS is not set | ||
785 | # CONFIG_OCFS2_FS is not set | ||
786 | # CONFIG_MINIX_FS is not set | ||
787 | # CONFIG_ROMFS_FS is not set | ||
788 | CONFIG_INOTIFY=y | ||
789 | CONFIG_INOTIFY_USER=y | ||
790 | # CONFIG_QUOTA is not set | ||
791 | CONFIG_DNOTIFY=y | ||
792 | # CONFIG_AUTOFS_FS is not set | ||
793 | # CONFIG_AUTOFS4_FS is not set | ||
794 | # CONFIG_FUSE_FS is not set | ||
795 | |||
796 | # | ||
797 | # CD-ROM/DVD Filesystems | ||
798 | # | ||
799 | # CONFIG_ISO9660_FS is not set | ||
800 | # CONFIG_UDF_FS is not set | ||
801 | |||
802 | # | ||
803 | # DOS/FAT/NT Filesystems | ||
804 | # | ||
805 | # CONFIG_MSDOS_FS is not set | ||
806 | # CONFIG_VFAT_FS is not set | ||
807 | # CONFIG_NTFS_FS is not set | ||
808 | |||
809 | # | ||
810 | # Pseudo filesystems | ||
811 | # | ||
812 | CONFIG_PROC_FS=y | ||
813 | CONFIG_PROC_KCORE=y | ||
814 | CONFIG_PROC_SYSCTL=y | ||
815 | CONFIG_SYSFS=y | ||
816 | CONFIG_TMPFS=y | ||
817 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
818 | # CONFIG_HUGETLB_PAGE is not set | ||
819 | CONFIG_RAMFS=y | ||
820 | # CONFIG_CONFIGFS_FS is not set | ||
821 | |||
822 | # | ||
823 | # Miscellaneous filesystems | ||
824 | # | ||
825 | # CONFIG_ADFS_FS is not set | ||
826 | # CONFIG_AFFS_FS is not set | ||
827 | # CONFIG_HFS_FS is not set | ||
828 | # CONFIG_HFSPLUS_FS is not set | ||
829 | # CONFIG_BEFS_FS is not set | ||
830 | # CONFIG_BFS_FS is not set | ||
831 | # CONFIG_EFS_FS is not set | ||
832 | # CONFIG_CRAMFS is not set | ||
833 | # CONFIG_VXFS_FS is not set | ||
834 | # CONFIG_HPFS_FS is not set | ||
835 | # CONFIG_QNX4FS_FS is not set | ||
836 | # CONFIG_SYSV_FS is not set | ||
837 | # CONFIG_UFS_FS is not set | ||
838 | |||
839 | # | ||
840 | # Network File Systems | ||
841 | # | ||
842 | CONFIG_NFS_FS=y | ||
843 | CONFIG_NFS_V3=y | ||
844 | # CONFIG_NFS_V3_ACL is not set | ||
845 | CONFIG_NFS_V4=y | ||
846 | # CONFIG_NFS_DIRECTIO is not set | ||
847 | # CONFIG_NFSD is not set | ||
848 | CONFIG_ROOT_NFS=y | ||
849 | CONFIG_LOCKD=y | ||
850 | CONFIG_LOCKD_V4=y | ||
851 | CONFIG_NFS_COMMON=y | ||
852 | CONFIG_SUNRPC=y | ||
853 | CONFIG_SUNRPC_GSS=y | ||
854 | CONFIG_RPCSEC_GSS_KRB5=y | ||
855 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
856 | # CONFIG_SMB_FS is not set | ||
857 | # CONFIG_CIFS is not set | ||
858 | # CONFIG_NCP_FS is not set | ||
859 | # CONFIG_CODA_FS is not set | ||
860 | # CONFIG_AFS_FS is not set | ||
861 | # CONFIG_9P_FS is not set | ||
862 | |||
863 | # | ||
864 | # Partition Types | ||
865 | # | ||
866 | CONFIG_PARTITION_ADVANCED=y | ||
867 | # CONFIG_ACORN_PARTITION is not set | ||
868 | # CONFIG_OSF_PARTITION is not set | ||
869 | # CONFIG_AMIGA_PARTITION is not set | ||
870 | # CONFIG_ATARI_PARTITION is not set | ||
871 | # CONFIG_MAC_PARTITION is not set | ||
872 | # CONFIG_MSDOS_PARTITION is not set | ||
873 | # CONFIG_LDM_PARTITION is not set | ||
874 | # CONFIG_SGI_PARTITION is not set | ||
875 | # CONFIG_ULTRIX_PARTITION is not set | ||
876 | # CONFIG_SUN_PARTITION is not set | ||
877 | # CONFIG_KARMA_PARTITION is not set | ||
878 | # CONFIG_EFI_PARTITION is not set | ||
879 | |||
880 | # | ||
881 | # Native Language Support | ||
882 | # | ||
883 | # CONFIG_NLS is not set | ||
884 | |||
885 | # | ||
886 | # Distributed Lock Manager | ||
887 | # | ||
888 | # CONFIG_DLM is not set | ||
889 | |||
890 | # | ||
891 | # Library routines | ||
892 | # | ||
893 | CONFIG_BITREVERSE=y | ||
894 | # CONFIG_CRC_CCITT is not set | ||
895 | # CONFIG_CRC16 is not set | ||
896 | CONFIG_CRC32=y | ||
897 | # CONFIG_LIBCRC32C is not set | ||
898 | CONFIG_PLIST=y | ||
899 | CONFIG_IOMAP_COPY=y | ||
900 | |||
901 | # | ||
902 | # Instrumentation Support | ||
903 | # | ||
904 | CONFIG_PROFILING=y | ||
905 | CONFIG_OPROFILE=y | ||
906 | |||
907 | # | ||
908 | # Kernel hacking | ||
909 | # | ||
910 | # CONFIG_PRINTK_TIME is not set | ||
911 | CONFIG_ENABLE_MUST_CHECK=y | ||
912 | # CONFIG_MAGIC_SYSRQ is not set | ||
913 | # CONFIG_UNUSED_SYMBOLS is not set | ||
914 | # CONFIG_DEBUG_FS is not set | ||
915 | # CONFIG_HEADERS_CHECK is not set | ||
916 | CONFIG_DEBUG_KERNEL=y | ||
917 | CONFIG_LOG_BUF_SHIFT=14 | ||
918 | CONFIG_DETECT_SOFTLOCKUP=y | ||
919 | # CONFIG_SCHEDSTATS is not set | ||
920 | # CONFIG_DEBUG_SLAB is not set | ||
921 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
922 | # CONFIG_RT_MUTEX_TESTER is not set | ||
923 | # CONFIG_DEBUG_SPINLOCK is not set | ||
924 | # CONFIG_DEBUG_MUTEXES is not set | ||
925 | # CONFIG_DEBUG_RWSEMS is not set | ||
926 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
927 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
928 | # CONFIG_DEBUG_KOBJECT is not set | ||
929 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
930 | # CONFIG_DEBUG_INFO is not set | ||
931 | # CONFIG_DEBUG_VM is not set | ||
932 | # CONFIG_DEBUG_LIST is not set | ||
933 | CONFIG_FORCED_INLINING=y | ||
934 | # CONFIG_RCU_TORTURE_TEST is not set | ||
935 | CONFIG_DEBUGGER=y | ||
936 | # CONFIG_XMON is not set | ||
937 | # CONFIG_BDI_SWITCH is not set | ||
938 | CONFIG_BOOTX_TEXT=y | ||
939 | CONFIG_PPC_EARLY_DEBUG=y | ||
940 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | ||
941 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
942 | # CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set | ||
943 | # CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set | ||
944 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
945 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
946 | |||
947 | # | ||
948 | # Security options | ||
949 | # | ||
950 | # CONFIG_KEYS is not set | ||
951 | # CONFIG_SECURITY is not set | ||
952 | |||
953 | # | ||
954 | # Cryptographic options | ||
955 | # | ||
956 | CONFIG_CRYPTO=y | ||
957 | CONFIG_CRYPTO_ALGAPI=y | ||
958 | CONFIG_CRYPTO_BLKCIPHER=y | ||
959 | CONFIG_CRYPTO_MANAGER=y | ||
960 | # CONFIG_CRYPTO_HMAC is not set | ||
961 | # CONFIG_CRYPTO_XCBC is not set | ||
962 | # CONFIG_CRYPTO_NULL is not set | ||
963 | # CONFIG_CRYPTO_MD4 is not set | ||
964 | CONFIG_CRYPTO_MD5=y | ||
965 | # CONFIG_CRYPTO_SHA1 is not set | ||
966 | # CONFIG_CRYPTO_SHA256 is not set | ||
967 | # CONFIG_CRYPTO_SHA512 is not set | ||
968 | # CONFIG_CRYPTO_WP512 is not set | ||
969 | # CONFIG_CRYPTO_TGR192 is not set | ||
970 | # CONFIG_CRYPTO_GF128MUL is not set | ||
971 | CONFIG_CRYPTO_ECB=m | ||
972 | CONFIG_CRYPTO_CBC=y | ||
973 | # CONFIG_CRYPTO_LRW is not set | ||
974 | CONFIG_CRYPTO_DES=y | ||
975 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
976 | # CONFIG_CRYPTO_TWOFISH is not set | ||
977 | # CONFIG_CRYPTO_SERPENT is not set | ||
978 | # CONFIG_CRYPTO_AES is not set | ||
979 | # CONFIG_CRYPTO_CAST5 is not set | ||
980 | # CONFIG_CRYPTO_CAST6 is not set | ||
981 | # CONFIG_CRYPTO_TEA is not set | ||
982 | # CONFIG_CRYPTO_ARC4 is not set | ||
983 | # CONFIG_CRYPTO_KHAZAD is not set | ||
984 | # CONFIG_CRYPTO_ANUBIS is not set | ||
985 | # CONFIG_CRYPTO_DEFLATE is not set | ||
986 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
987 | # CONFIG_CRYPTO_CRC32C is not set | ||
988 | # CONFIG_CRYPTO_TEST is not set | ||
989 | |||
990 | # | ||
991 | # Hardware crypto devices | ||
992 | # | ||
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c index 93f21aaf7c8e..3678997339d6 100644 --- a/arch/powerpc/kernel/btext.c +++ b/arch/powerpc/kernel/btext.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/io.h> | 18 | #include <asm/io.h> |
19 | #include <asm/lmb.h> | 19 | #include <asm/lmb.h> |
20 | #include <asm/processor.h> | 20 | #include <asm/processor.h> |
21 | #include <asm/udbg.h> | ||
21 | 22 | ||
22 | #define NO_SCROLL | 23 | #define NO_SCROLL |
23 | 24 | ||
@@ -912,3 +913,11 @@ static unsigned char vga_font[cmapsz] = { | |||
912 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | 913 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
913 | 0x00, 0x00, 0x00, 0x00, | 914 | 0x00, 0x00, 0x00, 0x00, |
914 | }; | 915 | }; |
916 | |||
917 | void __init udbg_init_btext(void) | ||
918 | { | ||
919 | /* If btext is enabled, we might have a BAT setup for early display, | ||
920 | * thus we do enable some very basic udbg output | ||
921 | */ | ||
922 | udbg_putc = btext_drawchar; | ||
923 | } | ||
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index dd17dffbf058..7ec4ac77c0fa 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -44,7 +44,7 @@ extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); | |||
44 | extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); | 44 | extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); |
45 | extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); | 45 | extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); |
46 | extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); | 46 | extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); |
47 | extern void __restore_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); | 47 | extern void __restore_cpu_pa6t(void); |
48 | extern void __restore_cpu_ppc970(void); | 48 | extern void __restore_cpu_ppc970(void); |
49 | #endif /* CONFIG_PPC64 */ | 49 | #endif /* CONFIG_PPC64 */ |
50 | 50 | ||
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index accb39d49911..a15d4b8cce48 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S | |||
@@ -32,8 +32,6 @@ | |||
32 | #include <asm/page.h> | 32 | #include <asm/page.h> |
33 | #include <asm/mmu.h> | 33 | #include <asm/mmu.h> |
34 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
35 | #include <asm/ibm4xx.h> | ||
36 | #include <asm/ibm44x.h> | ||
37 | #include <asm/cputable.h> | 35 | #include <asm/cputable.h> |
38 | #include <asm/thread_info.h> | 36 | #include <asm/thread_info.h> |
39 | #include <asm/ppc_asm.h> | 37 | #include <asm/ppc_asm.h> |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 66877bdfe0b7..1f155d399d57 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
206 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | 206 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ |
207 | mtspr SPRN_MAS0,r7 | 207 | mtspr SPRN_MAS0,r7 |
208 | tlbre | 208 | tlbre |
209 | li r6,0 | 209 | mfspr r6,SPRN_MAS1 |
210 | rlwinm r6,r6,0,2,0 /* clear IPROT */ | ||
210 | mtspr SPRN_MAS1,r6 | 211 | mtspr SPRN_MAS1,r6 |
211 | tlbwe | 212 | tlbwe |
212 | /* Invalidate TLB1 */ | 213 | /* Invalidate TLB1 */ |
@@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
248 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | 249 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ |
249 | mtspr SPRN_MAS0,r7 | 250 | mtspr SPRN_MAS0,r7 |
250 | tlbre | 251 | tlbre |
252 | mfspr r8,SPRN_MAS1 | ||
253 | rlwinm r8,r8,0,2,0 /* clear IPROT */ | ||
251 | mtspr SPRN_MAS1,r8 | 254 | mtspr SPRN_MAS1,r8 |
252 | tlbwe | 255 | tlbwe |
253 | /* Invalidate TLB1 */ | 256 | /* Invalidate TLB1 */ |
@@ -889,7 +892,6 @@ load_up_spe: | |||
889 | REST_GPR(9, r11) | 892 | REST_GPR(9, r11) |
890 | REST_GPR(12, r11) | 893 | REST_GPR(12, r11) |
891 | lwz r11,GPR11(r11) | 894 | lwz r11,GPR11(r11) |
892 | SYNC | ||
893 | rfi | 895 | rfi |
894 | 896 | ||
895 | /* | 897 | /* |
@@ -953,7 +955,6 @@ _GLOBAL(giveup_altivec) | |||
953 | _GLOBAL(giveup_spe) | 955 | _GLOBAL(giveup_spe) |
954 | mfmsr r5 | 956 | mfmsr r5 |
955 | oris r5,r5,MSR_SPE@h | 957 | oris r5,r5,MSR_SPE@h |
956 | SYNC | ||
957 | mtmsr r5 /* enable use of SPE now */ | 958 | mtmsr r5 /* enable use of SPE now */ |
958 | isync | 959 | isync |
959 | cmpi 0,r3,0 | 960 | cmpi 0,r3,0 |
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c index 89f46f377922..325f490a10cc 100644 --- a/arch/powerpc/kernel/legacy_serial.c +++ b/arch/powerpc/kernel/legacy_serial.c | |||
@@ -124,6 +124,10 @@ static int __init add_legacy_soc_port(struct device_node *np, | |||
124 | if (get_property(np, "clock-frequency", NULL) == NULL) | 124 | if (get_property(np, "clock-frequency", NULL) == NULL) |
125 | return -1; | 125 | return -1; |
126 | 126 | ||
127 | /* if rtas uses this device, don't try to use it as well */ | ||
128 | if (get_property(np, "used-by-rtas", NULL) != NULL) | ||
129 | return -1; | ||
130 | |||
127 | /* Get the address */ | 131 | /* Get the address */ |
128 | addrp = of_get_address(soc_dev, 0, NULL, NULL); | 132 | addrp = of_get_address(soc_dev, 0, NULL, NULL); |
129 | if (addrp == NULL) | 133 | if (addrp == NULL) |
@@ -334,6 +338,17 @@ void __init find_legacy_serial_ports(void) | |||
334 | of_node_put(tsi); | 338 | of_node_put(tsi); |
335 | } | 339 | } |
336 | 340 | ||
341 | /* First fill our array with opb bus ports */ | ||
342 | for (np = NULL; (np = of_find_compatible_node(np, "serial", "ns16750")) != NULL;) { | ||
343 | struct device_node *opb = of_get_parent(np); | ||
344 | if (opb && !strcmp(opb->type, "opb")) { | ||
345 | index = add_legacy_soc_port(np, np); | ||
346 | if (index >= 0 && np == stdout) | ||
347 | legacy_serial_console = index; | ||
348 | } | ||
349 | of_node_put(opb); | ||
350 | } | ||
351 | |||
337 | #ifdef CONFIG_PCI | 352 | #ifdef CONFIG_PCI |
338 | /* Next, try to locate PCI ports */ | 353 | /* Next, try to locate PCI ports */ |
339 | for (np = NULL; (np = of_find_all_nodes(np));) { | 354 | for (np = NULL; (np = of_find_all_nodes(np));) { |
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c index 520ef42f642e..4fb5938ce6d3 100644 --- a/arch/powerpc/kernel/prom_init.c +++ b/arch/powerpc/kernel/prom_init.c | |||
@@ -2117,11 +2117,92 @@ static void __init fixup_device_tree_pmac(void) | |||
2117 | #define fixup_device_tree_pmac() | 2117 | #define fixup_device_tree_pmac() |
2118 | #endif | 2118 | #endif |
2119 | 2119 | ||
2120 | #ifdef CONFIG_PPC_EFIKA | ||
2121 | /* The current fw of the Efika has a device tree needs quite a few | ||
2122 | * fixups to be compliant with the mpc52xx bindings. It's currently | ||
2123 | * unknown if it will ever be compliant (come on bPlan ...) so we do fixups. | ||
2124 | * NOTE that we (barely) tolerate it because the EFIKA was out before | ||
2125 | * the bindings were finished, for any new boards -> RTFM ! */ | ||
2126 | |||
2127 | struct subst_entry { | ||
2128 | char *path; | ||
2129 | char *property; | ||
2130 | void *value; | ||
2131 | int value_len; | ||
2132 | }; | ||
2133 | |||
2134 | static void __init fixup_device_tree_efika(void) | ||
2135 | { | ||
2136 | /* Substitution table */ | ||
2137 | #define prop_cstr(x) x, sizeof(x) | ||
2138 | int prop_sound_irq[3] = { 2, 2, 0 }; | ||
2139 | int prop_bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0, | ||
2140 | 3,4,0, 3,5,0, 3,6,0, 3,7,0, | ||
2141 | 3,8,0, 3,9,0, 3,10,0, 3,11,0, | ||
2142 | 3,12,0, 3,13,0, 3,14,0, 3,15,0 }; | ||
2143 | struct subst_entry efika_subst_table[] = { | ||
2144 | { "/", "device_type", prop_cstr("efika") }, | ||
2145 | { "/builtin", "compatible", prop_cstr("soc") }, | ||
2146 | { "/builtin/ata", "compatible", prop_cstr("mpc5200b-ata\0mpc5200-ata"), }, | ||
2147 | { "/builtin/bestcomm", "compatible", prop_cstr("mpc5200b-bestcomm\0mpc5200-bestcomm") }, | ||
2148 | { "/builtin/bestcomm", "interrupts", prop_bcomm_irq, sizeof(prop_bcomm_irq) }, | ||
2149 | { "/builtin/ethernet", "compatible", prop_cstr("mpc5200b-fec\0mpc5200-fec") }, | ||
2150 | { "/builtin/pic", "compatible", prop_cstr("mpc5200b-pic\0mpc5200-pic") }, | ||
2151 | { "/builtin/serial", "compatible", prop_cstr("mpc5200b-psc-uart\0mpc5200-psc-uart") }, | ||
2152 | { "/builtin/sound", "compatible", prop_cstr("mpc5200b-psc-ac97\0mpc5200-psc-ac97") }, | ||
2153 | { "/builtin/sound", "interrupts", prop_sound_irq, sizeof(prop_sound_irq) }, | ||
2154 | { "/builtin/sram", "compatible", prop_cstr("mpc5200b-sram\0mpc5200-sram") }, | ||
2155 | { "/builtin/sram", "device_type", prop_cstr("sram") }, | ||
2156 | {} | ||
2157 | }; | ||
2158 | #undef prop_cstr | ||
2159 | |||
2160 | /* Vars */ | ||
2161 | u32 node; | ||
2162 | char prop[64]; | ||
2163 | int rv, i; | ||
2164 | |||
2165 | /* Check if we're really running on a EFIKA */ | ||
2166 | node = call_prom("finddevice", 1, 1, ADDR("/")); | ||
2167 | if (!PHANDLE_VALID(node)) | ||
2168 | return; | ||
2169 | |||
2170 | rv = prom_getprop(node, "model", prop, sizeof(prop)); | ||
2171 | if (rv == PROM_ERROR) | ||
2172 | return; | ||
2173 | if (strcmp(prop, "EFIKA5K2")) | ||
2174 | return; | ||
2175 | |||
2176 | prom_printf("Applying EFIKA device tree fixups\n"); | ||
2177 | |||
2178 | /* Process substitution table */ | ||
2179 | for (i=0; efika_subst_table[i].path; i++) { | ||
2180 | struct subst_entry *se = &efika_subst_table[i]; | ||
2181 | |||
2182 | node = call_prom("finddevice", 1, 1, ADDR(se->path)); | ||
2183 | if (!PHANDLE_VALID(node)) { | ||
2184 | prom_printf("fixup_device_tree_efika: ", | ||
2185 | "skipped entry %x - not found\n", i); | ||
2186 | continue; | ||
2187 | } | ||
2188 | |||
2189 | rv = prom_setprop(node, se->path, se->property, | ||
2190 | se->value, se->value_len ); | ||
2191 | if (rv == PROM_ERROR) | ||
2192 | prom_printf("fixup_device_tree_efika: ", | ||
2193 | "skipped entry %x - setprop error\n", i); | ||
2194 | } | ||
2195 | } | ||
2196 | #else | ||
2197 | #define fixup_device_tree_efika() | ||
2198 | #endif | ||
2199 | |||
2120 | static void __init fixup_device_tree(void) | 2200 | static void __init fixup_device_tree(void) |
2121 | { | 2201 | { |
2122 | fixup_device_tree_maple(); | 2202 | fixup_device_tree_maple(); |
2123 | fixup_device_tree_chrp(); | 2203 | fixup_device_tree_chrp(); |
2124 | fixup_device_tree_pmac(); | 2204 | fixup_device_tree_pmac(); |
2205 | fixup_device_tree_efika(); | ||
2125 | } | 2206 | } |
2126 | 2207 | ||
2127 | static void __init prom_find_boot_cpu(void) | 2208 | static void __init prom_find_boot_cpu(void) |
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 6a19fa40dcee..44a6a3c47feb 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
@@ -116,12 +116,8 @@ unsigned long __init early_init(unsigned long dt_ptr) | |||
116 | */ | 116 | */ |
117 | void __init machine_init(unsigned long dt_ptr, unsigned long phys) | 117 | void __init machine_init(unsigned long dt_ptr, unsigned long phys) |
118 | { | 118 | { |
119 | /* If btext is enabled, we might have a BAT setup for early display, | 119 | /* Enable early debugging if any specified (see udbg.h) */ |
120 | * thus we do enable some very basic udbg output | 120 | udbg_early_init(); |
121 | */ | ||
122 | #ifdef CONFIG_BOOTX_TEXT | ||
123 | udbg_putc = btext_drawchar; | ||
124 | #endif | ||
125 | 121 | ||
126 | /* Do some early initialization based on the flat device tree */ | 122 | /* Do some early initialization based on the flat device tree */ |
127 | early_init_devtree(__va(dt_ptr)); | 123 | early_init_devtree(__va(dt_ptr)); |
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 0e8beca460af..924d692bc8f9 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c | |||
@@ -78,29 +78,6 @@ int smt_enabled_at_boot = 1; | |||
78 | 78 | ||
79 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; | 79 | static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL; |
80 | 80 | ||
81 | #ifdef CONFIG_MPIC | ||
82 | int __init smp_mpic_probe(void) | ||
83 | { | ||
84 | int nr_cpus; | ||
85 | |||
86 | DBG("smp_mpic_probe()...\n"); | ||
87 | |||
88 | nr_cpus = cpus_weight(cpu_possible_map); | ||
89 | |||
90 | DBG("nr_cpus: %d\n", nr_cpus); | ||
91 | |||
92 | if (nr_cpus > 1) | ||
93 | mpic_request_ipis(); | ||
94 | |||
95 | return nr_cpus; | ||
96 | } | ||
97 | |||
98 | void __devinit smp_mpic_setup_cpu(int cpu) | ||
99 | { | ||
100 | mpic_setup_this_cpu(); | ||
101 | } | ||
102 | #endif /* CONFIG_MPIC */ | ||
103 | |||
104 | #ifdef CONFIG_PPC64 | 81 | #ifdef CONFIG_PPC64 |
105 | void __devinit smp_generic_kick_cpu(int nr) | 82 | void __devinit smp_generic_kick_cpu(int nr) |
106 | { | 83 | { |
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c index 194a93eeb3e7..7e0971868fc2 100644 --- a/arch/powerpc/kernel/udbg.c +++ b/arch/powerpc/kernel/udbg.c | |||
@@ -49,6 +49,8 @@ void __init udbg_early_init(void) | |||
49 | udbg_init_debug_beat(); | 49 | udbg_init_debug_beat(); |
50 | #elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE) | 50 | #elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE) |
51 | udbg_init_pas_realmode(); | 51 | udbg_init_pas_realmode(); |
52 | #elif defined(CONFIG_BOOTX_TEXT) | ||
53 | udbg_init_btext(); | ||
52 | #endif | 54 | #endif |
53 | } | 55 | } |
54 | 56 | ||
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c index 50149ec6efa4..e46c31b36641 100644 --- a/arch/powerpc/kernel/vdso.c +++ b/arch/powerpc/kernel/vdso.c | |||
@@ -49,24 +49,23 @@ | |||
49 | /* Max supported size for symbol names */ | 49 | /* Max supported size for symbol names */ |
50 | #define MAX_SYMNAME 64 | 50 | #define MAX_SYMNAME 64 |
51 | 51 | ||
52 | #define VDSO32_MAXPAGES (((0x3000 + PAGE_MASK) >> PAGE_SHIFT) + 2) | ||
53 | #define VDSO64_MAXPAGES (((0x3000 + PAGE_MASK) >> PAGE_SHIFT) + 2) | ||
54 | |||
55 | extern char vdso32_start, vdso32_end; | 52 | extern char vdso32_start, vdso32_end; |
56 | static void *vdso32_kbase = &vdso32_start; | 53 | static void *vdso32_kbase = &vdso32_start; |
57 | unsigned int vdso32_pages; | 54 | static unsigned int vdso32_pages; |
58 | static struct page *vdso32_pagelist[VDSO32_MAXPAGES]; | 55 | static struct page **vdso32_pagelist; |
59 | unsigned long vdso32_sigtramp; | 56 | unsigned long vdso32_sigtramp; |
60 | unsigned long vdso32_rt_sigtramp; | 57 | unsigned long vdso32_rt_sigtramp; |
61 | 58 | ||
62 | #ifdef CONFIG_PPC64 | 59 | #ifdef CONFIG_PPC64 |
63 | extern char vdso64_start, vdso64_end; | 60 | extern char vdso64_start, vdso64_end; |
64 | static void *vdso64_kbase = &vdso64_start; | 61 | static void *vdso64_kbase = &vdso64_start; |
65 | unsigned int vdso64_pages; | 62 | static unsigned int vdso64_pages; |
66 | static struct page *vdso64_pagelist[VDSO64_MAXPAGES]; | 63 | static struct page **vdso64_pagelist; |
67 | unsigned long vdso64_rt_sigtramp; | 64 | unsigned long vdso64_rt_sigtramp; |
68 | #endif /* CONFIG_PPC64 */ | 65 | #endif /* CONFIG_PPC64 */ |
69 | 66 | ||
67 | static int vdso_ready; | ||
68 | |||
70 | /* | 69 | /* |
71 | * The vdso data page (aka. systemcfg for old ppc64 fans) is here. | 70 | * The vdso data page (aka. systemcfg for old ppc64 fans) is here. |
72 | * Once the early boot kernel code no longer needs to muck around | 71 | * Once the early boot kernel code no longer needs to muck around |
@@ -182,6 +181,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, | |||
182 | unsigned long vdso_base; | 181 | unsigned long vdso_base; |
183 | int rc; | 182 | int rc; |
184 | 183 | ||
184 | if (!vdso_ready) | ||
185 | return 0; | ||
186 | |||
185 | #ifdef CONFIG_PPC64 | 187 | #ifdef CONFIG_PPC64 |
186 | if (test_thread_flag(TIF_32BIT)) { | 188 | if (test_thread_flag(TIF_32BIT)) { |
187 | vdso_pagelist = vdso32_pagelist; | 189 | vdso_pagelist = vdso32_pagelist; |
@@ -661,7 +663,7 @@ static void __init vdso_setup_syscall_map(void) | |||
661 | } | 663 | } |
662 | 664 | ||
663 | 665 | ||
664 | void __init vdso_init(void) | 666 | static int __init vdso_init(void) |
665 | { | 667 | { |
666 | int i; | 668 | int i; |
667 | 669 | ||
@@ -716,11 +718,13 @@ void __init vdso_init(void) | |||
716 | #ifdef CONFIG_PPC64 | 718 | #ifdef CONFIG_PPC64 |
717 | vdso64_pages = 0; | 719 | vdso64_pages = 0; |
718 | #endif | 720 | #endif |
719 | return; | 721 | return 0; |
720 | } | 722 | } |
721 | 723 | ||
722 | /* Make sure pages are in the correct state */ | 724 | /* Make sure pages are in the correct state */ |
723 | BUG_ON(vdso32_pages + 2 > VDSO32_MAXPAGES); | 725 | vdso32_pagelist = kzalloc(sizeof(struct page *) * (vdso32_pages + 2), |
726 | GFP_KERNEL); | ||
727 | BUG_ON(vdso32_pagelist == NULL); | ||
724 | for (i = 0; i < vdso32_pages; i++) { | 728 | for (i = 0; i < vdso32_pages; i++) { |
725 | struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE); | 729 | struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE); |
726 | ClearPageReserved(pg); | 730 | ClearPageReserved(pg); |
@@ -731,7 +735,9 @@ void __init vdso_init(void) | |||
731 | vdso32_pagelist[i] = NULL; | 735 | vdso32_pagelist[i] = NULL; |
732 | 736 | ||
733 | #ifdef CONFIG_PPC64 | 737 | #ifdef CONFIG_PPC64 |
734 | BUG_ON(vdso64_pages + 2 > VDSO64_MAXPAGES); | 738 | vdso64_pagelist = kzalloc(sizeof(struct page *) * (vdso64_pages + 2), |
739 | GFP_KERNEL); | ||
740 | BUG_ON(vdso64_pagelist == NULL); | ||
735 | for (i = 0; i < vdso64_pages; i++) { | 741 | for (i = 0; i < vdso64_pages; i++) { |
736 | struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE); | 742 | struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE); |
737 | ClearPageReserved(pg); | 743 | ClearPageReserved(pg); |
@@ -743,7 +749,13 @@ void __init vdso_init(void) | |||
743 | #endif /* CONFIG_PPC64 */ | 749 | #endif /* CONFIG_PPC64 */ |
744 | 750 | ||
745 | get_page(virt_to_page(vdso_data)); | 751 | get_page(virt_to_page(vdso_data)); |
752 | |||
753 | smp_wmb(); | ||
754 | vdso_ready = 1; | ||
755 | |||
756 | return 0; | ||
746 | } | 757 | } |
758 | arch_initcall(vdso_init); | ||
747 | 759 | ||
748 | int in_gate_area_no_task(unsigned long addr) | 760 | int in_gate_area_no_task(unsigned long addr) |
749 | { | 761 | { |
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index 77b4637097e9..52f397c108a7 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c | |||
@@ -384,9 +384,6 @@ void __init mem_init(void) | |||
384 | initsize >> 10); | 384 | initsize >> 10); |
385 | 385 | ||
386 | mem_init_done = 1; | 386 | mem_init_done = 1; |
387 | |||
388 | /* Initialize the vDSO */ | ||
389 | vdso_init(); | ||
390 | } | 387 | } |
391 | 388 | ||
392 | /* | 389 | /* |
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c index bd02272bcb0f..c284bdac9947 100644 --- a/arch/powerpc/mm/pgtable_32.c +++ b/arch/powerpc/mm/pgtable_32.c | |||
@@ -295,7 +295,7 @@ void __init mapin_ram(void) | |||
295 | } | 295 | } |
296 | 296 | ||
297 | /* is x a power of 4? */ | 297 | /* is x a power of 4? */ |
298 | #define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)) | 298 | #define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1) |
299 | 299 | ||
300 | /* | 300 | /* |
301 | * Set up a mapping for a block of I/O. | 301 | * Set up a mapping for a block of I/O. |
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c index 2eb15f388103..e08e1d7b3dc5 100644 --- a/arch/powerpc/oprofile/op_model_cell.c +++ b/arch/powerpc/oprofile/op_model_cell.c | |||
@@ -39,10 +39,17 @@ | |||
39 | #include "../platforms/cell/interrupt.h" | 39 | #include "../platforms/cell/interrupt.h" |
40 | 40 | ||
41 | #define PPU_CYCLES_EVENT_NUM 1 /* event number for CYCLES */ | 41 | #define PPU_CYCLES_EVENT_NUM 1 /* event number for CYCLES */ |
42 | #define PPU_CYCLES_GRP_NUM 1 /* special group number for identifying | ||
43 | * PPU_CYCLES event | ||
44 | */ | ||
42 | #define CBE_COUNT_ALL_CYCLES 0x42800000 /* PPU cycle event specifier */ | 45 | #define CBE_COUNT_ALL_CYCLES 0x42800000 /* PPU cycle event specifier */ |
43 | 46 | ||
44 | #define NUM_THREADS 2 | 47 | #define NUM_THREADS 2 /* number of physical threads in |
45 | #define VIRT_CNTR_SW_TIME_NS 100000000 // 0.5 seconds | 48 | * physical processor |
49 | */ | ||
50 | #define NUM_TRACE_BUS_WORDS 4 | ||
51 | #define NUM_INPUT_BUS_WORDS 2 | ||
52 | |||
46 | 53 | ||
47 | struct pmc_cntrl_data { | 54 | struct pmc_cntrl_data { |
48 | unsigned long vcntr; | 55 | unsigned long vcntr; |
@@ -58,7 +65,7 @@ struct pmc_cntrl_data { | |||
58 | struct pm_signal { | 65 | struct pm_signal { |
59 | u16 cpu; /* Processor to modify */ | 66 | u16 cpu; /* Processor to modify */ |
60 | u16 sub_unit; /* hw subunit this applies to (if applicable) */ | 67 | u16 sub_unit; /* hw subunit this applies to (if applicable) */ |
61 | u16 signal_group; /* Signal Group to Enable/Disable */ | 68 | short int signal_group; /* Signal Group to Enable/Disable */ |
62 | u8 bus_word; /* Enable/Disable on this Trace/Trigger/Event | 69 | u8 bus_word; /* Enable/Disable on this Trace/Trigger/Event |
63 | * Bus Word(s) (bitmask) | 70 | * Bus Word(s) (bitmask) |
64 | */ | 71 | */ |
@@ -93,7 +100,6 @@ static struct { | |||
93 | u32 pm07_cntrl[NR_PHYS_CTRS]; | 100 | u32 pm07_cntrl[NR_PHYS_CTRS]; |
94 | } pm_regs; | 101 | } pm_regs; |
95 | 102 | ||
96 | |||
97 | #define GET_SUB_UNIT(x) ((x & 0x0000f000) >> 12) | 103 | #define GET_SUB_UNIT(x) ((x & 0x0000f000) >> 12) |
98 | #define GET_BUS_WORD(x) ((x & 0x000000f0) >> 4) | 104 | #define GET_BUS_WORD(x) ((x & 0x000000f0) >> 4) |
99 | #define GET_BUS_TYPE(x) ((x & 0x00000300) >> 8) | 105 | #define GET_BUS_TYPE(x) ((x & 0x00000300) >> 8) |
@@ -101,7 +107,6 @@ static struct { | |||
101 | #define GET_COUNT_CYCLES(x) (x & 0x00000001) | 107 | #define GET_COUNT_CYCLES(x) (x & 0x00000001) |
102 | #define GET_INPUT_CONTROL(x) ((x & 0x00000004) >> 2) | 108 | #define GET_INPUT_CONTROL(x) ((x & 0x00000004) >> 2) |
103 | 109 | ||
104 | |||
105 | static DEFINE_PER_CPU(unsigned long[NR_PHYS_CTRS], pmc_values); | 110 | static DEFINE_PER_CPU(unsigned long[NR_PHYS_CTRS], pmc_values); |
106 | 111 | ||
107 | static struct pmc_cntrl_data pmc_cntrl[NUM_THREADS][NR_PHYS_CTRS]; | 112 | static struct pmc_cntrl_data pmc_cntrl[NUM_THREADS][NR_PHYS_CTRS]; |
@@ -129,8 +134,8 @@ static spinlock_t virt_cntr_lock = SPIN_LOCK_UNLOCKED; | |||
129 | 134 | ||
130 | static u32 ctr_enabled; | 135 | static u32 ctr_enabled; |
131 | 136 | ||
132 | static unsigned char trace_bus[4]; | 137 | static unsigned char trace_bus[NUM_TRACE_BUS_WORDS]; |
133 | static unsigned char input_bus[2]; | 138 | static unsigned char input_bus[NUM_INPUT_BUS_WORDS]; |
134 | 139 | ||
135 | /* | 140 | /* |
136 | * Firmware interface functions | 141 | * Firmware interface functions |
@@ -177,25 +182,40 @@ static void pm_rtas_reset_signals(u32 node) | |||
177 | static void pm_rtas_activate_signals(u32 node, u32 count) | 182 | static void pm_rtas_activate_signals(u32 node, u32 count) |
178 | { | 183 | { |
179 | int ret; | 184 | int ret; |
180 | int j; | 185 | int i, j; |
181 | struct pm_signal pm_signal_local[NR_PHYS_CTRS]; | 186 | struct pm_signal pm_signal_local[NR_PHYS_CTRS]; |
182 | 187 | ||
188 | /* There is no debug setup required for the cycles event. | ||
189 | * Note that only events in the same group can be used. | ||
190 | * Otherwise, there will be conflicts in correctly routing | ||
191 | * the signals on the debug bus. It is the responsiblity | ||
192 | * of the OProfile user tool to check the events are in | ||
193 | * the same group. | ||
194 | */ | ||
195 | i = 0; | ||
183 | for (j = 0; j < count; j++) { | 196 | for (j = 0; j < count; j++) { |
184 | /* fw expects physical cpu # */ | 197 | if (pm_signal[j].signal_group != PPU_CYCLES_GRP_NUM) { |
185 | pm_signal_local[j].cpu = node; | 198 | |
186 | pm_signal_local[j].signal_group = pm_signal[j].signal_group; | 199 | /* fw expects physical cpu # */ |
187 | pm_signal_local[j].bus_word = pm_signal[j].bus_word; | 200 | pm_signal_local[i].cpu = node; |
188 | pm_signal_local[j].sub_unit = pm_signal[j].sub_unit; | 201 | pm_signal_local[i].signal_group |
189 | pm_signal_local[j].bit = pm_signal[j].bit; | 202 | = pm_signal[j].signal_group; |
203 | pm_signal_local[i].bus_word = pm_signal[j].bus_word; | ||
204 | pm_signal_local[i].sub_unit = pm_signal[j].sub_unit; | ||
205 | pm_signal_local[i].bit = pm_signal[j].bit; | ||
206 | i++; | ||
207 | } | ||
190 | } | 208 | } |
191 | 209 | ||
192 | ret = rtas_ibm_cbe_perftools(SUBFUNC_ACTIVATE, PASSTHRU_ENABLE, | 210 | if (i != 0) { |
193 | pm_signal_local, | 211 | ret = rtas_ibm_cbe_perftools(SUBFUNC_ACTIVATE, PASSTHRU_ENABLE, |
194 | count * sizeof(struct pm_signal)); | 212 | pm_signal_local, |
213 | i * sizeof(struct pm_signal)); | ||
195 | 214 | ||
196 | if (ret) | 215 | if (ret) |
197 | printk(KERN_WARNING "%s: rtas returned: %d\n", | 216 | printk(KERN_WARNING "%s: rtas returned: %d\n", |
198 | __FUNCTION__, ret); | 217 | __FUNCTION__, ret); |
218 | } | ||
199 | } | 219 | } |
200 | 220 | ||
201 | /* | 221 | /* |
@@ -212,7 +232,7 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask) | |||
212 | /* Special Event: Count all cpu cycles */ | 232 | /* Special Event: Count all cpu cycles */ |
213 | pm_regs.pm07_cntrl[ctr] = CBE_COUNT_ALL_CYCLES; | 233 | pm_regs.pm07_cntrl[ctr] = CBE_COUNT_ALL_CYCLES; |
214 | p = &(pm_signal[ctr]); | 234 | p = &(pm_signal[ctr]); |
215 | p->signal_group = 21; | 235 | p->signal_group = PPU_CYCLES_GRP_NUM; |
216 | p->bus_word = 1; | 236 | p->bus_word = 1; |
217 | p->sub_unit = 0; | 237 | p->sub_unit = 0; |
218 | p->bit = 0; | 238 | p->bit = 0; |
@@ -232,13 +252,21 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask) | |||
232 | 252 | ||
233 | p->signal_group = event / 100; | 253 | p->signal_group = event / 100; |
234 | p->bus_word = bus_word; | 254 | p->bus_word = bus_word; |
235 | p->sub_unit = unit_mask & 0x0000f000; | 255 | p->sub_unit = (unit_mask & 0x0000f000) >> 12; |
236 | 256 | ||
237 | pm_regs.pm07_cntrl[ctr] = 0; | 257 | pm_regs.pm07_cntrl[ctr] = 0; |
238 | pm_regs.pm07_cntrl[ctr] |= PM07_CTR_COUNT_CYCLES(count_cycles); | 258 | pm_regs.pm07_cntrl[ctr] |= PM07_CTR_COUNT_CYCLES(count_cycles); |
239 | pm_regs.pm07_cntrl[ctr] |= PM07_CTR_POLARITY(polarity); | 259 | pm_regs.pm07_cntrl[ctr] |= PM07_CTR_POLARITY(polarity); |
240 | pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_CONTROL(input_control); | 260 | pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_CONTROL(input_control); |
241 | 261 | ||
262 | /* Some of the islands signal selection is based on 64 bit words. | ||
263 | * The debug bus words are 32 bits, the input words to the performance | ||
264 | * counters are defined as 32 bits. Need to convert the 64 bit island | ||
265 | * specification to the appropriate 32 input bit and bus word for the | ||
266 | * performance counter event selection. See the CELL Performance | ||
267 | * monitoring signals manual and the Perf cntr hardware descriptions | ||
268 | * for the details. | ||
269 | */ | ||
242 | if (input_control == 0) { | 270 | if (input_control == 0) { |
243 | if (signal_bit > 31) { | 271 | if (signal_bit > 31) { |
244 | signal_bit -= 32; | 272 | signal_bit -= 32; |
@@ -259,12 +287,12 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask) | |||
259 | p->bit = signal_bit; | 287 | p->bit = signal_bit; |
260 | } | 288 | } |
261 | 289 | ||
262 | for (i = 0; i < 4; i++) { | 290 | for (i = 0; i < NUM_TRACE_BUS_WORDS; i++) { |
263 | if (bus_word & (1 << i)) { | 291 | if (bus_word & (1 << i)) { |
264 | pm_regs.debug_bus_control |= | 292 | pm_regs.debug_bus_control |= |
265 | (bus_type << (31 - (2 * i) + 1)); | 293 | (bus_type << (31 - (2 * i) + 1)); |
266 | 294 | ||
267 | for (j = 0; j < 2; j++) { | 295 | for (j = 0; j < NUM_INPUT_BUS_WORDS; j++) { |
268 | if (input_bus[j] == 0xff) { | 296 | if (input_bus[j] == 0xff) { |
269 | input_bus[j] = i; | 297 | input_bus[j] = i; |
270 | pm_regs.group_control |= | 298 | pm_regs.group_control |= |
@@ -278,52 +306,58 @@ out: | |||
278 | ; | 306 | ; |
279 | } | 307 | } |
280 | 308 | ||
281 | static void write_pm_cntrl(int cpu, struct pm_cntrl *pm_cntrl) | 309 | static void write_pm_cntrl(int cpu) |
282 | { | 310 | { |
283 | /* Oprofile will use 32 bit counters, set bits 7:10 to 0 */ | 311 | /* Oprofile will use 32 bit counters, set bits 7:10 to 0 |
312 | * pmregs.pm_cntrl is a global | ||
313 | */ | ||
314 | |||
284 | u32 val = 0; | 315 | u32 val = 0; |
285 | if (pm_cntrl->enable == 1) | 316 | if (pm_regs.pm_cntrl.enable == 1) |
286 | val |= CBE_PM_ENABLE_PERF_MON; | 317 | val |= CBE_PM_ENABLE_PERF_MON; |
287 | 318 | ||
288 | if (pm_cntrl->stop_at_max == 1) | 319 | if (pm_regs.pm_cntrl.stop_at_max == 1) |
289 | val |= CBE_PM_STOP_AT_MAX; | 320 | val |= CBE_PM_STOP_AT_MAX; |
290 | 321 | ||
291 | if (pm_cntrl->trace_mode == 1) | 322 | if (pm_regs.pm_cntrl.trace_mode == 1) |
292 | val |= CBE_PM_TRACE_MODE_SET(pm_cntrl->trace_mode); | 323 | val |= CBE_PM_TRACE_MODE_SET(pm_regs.pm_cntrl.trace_mode); |
293 | 324 | ||
294 | if (pm_cntrl->freeze == 1) | 325 | if (pm_regs.pm_cntrl.freeze == 1) |
295 | val |= CBE_PM_FREEZE_ALL_CTRS; | 326 | val |= CBE_PM_FREEZE_ALL_CTRS; |
296 | 327 | ||
297 | /* Routine set_count_mode must be called previously to set | 328 | /* Routine set_count_mode must be called previously to set |
298 | * the count mode based on the user selection of user and kernel. | 329 | * the count mode based on the user selection of user and kernel. |
299 | */ | 330 | */ |
300 | val |= CBE_PM_COUNT_MODE_SET(pm_cntrl->count_mode); | 331 | val |= CBE_PM_COUNT_MODE_SET(pm_regs.pm_cntrl.count_mode); |
301 | cbe_write_pm(cpu, pm_control, val); | 332 | cbe_write_pm(cpu, pm_control, val); |
302 | } | 333 | } |
303 | 334 | ||
304 | static inline void | 335 | static inline void |
305 | set_count_mode(u32 kernel, u32 user, struct pm_cntrl *pm_cntrl) | 336 | set_count_mode(u32 kernel, u32 user) |
306 | { | 337 | { |
307 | /* The user must specify user and kernel if they want them. If | 338 | /* The user must specify user and kernel if they want them. If |
308 | * neither is specified, OProfile will count in hypervisor mode | 339 | * neither is specified, OProfile will count in hypervisor mode. |
340 | * pm_regs.pm_cntrl is a global | ||
309 | */ | 341 | */ |
310 | if (kernel) { | 342 | if (kernel) { |
311 | if (user) | 343 | if (user) |
312 | pm_cntrl->count_mode = CBE_COUNT_ALL_MODES; | 344 | pm_regs.pm_cntrl.count_mode = CBE_COUNT_ALL_MODES; |
313 | else | 345 | else |
314 | pm_cntrl->count_mode = CBE_COUNT_SUPERVISOR_MODE; | 346 | pm_regs.pm_cntrl.count_mode = |
347 | CBE_COUNT_SUPERVISOR_MODE; | ||
315 | } else { | 348 | } else { |
316 | if (user) | 349 | if (user) |
317 | pm_cntrl->count_mode = CBE_COUNT_PROBLEM_MODE; | 350 | pm_regs.pm_cntrl.count_mode = CBE_COUNT_PROBLEM_MODE; |
318 | else | 351 | else |
319 | pm_cntrl->count_mode = CBE_COUNT_HYPERVISOR_MODE; | 352 | pm_regs.pm_cntrl.count_mode = |
353 | CBE_COUNT_HYPERVISOR_MODE; | ||
320 | } | 354 | } |
321 | } | 355 | } |
322 | 356 | ||
323 | static inline void enable_ctr(u32 cpu, u32 ctr, u32 * pm07_cntrl) | 357 | static inline void enable_ctr(u32 cpu, u32 ctr, u32 * pm07_cntrl) |
324 | { | 358 | { |
325 | 359 | ||
326 | pm07_cntrl[ctr] |= PM07_CTR_ENABLE(1); | 360 | pm07_cntrl[ctr] |= CBE_PM_CTR_ENABLE; |
327 | cbe_write_pm07_control(cpu, ctr, pm07_cntrl[ctr]); | 361 | cbe_write_pm07_control(cpu, ctr, pm07_cntrl[ctr]); |
328 | } | 362 | } |
329 | 363 | ||
@@ -365,6 +399,14 @@ static void cell_virtual_cntr(unsigned long data) | |||
365 | hdw_thread = 1 ^ hdw_thread; | 399 | hdw_thread = 1 ^ hdw_thread; |
366 | next_hdw_thread = hdw_thread; | 400 | next_hdw_thread = hdw_thread; |
367 | 401 | ||
402 | for (i = 0; i < num_counters; i++) | ||
403 | /* There are some per thread events. Must do the | ||
404 | * set event, for the thread that is being started | ||
405 | */ | ||
406 | set_pm_event(i, | ||
407 | pmc_cntrl[next_hdw_thread][i].evnts, | ||
408 | pmc_cntrl[next_hdw_thread][i].masks); | ||
409 | |||
368 | /* The following is done only once per each node, but | 410 | /* The following is done only once per each node, but |
369 | * we need cpu #, not node #, to pass to the cbe_xxx functions. | 411 | * we need cpu #, not node #, to pass to the cbe_xxx functions. |
370 | */ | 412 | */ |
@@ -385,12 +427,13 @@ static void cell_virtual_cntr(unsigned long data) | |||
385 | == 0xFFFFFFFF) | 427 | == 0xFFFFFFFF) |
386 | /* If the cntr value is 0xffffffff, we must | 428 | /* If the cntr value is 0xffffffff, we must |
387 | * reset that to 0xfffffff0 when the current | 429 | * reset that to 0xfffffff0 when the current |
388 | * thread is restarted. This will generate a new | 430 | * thread is restarted. This will generate a |
389 | * interrupt and make sure that we never restore | 431 | * new interrupt and make sure that we never |
390 | * the counters to the max value. If the counters | 432 | * restore the counters to the max value. If |
391 | * were restored to the max value, they do not | 433 | * the counters were restored to the max value, |
392 | * increment and no interrupts are generated. Hence | 434 | * they do not increment and no interrupts are |
393 | * no more samples will be collected on that cpu. | 435 | * generated. Hence no more samples will be |
436 | * collected on that cpu. | ||
394 | */ | 437 | */ |
395 | cbe_write_ctr(cpu, i, 0xFFFFFFF0); | 438 | cbe_write_ctr(cpu, i, 0xFFFFFFF0); |
396 | else | 439 | else |
@@ -410,9 +453,6 @@ static void cell_virtual_cntr(unsigned long data) | |||
410 | * Must do the set event, enable_cntr | 453 | * Must do the set event, enable_cntr |
411 | * for each cpu. | 454 | * for each cpu. |
412 | */ | 455 | */ |
413 | set_pm_event(i, | ||
414 | pmc_cntrl[next_hdw_thread][i].evnts, | ||
415 | pmc_cntrl[next_hdw_thread][i].masks); | ||
416 | enable_ctr(cpu, i, | 456 | enable_ctr(cpu, i, |
417 | pm_regs.pm07_cntrl); | 457 | pm_regs.pm07_cntrl); |
418 | } else { | 458 | } else { |
@@ -465,8 +505,7 @@ cell_reg_setup(struct op_counter_config *ctr, | |||
465 | pm_regs.pm_cntrl.trace_mode = 0; | 505 | pm_regs.pm_cntrl.trace_mode = 0; |
466 | pm_regs.pm_cntrl.freeze = 1; | 506 | pm_regs.pm_cntrl.freeze = 1; |
467 | 507 | ||
468 | set_count_mode(sys->enable_kernel, sys->enable_user, | 508 | set_count_mode(sys->enable_kernel, sys->enable_user); |
469 | &pm_regs.pm_cntrl); | ||
470 | 509 | ||
471 | /* Setup the thread 0 events */ | 510 | /* Setup the thread 0 events */ |
472 | for (i = 0; i < num_ctrs; ++i) { | 511 | for (i = 0; i < num_ctrs; ++i) { |
@@ -498,10 +537,10 @@ cell_reg_setup(struct op_counter_config *ctr, | |||
498 | pmc_cntrl[1][i].vcntr = i; | 537 | pmc_cntrl[1][i].vcntr = i; |
499 | } | 538 | } |
500 | 539 | ||
501 | for (i = 0; i < 4; i++) | 540 | for (i = 0; i < NUM_TRACE_BUS_WORDS; i++) |
502 | trace_bus[i] = 0xff; | 541 | trace_bus[i] = 0xff; |
503 | 542 | ||
504 | for (i = 0; i < 2; i++) | 543 | for (i = 0; i < NUM_INPUT_BUS_WORDS; i++) |
505 | input_bus[i] = 0xff; | 544 | input_bus[i] = 0xff; |
506 | 545 | ||
507 | /* Our counters count up, and "count" refers to | 546 | /* Our counters count up, and "count" refers to |
@@ -560,7 +599,7 @@ static void cell_cpu_setup(struct op_counter_config *cntr) | |||
560 | cbe_write_pm(cpu, pm_start_stop, 0); | 599 | cbe_write_pm(cpu, pm_start_stop, 0); |
561 | cbe_write_pm(cpu, group_control, pm_regs.group_control); | 600 | cbe_write_pm(cpu, group_control, pm_regs.group_control); |
562 | cbe_write_pm(cpu, debug_bus_control, pm_regs.debug_bus_control); | 601 | cbe_write_pm(cpu, debug_bus_control, pm_regs.debug_bus_control); |
563 | write_pm_cntrl(cpu, &pm_regs.pm_cntrl); | 602 | write_pm_cntrl(cpu); |
564 | 603 | ||
565 | for (i = 0; i < num_counters; ++i) { | 604 | for (i = 0; i < num_counters; ++i) { |
566 | if (ctr_enabled & (1 << i)) { | 605 | if (ctr_enabled & (1 << i)) { |
@@ -602,7 +641,7 @@ static void cell_global_start(struct op_counter_config *ctr) | |||
602 | } | 641 | } |
603 | } | 642 | } |
604 | 643 | ||
605 | cbe_clear_pm_interrupts(cpu); | 644 | cbe_get_and_clear_pm_interrupts(cpu); |
606 | cbe_enable_pm_interrupts(cpu, hdw_thread, interrupt_mask); | 645 | cbe_enable_pm_interrupts(cpu, hdw_thread, interrupt_mask); |
607 | cbe_enable_pm(cpu); | 646 | cbe_enable_pm(cpu); |
608 | } | 647 | } |
@@ -672,7 +711,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr) | |||
672 | 711 | ||
673 | cbe_disable_pm(cpu); | 712 | cbe_disable_pm(cpu); |
674 | 713 | ||
675 | interrupt_mask = cbe_clear_pm_interrupts(cpu); | 714 | interrupt_mask = cbe_get_and_clear_pm_interrupts(cpu); |
676 | 715 | ||
677 | /* If the interrupt mask has been cleared, then the virt cntr | 716 | /* If the interrupt mask has been cleared, then the virt cntr |
678 | * has cleared the interrupt. When the thread that generated | 717 | * has cleared the interrupt. When the thread that generated |
diff --git a/arch/powerpc/platforms/52xx/Makefile b/arch/powerpc/platforms/52xx/Makefile index 795b713ec9ee..07cdbcacf156 100644 --- a/arch/powerpc/platforms/52xx/Makefile +++ b/arch/powerpc/platforms/52xx/Makefile | |||
@@ -6,5 +6,5 @@ obj-y += mpc52xx_pic.o mpc52xx_common.o | |||
6 | obj-$(CONFIG_PCI) += mpc52xx_pci.o | 6 | obj-$(CONFIG_PCI) += mpc52xx_pci.o |
7 | endif | 7 | endif |
8 | 8 | ||
9 | obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o | 9 | obj-$(CONFIG_PPC_EFIKA) += efika.o |
10 | obj-$(CONFIG_PPC_LITE5200) += lite5200.o | 10 | obj-$(CONFIG_PPC_LITE5200) += lite5200.o |
diff --git a/arch/powerpc/platforms/52xx/efika-pci.c b/arch/powerpc/platforms/52xx/efika-pci.c deleted file mode 100644 index 62e05b2a9227..000000000000 --- a/arch/powerpc/platforms/52xx/efika-pci.c +++ /dev/null | |||
@@ -1,119 +0,0 @@ | |||
1 | |||
2 | #include <linux/kernel.h> | ||
3 | #include <linux/pci.h> | ||
4 | #include <linux/string.h> | ||
5 | #include <linux/init.h> | ||
6 | |||
7 | #include <asm/io.h> | ||
8 | #include <asm/irq.h> | ||
9 | #include <asm/prom.h> | ||
10 | #include <asm/machdep.h> | ||
11 | #include <asm/sections.h> | ||
12 | #include <asm/pci-bridge.h> | ||
13 | #include <asm/rtas.h> | ||
14 | |||
15 | #include "efika.h" | ||
16 | |||
17 | #ifdef CONFIG_PCI | ||
18 | /* | ||
19 | * Access functions for PCI config space using RTAS calls. | ||
20 | */ | ||
21 | static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | ||
22 | int len, u32 * val) | ||
23 | { | ||
24 | struct pci_controller *hose = bus->sysdata; | ||
25 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | ||
26 | | (((bus->number - hose->first_busno) & 0xff) << 16) | ||
27 | | (hose->index << 24); | ||
28 | int ret = -1; | ||
29 | int rval; | ||
30 | |||
31 | rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len); | ||
32 | *val = ret; | ||
33 | return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; | ||
34 | } | ||
35 | |||
36 | static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, | ||
37 | int offset, int len, u32 val) | ||
38 | { | ||
39 | struct pci_controller *hose = bus->sysdata; | ||
40 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | ||
41 | | (((bus->number - hose->first_busno) & 0xff) << 16) | ||
42 | | (hose->index << 24); | ||
43 | int rval; | ||
44 | |||
45 | rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL, | ||
46 | addr, len, val); | ||
47 | return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; | ||
48 | } | ||
49 | |||
50 | static struct pci_ops rtas_pci_ops = { | ||
51 | rtas_read_config, | ||
52 | rtas_write_config | ||
53 | }; | ||
54 | |||
55 | void __init efika_pcisetup(void) | ||
56 | { | ||
57 | const int *bus_range; | ||
58 | int len; | ||
59 | struct pci_controller *hose; | ||
60 | struct device_node *root; | ||
61 | struct device_node *pcictrl; | ||
62 | |||
63 | root = of_find_node_by_path("/"); | ||
64 | if (root == NULL) { | ||
65 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
66 | ": Unable to find the root node\n"); | ||
67 | return; | ||
68 | } | ||
69 | |||
70 | for (pcictrl = NULL;;) { | ||
71 | pcictrl = of_get_next_child(root, pcictrl); | ||
72 | if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0)) | ||
73 | break; | ||
74 | } | ||
75 | |||
76 | of_node_put(root); | ||
77 | |||
78 | if (pcictrl == NULL) { | ||
79 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
80 | ": Unable to find the PCI bridge node\n"); | ||
81 | return; | ||
82 | } | ||
83 | |||
84 | bus_range = get_property(pcictrl, "bus-range", &len); | ||
85 | if (bus_range == NULL || len < 2 * sizeof(int)) { | ||
86 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
87 | ": Can't get bus-range for %s\n", pcictrl->full_name); | ||
88 | return; | ||
89 | } | ||
90 | |||
91 | if (bus_range[1] == bus_range[0]) | ||
92 | printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d", | ||
93 | bus_range[0]); | ||
94 | else | ||
95 | printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d", | ||
96 | bus_range[0], bus_range[1]); | ||
97 | printk(" controlled by %s\n", pcictrl->full_name); | ||
98 | printk("\n"); | ||
99 | |||
100 | hose = pcibios_alloc_controller(); | ||
101 | if (!hose) { | ||
102 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
103 | ": Can't allocate PCI controller structure for %s\n", | ||
104 | pcictrl->full_name); | ||
105 | return; | ||
106 | } | ||
107 | |||
108 | hose->arch_data = of_node_get(pcictrl); | ||
109 | hose->first_busno = bus_range[0]; | ||
110 | hose->last_busno = bus_range[1]; | ||
111 | hose->ops = &rtas_pci_ops; | ||
112 | |||
113 | pci_process_bridge_OF_ranges(hose, pcictrl, 0); | ||
114 | } | ||
115 | |||
116 | #else | ||
117 | void __init efika_pcisetup(void) | ||
118 | {} | ||
119 | #endif | ||
diff --git a/arch/powerpc/platforms/52xx/efika-setup.c b/arch/powerpc/platforms/52xx/efika-setup.c deleted file mode 100644 index 110c980ed1e0..000000000000 --- a/arch/powerpc/platforms/52xx/efika-setup.c +++ /dev/null | |||
@@ -1,150 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Efika 5K2 platform setup | ||
4 | * Some code really inspired from the lite5200b platform. | ||
5 | * | ||
6 | * Copyright (C) 2006 bplan GmbH | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public License | ||
9 | * version 2. This program is licensed "as is" without any warranty of any | ||
10 | * kind, whether express or implied. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/errno.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/slab.h> | ||
17 | #include <linux/reboot.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/utsrelease.h> | ||
20 | #include <linux/seq_file.h> | ||
21 | #include <linux/root_dev.h> | ||
22 | #include <linux/initrd.h> | ||
23 | #include <linux/timer.h> | ||
24 | #include <linux/pci.h> | ||
25 | |||
26 | #include <asm/pgtable.h> | ||
27 | #include <asm/prom.h> | ||
28 | #include <asm/time.h> | ||
29 | #include <asm/machdep.h> | ||
30 | #include <asm/rtas.h> | ||
31 | #include <asm/of_device.h> | ||
32 | #include <asm/of_platform.h> | ||
33 | #include <asm/mpc52xx.h> | ||
34 | |||
35 | #include "efika.h" | ||
36 | |||
37 | static void efika_show_cpuinfo(struct seq_file *m) | ||
38 | { | ||
39 | struct device_node *root; | ||
40 | const char *revision = NULL; | ||
41 | const char *codegendescription = NULL; | ||
42 | const char *codegenvendor = NULL; | ||
43 | |||
44 | root = of_find_node_by_path("/"); | ||
45 | if (root) { | ||
46 | revision = get_property(root, "revision", NULL); | ||
47 | codegendescription = | ||
48 | get_property(root, "CODEGEN,description", NULL); | ||
49 | codegenvendor = get_property(root, "CODEGEN,vendor", NULL); | ||
50 | |||
51 | of_node_put(root); | ||
52 | } | ||
53 | |||
54 | if (codegendescription) | ||
55 | seq_printf(m, "machine\t\t: %s\n", codegendescription); | ||
56 | else | ||
57 | seq_printf(m, "machine\t\t: Efika\n"); | ||
58 | |||
59 | if (revision) | ||
60 | seq_printf(m, "revision\t: %s\n", revision); | ||
61 | |||
62 | if (codegenvendor) | ||
63 | seq_printf(m, "vendor\t\t: %s\n", codegenvendor); | ||
64 | |||
65 | of_node_put(root); | ||
66 | } | ||
67 | |||
68 | static void __init efika_setup_arch(void) | ||
69 | { | ||
70 | rtas_initialize(); | ||
71 | |||
72 | #ifdef CONFIG_BLK_DEV_INITRD | ||
73 | initrd_below_start_ok = 1; | ||
74 | |||
75 | if (initrd_start) | ||
76 | ROOT_DEV = Root_RAM0; | ||
77 | else | ||
78 | #endif | ||
79 | ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */ | ||
80 | |||
81 | efika_pcisetup(); | ||
82 | |||
83 | if (ppc_md.progress) | ||
84 | ppc_md.progress("Linux/PPC " UTS_RELEASE " runnung on Efika ;-)\n", 0x0); | ||
85 | } | ||
86 | |||
87 | static void __init efika_init(void) | ||
88 | { | ||
89 | struct device_node *np; | ||
90 | struct device_node *cnp = NULL; | ||
91 | const u32 *base; | ||
92 | |||
93 | /* Find every child of the SOC node and add it to of_platform */ | ||
94 | np = of_find_node_by_name(NULL, "builtin"); | ||
95 | if (np) { | ||
96 | char name[BUS_ID_SIZE]; | ||
97 | while ((cnp = of_get_next_child(np, cnp))) { | ||
98 | strcpy(name, cnp->name); | ||
99 | |||
100 | base = get_property(cnp, "reg", NULL); | ||
101 | if (base == NULL) | ||
102 | continue; | ||
103 | |||
104 | snprintf(name+strlen(name), BUS_ID_SIZE, "@%x", *base); | ||
105 | of_platform_device_create(cnp, name, NULL); | ||
106 | |||
107 | printk(KERN_INFO EFIKA_PLATFORM_NAME" : Added %s (type '%s' at '%s') to the known devices\n", name, cnp->type, cnp->full_name); | ||
108 | } | ||
109 | } | ||
110 | |||
111 | if (ppc_md.progress) | ||
112 | ppc_md.progress(" Have fun with your Efika! ", 0x7777); | ||
113 | } | ||
114 | |||
115 | static int __init efika_probe(void) | ||
116 | { | ||
117 | char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), | ||
118 | "model", NULL); | ||
119 | |||
120 | if (model == NULL) | ||
121 | return 0; | ||
122 | if (strcmp(model, "EFIKA5K2")) | ||
123 | return 0; | ||
124 | |||
125 | ISA_DMA_THRESHOLD = ~0L; | ||
126 | DMA_MODE_READ = 0x44; | ||
127 | DMA_MODE_WRITE = 0x48; | ||
128 | |||
129 | return 1; | ||
130 | } | ||
131 | |||
132 | define_machine(efika) | ||
133 | { | ||
134 | .name = EFIKA_PLATFORM_NAME, | ||
135 | .probe = efika_probe, | ||
136 | .setup_arch = efika_setup_arch, | ||
137 | .init = efika_init, | ||
138 | .show_cpuinfo = efika_show_cpuinfo, | ||
139 | .init_IRQ = mpc52xx_init_irq, | ||
140 | .get_irq = mpc52xx_get_irq, | ||
141 | .restart = rtas_restart, | ||
142 | .power_off = rtas_power_off, | ||
143 | .halt = rtas_halt, | ||
144 | .set_rtc_time = rtas_set_rtc_time, | ||
145 | .get_rtc_time = rtas_get_rtc_time, | ||
146 | .progress = rtas_progress, | ||
147 | .get_boot_time = rtas_get_boot_time, | ||
148 | .calibrate_decr = generic_calibrate_decr, | ||
149 | .phys_mem_access_prot = pci_phys_mem_access_prot, | ||
150 | }; | ||
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c new file mode 100644 index 000000000000..8de034116681 --- /dev/null +++ b/arch/powerpc/platforms/52xx/efika.c | |||
@@ -0,0 +1,243 @@ | |||
1 | /* | ||
2 | * Efika 5K2 platform code | ||
3 | * Some code really inspired from the lite5200b platform. | ||
4 | * | ||
5 | * Copyright (C) 2006 bplan GmbH | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public License | ||
8 | * version 2. This program is licensed "as is" without any warranty of any | ||
9 | * kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | #include <linux/errno.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/slab.h> | ||
15 | #include <linux/reboot.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/utsrelease.h> | ||
18 | #include <linux/seq_file.h> | ||
19 | #include <linux/string.h> | ||
20 | #include <linux/root_dev.h> | ||
21 | #include <linux/initrd.h> | ||
22 | #include <linux/timer.h> | ||
23 | #include <linux/pci.h> | ||
24 | |||
25 | #include <asm/io.h> | ||
26 | #include <asm/irq.h> | ||
27 | #include <asm/sections.h> | ||
28 | #include <asm/pci-bridge.h> | ||
29 | #include <asm/pgtable.h> | ||
30 | #include <asm/prom.h> | ||
31 | #include <asm/time.h> | ||
32 | #include <asm/machdep.h> | ||
33 | #include <asm/rtas.h> | ||
34 | #include <asm/of_device.h> | ||
35 | #include <asm/of_platform.h> | ||
36 | #include <asm/mpc52xx.h> | ||
37 | |||
38 | |||
39 | #define EFIKA_PLATFORM_NAME "Efika" | ||
40 | |||
41 | |||
42 | /* ------------------------------------------------------------------------ */ | ||
43 | /* PCI accesses thru RTAS */ | ||
44 | /* ------------------------------------------------------------------------ */ | ||
45 | |||
46 | #ifdef CONFIG_PCI | ||
47 | |||
48 | /* | ||
49 | * Access functions for PCI config space using RTAS calls. | ||
50 | */ | ||
51 | static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, | ||
52 | int len, u32 * val) | ||
53 | { | ||
54 | struct pci_controller *hose = bus->sysdata; | ||
55 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | ||
56 | | (((bus->number - hose->first_busno) & 0xff) << 16) | ||
57 | | (hose->index << 24); | ||
58 | int ret = -1; | ||
59 | int rval; | ||
60 | |||
61 | rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len); | ||
62 | *val = ret; | ||
63 | return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; | ||
64 | } | ||
65 | |||
66 | static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, | ||
67 | int offset, int len, u32 val) | ||
68 | { | ||
69 | struct pci_controller *hose = bus->sysdata; | ||
70 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) | ||
71 | | (((bus->number - hose->first_busno) & 0xff) << 16) | ||
72 | | (hose->index << 24); | ||
73 | int rval; | ||
74 | |||
75 | rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL, | ||
76 | addr, len, val); | ||
77 | return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; | ||
78 | } | ||
79 | |||
80 | static struct pci_ops rtas_pci_ops = { | ||
81 | rtas_read_config, | ||
82 | rtas_write_config | ||
83 | }; | ||
84 | |||
85 | |||
86 | void __init efika_pcisetup(void) | ||
87 | { | ||
88 | const int *bus_range; | ||
89 | int len; | ||
90 | struct pci_controller *hose; | ||
91 | struct device_node *root; | ||
92 | struct device_node *pcictrl; | ||
93 | |||
94 | root = of_find_node_by_path("/"); | ||
95 | if (root == NULL) { | ||
96 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
97 | ": Unable to find the root node\n"); | ||
98 | return; | ||
99 | } | ||
100 | |||
101 | for (pcictrl = NULL;;) { | ||
102 | pcictrl = of_get_next_child(root, pcictrl); | ||
103 | if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0)) | ||
104 | break; | ||
105 | } | ||
106 | |||
107 | of_node_put(root); | ||
108 | |||
109 | if (pcictrl == NULL) { | ||
110 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
111 | ": Unable to find the PCI bridge node\n"); | ||
112 | return; | ||
113 | } | ||
114 | |||
115 | bus_range = get_property(pcictrl, "bus-range", &len); | ||
116 | if (bus_range == NULL || len < 2 * sizeof(int)) { | ||
117 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
118 | ": Can't get bus-range for %s\n", pcictrl->full_name); | ||
119 | return; | ||
120 | } | ||
121 | |||
122 | if (bus_range[1] == bus_range[0]) | ||
123 | printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d", | ||
124 | bus_range[0]); | ||
125 | else | ||
126 | printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d", | ||
127 | bus_range[0], bus_range[1]); | ||
128 | printk(" controlled by %s\n", pcictrl->full_name); | ||
129 | printk("\n"); | ||
130 | |||
131 | hose = pcibios_alloc_controller(); | ||
132 | if (!hose) { | ||
133 | printk(KERN_WARNING EFIKA_PLATFORM_NAME | ||
134 | ": Can't allocate PCI controller structure for %s\n", | ||
135 | pcictrl->full_name); | ||
136 | return; | ||
137 | } | ||
138 | |||
139 | hose->arch_data = of_node_get(pcictrl); | ||
140 | hose->first_busno = bus_range[0]; | ||
141 | hose->last_busno = bus_range[1]; | ||
142 | hose->ops = &rtas_pci_ops; | ||
143 | |||
144 | pci_process_bridge_OF_ranges(hose, pcictrl, 0); | ||
145 | } | ||
146 | |||
147 | #else | ||
148 | void __init efika_pcisetup(void) | ||
149 | {} | ||
150 | #endif | ||
151 | |||
152 | |||
153 | |||
154 | /* ------------------------------------------------------------------------ */ | ||
155 | /* Platform setup */ | ||
156 | /* ------------------------------------------------------------------------ */ | ||
157 | |||
158 | static void efika_show_cpuinfo(struct seq_file *m) | ||
159 | { | ||
160 | struct device_node *root; | ||
161 | const char *revision = NULL; | ||
162 | const char *codegendescription = NULL; | ||
163 | const char *codegenvendor = NULL; | ||
164 | |||
165 | root = of_find_node_by_path("/"); | ||
166 | if (!root) | ||
167 | return; | ||
168 | |||
169 | revision = get_property(root, "revision", NULL); | ||
170 | codegendescription = | ||
171 | get_property(root, "CODEGEN,description", NULL); | ||
172 | codegenvendor = get_property(root, "CODEGEN,vendor", NULL); | ||
173 | |||
174 | if (codegendescription) | ||
175 | seq_printf(m, "machine\t\t: %s\n", codegendescription); | ||
176 | else | ||
177 | seq_printf(m, "machine\t\t: Efika\n"); | ||
178 | |||
179 | if (revision) | ||
180 | seq_printf(m, "revision\t: %s\n", revision); | ||
181 | |||
182 | if (codegenvendor) | ||
183 | seq_printf(m, "vendor\t\t: %s\n", codegenvendor); | ||
184 | |||
185 | of_node_put(root); | ||
186 | } | ||
187 | |||
188 | static void __init efika_setup_arch(void) | ||
189 | { | ||
190 | rtas_initialize(); | ||
191 | |||
192 | #ifdef CONFIG_BLK_DEV_INITRD | ||
193 | initrd_below_start_ok = 1; | ||
194 | |||
195 | if (initrd_start) | ||
196 | ROOT_DEV = Root_RAM0; | ||
197 | else | ||
198 | #endif | ||
199 | ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */ | ||
200 | |||
201 | efika_pcisetup(); | ||
202 | |||
203 | if (ppc_md.progress) | ||
204 | ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n", 0x0); | ||
205 | } | ||
206 | |||
207 | static int __init efika_probe(void) | ||
208 | { | ||
209 | char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), | ||
210 | "model", NULL); | ||
211 | |||
212 | if (model == NULL) | ||
213 | return 0; | ||
214 | if (strcmp(model, "EFIKA5K2")) | ||
215 | return 0; | ||
216 | |||
217 | ISA_DMA_THRESHOLD = ~0L; | ||
218 | DMA_MODE_READ = 0x44; | ||
219 | DMA_MODE_WRITE = 0x48; | ||
220 | |||
221 | return 1; | ||
222 | } | ||
223 | |||
224 | define_machine(efika) | ||
225 | { | ||
226 | .name = EFIKA_PLATFORM_NAME, | ||
227 | .probe = efika_probe, | ||
228 | .setup_arch = efika_setup_arch, | ||
229 | .init = mpc52xx_declare_of_platform_devices, | ||
230 | .show_cpuinfo = efika_show_cpuinfo, | ||
231 | .init_IRQ = mpc52xx_init_irq, | ||
232 | .get_irq = mpc52xx_get_irq, | ||
233 | .restart = rtas_restart, | ||
234 | .power_off = rtas_power_off, | ||
235 | .halt = rtas_halt, | ||
236 | .set_rtc_time = rtas_set_rtc_time, | ||
237 | .get_rtc_time = rtas_get_rtc_time, | ||
238 | .progress = rtas_progress, | ||
239 | .get_boot_time = rtas_get_boot_time, | ||
240 | .calibrate_decr = generic_calibrate_decr, | ||
241 | .phys_mem_access_prot = pci_phys_mem_access_prot, | ||
242 | }; | ||
243 | |||
diff --git a/arch/powerpc/platforms/52xx/efika.h b/arch/powerpc/platforms/52xx/efika.h deleted file mode 100644 index 2f060fd097d7..000000000000 --- a/arch/powerpc/platforms/52xx/efika.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * Efika 5K2 platform setup - Header file | ||
3 | * | ||
4 | * Copyright (C) 2006 bplan GmbH | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef __ARCH_POWERPC_EFIKA__ | ||
13 | #define __ARCH_POWERPC_EFIKA__ | ||
14 | |||
15 | #define EFIKA_PLATFORM_NAME "Efika" | ||
16 | |||
17 | extern void __init efika_pcisetup(void); | ||
18 | |||
19 | #endif | ||
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c index cdb16bfa6ca6..cc3b40de21dd 100644 --- a/arch/powerpc/platforms/52xx/lite5200.c +++ b/arch/powerpc/platforms/52xx/lite5200.c | |||
@@ -51,13 +51,13 @@ | |||
51 | */ | 51 | */ |
52 | 52 | ||
53 | static void __init | 53 | static void __init |
54 | lite52xx_setup_cpu(void) | 54 | lite5200_setup_cpu(void) |
55 | { | 55 | { |
56 | struct mpc52xx_gpio __iomem *gpio; | 56 | struct mpc52xx_gpio __iomem *gpio; |
57 | u32 port_config; | 57 | u32 port_config; |
58 | 58 | ||
59 | /* Map zones */ | 59 | /* Map zones */ |
60 | gpio = mpc52xx_find_and_map("mpc52xx-gpio"); | 60 | gpio = mpc52xx_find_and_map("mpc5200-gpio"); |
61 | if (!gpio) { | 61 | if (!gpio) { |
62 | printk(KERN_ERR __FILE__ ": " | 62 | printk(KERN_ERR __FILE__ ": " |
63 | "Error while mapping GPIO register for port config. " | 63 | "Error while mapping GPIO register for port config. " |
@@ -85,12 +85,12 @@ error: | |||
85 | iounmap(gpio); | 85 | iounmap(gpio); |
86 | } | 86 | } |
87 | 87 | ||
88 | static void __init lite52xx_setup_arch(void) | 88 | static void __init lite5200_setup_arch(void) |
89 | { | 89 | { |
90 | struct device_node *np; | 90 | struct device_node *np; |
91 | 91 | ||
92 | if (ppc_md.progress) | 92 | if (ppc_md.progress) |
93 | ppc_md.progress("lite52xx_setup_arch()", 0); | 93 | ppc_md.progress("lite5200_setup_arch()", 0); |
94 | 94 | ||
95 | np = of_find_node_by_type(NULL, "cpu"); | 95 | np = of_find_node_by_type(NULL, "cpu"); |
96 | if (np) { | 96 | if (np) { |
@@ -105,7 +105,7 @@ static void __init lite52xx_setup_arch(void) | |||
105 | 105 | ||
106 | /* CPU & Port mux setup */ | 106 | /* CPU & Port mux setup */ |
107 | mpc52xx_setup_cpu(); /* Generic */ | 107 | mpc52xx_setup_cpu(); /* Generic */ |
108 | lite52xx_setup_cpu(); /* Platorm specific */ | 108 | lite5200_setup_cpu(); /* Platorm specific */ |
109 | 109 | ||
110 | #ifdef CONFIG_PCI | 110 | #ifdef CONFIG_PCI |
111 | np = of_find_node_by_type(np, "pci"); | 111 | np = of_find_node_by_type(np, "pci"); |
@@ -126,7 +126,7 @@ static void __init lite52xx_setup_arch(void) | |||
126 | 126 | ||
127 | } | 127 | } |
128 | 128 | ||
129 | void lite52xx_show_cpuinfo(struct seq_file *m) | 129 | void lite5200_show_cpuinfo(struct seq_file *m) |
130 | { | 130 | { |
131 | struct device_node* np = of_find_all_nodes(NULL); | 131 | struct device_node* np = of_find_all_nodes(NULL); |
132 | const char *model = NULL; | 132 | const char *model = NULL; |
@@ -143,25 +143,26 @@ void lite52xx_show_cpuinfo(struct seq_file *m) | |||
143 | /* | 143 | /* |
144 | * Called very early, MMU is off, device-tree isn't unflattened | 144 | * Called very early, MMU is off, device-tree isn't unflattened |
145 | */ | 145 | */ |
146 | static int __init lite52xx_probe(void) | 146 | static int __init lite5200_probe(void) |
147 | { | 147 | { |
148 | unsigned long node = of_get_flat_dt_root(); | 148 | unsigned long node = of_get_flat_dt_root(); |
149 | const char *model = of_get_flat_dt_prop(node, "model", NULL); | 149 | const char *model = of_get_flat_dt_prop(node, "model", NULL); |
150 | 150 | ||
151 | if (!of_flat_dt_is_compatible(node, "lite52xx")) | 151 | if (!of_flat_dt_is_compatible(node, "fsl,lite5200") && |
152 | !of_flat_dt_is_compatible(node, "fsl,lite5200b")) | ||
152 | return 0; | 153 | return 0; |
153 | pr_debug("%s board w/ mpc52xx found\n", model ? model : "unknown"); | 154 | pr_debug("%s board found\n", model ? model : "unknown"); |
154 | 155 | ||
155 | return 1; | 156 | return 1; |
156 | } | 157 | } |
157 | 158 | ||
158 | define_machine(lite52xx) { | 159 | define_machine(lite5200) { |
159 | .name = "lite52xx", | 160 | .name = "lite5200", |
160 | .probe = lite52xx_probe, | 161 | .probe = lite5200_probe, |
161 | .setup_arch = lite52xx_setup_arch, | 162 | .setup_arch = lite5200_setup_arch, |
162 | .init = mpc52xx_declare_of_platform_devices, | 163 | .init = mpc52xx_declare_of_platform_devices, |
163 | .init_IRQ = mpc52xx_init_irq, | 164 | .init_IRQ = mpc52xx_init_irq, |
164 | .get_irq = mpc52xx_get_irq, | 165 | .get_irq = mpc52xx_get_irq, |
165 | .show_cpuinfo = lite52xx_show_cpuinfo, | 166 | .show_cpuinfo = lite5200_show_cpuinfo, |
166 | .calibrate_decr = generic_calibrate_decr, | 167 | .calibrate_decr = generic_calibrate_decr, |
167 | }; | 168 | }; |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c index cc40889074bd..ed0cb694aea8 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_common.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c | |||
@@ -83,8 +83,8 @@ mpc52xx_setup_cpu(void) | |||
83 | struct mpc52xx_xlb __iomem *xlb; | 83 | struct mpc52xx_xlb __iomem *xlb; |
84 | 84 | ||
85 | /* Map zones */ | 85 | /* Map zones */ |
86 | cdm = mpc52xx_find_and_map("mpc52xx-cdm"); | 86 | cdm = mpc52xx_find_and_map("mpc5200-cdm"); |
87 | xlb = mpc52xx_find_and_map("mpc52xx-xlb"); | 87 | xlb = mpc52xx_find_and_map("mpc5200-xlb"); |
88 | 88 | ||
89 | if (!cdm || !xlb) { | 89 | if (!cdm || !xlb) { |
90 | printk(KERN_ERR __FILE__ ": " | 90 | printk(KERN_ERR __FILE__ ": " |
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c index cd91a6c3aafa..c75192567e55 100644 --- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c +++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c | |||
@@ -383,16 +383,16 @@ void __init mpc52xx_init_irq(void) | |||
383 | struct device_node *picnode; | 383 | struct device_node *picnode; |
384 | 384 | ||
385 | /* Remap the necessary zones */ | 385 | /* Remap the necessary zones */ |
386 | picnode = of_find_compatible_node(NULL, NULL, "mpc52xx-pic"); | 386 | picnode = of_find_compatible_node(NULL, NULL, "mpc5200-pic"); |
387 | 387 | ||
388 | intr = mpc52xx_find_and_map("mpc52xx-pic"); | 388 | intr = mpc52xx_find_and_map("mpc5200-pic"); |
389 | if (!intr) | 389 | if (!intr) |
390 | panic(__FILE__ ": find_and_map failed on 'mpc52xx-pic'. " | 390 | panic(__FILE__ ": find_and_map failed on 'mpc5200-pic'. " |
391 | "Check node !"); | 391 | "Check node !"); |
392 | 392 | ||
393 | sdma = mpc52xx_find_and_map("mpc52xx-bestcomm"); | 393 | sdma = mpc52xx_find_and_map("mpc5200-bestcomm"); |
394 | if (!sdma) | 394 | if (!sdma) |
395 | panic(__FILE__ ": find_and_map failed on 'mpc52xx-bestcomm'. " | 395 | panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. " |
396 | "Check node !"); | 396 | "Check node !"); |
397 | 397 | ||
398 | /* Disable all interrupt sources. */ | 398 | /* Disable all interrupt sources. */ |
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index edcd5b875b66..1aea1e69ff31 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -3,7 +3,13 @@ menu "Platform support" | |||
3 | 3 | ||
4 | choice | 4 | choice |
5 | prompt "Machine Type" | 5 | prompt "Machine Type" |
6 | default MPC834x_SYS | 6 | default MPC834x_MDS |
7 | |||
8 | config MPC8313_RDB | ||
9 | bool "Freescale MPC8313 RDB" | ||
10 | select DEFAULT_UIMAGE | ||
11 | help | ||
12 | This option enables support for the MPC8313 RDB board. | ||
7 | 13 | ||
8 | config MPC832x_MDS | 14 | config MPC832x_MDS |
9 | bool "Freescale MPC832x MDS" | 15 | bool "Freescale MPC832x MDS" |
@@ -12,13 +18,13 @@ config MPC832x_MDS | |||
12 | help | 18 | help |
13 | This option enables support for the MPC832x MDS evaluation board. | 19 | This option enables support for the MPC832x MDS evaluation board. |
14 | 20 | ||
15 | config MPC834x_SYS | 21 | config MPC834x_MDS |
16 | bool "Freescale MPC834x SYS" | 22 | bool "Freescale MPC834x MDS" |
17 | select DEFAULT_UIMAGE | 23 | select DEFAULT_UIMAGE |
18 | help | 24 | help |
19 | This option enables support for the MPC 834x SYS evaluation board. | 25 | This option enables support for the MPC 834x MDS evaluation board. |
20 | 26 | ||
21 | Be aware that PCI buses can only function when SYS board is plugged | 27 | Be aware that PCI buses can only function when MDS board is plugged |
22 | into the PIB (Platform IO Board) board from Freescale which provide | 28 | into the PIB (Platform IO Board) board from Freescale which provide |
23 | 3 PCI slots. The PIBs PCI initialization is the bootloader's | 29 | 3 PCI slots. The PIBs PCI initialization is the bootloader's |
24 | responsibility. | 30 | responsibility. |
@@ -41,6 +47,12 @@ config MPC8360E_PB | |||
41 | 47 | ||
42 | endchoice | 48 | endchoice |
43 | 49 | ||
50 | config PPC_MPC831x | ||
51 | bool | ||
52 | select PPC_UDBG_16550 | ||
53 | select PPC_INDIRECT_PCI | ||
54 | default y if MPC8313_RDB | ||
55 | |||
44 | config PPC_MPC832x | 56 | config PPC_MPC832x |
45 | bool | 57 | bool |
46 | select PPC_UDBG_16550 | 58 | select PPC_UDBG_16550 |
@@ -51,7 +63,7 @@ config MPC834x | |||
51 | bool | 63 | bool |
52 | select PPC_UDBG_16550 | 64 | select PPC_UDBG_16550 |
53 | select PPC_INDIRECT_PCI | 65 | select PPC_INDIRECT_PCI |
54 | default y if MPC834x_SYS || MPC834x_ITX | 66 | default y if MPC834x_MDS || MPC834x_ITX |
55 | 67 | ||
56 | config PPC_MPC836x | 68 | config PPC_MPC836x |
57 | bool | 69 | bool |
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index f1aa7e24a938..6c8199c4c382 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile | |||
@@ -3,7 +3,8 @@ | |||
3 | # | 3 | # |
4 | obj-y := misc.o | 4 | obj-y := misc.o |
5 | obj-$(CONFIG_PCI) += pci.o | 5 | obj-$(CONFIG_PCI) += pci.o |
6 | obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o | 6 | obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o |
7 | obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o | ||
7 | obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o | 8 | obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o |
8 | obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o | 9 | obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o |
9 | obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o | 10 | obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o |
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c new file mode 100644 index 000000000000..c3b98c34eb6b --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c | |||
@@ -0,0 +1,99 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/83xx/mpc8313_rdb.c | ||
3 | * | ||
4 | * Description: MPC8313x RDB board specific routines. | ||
5 | * This file is based on mpc834x_sys.c | ||
6 | * Author: Lo Wlison <r43300@freescale.com> | ||
7 | * | ||
8 | * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/pci.h> | ||
17 | |||
18 | #include <asm/time.h> | ||
19 | #include <asm/ipic.h> | ||
20 | #include <asm/udbg.h> | ||
21 | |||
22 | #include "mpc83xx.h" | ||
23 | |||
24 | #undef DEBUG | ||
25 | #ifdef DEBUG | ||
26 | #define DBG(fmt...) udbg_printf(fmt) | ||
27 | #else | ||
28 | #define DBG(fmt...) | ||
29 | #endif | ||
30 | |||
31 | #ifndef CONFIG_PCI | ||
32 | unsigned long isa_io_base = 0; | ||
33 | unsigned long isa_mem_base = 0; | ||
34 | #endif | ||
35 | |||
36 | /* ************************************************************************ | ||
37 | * | ||
38 | * Setup the architecture | ||
39 | * | ||
40 | */ | ||
41 | static void __init mpc8313_rdb_setup_arch(void) | ||
42 | { | ||
43 | struct device_node *np; | ||
44 | |||
45 | if (ppc_md.progress) | ||
46 | ppc_md.progress("mpc8313_rdb_setup_arch()", 0); | ||
47 | |||
48 | #ifdef CONFIG_PCI | ||
49 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | ||
50 | add_bridge(np); | ||
51 | |||
52 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; | ||
53 | #endif | ||
54 | } | ||
55 | |||
56 | void __init mpc8313_rdb_init_IRQ(void) | ||
57 | { | ||
58 | struct device_node *np; | ||
59 | |||
60 | np = of_find_node_by_type(NULL, "ipic"); | ||
61 | if (!np) | ||
62 | return; | ||
63 | |||
64 | ipic_init(np, 0); | ||
65 | |||
66 | /* Initialize the default interrupt mapping priorities, | ||
67 | * in case the boot rom changed something on us. | ||
68 | */ | ||
69 | ipic_set_default_priority(); | ||
70 | } | ||
71 | |||
72 | /* | ||
73 | * Called very early, MMU is off, device-tree isn't unflattened | ||
74 | */ | ||
75 | static int __init mpc8313_rdb_probe(void) | ||
76 | { | ||
77 | char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), | ||
78 | "model", NULL); | ||
79 | if (model == NULL) | ||
80 | return 0; | ||
81 | if (strcmp(model, "MPC8313ERDB")) | ||
82 | return 0; | ||
83 | |||
84 | DBG("MPC8313 RDB found\n"); | ||
85 | |||
86 | return 1; | ||
87 | } | ||
88 | |||
89 | define_machine(mpc8313_rdb) { | ||
90 | .name = "MPC8313 RDB", | ||
91 | .probe = mpc8313_rdb_probe, | ||
92 | .setup_arch = mpc8313_rdb_setup_arch, | ||
93 | .init_IRQ = mpc8313_rdb_init_IRQ, | ||
94 | .get_irq = ipic_get_irq, | ||
95 | .restart = mpc83xx_restart, | ||
96 | .time_init = mpc83xx_time_init, | ||
97 | .calibrate_decr = generic_calibrate_decr, | ||
98 | .progress = udbg_progress, | ||
99 | }; | ||
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c index 2446dea9407e..443a3172f370 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_itx.c +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c | |||
@@ -38,8 +38,6 @@ | |||
38 | 38 | ||
39 | #include "mpc83xx.h" | 39 | #include "mpc83xx.h" |
40 | 40 | ||
41 | #include <platforms/83xx/mpc834x_sys.h> | ||
42 | |||
43 | #ifndef CONFIG_PCI | 41 | #ifndef CONFIG_PCI |
44 | unsigned long isa_io_base = 0; | 42 | unsigned long isa_io_base = 0; |
45 | unsigned long isa_mem_base = 0; | 43 | unsigned long isa_mem_base = 0; |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_sys.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c index f30393f0b832..d2736da76c46 100644 --- a/arch/powerpc/platforms/83xx/mpc834x_sys.c +++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * arch/powerpc/platforms/83xx/mpc834x_sys.c | 2 | * arch/powerpc/platforms/83xx/mpc834x_mds.c |
3 | * | 3 | * |
4 | * MPC834x SYS board specific routines | 4 | * MPC834x MDS board specific routines |
5 | * | 5 | * |
6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | 6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> |
7 | * | 7 | * |
@@ -43,17 +43,87 @@ unsigned long isa_io_base = 0; | |||
43 | unsigned long isa_mem_base = 0; | 43 | unsigned long isa_mem_base = 0; |
44 | #endif | 44 | #endif |
45 | 45 | ||
46 | #define BCSR5_INT_USB 0x02 | ||
47 | /* Note: This is only for PB, not for PB+PIB | ||
48 | * On PB only port0 is connected using ULPI */ | ||
49 | static int mpc834x_usb_cfg(void) | ||
50 | { | ||
51 | unsigned long sccr, sicrl; | ||
52 | void __iomem *immap; | ||
53 | void __iomem *bcsr_regs = NULL; | ||
54 | u8 bcsr5; | ||
55 | struct device_node *np = NULL; | ||
56 | int port0_is_dr = 0; | ||
57 | |||
58 | if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL) | ||
59 | port0_is_dr = 1; | ||
60 | if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL){ | ||
61 | if (port0_is_dr) { | ||
62 | printk(KERN_WARNING | ||
63 | "There is only one USB port on PB board! \n"); | ||
64 | return -1; | ||
65 | } else if (!port0_is_dr) | ||
66 | /* No usb port enabled */ | ||
67 | return -1; | ||
68 | } | ||
69 | |||
70 | immap = ioremap(get_immrbase(), 0x1000); | ||
71 | if (!immap) | ||
72 | return -1; | ||
73 | |||
74 | /* Configure clock */ | ||
75 | sccr = in_be32(immap + MPC83XX_SCCR_OFFS); | ||
76 | if (port0_is_dr) | ||
77 | sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */ | ||
78 | else | ||
79 | sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */ | ||
80 | out_be32(immap + MPC83XX_SCCR_OFFS, sccr); | ||
81 | |||
82 | /* Configure Pin */ | ||
83 | sicrl = in_be32(immap + MPC83XX_SICRL_OFFS); | ||
84 | /* set port0 only */ | ||
85 | if (port0_is_dr) | ||
86 | sicrl |= MPC83XX_SICRL_USB0; | ||
87 | else | ||
88 | sicrl &= ~(MPC83XX_SICRL_USB0); | ||
89 | out_be32(immap + MPC83XX_SICRL_OFFS, sicrl); | ||
90 | |||
91 | iounmap(immap); | ||
92 | |||
93 | /* Map BCSR area */ | ||
94 | np = of_find_node_by_name(NULL, "bcsr"); | ||
95 | if (np != 0) { | ||
96 | struct resource res; | ||
97 | |||
98 | of_address_to_resource(np, 0, &res); | ||
99 | bcsr_regs = ioremap(res.start, res.end - res.start + 1); | ||
100 | of_node_put(np); | ||
101 | } | ||
102 | if (!bcsr_regs) | ||
103 | return -1; | ||
104 | |||
105 | /* | ||
106 | * if MDS board is plug into PIB board, | ||
107 | * force to use the PHY on MDS board | ||
108 | */ | ||
109 | bcsr5 = in_8(bcsr_regs + 5); | ||
110 | if (!(bcsr5 & BCSR5_INT_USB)) | ||
111 | out_8(bcsr_regs + 5, (bcsr5 | BCSR5_INT_USB)); | ||
112 | iounmap(bcsr_regs); | ||
113 | return 0; | ||
114 | } | ||
115 | |||
46 | /* ************************************************************************ | 116 | /* ************************************************************************ |
47 | * | 117 | * |
48 | * Setup the architecture | 118 | * Setup the architecture |
49 | * | 119 | * |
50 | */ | 120 | */ |
51 | static void __init mpc834x_sys_setup_arch(void) | 121 | static void __init mpc834x_mds_setup_arch(void) |
52 | { | 122 | { |
53 | struct device_node *np; | 123 | struct device_node *np; |
54 | 124 | ||
55 | if (ppc_md.progress) | 125 | if (ppc_md.progress) |
56 | ppc_md.progress("mpc834x_sys_setup_arch()", 0); | 126 | ppc_md.progress("mpc834x_mds_setup_arch()", 0); |
57 | 127 | ||
58 | np = of_find_node_by_type(NULL, "cpu"); | 128 | np = of_find_node_by_type(NULL, "cpu"); |
59 | if (np != 0) { | 129 | if (np != 0) { |
@@ -65,6 +135,7 @@ static void __init mpc834x_sys_setup_arch(void) | |||
65 | loops_per_jiffy = 50000000 / HZ; | 135 | loops_per_jiffy = 50000000 / HZ; |
66 | of_node_put(np); | 136 | of_node_put(np); |
67 | } | 137 | } |
138 | |||
68 | #ifdef CONFIG_PCI | 139 | #ifdef CONFIG_PCI |
69 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 140 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
70 | add_bridge(np); | 141 | add_bridge(np); |
@@ -72,6 +143,8 @@ static void __init mpc834x_sys_setup_arch(void) | |||
72 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; | 143 | ppc_md.pci_exclude_device = mpc83xx_exclude_device; |
73 | #endif | 144 | #endif |
74 | 145 | ||
146 | mpc834x_usb_cfg(); | ||
147 | |||
75 | #ifdef CONFIG_ROOT_NFS | 148 | #ifdef CONFIG_ROOT_NFS |
76 | ROOT_DEV = Root_NFS; | 149 | ROOT_DEV = Root_NFS; |
77 | #else | 150 | #else |
@@ -79,7 +152,7 @@ static void __init mpc834x_sys_setup_arch(void) | |||
79 | #endif | 152 | #endif |
80 | } | 153 | } |
81 | 154 | ||
82 | static void __init mpc834x_sys_init_IRQ(void) | 155 | static void __init mpc834x_mds_init_IRQ(void) |
83 | { | 156 | { |
84 | struct device_node *np; | 157 | struct device_node *np; |
85 | 158 | ||
@@ -119,7 +192,7 @@ late_initcall(mpc834x_rtc_hookup); | |||
119 | /* | 192 | /* |
120 | * Called very early, MMU is off, device-tree isn't unflattened | 193 | * Called very early, MMU is off, device-tree isn't unflattened |
121 | */ | 194 | */ |
122 | static int __init mpc834x_sys_probe(void) | 195 | static int __init mpc834x_mds_probe(void) |
123 | { | 196 | { |
124 | /* We always match for now, eventually we should look at the flat | 197 | /* We always match for now, eventually we should look at the flat |
125 | dev tree to ensure this is the board we are suppose to run on | 198 | dev tree to ensure this is the board we are suppose to run on |
@@ -127,11 +200,11 @@ static int __init mpc834x_sys_probe(void) | |||
127 | return 1; | 200 | return 1; |
128 | } | 201 | } |
129 | 202 | ||
130 | define_machine(mpc834x_sys) { | 203 | define_machine(mpc834x_mds) { |
131 | .name = "MPC834x SYS", | 204 | .name = "MPC834x MDS", |
132 | .probe = mpc834x_sys_probe, | 205 | .probe = mpc834x_mds_probe, |
133 | .setup_arch = mpc834x_sys_setup_arch, | 206 | .setup_arch = mpc834x_mds_setup_arch, |
134 | .init_IRQ = mpc834x_sys_init_IRQ, | 207 | .init_IRQ = mpc834x_mds_init_IRQ, |
135 | .get_irq = ipic_get_irq, | 208 | .get_irq = ipic_get_irq, |
136 | .restart = mpc83xx_restart, | 209 | .restart = mpc83xx_restart, |
137 | .time_init = mpc83xx_time_init, | 210 | .time_init = mpc83xx_time_init, |
diff --git a/arch/powerpc/platforms/83xx/mpc834x_sys.h b/arch/powerpc/platforms/83xx/mpc834x_sys.h deleted file mode 100644 index 7d5bbef084e7..000000000000 --- a/arch/powerpc/platforms/83xx/mpc834x_sys.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/83xx/mpc834x_sys.h | ||
3 | * | ||
4 | * MPC834X SYS common board definitions | ||
5 | * | ||
6 | * Maintainer: Kumar Gala <galak@kernel.crashing.org> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_MPC83XX_SYS_H__ | ||
16 | #define __MACH_MPC83XX_SYS_H__ | ||
17 | |||
18 | #define PIRQA MPC83xx_IRQ_EXT4 | ||
19 | #define PIRQB MPC83xx_IRQ_EXT5 | ||
20 | #define PIRQC MPC83xx_IRQ_EXT6 | ||
21 | #define PIRQD MPC83xx_IRQ_EXT7 | ||
22 | |||
23 | #endif /* __MACH_MPC83XX_SYS_H__ */ | ||
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h index 01cae106912b..9cd03b59c8f4 100644 --- a/arch/powerpc/platforms/83xx/mpc83xx.h +++ b/arch/powerpc/platforms/83xx/mpc83xx.h | |||
@@ -4,6 +4,24 @@ | |||
4 | #include <linux/init.h> | 4 | #include <linux/init.h> |
5 | #include <linux/device.h> | 5 | #include <linux/device.h> |
6 | 6 | ||
7 | /* System Clock Control Register */ | ||
8 | #define MPC83XX_SCCR_OFFS 0xA08 | ||
9 | #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000 | ||
10 | #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000 | ||
11 | #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000 | ||
12 | #define MPC83XX_SCCR_USB_DRCM_11 0x00300000 | ||
13 | #define MPC83XX_SCCR_USB_DRCM_01 0x00100000 | ||
14 | #define MPC83XX_SCCR_USB_DRCM_10 0x00200000 | ||
15 | |||
16 | /* system i/o configuration register low */ | ||
17 | #define MPC83XX_SICRL_OFFS 0x114 | ||
18 | #define MPC83XX_SICRL_USB0 0x40000000 | ||
19 | #define MPC83XX_SICRL_USB1 0x20000000 | ||
20 | |||
21 | /* system i/o configuration register high */ | ||
22 | #define MPC83XX_SICRH_OFFS 0x118 | ||
23 | #define MPC83XX_SICRH_USB_UTMI 0x00020000 | ||
24 | |||
7 | /* | 25 | /* |
8 | * Declaration for the various functions exported by the | 26 | * Declaration for the various functions exported by the |
9 | * mpc83xx_* files. Mostly for use by mpc83xx_setup | 27 | * mpc83xx_* files. Mostly for use by mpc83xx_setup |
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 0584f3c7e884..0efdd2f1babe 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -23,6 +23,13 @@ config MPC85xx_CDS | |||
23 | help | 23 | help |
24 | This option enables support for the MPC85xx CDS board | 24 | This option enables support for the MPC85xx CDS board |
25 | 25 | ||
26 | config MPC8568_MDS | ||
27 | bool "Freescale MPC8568 MDS" | ||
28 | select DEFAULT_UIMAGE | ||
29 | # select QUICC_ENGINE | ||
30 | help | ||
31 | This option enables support for the MPC8568 MDS board | ||
32 | |||
26 | endchoice | 33 | endchoice |
27 | 34 | ||
28 | config MPC8540 | 35 | config MPC8540 |
@@ -36,6 +43,12 @@ config MPC8560 | |||
36 | select PPC_INDIRECT_PCI | 43 | select PPC_INDIRECT_PCI |
37 | default y if MPC8560_ADS | 44 | default y if MPC8560_ADS |
38 | 45 | ||
46 | config MPC85xx | ||
47 | bool | ||
48 | select PPC_UDBG_16550 | ||
49 | select PPC_INDIRECT_PCI | ||
50 | default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS | ||
51 | |||
39 | config PPC_INDIRECT_PCI_BE | 52 | config PPC_INDIRECT_PCI_BE |
40 | bool | 53 | bool |
41 | depends on PPC_85xx | 54 | depends on PPC_85xx |
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index 282f5d0d0152..e40e521816b8 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile | |||
@@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o | |||
5 | obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o | 5 | obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o |
6 | obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o | 6 | obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o |
7 | obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o | 7 | obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o |
8 | obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o | ||
diff --git a/arch/powerpc/platforms/85xx/mpc8568_mds.c b/arch/powerpc/platforms/85xx/mpc8568_mds.c new file mode 100644 index 000000000000..0861d1107bc8 --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc8568_mds.c | |||
@@ -0,0 +1,246 @@ | |||
1 | /* | ||
2 | * Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved. | ||
3 | * | ||
4 | * Author: Andy Fleming <afleming@freescale.com> | ||
5 | * | ||
6 | * Based on 83xx/mpc8360e_pb.c by: | ||
7 | * Li Yang <LeoLi@freescale.com> | ||
8 | * Yin Olivia <Hong-hua.Yin@freescale.com> | ||
9 | * | ||
10 | * Description: | ||
11 | * MPC8568E MDS PB board specific routines. | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify it | ||
14 | * under the terms of the GNU General Public License as published by the | ||
15 | * Free Software Foundation; either version 2 of the License, or (at your | ||
16 | * option) any later version. | ||
17 | */ | ||
18 | |||
19 | #include <linux/stddef.h> | ||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/reboot.h> | ||
24 | #include <linux/pci.h> | ||
25 | #include <linux/kdev_t.h> | ||
26 | #include <linux/major.h> | ||
27 | #include <linux/console.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/seq_file.h> | ||
30 | #include <linux/root_dev.h> | ||
31 | #include <linux/initrd.h> | ||
32 | #include <linux/module.h> | ||
33 | #include <linux/fsl_devices.h> | ||
34 | |||
35 | #include <asm/of_device.h> | ||
36 | #include <asm/of_platform.h> | ||
37 | #include <asm/system.h> | ||
38 | #include <asm/atomic.h> | ||
39 | #include <asm/time.h> | ||
40 | #include <asm/io.h> | ||
41 | #include <asm/machdep.h> | ||
42 | #include <asm/bootinfo.h> | ||
43 | #include <asm/pci-bridge.h> | ||
44 | #include <asm/mpc85xx.h> | ||
45 | #include <asm/irq.h> | ||
46 | #include <mm/mmu_decl.h> | ||
47 | #include <asm/prom.h> | ||
48 | #include <asm/udbg.h> | ||
49 | #include <sysdev/fsl_soc.h> | ||
50 | #include <asm/qe.h> | ||
51 | #include <asm/qe_ic.h> | ||
52 | #include <asm/mpic.h> | ||
53 | |||
54 | #include "mpc85xx.h" | ||
55 | |||
56 | #undef DEBUG | ||
57 | #ifdef DEBUG | ||
58 | #define DBG(fmt...) udbg_printf(fmt) | ||
59 | #else | ||
60 | #define DBG(fmt...) | ||
61 | #endif | ||
62 | |||
63 | #ifndef CONFIG_PCI | ||
64 | unsigned long isa_io_base = 0; | ||
65 | unsigned long isa_mem_base = 0; | ||
66 | #endif | ||
67 | |||
68 | /* ************************************************************************ | ||
69 | * | ||
70 | * Setup the architecture | ||
71 | * | ||
72 | */ | ||
73 | static void __init mpc8568_mds_setup_arch(void) | ||
74 | { | ||
75 | struct device_node *np; | ||
76 | static u8 *bcsr_regs = NULL; | ||
77 | |||
78 | |||
79 | if (ppc_md.progress) | ||
80 | ppc_md.progress("mpc8568_mds_setup_arch()", 0); | ||
81 | |||
82 | np = of_find_node_by_type(NULL, "cpu"); | ||
83 | if (np != NULL) { | ||
84 | const unsigned int *fp = | ||
85 | get_property(np, "clock-frequency", NULL); | ||
86 | if (fp != NULL) | ||
87 | loops_per_jiffy = *fp / HZ; | ||
88 | else | ||
89 | loops_per_jiffy = 50000000 / HZ; | ||
90 | of_node_put(np); | ||
91 | } | ||
92 | |||
93 | /* Map BCSR area */ | ||
94 | np = of_find_node_by_name(NULL, "bcsr"); | ||
95 | if (np != NULL) { | ||
96 | struct resource res; | ||
97 | |||
98 | of_address_to_resource(np, 0, &res); | ||
99 | bcsr_regs = ioremap(res.start, res.end - res.start +1); | ||
100 | of_node_put(np); | ||
101 | } | ||
102 | |||
103 | #ifdef CONFIG_PCI | ||
104 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) { | ||
105 | add_bridge(np); | ||
106 | } | ||
107 | of_node_put(np); | ||
108 | #endif | ||
109 | |||
110 | #ifdef CONFIG_QUICC_ENGINE | ||
111 | if ((np = of_find_node_by_name(NULL, "qe")) != NULL) { | ||
112 | qe_reset(); | ||
113 | of_node_put(np); | ||
114 | } | ||
115 | |||
116 | if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) { | ||
117 | struct device_node *ucc = NULL; | ||
118 | |||
119 | par_io_init(np); | ||
120 | of_node_put(np); | ||
121 | |||
122 | for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;) | ||
123 | par_io_of_config(ucc); | ||
124 | |||
125 | of_node_put(ucc); | ||
126 | } | ||
127 | |||
128 | if (bcsr_regs) { | ||
129 | u8 bcsr_phy; | ||
130 | |||
131 | /* Reset the Ethernet PHY */ | ||
132 | bcsr_phy = in_be8(&bcsr_regs[9]); | ||
133 | bcsr_phy &= ~0x20; | ||
134 | out_be8(&bcsr_regs[9], bcsr_phy); | ||
135 | |||
136 | udelay(1000); | ||
137 | |||
138 | bcsr_phy = in_be8(&bcsr_regs[9]); | ||
139 | bcsr_phy |= 0x20; | ||
140 | out_be8(&bcsr_regs[9], bcsr_phy); | ||
141 | |||
142 | iounmap(bcsr_regs); | ||
143 | } | ||
144 | |||
145 | #endif /* CONFIG_QUICC_ENGINE */ | ||
146 | } | ||
147 | |||
148 | static struct of_device_id mpc8568_ids[] = { | ||
149 | { .type = "soc", }, | ||
150 | { .compatible = "soc", }, | ||
151 | { .type = "qe", }, | ||
152 | {}, | ||
153 | }; | ||
154 | |||
155 | static int __init mpc8568_publish_devices(void) | ||
156 | { | ||
157 | if (!machine_is(mpc8568_mds)) | ||
158 | return 0; | ||
159 | |||
160 | /* Publish the QE devices */ | ||
161 | of_platform_bus_probe(NULL,mpc8568_ids,NULL); | ||
162 | |||
163 | return 0; | ||
164 | } | ||
165 | device_initcall(mpc8568_publish_devices); | ||
166 | |||
167 | static void __init mpc8568_mds_pic_init(void) | ||
168 | { | ||
169 | struct mpic *mpic; | ||
170 | struct resource r; | ||
171 | struct device_node *np = NULL; | ||
172 | |||
173 | np = of_find_node_by_type(NULL, "open-pic"); | ||
174 | if (!np) | ||
175 | return; | ||
176 | |||
177 | if (of_address_to_resource(np, 0, &r)) { | ||
178 | printk(KERN_ERR "Failed to map mpic register space\n"); | ||
179 | of_node_put(np); | ||
180 | return; | ||
181 | } | ||
182 | |||
183 | mpic = mpic_alloc(np, r.start, | ||
184 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | ||
185 | 4, 0, " OpenPIC "); | ||
186 | BUG_ON(mpic == NULL); | ||
187 | of_node_put(np); | ||
188 | |||
189 | /* Internal Interrupts */ | ||
190 | mpic_assign_isu(mpic, 0, r.start + 0x10200); | ||
191 | mpic_assign_isu(mpic, 1, r.start + 0x10280); | ||
192 | mpic_assign_isu(mpic, 2, r.start + 0x10300); | ||
193 | mpic_assign_isu(mpic, 3, r.start + 0x10380); | ||
194 | mpic_assign_isu(mpic, 4, r.start + 0x10400); | ||
195 | mpic_assign_isu(mpic, 5, r.start + 0x10480); | ||
196 | mpic_assign_isu(mpic, 6, r.start + 0x10500); | ||
197 | mpic_assign_isu(mpic, 7, r.start + 0x10580); | ||
198 | mpic_assign_isu(mpic, 8, r.start + 0x10600); | ||
199 | mpic_assign_isu(mpic, 9, r.start + 0x10680); | ||
200 | mpic_assign_isu(mpic, 10, r.start + 0x10700); | ||
201 | mpic_assign_isu(mpic, 11, r.start + 0x10780); | ||
202 | |||
203 | /* External Interrupts */ | ||
204 | mpic_assign_isu(mpic, 12, r.start + 0x10000); | ||
205 | mpic_assign_isu(mpic, 13, r.start + 0x10080); | ||
206 | mpic_assign_isu(mpic, 14, r.start + 0x10100); | ||
207 | |||
208 | mpic_init(mpic); | ||
209 | |||
210 | |||
211 | #ifdef CONFIG_QUICC_ENGINE | ||
212 | np = of_find_node_by_type(NULL, "qeic"); | ||
213 | if (!np) | ||
214 | return; | ||
215 | |||
216 | qe_ic_init(np, 0); | ||
217 | of_node_put(np); | ||
218 | #endif /* CONFIG_QUICC_ENGINE */ | ||
219 | } | ||
220 | |||
221 | |||
222 | static int __init mpc8568_mds_probe(void) | ||
223 | { | ||
224 | char *model = of_get_flat_dt_prop(of_get_flat_dt_root(), | ||
225 | "model", NULL); | ||
226 | if (model == NULL) | ||
227 | return 0; | ||
228 | if (strcmp(model, "MPC8568EMDS")) | ||
229 | return 0; | ||
230 | |||
231 | DBG("MPC8568EMDS found\n"); | ||
232 | |||
233 | return 1; | ||
234 | } | ||
235 | |||
236 | |||
237 | define_machine(mpc8568_mds) { | ||
238 | .name = "MPC8568E MDS", | ||
239 | .probe = mpc8568_mds_probe, | ||
240 | .setup_arch = mpc8568_mds_setup_arch, | ||
241 | .init_IRQ = mpc8568_mds_pic_init, | ||
242 | .get_irq = mpic_get_irq, | ||
243 | .restart = mpc85xx_restart, | ||
244 | .calibrate_decr = generic_calibrate_decr, | ||
245 | .progress = udbg_progress, | ||
246 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index bda2e55e6c4c..c56fce57621c 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -45,8 +45,7 @@ unsigned long isa_mem_base = 0; | |||
45 | #endif | 45 | #endif |
46 | 46 | ||
47 | #ifdef CONFIG_PCI | 47 | #ifdef CONFIG_PCI |
48 | int | 48 | static int mpc85xx_exclude_device(u_char bus, u_char devfn) |
49 | mpc85xx_exclude_device(u_char bus, u_char devfn) | ||
50 | { | 49 | { |
51 | if (bus == 0 && PCI_SLOT(devfn) == 0) | 50 | if (bus == 0 && PCI_SLOT(devfn) == 0) |
52 | return PCIBIOS_DEVICE_NOT_FOUND; | 51 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -69,7 +68,7 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc) | |||
69 | 68 | ||
70 | #endif /* CONFIG_CPM2 */ | 69 | #endif /* CONFIG_CPM2 */ |
71 | 70 | ||
72 | void __init mpc85xx_ads_pic_init(void) | 71 | static void __init mpc85xx_ads_pic_init(void) |
73 | { | 72 | { |
74 | struct mpic *mpic; | 73 | struct mpic *mpic; |
75 | struct resource r; | 74 | struct resource r; |
@@ -254,7 +253,7 @@ static void __init mpc85xx_ads_setup_arch(void) | |||
254 | #endif | 253 | #endif |
255 | } | 254 | } |
256 | 255 | ||
257 | void mpc85xx_ads_show_cpuinfo(struct seq_file *m) | 256 | static void mpc85xx_ads_show_cpuinfo(struct seq_file *m) |
258 | { | 257 | { |
259 | uint pvid, svid, phid1; | 258 | uint pvid, svid, phid1; |
260 | uint memsize = total_memory; | 259 | uint memsize = total_memory; |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c index 953cd5dd3f54..abc0aca6de40 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c | |||
@@ -56,7 +56,6 @@ unsigned long isa_mem_base = 0; | |||
56 | static int cds_pci_slot = 2; | 56 | static int cds_pci_slot = 2; |
57 | static volatile u8 *cadmus; | 57 | static volatile u8 *cadmus; |
58 | 58 | ||
59 | |||
60 | #ifdef CONFIG_PCI | 59 | #ifdef CONFIG_PCI |
61 | 60 | ||
62 | #define ARCADIA_HOST_BRIDGE_IDSEL 17 | 61 | #define ARCADIA_HOST_BRIDGE_IDSEL 17 |
@@ -64,8 +63,7 @@ static volatile u8 *cadmus; | |||
64 | 63 | ||
65 | extern int mpc85xx_pci2_busno; | 64 | extern int mpc85xx_pci2_busno; |
66 | 65 | ||
67 | int | 66 | static int mpc85xx_exclude_device(u_char bus, u_char devfn) |
68 | mpc85xx_exclude_device(u_char bus, u_char devfn) | ||
69 | { | 67 | { |
70 | if (bus == 0 && PCI_SLOT(devfn) == 0) | 68 | if (bus == 0 && PCI_SLOT(devfn) == 0) |
71 | return PCIBIOS_DEVICE_NOT_FOUND; | 69 | return PCIBIOS_DEVICE_NOT_FOUND; |
@@ -81,8 +79,7 @@ mpc85xx_exclude_device(u_char bus, u_char devfn) | |||
81 | return PCIBIOS_SUCCESSFUL; | 79 | return PCIBIOS_SUCCESSFUL; |
82 | } | 80 | } |
83 | 81 | ||
84 | void __init | 82 | static void __init mpc85xx_cds_pcibios_fixup(void) |
85 | mpc85xx_cds_pcibios_fixup(void) | ||
86 | { | 83 | { |
87 | struct pci_dev *dev; | 84 | struct pci_dev *dev; |
88 | u_char c; | 85 | u_char c; |
@@ -144,7 +141,7 @@ static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc) | |||
144 | #endif /* PPC_I8259 */ | 141 | #endif /* PPC_I8259 */ |
145 | #endif /* CONFIG_PCI */ | 142 | #endif /* CONFIG_PCI */ |
146 | 143 | ||
147 | void __init mpc85xx_cds_pic_init(void) | 144 | static void __init mpc85xx_cds_pic_init(void) |
148 | { | 145 | { |
149 | struct mpic *mpic; | 146 | struct mpic *mpic; |
150 | struct resource r; | 147 | struct resource r; |
@@ -224,12 +221,10 @@ void __init mpc85xx_cds_pic_init(void) | |||
224 | #endif /* CONFIG_PPC_I8259 */ | 221 | #endif /* CONFIG_PPC_I8259 */ |
225 | } | 222 | } |
226 | 223 | ||
227 | |||
228 | /* | 224 | /* |
229 | * Setup the architecture | 225 | * Setup the architecture |
230 | */ | 226 | */ |
231 | static void __init | 227 | static void __init mpc85xx_cds_setup_arch(void) |
232 | mpc85xx_cds_setup_arch(void) | ||
233 | { | 228 | { |
234 | struct device_node *cpu; | 229 | struct device_node *cpu; |
235 | #ifdef CONFIG_PCI | 230 | #ifdef CONFIG_PCI |
@@ -276,9 +271,7 @@ mpc85xx_cds_setup_arch(void) | |||
276 | #endif | 271 | #endif |
277 | } | 272 | } |
278 | 273 | ||
279 | 274 | static void mpc85xx_cds_show_cpuinfo(struct seq_file *m) | |
280 | void | ||
281 | mpc85xx_cds_show_cpuinfo(struct seq_file *m) | ||
282 | { | 275 | { |
283 | uint pvid, svid, phid1; | 276 | uint pvid, svid, phid1; |
284 | uint memsize = total_memory; | 277 | uint memsize = total_memory; |
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile index 65e612315b9b..452004283f17 100644 --- a/arch/powerpc/platforms/Makefile +++ b/arch/powerpc/platforms/Makefile | |||
@@ -5,9 +5,9 @@ ifeq ($(CONFIG_PPC64),y) | |||
5 | obj-$(CONFIG_PPC_PMAC) += powermac/ | 5 | obj-$(CONFIG_PPC_PMAC) += powermac/ |
6 | endif | 6 | endif |
7 | endif | 7 | endif |
8 | obj-$(CONFIG_PPC_MPC52xx) += 52xx/ | ||
9 | obj-$(CONFIG_PPC_CHRP) += chrp/ | 8 | obj-$(CONFIG_PPC_CHRP) += chrp/ |
10 | obj-$(CONFIG_4xx) += 4xx/ | 9 | obj-$(CONFIG_4xx) += 4xx/ |
10 | obj-$(CONFIG_PPC_MPC52xx) += 52xx/ | ||
11 | obj-$(CONFIG_PPC_8xx) += 8xx/ | 11 | obj-$(CONFIG_PPC_8xx) += 8xx/ |
12 | obj-$(CONFIG_PPC_82xx) += 82xx/ | 12 | obj-$(CONFIG_PPC_82xx) += 82xx/ |
13 | obj-$(CONFIG_PPC_83xx) += 83xx/ | 13 | obj-$(CONFIG_PPC_83xx) += 83xx/ |
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c index d04ae1671e6c..66ca4b5a1dbc 100644 --- a/arch/powerpc/platforms/cell/pmu.c +++ b/arch/powerpc/platforms/cell/pmu.c | |||
@@ -345,18 +345,12 @@ EXPORT_SYMBOL_GPL(cbe_read_trace_buffer); | |||
345 | * Enabling/disabling interrupts for the entire performance monitoring unit. | 345 | * Enabling/disabling interrupts for the entire performance monitoring unit. |
346 | */ | 346 | */ |
347 | 347 | ||
348 | u32 cbe_query_pm_interrupts(u32 cpu) | 348 | u32 cbe_get_and_clear_pm_interrupts(u32 cpu) |
349 | { | ||
350 | return cbe_read_pm(cpu, pm_status); | ||
351 | } | ||
352 | EXPORT_SYMBOL_GPL(cbe_query_pm_interrupts); | ||
353 | |||
354 | u32 cbe_clear_pm_interrupts(u32 cpu) | ||
355 | { | 349 | { |
356 | /* Reading pm_status clears the interrupt bits. */ | 350 | /* Reading pm_status clears the interrupt bits. */ |
357 | return cbe_query_pm_interrupts(cpu); | 351 | return cbe_read_pm(cpu, pm_status); |
358 | } | 352 | } |
359 | EXPORT_SYMBOL_GPL(cbe_clear_pm_interrupts); | 353 | EXPORT_SYMBOL_GPL(cbe_get_and_clear_pm_interrupts); |
360 | 354 | ||
361 | void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask) | 355 | void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask) |
362 | { | 356 | { |
@@ -371,7 +365,7 @@ EXPORT_SYMBOL_GPL(cbe_enable_pm_interrupts); | |||
371 | 365 | ||
372 | void cbe_disable_pm_interrupts(u32 cpu) | 366 | void cbe_disable_pm_interrupts(u32 cpu) |
373 | { | 367 | { |
374 | cbe_clear_pm_interrupts(cpu); | 368 | cbe_get_and_clear_pm_interrupts(cpu); |
375 | cbe_write_pm(cpu, pm_status, 0); | 369 | cbe_write_pm(cpu, pm_status, 0); |
376 | } | 370 | } |
377 | EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts); | 371 | EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts); |
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c index d8b39fe39cdd..e34599f53d28 100644 --- a/arch/powerpc/platforms/cell/spu_manage.c +++ b/arch/powerpc/platforms/cell/spu_manage.c | |||
@@ -59,63 +59,6 @@ static u64 __init find_spu_unit_number(struct device_node *spe) | |||
59 | return 0; | 59 | return 0; |
60 | } | 60 | } |
61 | 61 | ||
62 | static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe, | ||
63 | const char *prop) | ||
64 | { | ||
65 | const struct address_prop { | ||
66 | unsigned long address; | ||
67 | unsigned int len; | ||
68 | } __attribute__((packed)) *p; | ||
69 | int proplen; | ||
70 | |||
71 | unsigned long start_pfn, nr_pages; | ||
72 | struct pglist_data *pgdata; | ||
73 | struct zone *zone; | ||
74 | int ret; | ||
75 | |||
76 | p = get_property(spe, prop, &proplen); | ||
77 | WARN_ON(proplen != sizeof (*p)); | ||
78 | |||
79 | start_pfn = p->address >> PAGE_SHIFT; | ||
80 | nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT; | ||
81 | |||
82 | pgdata = NODE_DATA(spu->node); | ||
83 | zone = pgdata->node_zones; | ||
84 | |||
85 | ret = __add_pages(zone, start_pfn, nr_pages); | ||
86 | |||
87 | return ret; | ||
88 | } | ||
89 | |||
90 | static void __iomem * __init map_spe_prop(struct spu *spu, | ||
91 | struct device_node *n, const char *name) | ||
92 | { | ||
93 | const struct address_prop { | ||
94 | unsigned long address; | ||
95 | unsigned int len; | ||
96 | } __attribute__((packed)) *prop; | ||
97 | |||
98 | const void *p; | ||
99 | int proplen; | ||
100 | void __iomem *ret = NULL; | ||
101 | int err = 0; | ||
102 | |||
103 | p = get_property(n, name, &proplen); | ||
104 | if (proplen != sizeof (struct address_prop)) | ||
105 | return NULL; | ||
106 | |||
107 | prop = p; | ||
108 | |||
109 | err = cell_spuprop_present(spu, n, name); | ||
110 | if (err && (err != -EEXIST)) | ||
111 | goto out; | ||
112 | |||
113 | ret = ioremap(prop->address, prop->len); | ||
114 | |||
115 | out: | ||
116 | return ret; | ||
117 | } | ||
118 | |||
119 | static void spu_unmap(struct spu *spu) | 62 | static void spu_unmap(struct spu *spu) |
120 | { | 63 | { |
121 | if (!firmware_has_feature(FW_FEATURE_LPAR)) | 64 | if (!firmware_has_feature(FW_FEATURE_LPAR)) |
@@ -157,6 +100,23 @@ static int __init spu_map_interrupts_old(struct spu *spu, | |||
157 | return spu->irqs[2] == NO_IRQ ? -EINVAL : 0; | 100 | return spu->irqs[2] == NO_IRQ ? -EINVAL : 0; |
158 | } | 101 | } |
159 | 102 | ||
103 | static void __iomem * __init spu_map_prop_old(struct spu *spu, | ||
104 | struct device_node *n, | ||
105 | const char *name) | ||
106 | { | ||
107 | const struct address_prop { | ||
108 | unsigned long address; | ||
109 | unsigned int len; | ||
110 | } __attribute__((packed)) *prop; | ||
111 | int proplen; | ||
112 | |||
113 | prop = get_property(n, name, &proplen); | ||
114 | if (prop == NULL || proplen != sizeof (struct address_prop)) | ||
115 | return NULL; | ||
116 | |||
117 | return ioremap(prop->address, prop->len); | ||
118 | } | ||
119 | |||
160 | static int __init spu_map_device_old(struct spu *spu) | 120 | static int __init spu_map_device_old(struct spu *spu) |
161 | { | 121 | { |
162 | struct device_node *node = spu->devnode; | 122 | struct device_node *node = spu->devnode; |
@@ -175,7 +135,7 @@ static int __init spu_map_device_old(struct spu *spu) | |||
175 | 135 | ||
176 | /* we use local store as ram, not io memory */ | 136 | /* we use local store as ram, not io memory */ |
177 | spu->local_store = (void __force *) | 137 | spu->local_store = (void __force *) |
178 | map_spe_prop(spu, node, "local-store"); | 138 | spu_map_prop_old(spu, node, "local-store"); |
179 | if (!spu->local_store) | 139 | if (!spu->local_store) |
180 | goto out; | 140 | goto out; |
181 | 141 | ||
@@ -184,16 +144,16 @@ static int __init spu_map_device_old(struct spu *spu) | |||
184 | goto out_unmap; | 144 | goto out_unmap; |
185 | spu->problem_phys = *(unsigned long *)prop; | 145 | spu->problem_phys = *(unsigned long *)prop; |
186 | 146 | ||
187 | spu->problem = map_spe_prop(spu, node, "problem"); | 147 | spu->problem = spu_map_prop_old(spu, node, "problem"); |
188 | if (!spu->problem) | 148 | if (!spu->problem) |
189 | goto out_unmap; | 149 | goto out_unmap; |
190 | 150 | ||
191 | spu->priv2 = map_spe_prop(spu, node, "priv2"); | 151 | spu->priv2 = spu_map_prop_old(spu, node, "priv2"); |
192 | if (!spu->priv2) | 152 | if (!spu->priv2) |
193 | goto out_unmap; | 153 | goto out_unmap; |
194 | 154 | ||
195 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { | 155 | if (!firmware_has_feature(FW_FEATURE_LPAR)) { |
196 | spu->priv1 = map_spe_prop(spu, node, "priv1"); | 156 | spu->priv1 = spu_map_prop_old(spu, node, "priv1"); |
197 | if (!spu->priv1) | 157 | if (!spu->priv1) |
198 | goto out_unmap; | 158 | goto out_unmap; |
199 | } | 159 | } |
@@ -245,34 +205,20 @@ static int spu_map_resource(struct spu *spu, int nr, | |||
245 | void __iomem** virt, unsigned long *phys) | 205 | void __iomem** virt, unsigned long *phys) |
246 | { | 206 | { |
247 | struct device_node *np = spu->devnode; | 207 | struct device_node *np = spu->devnode; |
248 | unsigned long start_pfn, nr_pages; | ||
249 | struct pglist_data *pgdata; | ||
250 | struct zone *zone; | ||
251 | struct resource resource = { }; | 208 | struct resource resource = { }; |
252 | unsigned long len; | 209 | unsigned long len; |
253 | int ret; | 210 | int ret; |
254 | 211 | ||
255 | ret = of_address_to_resource(np, nr, &resource); | 212 | ret = of_address_to_resource(np, nr, &resource); |
256 | if (ret) | 213 | if (ret) |
257 | goto out; | 214 | return ret; |
258 | |||
259 | if (phys) | 215 | if (phys) |
260 | *phys = resource.start; | 216 | *phys = resource.start; |
261 | len = resource.end - resource.start + 1; | 217 | len = resource.end - resource.start + 1; |
262 | *virt = ioremap(resource.start, len); | 218 | *virt = ioremap(resource.start, len); |
263 | if (!*virt) | 219 | if (!*virt) |
264 | ret = -EINVAL; | 220 | return -EINVAL; |
265 | 221 | return 0; | |
266 | start_pfn = resource.start >> PAGE_SHIFT; | ||
267 | nr_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT; | ||
268 | |||
269 | pgdata = NODE_DATA(spu->node); | ||
270 | zone = pgdata->node_zones; | ||
271 | |||
272 | ret = __add_pages(zone, start_pfn, nr_pages); | ||
273 | |||
274 | out: | ||
275 | return ret; | ||
276 | } | 222 | } |
277 | 223 | ||
278 | static int __init spu_map_device(struct spu *spu) | 224 | static int __init spu_map_device(struct spu *spu) |
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c index 0870009f56db..04ad2e364e97 100644 --- a/arch/powerpc/platforms/cell/spufs/context.c +++ b/arch/powerpc/platforms/cell/spufs/context.c | |||
@@ -42,7 +42,7 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang) | |||
42 | } | 42 | } |
43 | spin_lock_init(&ctx->mmio_lock); | 43 | spin_lock_init(&ctx->mmio_lock); |
44 | kref_init(&ctx->kref); | 44 | kref_init(&ctx->kref); |
45 | init_rwsem(&ctx->state_sema); | 45 | mutex_init(&ctx->state_mutex); |
46 | init_MUTEX(&ctx->run_sema); | 46 | init_MUTEX(&ctx->run_sema); |
47 | init_waitqueue_head(&ctx->ibox_wq); | 47 | init_waitqueue_head(&ctx->ibox_wq); |
48 | init_waitqueue_head(&ctx->wbox_wq); | 48 | init_waitqueue_head(&ctx->wbox_wq); |
@@ -53,6 +53,10 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang) | |||
53 | ctx->owner = get_task_mm(current); | 53 | ctx->owner = get_task_mm(current); |
54 | if (gang) | 54 | if (gang) |
55 | spu_gang_add_ctx(gang, ctx); | 55 | spu_gang_add_ctx(gang, ctx); |
56 | ctx->rt_priority = current->rt_priority; | ||
57 | ctx->policy = current->policy; | ||
58 | ctx->prio = current->prio; | ||
59 | INIT_DELAYED_WORK(&ctx->sched_work, spu_sched_tick); | ||
56 | goto out; | 60 | goto out; |
57 | out_free: | 61 | out_free: |
58 | kfree(ctx); | 62 | kfree(ctx); |
@@ -65,9 +69,9 @@ void destroy_spu_context(struct kref *kref) | |||
65 | { | 69 | { |
66 | struct spu_context *ctx; | 70 | struct spu_context *ctx; |
67 | ctx = container_of(kref, struct spu_context, kref); | 71 | ctx = container_of(kref, struct spu_context, kref); |
68 | down_write(&ctx->state_sema); | 72 | mutex_lock(&ctx->state_mutex); |
69 | spu_deactivate(ctx); | 73 | spu_deactivate(ctx); |
70 | up_write(&ctx->state_sema); | 74 | mutex_unlock(&ctx->state_mutex); |
71 | spu_fini_csa(&ctx->csa); | 75 | spu_fini_csa(&ctx->csa); |
72 | if (ctx->gang) | 76 | if (ctx->gang) |
73 | spu_gang_remove_ctx(ctx->gang, ctx); | 77 | spu_gang_remove_ctx(ctx->gang, ctx); |
@@ -96,107 +100,102 @@ void spu_forget(struct spu_context *ctx) | |||
96 | spu_release(ctx); | 100 | spu_release(ctx); |
97 | } | 101 | } |
98 | 102 | ||
99 | void spu_acquire(struct spu_context *ctx) | ||
100 | { | ||
101 | down_read(&ctx->state_sema); | ||
102 | } | ||
103 | |||
104 | void spu_release(struct spu_context *ctx) | ||
105 | { | ||
106 | up_read(&ctx->state_sema); | ||
107 | } | ||
108 | |||
109 | void spu_unmap_mappings(struct spu_context *ctx) | 103 | void spu_unmap_mappings(struct spu_context *ctx) |
110 | { | 104 | { |
111 | if (ctx->local_store) | 105 | if (ctx->local_store) |
112 | unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1); | 106 | unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1); |
113 | if (ctx->mfc) | 107 | if (ctx->mfc) |
114 | unmap_mapping_range(ctx->mfc, 0, 0x4000, 1); | 108 | unmap_mapping_range(ctx->mfc, 0, 0x1000, 1); |
115 | if (ctx->cntl) | 109 | if (ctx->cntl) |
116 | unmap_mapping_range(ctx->cntl, 0, 0x4000, 1); | 110 | unmap_mapping_range(ctx->cntl, 0, 0x1000, 1); |
117 | if (ctx->signal1) | 111 | if (ctx->signal1) |
118 | unmap_mapping_range(ctx->signal1, 0, 0x4000, 1); | 112 | unmap_mapping_range(ctx->signal1, 0, PAGE_SIZE, 1); |
119 | if (ctx->signal2) | 113 | if (ctx->signal2) |
120 | unmap_mapping_range(ctx->signal2, 0, 0x4000, 1); | 114 | unmap_mapping_range(ctx->signal2, 0, PAGE_SIZE, 1); |
115 | if (ctx->mss) | ||
116 | unmap_mapping_range(ctx->mss, 0, 0x1000, 1); | ||
117 | if (ctx->psmap) | ||
118 | unmap_mapping_range(ctx->psmap, 0, 0x20000, 1); | ||
121 | } | 119 | } |
122 | 120 | ||
121 | /** | ||
122 | * spu_acquire_exclusive - lock spu contex and protect against userspace access | ||
123 | * @ctx: spu contex to lock | ||
124 | * | ||
125 | * Note: | ||
126 | * Returns 0 and with the context locked on success | ||
127 | * Returns negative error and with the context _unlocked_ on failure. | ||
128 | */ | ||
123 | int spu_acquire_exclusive(struct spu_context *ctx) | 129 | int spu_acquire_exclusive(struct spu_context *ctx) |
124 | { | 130 | { |
125 | int ret = 0; | 131 | int ret = -EINVAL; |
126 | 132 | ||
127 | down_write(&ctx->state_sema); | 133 | spu_acquire(ctx); |
128 | /* ctx is about to be freed, can't acquire any more */ | 134 | /* |
129 | if (!ctx->owner) { | 135 | * Context is about to be freed, so we can't acquire it anymore. |
130 | ret = -EINVAL; | 136 | */ |
131 | goto out; | 137 | if (!ctx->owner) |
132 | } | 138 | goto out_unlock; |
133 | 139 | ||
134 | if (ctx->state == SPU_STATE_SAVED) { | 140 | if (ctx->state == SPU_STATE_SAVED) { |
135 | ret = spu_activate(ctx, 0); | 141 | ret = spu_activate(ctx, 0); |
136 | if (ret) | 142 | if (ret) |
137 | goto out; | 143 | goto out_unlock; |
138 | ctx->state = SPU_STATE_RUNNABLE; | ||
139 | } else { | 144 | } else { |
140 | /* We need to exclude userspace access to the context. */ | 145 | /* |
146 | * We need to exclude userspace access to the context. | ||
147 | * | ||
148 | * To protect against memory access we invalidate all ptes | ||
149 | * and make sure the pagefault handlers block on the mutex. | ||
150 | */ | ||
141 | spu_unmap_mappings(ctx); | 151 | spu_unmap_mappings(ctx); |
142 | } | 152 | } |
143 | 153 | ||
144 | out: | 154 | return 0; |
145 | if (ret) | 155 | |
146 | up_write(&ctx->state_sema); | 156 | out_unlock: |
157 | spu_release(ctx); | ||
147 | return ret; | 158 | return ret; |
148 | } | 159 | } |
149 | 160 | ||
150 | int spu_acquire_runnable(struct spu_context *ctx) | 161 | /** |
162 | * spu_acquire_runnable - lock spu contex and make sure it is in runnable state | ||
163 | * @ctx: spu contex to lock | ||
164 | * | ||
165 | * Note: | ||
166 | * Returns 0 and with the context locked on success | ||
167 | * Returns negative error and with the context _unlocked_ on failure. | ||
168 | */ | ||
169 | int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags) | ||
151 | { | 170 | { |
152 | int ret = 0; | 171 | int ret = -EINVAL; |
153 | |||
154 | down_read(&ctx->state_sema); | ||
155 | if (ctx->state == SPU_STATE_RUNNABLE) { | ||
156 | ctx->spu->prio = current->prio; | ||
157 | return 0; | ||
158 | } | ||
159 | up_read(&ctx->state_sema); | ||
160 | |||
161 | down_write(&ctx->state_sema); | ||
162 | /* ctx is about to be freed, can't acquire any more */ | ||
163 | if (!ctx->owner) { | ||
164 | ret = -EINVAL; | ||
165 | goto out; | ||
166 | } | ||
167 | 172 | ||
173 | spu_acquire(ctx); | ||
168 | if (ctx->state == SPU_STATE_SAVED) { | 174 | if (ctx->state == SPU_STATE_SAVED) { |
169 | ret = spu_activate(ctx, 0); | 175 | /* |
176 | * Context is about to be freed, so we can't acquire it anymore. | ||
177 | */ | ||
178 | if (!ctx->owner) | ||
179 | goto out_unlock; | ||
180 | ret = spu_activate(ctx, flags); | ||
170 | if (ret) | 181 | if (ret) |
171 | goto out; | 182 | goto out_unlock; |
172 | ctx->state = SPU_STATE_RUNNABLE; | ||
173 | } | 183 | } |
174 | 184 | ||
175 | downgrade_write(&ctx->state_sema); | 185 | return 0; |
176 | /* On success, we return holding the lock */ | ||
177 | |||
178 | return ret; | ||
179 | out: | ||
180 | /* Release here, to simplify calling code. */ | ||
181 | up_write(&ctx->state_sema); | ||
182 | 186 | ||
187 | out_unlock: | ||
188 | spu_release(ctx); | ||
183 | return ret; | 189 | return ret; |
184 | } | 190 | } |
185 | 191 | ||
192 | /** | ||
193 | * spu_acquire_saved - lock spu contex and make sure it is in saved state | ||
194 | * @ctx: spu contex to lock | ||
195 | */ | ||
186 | void spu_acquire_saved(struct spu_context *ctx) | 196 | void spu_acquire_saved(struct spu_context *ctx) |
187 | { | 197 | { |
188 | down_read(&ctx->state_sema); | 198 | spu_acquire(ctx); |
189 | 199 | if (ctx->state != SPU_STATE_SAVED) | |
190 | if (ctx->state == SPU_STATE_SAVED) | ||
191 | return; | ||
192 | |||
193 | up_read(&ctx->state_sema); | ||
194 | down_write(&ctx->state_sema); | ||
195 | |||
196 | if (ctx->state == SPU_STATE_RUNNABLE) { | ||
197 | spu_deactivate(ctx); | 200 | spu_deactivate(ctx); |
198 | ctx->state = SPU_STATE_SAVED; | ||
199 | } | ||
200 | |||
201 | downgrade_write(&ctx->state_sema); | ||
202 | } | 201 | } |
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c index af9e9455a706..b00653d69c01 100644 --- a/arch/powerpc/platforms/cell/spufs/file.c +++ b/arch/powerpc/platforms/cell/spufs/file.c | |||
@@ -45,8 +45,8 @@ spufs_mem_open(struct inode *inode, struct file *file) | |||
45 | struct spufs_inode_info *i = SPUFS_I(inode); | 45 | struct spufs_inode_info *i = SPUFS_I(inode); |
46 | struct spu_context *ctx = i->i_ctx; | 46 | struct spu_context *ctx = i->i_ctx; |
47 | file->private_data = ctx; | 47 | file->private_data = ctx; |
48 | file->f_mapping = inode->i_mapping; | ||
49 | ctx->local_store = inode->i_mapping; | 48 | ctx->local_store = inode->i_mapping; |
49 | smp_wmb(); | ||
50 | return 0; | 50 | return 0; |
51 | } | 51 | } |
52 | 52 | ||
@@ -95,39 +95,38 @@ spufs_mem_write(struct file *file, const char __user *buffer, | |||
95 | return ret; | 95 | return ret; |
96 | } | 96 | } |
97 | 97 | ||
98 | static struct page * | 98 | static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma, |
99 | spufs_mem_mmap_nopage(struct vm_area_struct *vma, | 99 | unsigned long address) |
100 | unsigned long address, int *type) | ||
101 | { | 100 | { |
102 | struct page *page = NOPAGE_SIGBUS; | ||
103 | |||
104 | struct spu_context *ctx = vma->vm_file->private_data; | 101 | struct spu_context *ctx = vma->vm_file->private_data; |
105 | unsigned long offset = address - vma->vm_start; | 102 | unsigned long pfn, offset = address - vma->vm_start; |
103 | |||
106 | offset += vma->vm_pgoff << PAGE_SHIFT; | 104 | offset += vma->vm_pgoff << PAGE_SHIFT; |
107 | 105 | ||
106 | if (offset >= LS_SIZE) | ||
107 | return NOPFN_SIGBUS; | ||
108 | |||
108 | spu_acquire(ctx); | 109 | spu_acquire(ctx); |
109 | 110 | ||
110 | if (ctx->state == SPU_STATE_SAVED) { | 111 | if (ctx->state == SPU_STATE_SAVED) { |
111 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 112 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
112 | & ~_PAGE_NO_CACHE); | 113 | & ~_PAGE_NO_CACHE); |
113 | page = vmalloc_to_page(ctx->csa.lscsa->ls + offset); | 114 | pfn = vmalloc_to_pfn(ctx->csa.lscsa->ls + offset); |
114 | } else { | 115 | } else { |
115 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 116 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
116 | | _PAGE_NO_CACHE); | 117 | | _PAGE_NO_CACHE); |
117 | page = pfn_to_page((ctx->spu->local_store_phys + offset) | 118 | pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT; |
118 | >> PAGE_SHIFT); | ||
119 | } | 119 | } |
120 | spu_release(ctx); | 120 | vm_insert_pfn(vma, address, pfn); |
121 | 121 | ||
122 | if (type) | 122 | spu_release(ctx); |
123 | *type = VM_FAULT_MINOR; | ||
124 | 123 | ||
125 | page_cache_get(page); | 124 | return NOPFN_REFAULT; |
126 | return page; | ||
127 | } | 125 | } |
128 | 126 | ||
127 | |||
129 | static struct vm_operations_struct spufs_mem_mmap_vmops = { | 128 | static struct vm_operations_struct spufs_mem_mmap_vmops = { |
130 | .nopage = spufs_mem_mmap_nopage, | 129 | .nopfn = spufs_mem_mmap_nopfn, |
131 | }; | 130 | }; |
132 | 131 | ||
133 | static int | 132 | static int |
@@ -136,7 +135,7 @@ spufs_mem_mmap(struct file *file, struct vm_area_struct *vma) | |||
136 | if (!(vma->vm_flags & VM_SHARED)) | 135 | if (!(vma->vm_flags & VM_SHARED)) |
137 | return -EINVAL; | 136 | return -EINVAL; |
138 | 137 | ||
139 | vma->vm_flags |= VM_IO; | 138 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
140 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 139 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
141 | | _PAGE_NO_CACHE); | 140 | | _PAGE_NO_CACHE); |
142 | 141 | ||
@@ -152,49 +151,42 @@ static const struct file_operations spufs_mem_fops = { | |||
152 | .mmap = spufs_mem_mmap, | 151 | .mmap = spufs_mem_mmap, |
153 | }; | 152 | }; |
154 | 153 | ||
155 | static struct page *spufs_ps_nopage(struct vm_area_struct *vma, | 154 | static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma, |
156 | unsigned long address, | 155 | unsigned long address, |
157 | int *type, unsigned long ps_offs, | 156 | unsigned long ps_offs, |
158 | unsigned long ps_size) | 157 | unsigned long ps_size) |
159 | { | 158 | { |
160 | struct page *page = NOPAGE_SIGBUS; | ||
161 | int fault_type = VM_FAULT_SIGBUS; | ||
162 | struct spu_context *ctx = vma->vm_file->private_data; | 159 | struct spu_context *ctx = vma->vm_file->private_data; |
163 | unsigned long offset = address - vma->vm_start; | 160 | unsigned long area, offset = address - vma->vm_start; |
164 | unsigned long area; | ||
165 | int ret; | 161 | int ret; |
166 | 162 | ||
167 | offset += vma->vm_pgoff << PAGE_SHIFT; | 163 | offset += vma->vm_pgoff << PAGE_SHIFT; |
168 | if (offset >= ps_size) | 164 | if (offset >= ps_size) |
169 | goto out; | 165 | return NOPFN_SIGBUS; |
170 | 166 | ||
171 | ret = spu_acquire_runnable(ctx); | 167 | /* error here usually means a signal.. we might want to test |
168 | * the error code more precisely though | ||
169 | */ | ||
170 | ret = spu_acquire_runnable(ctx, 0); | ||
172 | if (ret) | 171 | if (ret) |
173 | goto out; | 172 | return NOPFN_REFAULT; |
174 | 173 | ||
175 | area = ctx->spu->problem_phys + ps_offs; | 174 | area = ctx->spu->problem_phys + ps_offs; |
176 | page = pfn_to_page((area + offset) >> PAGE_SHIFT); | 175 | vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT); |
177 | fault_type = VM_FAULT_MINOR; | ||
178 | page_cache_get(page); | ||
179 | |||
180 | spu_release(ctx); | 176 | spu_release(ctx); |
181 | 177 | ||
182 | out: | 178 | return NOPFN_REFAULT; |
183 | if (type) | ||
184 | *type = fault_type; | ||
185 | |||
186 | return page; | ||
187 | } | 179 | } |
188 | 180 | ||
189 | #if SPUFS_MMAP_4K | 181 | #if SPUFS_MMAP_4K |
190 | static struct page *spufs_cntl_mmap_nopage(struct vm_area_struct *vma, | 182 | static unsigned long spufs_cntl_mmap_nopfn(struct vm_area_struct *vma, |
191 | unsigned long address, int *type) | 183 | unsigned long address) |
192 | { | 184 | { |
193 | return spufs_ps_nopage(vma, address, type, 0x4000, 0x1000); | 185 | return spufs_ps_nopfn(vma, address, 0x4000, 0x1000); |
194 | } | 186 | } |
195 | 187 | ||
196 | static struct vm_operations_struct spufs_cntl_mmap_vmops = { | 188 | static struct vm_operations_struct spufs_cntl_mmap_vmops = { |
197 | .nopage = spufs_cntl_mmap_nopage, | 189 | .nopfn = spufs_cntl_mmap_nopfn, |
198 | }; | 190 | }; |
199 | 191 | ||
200 | /* | 192 | /* |
@@ -205,7 +197,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma) | |||
205 | if (!(vma->vm_flags & VM_SHARED)) | 197 | if (!(vma->vm_flags & VM_SHARED)) |
206 | return -EINVAL; | 198 | return -EINVAL; |
207 | 199 | ||
208 | vma->vm_flags |= VM_IO; | 200 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
209 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 201 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
210 | | _PAGE_NO_CACHE | _PAGE_GUARDED); | 202 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
211 | 203 | ||
@@ -243,8 +235,8 @@ static int spufs_cntl_open(struct inode *inode, struct file *file) | |||
243 | struct spu_context *ctx = i->i_ctx; | 235 | struct spu_context *ctx = i->i_ctx; |
244 | 236 | ||
245 | file->private_data = ctx; | 237 | file->private_data = ctx; |
246 | file->f_mapping = inode->i_mapping; | ||
247 | ctx->cntl = inode->i_mapping; | 238 | ctx->cntl = inode->i_mapping; |
239 | smp_wmb(); | ||
248 | return simple_attr_open(inode, file, spufs_cntl_get, | 240 | return simple_attr_open(inode, file, spufs_cntl_get, |
249 | spufs_cntl_set, "0x%08lx"); | 241 | spufs_cntl_set, "0x%08lx"); |
250 | } | 242 | } |
@@ -728,8 +720,8 @@ static int spufs_signal1_open(struct inode *inode, struct file *file) | |||
728 | struct spufs_inode_info *i = SPUFS_I(inode); | 720 | struct spufs_inode_info *i = SPUFS_I(inode); |
729 | struct spu_context *ctx = i->i_ctx; | 721 | struct spu_context *ctx = i->i_ctx; |
730 | file->private_data = ctx; | 722 | file->private_data = ctx; |
731 | file->f_mapping = inode->i_mapping; | ||
732 | ctx->signal1 = inode->i_mapping; | 723 | ctx->signal1 = inode->i_mapping; |
724 | smp_wmb(); | ||
733 | return nonseekable_open(inode, file); | 725 | return nonseekable_open(inode, file); |
734 | } | 726 | } |
735 | 727 | ||
@@ -791,23 +783,23 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf, | |||
791 | return 4; | 783 | return 4; |
792 | } | 784 | } |
793 | 785 | ||
794 | static struct page *spufs_signal1_mmap_nopage(struct vm_area_struct *vma, | 786 | static unsigned long spufs_signal1_mmap_nopfn(struct vm_area_struct *vma, |
795 | unsigned long address, int *type) | 787 | unsigned long address) |
796 | { | 788 | { |
797 | #if PAGE_SIZE == 0x1000 | 789 | #if PAGE_SIZE == 0x1000 |
798 | return spufs_ps_nopage(vma, address, type, 0x14000, 0x1000); | 790 | return spufs_ps_nopfn(vma, address, 0x14000, 0x1000); |
799 | #elif PAGE_SIZE == 0x10000 | 791 | #elif PAGE_SIZE == 0x10000 |
800 | /* For 64k pages, both signal1 and signal2 can be used to mmap the whole | 792 | /* For 64k pages, both signal1 and signal2 can be used to mmap the whole |
801 | * signal 1 and 2 area | 793 | * signal 1 and 2 area |
802 | */ | 794 | */ |
803 | return spufs_ps_nopage(vma, address, type, 0x10000, 0x10000); | 795 | return spufs_ps_nopfn(vma, address, 0x10000, 0x10000); |
804 | #else | 796 | #else |
805 | #error unsupported page size | 797 | #error unsupported page size |
806 | #endif | 798 | #endif |
807 | } | 799 | } |
808 | 800 | ||
809 | static struct vm_operations_struct spufs_signal1_mmap_vmops = { | 801 | static struct vm_operations_struct spufs_signal1_mmap_vmops = { |
810 | .nopage = spufs_signal1_mmap_nopage, | 802 | .nopfn = spufs_signal1_mmap_nopfn, |
811 | }; | 803 | }; |
812 | 804 | ||
813 | static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma) | 805 | static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma) |
@@ -815,7 +807,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma) | |||
815 | if (!(vma->vm_flags & VM_SHARED)) | 807 | if (!(vma->vm_flags & VM_SHARED)) |
816 | return -EINVAL; | 808 | return -EINVAL; |
817 | 809 | ||
818 | vma->vm_flags |= VM_IO; | 810 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
819 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 811 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
820 | | _PAGE_NO_CACHE | _PAGE_GUARDED); | 812 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
821 | 813 | ||
@@ -835,8 +827,8 @@ static int spufs_signal2_open(struct inode *inode, struct file *file) | |||
835 | struct spufs_inode_info *i = SPUFS_I(inode); | 827 | struct spufs_inode_info *i = SPUFS_I(inode); |
836 | struct spu_context *ctx = i->i_ctx; | 828 | struct spu_context *ctx = i->i_ctx; |
837 | file->private_data = ctx; | 829 | file->private_data = ctx; |
838 | file->f_mapping = inode->i_mapping; | ||
839 | ctx->signal2 = inode->i_mapping; | 830 | ctx->signal2 = inode->i_mapping; |
831 | smp_wmb(); | ||
840 | return nonseekable_open(inode, file); | 832 | return nonseekable_open(inode, file); |
841 | } | 833 | } |
842 | 834 | ||
@@ -899,23 +891,23 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf, | |||
899 | } | 891 | } |
900 | 892 | ||
901 | #if SPUFS_MMAP_4K | 893 | #if SPUFS_MMAP_4K |
902 | static struct page *spufs_signal2_mmap_nopage(struct vm_area_struct *vma, | 894 | static unsigned long spufs_signal2_mmap_nopfn(struct vm_area_struct *vma, |
903 | unsigned long address, int *type) | 895 | unsigned long address) |
904 | { | 896 | { |
905 | #if PAGE_SIZE == 0x1000 | 897 | #if PAGE_SIZE == 0x1000 |
906 | return spufs_ps_nopage(vma, address, type, 0x1c000, 0x1000); | 898 | return spufs_ps_nopfn(vma, address, 0x1c000, 0x1000); |
907 | #elif PAGE_SIZE == 0x10000 | 899 | #elif PAGE_SIZE == 0x10000 |
908 | /* For 64k pages, both signal1 and signal2 can be used to mmap the whole | 900 | /* For 64k pages, both signal1 and signal2 can be used to mmap the whole |
909 | * signal 1 and 2 area | 901 | * signal 1 and 2 area |
910 | */ | 902 | */ |
911 | return spufs_ps_nopage(vma, address, type, 0x10000, 0x10000); | 903 | return spufs_ps_nopfn(vma, address, 0x10000, 0x10000); |
912 | #else | 904 | #else |
913 | #error unsupported page size | 905 | #error unsupported page size |
914 | #endif | 906 | #endif |
915 | } | 907 | } |
916 | 908 | ||
917 | static struct vm_operations_struct spufs_signal2_mmap_vmops = { | 909 | static struct vm_operations_struct spufs_signal2_mmap_vmops = { |
918 | .nopage = spufs_signal2_mmap_nopage, | 910 | .nopfn = spufs_signal2_mmap_nopfn, |
919 | }; | 911 | }; |
920 | 912 | ||
921 | static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma) | 913 | static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma) |
@@ -923,7 +915,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma) | |||
923 | if (!(vma->vm_flags & VM_SHARED)) | 915 | if (!(vma->vm_flags & VM_SHARED)) |
924 | return -EINVAL; | 916 | return -EINVAL; |
925 | 917 | ||
926 | vma->vm_flags |= VM_IO; | 918 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
927 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 919 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
928 | | _PAGE_NO_CACHE | _PAGE_GUARDED); | 920 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
929 | 921 | ||
@@ -1000,14 +992,14 @@ DEFINE_SIMPLE_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get, | |||
1000 | spufs_signal2_type_set, "%llu"); | 992 | spufs_signal2_type_set, "%llu"); |
1001 | 993 | ||
1002 | #if SPUFS_MMAP_4K | 994 | #if SPUFS_MMAP_4K |
1003 | static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma, | 995 | static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma, |
1004 | unsigned long address, int *type) | 996 | unsigned long address) |
1005 | { | 997 | { |
1006 | return spufs_ps_nopage(vma, address, type, 0x0000, 0x1000); | 998 | return spufs_ps_nopfn(vma, address, 0x0000, 0x1000); |
1007 | } | 999 | } |
1008 | 1000 | ||
1009 | static struct vm_operations_struct spufs_mss_mmap_vmops = { | 1001 | static struct vm_operations_struct spufs_mss_mmap_vmops = { |
1010 | .nopage = spufs_mss_mmap_nopage, | 1002 | .nopfn = spufs_mss_mmap_nopfn, |
1011 | }; | 1003 | }; |
1012 | 1004 | ||
1013 | /* | 1005 | /* |
@@ -1018,7 +1010,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma) | |||
1018 | if (!(vma->vm_flags & VM_SHARED)) | 1010 | if (!(vma->vm_flags & VM_SHARED)) |
1019 | return -EINVAL; | 1011 | return -EINVAL; |
1020 | 1012 | ||
1021 | vma->vm_flags |= VM_IO; | 1013 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
1022 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 1014 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
1023 | | _PAGE_NO_CACHE | _PAGE_GUARDED); | 1015 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
1024 | 1016 | ||
@@ -1032,8 +1024,11 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma) | |||
1032 | static int spufs_mss_open(struct inode *inode, struct file *file) | 1024 | static int spufs_mss_open(struct inode *inode, struct file *file) |
1033 | { | 1025 | { |
1034 | struct spufs_inode_info *i = SPUFS_I(inode); | 1026 | struct spufs_inode_info *i = SPUFS_I(inode); |
1027 | struct spu_context *ctx = i->i_ctx; | ||
1035 | 1028 | ||
1036 | file->private_data = i->i_ctx; | 1029 | file->private_data = i->i_ctx; |
1030 | ctx->mss = inode->i_mapping; | ||
1031 | smp_wmb(); | ||
1037 | return nonseekable_open(inode, file); | 1032 | return nonseekable_open(inode, file); |
1038 | } | 1033 | } |
1039 | 1034 | ||
@@ -1042,14 +1037,14 @@ static const struct file_operations spufs_mss_fops = { | |||
1042 | .mmap = spufs_mss_mmap, | 1037 | .mmap = spufs_mss_mmap, |
1043 | }; | 1038 | }; |
1044 | 1039 | ||
1045 | static struct page *spufs_psmap_mmap_nopage(struct vm_area_struct *vma, | 1040 | static unsigned long spufs_psmap_mmap_nopfn(struct vm_area_struct *vma, |
1046 | unsigned long address, int *type) | 1041 | unsigned long address) |
1047 | { | 1042 | { |
1048 | return spufs_ps_nopage(vma, address, type, 0x0000, 0x20000); | 1043 | return spufs_ps_nopfn(vma, address, 0x0000, 0x20000); |
1049 | } | 1044 | } |
1050 | 1045 | ||
1051 | static struct vm_operations_struct spufs_psmap_mmap_vmops = { | 1046 | static struct vm_operations_struct spufs_psmap_mmap_vmops = { |
1052 | .nopage = spufs_psmap_mmap_nopage, | 1047 | .nopfn = spufs_psmap_mmap_nopfn, |
1053 | }; | 1048 | }; |
1054 | 1049 | ||
1055 | /* | 1050 | /* |
@@ -1060,7 +1055,7 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma) | |||
1060 | if (!(vma->vm_flags & VM_SHARED)) | 1055 | if (!(vma->vm_flags & VM_SHARED)) |
1061 | return -EINVAL; | 1056 | return -EINVAL; |
1062 | 1057 | ||
1063 | vma->vm_flags |= VM_IO; | 1058 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
1064 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 1059 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
1065 | | _PAGE_NO_CACHE | _PAGE_GUARDED); | 1060 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
1066 | 1061 | ||
@@ -1071,8 +1066,11 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma) | |||
1071 | static int spufs_psmap_open(struct inode *inode, struct file *file) | 1066 | static int spufs_psmap_open(struct inode *inode, struct file *file) |
1072 | { | 1067 | { |
1073 | struct spufs_inode_info *i = SPUFS_I(inode); | 1068 | struct spufs_inode_info *i = SPUFS_I(inode); |
1069 | struct spu_context *ctx = i->i_ctx; | ||
1074 | 1070 | ||
1075 | file->private_data = i->i_ctx; | 1071 | file->private_data = i->i_ctx; |
1072 | ctx->psmap = inode->i_mapping; | ||
1073 | smp_wmb(); | ||
1076 | return nonseekable_open(inode, file); | 1074 | return nonseekable_open(inode, file); |
1077 | } | 1075 | } |
1078 | 1076 | ||
@@ -1083,14 +1081,14 @@ static const struct file_operations spufs_psmap_fops = { | |||
1083 | 1081 | ||
1084 | 1082 | ||
1085 | #if SPUFS_MMAP_4K | 1083 | #if SPUFS_MMAP_4K |
1086 | static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma, | 1084 | static unsigned long spufs_mfc_mmap_nopfn(struct vm_area_struct *vma, |
1087 | unsigned long address, int *type) | 1085 | unsigned long address) |
1088 | { | 1086 | { |
1089 | return spufs_ps_nopage(vma, address, type, 0x3000, 0x1000); | 1087 | return spufs_ps_nopfn(vma, address, 0x3000, 0x1000); |
1090 | } | 1088 | } |
1091 | 1089 | ||
1092 | static struct vm_operations_struct spufs_mfc_mmap_vmops = { | 1090 | static struct vm_operations_struct spufs_mfc_mmap_vmops = { |
1093 | .nopage = spufs_mfc_mmap_nopage, | 1091 | .nopfn = spufs_mfc_mmap_nopfn, |
1094 | }; | 1092 | }; |
1095 | 1093 | ||
1096 | /* | 1094 | /* |
@@ -1101,7 +1099,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma) | |||
1101 | if (!(vma->vm_flags & VM_SHARED)) | 1099 | if (!(vma->vm_flags & VM_SHARED)) |
1102 | return -EINVAL; | 1100 | return -EINVAL; |
1103 | 1101 | ||
1104 | vma->vm_flags |= VM_IO; | 1102 | vma->vm_flags |= VM_IO | VM_PFNMAP; |
1105 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) | 1103 | vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) |
1106 | | _PAGE_NO_CACHE | _PAGE_GUARDED); | 1104 | | _PAGE_NO_CACHE | _PAGE_GUARDED); |
1107 | 1105 | ||
@@ -1125,6 +1123,8 @@ static int spufs_mfc_open(struct inode *inode, struct file *file) | |||
1125 | return -EBUSY; | 1123 | return -EBUSY; |
1126 | 1124 | ||
1127 | file->private_data = ctx; | 1125 | file->private_data = ctx; |
1126 | ctx->mfc = inode->i_mapping; | ||
1127 | smp_wmb(); | ||
1128 | return nonseekable_open(inode, file); | 1128 | return nonseekable_open(inode, file); |
1129 | } | 1129 | } |
1130 | 1130 | ||
@@ -1309,7 +1309,7 @@ static ssize_t spufs_mfc_write(struct file *file, const char __user *buffer, | |||
1309 | if (ret) | 1309 | if (ret) |
1310 | goto out; | 1310 | goto out; |
1311 | 1311 | ||
1312 | spu_acquire_runnable(ctx); | 1312 | spu_acquire_runnable(ctx, 0); |
1313 | if (file->f_flags & O_NONBLOCK) { | 1313 | if (file->f_flags & O_NONBLOCK) { |
1314 | ret = ctx->ops->send_mfc_command(ctx, &cmd); | 1314 | ret = ctx->ops->send_mfc_command(ctx, &cmd); |
1315 | } else { | 1315 | } else { |
diff --git a/arch/powerpc/platforms/cell/spufs/run.c b/arch/powerpc/platforms/cell/spufs/run.c index 1acc2ffef8c8..353a8fa07ab8 100644 --- a/arch/powerpc/platforms/cell/spufs/run.c +++ b/arch/powerpc/platforms/cell/spufs/run.c | |||
@@ -133,7 +133,7 @@ out_drop_priv: | |||
133 | spu_mfc_sr1_set(ctx->spu, sr1); | 133 | spu_mfc_sr1_set(ctx->spu, sr1); |
134 | 134 | ||
135 | out_unlock: | 135 | out_unlock: |
136 | spu_release_exclusive(ctx); | 136 | spu_release(ctx); |
137 | out: | 137 | out: |
138 | return ret; | 138 | return ret; |
139 | } | 139 | } |
@@ -143,7 +143,7 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc) | |||
143 | int ret; | 143 | int ret; |
144 | unsigned long runcntl = SPU_RUNCNTL_RUNNABLE; | 144 | unsigned long runcntl = SPU_RUNCNTL_RUNNABLE; |
145 | 145 | ||
146 | ret = spu_acquire_runnable(ctx); | 146 | ret = spu_acquire_runnable(ctx, SPU_ACTIVATE_NOWAKE); |
147 | if (ret) | 147 | if (ret) |
148 | return ret; | 148 | return ret; |
149 | 149 | ||
@@ -155,7 +155,7 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc) | |||
155 | spu_release(ctx); | 155 | spu_release(ctx); |
156 | ret = spu_setup_isolated(ctx); | 156 | ret = spu_setup_isolated(ctx); |
157 | if (!ret) | 157 | if (!ret) |
158 | ret = spu_acquire_runnable(ctx); | 158 | ret = spu_acquire_runnable(ctx, SPU_ACTIVATE_NOWAKE); |
159 | } | 159 | } |
160 | 160 | ||
161 | /* if userspace has set the runcntrl register (eg, to issue an | 161 | /* if userspace has set the runcntrl register (eg, to issue an |
@@ -164,8 +164,10 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc) | |||
164 | (SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE); | 164 | (SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE); |
165 | if (runcntl == 0) | 165 | if (runcntl == 0) |
166 | runcntl = SPU_RUNCNTL_RUNNABLE; | 166 | runcntl = SPU_RUNCNTL_RUNNABLE; |
167 | } else | 167 | } else { |
168 | spu_start_tick(ctx); | ||
168 | ctx->ops->npc_write(ctx, *npc); | 169 | ctx->ops->npc_write(ctx, *npc); |
170 | } | ||
169 | 171 | ||
170 | ctx->ops->runcntl_write(ctx, runcntl); | 172 | ctx->ops->runcntl_write(ctx, runcntl); |
171 | return ret; | 173 | return ret; |
@@ -176,6 +178,7 @@ static inline int spu_run_fini(struct spu_context *ctx, u32 * npc, | |||
176 | { | 178 | { |
177 | int ret = 0; | 179 | int ret = 0; |
178 | 180 | ||
181 | spu_stop_tick(ctx); | ||
179 | *status = ctx->ops->status_read(ctx); | 182 | *status = ctx->ops->status_read(ctx); |
180 | *npc = ctx->ops->npc_read(ctx); | 183 | *npc = ctx->ops->npc_read(ctx); |
181 | spu_release(ctx); | 184 | spu_release(ctx); |
@@ -329,8 +332,10 @@ long spufs_run_spu(struct file *file, struct spu_context *ctx, | |||
329 | } | 332 | } |
330 | if (unlikely(ctx->state != SPU_STATE_RUNNABLE)) { | 333 | if (unlikely(ctx->state != SPU_STATE_RUNNABLE)) { |
331 | ret = spu_reacquire_runnable(ctx, npc, &status); | 334 | ret = spu_reacquire_runnable(ctx, npc, &status); |
332 | if (ret) | 335 | if (ret) { |
336 | spu_stop_tick(ctx); | ||
333 | goto out2; | 337 | goto out2; |
338 | } | ||
334 | continue; | 339 | continue; |
335 | } | 340 | } |
336 | ret = spu_process_events(ctx); | 341 | ret = spu_process_events(ctx); |
@@ -361,4 +366,3 @@ out: | |||
361 | up(&ctx->run_sema); | 366 | up(&ctx->run_sema); |
362 | return ret; | 367 | return ret; |
363 | } | 368 | } |
364 | |||
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c index bd6fe4b7a84b..2f25e68b4bac 100644 --- a/arch/powerpc/platforms/cell/spufs/sched.c +++ b/arch/powerpc/platforms/cell/spufs/sched.c | |||
@@ -44,17 +44,18 @@ | |||
44 | #include <asm/spu_priv1.h> | 44 | #include <asm/spu_priv1.h> |
45 | #include "spufs.h" | 45 | #include "spufs.h" |
46 | 46 | ||
47 | #define SPU_MIN_TIMESLICE (100 * HZ / 1000) | 47 | #define SPU_TIMESLICE (HZ) |
48 | 48 | ||
49 | #define SPU_BITMAP_SIZE (((MAX_PRIO+BITS_PER_LONG)/BITS_PER_LONG)+1) | ||
50 | struct spu_prio_array { | 49 | struct spu_prio_array { |
51 | unsigned long bitmap[SPU_BITMAP_SIZE]; | 50 | DECLARE_BITMAP(bitmap, MAX_PRIO); |
52 | wait_queue_head_t waitq[MAX_PRIO]; | 51 | struct list_head runq[MAX_PRIO]; |
52 | spinlock_t runq_lock; | ||
53 | struct list_head active_list[MAX_NUMNODES]; | 53 | struct list_head active_list[MAX_NUMNODES]; |
54 | struct mutex active_mutex[MAX_NUMNODES]; | 54 | struct mutex active_mutex[MAX_NUMNODES]; |
55 | }; | 55 | }; |
56 | 56 | ||
57 | static struct spu_prio_array *spu_prio; | 57 | static struct spu_prio_array *spu_prio; |
58 | static struct workqueue_struct *spu_sched_wq; | ||
58 | 59 | ||
59 | static inline int node_allowed(int node) | 60 | static inline int node_allowed(int node) |
60 | { | 61 | { |
@@ -68,6 +69,64 @@ static inline int node_allowed(int node) | |||
68 | return 1; | 69 | return 1; |
69 | } | 70 | } |
70 | 71 | ||
72 | void spu_start_tick(struct spu_context *ctx) | ||
73 | { | ||
74 | if (ctx->policy == SCHED_RR) | ||
75 | queue_delayed_work(spu_sched_wq, &ctx->sched_work, SPU_TIMESLICE); | ||
76 | } | ||
77 | |||
78 | void spu_stop_tick(struct spu_context *ctx) | ||
79 | { | ||
80 | if (ctx->policy == SCHED_RR) | ||
81 | cancel_delayed_work(&ctx->sched_work); | ||
82 | } | ||
83 | |||
84 | void spu_sched_tick(struct work_struct *work) | ||
85 | { | ||
86 | struct spu_context *ctx = | ||
87 | container_of(work, struct spu_context, sched_work.work); | ||
88 | struct spu *spu; | ||
89 | int rearm = 1; | ||
90 | |||
91 | mutex_lock(&ctx->state_mutex); | ||
92 | spu = ctx->spu; | ||
93 | if (spu) { | ||
94 | int best = sched_find_first_bit(spu_prio->bitmap); | ||
95 | if (best <= ctx->prio) { | ||
96 | spu_deactivate(ctx); | ||
97 | rearm = 0; | ||
98 | } | ||
99 | } | ||
100 | mutex_unlock(&ctx->state_mutex); | ||
101 | |||
102 | if (rearm) | ||
103 | spu_start_tick(ctx); | ||
104 | } | ||
105 | |||
106 | /** | ||
107 | * spu_add_to_active_list - add spu to active list | ||
108 | * @spu: spu to add to the active list | ||
109 | */ | ||
110 | static void spu_add_to_active_list(struct spu *spu) | ||
111 | { | ||
112 | mutex_lock(&spu_prio->active_mutex[spu->node]); | ||
113 | list_add_tail(&spu->list, &spu_prio->active_list[spu->node]); | ||
114 | mutex_unlock(&spu_prio->active_mutex[spu->node]); | ||
115 | } | ||
116 | |||
117 | /** | ||
118 | * spu_remove_from_active_list - remove spu from active list | ||
119 | * @spu: spu to remove from the active list | ||
120 | */ | ||
121 | static void spu_remove_from_active_list(struct spu *spu) | ||
122 | { | ||
123 | int node = spu->node; | ||
124 | |||
125 | mutex_lock(&spu_prio->active_mutex[node]); | ||
126 | list_del_init(&spu->list); | ||
127 | mutex_unlock(&spu_prio->active_mutex[node]); | ||
128 | } | ||
129 | |||
71 | static inline void mm_needs_global_tlbie(struct mm_struct *mm) | 130 | static inline void mm_needs_global_tlbie(struct mm_struct *mm) |
72 | { | 131 | { |
73 | int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; | 132 | int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1; |
@@ -94,8 +153,12 @@ int spu_switch_event_unregister(struct notifier_block * n) | |||
94 | return blocking_notifier_chain_unregister(&spu_switch_notifier, n); | 153 | return blocking_notifier_chain_unregister(&spu_switch_notifier, n); |
95 | } | 154 | } |
96 | 155 | ||
97 | 156 | /** | |
98 | static inline void bind_context(struct spu *spu, struct spu_context *ctx) | 157 | * spu_bind_context - bind spu context to physical spu |
158 | * @spu: physical spu to bind to | ||
159 | * @ctx: context to bind | ||
160 | */ | ||
161 | static void spu_bind_context(struct spu *spu, struct spu_context *ctx) | ||
99 | { | 162 | { |
100 | pr_debug("%s: pid=%d SPU=%d NODE=%d\n", __FUNCTION__, current->pid, | 163 | pr_debug("%s: pid=%d SPU=%d NODE=%d\n", __FUNCTION__, current->pid, |
101 | spu->number, spu->node); | 164 | spu->number, spu->node); |
@@ -104,7 +167,6 @@ static inline void bind_context(struct spu *spu, struct spu_context *ctx) | |||
104 | ctx->spu = spu; | 167 | ctx->spu = spu; |
105 | ctx->ops = &spu_hw_ops; | 168 | ctx->ops = &spu_hw_ops; |
106 | spu->pid = current->pid; | 169 | spu->pid = current->pid; |
107 | spu->prio = current->prio; | ||
108 | spu->mm = ctx->owner; | 170 | spu->mm = ctx->owner; |
109 | mm_needs_global_tlbie(spu->mm); | 171 | mm_needs_global_tlbie(spu->mm); |
110 | spu->ibox_callback = spufs_ibox_callback; | 172 | spu->ibox_callback = spufs_ibox_callback; |
@@ -118,12 +180,21 @@ static inline void bind_context(struct spu *spu, struct spu_context *ctx) | |||
118 | spu->timestamp = jiffies; | 180 | spu->timestamp = jiffies; |
119 | spu_cpu_affinity_set(spu, raw_smp_processor_id()); | 181 | spu_cpu_affinity_set(spu, raw_smp_processor_id()); |
120 | spu_switch_notify(spu, ctx); | 182 | spu_switch_notify(spu, ctx); |
183 | spu_add_to_active_list(spu); | ||
184 | ctx->state = SPU_STATE_RUNNABLE; | ||
121 | } | 185 | } |
122 | 186 | ||
123 | static inline void unbind_context(struct spu *spu, struct spu_context *ctx) | 187 | /** |
188 | * spu_unbind_context - unbind spu context from physical spu | ||
189 | * @spu: physical spu to unbind from | ||
190 | * @ctx: context to unbind | ||
191 | */ | ||
192 | static void spu_unbind_context(struct spu *spu, struct spu_context *ctx) | ||
124 | { | 193 | { |
125 | pr_debug("%s: unbind pid=%d SPU=%d NODE=%d\n", __FUNCTION__, | 194 | pr_debug("%s: unbind pid=%d SPU=%d NODE=%d\n", __FUNCTION__, |
126 | spu->pid, spu->number, spu->node); | 195 | spu->pid, spu->number, spu->node); |
196 | |||
197 | spu_remove_from_active_list(spu); | ||
127 | spu_switch_notify(spu, NULL); | 198 | spu_switch_notify(spu, NULL); |
128 | spu_unmap_mappings(ctx); | 199 | spu_unmap_mappings(ctx); |
129 | spu_save(&ctx->csa, spu); | 200 | spu_save(&ctx->csa, spu); |
@@ -136,95 +207,98 @@ static inline void unbind_context(struct spu *spu, struct spu_context *ctx) | |||
136 | spu->dma_callback = NULL; | 207 | spu->dma_callback = NULL; |
137 | spu->mm = NULL; | 208 | spu->mm = NULL; |
138 | spu->pid = 0; | 209 | spu->pid = 0; |
139 | spu->prio = MAX_PRIO; | ||
140 | ctx->ops = &spu_backing_ops; | 210 | ctx->ops = &spu_backing_ops; |
141 | ctx->spu = NULL; | 211 | ctx->spu = NULL; |
142 | spu->flags = 0; | 212 | spu->flags = 0; |
143 | spu->ctx = NULL; | 213 | spu->ctx = NULL; |
144 | } | 214 | } |
145 | 215 | ||
146 | static inline void spu_add_wq(wait_queue_head_t * wq, wait_queue_t * wait, | 216 | /** |
147 | int prio) | 217 | * spu_add_to_rq - add a context to the runqueue |
218 | * @ctx: context to add | ||
219 | */ | ||
220 | static void spu_add_to_rq(struct spu_context *ctx) | ||
148 | { | 221 | { |
149 | prepare_to_wait_exclusive(wq, wait, TASK_INTERRUPTIBLE); | 222 | spin_lock(&spu_prio->runq_lock); |
150 | set_bit(prio, spu_prio->bitmap); | 223 | list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]); |
224 | set_bit(ctx->prio, spu_prio->bitmap); | ||
225 | spin_unlock(&spu_prio->runq_lock); | ||
151 | } | 226 | } |
152 | 227 | ||
153 | static inline void spu_del_wq(wait_queue_head_t * wq, wait_queue_t * wait, | 228 | /** |
154 | int prio) | 229 | * spu_del_from_rq - remove a context from the runqueue |
230 | * @ctx: context to remove | ||
231 | */ | ||
232 | static void spu_del_from_rq(struct spu_context *ctx) | ||
155 | { | 233 | { |
156 | u64 flags; | 234 | spin_lock(&spu_prio->runq_lock); |
157 | 235 | list_del_init(&ctx->rq); | |
158 | __set_current_state(TASK_RUNNING); | 236 | if (list_empty(&spu_prio->runq[ctx->prio])) |
159 | 237 | clear_bit(ctx->prio, spu_prio->bitmap); | |
160 | spin_lock_irqsave(&wq->lock, flags); | 238 | spin_unlock(&spu_prio->runq_lock); |
239 | } | ||
161 | 240 | ||
162 | remove_wait_queue_locked(wq, wait); | 241 | /** |
163 | if (list_empty(&wq->task_list)) | 242 | * spu_grab_context - remove one context from the runqueue |
164 | clear_bit(prio, spu_prio->bitmap); | 243 | * @prio: priority of the context to be removed |
244 | * | ||
245 | * This function removes one context from the runqueue for priority @prio. | ||
246 | * If there is more than one context with the given priority the first | ||
247 | * task on the runqueue will be taken. | ||
248 | * | ||
249 | * Returns the spu_context it just removed. | ||
250 | * | ||
251 | * Must be called with spu_prio->runq_lock held. | ||
252 | */ | ||
253 | static struct spu_context *spu_grab_context(int prio) | ||
254 | { | ||
255 | struct list_head *rq = &spu_prio->runq[prio]; | ||
165 | 256 | ||
166 | spin_unlock_irqrestore(&wq->lock, flags); | 257 | if (list_empty(rq)) |
258 | return NULL; | ||
259 | return list_entry(rq->next, struct spu_context, rq); | ||
167 | } | 260 | } |
168 | 261 | ||
169 | static void spu_prio_wait(struct spu_context *ctx, u64 flags) | 262 | static void spu_prio_wait(struct spu_context *ctx) |
170 | { | 263 | { |
171 | int prio = current->prio; | ||
172 | wait_queue_head_t *wq = &spu_prio->waitq[prio]; | ||
173 | DEFINE_WAIT(wait); | 264 | DEFINE_WAIT(wait); |
174 | 265 | ||
175 | if (ctx->spu) | 266 | set_bit(SPU_SCHED_WAKE, &ctx->sched_flags); |
176 | return; | 267 | prepare_to_wait_exclusive(&ctx->stop_wq, &wait, TASK_INTERRUPTIBLE); |
177 | |||
178 | spu_add_wq(wq, &wait, prio); | ||
179 | |||
180 | if (!signal_pending(current)) { | 268 | if (!signal_pending(current)) { |
181 | up_write(&ctx->state_sema); | 269 | mutex_unlock(&ctx->state_mutex); |
182 | pr_debug("%s: pid=%d prio=%d\n", __FUNCTION__, | ||
183 | current->pid, current->prio); | ||
184 | schedule(); | 270 | schedule(); |
185 | down_write(&ctx->state_sema); | 271 | mutex_lock(&ctx->state_mutex); |
186 | } | 272 | } |
187 | 273 | __set_current_state(TASK_RUNNING); | |
188 | spu_del_wq(wq, &wait, prio); | 274 | remove_wait_queue(&ctx->stop_wq, &wait); |
275 | clear_bit(SPU_SCHED_WAKE, &ctx->sched_flags); | ||
189 | } | 276 | } |
190 | 277 | ||
191 | static void spu_prio_wakeup(void) | 278 | /** |
279 | * spu_reschedule - try to find a runnable context for a spu | ||
280 | * @spu: spu available | ||
281 | * | ||
282 | * This function is called whenever a spu becomes idle. It looks for the | ||
283 | * most suitable runnable spu context and schedules it for execution. | ||
284 | */ | ||
285 | static void spu_reschedule(struct spu *spu) | ||
192 | { | 286 | { |
193 | int best = sched_find_first_bit(spu_prio->bitmap); | 287 | int best; |
194 | if (best < MAX_PRIO) { | ||
195 | wait_queue_head_t *wq = &spu_prio->waitq[best]; | ||
196 | wake_up_interruptible_nr(wq, 1); | ||
197 | } | ||
198 | } | ||
199 | 288 | ||
200 | static int get_active_spu(struct spu *spu) | 289 | spu_free(spu); |
201 | { | ||
202 | int node = spu->node; | ||
203 | struct spu *tmp; | ||
204 | int rc = 0; | ||
205 | 290 | ||
206 | mutex_lock(&spu_prio->active_mutex[node]); | 291 | spin_lock(&spu_prio->runq_lock); |
207 | list_for_each_entry(tmp, &spu_prio->active_list[node], list) { | 292 | best = sched_find_first_bit(spu_prio->bitmap); |
208 | if (tmp == spu) { | 293 | if (best < MAX_PRIO) { |
209 | list_del_init(&spu->list); | 294 | struct spu_context *ctx = spu_grab_context(best); |
210 | rc = 1; | 295 | if (ctx && test_bit(SPU_SCHED_WAKE, &ctx->sched_flags)) |
211 | break; | 296 | wake_up(&ctx->stop_wq); |
212 | } | ||
213 | } | 297 | } |
214 | mutex_unlock(&spu_prio->active_mutex[node]); | 298 | spin_unlock(&spu_prio->runq_lock); |
215 | return rc; | ||
216 | } | ||
217 | |||
218 | static void put_active_spu(struct spu *spu) | ||
219 | { | ||
220 | int node = spu->node; | ||
221 | |||
222 | mutex_lock(&spu_prio->active_mutex[node]); | ||
223 | list_add_tail(&spu->list, &spu_prio->active_list[node]); | ||
224 | mutex_unlock(&spu_prio->active_mutex[node]); | ||
225 | } | 299 | } |
226 | 300 | ||
227 | static struct spu *spu_get_idle(struct spu_context *ctx, u64 flags) | 301 | static struct spu *spu_get_idle(struct spu_context *ctx) |
228 | { | 302 | { |
229 | struct spu *spu = NULL; | 303 | struct spu *spu = NULL; |
230 | int node = cpu_to_node(raw_smp_processor_id()); | 304 | int node = cpu_to_node(raw_smp_processor_id()); |
@@ -241,87 +315,154 @@ static struct spu *spu_get_idle(struct spu_context *ctx, u64 flags) | |||
241 | return spu; | 315 | return spu; |
242 | } | 316 | } |
243 | 317 | ||
244 | static inline struct spu *spu_get(struct spu_context *ctx, u64 flags) | 318 | /** |
319 | * find_victim - find a lower priority context to preempt | ||
320 | * @ctx: canidate context for running | ||
321 | * | ||
322 | * Returns the freed physical spu to run the new context on. | ||
323 | */ | ||
324 | static struct spu *find_victim(struct spu_context *ctx) | ||
245 | { | 325 | { |
246 | /* Future: spu_get_idle() if possible, | 326 | struct spu_context *victim = NULL; |
247 | * otherwise try to preempt an active | 327 | struct spu *spu; |
248 | * context. | 328 | int node, n; |
329 | |||
330 | /* | ||
331 | * Look for a possible preemption candidate on the local node first. | ||
332 | * If there is no candidate look at the other nodes. This isn't | ||
333 | * exactly fair, but so far the whole spu schedule tries to keep | ||
334 | * a strong node affinity. We might want to fine-tune this in | ||
335 | * the future. | ||
249 | */ | 336 | */ |
250 | return spu_get_idle(ctx, flags); | 337 | restart: |
338 | node = cpu_to_node(raw_smp_processor_id()); | ||
339 | for (n = 0; n < MAX_NUMNODES; n++, node++) { | ||
340 | node = (node < MAX_NUMNODES) ? node : 0; | ||
341 | if (!node_allowed(node)) | ||
342 | continue; | ||
343 | |||
344 | mutex_lock(&spu_prio->active_mutex[node]); | ||
345 | list_for_each_entry(spu, &spu_prio->active_list[node], list) { | ||
346 | struct spu_context *tmp = spu->ctx; | ||
347 | |||
348 | if (tmp->rt_priority < ctx->rt_priority && | ||
349 | (!victim || tmp->rt_priority < victim->rt_priority)) | ||
350 | victim = spu->ctx; | ||
351 | } | ||
352 | mutex_unlock(&spu_prio->active_mutex[node]); | ||
353 | |||
354 | if (victim) { | ||
355 | /* | ||
356 | * This nests ctx->state_mutex, but we always lock | ||
357 | * higher priority contexts before lower priority | ||
358 | * ones, so this is safe until we introduce | ||
359 | * priority inheritance schemes. | ||
360 | */ | ||
361 | if (!mutex_trylock(&victim->state_mutex)) { | ||
362 | victim = NULL; | ||
363 | goto restart; | ||
364 | } | ||
365 | |||
366 | spu = victim->spu; | ||
367 | if (!spu) { | ||
368 | /* | ||
369 | * This race can happen because we've dropped | ||
370 | * the active list mutex. No a problem, just | ||
371 | * restart the search. | ||
372 | */ | ||
373 | mutex_unlock(&victim->state_mutex); | ||
374 | victim = NULL; | ||
375 | goto restart; | ||
376 | } | ||
377 | spu_unbind_context(spu, victim); | ||
378 | mutex_unlock(&victim->state_mutex); | ||
379 | return spu; | ||
380 | } | ||
381 | } | ||
382 | |||
383 | return NULL; | ||
251 | } | 384 | } |
252 | 385 | ||
253 | /* The three externally callable interfaces | 386 | /** |
254 | * for the scheduler begin here. | 387 | * spu_activate - find a free spu for a context and execute it |
388 | * @ctx: spu context to schedule | ||
389 | * @flags: flags (currently ignored) | ||
255 | * | 390 | * |
256 | * spu_activate - bind a context to SPU, waiting as needed. | 391 | * Tries to find a free spu to run @ctx. If no free spu is availble |
257 | * spu_deactivate - unbind a context from its SPU. | 392 | * add the context to the runqueue so it gets woken up once an spu |
258 | * spu_yield - yield an SPU if others are waiting. | 393 | * is available. |
259 | */ | 394 | */ |
260 | 395 | int spu_activate(struct spu_context *ctx, unsigned long flags) | |
261 | int spu_activate(struct spu_context *ctx, u64 flags) | ||
262 | { | 396 | { |
263 | struct spu *spu; | ||
264 | int ret = 0; | ||
265 | 397 | ||
266 | for (;;) { | 398 | if (ctx->spu) |
267 | if (ctx->spu) | 399 | return 0; |
400 | |||
401 | do { | ||
402 | struct spu *spu; | ||
403 | |||
404 | spu = spu_get_idle(ctx); | ||
405 | /* | ||
406 | * If this is a realtime thread we try to get it running by | ||
407 | * preempting a lower priority thread. | ||
408 | */ | ||
409 | if (!spu && ctx->rt_priority) | ||
410 | spu = find_victim(ctx); | ||
411 | if (spu) { | ||
412 | spu_bind_context(spu, ctx); | ||
268 | return 0; | 413 | return 0; |
269 | spu = spu_get(ctx, flags); | ||
270 | if (spu != NULL) { | ||
271 | if (ctx->spu != NULL) { | ||
272 | spu_free(spu); | ||
273 | spu_prio_wakeup(); | ||
274 | break; | ||
275 | } | ||
276 | bind_context(spu, ctx); | ||
277 | put_active_spu(spu); | ||
278 | break; | ||
279 | } | 414 | } |
280 | spu_prio_wait(ctx, flags); | 415 | |
281 | if (signal_pending(current)) { | 416 | spu_add_to_rq(ctx); |
282 | ret = -ERESTARTSYS; | 417 | if (!(flags & SPU_ACTIVATE_NOWAKE)) |
283 | spu_prio_wakeup(); | 418 | spu_prio_wait(ctx); |
284 | break; | 419 | spu_del_from_rq(ctx); |
285 | } | 420 | } while (!signal_pending(current)); |
286 | } | 421 | |
287 | return ret; | 422 | return -ERESTARTSYS; |
288 | } | 423 | } |
289 | 424 | ||
425 | /** | ||
426 | * spu_deactivate - unbind a context from it's physical spu | ||
427 | * @ctx: spu context to unbind | ||
428 | * | ||
429 | * Unbind @ctx from the physical spu it is running on and schedule | ||
430 | * the highest priority context to run on the freed physical spu. | ||
431 | */ | ||
290 | void spu_deactivate(struct spu_context *ctx) | 432 | void spu_deactivate(struct spu_context *ctx) |
291 | { | 433 | { |
292 | struct spu *spu; | 434 | struct spu *spu = ctx->spu; |
293 | int needs_idle; | ||
294 | 435 | ||
295 | spu = ctx->spu; | 436 | if (spu) { |
296 | if (!spu) | 437 | spu_unbind_context(spu, ctx); |
297 | return; | 438 | spu_reschedule(spu); |
298 | needs_idle = get_active_spu(spu); | ||
299 | unbind_context(spu, ctx); | ||
300 | if (needs_idle) { | ||
301 | spu_free(spu); | ||
302 | spu_prio_wakeup(); | ||
303 | } | 439 | } |
304 | } | 440 | } |
305 | 441 | ||
442 | /** | ||
443 | * spu_yield - yield a physical spu if others are waiting | ||
444 | * @ctx: spu context to yield | ||
445 | * | ||
446 | * Check if there is a higher priority context waiting and if yes | ||
447 | * unbind @ctx from the physical spu and schedule the highest | ||
448 | * priority context to run on the freed physical spu instead. | ||
449 | */ | ||
306 | void spu_yield(struct spu_context *ctx) | 450 | void spu_yield(struct spu_context *ctx) |
307 | { | 451 | { |
308 | struct spu *spu; | 452 | struct spu *spu; |
309 | int need_yield = 0; | 453 | int need_yield = 0; |
310 | 454 | ||
311 | if (down_write_trylock(&ctx->state_sema)) { | 455 | if (mutex_trylock(&ctx->state_mutex)) { |
312 | if ((spu = ctx->spu) != NULL) { | 456 | if ((spu = ctx->spu) != NULL) { |
313 | int best = sched_find_first_bit(spu_prio->bitmap); | 457 | int best = sched_find_first_bit(spu_prio->bitmap); |
314 | if (best < MAX_PRIO) { | 458 | if (best < MAX_PRIO) { |
315 | pr_debug("%s: yielding SPU %d NODE %d\n", | 459 | pr_debug("%s: yielding SPU %d NODE %d\n", |
316 | __FUNCTION__, spu->number, spu->node); | 460 | __FUNCTION__, spu->number, spu->node); |
317 | spu_deactivate(ctx); | 461 | spu_deactivate(ctx); |
318 | ctx->state = SPU_STATE_SAVED; | ||
319 | need_yield = 1; | 462 | need_yield = 1; |
320 | } else { | ||
321 | spu->prio = MAX_PRIO; | ||
322 | } | 463 | } |
323 | } | 464 | } |
324 | up_write(&ctx->state_sema); | 465 | mutex_unlock(&ctx->state_mutex); |
325 | } | 466 | } |
326 | if (unlikely(need_yield)) | 467 | if (unlikely(need_yield)) |
327 | yield(); | 468 | yield(); |
@@ -331,14 +472,19 @@ int __init spu_sched_init(void) | |||
331 | { | 472 | { |
332 | int i; | 473 | int i; |
333 | 474 | ||
475 | spu_sched_wq = create_singlethread_workqueue("spusched"); | ||
476 | if (!spu_sched_wq) | ||
477 | return 1; | ||
478 | |||
334 | spu_prio = kzalloc(sizeof(struct spu_prio_array), GFP_KERNEL); | 479 | spu_prio = kzalloc(sizeof(struct spu_prio_array), GFP_KERNEL); |
335 | if (!spu_prio) { | 480 | if (!spu_prio) { |
336 | printk(KERN_WARNING "%s: Unable to allocate priority queue.\n", | 481 | printk(KERN_WARNING "%s: Unable to allocate priority queue.\n", |
337 | __FUNCTION__); | 482 | __FUNCTION__); |
483 | destroy_workqueue(spu_sched_wq); | ||
338 | return 1; | 484 | return 1; |
339 | } | 485 | } |
340 | for (i = 0; i < MAX_PRIO; i++) { | 486 | for (i = 0; i < MAX_PRIO; i++) { |
341 | init_waitqueue_head(&spu_prio->waitq[i]); | 487 | INIT_LIST_HEAD(&spu_prio->runq[i]); |
342 | __clear_bit(i, spu_prio->bitmap); | 488 | __clear_bit(i, spu_prio->bitmap); |
343 | } | 489 | } |
344 | __set_bit(MAX_PRIO, spu_prio->bitmap); | 490 | __set_bit(MAX_PRIO, spu_prio->bitmap); |
@@ -346,6 +492,7 @@ int __init spu_sched_init(void) | |||
346 | mutex_init(&spu_prio->active_mutex[i]); | 492 | mutex_init(&spu_prio->active_mutex[i]); |
347 | INIT_LIST_HEAD(&spu_prio->active_list[i]); | 493 | INIT_LIST_HEAD(&spu_prio->active_list[i]); |
348 | } | 494 | } |
495 | spin_lock_init(&spu_prio->runq_lock); | ||
349 | return 0; | 496 | return 0; |
350 | } | 497 | } |
351 | 498 | ||
@@ -364,4 +511,5 @@ void __exit spu_sched_exit(void) | |||
364 | mutex_unlock(&spu_prio->active_mutex[node]); | 511 | mutex_unlock(&spu_prio->active_mutex[node]); |
365 | } | 512 | } |
366 | kfree(spu_prio); | 513 | kfree(spu_prio); |
514 | destroy_workqueue(spu_sched_wq); | ||
367 | } | 515 | } |
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h index 56864469215e..0c437891dfd5 100644 --- a/arch/powerpc/platforms/cell/spufs/spufs.h +++ b/arch/powerpc/platforms/cell/spufs/spufs.h | |||
@@ -23,7 +23,7 @@ | |||
23 | #define SPUFS_H | 23 | #define SPUFS_H |
24 | 24 | ||
25 | #include <linux/kref.h> | 25 | #include <linux/kref.h> |
26 | #include <linux/rwsem.h> | 26 | #include <linux/mutex.h> |
27 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
28 | #include <linux/fs.h> | 28 | #include <linux/fs.h> |
29 | 29 | ||
@@ -37,11 +37,13 @@ enum { | |||
37 | }; | 37 | }; |
38 | 38 | ||
39 | struct spu_context_ops; | 39 | struct spu_context_ops; |
40 | |||
41 | #define SPU_CONTEXT_PREEMPT 0UL | ||
42 | |||
43 | struct spu_gang; | 40 | struct spu_gang; |
44 | 41 | ||
42 | /* ctx->sched_flags */ | ||
43 | enum { | ||
44 | SPU_SCHED_WAKE = 0, | ||
45 | }; | ||
46 | |||
45 | struct spu_context { | 47 | struct spu_context { |
46 | struct spu *spu; /* pointer to a physical SPU */ | 48 | struct spu *spu; /* pointer to a physical SPU */ |
47 | struct spu_state csa; /* SPU context save area. */ | 49 | struct spu_state csa; /* SPU context save area. */ |
@@ -51,10 +53,12 @@ struct spu_context { | |||
51 | struct address_space *cntl; /* 'control' area mappings. */ | 53 | struct address_space *cntl; /* 'control' area mappings. */ |
52 | struct address_space *signal1; /* 'signal1' area mappings. */ | 54 | struct address_space *signal1; /* 'signal1' area mappings. */ |
53 | struct address_space *signal2; /* 'signal2' area mappings. */ | 55 | struct address_space *signal2; /* 'signal2' area mappings. */ |
56 | struct address_space *mss; /* 'mss' area mappings. */ | ||
57 | struct address_space *psmap; /* 'psmap' area mappings. */ | ||
54 | u64 object_id; /* user space pointer for oprofile */ | 58 | u64 object_id; /* user space pointer for oprofile */ |
55 | 59 | ||
56 | enum { SPU_STATE_RUNNABLE, SPU_STATE_SAVED } state; | 60 | enum { SPU_STATE_RUNNABLE, SPU_STATE_SAVED } state; |
57 | struct rw_semaphore state_sema; | 61 | struct mutex state_mutex; |
58 | struct semaphore run_sema; | 62 | struct semaphore run_sema; |
59 | 63 | ||
60 | struct mm_struct *owner; | 64 | struct mm_struct *owner; |
@@ -75,6 +79,14 @@ struct spu_context { | |||
75 | 79 | ||
76 | struct list_head gang_list; | 80 | struct list_head gang_list; |
77 | struct spu_gang *gang; | 81 | struct spu_gang *gang; |
82 | |||
83 | /* scheduler fields */ | ||
84 | struct list_head rq; | ||
85 | struct delayed_work sched_work; | ||
86 | unsigned long sched_flags; | ||
87 | unsigned long rt_priority; | ||
88 | int policy; | ||
89 | int prio; | ||
78 | }; | 90 | }; |
79 | 91 | ||
80 | struct spu_gang { | 92 | struct spu_gang { |
@@ -159,6 +171,16 @@ void spu_gang_remove_ctx(struct spu_gang *gang, struct spu_context *ctx); | |||
159 | void spu_gang_add_ctx(struct spu_gang *gang, struct spu_context *ctx); | 171 | void spu_gang_add_ctx(struct spu_gang *gang, struct spu_context *ctx); |
160 | 172 | ||
161 | /* context management */ | 173 | /* context management */ |
174 | static inline void spu_acquire(struct spu_context *ctx) | ||
175 | { | ||
176 | mutex_lock(&ctx->state_mutex); | ||
177 | } | ||
178 | |||
179 | static inline void spu_release(struct spu_context *ctx) | ||
180 | { | ||
181 | mutex_unlock(&ctx->state_mutex); | ||
182 | } | ||
183 | |||
162 | struct spu_context * alloc_spu_context(struct spu_gang *gang); | 184 | struct spu_context * alloc_spu_context(struct spu_gang *gang); |
163 | void destroy_spu_context(struct kref *kref); | 185 | void destroy_spu_context(struct kref *kref); |
164 | struct spu_context * get_spu_context(struct spu_context *ctx); | 186 | struct spu_context * get_spu_context(struct spu_context *ctx); |
@@ -166,20 +188,18 @@ int put_spu_context(struct spu_context *ctx); | |||
166 | void spu_unmap_mappings(struct spu_context *ctx); | 188 | void spu_unmap_mappings(struct spu_context *ctx); |
167 | 189 | ||
168 | void spu_forget(struct spu_context *ctx); | 190 | void spu_forget(struct spu_context *ctx); |
169 | void spu_acquire(struct spu_context *ctx); | 191 | int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags); |
170 | void spu_release(struct spu_context *ctx); | ||
171 | int spu_acquire_runnable(struct spu_context *ctx); | ||
172 | void spu_acquire_saved(struct spu_context *ctx); | 192 | void spu_acquire_saved(struct spu_context *ctx); |
173 | int spu_acquire_exclusive(struct spu_context *ctx); | 193 | int spu_acquire_exclusive(struct spu_context *ctx); |
174 | 194 | enum { | |
175 | static inline void spu_release_exclusive(struct spu_context *ctx) | 195 | SPU_ACTIVATE_NOWAKE = 1, |
176 | { | 196 | }; |
177 | up_write(&ctx->state_sema); | 197 | int spu_activate(struct spu_context *ctx, unsigned long flags); |
178 | } | ||
179 | |||
180 | int spu_activate(struct spu_context *ctx, u64 flags); | ||
181 | void spu_deactivate(struct spu_context *ctx); | 198 | void spu_deactivate(struct spu_context *ctx); |
182 | void spu_yield(struct spu_context *ctx); | 199 | void spu_yield(struct spu_context *ctx); |
200 | void spu_start_tick(struct spu_context *ctx); | ||
201 | void spu_stop_tick(struct spu_context *ctx); | ||
202 | void spu_sched_tick(struct work_struct *work); | ||
183 | int __init spu_sched_init(void); | 203 | int __init spu_sched_init(void); |
184 | void __exit spu_sched_exit(void); | 204 | void __exit spu_sched_exit(void); |
185 | 205 | ||
diff --git a/arch/powerpc/platforms/celleb/htab.c b/arch/powerpc/platforms/celleb/htab.c index ffa7c2c2030d..279d7339e170 100644 --- a/arch/powerpc/platforms/celleb/htab.c +++ b/arch/powerpc/platforms/celleb/htab.c | |||
@@ -95,7 +95,6 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, | |||
95 | unsigned long lpar_rc; | 95 | unsigned long lpar_rc; |
96 | unsigned long slot; | 96 | unsigned long slot; |
97 | unsigned long hpte_v, hpte_r; | 97 | unsigned long hpte_v, hpte_r; |
98 | unsigned long flags; | ||
99 | 98 | ||
100 | /* same as iseries */ | 99 | /* same as iseries */ |
101 | if (vflags & HPTE_V_SECONDARY) | 100 | if (vflags & HPTE_V_SECONDARY) |
@@ -115,17 +114,17 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group, | |||
115 | if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) | 114 | if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) |
116 | hpte_r &= ~_PAGE_COHERENT; | 115 | hpte_r &= ~_PAGE_COHERENT; |
117 | 116 | ||
118 | spin_lock_irqsave(&beat_htab_lock, flags); | 117 | spin_lock(&beat_htab_lock); |
119 | if ((lpar_rc = beat_read_mask(hpte_group)) == 0) { | 118 | if ((lpar_rc = beat_read_mask(hpte_group)) == 0) { |
120 | if (!(vflags & HPTE_V_BOLTED)) | 119 | if (!(vflags & HPTE_V_BOLTED)) |
121 | DBG_LOW(" full\n"); | 120 | DBG_LOW(" full\n"); |
122 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 121 | spin_unlock(&beat_htab_lock); |
123 | return -1; | 122 | return -1; |
124 | } | 123 | } |
125 | 124 | ||
126 | lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, | 125 | lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48, |
127 | hpte_v, hpte_r, &slot); | 126 | hpte_v, hpte_r, &slot); |
128 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 127 | spin_unlock(&beat_htab_lock); |
129 | 128 | ||
130 | /* | 129 | /* |
131 | * Since we try and ioremap PHBs we don't own, the pte insert | 130 | * Since we try and ioremap PHBs we don't own, the pte insert |
@@ -189,7 +188,6 @@ static long beat_lpar_hpte_updatepp(unsigned long slot, | |||
189 | { | 188 | { |
190 | unsigned long lpar_rc; | 189 | unsigned long lpar_rc; |
191 | unsigned long dummy0, dummy1, want_v; | 190 | unsigned long dummy0, dummy1, want_v; |
192 | unsigned long flags; | ||
193 | 191 | ||
194 | want_v = hpte_encode_v(va, psize); | 192 | want_v = hpte_encode_v(va, psize); |
195 | 193 | ||
@@ -197,17 +195,17 @@ static long beat_lpar_hpte_updatepp(unsigned long slot, | |||
197 | "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", | 195 | "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ", |
198 | want_v & HPTE_V_AVPN, slot, psize, newpp); | 196 | want_v & HPTE_V_AVPN, slot, psize, newpp); |
199 | 197 | ||
200 | spin_lock_irqsave(&beat_htab_lock, flags); | 198 | spin_lock(&beat_htab_lock); |
201 | dummy0 = beat_lpar_hpte_getword0(slot); | 199 | dummy0 = beat_lpar_hpte_getword0(slot); |
202 | if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { | 200 | if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) { |
203 | DBG_LOW("not found !\n"); | 201 | DBG_LOW("not found !\n"); |
204 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 202 | spin_unlock(&beat_htab_lock); |
205 | return -1; | 203 | return -1; |
206 | } | 204 | } |
207 | 205 | ||
208 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, | 206 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0, |
209 | &dummy1); | 207 | &dummy1); |
210 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 208 | spin_unlock(&beat_htab_lock); |
211 | if (lpar_rc != 0 || dummy0 == 0) { | 209 | if (lpar_rc != 0 || dummy0 == 0) { |
212 | DBG_LOW("not found !\n"); | 210 | DBG_LOW("not found !\n"); |
213 | return -1; | 211 | return -1; |
@@ -256,18 +254,17 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp, | |||
256 | int psize) | 254 | int psize) |
257 | { | 255 | { |
258 | unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1; | 256 | unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1; |
259 | unsigned long flags; | ||
260 | 257 | ||
261 | vsid = get_kernel_vsid(ea); | 258 | vsid = get_kernel_vsid(ea); |
262 | va = (vsid << 28) | (ea & 0x0fffffff); | 259 | va = (vsid << 28) | (ea & 0x0fffffff); |
263 | 260 | ||
264 | spin_lock_irqsave(&beat_htab_lock, flags); | 261 | spin_lock(&beat_htab_lock); |
265 | slot = beat_lpar_hpte_find(va, psize); | 262 | slot = beat_lpar_hpte_find(va, psize); |
266 | BUG_ON(slot == -1); | 263 | BUG_ON(slot == -1); |
267 | 264 | ||
268 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, | 265 | lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, |
269 | &dummy0, &dummy1); | 266 | &dummy0, &dummy1); |
270 | spin_unlock_irqrestore(&beat_htab_lock, flags); | 267 | spin_unlock(&beat_htab_lock); |
271 | 268 | ||
272 | BUG_ON(lpar_rc != 0); | 269 | BUG_ON(lpar_rc != 0); |
273 | } | 270 | } |
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c index 61599d919ea8..3f6c4114f908 100644 --- a/arch/powerpc/platforms/embedded6xx/linkstation.c +++ b/arch/powerpc/platforms/embedded6xx/linkstation.c | |||
@@ -13,7 +13,6 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
15 | #include <linux/initrd.h> | 15 | #include <linux/initrd.h> |
16 | #include <linux/root_dev.h> | ||
17 | #include <linux/mtd/physmap.h> | 16 | #include <linux/mtd/physmap.h> |
18 | 17 | ||
19 | #include <asm/time.h> | 18 | #include <asm/time.h> |
@@ -91,17 +90,6 @@ static void __init linkstation_setup_arch(void) | |||
91 | ARRAY_SIZE(linkstation_physmap_partitions)); | 90 | ARRAY_SIZE(linkstation_physmap_partitions)); |
92 | #endif | 91 | #endif |
93 | 92 | ||
94 | #ifdef CONFIG_BLK_DEV_INITRD | ||
95 | if (initrd_start) | ||
96 | ROOT_DEV = Root_RAM0; | ||
97 | else | ||
98 | #endif | ||
99 | #ifdef CONFIG_ROOT_NFS | ||
100 | ROOT_DEV = Root_NFS; | ||
101 | #else | ||
102 | ROOT_DEV = Root_HDA1; | ||
103 | #endif | ||
104 | |||
105 | /* Lookup PCI host bridges */ | 93 | /* Lookup PCI host bridges */ |
106 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) | 94 | for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) |
107 | add_bridge(np); | 95 | add_bridge(np); |
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c index d1929721b0e4..a397e4e17c13 100644 --- a/arch/powerpc/platforms/ps3/spu.c +++ b/arch/powerpc/platforms/ps3/spu.c | |||
@@ -170,31 +170,6 @@ static int __init construct_spu(struct spu *spu) | |||
170 | return result; | 170 | return result; |
171 | } | 171 | } |
172 | 172 | ||
173 | static int __init add_spu_pages(unsigned long start_addr, unsigned long size) | ||
174 | { | ||
175 | int result; | ||
176 | unsigned long start_pfn; | ||
177 | unsigned long nr_pages; | ||
178 | struct pglist_data *pgdata; | ||
179 | struct zone *zone; | ||
180 | |||
181 | BUG_ON(!mem_init_done); | ||
182 | |||
183 | start_pfn = start_addr >> PAGE_SHIFT; | ||
184 | nr_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT; | ||
185 | |||
186 | pgdata = NODE_DATA(0); | ||
187 | zone = pgdata->node_zones; | ||
188 | |||
189 | result = __add_pages(zone, start_pfn, nr_pages); | ||
190 | |||
191 | if (result) | ||
192 | pr_debug("%s:%d: __add_pages failed: (%d)\n", | ||
193 | __func__, __LINE__, result); | ||
194 | |||
195 | return result; | ||
196 | } | ||
197 | |||
198 | static void spu_unmap(struct spu *spu) | 173 | static void spu_unmap(struct spu *spu) |
199 | { | 174 | { |
200 | iounmap(spu->priv2); | 175 | iounmap(spu->priv2); |
@@ -206,19 +181,6 @@ static void spu_unmap(struct spu *spu) | |||
206 | static int __init setup_areas(struct spu *spu) | 181 | static int __init setup_areas(struct spu *spu) |
207 | { | 182 | { |
208 | struct table {char* name; unsigned long addr; unsigned long size;}; | 183 | struct table {char* name; unsigned long addr; unsigned long size;}; |
209 | int result; | ||
210 | |||
211 | /* setup pages */ | ||
212 | |||
213 | result = add_spu_pages(spu->local_store_phys, LS_SIZE); | ||
214 | if (result) | ||
215 | goto fail_add; | ||
216 | |||
217 | result = add_spu_pages(spu->problem_phys, sizeof(struct spu_problem)); | ||
218 | if (result) | ||
219 | goto fail_add; | ||
220 | |||
221 | /* ioremap */ | ||
222 | 184 | ||
223 | spu_pdata(spu)->shadow = __ioremap( | 185 | spu_pdata(spu)->shadow = __ioremap( |
224 | spu_pdata(spu)->shadow_addr, sizeof(struct spe_shadow), | 186 | spu_pdata(spu)->shadow_addr, sizeof(struct spe_shadow), |
@@ -260,8 +222,8 @@ static int __init setup_areas(struct spu *spu) | |||
260 | 222 | ||
261 | fail_ioremap: | 223 | fail_ioremap: |
262 | spu_unmap(spu); | 224 | spu_unmap(spu); |
263 | fail_add: | 225 | |
264 | return result; | 226 | return -ENOMEM; |
265 | } | 227 | } |
266 | 228 | ||
267 | static int __init setup_interrupts(struct spu *spu) | 229 | static int __init setup_interrupts(struct spu *spu) |
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile index 69590fbf83da..dc0583bdbc63 100644 --- a/arch/powerpc/platforms/pseries/Makefile +++ b/arch/powerpc/platforms/pseries/Makefile | |||
@@ -9,6 +9,7 @@ obj-$(CONFIG_SMP) += smp.o | |||
9 | obj-$(CONFIG_XICS) += xics.o | 9 | obj-$(CONFIG_XICS) += xics.o |
10 | obj-$(CONFIG_SCANLOG) += scanlog.o | 10 | obj-$(CONFIG_SCANLOG) += scanlog.o |
11 | obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o | 11 | obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o |
12 | obj-$(CONFIG_KEXEC) += kexec.o | ||
12 | 13 | ||
13 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o | 14 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o |
14 | 15 | ||
diff --git a/arch/powerpc/platforms/pseries/firmware.h b/arch/powerpc/platforms/pseries/firmware.h deleted file mode 100644 index 714f56f55362..000000000000 --- a/arch/powerpc/platforms/pseries/firmware.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2006 IBM Corporation. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | */ | ||
9 | |||
10 | #ifndef _PSERIES_FIRMWARE_H | ||
11 | #define _PSERIES_FIRMWARE_H | ||
12 | |||
13 | #include <asm/firmware.h> | ||
14 | |||
15 | extern void __init fw_feature_init(void); | ||
16 | |||
17 | #endif /* _PSERIES_FIRMWARE_H */ | ||
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c new file mode 100644 index 000000000000..af2685607458 --- /dev/null +++ b/arch/powerpc/platforms/pseries/kexec.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * Copyright 2006 Michael Ellerman, IBM Corporation | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | */ | ||
9 | |||
10 | #include <asm/machdep.h> | ||
11 | #include <asm/page.h> | ||
12 | #include <asm/firmware.h> | ||
13 | #include <asm/kexec.h> | ||
14 | #include <asm/mpic.h> | ||
15 | |||
16 | #include "pseries.h" | ||
17 | #include "xics.h" | ||
18 | #include "plpar_wrappers.h" | ||
19 | |||
20 | static void pseries_kexec_cpu_down(int crash_shutdown, int secondary) | ||
21 | { | ||
22 | /* Don't risk a hypervisor call if we're crashing */ | ||
23 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { | ||
24 | unsigned long addr; | ||
25 | |||
26 | addr = __pa(get_slb_shadow()); | ||
27 | if (unregister_slb_shadow(hard_smp_processor_id(), addr)) | ||
28 | printk("SLB shadow buffer deregistration of " | ||
29 | "cpu %u (hw_cpu_id %d) failed\n", | ||
30 | smp_processor_id(), | ||
31 | hard_smp_processor_id()); | ||
32 | |||
33 | addr = __pa(get_lppaca()); | ||
34 | if (unregister_vpa(hard_smp_processor_id(), addr)) { | ||
35 | printk("VPA deregistration of cpu %u (hw_cpu_id %d) " | ||
36 | "failed\n", smp_processor_id(), | ||
37 | hard_smp_processor_id()); | ||
38 | } | ||
39 | } | ||
40 | } | ||
41 | |||
42 | static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary) | ||
43 | { | ||
44 | pseries_kexec_cpu_down(crash_shutdown, secondary); | ||
45 | mpic_teardown_this_cpu(secondary); | ||
46 | } | ||
47 | |||
48 | void __init setup_kexec_cpu_down_mpic(void) | ||
49 | { | ||
50 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic; | ||
51 | } | ||
52 | |||
53 | static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary) | ||
54 | { | ||
55 | pseries_kexec_cpu_down(crash_shutdown, secondary); | ||
56 | xics_teardown_cpu(secondary); | ||
57 | } | ||
58 | |||
59 | void __init setup_kexec_cpu_down_xics(void) | ||
60 | { | ||
61 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics; | ||
62 | } | ||
63 | |||
64 | static int __init pseries_kexec_setup(void) | ||
65 | { | ||
66 | ppc_md.machine_kexec = default_machine_kexec; | ||
67 | ppc_md.machine_kexec_prepare = default_machine_kexec_prepare; | ||
68 | ppc_md.machine_crash_shutdown = default_machine_crash_shutdown; | ||
69 | |||
70 | return 0; | ||
71 | } | ||
72 | __initcall(pseries_kexec_setup); | ||
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c index c69bd15ced9c..fa59124ce3fe 100644 --- a/arch/powerpc/platforms/pseries/pci.c +++ b/arch/powerpc/platforms/pseries/pci.c | |||
@@ -98,6 +98,10 @@ static void fixup_winbond_82c105(struct pci_dev* dev) | |||
98 | if (dev->resource[i].flags & IORESOURCE_IO | 98 | if (dev->resource[i].flags & IORESOURCE_IO |
99 | && dev->bus->number == 0 && dev->devfn == 0x81) | 99 | && dev->bus->number == 0 && dev->devfn == 0x81) |
100 | dev->resource[i].flags &= ~IORESOURCE_IO; | 100 | dev->resource[i].flags &= ~IORESOURCE_IO; |
101 | if (dev->resource[i].start == 0 && dev->resource[i].end) { | ||
102 | dev->resource[i].flags = 0; | ||
103 | dev->resource[i].end = 0; | ||
104 | } | ||
101 | } | 105 | } |
102 | } | 106 | } |
103 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, | 107 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105, |
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h new file mode 100644 index 000000000000..b43f1397a5b6 --- /dev/null +++ b/arch/powerpc/platforms/pseries/pseries.h | |||
@@ -0,0 +1,36 @@ | |||
1 | /* | ||
2 | * Copyright 2006 IBM Corporation. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version | ||
7 | * 2 of the License, or (at your option) any later version. | ||
8 | */ | ||
9 | |||
10 | #ifndef _PSERIES_PSERIES_H | ||
11 | #define _PSERIES_PSERIES_H | ||
12 | |||
13 | extern void __init fw_feature_init(void); | ||
14 | |||
15 | struct pt_regs; | ||
16 | |||
17 | extern int pSeries_system_reset_exception(struct pt_regs *regs); | ||
18 | extern int pSeries_machine_check_exception(struct pt_regs *regs); | ||
19 | |||
20 | #ifdef CONFIG_SMP | ||
21 | extern void smp_init_pseries_mpic(void); | ||
22 | extern void smp_init_pseries_xics(void); | ||
23 | #else | ||
24 | static inline smp_init_pseries_mpic(void) { }; | ||
25 | static inline smp_init_pseries_xics(void) { }; | ||
26 | #endif | ||
27 | |||
28 | #ifdef CONFIG_KEXEC | ||
29 | extern void setup_kexec_cpu_down_xics(void); | ||
30 | extern void setup_kexec_cpu_down_mpic(void); | ||
31 | #else | ||
32 | static inline setup_kexec_cpu_down_xics(void) { }; | ||
33 | static inline setup_kexec_cpu_down_mpic(void) { }; | ||
34 | #endif | ||
35 | |||
36 | #endif /* _PSERIES_PSERIES_H */ | ||
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index b1d3d161249e..edc038873113 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
@@ -51,7 +51,7 @@ | |||
51 | #include <asm/udbg.h> | 51 | #include <asm/udbg.h> |
52 | #include <asm/firmware.h> | 52 | #include <asm/firmware.h> |
53 | 53 | ||
54 | #include "ras.h" | 54 | #include "pseries.h" |
55 | 55 | ||
56 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; | 56 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; |
57 | static DEFINE_SPINLOCK(ras_log_buf_lock); | 57 | static DEFINE_SPINLOCK(ras_log_buf_lock); |
diff --git a/arch/powerpc/platforms/pseries/ras.h b/arch/powerpc/platforms/pseries/ras.h deleted file mode 100644 index 0e66b0da55e2..000000000000 --- a/arch/powerpc/platforms/pseries/ras.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | #ifndef _PSERIES_RAS_H | ||
2 | #define _PSERIES_RAS_H | ||
3 | |||
4 | struct pt_regs; | ||
5 | |||
6 | extern int pSeries_system_reset_exception(struct pt_regs *regs); | ||
7 | extern int pSeries_machine_check_exception(struct pt_regs *regs); | ||
8 | |||
9 | #endif /* _PSERIES_RAS_H */ | ||
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 042ecae107ac..435a04596526 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -55,7 +55,6 @@ | |||
55 | #include <asm/dma.h> | 55 | #include <asm/dma.h> |
56 | #include <asm/machdep.h> | 56 | #include <asm/machdep.h> |
57 | #include <asm/irq.h> | 57 | #include <asm/irq.h> |
58 | #include <asm/kexec.h> | ||
59 | #include <asm/time.h> | 58 | #include <asm/time.h> |
60 | #include <asm/nvram.h> | 59 | #include <asm/nvram.h> |
61 | #include "xics.h" | 60 | #include "xics.h" |
@@ -65,10 +64,10 @@ | |||
65 | #include <asm/i8259.h> | 64 | #include <asm/i8259.h> |
66 | #include <asm/udbg.h> | 65 | #include <asm/udbg.h> |
67 | #include <asm/smp.h> | 66 | #include <asm/smp.h> |
67 | #include <asm/firmware.h> | ||
68 | 68 | ||
69 | #include "plpar_wrappers.h" | 69 | #include "plpar_wrappers.h" |
70 | #include "ras.h" | 70 | #include "pseries.h" |
71 | #include "firmware.h" | ||
72 | 71 | ||
73 | #ifdef DEBUG | 72 | #ifdef DEBUG |
74 | #define DBG(fmt...) udbg_printf(fmt) | 73 | #define DBG(fmt...) udbg_printf(fmt) |
@@ -77,8 +76,6 @@ | |||
77 | #endif | 76 | #endif |
78 | 77 | ||
79 | /* move those away to a .h */ | 78 | /* move those away to a .h */ |
80 | extern void smp_init_pseries_mpic(void); | ||
81 | extern void smp_init_pseries_xics(void); | ||
82 | extern void find_udbg_vterm(void); | 79 | extern void find_udbg_vterm(void); |
83 | 80 | ||
84 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ | 81 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ |
@@ -221,42 +218,6 @@ static void pseries_lpar_enable_pmcs(void) | |||
221 | get_lppaca()->pmcregs_in_use = 1; | 218 | get_lppaca()->pmcregs_in_use = 1; |
222 | } | 219 | } |
223 | 220 | ||
224 | #ifdef CONFIG_KEXEC | ||
225 | static void pseries_kexec_cpu_down(int crash_shutdown, int secondary) | ||
226 | { | ||
227 | /* Don't risk a hypervisor call if we're crashing */ | ||
228 | if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) { | ||
229 | unsigned long addr; | ||
230 | |||
231 | addr = __pa(get_slb_shadow()); | ||
232 | if (unregister_slb_shadow(hard_smp_processor_id(), addr)) | ||
233 | printk("SLB shadow buffer deregistration of " | ||
234 | "cpu %u (hw_cpu_id %d) failed\n", | ||
235 | smp_processor_id(), | ||
236 | hard_smp_processor_id()); | ||
237 | |||
238 | addr = __pa(get_lppaca()); | ||
239 | if (unregister_vpa(hard_smp_processor_id(), addr)) { | ||
240 | printk("VPA deregistration of cpu %u (hw_cpu_id %d) " | ||
241 | "failed\n", smp_processor_id(), | ||
242 | hard_smp_processor_id()); | ||
243 | } | ||
244 | } | ||
245 | } | ||
246 | |||
247 | static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary) | ||
248 | { | ||
249 | pseries_kexec_cpu_down(crash_shutdown, secondary); | ||
250 | mpic_teardown_this_cpu(secondary); | ||
251 | } | ||
252 | |||
253 | static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary) | ||
254 | { | ||
255 | pseries_kexec_cpu_down(crash_shutdown, secondary); | ||
256 | xics_teardown_cpu(secondary); | ||
257 | } | ||
258 | #endif /* CONFIG_KEXEC */ | ||
259 | |||
260 | static void __init pseries_discover_pic(void) | 221 | static void __init pseries_discover_pic(void) |
261 | { | 222 | { |
262 | struct device_node *np; | 223 | struct device_node *np; |
@@ -269,21 +230,13 @@ static void __init pseries_discover_pic(void) | |||
269 | pSeries_mpic_node = of_node_get(np); | 230 | pSeries_mpic_node = of_node_get(np); |
270 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; | 231 | ppc_md.init_IRQ = pseries_mpic_init_IRQ; |
271 | ppc_md.get_irq = mpic_get_irq; | 232 | ppc_md.get_irq = mpic_get_irq; |
272 | #ifdef CONFIG_KEXEC | 233 | setup_kexec_cpu_down_mpic(); |
273 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic; | ||
274 | #endif | ||
275 | #ifdef CONFIG_SMP | ||
276 | smp_init_pseries_mpic(); | 234 | smp_init_pseries_mpic(); |
277 | #endif | ||
278 | return; | 235 | return; |
279 | } else if (strstr(typep, "ppc-xicp")) { | 236 | } else if (strstr(typep, "ppc-xicp")) { |
280 | ppc_md.init_IRQ = xics_init_IRQ; | 237 | ppc_md.init_IRQ = xics_init_IRQ; |
281 | #ifdef CONFIG_KEXEC | 238 | setup_kexec_cpu_down_xics(); |
282 | ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics; | ||
283 | #endif | ||
284 | #ifdef CONFIG_SMP | ||
285 | smp_init_pseries_xics(); | 239 | smp_init_pseries_xics(); |
286 | #endif | ||
287 | return; | 240 | return; |
288 | } | 241 | } |
289 | } | 242 | } |
@@ -554,9 +507,4 @@ define_machine(pseries) { | |||
554 | .check_legacy_ioport = pSeries_check_legacy_ioport, | 507 | .check_legacy_ioport = pSeries_check_legacy_ioport, |
555 | .system_reset_exception = pSeries_system_reset_exception, | 508 | .system_reset_exception = pSeries_system_reset_exception, |
556 | .machine_check_exception = pSeries_machine_check_exception, | 509 | .machine_check_exception = pSeries_machine_check_exception, |
557 | #ifdef CONFIG_KEXEC | ||
558 | .machine_kexec = default_machine_kexec, | ||
559 | .machine_kexec_prepare = default_machine_kexec_prepare, | ||
560 | .machine_crash_shutdown = default_machine_crash_shutdown, | ||
561 | #endif | ||
562 | }; | 510 | }; |
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c index 4408518eaebe..116305b22a2b 100644 --- a/arch/powerpc/platforms/pseries/smp.c +++ b/arch/powerpc/platforms/pseries/smp.c | |||
@@ -48,6 +48,7 @@ | |||
48 | #include <asm/vdso_datapage.h> | 48 | #include <asm/vdso_datapage.h> |
49 | 49 | ||
50 | #include "plpar_wrappers.h" | 50 | #include "plpar_wrappers.h" |
51 | #include "pseries.h" | ||
51 | 52 | ||
52 | #ifdef DEBUG | 53 | #ifdef DEBUG |
53 | #include <asm/udbg.h> | 54 | #include <asm/udbg.h> |
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 9f2a9a444bfb..34161bc5a02f 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -441,7 +441,8 @@ static int __init fsl_usb_of_init(void) | |||
441 | { | 441 | { |
442 | struct device_node *np; | 442 | struct device_node *np; |
443 | unsigned int i; | 443 | unsigned int i; |
444 | struct platform_device *usb_dev_mph = NULL, *usb_dev_dr = NULL; | 444 | struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL, |
445 | *usb_dev_dr_client = NULL; | ||
445 | int ret; | 446 | int ret; |
446 | 447 | ||
447 | for (np = NULL, i = 0; | 448 | for (np = NULL, i = 0; |
@@ -507,33 +508,72 @@ static int __init fsl_usb_of_init(void) | |||
507 | 508 | ||
508 | of_irq_to_resource(np, 0, &r[1]); | 509 | of_irq_to_resource(np, 0, &r[1]); |
509 | 510 | ||
510 | usb_dev_dr = | 511 | prop = get_property(np, "dr_mode", NULL); |
511 | platform_device_register_simple("fsl-ehci", i, r, 2); | 512 | |
512 | if (IS_ERR(usb_dev_dr)) { | 513 | if (!prop || !strcmp(prop, "host")) { |
513 | ret = PTR_ERR(usb_dev_dr); | 514 | usb_data.operating_mode = FSL_USB2_DR_HOST; |
515 | usb_dev_dr_host = platform_device_register_simple( | ||
516 | "fsl-ehci", i, r, 2); | ||
517 | if (IS_ERR(usb_dev_dr_host)) { | ||
518 | ret = PTR_ERR(usb_dev_dr_host); | ||
519 | goto err; | ||
520 | } | ||
521 | } else if (prop && !strcmp(prop, "peripheral")) { | ||
522 | usb_data.operating_mode = FSL_USB2_DR_DEVICE; | ||
523 | usb_dev_dr_client = platform_device_register_simple( | ||
524 | "fsl-usb2-udc", i, r, 2); | ||
525 | if (IS_ERR(usb_dev_dr_client)) { | ||
526 | ret = PTR_ERR(usb_dev_dr_client); | ||
527 | goto err; | ||
528 | } | ||
529 | } else if (prop && !strcmp(prop, "otg")) { | ||
530 | usb_data.operating_mode = FSL_USB2_DR_OTG; | ||
531 | usb_dev_dr_host = platform_device_register_simple( | ||
532 | "fsl-ehci", i, r, 2); | ||
533 | if (IS_ERR(usb_dev_dr_host)) { | ||
534 | ret = PTR_ERR(usb_dev_dr_host); | ||
535 | goto err; | ||
536 | } | ||
537 | usb_dev_dr_client = platform_device_register_simple( | ||
538 | "fsl-usb2-udc", i, r, 2); | ||
539 | if (IS_ERR(usb_dev_dr_client)) { | ||
540 | ret = PTR_ERR(usb_dev_dr_client); | ||
541 | goto err; | ||
542 | } | ||
543 | } else { | ||
544 | ret = -EINVAL; | ||
514 | goto err; | 545 | goto err; |
515 | } | 546 | } |
516 | 547 | ||
517 | usb_dev_dr->dev.coherent_dma_mask = 0xffffffffUL; | ||
518 | usb_dev_dr->dev.dma_mask = &usb_dev_dr->dev.coherent_dma_mask; | ||
519 | |||
520 | usb_data.operating_mode = FSL_USB2_DR_HOST; | ||
521 | |||
522 | prop = get_property(np, "phy_type", NULL); | 548 | prop = get_property(np, "phy_type", NULL); |
523 | usb_data.phy_mode = determine_usb_phy(prop); | 549 | usb_data.phy_mode = determine_usb_phy(prop); |
524 | 550 | ||
525 | ret = | 551 | if (usb_dev_dr_host) { |
526 | platform_device_add_data(usb_dev_dr, &usb_data, | 552 | usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL; |
527 | sizeof(struct | 553 | usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host-> |
528 | fsl_usb2_platform_data)); | 554 | dev.coherent_dma_mask; |
529 | if (ret) | 555 | if ((ret = platform_device_add_data(usb_dev_dr_host, |
530 | goto unreg_dr; | 556 | &usb_data, sizeof(struct |
557 | fsl_usb2_platform_data)))) | ||
558 | goto unreg_dr; | ||
559 | } | ||
560 | if (usb_dev_dr_client) { | ||
561 | usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL; | ||
562 | usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client-> | ||
563 | dev.coherent_dma_mask; | ||
564 | if ((ret = platform_device_add_data(usb_dev_dr_client, | ||
565 | &usb_data, sizeof(struct | ||
566 | fsl_usb2_platform_data)))) | ||
567 | goto unreg_dr; | ||
568 | } | ||
531 | } | 569 | } |
532 | return 0; | 570 | return 0; |
533 | 571 | ||
534 | unreg_dr: | 572 | unreg_dr: |
535 | if (usb_dev_dr) | 573 | if (usb_dev_dr_host) |
536 | platform_device_unregister(usb_dev_dr); | 574 | platform_device_unregister(usb_dev_dr_host); |
575 | if (usb_dev_dr_client) | ||
576 | platform_device_unregister(usb_dev_dr_client); | ||
537 | unreg_mph: | 577 | unreg_mph: |
538 | if (usb_dev_mph) | 578 | if (usb_dev_mph) |
539 | platform_device_unregister(usb_dev_mph); | 579 | platform_device_unregister(usb_dev_mph); |
@@ -699,7 +739,7 @@ static int __init fs_enet_of_init(void) | |||
699 | if (ret) | 739 | if (ret) |
700 | goto unreg; | 740 | goto unreg; |
701 | } | 741 | } |
702 | 742 | ||
703 | of_node_put(phy); | 743 | of_node_put(phy); |
704 | of_node_put(mdio); | 744 | of_node_put(mdio); |
705 | 745 | ||
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index aa701cc27ecc..4e54a09dd33b 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -1395,4 +1395,25 @@ void smp_mpic_message_pass(int target, int msg) | |||
1395 | break; | 1395 | break; |
1396 | } | 1396 | } |
1397 | } | 1397 | } |
1398 | |||
1399 | int __init smp_mpic_probe(void) | ||
1400 | { | ||
1401 | int nr_cpus; | ||
1402 | |||
1403 | DBG("smp_mpic_probe()...\n"); | ||
1404 | |||
1405 | nr_cpus = cpus_weight(cpu_possible_map); | ||
1406 | |||
1407 | DBG("nr_cpus: %d\n", nr_cpus); | ||
1408 | |||
1409 | if (nr_cpus > 1) | ||
1410 | mpic_request_ipis(); | ||
1411 | |||
1412 | return nr_cpus; | ||
1413 | } | ||
1414 | |||
1415 | void __devinit smp_mpic_setup_cpu(int cpu) | ||
1416 | { | ||
1417 | mpic_setup_this_cpu(); | ||
1418 | } | ||
1398 | #endif /* CONFIG_SMP */ | 1419 | #endif /* CONFIG_SMP */ |
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c index 47b56203f47e..0e97e5c94f8a 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c +++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c | |||
@@ -179,7 +179,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
179 | uccs->us_info = us_info; | 179 | uccs->us_info = us_info; |
180 | uccs->saved_uccm = 0; | 180 | uccs->saved_uccm = 0; |
181 | uccs->p_rx_frame = 0; | 181 | uccs->p_rx_frame = 0; |
182 | uccs->us_regs = us_info->us_regs; | 182 | uccs->us_regs = us_info->regs; |
183 | us_regs = uccs->us_regs; | 183 | us_regs = uccs->us_regs; |
184 | uccs->p_ucce = (u16 *) & (us_regs->ucce); | 184 | uccs->p_ucce = (u16 *) & (us_regs->ucce); |
185 | uccs->p_uccm = (u16 *) & (us_regs->uccm); | 185 | uccs->p_uccm = (u16 *) & (us_regs->uccm); |
@@ -206,7 +206,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
206 | uccs->us_pram = qe_muram_addr(uccs->us_pram_offset); | 206 | uccs->us_pram = qe_muram_addr(uccs->us_pram_offset); |
207 | 207 | ||
208 | /* Init Guemr register */ | 208 | /* Init Guemr register */ |
209 | if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->us_regs)))) { | 209 | if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) { |
210 | uccs_err("ucc_slow_init: Could not init the guemr register."); | 210 | uccs_err("ucc_slow_init: Could not init the guemr register."); |
211 | ucc_slow_free(uccs); | 211 | ucc_slow_free(uccs); |
212 | return ret; | 212 | return ret; |
@@ -214,7 +214,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc | |||
214 | 214 | ||
215 | /* Set UCC to slow type */ | 215 | /* Set UCC to slow type */ |
216 | if ((ret = ucc_set_type(us_info->ucc_num, | 216 | if ((ret = ucc_set_type(us_info->ucc_num, |
217 | (struct ucc_common *) (us_info->us_regs), | 217 | (struct ucc_common *) (us_info->regs), |
218 | UCC_SPEED_TYPE_SLOW))) { | 218 | UCC_SPEED_TYPE_SLOW))) { |
219 | uccs_err("ucc_slow_init: Could not init the guemr register."); | 219 | uccs_err("ucc_slow_init: Could not init the guemr register."); |
220 | ucc_slow_free(uccs); | 220 | ucc_slow_free(uccs); |
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 77540a2f7704..0183e5fbaf46 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
@@ -2811,7 +2811,6 @@ static void dump_spu_fields(struct spu *spu) | |||
2811 | DUMP_FIELD(spu, "0x%lx", irqs[2]); | 2811 | DUMP_FIELD(spu, "0x%lx", irqs[2]); |
2812 | DUMP_FIELD(spu, "0x%x", slb_replace); | 2812 | DUMP_FIELD(spu, "0x%x", slb_replace); |
2813 | DUMP_FIELD(spu, "%d", pid); | 2813 | DUMP_FIELD(spu, "%d", pid); |
2814 | DUMP_FIELD(spu, "%d", prio); | ||
2815 | DUMP_FIELD(spu, "0x%p", mm); | 2814 | DUMP_FIELD(spu, "0x%p", mm); |
2816 | DUMP_FIELD(spu, "0x%p", ctx); | 2815 | DUMP_FIELD(spu, "0x%p", ctx); |
2817 | DUMP_FIELD(spu, "0x%p", rq); | 2816 | DUMP_FIELD(spu, "0x%p", rq); |
diff --git a/arch/ppc/configs/taishan_defconfig b/arch/ppc/configs/taishan_defconfig new file mode 100644 index 000000000000..1ca0204267b1 --- /dev/null +++ b/arch/ppc/configs/taishan_defconfig | |||
@@ -0,0 +1,1077 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.20 | ||
4 | # Mon Feb 12 11:11:58 2007 | ||
5 | # | ||
6 | CONFIG_MMU=y | ||
7 | CONFIG_GENERIC_HARDIRQS=y | ||
8 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
9 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
10 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
11 | CONFIG_GENERIC_HWEIGHT=y | ||
12 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
13 | CONFIG_PPC=y | ||
14 | CONFIG_PPC32=y | ||
15 | CONFIG_GENERIC_NVRAM=y | ||
16 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
17 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
18 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
19 | CONFIG_GENERIC_BUG=y | ||
20 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
21 | |||
22 | # | ||
23 | # Code maturity level options | ||
24 | # | ||
25 | CONFIG_EXPERIMENTAL=y | ||
26 | CONFIG_BROKEN_ON_SMP=y | ||
27 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
28 | |||
29 | # | ||
30 | # General setup | ||
31 | # | ||
32 | CONFIG_LOCALVERSION="" | ||
33 | CONFIG_LOCALVERSION_AUTO=y | ||
34 | CONFIG_SWAP=y | ||
35 | CONFIG_SYSVIPC=y | ||
36 | # CONFIG_IPC_NS is not set | ||
37 | # CONFIG_POSIX_MQUEUE is not set | ||
38 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
39 | # CONFIG_TASKSTATS is not set | ||
40 | # CONFIG_UTS_NS is not set | ||
41 | # CONFIG_AUDIT is not set | ||
42 | # CONFIG_IKCONFIG is not set | ||
43 | CONFIG_SYSFS_DEPRECATED=y | ||
44 | # CONFIG_RELAY is not set | ||
45 | CONFIG_INITRAMFS_SOURCE="" | ||
46 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
47 | CONFIG_SYSCTL=y | ||
48 | CONFIG_EMBEDDED=y | ||
49 | CONFIG_SYSCTL_SYSCALL=y | ||
50 | CONFIG_KALLSYMS=y | ||
51 | # CONFIG_KALLSYMS_ALL is not set | ||
52 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
53 | # CONFIG_HOTPLUG is not set | ||
54 | CONFIG_PRINTK=y | ||
55 | CONFIG_BUG=y | ||
56 | CONFIG_ELF_CORE=y | ||
57 | CONFIG_BASE_FULL=y | ||
58 | CONFIG_FUTEX=y | ||
59 | CONFIG_EPOLL=y | ||
60 | CONFIG_SHMEM=y | ||
61 | CONFIG_SLAB=y | ||
62 | CONFIG_VM_EVENT_COUNTERS=y | ||
63 | CONFIG_RT_MUTEXES=y | ||
64 | # CONFIG_TINY_SHMEM is not set | ||
65 | CONFIG_BASE_SMALL=0 | ||
66 | # CONFIG_SLOB is not set | ||
67 | |||
68 | # | ||
69 | # Loadable module support | ||
70 | # | ||
71 | CONFIG_MODULES=y | ||
72 | CONFIG_MODULE_UNLOAD=y | ||
73 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
74 | # CONFIG_MODVERSIONS is not set | ||
75 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
76 | CONFIG_KMOD=y | ||
77 | |||
78 | # | ||
79 | # Block layer | ||
80 | # | ||
81 | CONFIG_BLOCK=y | ||
82 | # CONFIG_LBD is not set | ||
83 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
84 | # CONFIG_LSF is not set | ||
85 | |||
86 | # | ||
87 | # IO Schedulers | ||
88 | # | ||
89 | CONFIG_IOSCHED_NOOP=y | ||
90 | CONFIG_IOSCHED_AS=y | ||
91 | CONFIG_IOSCHED_DEADLINE=y | ||
92 | CONFIG_IOSCHED_CFQ=y | ||
93 | CONFIG_DEFAULT_AS=y | ||
94 | # CONFIG_DEFAULT_DEADLINE is not set | ||
95 | # CONFIG_DEFAULT_CFQ is not set | ||
96 | # CONFIG_DEFAULT_NOOP is not set | ||
97 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
98 | |||
99 | # | ||
100 | # Processor | ||
101 | # | ||
102 | # CONFIG_6xx is not set | ||
103 | # CONFIG_40x is not set | ||
104 | CONFIG_44x=y | ||
105 | # CONFIG_8xx is not set | ||
106 | # CONFIG_E200 is not set | ||
107 | # CONFIG_E500 is not set | ||
108 | CONFIG_PPC_DCR_NATIVE=y | ||
109 | CONFIG_PPC_DCR=y | ||
110 | CONFIG_BOOKE=y | ||
111 | CONFIG_PTE_64BIT=y | ||
112 | CONFIG_PHYS_64BIT=y | ||
113 | # CONFIG_MATH_EMULATION is not set | ||
114 | # CONFIG_KEXEC is not set | ||
115 | # CONFIG_CPU_FREQ is not set | ||
116 | CONFIG_4xx=y | ||
117 | CONFIG_WANT_EARLY_SERIAL=y | ||
118 | |||
119 | # | ||
120 | # IBM 4xx options | ||
121 | # | ||
122 | # CONFIG_BAMBOO is not set | ||
123 | # CONFIG_EBONY is not set | ||
124 | # CONFIG_LUAN is not set | ||
125 | # CONFIG_YUCCA is not set | ||
126 | # CONFIG_OCOTEA is not set | ||
127 | CONFIG_TAISHAN=y | ||
128 | CONFIG_440GX=y | ||
129 | CONFIG_440A=y | ||
130 | CONFIG_IBM_OCP=y | ||
131 | CONFIG_IBM_EMAC4=y | ||
132 | CONFIG_PPC4xx_DMA=y | ||
133 | CONFIG_PPC4xx_EDMA=y | ||
134 | CONFIG_PPC_GEN550=y | ||
135 | CONFIG_NOT_COHERENT_CACHE=y | ||
136 | |||
137 | # | ||
138 | # Platform options | ||
139 | # | ||
140 | # CONFIG_PC_KEYBOARD is not set | ||
141 | # CONFIG_HIGHMEM is not set | ||
142 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
143 | # CONFIG_HZ_100 is not set | ||
144 | CONFIG_HZ_250=y | ||
145 | # CONFIG_HZ_300 is not set | ||
146 | # CONFIG_HZ_1000 is not set | ||
147 | CONFIG_HZ=250 | ||
148 | CONFIG_PREEMPT_NONE=y | ||
149 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
150 | # CONFIG_PREEMPT is not set | ||
151 | CONFIG_SELECT_MEMORY_MODEL=y | ||
152 | CONFIG_FLATMEM_MANUAL=y | ||
153 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
154 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
155 | CONFIG_FLATMEM=y | ||
156 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
157 | # CONFIG_SPARSEMEM_STATIC is not set | ||
158 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
159 | CONFIG_RESOURCES_64BIT=y | ||
160 | CONFIG_ZONE_DMA_FLAG=1 | ||
161 | CONFIG_BINFMT_ELF=y | ||
162 | # CONFIG_BINFMT_MISC is not set | ||
163 | CONFIG_CMDLINE_BOOL=y | ||
164 | CONFIG_CMDLINE="ip=on console=ttyS0,115200" | ||
165 | CONFIG_SECCOMP=y | ||
166 | CONFIG_ISA_DMA_API=y | ||
167 | |||
168 | # | ||
169 | # Bus options | ||
170 | # | ||
171 | CONFIG_ZONE_DMA=y | ||
172 | # CONFIG_PPC_I8259 is not set | ||
173 | CONFIG_PPC_INDIRECT_PCI=y | ||
174 | CONFIG_PCI=y | ||
175 | CONFIG_PCI_DOMAINS=y | ||
176 | # CONFIG_PCI_DEBUG is not set | ||
177 | |||
178 | # | ||
179 | # PCCARD (PCMCIA/CardBus) support | ||
180 | # | ||
181 | |||
182 | # | ||
183 | # Advanced setup | ||
184 | # | ||
185 | # CONFIG_ADVANCED_OPTIONS is not set | ||
186 | |||
187 | # | ||
188 | # Default settings for advanced configuration options are used | ||
189 | # | ||
190 | CONFIG_HIGHMEM_START=0xfe000000 | ||
191 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
192 | CONFIG_KERNEL_START=0xc0000000 | ||
193 | CONFIG_TASK_SIZE=0x80000000 | ||
194 | CONFIG_CONSISTENT_START=0xff100000 | ||
195 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
196 | CONFIG_BOOT_LOAD=0x01000000 | ||
197 | |||
198 | # | ||
199 | # Networking | ||
200 | # | ||
201 | CONFIG_NET=y | ||
202 | |||
203 | # | ||
204 | # Networking options | ||
205 | # | ||
206 | # CONFIG_NETDEBUG is not set | ||
207 | CONFIG_PACKET=y | ||
208 | # CONFIG_PACKET_MMAP is not set | ||
209 | CONFIG_UNIX=y | ||
210 | CONFIG_XFRM=y | ||
211 | # CONFIG_XFRM_USER is not set | ||
212 | # CONFIG_XFRM_SUB_POLICY is not set | ||
213 | # CONFIG_XFRM_MIGRATE is not set | ||
214 | # CONFIG_NET_KEY is not set | ||
215 | CONFIG_INET=y | ||
216 | # CONFIG_IP_MULTICAST is not set | ||
217 | CONFIG_IP_ADVANCED_ROUTER=y | ||
218 | CONFIG_ASK_IP_FIB_HASH=y | ||
219 | # CONFIG_IP_FIB_TRIE is not set | ||
220 | CONFIG_IP_FIB_HASH=y | ||
221 | # CONFIG_IP_MULTIPLE_TABLES is not set | ||
222 | # CONFIG_IP_ROUTE_MULTIPATH is not set | ||
223 | # CONFIG_IP_ROUTE_VERBOSE is not set | ||
224 | CONFIG_IP_PNP=y | ||
225 | # CONFIG_IP_PNP_DHCP is not set | ||
226 | CONFIG_IP_PNP_BOOTP=y | ||
227 | # CONFIG_IP_PNP_RARP is not set | ||
228 | # CONFIG_NET_IPIP is not set | ||
229 | # CONFIG_NET_IPGRE is not set | ||
230 | # CONFIG_ARPD is not set | ||
231 | # CONFIG_SYN_COOKIES is not set | ||
232 | # CONFIG_INET_AH is not set | ||
233 | # CONFIG_INET_ESP is not set | ||
234 | # CONFIG_INET_IPCOMP is not set | ||
235 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
236 | # CONFIG_INET_TUNNEL is not set | ||
237 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
238 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
239 | CONFIG_INET_XFRM_MODE_BEET=y | ||
240 | CONFIG_INET_DIAG=y | ||
241 | CONFIG_INET_TCP_DIAG=y | ||
242 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
243 | CONFIG_TCP_CONG_CUBIC=y | ||
244 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
245 | # CONFIG_TCP_MD5SIG is not set | ||
246 | # CONFIG_IPV6 is not set | ||
247 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
248 | # CONFIG_INET6_TUNNEL is not set | ||
249 | # CONFIG_NETWORK_SECMARK is not set | ||
250 | # CONFIG_NETFILTER is not set | ||
251 | |||
252 | # | ||
253 | # DCCP Configuration (EXPERIMENTAL) | ||
254 | # | ||
255 | # CONFIG_IP_DCCP is not set | ||
256 | |||
257 | # | ||
258 | # SCTP Configuration (EXPERIMENTAL) | ||
259 | # | ||
260 | # CONFIG_IP_SCTP is not set | ||
261 | |||
262 | # | ||
263 | # TIPC Configuration (EXPERIMENTAL) | ||
264 | # | ||
265 | # CONFIG_TIPC is not set | ||
266 | # CONFIG_ATM is not set | ||
267 | CONFIG_BRIDGE=y | ||
268 | # CONFIG_VLAN_8021Q is not set | ||
269 | # CONFIG_DECNET is not set | ||
270 | CONFIG_LLC=y | ||
271 | # CONFIG_LLC2 is not set | ||
272 | # CONFIG_IPX is not set | ||
273 | # CONFIG_ATALK is not set | ||
274 | # CONFIG_X25 is not set | ||
275 | # CONFIG_LAPB is not set | ||
276 | # CONFIG_ECONET is not set | ||
277 | # CONFIG_WAN_ROUTER is not set | ||
278 | |||
279 | # | ||
280 | # QoS and/or fair queueing | ||
281 | # | ||
282 | # CONFIG_NET_SCHED is not set | ||
283 | |||
284 | # | ||
285 | # Network testing | ||
286 | # | ||
287 | # CONFIG_NET_PKTGEN is not set | ||
288 | # CONFIG_HAMRADIO is not set | ||
289 | # CONFIG_IRDA is not set | ||
290 | # CONFIG_BT is not set | ||
291 | # CONFIG_IEEE80211 is not set | ||
292 | |||
293 | # | ||
294 | # Device Drivers | ||
295 | # | ||
296 | |||
297 | # | ||
298 | # Generic Driver Options | ||
299 | # | ||
300 | # CONFIG_STANDALONE is not set | ||
301 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
302 | # CONFIG_DEBUG_DRIVER is not set | ||
303 | # CONFIG_DEBUG_DEVRES is not set | ||
304 | # CONFIG_SYS_HYPERVISOR is not set | ||
305 | |||
306 | # | ||
307 | # Connector - unified userspace <-> kernelspace linker | ||
308 | # | ||
309 | # CONFIG_CONNECTOR is not set | ||
310 | |||
311 | # | ||
312 | # Memory Technology Devices (MTD) | ||
313 | # | ||
314 | CONFIG_MTD=y | ||
315 | # CONFIG_MTD_DEBUG is not set | ||
316 | CONFIG_MTD_CONCAT=y | ||
317 | CONFIG_MTD_PARTITIONS=y | ||
318 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
319 | CONFIG_MTD_CMDLINE_PARTS=y | ||
320 | |||
321 | # | ||
322 | # User Modules And Translation Layers | ||
323 | # | ||
324 | CONFIG_MTD_CHAR=y | ||
325 | CONFIG_MTD_BLKDEVS=y | ||
326 | CONFIG_MTD_BLOCK=y | ||
327 | # CONFIG_FTL is not set | ||
328 | # CONFIG_NFTL is not set | ||
329 | # CONFIG_INFTL is not set | ||
330 | # CONFIG_RFD_FTL is not set | ||
331 | # CONFIG_SSFDC is not set | ||
332 | |||
333 | # | ||
334 | # RAM/ROM/Flash chip drivers | ||
335 | # | ||
336 | CONFIG_MTD_CFI=y | ||
337 | CONFIG_MTD_JEDECPROBE=y | ||
338 | CONFIG_MTD_GEN_PROBE=y | ||
339 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
340 | CONFIG_MTD_CFI_NOSWAP=y | ||
341 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
342 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
343 | # CONFIG_MTD_CFI_GEOMETRY is not set | ||
344 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
345 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
346 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
347 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
348 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
349 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
350 | CONFIG_MTD_CFI_I1=y | ||
351 | CONFIG_MTD_CFI_I2=y | ||
352 | # CONFIG_MTD_CFI_I4 is not set | ||
353 | # CONFIG_MTD_CFI_I8 is not set | ||
354 | # CONFIG_MTD_OTP is not set | ||
355 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
356 | CONFIG_MTD_CFI_AMDSTD=y | ||
357 | # CONFIG_MTD_CFI_STAA is not set | ||
358 | CONFIG_MTD_CFI_UTIL=y | ||
359 | # CONFIG_MTD_RAM is not set | ||
360 | # CONFIG_MTD_ROM is not set | ||
361 | # CONFIG_MTD_ABSENT is not set | ||
362 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
363 | |||
364 | # | ||
365 | # Mapping drivers for chip access | ||
366 | # | ||
367 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
368 | CONFIG_MTD_PHYSMAP=y | ||
369 | CONFIG_MTD_PHYSMAP_START=0x8000000 | ||
370 | CONFIG_MTD_PHYSMAP_LEN=0x0 | ||
371 | CONFIG_MTD_PHYSMAP_BANKWIDTH=2 | ||
372 | # CONFIG_MTD_PCI is not set | ||
373 | # CONFIG_MTD_PLATRAM is not set | ||
374 | |||
375 | # | ||
376 | # Self-contained MTD device drivers | ||
377 | # | ||
378 | # CONFIG_MTD_PMC551 is not set | ||
379 | # CONFIG_MTD_SLRAM is not set | ||
380 | # CONFIG_MTD_PHRAM is not set | ||
381 | # CONFIG_MTD_MTDRAM is not set | ||
382 | # CONFIG_MTD_BLOCK2MTD is not set | ||
383 | |||
384 | # | ||
385 | # Disk-On-Chip Device Drivers | ||
386 | # | ||
387 | # CONFIG_MTD_DOC2000 is not set | ||
388 | # CONFIG_MTD_DOC2001 is not set | ||
389 | # CONFIG_MTD_DOC2001PLUS is not set | ||
390 | |||
391 | # | ||
392 | # NAND Flash Device Drivers | ||
393 | # | ||
394 | # CONFIG_MTD_NAND is not set | ||
395 | # CONFIG_MTD_NAND_CAFE is not set | ||
396 | |||
397 | # | ||
398 | # OneNAND Flash Device Drivers | ||
399 | # | ||
400 | # CONFIG_MTD_ONENAND is not set | ||
401 | |||
402 | # | ||
403 | # Parallel port support | ||
404 | # | ||
405 | # CONFIG_PARPORT is not set | ||
406 | |||
407 | # | ||
408 | # Plug and Play support | ||
409 | # | ||
410 | |||
411 | # | ||
412 | # Block devices | ||
413 | # | ||
414 | # CONFIG_BLK_DEV_FD is not set | ||
415 | # CONFIG_BLK_CPQ_DA is not set | ||
416 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
417 | # CONFIG_BLK_DEV_DAC960 is not set | ||
418 | # CONFIG_BLK_DEV_UMEM is not set | ||
419 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
420 | # CONFIG_BLK_DEV_LOOP is not set | ||
421 | # CONFIG_BLK_DEV_NBD is not set | ||
422 | # CONFIG_BLK_DEV_SX8 is not set | ||
423 | CONFIG_BLK_DEV_RAM=y | ||
424 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
425 | CONFIG_BLK_DEV_RAM_SIZE=65536 | ||
426 | CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 | ||
427 | CONFIG_BLK_DEV_INITRD=y | ||
428 | # CONFIG_CDROM_PKTCDVD is not set | ||
429 | # CONFIG_ATA_OVER_ETH is not set | ||
430 | |||
431 | # | ||
432 | # Misc devices | ||
433 | # | ||
434 | # CONFIG_SGI_IOC4 is not set | ||
435 | # CONFIG_TIFM_CORE is not set | ||
436 | |||
437 | # | ||
438 | # ATA/ATAPI/MFM/RLL support | ||
439 | # | ||
440 | # CONFIG_IDE is not set | ||
441 | |||
442 | # | ||
443 | # SCSI device support | ||
444 | # | ||
445 | # CONFIG_RAID_ATTRS is not set | ||
446 | # CONFIG_SCSI is not set | ||
447 | # CONFIG_SCSI_NETLINK is not set | ||
448 | |||
449 | # | ||
450 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
451 | # | ||
452 | # CONFIG_ATA is not set | ||
453 | |||
454 | # | ||
455 | # Multi-device support (RAID and LVM) | ||
456 | # | ||
457 | # CONFIG_MD is not set | ||
458 | |||
459 | # | ||
460 | # Fusion MPT device support | ||
461 | # | ||
462 | # CONFIG_FUSION is not set | ||
463 | |||
464 | # | ||
465 | # IEEE 1394 (FireWire) support | ||
466 | # | ||
467 | # CONFIG_IEEE1394 is not set | ||
468 | |||
469 | # | ||
470 | # I2O device support | ||
471 | # | ||
472 | # CONFIG_I2O is not set | ||
473 | |||
474 | # | ||
475 | # Macintosh device drivers | ||
476 | # | ||
477 | # CONFIG_MAC_EMUMOUSEBTN is not set | ||
478 | # CONFIG_WINDFARM is not set | ||
479 | |||
480 | # | ||
481 | # Network device support | ||
482 | # | ||
483 | CONFIG_NETDEVICES=y | ||
484 | # CONFIG_DUMMY is not set | ||
485 | # CONFIG_BONDING is not set | ||
486 | # CONFIG_EQUALIZER is not set | ||
487 | # CONFIG_TUN is not set | ||
488 | |||
489 | # | ||
490 | # ARCnet devices | ||
491 | # | ||
492 | # CONFIG_ARCNET is not set | ||
493 | |||
494 | # | ||
495 | # PHY device support | ||
496 | # | ||
497 | # CONFIG_PHYLIB is not set | ||
498 | |||
499 | # | ||
500 | # Ethernet (10 or 100Mbit) | ||
501 | # | ||
502 | CONFIG_NET_ETHERNET=y | ||
503 | CONFIG_MII=y | ||
504 | # CONFIG_HAPPYMEAL is not set | ||
505 | # CONFIG_SUNGEM is not set | ||
506 | # CONFIG_CASSINI is not set | ||
507 | # CONFIG_NET_VENDOR_3COM is not set | ||
508 | |||
509 | # | ||
510 | # Tulip family network device support | ||
511 | # | ||
512 | # CONFIG_NET_TULIP is not set | ||
513 | # CONFIG_HP100 is not set | ||
514 | CONFIG_IBM_EMAC=y | ||
515 | CONFIG_IBM_EMAC_RXB=128 | ||
516 | CONFIG_IBM_EMAC_TXB=128 | ||
517 | CONFIG_IBM_EMAC_POLL_WEIGHT=32 | ||
518 | CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256 | ||
519 | CONFIG_IBM_EMAC_RX_SKB_HEADROOM=0 | ||
520 | CONFIG_IBM_EMAC_PHY_RX_CLK_FIX=y | ||
521 | # CONFIG_IBM_EMAC_DEBUG is not set | ||
522 | CONFIG_IBM_EMAC_ZMII=y | ||
523 | CONFIG_IBM_EMAC_RGMII=y | ||
524 | CONFIG_IBM_EMAC_TAH=y | ||
525 | CONFIG_NET_PCI=y | ||
526 | # CONFIG_PCNET32 is not set | ||
527 | # CONFIG_AMD8111_ETH is not set | ||
528 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
529 | # CONFIG_B44 is not set | ||
530 | # CONFIG_FORCEDETH is not set | ||
531 | # CONFIG_DGRS is not set | ||
532 | # CONFIG_EEPRO100 is not set | ||
533 | CONFIG_E100=y | ||
534 | # CONFIG_FEALNX is not set | ||
535 | # CONFIG_NATSEMI is not set | ||
536 | # CONFIG_NE2K_PCI is not set | ||
537 | # CONFIG_8139CP is not set | ||
538 | # CONFIG_8139TOO is not set | ||
539 | # CONFIG_SIS900 is not set | ||
540 | # CONFIG_EPIC100 is not set | ||
541 | # CONFIG_SUNDANCE is not set | ||
542 | # CONFIG_TLAN is not set | ||
543 | # CONFIG_VIA_RHINE is not set | ||
544 | # CONFIG_SC92031 is not set | ||
545 | |||
546 | # | ||
547 | # Ethernet (1000 Mbit) | ||
548 | # | ||
549 | # CONFIG_ACENIC is not set | ||
550 | # CONFIG_DL2K is not set | ||
551 | # CONFIG_E1000 is not set | ||
552 | # CONFIG_NS83820 is not set | ||
553 | # CONFIG_HAMACHI is not set | ||
554 | # CONFIG_YELLOWFIN is not set | ||
555 | # CONFIG_R8169 is not set | ||
556 | # CONFIG_SIS190 is not set | ||
557 | # CONFIG_SKGE is not set | ||
558 | # CONFIG_SKY2 is not set | ||
559 | # CONFIG_SK98LIN is not set | ||
560 | # CONFIG_VIA_VELOCITY is not set | ||
561 | # CONFIG_TIGON3 is not set | ||
562 | # CONFIG_BNX2 is not set | ||
563 | # CONFIG_QLA3XXX is not set | ||
564 | # CONFIG_ATL1 is not set | ||
565 | |||
566 | # | ||
567 | # Ethernet (10000 Mbit) | ||
568 | # | ||
569 | # CONFIG_CHELSIO_T1 is not set | ||
570 | # CONFIG_CHELSIO_T3 is not set | ||
571 | # CONFIG_IXGB is not set | ||
572 | # CONFIG_S2IO is not set | ||
573 | # CONFIG_MYRI10GE is not set | ||
574 | # CONFIG_NETXEN_NIC is not set | ||
575 | |||
576 | # | ||
577 | # Token Ring devices | ||
578 | # | ||
579 | # CONFIG_TR is not set | ||
580 | |||
581 | # | ||
582 | # Wireless LAN (non-hamradio) | ||
583 | # | ||
584 | # CONFIG_NET_RADIO is not set | ||
585 | |||
586 | # | ||
587 | # Wan interfaces | ||
588 | # | ||
589 | # CONFIG_WAN is not set | ||
590 | # CONFIG_FDDI is not set | ||
591 | # CONFIG_HIPPI is not set | ||
592 | CONFIG_PPP=y | ||
593 | # CONFIG_PPP_MULTILINK is not set | ||
594 | # CONFIG_PPP_FILTER is not set | ||
595 | # CONFIG_PPP_ASYNC is not set | ||
596 | # CONFIG_PPP_SYNC_TTY is not set | ||
597 | # CONFIG_PPP_DEFLATE is not set | ||
598 | # CONFIG_PPP_BSDCOMP is not set | ||
599 | # CONFIG_PPP_MPPE is not set | ||
600 | CONFIG_PPPOE=y | ||
601 | # CONFIG_SLIP is not set | ||
602 | CONFIG_SLHC=y | ||
603 | # CONFIG_SHAPER is not set | ||
604 | # CONFIG_NETCONSOLE is not set | ||
605 | # CONFIG_NETPOLL is not set | ||
606 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
607 | |||
608 | # | ||
609 | # ISDN subsystem | ||
610 | # | ||
611 | # CONFIG_ISDN is not set | ||
612 | |||
613 | # | ||
614 | # Telephony Support | ||
615 | # | ||
616 | # CONFIG_PHONE is not set | ||
617 | |||
618 | # | ||
619 | # Input device support | ||
620 | # | ||
621 | # CONFIG_INPUT is not set | ||
622 | |||
623 | # | ||
624 | # Hardware I/O ports | ||
625 | # | ||
626 | CONFIG_SERIO=y | ||
627 | # CONFIG_SERIO_I8042 is not set | ||
628 | # CONFIG_SERIO_SERPORT is not set | ||
629 | # CONFIG_SERIO_PCIPS2 is not set | ||
630 | # CONFIG_SERIO_LIBPS2 is not set | ||
631 | # CONFIG_SERIO_RAW is not set | ||
632 | # CONFIG_GAMEPORT is not set | ||
633 | |||
634 | # | ||
635 | # Character devices | ||
636 | # | ||
637 | # CONFIG_VT is not set | ||
638 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
639 | |||
640 | # | ||
641 | # Serial drivers | ||
642 | # | ||
643 | CONFIG_SERIAL_8250=y | ||
644 | CONFIG_SERIAL_8250_CONSOLE=y | ||
645 | CONFIG_SERIAL_8250_PCI=y | ||
646 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
647 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
648 | CONFIG_SERIAL_8250_EXTENDED=y | ||
649 | # CONFIG_SERIAL_8250_MANY_PORTS is not set | ||
650 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
651 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
652 | # CONFIG_SERIAL_8250_RSA is not set | ||
653 | |||
654 | # | ||
655 | # Non-8250 serial port support | ||
656 | # | ||
657 | # CONFIG_SERIAL_UARTLITE is not set | ||
658 | CONFIG_SERIAL_CORE=y | ||
659 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
660 | # CONFIG_SERIAL_JSM is not set | ||
661 | CONFIG_UNIX98_PTYS=y | ||
662 | CONFIG_LEGACY_PTYS=y | ||
663 | CONFIG_LEGACY_PTY_COUNT=256 | ||
664 | |||
665 | # | ||
666 | # IPMI | ||
667 | # | ||
668 | # CONFIG_IPMI_HANDLER is not set | ||
669 | |||
670 | # | ||
671 | # Watchdog Cards | ||
672 | # | ||
673 | # CONFIG_WATCHDOG is not set | ||
674 | CONFIG_HW_RANDOM=m | ||
675 | # CONFIG_NVRAM is not set | ||
676 | # CONFIG_GEN_RTC is not set | ||
677 | # CONFIG_DTLK is not set | ||
678 | # CONFIG_R3964 is not set | ||
679 | # CONFIG_APPLICOM is not set | ||
680 | # CONFIG_AGP is not set | ||
681 | # CONFIG_DRM is not set | ||
682 | # CONFIG_RAW_DRIVER is not set | ||
683 | |||
684 | # | ||
685 | # TPM devices | ||
686 | # | ||
687 | # CONFIG_TCG_TPM is not set | ||
688 | |||
689 | # | ||
690 | # I2C support | ||
691 | # | ||
692 | CONFIG_I2C=y | ||
693 | CONFIG_I2C_CHARDEV=y | ||
694 | |||
695 | # | ||
696 | # I2C Algorithms | ||
697 | # | ||
698 | # CONFIG_I2C_ALGOBIT is not set | ||
699 | # CONFIG_I2C_ALGOPCF is not set | ||
700 | # CONFIG_I2C_ALGOPCA is not set | ||
701 | |||
702 | # | ||
703 | # I2C Hardware Bus support | ||
704 | # | ||
705 | # CONFIG_I2C_ALI1535 is not set | ||
706 | # CONFIG_I2C_ALI1563 is not set | ||
707 | # CONFIG_I2C_ALI15X3 is not set | ||
708 | # CONFIG_I2C_AMD756 is not set | ||
709 | # CONFIG_I2C_AMD8111 is not set | ||
710 | # CONFIG_I2C_I801 is not set | ||
711 | # CONFIG_I2C_I810 is not set | ||
712 | # CONFIG_I2C_PIIX4 is not set | ||
713 | CONFIG_I2C_IBM_IIC=y | ||
714 | # CONFIG_I2C_MPC is not set | ||
715 | # CONFIG_I2C_NFORCE2 is not set | ||
716 | # CONFIG_I2C_OCORES is not set | ||
717 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
718 | # CONFIG_I2C_PROSAVAGE is not set | ||
719 | # CONFIG_I2C_SAVAGE4 is not set | ||
720 | # CONFIG_I2C_SIS5595 is not set | ||
721 | # CONFIG_I2C_SIS630 is not set | ||
722 | # CONFIG_I2C_SIS96X is not set | ||
723 | # CONFIG_I2C_STUB is not set | ||
724 | # CONFIG_I2C_VIA is not set | ||
725 | # CONFIG_I2C_VIAPRO is not set | ||
726 | # CONFIG_I2C_VOODOO3 is not set | ||
727 | # CONFIG_I2C_PCA_ISA is not set | ||
728 | |||
729 | # | ||
730 | # Miscellaneous I2C Chip support | ||
731 | # | ||
732 | # CONFIG_SENSORS_DS1337 is not set | ||
733 | # CONFIG_SENSORS_DS1374 is not set | ||
734 | CONFIG_SENSORS_EEPROM=y | ||
735 | # CONFIG_SENSORS_PCF8574 is not set | ||
736 | # CONFIG_SENSORS_PCA9539 is not set | ||
737 | # CONFIG_SENSORS_PCF8591 is not set | ||
738 | # CONFIG_SENSORS_M41T00 is not set | ||
739 | # CONFIG_SENSORS_MAX6875 is not set | ||
740 | # CONFIG_I2C_DEBUG_CORE is not set | ||
741 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
742 | # CONFIG_I2C_DEBUG_BUS is not set | ||
743 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
744 | |||
745 | # | ||
746 | # SPI support | ||
747 | # | ||
748 | # CONFIG_SPI is not set | ||
749 | # CONFIG_SPI_MASTER is not set | ||
750 | |||
751 | # | ||
752 | # Dallas's 1-wire bus | ||
753 | # | ||
754 | # CONFIG_W1 is not set | ||
755 | |||
756 | # | ||
757 | # Hardware Monitoring support | ||
758 | # | ||
759 | CONFIG_HWMON=y | ||
760 | # CONFIG_HWMON_VID is not set | ||
761 | # CONFIG_SENSORS_ABITUGURU is not set | ||
762 | # CONFIG_SENSORS_ADM1021 is not set | ||
763 | # CONFIG_SENSORS_ADM1025 is not set | ||
764 | # CONFIG_SENSORS_ADM1026 is not set | ||
765 | # CONFIG_SENSORS_ADM1031 is not set | ||
766 | # CONFIG_SENSORS_ADM9240 is not set | ||
767 | # CONFIG_SENSORS_ASB100 is not set | ||
768 | # CONFIG_SENSORS_ATXP1 is not set | ||
769 | # CONFIG_SENSORS_DS1621 is not set | ||
770 | # CONFIG_SENSORS_F71805F is not set | ||
771 | # CONFIG_SENSORS_FSCHER is not set | ||
772 | # CONFIG_SENSORS_FSCPOS is not set | ||
773 | # CONFIG_SENSORS_GL518SM is not set | ||
774 | # CONFIG_SENSORS_GL520SM is not set | ||
775 | # CONFIG_SENSORS_IT87 is not set | ||
776 | # CONFIG_SENSORS_LM63 is not set | ||
777 | # CONFIG_SENSORS_LM75 is not set | ||
778 | # CONFIG_SENSORS_LM77 is not set | ||
779 | # CONFIG_SENSORS_LM78 is not set | ||
780 | # CONFIG_SENSORS_LM80 is not set | ||
781 | # CONFIG_SENSORS_LM83 is not set | ||
782 | # CONFIG_SENSORS_LM85 is not set | ||
783 | # CONFIG_SENSORS_LM87 is not set | ||
784 | # CONFIG_SENSORS_LM90 is not set | ||
785 | # CONFIG_SENSORS_LM92 is not set | ||
786 | # CONFIG_SENSORS_MAX1619 is not set | ||
787 | # CONFIG_SENSORS_PC87360 is not set | ||
788 | # CONFIG_SENSORS_PC87427 is not set | ||
789 | # CONFIG_SENSORS_SIS5595 is not set | ||
790 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
791 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
792 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
793 | # CONFIG_SENSORS_VIA686A is not set | ||
794 | # CONFIG_SENSORS_VT1211 is not set | ||
795 | # CONFIG_SENSORS_VT8231 is not set | ||
796 | # CONFIG_SENSORS_W83781D is not set | ||
797 | # CONFIG_SENSORS_W83791D is not set | ||
798 | # CONFIG_SENSORS_W83792D is not set | ||
799 | # CONFIG_SENSORS_W83793 is not set | ||
800 | # CONFIG_SENSORS_W83L785TS is not set | ||
801 | # CONFIG_SENSORS_W83627HF is not set | ||
802 | # CONFIG_SENSORS_W83627EHF is not set | ||
803 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
804 | |||
805 | # | ||
806 | # Multimedia devices | ||
807 | # | ||
808 | # CONFIG_VIDEO_DEV is not set | ||
809 | |||
810 | # | ||
811 | # Digital Video Broadcasting Devices | ||
812 | # | ||
813 | # CONFIG_DVB is not set | ||
814 | |||
815 | # | ||
816 | # Graphics support | ||
817 | # | ||
818 | CONFIG_FIRMWARE_EDID=y | ||
819 | # CONFIG_FB is not set | ||
820 | # CONFIG_FB_IBM_GXT4500 is not set | ||
821 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
822 | |||
823 | # | ||
824 | # Sound | ||
825 | # | ||
826 | # CONFIG_SOUND is not set | ||
827 | |||
828 | # | ||
829 | # USB support | ||
830 | # | ||
831 | CONFIG_USB_ARCH_HAS_HCD=y | ||
832 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
833 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
834 | # CONFIG_USB is not set | ||
835 | |||
836 | # | ||
837 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
838 | # | ||
839 | |||
840 | # | ||
841 | # USB Gadget Support | ||
842 | # | ||
843 | # CONFIG_USB_GADGET is not set | ||
844 | |||
845 | # | ||
846 | # MMC/SD Card support | ||
847 | # | ||
848 | # CONFIG_MMC is not set | ||
849 | |||
850 | # | ||
851 | # LED devices | ||
852 | # | ||
853 | # CONFIG_NEW_LEDS is not set | ||
854 | |||
855 | # | ||
856 | # LED drivers | ||
857 | # | ||
858 | |||
859 | # | ||
860 | # LED Triggers | ||
861 | # | ||
862 | |||
863 | # | ||
864 | # InfiniBand support | ||
865 | # | ||
866 | # CONFIG_INFINIBAND is not set | ||
867 | |||
868 | # | ||
869 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
870 | # | ||
871 | |||
872 | # | ||
873 | # Real Time Clock | ||
874 | # | ||
875 | # CONFIG_RTC_CLASS is not set | ||
876 | |||
877 | # | ||
878 | # DMA Engine support | ||
879 | # | ||
880 | # CONFIG_DMA_ENGINE is not set | ||
881 | |||
882 | # | ||
883 | # DMA Clients | ||
884 | # | ||
885 | |||
886 | # | ||
887 | # DMA Devices | ||
888 | # | ||
889 | |||
890 | # | ||
891 | # Auxiliary Display support | ||
892 | # | ||
893 | |||
894 | # | ||
895 | # Virtualization | ||
896 | # | ||
897 | |||
898 | # | ||
899 | # File systems | ||
900 | # | ||
901 | CONFIG_EXT2_FS=y | ||
902 | CONFIG_EXT2_FS_XATTR=y | ||
903 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
904 | CONFIG_EXT2_FS_SECURITY=y | ||
905 | CONFIG_EXT2_FS_XIP=y | ||
906 | CONFIG_FS_XIP=y | ||
907 | CONFIG_EXT3_FS=y | ||
908 | CONFIG_EXT3_FS_XATTR=y | ||
909 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
910 | CONFIG_EXT3_FS_SECURITY=y | ||
911 | # CONFIG_EXT4DEV_FS is not set | ||
912 | CONFIG_JBD=y | ||
913 | CONFIG_JBD_DEBUG=y | ||
914 | CONFIG_FS_MBCACHE=y | ||
915 | # CONFIG_REISERFS_FS is not set | ||
916 | # CONFIG_JFS_FS is not set | ||
917 | CONFIG_FS_POSIX_ACL=y | ||
918 | # CONFIG_XFS_FS is not set | ||
919 | # CONFIG_GFS2_FS is not set | ||
920 | # CONFIG_OCFS2_FS is not set | ||
921 | # CONFIG_MINIX_FS is not set | ||
922 | # CONFIG_ROMFS_FS is not set | ||
923 | CONFIG_INOTIFY=y | ||
924 | CONFIG_INOTIFY_USER=y | ||
925 | # CONFIG_QUOTA is not set | ||
926 | CONFIG_DNOTIFY=y | ||
927 | # CONFIG_AUTOFS_FS is not set | ||
928 | # CONFIG_AUTOFS4_FS is not set | ||
929 | # CONFIG_FUSE_FS is not set | ||
930 | |||
931 | # | ||
932 | # CD-ROM/DVD Filesystems | ||
933 | # | ||
934 | # CONFIG_ISO9660_FS is not set | ||
935 | # CONFIG_UDF_FS is not set | ||
936 | |||
937 | # | ||
938 | # DOS/FAT/NT Filesystems | ||
939 | # | ||
940 | # CONFIG_MSDOS_FS is not set | ||
941 | # CONFIG_VFAT_FS is not set | ||
942 | # CONFIG_NTFS_FS is not set | ||
943 | |||
944 | # | ||
945 | # Pseudo filesystems | ||
946 | # | ||
947 | CONFIG_PROC_FS=y | ||
948 | CONFIG_PROC_KCORE=y | ||
949 | CONFIG_PROC_SYSCTL=y | ||
950 | CONFIG_SYSFS=y | ||
951 | CONFIG_TMPFS=y | ||
952 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
953 | # CONFIG_HUGETLB_PAGE is not set | ||
954 | CONFIG_RAMFS=y | ||
955 | # CONFIG_CONFIGFS_FS is not set | ||
956 | |||
957 | # | ||
958 | # Miscellaneous filesystems | ||
959 | # | ||
960 | # CONFIG_ADFS_FS is not set | ||
961 | # CONFIG_AFFS_FS is not set | ||
962 | # CONFIG_HFS_FS is not set | ||
963 | # CONFIG_HFSPLUS_FS is not set | ||
964 | # CONFIG_BEFS_FS is not set | ||
965 | # CONFIG_BFS_FS is not set | ||
966 | # CONFIG_EFS_FS is not set | ||
967 | CONFIG_JFFS2_FS=y | ||
968 | CONFIG_JFFS2_FS_DEBUG=0 | ||
969 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
970 | CONFIG_JFFS2_SUMMARY=y | ||
971 | # CONFIG_JFFS2_FS_XATTR is not set | ||
972 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
973 | CONFIG_JFFS2_ZLIB=y | ||
974 | CONFIG_JFFS2_RTIME=y | ||
975 | # CONFIG_JFFS2_RUBIN is not set | ||
976 | # CONFIG_CRAMFS is not set | ||
977 | # CONFIG_VXFS_FS is not set | ||
978 | # CONFIG_HPFS_FS is not set | ||
979 | # CONFIG_QNX4FS_FS is not set | ||
980 | # CONFIG_SYSV_FS is not set | ||
981 | # CONFIG_UFS_FS is not set | ||
982 | |||
983 | # | ||
984 | # Network File Systems | ||
985 | # | ||
986 | CONFIG_NFS_FS=y | ||
987 | # CONFIG_NFS_V3 is not set | ||
988 | # CONFIG_NFS_V4 is not set | ||
989 | # CONFIG_NFS_DIRECTIO is not set | ||
990 | # CONFIG_NFSD is not set | ||
991 | CONFIG_ROOT_NFS=y | ||
992 | CONFIG_LOCKD=y | ||
993 | CONFIG_NFS_COMMON=y | ||
994 | CONFIG_SUNRPC=y | ||
995 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
996 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
997 | # CONFIG_SMB_FS is not set | ||
998 | # CONFIG_CIFS is not set | ||
999 | # CONFIG_NCP_FS is not set | ||
1000 | # CONFIG_CODA_FS is not set | ||
1001 | # CONFIG_AFS_FS is not set | ||
1002 | # CONFIG_9P_FS is not set | ||
1003 | |||
1004 | # | ||
1005 | # Partition Types | ||
1006 | # | ||
1007 | # CONFIG_PARTITION_ADVANCED is not set | ||
1008 | CONFIG_MSDOS_PARTITION=y | ||
1009 | |||
1010 | # | ||
1011 | # Native Language Support | ||
1012 | # | ||
1013 | # CONFIG_NLS is not set | ||
1014 | |||
1015 | # | ||
1016 | # Distributed Lock Manager | ||
1017 | # | ||
1018 | # CONFIG_DLM is not set | ||
1019 | |||
1020 | # | ||
1021 | # Library routines | ||
1022 | # | ||
1023 | CONFIG_BITREVERSE=y | ||
1024 | # CONFIG_CRC_CCITT is not set | ||
1025 | # CONFIG_CRC16 is not set | ||
1026 | CONFIG_CRC32=y | ||
1027 | # CONFIG_LIBCRC32C is not set | ||
1028 | CONFIG_ZLIB_INFLATE=y | ||
1029 | CONFIG_ZLIB_DEFLATE=y | ||
1030 | CONFIG_PLIST=y | ||
1031 | CONFIG_HAS_IOMEM=y | ||
1032 | CONFIG_HAS_IOPORT=y | ||
1033 | # CONFIG_PROFILING is not set | ||
1034 | |||
1035 | # | ||
1036 | # Kernel hacking | ||
1037 | # | ||
1038 | # CONFIG_PRINTK_TIME is not set | ||
1039 | CONFIG_ENABLE_MUST_CHECK=y | ||
1040 | # CONFIG_MAGIC_SYSRQ is not set | ||
1041 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1042 | CONFIG_DEBUG_FS=y | ||
1043 | # CONFIG_HEADERS_CHECK is not set | ||
1044 | CONFIG_DEBUG_KERNEL=y | ||
1045 | CONFIG_LOG_BUF_SHIFT=14 | ||
1046 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1047 | # CONFIG_SCHEDSTATS is not set | ||
1048 | # CONFIG_DEBUG_SLAB is not set | ||
1049 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1050 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1051 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1052 | CONFIG_DEBUG_MUTEXES=y | ||
1053 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1054 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1055 | # CONFIG_DEBUG_KOBJECT is not set | ||
1056 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1057 | CONFIG_DEBUG_INFO=y | ||
1058 | # CONFIG_DEBUG_VM is not set | ||
1059 | # CONFIG_DEBUG_LIST is not set | ||
1060 | CONFIG_FORCED_INLINING=y | ||
1061 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1062 | # CONFIG_KGDB is not set | ||
1063 | # CONFIG_XMON is not set | ||
1064 | CONFIG_BDI_SWITCH=y | ||
1065 | # CONFIG_SERIAL_TEXT_DEBUG is not set | ||
1066 | CONFIG_PPC_OCP=y | ||
1067 | |||
1068 | # | ||
1069 | # Security options | ||
1070 | # | ||
1071 | # CONFIG_KEYS is not set | ||
1072 | # CONFIG_SECURITY is not set | ||
1073 | |||
1074 | # | ||
1075 | # Cryptographic options | ||
1076 | # | ||
1077 | # CONFIG_CRYPTO is not set | ||
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S index 66877bdfe0b7..1f155d399d57 100644 --- a/arch/ppc/kernel/head_fsl_booke.S +++ b/arch/ppc/kernel/head_fsl_booke.S | |||
@@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
206 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ | 206 | rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */ |
207 | mtspr SPRN_MAS0,r7 | 207 | mtspr SPRN_MAS0,r7 |
208 | tlbre | 208 | tlbre |
209 | li r6,0 | 209 | mfspr r6,SPRN_MAS1 |
210 | rlwinm r6,r6,0,2,0 /* clear IPROT */ | ||
210 | mtspr SPRN_MAS1,r6 | 211 | mtspr SPRN_MAS1,r6 |
211 | tlbwe | 212 | tlbwe |
212 | /* Invalidate TLB1 */ | 213 | /* Invalidate TLB1 */ |
@@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
248 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ | 249 | rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */ |
249 | mtspr SPRN_MAS0,r7 | 250 | mtspr SPRN_MAS0,r7 |
250 | tlbre | 251 | tlbre |
252 | mfspr r8,SPRN_MAS1 | ||
253 | rlwinm r8,r8,0,2,0 /* clear IPROT */ | ||
251 | mtspr SPRN_MAS1,r8 | 254 | mtspr SPRN_MAS1,r8 |
252 | tlbwe | 255 | tlbwe |
253 | /* Invalidate TLB1 */ | 256 | /* Invalidate TLB1 */ |
@@ -889,7 +892,6 @@ load_up_spe: | |||
889 | REST_GPR(9, r11) | 892 | REST_GPR(9, r11) |
890 | REST_GPR(12, r11) | 893 | REST_GPR(12, r11) |
891 | lwz r11,GPR11(r11) | 894 | lwz r11,GPR11(r11) |
892 | SYNC | ||
893 | rfi | 895 | rfi |
894 | 896 | ||
895 | /* | 897 | /* |
@@ -953,7 +955,6 @@ _GLOBAL(giveup_altivec) | |||
953 | _GLOBAL(giveup_spe) | 955 | _GLOBAL(giveup_spe) |
954 | mfmsr r5 | 956 | mfmsr r5 |
955 | oris r5,r5,MSR_SPE@h | 957 | oris r5,r5,MSR_SPE@h |
956 | SYNC | ||
957 | mtmsr r5 /* enable use of SPE now */ | 958 | mtmsr r5 /* enable use of SPE now */ |
958 | isync | 959 | isync |
959 | cmpi 0,r3,0 | 960 | cmpi 0,r3,0 |
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c index 1f49503317cb..1318b6f4c3df 100644 --- a/arch/ppc/kernel/ppc_ksyms.c +++ b/arch/ppc/kernel/ppc_ksyms.c | |||
@@ -271,7 +271,7 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */ | |||
271 | extern long *intercept_table; | 271 | extern long *intercept_table; |
272 | EXPORT_SYMBOL(intercept_table); | 272 | EXPORT_SYMBOL(intercept_table); |
273 | #endif /* CONFIG_PPC_STD_MMU */ | 273 | #endif /* CONFIG_PPC_STD_MMU */ |
274 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | 274 | #ifdef CONFIG_PPC_DCR_NATIVE |
275 | EXPORT_SYMBOL(__mtdcr); | 275 | EXPORT_SYMBOL(__mtdcr); |
276 | EXPORT_SYMBOL(__mfdcr); | 276 | EXPORT_SYMBOL(__mfdcr); |
277 | #endif | 277 | #endif |
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c index 82b06a1ef95d..c023b7298809 100644 --- a/arch/ppc/mm/pgtable.c +++ b/arch/ppc/mm/pgtable.c | |||
@@ -314,7 +314,7 @@ void __init mapin_ram(void) | |||
314 | } | 314 | } |
315 | 315 | ||
316 | /* is x a power of 4? */ | 316 | /* is x a power of 4? */ |
317 | #define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)) | 317 | #define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1) |
318 | 318 | ||
319 | /* | 319 | /* |
320 | * Set up a mapping for a block of I/O. | 320 | * Set up a mapping for a block of I/O. |
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig index 6980de420e92..705ae56016f0 100644 --- a/arch/ppc/platforms/4xx/Kconfig +++ b/arch/ppc/platforms/4xx/Kconfig | |||
@@ -98,6 +98,12 @@ config OCOTEA | |||
98 | help | 98 | help |
99 | This option enables support for the IBM PPC440GX evaluation board. | 99 | This option enables support for the IBM PPC440GX evaluation board. |
100 | 100 | ||
101 | config TAISHAN | ||
102 | bool "Taishan" | ||
103 | select WANT_EARLY_SERIAL | ||
104 | help | ||
105 | This option enables support for the AMCC PPC440GX evaluation board. | ||
106 | |||
101 | endchoice | 107 | endchoice |
102 | 108 | ||
103 | config EP405PC | 109 | config EP405PC |
@@ -126,7 +132,7 @@ config 440GP | |||
126 | 132 | ||
127 | config 440GX | 133 | config 440GX |
128 | bool | 134 | bool |
129 | depends on OCOTEA | 135 | depends on OCOTEA || TAISHAN |
130 | default y | 136 | default y |
131 | 137 | ||
132 | config 440SP | 138 | config 440SP |
@@ -173,7 +179,7 @@ config BOOKE | |||
173 | 179 | ||
174 | config IBM_OCP | 180 | config IBM_OCP |
175 | bool | 181 | bool |
176 | depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT | 182 | depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT |
177 | default y | 183 | default y |
178 | 184 | ||
179 | config IBM_EMAC4 | 185 | config IBM_EMAC4 |
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile index a04a0d0a0f5c..fa6610bccaf9 100644 --- a/arch/ppc/platforms/4xx/Makefile +++ b/arch/ppc/platforms/4xx/Makefile | |||
@@ -12,6 +12,7 @@ obj-$(CONFIG_OCOTEA) += ocotea.o | |||
12 | obj-$(CONFIG_REDWOOD_5) += redwood5.o | 12 | obj-$(CONFIG_REDWOOD_5) += redwood5.o |
13 | obj-$(CONFIG_REDWOOD_6) += redwood6.o | 13 | obj-$(CONFIG_REDWOOD_6) += redwood6.o |
14 | obj-$(CONFIG_SYCAMORE) += sycamore.o | 14 | obj-$(CONFIG_SYCAMORE) += sycamore.o |
15 | obj-$(CONFIG_TAISHAN) += taishan.o | ||
15 | obj-$(CONFIG_WALNUT) += walnut.o | 16 | obj-$(CONFIG_WALNUT) += walnut.o |
16 | obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o | 17 | obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o |
17 | obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o | 18 | obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o |
diff --git a/arch/ppc/platforms/4xx/taishan.c b/arch/ppc/platforms/4xx/taishan.c new file mode 100644 index 000000000000..bb0253eef45a --- /dev/null +++ b/arch/ppc/platforms/4xx/taishan.c | |||
@@ -0,0 +1,395 @@ | |||
1 | /* | ||
2 | * arch/ppc/platforms/4xx/taishan.c | ||
3 | * | ||
4 | * AMCC Taishan board specific routines | ||
5 | * | ||
6 | * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/stddef.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/reboot.h> | ||
19 | #include <linux/pci.h> | ||
20 | #include <linux/kdev_t.h> | ||
21 | #include <linux/types.h> | ||
22 | #include <linux/major.h> | ||
23 | #include <linux/blkdev.h> | ||
24 | #include <linux/console.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/ide.h> | ||
27 | #include <linux/initrd.h> | ||
28 | #include <linux/seq_file.h> | ||
29 | #include <linux/root_dev.h> | ||
30 | #include <linux/tty.h> | ||
31 | #include <linux/serial.h> | ||
32 | #include <linux/serial_core.h> | ||
33 | #include <linux/platform_device.h> | ||
34 | #include <linux/mtd/partitions.h> | ||
35 | #include <linux/mtd/nand.h> | ||
36 | #include <linux/mtd/ndfc.h> | ||
37 | #include <linux/mtd/physmap.h> | ||
38 | |||
39 | #include <asm/machdep.h> | ||
40 | #include <asm/ocp.h> | ||
41 | #include <asm/bootinfo.h> | ||
42 | #include <asm/ppcboot.h> | ||
43 | |||
44 | #include <syslib/gen550.h> | ||
45 | #include <syslib/ibm440gx_common.h> | ||
46 | |||
47 | extern bd_t __res; | ||
48 | |||
49 | static struct ibm44x_clocks clocks __initdata; | ||
50 | |||
51 | /* | ||
52 | * NOR FLASH configuration (using mtd physmap driver) | ||
53 | */ | ||
54 | |||
55 | /* start will be added dynamically, end is always fixed */ | ||
56 | static struct resource taishan_nor_resource = { | ||
57 | .start = TAISHAN_FLASH_ADDR, | ||
58 | .end = 0x1ffffffffULL, | ||
59 | .flags = IORESOURCE_MEM, | ||
60 | }; | ||
61 | |||
62 | #define RW_PART0_OF 0 | ||
63 | #define RW_PART0_SZ 0x180000 | ||
64 | #define RW_PART1_SZ 0x200000 | ||
65 | /* Partition 2 will be autosized dynamically... */ | ||
66 | #define RW_PART3_SZ 0x80000 | ||
67 | #define RW_PART4_SZ 0x40000 | ||
68 | |||
69 | static struct mtd_partition taishan_nor_parts[] = { | ||
70 | { | ||
71 | .name = "kernel", | ||
72 | .offset = 0, | ||
73 | .size = RW_PART0_SZ | ||
74 | }, | ||
75 | { | ||
76 | .name = "root", | ||
77 | .offset = MTDPART_OFS_APPEND, | ||
78 | .size = RW_PART1_SZ, | ||
79 | }, | ||
80 | { | ||
81 | .name = "user", | ||
82 | .offset = MTDPART_OFS_APPEND, | ||
83 | /* .size = RW_PART2_SZ */ /* will be adjusted dynamically */ | ||
84 | }, | ||
85 | { | ||
86 | .name = "env", | ||
87 | .offset = MTDPART_OFS_APPEND, | ||
88 | .size = RW_PART3_SZ, | ||
89 | }, | ||
90 | { | ||
91 | .name = "u-boot", | ||
92 | .offset = MTDPART_OFS_APPEND, | ||
93 | .size = RW_PART4_SZ, | ||
94 | } | ||
95 | }; | ||
96 | |||
97 | static struct physmap_flash_data taishan_nor_data = { | ||
98 | .width = 4, | ||
99 | .parts = taishan_nor_parts, | ||
100 | .nr_parts = ARRAY_SIZE(taishan_nor_parts), | ||
101 | }; | ||
102 | |||
103 | static struct platform_device taishan_nor_device = { | ||
104 | .name = "physmap-flash", | ||
105 | .id = 0, | ||
106 | .dev = { | ||
107 | .platform_data = &taishan_nor_data, | ||
108 | }, | ||
109 | .num_resources = 1, | ||
110 | .resource = &taishan_nor_resource, | ||
111 | }; | ||
112 | |||
113 | static int taishan_setup_flash(void) | ||
114 | { | ||
115 | /* | ||
116 | * Adjust partition 2 to flash size | ||
117 | */ | ||
118 | taishan_nor_parts[2].size = __res.bi_flashsize - | ||
119 | RW_PART0_SZ - RW_PART1_SZ - RW_PART3_SZ - RW_PART4_SZ; | ||
120 | |||
121 | platform_device_register(&taishan_nor_device); | ||
122 | |||
123 | return 0; | ||
124 | } | ||
125 | arch_initcall(taishan_setup_flash); | ||
126 | |||
127 | static void __init | ||
128 | taishan_calibrate_decr(void) | ||
129 | { | ||
130 | unsigned int freq; | ||
131 | |||
132 | if (mfspr(SPRN_CCR1) & CCR1_TCS) | ||
133 | freq = TAISHAN_TMR_CLK; | ||
134 | else | ||
135 | freq = clocks.cpu; | ||
136 | |||
137 | ibm44x_calibrate_decr(freq); | ||
138 | } | ||
139 | |||
140 | static int | ||
141 | taishan_show_cpuinfo(struct seq_file *m) | ||
142 | { | ||
143 | seq_printf(m, "vendor\t\t: AMCC\n"); | ||
144 | seq_printf(m, "machine\t\t: PPC440GX EVB (Taishan)\n"); | ||
145 | ibm440gx_show_cpuinfo(m); | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static inline int | ||
150 | taishan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin) | ||
151 | { | ||
152 | static char pci_irq_table[][4] = | ||
153 | /* | ||
154 | * PCI IDSEL/INTPIN->INTLINE | ||
155 | * A B C D | ||
156 | */ | ||
157 | { | ||
158 | { 23, 24, 25, 26 }, /* IDSEL 1 - PCI Slot 0 */ | ||
159 | { 24, 25, 26, 23 }, /* IDSEL 2 - PCI Slot 1 */ | ||
160 | }; | ||
161 | |||
162 | const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4; | ||
163 | return PCI_IRQ_TABLE_LOOKUP; | ||
164 | } | ||
165 | |||
166 | static void __init taishan_set_emacdata(void) | ||
167 | { | ||
168 | struct ocp_def *def; | ||
169 | struct ocp_func_emac_data *emacdata; | ||
170 | int i; | ||
171 | |||
172 | /* Set phy_map, phy_mode, and mac_addr for each EMAC */ | ||
173 | for (i=2; i<4; i++) { | ||
174 | def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i); | ||
175 | emacdata = def->additions; | ||
176 | if (i < 2) { | ||
177 | emacdata->phy_map = 0x00000001; /* Skip 0x00 */ | ||
178 | emacdata->phy_mode = PHY_MODE_SMII; | ||
179 | } else { | ||
180 | emacdata->phy_map = 0x00000001; /* Skip 0x00 */ | ||
181 | emacdata->phy_mode = PHY_MODE_RGMII; | ||
182 | } | ||
183 | if (i == 0) | ||
184 | memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6); | ||
185 | else if (i == 1) | ||
186 | memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6); | ||
187 | else if (i == 2) | ||
188 | memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6); | ||
189 | else if (i == 3) | ||
190 | memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6); | ||
191 | } | ||
192 | } | ||
193 | |||
194 | #define PCIX_READW(offset) \ | ||
195 | (readw(pcix_reg_base+offset)) | ||
196 | |||
197 | #define PCIX_WRITEW(value, offset) \ | ||
198 | (writew(value, pcix_reg_base+offset)) | ||
199 | |||
200 | #define PCIX_WRITEL(value, offset) \ | ||
201 | (writel(value, pcix_reg_base+offset)) | ||
202 | |||
203 | /* | ||
204 | * FIXME: This is only here to "make it work". This will move | ||
205 | * to a ibm_pcix.c which will contain a generic IBM PCIX bridge | ||
206 | * configuration library. -Matt | ||
207 | */ | ||
208 | static void __init | ||
209 | taishan_setup_pcix(void) | ||
210 | { | ||
211 | void *pcix_reg_base; | ||
212 | |||
213 | pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE); | ||
214 | |||
215 | /* Enable PCIX0 I/O, Mem, and Busmaster cycles */ | ||
216 | PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND); | ||
217 | |||
218 | /* Disable all windows */ | ||
219 | PCIX_WRITEL(0, PCIX0_POM0SA); | ||
220 | PCIX_WRITEL(0, PCIX0_POM1SA); | ||
221 | PCIX_WRITEL(0, PCIX0_POM2SA); | ||
222 | PCIX_WRITEL(0, PCIX0_PIM0SA); | ||
223 | PCIX_WRITEL(0, PCIX0_PIM0SAH); | ||
224 | PCIX_WRITEL(0, PCIX0_PIM1SA); | ||
225 | PCIX_WRITEL(0, PCIX0_PIM2SA); | ||
226 | PCIX_WRITEL(0, PCIX0_PIM2SAH); | ||
227 | |||
228 | /* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */ | ||
229 | PCIX_WRITEL(0x00000003, PCIX0_POM0LAH); | ||
230 | PCIX_WRITEL(0x80000000, PCIX0_POM0LAL); | ||
231 | PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH); | ||
232 | PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL); | ||
233 | PCIX_WRITEL(0x80000001, PCIX0_POM0SA); | ||
234 | |||
235 | /* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */ | ||
236 | PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH); | ||
237 | PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL); | ||
238 | PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA); | ||
239 | PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH); | ||
240 | |||
241 | iounmap(pcix_reg_base); | ||
242 | |||
243 | eieio(); | ||
244 | } | ||
245 | |||
246 | static void __init | ||
247 | taishan_setup_hose(void) | ||
248 | { | ||
249 | struct pci_controller *hose; | ||
250 | |||
251 | /* Configure windows on the PCI-X host bridge */ | ||
252 | taishan_setup_pcix(); | ||
253 | |||
254 | hose = pcibios_alloc_controller(); | ||
255 | |||
256 | if (!hose) | ||
257 | return; | ||
258 | |||
259 | hose->first_busno = 0; | ||
260 | hose->last_busno = 0xff; | ||
261 | |||
262 | hose->pci_mem_offset = TAISHAN_PCI_MEM_OFFSET; | ||
263 | |||
264 | pci_init_resource(&hose->io_resource, | ||
265 | TAISHAN_PCI_LOWER_IO, | ||
266 | TAISHAN_PCI_UPPER_IO, | ||
267 | IORESOURCE_IO, | ||
268 | "PCI host bridge"); | ||
269 | |||
270 | pci_init_resource(&hose->mem_resources[0], | ||
271 | TAISHAN_PCI_LOWER_MEM, | ||
272 | TAISHAN_PCI_UPPER_MEM, | ||
273 | IORESOURCE_MEM, | ||
274 | "PCI host bridge"); | ||
275 | |||
276 | hose->io_space.start = TAISHAN_PCI_LOWER_IO; | ||
277 | hose->io_space.end = TAISHAN_PCI_UPPER_IO; | ||
278 | hose->mem_space.start = TAISHAN_PCI_LOWER_MEM; | ||
279 | hose->mem_space.end = TAISHAN_PCI_UPPER_MEM; | ||
280 | hose->io_base_virt = ioremap64(TAISHAN_PCI_IO_BASE, TAISHAN_PCI_IO_SIZE); | ||
281 | isa_io_base = (unsigned long) hose->io_base_virt; | ||
282 | |||
283 | setup_indirect_pci(hose, | ||
284 | TAISHAN_PCI_CFGA_PLB32, | ||
285 | TAISHAN_PCI_CFGD_PLB32); | ||
286 | hose->set_cfg_type = 1; | ||
287 | |||
288 | hose->last_busno = pciauto_bus_scan(hose, hose->first_busno); | ||
289 | |||
290 | ppc_md.pci_swizzle = common_swizzle; | ||
291 | ppc_md.pci_map_irq = taishan_map_irq; | ||
292 | } | ||
293 | |||
294 | |||
295 | static void __init | ||
296 | taishan_early_serial_map(void) | ||
297 | { | ||
298 | struct uart_port port; | ||
299 | |||
300 | /* Setup ioremapped serial port access */ | ||
301 | memset(&port, 0, sizeof(port)); | ||
302 | port.membase = ioremap64(PPC440GX_UART0_ADDR, 8); | ||
303 | port.irq = UART0_INT; | ||
304 | port.uartclk = clocks.uart0; | ||
305 | port.regshift = 0; | ||
306 | port.iotype = UPIO_MEM; | ||
307 | port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; | ||
308 | port.line = 0; | ||
309 | |||
310 | if (early_serial_setup(&port) != 0) | ||
311 | printk("Early serial init of port 0 failed\n"); | ||
312 | |||
313 | #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) | ||
314 | /* Configure debug serial access */ | ||
315 | gen550_init(0, &port); | ||
316 | |||
317 | /* Purge TLB entry added in head_44x.S for early serial access */ | ||
318 | _tlbie(UART0_IO_BASE); | ||
319 | #endif | ||
320 | |||
321 | port.membase = ioremap64(PPC440GX_UART1_ADDR, 8); | ||
322 | port.irq = UART1_INT; | ||
323 | port.uartclk = clocks.uart1; | ||
324 | port.line = 1; | ||
325 | |||
326 | if (early_serial_setup(&port) != 0) | ||
327 | printk("Early serial init of port 1 failed\n"); | ||
328 | |||
329 | #if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB) | ||
330 | /* Configure debug serial access */ | ||
331 | gen550_init(1, &port); | ||
332 | #endif | ||
333 | } | ||
334 | |||
335 | static void __init | ||
336 | taishan_setup_arch(void) | ||
337 | { | ||
338 | taishan_set_emacdata(); | ||
339 | |||
340 | ibm440gx_tah_enable(); | ||
341 | |||
342 | /* | ||
343 | * Determine various clocks. | ||
344 | * To be completely correct we should get SysClk | ||
345 | * from FPGA, because it can be changed by on-board switches | ||
346 | * --ebs | ||
347 | */ | ||
348 | ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200); | ||
349 | ocp_sys_info.opb_bus_freq = clocks.opb; | ||
350 | |||
351 | /* init to some ~sane value until calibrate_delay() runs */ | ||
352 | loops_per_jiffy = 50000000/HZ; | ||
353 | |||
354 | /* Setup PCI host bridge */ | ||
355 | taishan_setup_hose(); | ||
356 | |||
357 | #ifdef CONFIG_BLK_DEV_INITRD | ||
358 | if (initrd_start) | ||
359 | ROOT_DEV = Root_RAM0; | ||
360 | else | ||
361 | #endif | ||
362 | #ifdef CONFIG_ROOT_NFS | ||
363 | ROOT_DEV = Root_NFS; | ||
364 | #else | ||
365 | ROOT_DEV = Root_HDA1; | ||
366 | #endif | ||
367 | |||
368 | taishan_early_serial_map(); | ||
369 | |||
370 | /* Identify the system */ | ||
371 | printk("AMCC PowerPC 440GX Taishan Platform\n"); | ||
372 | } | ||
373 | |||
374 | static void __init taishan_init(void) | ||
375 | { | ||
376 | ibm440gx_l2c_setup(&clocks); | ||
377 | } | ||
378 | |||
379 | void __init platform_init(unsigned long r3, unsigned long r4, | ||
380 | unsigned long r5, unsigned long r6, unsigned long r7) | ||
381 | { | ||
382 | ibm44x_platform_init(r3, r4, r5, r6, r7); | ||
383 | |||
384 | ppc_md.setup_arch = taishan_setup_arch; | ||
385 | ppc_md.show_cpuinfo = taishan_show_cpuinfo; | ||
386 | ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */ | ||
387 | |||
388 | ppc_md.calibrate_decr = taishan_calibrate_decr; | ||
389 | |||
390 | #ifdef CONFIG_KGDB | ||
391 | ppc_md.early_serial_map = taishan_early_serial_map; | ||
392 | #endif | ||
393 | ppc_md.init = taishan_init; | ||
394 | } | ||
395 | |||
diff --git a/arch/ppc/platforms/4xx/taishan.h b/arch/ppc/platforms/4xx/taishan.h new file mode 100644 index 000000000000..ea7561a80457 --- /dev/null +++ b/arch/ppc/platforms/4xx/taishan.h | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * arch/ppc/platforms/4xx/taishan.h | ||
3 | * | ||
4 | * AMCC Taishan board definitions | ||
5 | * | ||
6 | * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | * | ||
13 | */ | ||
14 | |||
15 | #ifdef __KERNEL__ | ||
16 | #ifndef __ASM_TAISHAN_H__ | ||
17 | #define __ASM_TAISHAN_H__ | ||
18 | |||
19 | #include <platforms/4xx/ibm440gx.h> | ||
20 | |||
21 | /* External timer clock frequency */ | ||
22 | #define TAISHAN_TMR_CLK 25000000 | ||
23 | |||
24 | /* Flash */ | ||
25 | #define TAISHAN_FPGA_ADDR 0x0000000141000000ULL | ||
26 | #define TAISHAN_LCM_ADDR 0x0000000142000000ULL | ||
27 | #define TAISHAN_FLASH_ADDR 0x00000001fc000000ULL | ||
28 | #define TAISHAN_FLASH_SIZE 0x4000000 | ||
29 | |||
30 | /* | ||
31 | * Serial port defines | ||
32 | */ | ||
33 | #define RS_TABLE_SIZE 2 | ||
34 | |||
35 | /* head_44x.S created UART mapping, used before early_serial_setup. | ||
36 | * We cannot use default OpenBIOS UART mappings because they | ||
37 | * don't work for configurations with more than 512M RAM. --ebs | ||
38 | */ | ||
39 | #define UART0_IO_BASE 0xF0000200 | ||
40 | #define UART1_IO_BASE 0xF0000300 | ||
41 | |||
42 | #define BASE_BAUD 11059200/16 | ||
43 | #define STD_UART_OP(num) \ | ||
44 | { 0, BASE_BAUD, 0, UART##num##_INT, \ | ||
45 | (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ | ||
46 | iomem_base: (void*)UART##num##_IO_BASE, \ | ||
47 | io_type: SERIAL_IO_MEM}, | ||
48 | |||
49 | #define SERIAL_PORT_DFNS \ | ||
50 | STD_UART_OP(0) \ | ||
51 | STD_UART_OP(1) | ||
52 | |||
53 | /* PCI support */ | ||
54 | #define TAISHAN_PCI_LOWER_IO 0x00000000 | ||
55 | #define TAISHAN_PCI_UPPER_IO 0x0000ffff | ||
56 | #define TAISHAN_PCI_LOWER_MEM 0x80000000 | ||
57 | #define TAISHAN_PCI_UPPER_MEM 0xffffefff | ||
58 | |||
59 | #define TAISHAN_PCI_CFGA_PLB32 0x0ec00000 | ||
60 | #define TAISHAN_PCI_CFGD_PLB32 0x0ec00004 | ||
61 | |||
62 | #define TAISHAN_PCI_IO_BASE 0x0000000208000000ULL | ||
63 | #define TAISHAN_PCI_IO_SIZE 0x00010000 | ||
64 | #define TAISHAN_PCI_MEM_OFFSET 0x00000000 | ||
65 | |||
66 | #endif /* __ASM_TAISHAN_H__ */ | ||
67 | #endif /* __KERNEL__ */ | ||
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile index d84f04666972..09911118c675 100644 --- a/arch/ppc/syslib/Makefile +++ b/arch/ppc/syslib/Makefile | |||
@@ -69,6 +69,7 @@ obj-$(CONFIG_SANDPOINT) += pci_auto.o todc_time.o | |||
69 | obj-$(CONFIG_SBC82xx) += todc_time.o | 69 | obj-$(CONFIG_SBC82xx) += todc_time.o |
70 | obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \ | 70 | obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \ |
71 | todc_time.o | 71 | todc_time.o |
72 | obj-$(CONFIG_TAISHAN) += pci_auto.o | ||
72 | obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \ | 73 | obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \ |
73 | ppc_sys.o | 74 | ppc_sys.o |
74 | obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o | 75 | obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o |
diff --git a/drivers/acpi/i2c_ec.c b/drivers/acpi/i2c_ec.c index 8338be0990bc..bb54b6cdb30b 100644 --- a/drivers/acpi/i2c_ec.c +++ b/drivers/acpi/i2c_ec.c | |||
@@ -340,6 +340,7 @@ static int acpi_ec_hc_add(struct acpi_device *device) | |||
340 | smbus->adapter.owner = THIS_MODULE; | 340 | smbus->adapter.owner = THIS_MODULE; |
341 | smbus->adapter.algo = &acpi_ec_smbus_algorithm; | 341 | smbus->adapter.algo = &acpi_ec_smbus_algorithm; |
342 | smbus->adapter.algo_data = smbus; | 342 | smbus->adapter.algo_data = smbus; |
343 | smbus->adapter.dev.parent = &device->dev; | ||
343 | 344 | ||
344 | if (i2c_add_adapter(&smbus->adapter)) { | 345 | if (i2c_add_adapter(&smbus->adapter)) { |
345 | ACPI_DEBUG_PRINT((ACPI_DB_WARN, | 346 | ACPI_DEBUG_PRINT((ACPI_DB_WARN, |
diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c index d7378df44970..29e1809e5ecf 100644 --- a/drivers/ata/pata_mpc52xx.c +++ b/drivers/ata/pata_mpc52xx.c | |||
@@ -484,10 +484,8 @@ mpc52xx_ata_resume(struct of_device *op) | |||
484 | 484 | ||
485 | static struct of_device_id mpc52xx_ata_of_match[] = { | 485 | static struct of_device_id mpc52xx_ata_of_match[] = { |
486 | { | 486 | { |
487 | .compatible = "mpc5200-ata", | 487 | .type = "ata", |
488 | }, | 488 | .compatible = "mpc5200-ata", |
489 | { | ||
490 | .compatible = "mpc52xx-ata", | ||
491 | }, | 489 | }, |
492 | {}, | 490 | {}, |
493 | }; | 491 | }; |
diff --git a/drivers/char/keyboard.c b/drivers/char/keyboard.c index c654a3e0c697..cb8d691576da 100644 --- a/drivers/char/keyboard.c +++ b/drivers/char/keyboard.c | |||
@@ -596,7 +596,6 @@ static void fn_spawn_con(struct vc_data *vc) | |||
596 | static void fn_SAK(struct vc_data *vc) | 596 | static void fn_SAK(struct vc_data *vc) |
597 | { | 597 | { |
598 | struct work_struct *SAK_work = &vc_cons[fg_console].SAK_work; | 598 | struct work_struct *SAK_work = &vc_cons[fg_console].SAK_work; |
599 | PREPARE_WORK(SAK_work, vc_SAK); | ||
600 | schedule_work(SAK_work); | 599 | schedule_work(SAK_work); |
601 | } | 600 | } |
602 | 601 | ||
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c index 3757610b7835..be73c80d699d 100644 --- a/drivers/char/sysrq.c +++ b/drivers/char/sysrq.c | |||
@@ -89,7 +89,6 @@ static struct sysrq_key_op sysrq_loglevel_op = { | |||
89 | static void sysrq_handle_SAK(int key, struct tty_struct *tty) | 89 | static void sysrq_handle_SAK(int key, struct tty_struct *tty) |
90 | { | 90 | { |
91 | struct work_struct *SAK_work = &vc_cons[fg_console].SAK_work; | 91 | struct work_struct *SAK_work = &vc_cons[fg_console].SAK_work; |
92 | PREPARE_WORK(SAK_work, vc_SAK); | ||
93 | schedule_work(SAK_work); | 92 | schedule_work(SAK_work); |
94 | } | 93 | } |
95 | static struct sysrq_key_op sysrq_SAK_op = { | 94 | static struct sysrq_key_op sysrq_SAK_op = { |
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c index 65672c57470b..5289254e7ab3 100644 --- a/drivers/char/tty_io.c +++ b/drivers/char/tty_io.c | |||
@@ -3442,7 +3442,6 @@ void do_SAK(struct tty_struct *tty) | |||
3442 | { | 3442 | { |
3443 | if (!tty) | 3443 | if (!tty) |
3444 | return; | 3444 | return; |
3445 | PREPARE_WORK(&tty->SAK_work, do_SAK_work); | ||
3446 | schedule_work(&tty->SAK_work); | 3445 | schedule_work(&tty->SAK_work); |
3447 | } | 3446 | } |
3448 | 3447 | ||
@@ -3568,7 +3567,7 @@ static void initialize_tty_struct(struct tty_struct *tty) | |||
3568 | mutex_init(&tty->atomic_write_lock); | 3567 | mutex_init(&tty->atomic_write_lock); |
3569 | spin_lock_init(&tty->read_lock); | 3568 | spin_lock_init(&tty->read_lock); |
3570 | INIT_LIST_HEAD(&tty->tty_files); | 3569 | INIT_LIST_HEAD(&tty->tty_files); |
3571 | INIT_WORK(&tty->SAK_work, NULL); | 3570 | INIT_WORK(&tty->SAK_work, do_SAK_work); |
3572 | } | 3571 | } |
3573 | 3572 | ||
3574 | /* | 3573 | /* |
diff --git a/drivers/char/vt.c b/drivers/char/vt.c index 94ce3e7fc9e4..c3f8e383933b 100644 --- a/drivers/char/vt.c +++ b/drivers/char/vt.c | |||
@@ -2635,6 +2635,7 @@ static int __init con_init(void) | |||
2635 | */ | 2635 | */ |
2636 | for (currcons = 0; currcons < MIN_NR_CONSOLES; currcons++) { | 2636 | for (currcons = 0; currcons < MIN_NR_CONSOLES; currcons++) { |
2637 | vc_cons[currcons].d = vc = alloc_bootmem(sizeof(struct vc_data)); | 2637 | vc_cons[currcons].d = vc = alloc_bootmem(sizeof(struct vc_data)); |
2638 | INIT_WORK(&vc_cons[currcons].SAK_work, vc_SAK); | ||
2638 | visual_init(vc, currcons, 1); | 2639 | visual_init(vc, currcons, 1); |
2639 | vc->vc_screenbuf = (unsigned short *)alloc_bootmem(vc->vc_screenbuf_size); | 2640 | vc->vc_screenbuf = (unsigned short *)alloc_bootmem(vc->vc_screenbuf_size); |
2640 | vc->vc_kmalloced = 0; | 2641 | vc->vc_kmalloced = 0; |
diff --git a/drivers/char/watchdog/acquirewdt.c b/drivers/char/watchdog/acquirewdt.c index 154d67e591e5..85269c365a10 100644 --- a/drivers/char/watchdog/acquirewdt.c +++ b/drivers/char/watchdog/acquirewdt.c | |||
@@ -48,46 +48,52 @@ | |||
48 | * It can be 1, 2, 10, 20, 110 or 220 seconds. | 48 | * It can be 1, 2, 10, 20, 110 or 220 seconds. |
49 | */ | 49 | */ |
50 | 50 | ||
51 | #include <linux/module.h> | 51 | /* |
52 | #include <linux/moduleparam.h> | 52 | * Includes, defines, variables, module parameters, ... |
53 | #include <linux/types.h> | 53 | */ |
54 | #include <linux/miscdevice.h> | ||
55 | #include <linux/watchdog.h> | ||
56 | #include <linux/fs.h> | ||
57 | #include <linux/ioport.h> | ||
58 | #include <linux/notifier.h> | ||
59 | #include <linux/reboot.h> | ||
60 | #include <linux/init.h> | ||
61 | |||
62 | #include <asm/io.h> | ||
63 | #include <asm/uaccess.h> | ||
64 | #include <asm/system.h> | ||
65 | 54 | ||
55 | /* Includes */ | ||
56 | #include <linux/module.h> /* For module specific items */ | ||
57 | #include <linux/moduleparam.h> /* For new moduleparam's */ | ||
58 | #include <linux/types.h> /* For standard types (like size_t) */ | ||
59 | #include <linux/errno.h> /* For the -ENODEV/... values */ | ||
60 | #include <linux/kernel.h> /* For printk/panic/... */ | ||
61 | #include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */ | ||
62 | #include <linux/watchdog.h> /* For the watchdog specific items */ | ||
63 | #include <linux/fs.h> /* For file operations */ | ||
64 | #include <linux/ioport.h> /* For io-port access */ | ||
65 | #include <linux/platform_device.h> /* For platform_driver framework */ | ||
66 | #include <linux/init.h> /* For __init/__exit/... */ | ||
67 | |||
68 | #include <asm/uaccess.h> /* For copy_to_user/put_user/... */ | ||
69 | #include <asm/io.h> /* For inb/outb/... */ | ||
70 | |||
71 | /* Module information */ | ||
72 | #define DRV_NAME "acquirewdt" | ||
73 | #define PFX DRV_NAME ": " | ||
66 | #define WATCHDOG_NAME "Acquire WDT" | 74 | #define WATCHDOG_NAME "Acquire WDT" |
67 | #define PFX WATCHDOG_NAME ": " | ||
68 | #define WATCHDOG_HEARTBEAT 0 /* There is no way to see what the correct time-out period is */ | 75 | #define WATCHDOG_HEARTBEAT 0 /* There is no way to see what the correct time-out period is */ |
69 | 76 | ||
77 | /* internal variables */ | ||
78 | static struct platform_device *acq_platform_device; /* the watchdog platform device */ | ||
70 | static unsigned long acq_is_open; | 79 | static unsigned long acq_is_open; |
71 | static char expect_close; | 80 | static char expect_close; |
72 | 81 | ||
73 | /* | 82 | /* module parameters */ |
74 | * You must set these - there is no sane way to probe for this board. | 83 | static int wdt_stop = 0x43; /* You must set this - there is no sane way to probe for this board. */ |
75 | */ | ||
76 | |||
77 | static int wdt_stop = 0x43; | ||
78 | module_param(wdt_stop, int, 0); | 84 | module_param(wdt_stop, int, 0); |
79 | MODULE_PARM_DESC(wdt_stop, "Acquire WDT 'stop' io port (default 0x43)"); | 85 | MODULE_PARM_DESC(wdt_stop, "Acquire WDT 'stop' io port (default 0x43)"); |
80 | 86 | ||
81 | static int wdt_start = 0x443; | 87 | static int wdt_start = 0x443; /* You must set this - there is no sane way to probe for this board. */ |
82 | module_param(wdt_start, int, 0); | 88 | module_param(wdt_start, int, 0); |
83 | MODULE_PARM_DESC(wdt_start, "Acquire WDT 'start' io port (default 0x443)"); | 89 | MODULE_PARM_DESC(wdt_start, "Acquire WDT 'start' io port (default 0x443)"); |
84 | 90 | ||
85 | static int nowayout = WATCHDOG_NOWAYOUT; | 91 | static int nowayout = WATCHDOG_NOWAYOUT; |
86 | module_param(nowayout, int, 0); | 92 | module_param(nowayout, int, 0); |
87 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 93 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
88 | 94 | ||
89 | /* | 95 | /* |
90 | * Kernel methods. | 96 | * Watchdog Operations |
91 | */ | 97 | */ |
92 | 98 | ||
93 | static void acq_keepalive(void) | 99 | static void acq_keepalive(void) |
@@ -103,7 +109,7 @@ static void acq_stop(void) | |||
103 | } | 109 | } |
104 | 110 | ||
105 | /* | 111 | /* |
106 | * /dev/watchdog handling. | 112 | * /dev/watchdog handling |
107 | */ | 113 | */ |
108 | 114 | ||
109 | static ssize_t acq_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) | 115 | static ssize_t acq_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) |
@@ -143,7 +149,7 @@ static int acq_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
143 | { | 149 | { |
144 | .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, | 150 | .options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE, |
145 | .firmware_version = 1, | 151 | .firmware_version = 1, |
146 | .identity = "Acquire WDT", | 152 | .identity = WATCHDOG_NAME, |
147 | }; | 153 | }; |
148 | 154 | ||
149 | switch(cmd) | 155 | switch(cmd) |
@@ -214,20 +220,6 @@ static int acq_close(struct inode *inode, struct file *file) | |||
214 | } | 220 | } |
215 | 221 | ||
216 | /* | 222 | /* |
217 | * Notifier for system down | ||
218 | */ | ||
219 | |||
220 | static int acq_notify_sys(struct notifier_block *this, unsigned long code, | ||
221 | void *unused) | ||
222 | { | ||
223 | if(code==SYS_DOWN || code==SYS_HALT) { | ||
224 | /* Turn the WDT off */ | ||
225 | acq_stop(); | ||
226 | } | ||
227 | return NOTIFY_DONE; | ||
228 | } | ||
229 | |||
230 | /* | ||
231 | * Kernel Interfaces | 223 | * Kernel Interfaces |
232 | */ | 224 | */ |
233 | 225 | ||
@@ -240,29 +232,20 @@ static const struct file_operations acq_fops = { | |||
240 | .release = acq_close, | 232 | .release = acq_close, |
241 | }; | 233 | }; |
242 | 234 | ||
243 | static struct miscdevice acq_miscdev= | 235 | static struct miscdevice acq_miscdev = { |
244 | { | 236 | .minor = WATCHDOG_MINOR, |
245 | .minor = WATCHDOG_MINOR, | 237 | .name = "watchdog", |
246 | .name = "watchdog", | 238 | .fops = &acq_fops, |
247 | .fops = &acq_fops, | ||
248 | }; | 239 | }; |
249 | 240 | ||
250 | /* | 241 | /* |
251 | * The WDT card needs to learn about soft shutdowns in order to | 242 | * Init & exit routines |
252 | * turn the timebomb registers off. | ||
253 | */ | 243 | */ |
254 | 244 | ||
255 | static struct notifier_block acq_notifier = | 245 | static int __devinit acq_probe(struct platform_device *dev) |
256 | { | ||
257 | .notifier_call = acq_notify_sys, | ||
258 | }; | ||
259 | |||
260 | static int __init acq_init(void) | ||
261 | { | 246 | { |
262 | int ret; | 247 | int ret; |
263 | 248 | ||
264 | printk(KERN_INFO "WDT driver for Acquire single board computer initialising.\n"); | ||
265 | |||
266 | if (wdt_stop != wdt_start) { | 249 | if (wdt_stop != wdt_start) { |
267 | if (!request_region(wdt_stop, 1, WATCHDOG_NAME)) { | 250 | if (!request_region(wdt_stop, 1, WATCHDOG_NAME)) { |
268 | printk (KERN_ERR PFX "I/O address 0x%04x already in use\n", | 251 | printk (KERN_ERR PFX "I/O address 0x%04x already in use\n", |
@@ -279,18 +262,11 @@ static int __init acq_init(void) | |||
279 | goto unreg_stop; | 262 | goto unreg_stop; |
280 | } | 263 | } |
281 | 264 | ||
282 | ret = register_reboot_notifier(&acq_notifier); | ||
283 | if (ret != 0) { | ||
284 | printk (KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", | ||
285 | ret); | ||
286 | goto unreg_regions; | ||
287 | } | ||
288 | |||
289 | ret = misc_register(&acq_miscdev); | 265 | ret = misc_register(&acq_miscdev); |
290 | if (ret != 0) { | 266 | if (ret != 0) { |
291 | printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", | 267 | printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", |
292 | WATCHDOG_MINOR, ret); | 268 | WATCHDOG_MINOR, ret); |
293 | goto unreg_reboot; | 269 | goto unreg_regions; |
294 | } | 270 | } |
295 | 271 | ||
296 | printk (KERN_INFO PFX "initialized. (nowayout=%d)\n", | 272 | printk (KERN_INFO PFX "initialized. (nowayout=%d)\n", |
@@ -298,8 +274,6 @@ static int __init acq_init(void) | |||
298 | 274 | ||
299 | return 0; | 275 | return 0; |
300 | 276 | ||
301 | unreg_reboot: | ||
302 | unregister_reboot_notifier(&acq_notifier); | ||
303 | unreg_regions: | 277 | unreg_regions: |
304 | release_region(wdt_start, 1); | 278 | release_region(wdt_start, 1); |
305 | unreg_stop: | 279 | unreg_stop: |
@@ -309,13 +283,60 @@ out: | |||
309 | return ret; | 283 | return ret; |
310 | } | 284 | } |
311 | 285 | ||
312 | static void __exit acq_exit(void) | 286 | static int __devexit acq_remove(struct platform_device *dev) |
313 | { | 287 | { |
314 | misc_deregister(&acq_miscdev); | 288 | misc_deregister(&acq_miscdev); |
315 | unregister_reboot_notifier(&acq_notifier); | 289 | release_region(wdt_start,1); |
316 | if(wdt_stop != wdt_start) | 290 | if(wdt_stop != wdt_start) |
317 | release_region(wdt_stop,1); | 291 | release_region(wdt_stop,1); |
318 | release_region(wdt_start,1); | 292 | |
293 | return 0; | ||
294 | } | ||
295 | |||
296 | static void acq_shutdown(struct platform_device *dev) | ||
297 | { | ||
298 | /* Turn the WDT off if we have a soft shutdown */ | ||
299 | acq_stop(); | ||
300 | } | ||
301 | |||
302 | static struct platform_driver acquirewdt_driver = { | ||
303 | .probe = acq_probe, | ||
304 | .remove = __devexit_p(acq_remove), | ||
305 | .shutdown = acq_shutdown, | ||
306 | .driver = { | ||
307 | .owner = THIS_MODULE, | ||
308 | .name = DRV_NAME, | ||
309 | }, | ||
310 | }; | ||
311 | |||
312 | static int __init acq_init(void) | ||
313 | { | ||
314 | int err; | ||
315 | |||
316 | printk(KERN_INFO "WDT driver for Acquire single board computer initialising.\n"); | ||
317 | |||
318 | err = platform_driver_register(&acquirewdt_driver); | ||
319 | if (err) | ||
320 | return err; | ||
321 | |||
322 | acq_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0); | ||
323 | if (IS_ERR(acq_platform_device)) { | ||
324 | err = PTR_ERR(acq_platform_device); | ||
325 | goto unreg_platform_driver; | ||
326 | } | ||
327 | |||
328 | return 0; | ||
329 | |||
330 | unreg_platform_driver: | ||
331 | platform_driver_unregister(&acquirewdt_driver); | ||
332 | return err; | ||
333 | } | ||
334 | |||
335 | static void __exit acq_exit(void) | ||
336 | { | ||
337 | platform_device_unregister(acq_platform_device); | ||
338 | platform_driver_unregister(&acquirewdt_driver); | ||
339 | printk(KERN_INFO PFX "Watchdog Module Unloaded.\n"); | ||
319 | } | 340 | } |
320 | 341 | ||
321 | module_init(acq_init); | 342 | module_init(acq_init); |
diff --git a/drivers/char/watchdog/advantechwdt.c b/drivers/char/watchdog/advantechwdt.c index 9d732769ba01..8121cc247343 100644 --- a/drivers/char/watchdog/advantechwdt.c +++ b/drivers/char/watchdog/advantechwdt.c | |||
@@ -35,18 +35,19 @@ | |||
35 | #include <linux/watchdog.h> | 35 | #include <linux/watchdog.h> |
36 | #include <linux/fs.h> | 36 | #include <linux/fs.h> |
37 | #include <linux/ioport.h> | 37 | #include <linux/ioport.h> |
38 | #include <linux/notifier.h> | 38 | #include <linux/platform_device.h> |
39 | #include <linux/reboot.h> | ||
40 | #include <linux/init.h> | 39 | #include <linux/init.h> |
41 | 40 | ||
42 | #include <asm/io.h> | 41 | #include <asm/io.h> |
43 | #include <asm/uaccess.h> | 42 | #include <asm/uaccess.h> |
44 | #include <asm/system.h> | 43 | #include <asm/system.h> |
45 | 44 | ||
45 | #define DRV_NAME "advantechwdt" | ||
46 | #define PFX DRV_NAME ": " | ||
46 | #define WATCHDOG_NAME "Advantech WDT" | 47 | #define WATCHDOG_NAME "Advantech WDT" |
47 | #define PFX WATCHDOG_NAME ": " | ||
48 | #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */ | 48 | #define WATCHDOG_TIMEOUT 60 /* 60 sec default timeout */ |
49 | 49 | ||
50 | static struct platform_device *advwdt_platform_device; /* the watchdog platform device */ | ||
50 | static unsigned long advwdt_is_open; | 51 | static unsigned long advwdt_is_open; |
51 | static char adv_expect_close; | 52 | static char adv_expect_close; |
52 | 53 | ||
@@ -75,10 +76,10 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=63, defaul | |||
75 | 76 | ||
76 | static int nowayout = WATCHDOG_NOWAYOUT; | 77 | static int nowayout = WATCHDOG_NOWAYOUT; |
77 | module_param(nowayout, int, 0); | 78 | module_param(nowayout, int, 0); |
78 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 79 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
79 | 80 | ||
80 | /* | 81 | /* |
81 | * Kernel methods. | 82 | * Watchdog Operations |
82 | */ | 83 | */ |
83 | 84 | ||
84 | static void | 85 | static void |
@@ -94,6 +95,20 @@ advwdt_disable(void) | |||
94 | inb_p(wdt_stop); | 95 | inb_p(wdt_stop); |
95 | } | 96 | } |
96 | 97 | ||
98 | static int | ||
99 | advwdt_set_heartbeat(int t) | ||
100 | { | ||
101 | if ((t < 1) || (t > 63)) | ||
102 | return -EINVAL; | ||
103 | |||
104 | timeout = t; | ||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | /* | ||
109 | * /dev/watchdog handling | ||
110 | */ | ||
111 | |||
97 | static ssize_t | 112 | static ssize_t |
98 | advwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) | 113 | advwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) |
99 | { | 114 | { |
@@ -126,7 +141,7 @@ advwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
126 | static struct watchdog_info ident = { | 141 | static struct watchdog_info ident = { |
127 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, | 142 | .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE, |
128 | .firmware_version = 1, | 143 | .firmware_version = 1, |
129 | .identity = "Advantech WDT", | 144 | .identity = WATCHDOG_NAME, |
130 | }; | 145 | }; |
131 | 146 | ||
132 | switch (cmd) { | 147 | switch (cmd) { |
@@ -146,9 +161,8 @@ advwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
146 | case WDIOC_SETTIMEOUT: | 161 | case WDIOC_SETTIMEOUT: |
147 | if (get_user(new_timeout, p)) | 162 | if (get_user(new_timeout, p)) |
148 | return -EFAULT; | 163 | return -EFAULT; |
149 | if ((new_timeout < 1) || (new_timeout > 63)) | 164 | if (advwdt_set_heartbeat(new_timeout)) |
150 | return -EINVAL; | 165 | return -EINVAL; |
151 | timeout = new_timeout; | ||
152 | advwdt_ping(); | 166 | advwdt_ping(); |
153 | /* Fall */ | 167 | /* Fall */ |
154 | 168 | ||
@@ -209,21 +223,6 @@ advwdt_close(struct inode *inode, struct file *file) | |||
209 | } | 223 | } |
210 | 224 | ||
211 | /* | 225 | /* |
212 | * Notifier for system down | ||
213 | */ | ||
214 | |||
215 | static int | ||
216 | advwdt_notify_sys(struct notifier_block *this, unsigned long code, | ||
217 | void *unused) | ||
218 | { | ||
219 | if (code == SYS_DOWN || code == SYS_HALT) { | ||
220 | /* Turn the WDT off */ | ||
221 | advwdt_disable(); | ||
222 | } | ||
223 | return NOTIFY_DONE; | ||
224 | } | ||
225 | |||
226 | /* | ||
227 | * Kernel Interfaces | 226 | * Kernel Interfaces |
228 | */ | 227 | */ |
229 | 228 | ||
@@ -237,33 +236,20 @@ static const struct file_operations advwdt_fops = { | |||
237 | }; | 236 | }; |
238 | 237 | ||
239 | static struct miscdevice advwdt_miscdev = { | 238 | static struct miscdevice advwdt_miscdev = { |
240 | .minor = WATCHDOG_MINOR, | 239 | .minor = WATCHDOG_MINOR, |
241 | .name = "watchdog", | 240 | .name = "watchdog", |
242 | .fops = &advwdt_fops, | 241 | .fops = &advwdt_fops, |
243 | }; | 242 | }; |
244 | 243 | ||
245 | /* | 244 | /* |
246 | * The WDT needs to learn about soft shutdowns in order to | 245 | * Init & exit routines |
247 | * turn the timebomb registers off. | ||
248 | */ | 246 | */ |
249 | 247 | ||
250 | static struct notifier_block advwdt_notifier = { | 248 | static int __devinit |
251 | .notifier_call = advwdt_notify_sys, | 249 | advwdt_probe(struct platform_device *dev) |
252 | }; | ||
253 | |||
254 | static int __init | ||
255 | advwdt_init(void) | ||
256 | { | 250 | { |
257 | int ret; | 251 | int ret; |
258 | 252 | ||
259 | printk(KERN_INFO "WDT driver for Advantech single board computer initialising.\n"); | ||
260 | |||
261 | if (timeout < 1 || timeout > 63) { | ||
262 | timeout = WATCHDOG_TIMEOUT; | ||
263 | printk (KERN_INFO PFX "timeout value must be 1<=x<=63, using %d\n", | ||
264 | timeout); | ||
265 | } | ||
266 | |||
267 | if (wdt_stop != wdt_start) { | 253 | if (wdt_stop != wdt_start) { |
268 | if (!request_region(wdt_stop, 1, WATCHDOG_NAME)) { | 254 | if (!request_region(wdt_stop, 1, WATCHDOG_NAME)) { |
269 | printk (KERN_ERR PFX "I/O address 0x%04x already in use\n", | 255 | printk (KERN_ERR PFX "I/O address 0x%04x already in use\n", |
@@ -280,18 +266,18 @@ advwdt_init(void) | |||
280 | goto unreg_stop; | 266 | goto unreg_stop; |
281 | } | 267 | } |
282 | 268 | ||
283 | ret = register_reboot_notifier(&advwdt_notifier); | 269 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ |
284 | if (ret != 0) { | 270 | if (advwdt_set_heartbeat(timeout)) { |
285 | printk (KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", | 271 | advwdt_set_heartbeat(WATCHDOG_TIMEOUT); |
286 | ret); | 272 | printk (KERN_INFO PFX "timeout value must be 1<=x<=63, using %d\n", |
287 | goto unreg_regions; | 273 | timeout); |
288 | } | 274 | } |
289 | 275 | ||
290 | ret = misc_register(&advwdt_miscdev); | 276 | ret = misc_register(&advwdt_miscdev); |
291 | if (ret != 0) { | 277 | if (ret != 0) { |
292 | printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", | 278 | printk (KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", |
293 | WATCHDOG_MINOR, ret); | 279 | WATCHDOG_MINOR, ret); |
294 | goto unreg_reboot; | 280 | goto unreg_regions; |
295 | } | 281 | } |
296 | 282 | ||
297 | printk (KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n", | 283 | printk (KERN_INFO PFX "initialized. timeout=%d sec (nowayout=%d)\n", |
@@ -299,8 +285,6 @@ advwdt_init(void) | |||
299 | 285 | ||
300 | out: | 286 | out: |
301 | return ret; | 287 | return ret; |
302 | unreg_reboot: | ||
303 | unregister_reboot_notifier(&advwdt_notifier); | ||
304 | unreg_regions: | 288 | unreg_regions: |
305 | release_region(wdt_start, 1); | 289 | release_region(wdt_start, 1); |
306 | unreg_stop: | 290 | unreg_stop: |
@@ -309,14 +293,64 @@ unreg_stop: | |||
309 | goto out; | 293 | goto out; |
310 | } | 294 | } |
311 | 295 | ||
312 | static void __exit | 296 | static int __devexit |
313 | advwdt_exit(void) | 297 | advwdt_remove(struct platform_device *dev) |
314 | { | 298 | { |
315 | misc_deregister(&advwdt_miscdev); | 299 | misc_deregister(&advwdt_miscdev); |
316 | unregister_reboot_notifier(&advwdt_notifier); | 300 | release_region(wdt_start,1); |
317 | if(wdt_stop != wdt_start) | 301 | if(wdt_stop != wdt_start) |
318 | release_region(wdt_stop,1); | 302 | release_region(wdt_stop,1); |
319 | release_region(wdt_start,1); | 303 | |
304 | return 0; | ||
305 | } | ||
306 | |||
307 | static void | ||
308 | advwdt_shutdown(struct platform_device *dev) | ||
309 | { | ||
310 | /* Turn the WDT off if we have a soft shutdown */ | ||
311 | advwdt_disable(); | ||
312 | } | ||
313 | |||
314 | static struct platform_driver advwdt_driver = { | ||
315 | .probe = advwdt_probe, | ||
316 | .remove = __devexit_p(advwdt_remove), | ||
317 | .shutdown = advwdt_shutdown, | ||
318 | .driver = { | ||
319 | .owner = THIS_MODULE, | ||
320 | .name = DRV_NAME, | ||
321 | }, | ||
322 | }; | ||
323 | |||
324 | static int __init | ||
325 | advwdt_init(void) | ||
326 | { | ||
327 | int err; | ||
328 | |||
329 | printk(KERN_INFO "WDT driver for Advantech single board computer initialising.\n"); | ||
330 | |||
331 | err = platform_driver_register(&advwdt_driver); | ||
332 | if (err) | ||
333 | return err; | ||
334 | |||
335 | advwdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0); | ||
336 | if (IS_ERR(advwdt_platform_device)) { | ||
337 | err = PTR_ERR(advwdt_platform_device); | ||
338 | goto unreg_platform_driver; | ||
339 | } | ||
340 | |||
341 | return 0; | ||
342 | |||
343 | unreg_platform_driver: | ||
344 | platform_driver_unregister(&advwdt_driver); | ||
345 | return err; | ||
346 | } | ||
347 | |||
348 | static void __exit | ||
349 | advwdt_exit(void) | ||
350 | { | ||
351 | platform_device_unregister(advwdt_platform_device); | ||
352 | platform_driver_unregister(&advwdt_driver); | ||
353 | printk(KERN_INFO PFX "Watchdog Module Unloaded.\n"); | ||
320 | } | 354 | } |
321 | 355 | ||
322 | module_init(advwdt_init); | 356 | module_init(advwdt_init); |
diff --git a/drivers/char/watchdog/alim1535_wdt.c b/drivers/char/watchdog/alim1535_wdt.c index 01b0d132ee41..e3f6a7d0c83d 100644 --- a/drivers/char/watchdog/alim1535_wdt.c +++ b/drivers/char/watchdog/alim1535_wdt.c | |||
@@ -40,7 +40,7 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (0<timeout<18000, defaul | |||
40 | 40 | ||
41 | static int nowayout = WATCHDOG_NOWAYOUT; | 41 | static int nowayout = WATCHDOG_NOWAYOUT; |
42 | module_param(nowayout, int, 0); | 42 | module_param(nowayout, int, 0); |
43 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 43 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
44 | 44 | ||
45 | /* | 45 | /* |
46 | * ali_start - start watchdog countdown | 46 | * ali_start - start watchdog countdown |
diff --git a/drivers/char/watchdog/alim7101_wdt.c b/drivers/char/watchdog/alim7101_wdt.c index e5b2c2ee292c..67aed9f8c362 100644 --- a/drivers/char/watchdog/alim7101_wdt.c +++ b/drivers/char/watchdog/alim7101_wdt.c | |||
@@ -69,7 +69,7 @@ module_param(use_gpio, int, 0); | |||
69 | MODULE_PARM_DESC(use_gpio, "Use the gpio watchdog. (required by old cobalt boards)"); | 69 | MODULE_PARM_DESC(use_gpio, "Use the gpio watchdog. (required by old cobalt boards)"); |
70 | 70 | ||
71 | static void wdt_timer_ping(unsigned long); | 71 | static void wdt_timer_ping(unsigned long); |
72 | static struct timer_list timer; | 72 | static DEFINE_TIMER(timer, wdt_timer_ping, 0, 1); |
73 | static unsigned long next_heartbeat; | 73 | static unsigned long next_heartbeat; |
74 | static unsigned long wdt_is_open; | 74 | static unsigned long wdt_is_open; |
75 | static char wdt_expect_close; | 75 | static char wdt_expect_close; |
@@ -78,7 +78,7 @@ static struct pci_dev *alim7101_pmu; | |||
78 | static int nowayout = WATCHDOG_NOWAYOUT; | 78 | static int nowayout = WATCHDOG_NOWAYOUT; |
79 | module_param(nowayout, int, 0); | 79 | module_param(nowayout, int, 0); |
80 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" | 80 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" |
81 | __stringify(CONFIG_WATCHDOG_NOWAYOUT) ")"); | 81 | __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
82 | 82 | ||
83 | /* | 83 | /* |
84 | * Whack the dog | 84 | * Whack the dog |
@@ -108,8 +108,7 @@ static void wdt_timer_ping(unsigned long data) | |||
108 | printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); | 108 | printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); |
109 | } | 109 | } |
110 | /* Re-set the timer interval */ | 110 | /* Re-set the timer interval */ |
111 | timer.expires = jiffies + WDT_INTERVAL; | 111 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
112 | add_timer(&timer); | ||
113 | } | 112 | } |
114 | 113 | ||
115 | /* | 114 | /* |
@@ -147,9 +146,7 @@ static void wdt_startup(void) | |||
147 | wdt_change(WDT_ENABLE); | 146 | wdt_change(WDT_ENABLE); |
148 | 147 | ||
149 | /* Start the timer */ | 148 | /* Start the timer */ |
150 | timer.expires = jiffies + WDT_INTERVAL; | 149 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
151 | add_timer(&timer); | ||
152 | |||
153 | 150 | ||
154 | printk(KERN_INFO PFX "Watchdog timer is now enabled.\n"); | 151 | printk(KERN_INFO PFX "Watchdog timer is now enabled.\n"); |
155 | } | 152 | } |
@@ -380,10 +377,6 @@ static int __init alim7101_wdt_init(void) | |||
380 | timeout); | 377 | timeout); |
381 | } | 378 | } |
382 | 379 | ||
383 | init_timer(&timer); | ||
384 | timer.function = wdt_timer_ping; | ||
385 | timer.data = 1; | ||
386 | |||
387 | rc = misc_register(&wdt_miscdev); | 380 | rc = misc_register(&wdt_miscdev); |
388 | if (rc) { | 381 | if (rc) { |
389 | printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", | 382 | printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", |
diff --git a/drivers/char/watchdog/cpu5wdt.c b/drivers/char/watchdog/cpu5wdt.c index 00bdabb90f27..bcd7e36ca0aa 100644 --- a/drivers/char/watchdog/cpu5wdt.c +++ b/drivers/char/watchdog/cpu5wdt.c | |||
@@ -80,10 +80,8 @@ static void cpu5wdt_trigger(unsigned long unused) | |||
80 | outb(1, port + CPU5WDT_TRIGGER_REG); | 80 | outb(1, port + CPU5WDT_TRIGGER_REG); |
81 | 81 | ||
82 | /* requeue?? */ | 82 | /* requeue?? */ |
83 | if( cpu5wdt_device.queue && ticks ) { | 83 | if (cpu5wdt_device.queue && ticks) |
84 | cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL; | 84 | mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL); |
85 | add_timer(&cpu5wdt_device.timer); | ||
86 | } | ||
87 | else { | 85 | else { |
88 | /* ticks doesn't matter anyway */ | 86 | /* ticks doesn't matter anyway */ |
89 | complete(&cpu5wdt_device.stop); | 87 | complete(&cpu5wdt_device.stop); |
@@ -109,8 +107,7 @@ static void cpu5wdt_start(void) | |||
109 | outb(1, port + CPU5WDT_MODE_REG); | 107 | outb(1, port + CPU5WDT_MODE_REG); |
110 | outb(0, port + CPU5WDT_RESET_REG); | 108 | outb(0, port + CPU5WDT_RESET_REG); |
111 | outb(0, port + CPU5WDT_ENABLE_REG); | 109 | outb(0, port + CPU5WDT_ENABLE_REG); |
112 | cpu5wdt_device.timer.expires = jiffies + CPU5WDT_INTERVAL; | 110 | mod_timer(&cpu5wdt_device.timer, jiffies + CPU5WDT_INTERVAL); |
113 | add_timer(&cpu5wdt_device.timer); | ||
114 | } | 111 | } |
115 | /* if process dies, counter is not decremented */ | 112 | /* if process dies, counter is not decremented */ |
116 | cpu5wdt_device.running++; | 113 | cpu5wdt_device.running++; |
@@ -245,9 +242,7 @@ static int __devinit cpu5wdt_init(void) | |||
245 | 242 | ||
246 | clear_bit(0, &cpu5wdt_device.inuse); | 243 | clear_bit(0, &cpu5wdt_device.inuse); |
247 | 244 | ||
248 | init_timer(&cpu5wdt_device.timer); | 245 | setup_timer(&cpu5wdt_device.timer, cpu5wdt_trigger, 0); |
249 | cpu5wdt_device.timer.function = cpu5wdt_trigger; | ||
250 | cpu5wdt_device.timer.data = 0; | ||
251 | 246 | ||
252 | cpu5wdt_device.default_ticks = ticks; | 247 | cpu5wdt_device.default_ticks = ticks; |
253 | 248 | ||
diff --git a/drivers/char/watchdog/eurotechwdt.c b/drivers/char/watchdog/eurotechwdt.c index e228d6e173ce..f70387f01b2b 100644 --- a/drivers/char/watchdog/eurotechwdt.c +++ b/drivers/char/watchdog/eurotechwdt.c | |||
@@ -73,7 +73,7 @@ static char *ev = "int"; | |||
73 | 73 | ||
74 | static int nowayout = WATCHDOG_NOWAYOUT; | 74 | static int nowayout = WATCHDOG_NOWAYOUT; |
75 | module_param(nowayout, int, 0); | 75 | module_param(nowayout, int, 0); |
76 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 76 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
77 | 77 | ||
78 | /* | 78 | /* |
79 | * Some symbolic names | 79 | * Some symbolic names |
diff --git a/drivers/char/watchdog/i6300esb.c b/drivers/char/watchdog/i6300esb.c index fb64df4d7c87..c5982502c03d 100644 --- a/drivers/char/watchdog/i6300esb.c +++ b/drivers/char/watchdog/i6300esb.c | |||
@@ -91,7 +91,7 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, d | |||
91 | 91 | ||
92 | static int nowayout = WATCHDOG_NOWAYOUT; | 92 | static int nowayout = WATCHDOG_NOWAYOUT; |
93 | module_param(nowayout, int, 0); | 93 | module_param(nowayout, int, 0); |
94 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 94 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
95 | 95 | ||
96 | /* | 96 | /* |
97 | * Some i6300ESB specific functions | 97 | * Some i6300ESB specific functions |
diff --git a/drivers/char/watchdog/i8xx_tco.c b/drivers/char/watchdog/i8xx_tco.c index e0627d79707b..a62ef48a15ae 100644 --- a/drivers/char/watchdog/i8xx_tco.c +++ b/drivers/char/watchdog/i8xx_tco.c | |||
@@ -109,7 +109,7 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39, def | |||
109 | 109 | ||
110 | static int nowayout = WATCHDOG_NOWAYOUT; | 110 | static int nowayout = WATCHDOG_NOWAYOUT; |
111 | module_param(nowayout, int, 0); | 111 | module_param(nowayout, int, 0); |
112 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 112 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
113 | 113 | ||
114 | /* | 114 | /* |
115 | * Some TCO specific functions | 115 | * Some TCO specific functions |
diff --git a/drivers/char/watchdog/iTCO_wdt.c b/drivers/char/watchdog/iTCO_wdt.c index fd8a44a08cd3..3c9684ccd2f9 100644 --- a/drivers/char/watchdog/iTCO_wdt.c +++ b/drivers/char/watchdog/iTCO_wdt.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets) | 2 | * intel TCO Watchdog Driver (Used in i82801 and i6300ESB chipsets) |
3 | * | 3 | * |
4 | * (c) Copyright 2006 Wim Van Sebroeck <wim@iguana.be>. | 4 | * (c) Copyright 2006-2007 Wim Van Sebroeck <wim@iguana.be>. |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
@@ -49,7 +49,7 @@ | |||
49 | /* Module and version information */ | 49 | /* Module and version information */ |
50 | #define DRV_NAME "iTCO_wdt" | 50 | #define DRV_NAME "iTCO_wdt" |
51 | #define DRV_VERSION "1.01" | 51 | #define DRV_VERSION "1.01" |
52 | #define DRV_RELDATE "11-Nov-2006" | 52 | #define DRV_RELDATE "21-Jan-2007" |
53 | #define PFX DRV_NAME ": " | 53 | #define PFX DRV_NAME ": " |
54 | 54 | ||
55 | /* Includes */ | 55 | /* Includes */ |
@@ -187,7 +187,7 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<heartbeat<39 (TCO | |||
187 | 187 | ||
188 | static int nowayout = WATCHDOG_NOWAYOUT; | 188 | static int nowayout = WATCHDOG_NOWAYOUT; |
189 | module_param(nowayout, int, 0); | 189 | module_param(nowayout, int, 0); |
190 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 190 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
191 | 191 | ||
192 | /* iTCO Vendor Specific Support hooks */ | 192 | /* iTCO Vendor Specific Support hooks */ |
193 | #ifdef CONFIG_ITCO_VENDOR_SUPPORT | 193 | #ifdef CONFIG_ITCO_VENDOR_SUPPORT |
diff --git a/drivers/char/watchdog/ib700wdt.c b/drivers/char/watchdog/ib700wdt.c index c1ed209a138c..c3a60f52ccb9 100644 --- a/drivers/char/watchdog/ib700wdt.c +++ b/drivers/char/watchdog/ib700wdt.c | |||
@@ -3,8 +3,8 @@ | |||
3 | * | 3 | * |
4 | * (c) Copyright 2001 Charles Howes <chowes@vsol.net> | 4 | * (c) Copyright 2001 Charles Howes <chowes@vsol.net> |
5 | * | 5 | * |
6 | * Based on advantechwdt.c which is based on acquirewdt.c which | 6 | * Based on advantechwdt.c which is based on acquirewdt.c which |
7 | * is based on wdt.c. | 7 | * is based on wdt.c. |
8 | * | 8 | * |
9 | * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl> | 9 | * (c) Copyright 2000-2001 Marek Michalkiewicz <marekm@linux.org.pl> |
10 | * | 10 | * |
@@ -25,9 +25,9 @@ | |||
25 | * | 25 | * |
26 | * (c) Copyright 1995 Alan Cox <alan@redhat.com> | 26 | * (c) Copyright 1995 Alan Cox <alan@redhat.com> |
27 | * | 27 | * |
28 | * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com> | 28 | * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com> |
29 | * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT | 29 | * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT |
30 | * Added timeout module option to override default | 30 | * Added timeout module option to override default |
31 | * | 31 | * |
32 | */ | 32 | */ |
33 | 33 | ||
@@ -36,22 +36,24 @@ | |||
36 | #include <linux/miscdevice.h> | 36 | #include <linux/miscdevice.h> |
37 | #include <linux/watchdog.h> | 37 | #include <linux/watchdog.h> |
38 | #include <linux/ioport.h> | 38 | #include <linux/ioport.h> |
39 | #include <linux/notifier.h> | ||
40 | #include <linux/fs.h> | 39 | #include <linux/fs.h> |
41 | #include <linux/reboot.h> | ||
42 | #include <linux/init.h> | 40 | #include <linux/init.h> |
43 | #include <linux/spinlock.h> | 41 | #include <linux/spinlock.h> |
44 | #include <linux/moduleparam.h> | 42 | #include <linux/moduleparam.h> |
43 | #include <linux/platform_device.h> | ||
45 | 44 | ||
46 | #include <asm/io.h> | 45 | #include <asm/io.h> |
47 | #include <asm/uaccess.h> | 46 | #include <asm/uaccess.h> |
48 | #include <asm/system.h> | 47 | #include <asm/system.h> |
49 | 48 | ||
49 | static struct platform_device *ibwdt_platform_device; | ||
50 | static unsigned long ibwdt_is_open; | 50 | static unsigned long ibwdt_is_open; |
51 | static spinlock_t ibwdt_lock; | 51 | static spinlock_t ibwdt_lock; |
52 | static char expect_close; | 52 | static char expect_close; |
53 | 53 | ||
54 | #define PFX "ib700wdt: " | 54 | /* Module information */ |
55 | #define DRV_NAME "ib700wdt" | ||
56 | #define PFX DRV_NAME ": " | ||
55 | 57 | ||
56 | /* | 58 | /* |
57 | * | 59 | * |
@@ -118,20 +120,51 @@ static int wd_margin = WD_TIMO; | |||
118 | 120 | ||
119 | static int nowayout = WATCHDOG_NOWAYOUT; | 121 | static int nowayout = WATCHDOG_NOWAYOUT; |
120 | module_param(nowayout, int, 0); | 122 | module_param(nowayout, int, 0); |
121 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 123 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
122 | 124 | ||
123 | 125 | ||
124 | /* | 126 | /* |
125 | * Kernel methods. | 127 | * Watchdog Operations |
126 | */ | 128 | */ |
127 | 129 | ||
128 | static void | 130 | static void |
129 | ibwdt_ping(void) | 131 | ibwdt_ping(void) |
130 | { | 132 | { |
133 | spin_lock(&ibwdt_lock); | ||
134 | |||
131 | /* Write a watchdog value */ | 135 | /* Write a watchdog value */ |
132 | outb_p(wd_margin, WDT_START); | 136 | outb_p(wd_margin, WDT_START); |
137 | |||
138 | spin_unlock(&ibwdt_lock); | ||
133 | } | 139 | } |
134 | 140 | ||
141 | static void | ||
142 | ibwdt_disable(void) | ||
143 | { | ||
144 | spin_lock(&ibwdt_lock); | ||
145 | outb_p(0, WDT_STOP); | ||
146 | spin_unlock(&ibwdt_lock); | ||
147 | } | ||
148 | |||
149 | static int | ||
150 | ibwdt_set_heartbeat(int t) | ||
151 | { | ||
152 | int i; | ||
153 | |||
154 | if ((t < 0) || (t > 30)) | ||
155 | return -EINVAL; | ||
156 | |||
157 | for (i = 0x0F; i > -1; i--) | ||
158 | if (wd_times[i] > t) | ||
159 | break; | ||
160 | wd_margin = i; | ||
161 | return 0; | ||
162 | } | ||
163 | |||
164 | /* | ||
165 | * /dev/watchdog handling | ||
166 | */ | ||
167 | |||
135 | static ssize_t | 168 | static ssize_t |
136 | ibwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) | 169 | ibwdt_write(struct file *file, const char __user *buf, size_t count, loff_t *ppos) |
137 | { | 170 | { |
@@ -159,7 +192,7 @@ static int | |||
159 | ibwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | 192 | ibwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, |
160 | unsigned long arg) | 193 | unsigned long arg) |
161 | { | 194 | { |
162 | int i, new_margin; | 195 | int new_margin; |
163 | void __user *argp = (void __user *)arg; | 196 | void __user *argp = (void __user *)arg; |
164 | int __user *p = argp; | 197 | int __user *p = argp; |
165 | 198 | ||
@@ -176,6 +209,7 @@ ibwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
176 | break; | 209 | break; |
177 | 210 | ||
178 | case WDIOC_GETSTATUS: | 211 | case WDIOC_GETSTATUS: |
212 | case WDIOC_GETBOOTSTATUS: | ||
179 | return put_user(0, p); | 213 | return put_user(0, p); |
180 | 214 | ||
181 | case WDIOC_KEEPALIVE: | 215 | case WDIOC_KEEPALIVE: |
@@ -185,18 +219,33 @@ ibwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
185 | case WDIOC_SETTIMEOUT: | 219 | case WDIOC_SETTIMEOUT: |
186 | if (get_user(new_margin, p)) | 220 | if (get_user(new_margin, p)) |
187 | return -EFAULT; | 221 | return -EFAULT; |
188 | if ((new_margin < 0) || (new_margin > 30)) | 222 | if (ibwdt_set_heartbeat(new_margin)) |
189 | return -EINVAL; | 223 | return -EINVAL; |
190 | for (i = 0x0F; i > -1; i--) | ||
191 | if (wd_times[i] > new_margin) | ||
192 | break; | ||
193 | wd_margin = i; | ||
194 | ibwdt_ping(); | 224 | ibwdt_ping(); |
195 | /* Fall */ | 225 | /* Fall */ |
196 | 226 | ||
197 | case WDIOC_GETTIMEOUT: | 227 | case WDIOC_GETTIMEOUT: |
198 | return put_user(wd_times[wd_margin], p); | 228 | return put_user(wd_times[wd_margin], p); |
199 | break; | 229 | |
230 | case WDIOC_SETOPTIONS: | ||
231 | { | ||
232 | int options, retval = -EINVAL; | ||
233 | |||
234 | if (get_user(options, p)) | ||
235 | return -EFAULT; | ||
236 | |||
237 | if (options & WDIOS_DISABLECARD) { | ||
238 | ibwdt_disable(); | ||
239 | retval = 0; | ||
240 | } | ||
241 | |||
242 | if (options & WDIOS_ENABLECARD) { | ||
243 | ibwdt_ping(); | ||
244 | retval = 0; | ||
245 | } | ||
246 | |||
247 | return retval; | ||
248 | } | ||
200 | 249 | ||
201 | default: | 250 | default: |
202 | return -ENOTTY; | 251 | return -ENOTTY; |
@@ -207,9 +256,7 @@ ibwdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |||
207 | static int | 256 | static int |
208 | ibwdt_open(struct inode *inode, struct file *file) | 257 | ibwdt_open(struct inode *inode, struct file *file) |
209 | { | 258 | { |
210 | spin_lock(&ibwdt_lock); | ||
211 | if (test_and_set_bit(0, &ibwdt_is_open)) { | 259 | if (test_and_set_bit(0, &ibwdt_is_open)) { |
212 | spin_unlock(&ibwdt_lock); | ||
213 | return -EBUSY; | 260 | return -EBUSY; |
214 | } | 261 | } |
215 | if (nowayout) | 262 | if (nowayout) |
@@ -217,41 +264,24 @@ ibwdt_open(struct inode *inode, struct file *file) | |||
217 | 264 | ||
218 | /* Activate */ | 265 | /* Activate */ |
219 | ibwdt_ping(); | 266 | ibwdt_ping(); |
220 | spin_unlock(&ibwdt_lock); | ||
221 | return nonseekable_open(inode, file); | 267 | return nonseekable_open(inode, file); |
222 | } | 268 | } |
223 | 269 | ||
224 | static int | 270 | static int |
225 | ibwdt_close(struct inode *inode, struct file *file) | 271 | ibwdt_close(struct inode *inode, struct file *file) |
226 | { | 272 | { |
227 | spin_lock(&ibwdt_lock); | 273 | if (expect_close == 42) { |
228 | if (expect_close == 42) | 274 | ibwdt_disable(); |
229 | outb_p(0, WDT_STOP); | 275 | } else { |
230 | else | ||
231 | printk(KERN_CRIT PFX "WDT device closed unexpectedly. WDT will not stop!\n"); | 276 | printk(KERN_CRIT PFX "WDT device closed unexpectedly. WDT will not stop!\n"); |
232 | 277 | ibwdt_ping(); | |
278 | } | ||
233 | clear_bit(0, &ibwdt_is_open); | 279 | clear_bit(0, &ibwdt_is_open); |
234 | expect_close = 0; | 280 | expect_close = 0; |
235 | spin_unlock(&ibwdt_lock); | ||
236 | return 0; | 281 | return 0; |
237 | } | 282 | } |
238 | 283 | ||
239 | /* | 284 | /* |
240 | * Notifier for system down | ||
241 | */ | ||
242 | |||
243 | static int | ||
244 | ibwdt_notify_sys(struct notifier_block *this, unsigned long code, | ||
245 | void *unused) | ||
246 | { | ||
247 | if (code == SYS_DOWN || code == SYS_HALT) { | ||
248 | /* Turn the WDT off */ | ||
249 | outb_p(0, WDT_STOP); | ||
250 | } | ||
251 | return NOTIFY_DONE; | ||
252 | } | ||
253 | |||
254 | /* | ||
255 | * Kernel Interfaces | 285 | * Kernel Interfaces |
256 | */ | 286 | */ |
257 | 287 | ||
@@ -271,26 +301,14 @@ static struct miscdevice ibwdt_miscdev = { | |||
271 | }; | 301 | }; |
272 | 302 | ||
273 | /* | 303 | /* |
274 | * The WDT needs to learn about soft shutdowns in order to | 304 | * Init & exit routines |
275 | * turn the timebomb registers off. | ||
276 | */ | 305 | */ |
277 | 306 | ||
278 | static struct notifier_block ibwdt_notifier = { | 307 | static int __devinit ibwdt_probe(struct platform_device *dev) |
279 | .notifier_call = ibwdt_notify_sys, | ||
280 | }; | ||
281 | |||
282 | static int __init ibwdt_init(void) | ||
283 | { | 308 | { |
284 | int res; | 309 | int res; |
285 | 310 | ||
286 | printk(KERN_INFO PFX "WDT driver for IB700 single board computer initialising.\n"); | ||
287 | |||
288 | spin_lock_init(&ibwdt_lock); | 311 | spin_lock_init(&ibwdt_lock); |
289 | res = misc_register(&ibwdt_miscdev); | ||
290 | if (res) { | ||
291 | printk (KERN_ERR PFX "failed to register misc device\n"); | ||
292 | goto out_nomisc; | ||
293 | } | ||
294 | 312 | ||
295 | #if WDT_START != WDT_STOP | 313 | #if WDT_START != WDT_STOP |
296 | if (!request_region(WDT_STOP, 1, "IB700 WDT")) { | 314 | if (!request_region(WDT_STOP, 1, "IB700 WDT")) { |
@@ -305,34 +323,78 @@ static int __init ibwdt_init(void) | |||
305 | res = -EIO; | 323 | res = -EIO; |
306 | goto out_nostartreg; | 324 | goto out_nostartreg; |
307 | } | 325 | } |
308 | res = register_reboot_notifier(&ibwdt_notifier); | 326 | |
327 | res = misc_register(&ibwdt_miscdev); | ||
309 | if (res) { | 328 | if (res) { |
310 | printk (KERN_ERR PFX "Failed to register reboot notifier.\n"); | 329 | printk (KERN_ERR PFX "failed to register misc device\n"); |
311 | goto out_noreboot; | 330 | goto out_nomisc; |
312 | } | 331 | } |
313 | return 0; | 332 | return 0; |
314 | 333 | ||
315 | out_noreboot: | 334 | out_nomisc: |
316 | release_region(WDT_START, 1); | 335 | release_region(WDT_START, 1); |
317 | out_nostartreg: | 336 | out_nostartreg: |
318 | #if WDT_START != WDT_STOP | 337 | #if WDT_START != WDT_STOP |
319 | release_region(WDT_STOP, 1); | 338 | release_region(WDT_STOP, 1); |
320 | #endif | 339 | #endif |
321 | out_nostopreg: | 340 | out_nostopreg: |
322 | misc_deregister(&ibwdt_miscdev); | ||
323 | out_nomisc: | ||
324 | return res; | 341 | return res; |
325 | } | 342 | } |
326 | 343 | ||
327 | static void __exit | 344 | static int __devexit ibwdt_remove(struct platform_device *dev) |
328 | ibwdt_exit(void) | ||
329 | { | 345 | { |
330 | misc_deregister(&ibwdt_miscdev); | 346 | misc_deregister(&ibwdt_miscdev); |
331 | unregister_reboot_notifier(&ibwdt_notifier); | 347 | release_region(WDT_START,1); |
332 | #if WDT_START != WDT_STOP | 348 | #if WDT_START != WDT_STOP |
333 | release_region(WDT_STOP,1); | 349 | release_region(WDT_STOP,1); |
334 | #endif | 350 | #endif |
335 | release_region(WDT_START,1); | 351 | return 0; |
352 | } | ||
353 | |||
354 | static void ibwdt_shutdown(struct platform_device *dev) | ||
355 | { | ||
356 | /* Turn the WDT off if we have a soft shutdown */ | ||
357 | ibwdt_disable(); | ||
358 | } | ||
359 | |||
360 | static struct platform_driver ibwdt_driver = { | ||
361 | .probe = ibwdt_probe, | ||
362 | .remove = __devexit_p(ibwdt_remove), | ||
363 | .shutdown = ibwdt_shutdown, | ||
364 | .driver = { | ||
365 | .owner = THIS_MODULE, | ||
366 | .name = DRV_NAME, | ||
367 | }, | ||
368 | }; | ||
369 | |||
370 | static int __init ibwdt_init(void) | ||
371 | { | ||
372 | int err; | ||
373 | |||
374 | printk(KERN_INFO PFX "WDT driver for IB700 single board computer initialising.\n"); | ||
375 | |||
376 | err = platform_driver_register(&ibwdt_driver); | ||
377 | if (err) | ||
378 | return err; | ||
379 | |||
380 | ibwdt_platform_device = platform_device_register_simple(DRV_NAME, -1, NULL, 0); | ||
381 | if (IS_ERR(ibwdt_platform_device)) { | ||
382 | err = PTR_ERR(ibwdt_platform_device); | ||
383 | goto unreg_platform_driver; | ||
384 | } | ||
385 | |||
386 | return 0; | ||
387 | |||
388 | unreg_platform_driver: | ||
389 | platform_driver_unregister(&ibwdt_driver); | ||
390 | return err; | ||
391 | } | ||
392 | |||
393 | static void __exit ibwdt_exit(void) | ||
394 | { | ||
395 | platform_device_unregister(ibwdt_platform_device); | ||
396 | platform_driver_unregister(&ibwdt_driver); | ||
397 | printk(KERN_INFO PFX "Watchdog Module Unloaded.\n"); | ||
336 | } | 398 | } |
337 | 399 | ||
338 | module_init(ibwdt_init); | 400 | module_init(ibwdt_init); |
diff --git a/drivers/char/watchdog/ibmasr.c b/drivers/char/watchdog/ibmasr.c index dd6760f1a23b..8195f5023d85 100644 --- a/drivers/char/watchdog/ibmasr.c +++ b/drivers/char/watchdog/ibmasr.c | |||
@@ -396,7 +396,7 @@ module_init(ibmasr_init); | |||
396 | module_exit(ibmasr_exit); | 396 | module_exit(ibmasr_exit); |
397 | 397 | ||
398 | module_param(nowayout, int, 0); | 398 | module_param(nowayout, int, 0); |
399 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 399 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
400 | 400 | ||
401 | MODULE_DESCRIPTION("IBM Automatic Server Restart driver"); | 401 | MODULE_DESCRIPTION("IBM Automatic Server Restart driver"); |
402 | MODULE_AUTHOR("Andrey Panin"); | 402 | MODULE_AUTHOR("Andrey Panin"); |
diff --git a/drivers/char/watchdog/indydog.c b/drivers/char/watchdog/indydog.c index 0bc239308989..788245bdaa7f 100644 --- a/drivers/char/watchdog/indydog.c +++ b/drivers/char/watchdog/indydog.c | |||
@@ -32,7 +32,7 @@ static int indydog_alive; | |||
32 | 32 | ||
33 | static int nowayout = WATCHDOG_NOWAYOUT; | 33 | static int nowayout = WATCHDOG_NOWAYOUT; |
34 | module_param(nowayout, int, 0); | 34 | module_param(nowayout, int, 0); |
35 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 35 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
36 | 36 | ||
37 | static void indydog_start(void) | 37 | static void indydog_start(void) |
38 | { | 38 | { |
diff --git a/drivers/char/watchdog/machzwd.c b/drivers/char/watchdog/machzwd.c index 4d730fdbd528..81fb3dec180f 100644 --- a/drivers/char/watchdog/machzwd.c +++ b/drivers/char/watchdog/machzwd.c | |||
@@ -95,7 +95,7 @@ MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | |||
95 | 95 | ||
96 | static int nowayout = WATCHDOG_NOWAYOUT; | 96 | static int nowayout = WATCHDOG_NOWAYOUT; |
97 | module_param(nowayout, int, 0); | 97 | module_param(nowayout, int, 0); |
98 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 98 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
99 | 99 | ||
100 | #define PFX "machzwd" | 100 | #define PFX "machzwd" |
101 | 101 | ||
@@ -118,12 +118,14 @@ static int action = 0; | |||
118 | module_param(action, int, 0); | 118 | module_param(action, int, 0); |
119 | MODULE_PARM_DESC(action, "after watchdog resets, generate: 0 = RESET(*) 1 = SMI 2 = NMI 3 = SCI"); | 119 | MODULE_PARM_DESC(action, "after watchdog resets, generate: 0 = RESET(*) 1 = SMI 2 = NMI 3 = SCI"); |
120 | 120 | ||
121 | static void zf_ping(unsigned long data); | ||
122 | |||
121 | static int zf_action = GEN_RESET; | 123 | static int zf_action = GEN_RESET; |
122 | static unsigned long zf_is_open; | 124 | static unsigned long zf_is_open; |
123 | static char zf_expect_close; | 125 | static char zf_expect_close; |
124 | static spinlock_t zf_lock; | 126 | static spinlock_t zf_lock; |
125 | static spinlock_t zf_port_lock; | 127 | static spinlock_t zf_port_lock; |
126 | static struct timer_list zf_timer; | 128 | static DEFINE_TIMER(zf_timer, zf_ping, 0, 0); |
127 | static unsigned long next_heartbeat = 0; | 129 | static unsigned long next_heartbeat = 0; |
128 | 130 | ||
129 | 131 | ||
@@ -220,9 +222,7 @@ static void zf_timer_on(void) | |||
220 | next_heartbeat = jiffies + ZF_USER_TIMEO; | 222 | next_heartbeat = jiffies + ZF_USER_TIMEO; |
221 | 223 | ||
222 | /* start the timer for internal ping */ | 224 | /* start the timer for internal ping */ |
223 | zf_timer.expires = jiffies + ZF_HW_TIMEO; | 225 | mod_timer(&zf_timer, jiffies + ZF_HW_TIMEO); |
224 | |||
225 | add_timer(&zf_timer); | ||
226 | 226 | ||
227 | /* start watchdog timer */ | 227 | /* start watchdog timer */ |
228 | ctrl_reg = zf_get_control(); | 228 | ctrl_reg = zf_get_control(); |
@@ -260,8 +260,7 @@ static void zf_ping(unsigned long data) | |||
260 | zf_set_control(ctrl_reg); | 260 | zf_set_control(ctrl_reg); |
261 | spin_unlock_irqrestore(&zf_port_lock, flags); | 261 | spin_unlock_irqrestore(&zf_port_lock, flags); |
262 | 262 | ||
263 | zf_timer.expires = jiffies + ZF_HW_TIMEO; | 263 | mod_timer(&zf_timer, jiffies + ZF_HW_TIMEO); |
264 | add_timer(&zf_timer); | ||
265 | }else{ | 264 | }else{ |
266 | printk(KERN_CRIT PFX ": I will reset your machine\n"); | 265 | printk(KERN_CRIT PFX ": I will reset your machine\n"); |
267 | } | 266 | } |
@@ -465,11 +464,6 @@ static int __init zf_init(void) | |||
465 | zf_set_status(0); | 464 | zf_set_status(0); |
466 | zf_set_control(0); | 465 | zf_set_control(0); |
467 | 466 | ||
468 | /* this is the timer that will do the hard work */ | ||
469 | init_timer(&zf_timer); | ||
470 | zf_timer.function = zf_ping; | ||
471 | zf_timer.data = 0; | ||
472 | |||
473 | return 0; | 467 | return 0; |
474 | 468 | ||
475 | no_reboot: | 469 | no_reboot: |
diff --git a/drivers/char/watchdog/mixcomwd.c b/drivers/char/watchdog/mixcomwd.c index c2dac0aa1d62..f35e2848aa3e 100644 --- a/drivers/char/watchdog/mixcomwd.c +++ b/drivers/char/watchdog/mixcomwd.c | |||
@@ -56,16 +56,18 @@ static int mixcomwd_ioports[] = { 0x180, 0x280, 0x380, 0x000 }; | |||
56 | #define FLASHCOM_WATCHDOG_OFFSET 0x4 | 56 | #define FLASHCOM_WATCHDOG_OFFSET 0x4 |
57 | #define FLASHCOM_ID 0x18 | 57 | #define FLASHCOM_ID 0x18 |
58 | 58 | ||
59 | static void mixcomwd_timerfun(unsigned long d); | ||
60 | |||
59 | static unsigned long mixcomwd_opened; /* long req'd for setbit --RR */ | 61 | static unsigned long mixcomwd_opened; /* long req'd for setbit --RR */ |
60 | 62 | ||
61 | static int watchdog_port; | 63 | static int watchdog_port; |
62 | static int mixcomwd_timer_alive; | 64 | static int mixcomwd_timer_alive; |
63 | static DEFINE_TIMER(mixcomwd_timer, NULL, 0, 0); | 65 | static DEFINE_TIMER(mixcomwd_timer, mixcomwd_timerfun, 0, 0); |
64 | static char expect_close; | 66 | static char expect_close; |
65 | 67 | ||
66 | static int nowayout = WATCHDOG_NOWAYOUT; | 68 | static int nowayout = WATCHDOG_NOWAYOUT; |
67 | module_param(nowayout, int, 0); | 69 | module_param(nowayout, int, 0); |
68 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 70 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
69 | 71 | ||
70 | static void mixcomwd_ping(void) | 72 | static void mixcomwd_ping(void) |
71 | { | 73 | { |
@@ -77,7 +79,7 @@ static void mixcomwd_timerfun(unsigned long d) | |||
77 | { | 79 | { |
78 | mixcomwd_ping(); | 80 | mixcomwd_ping(); |
79 | 81 | ||
80 | mod_timer(&mixcomwd_timer,jiffies+ 5*HZ); | 82 | mod_timer(&mixcomwd_timer, jiffies + 5 * HZ); |
81 | } | 83 | } |
82 | 84 | ||
83 | /* | 85 | /* |
@@ -114,12 +116,8 @@ static int mixcomwd_release(struct inode *inode, struct file *file) | |||
114 | printk(KERN_ERR "mixcomwd: release called while internal timer alive"); | 116 | printk(KERN_ERR "mixcomwd: release called while internal timer alive"); |
115 | return -EBUSY; | 117 | return -EBUSY; |
116 | } | 118 | } |
117 | init_timer(&mixcomwd_timer); | ||
118 | mixcomwd_timer.expires=jiffies + 5 * HZ; | ||
119 | mixcomwd_timer.function=mixcomwd_timerfun; | ||
120 | mixcomwd_timer.data=0; | ||
121 | mixcomwd_timer_alive=1; | 119 | mixcomwd_timer_alive=1; |
122 | add_timer(&mixcomwd_timer); | 120 | mod_timer(&mixcomwd_timer, jiffies + 5 * HZ); |
123 | } else { | 121 | } else { |
124 | printk(KERN_CRIT "mixcomwd: WDT device closed unexpectedly. WDT will not stop!\n"); | 122 | printk(KERN_CRIT "mixcomwd: WDT device closed unexpectedly. WDT will not stop!\n"); |
125 | } | 123 | } |
@@ -285,7 +283,7 @@ static void __exit mixcomwd_exit(void) | |||
285 | if(mixcomwd_timer_alive) { | 283 | if(mixcomwd_timer_alive) { |
286 | printk(KERN_WARNING "mixcomwd: I quit now, hardware will" | 284 | printk(KERN_WARNING "mixcomwd: I quit now, hardware will" |
287 | " probably reboot!\n"); | 285 | " probably reboot!\n"); |
288 | del_timer(&mixcomwd_timer); | 286 | del_timer_sync(&mixcomwd_timer); |
289 | mixcomwd_timer_alive=0; | 287 | mixcomwd_timer_alive=0; |
290 | } | 288 | } |
291 | } | 289 | } |
diff --git a/drivers/char/watchdog/pc87413_wdt.c b/drivers/char/watchdog/pc87413_wdt.c index a77a90717ad2..3d3deae0d64b 100644 --- a/drivers/char/watchdog/pc87413_wdt.c +++ b/drivers/char/watchdog/pc87413_wdt.c | |||
@@ -631,5 +631,5 @@ module_param(timeout, int, 0); | |||
631 | MODULE_PARM_DESC(timeout, "Watchdog timeout in minutes (default=" __MODULE_STRING(timeout) ")."); | 631 | MODULE_PARM_DESC(timeout, "Watchdog timeout in minutes (default=" __MODULE_STRING(timeout) ")."); |
632 | 632 | ||
633 | module_param(nowayout, int, 0); | 633 | module_param(nowayout, int, 0); |
634 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 634 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
635 | 635 | ||
diff --git a/drivers/char/watchdog/pcwd.c b/drivers/char/watchdog/pcwd.c index 8e1e6e48e0a7..6e8b5705b5b7 100644 --- a/drivers/char/watchdog/pcwd.c +++ b/drivers/char/watchdog/pcwd.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * PC Watchdog Driver | 2 | * PC Watchdog Driver |
3 | * by Ken Hollis (khollis@bitgate.com) | 3 | * by Ken Hollis (khollis@bitgate.com) |
4 | * | 4 | * |
5 | * Permission granted from Simon Machell (73244.1270@compuserve.com) | 5 | * Permission granted from Simon Machell (smachell@berkprod.com) |
6 | * Written for the Linux Kernel, and GPLed by Ken Hollis | 6 | * Written for the Linux Kernel, and GPLed by Ken Hollis |
7 | * | 7 | * |
8 | * 960107 Added request_region routines, modulized the whole thing. | 8 | * 960107 Added request_region routines, modulized the whole thing. |
@@ -70,8 +70,8 @@ | |||
70 | #include <asm/io.h> /* For inb/outb/... */ | 70 | #include <asm/io.h> /* For inb/outb/... */ |
71 | 71 | ||
72 | /* Module and version information */ | 72 | /* Module and version information */ |
73 | #define WATCHDOG_VERSION "1.17" | 73 | #define WATCHDOG_VERSION "1.18" |
74 | #define WATCHDOG_DATE "12 Feb 2006" | 74 | #define WATCHDOG_DATE "21 Jan 2007" |
75 | #define WATCHDOG_DRIVER_NAME "ISA-PC Watchdog" | 75 | #define WATCHDOG_DRIVER_NAME "ISA-PC Watchdog" |
76 | #define WATCHDOG_NAME "pcwd" | 76 | #define WATCHDOG_NAME "pcwd" |
77 | #define PFX WATCHDOG_NAME ": " | 77 | #define PFX WATCHDOG_NAME ": " |
@@ -132,6 +132,18 @@ | |||
132 | #define CMD_ISA_DELAY_TIME_8SECS 0x0C | 132 | #define CMD_ISA_DELAY_TIME_8SECS 0x0C |
133 | #define CMD_ISA_RESET_RELAYS 0x0D | 133 | #define CMD_ISA_RESET_RELAYS 0x0D |
134 | 134 | ||
135 | /* Watchdog's Dip Switch heartbeat values */ | ||
136 | static const int heartbeat_tbl [] = { | ||
137 | 20, /* OFF-OFF-OFF = 20 Sec */ | ||
138 | 40, /* OFF-OFF-ON = 40 Sec */ | ||
139 | 60, /* OFF-ON-OFF = 1 Min */ | ||
140 | 300, /* OFF-ON-ON = 5 Min */ | ||
141 | 600, /* ON-OFF-OFF = 10 Min */ | ||
142 | 1800, /* ON-OFF-ON = 30 Min */ | ||
143 | 3600, /* ON-ON-OFF = 1 Hour */ | ||
144 | 7200, /* ON-ON-ON = 2 hour */ | ||
145 | }; | ||
146 | |||
135 | /* | 147 | /* |
136 | * We are using an kernel timer to do the pinging of the watchdog | 148 | * We are using an kernel timer to do the pinging of the watchdog |
137 | * every ~500ms. We try to set the internal heartbeat of the | 149 | * every ~500ms. We try to set the internal heartbeat of the |
@@ -167,14 +179,14 @@ static int debug = QUIET; | |||
167 | module_param(debug, int, 0); | 179 | module_param(debug, int, 0); |
168 | MODULE_PARM_DESC(debug, "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)"); | 180 | MODULE_PARM_DESC(debug, "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)"); |
169 | 181 | ||
170 | #define WATCHDOG_HEARTBEAT 60 /* 60 sec default heartbeat */ | 182 | #define WATCHDOG_HEARTBEAT 0 /* default heartbeat = delay-time from dip-switches */ |
171 | static int heartbeat = WATCHDOG_HEARTBEAT; | 183 | static int heartbeat = WATCHDOG_HEARTBEAT; |
172 | module_param(heartbeat, int, 0); | 184 | module_param(heartbeat, int, 0); |
173 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<=heartbeat<=7200, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | 185 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (2<=heartbeat<=7200 or 0=delay-time from dip-switches, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); |
174 | 186 | ||
175 | static int nowayout = WATCHDOG_NOWAYOUT; | 187 | static int nowayout = WATCHDOG_NOWAYOUT; |
176 | module_param(nowayout, int, 0); | 188 | module_param(nowayout, int, 0); |
177 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 189 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
178 | 190 | ||
179 | /* | 191 | /* |
180 | * Internal functions | 192 | * Internal functions |
@@ -831,9 +843,7 @@ static int __devinit pcwatchdog_init(int base_addr) | |||
831 | /* clear the "card caused reboot" flag */ | 843 | /* clear the "card caused reboot" flag */ |
832 | pcwd_clear_status(); | 844 | pcwd_clear_status(); |
833 | 845 | ||
834 | init_timer(&pcwd_private.timer); | 846 | setup_timer(&pcwd_private.timer, pcwd_timer_ping, 0); |
835 | pcwd_private.timer.function = pcwd_timer_ping; | ||
836 | pcwd_private.timer.data = 0; | ||
837 | 847 | ||
838 | /* Disable the board */ | 848 | /* Disable the board */ |
839 | pcwd_stop(); | 849 | pcwd_stop(); |
@@ -844,6 +854,10 @@ static int __devinit pcwatchdog_init(int base_addr) | |||
844 | /* Show info about the card itself */ | 854 | /* Show info about the card itself */ |
845 | pcwd_show_card_info(); | 855 | pcwd_show_card_info(); |
846 | 856 | ||
857 | /* If heartbeat = 0 then we use the heartbeat from the dip-switches */ | ||
858 | if (heartbeat == 0) | ||
859 | heartbeat = heartbeat_tbl[(pcwd_get_option_switches() & 0x07)]; | ||
860 | |||
847 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ | 861 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ |
848 | if (pcwd_set_heartbeat(heartbeat)) { | 862 | if (pcwd_set_heartbeat(heartbeat)) { |
849 | pcwd_set_heartbeat(WATCHDOG_HEARTBEAT); | 863 | pcwd_set_heartbeat(WATCHDOG_HEARTBEAT); |
diff --git a/drivers/char/watchdog/pcwd_pci.c b/drivers/char/watchdog/pcwd_pci.c index f4872c871063..61a89e959642 100644 --- a/drivers/char/watchdog/pcwd_pci.c +++ b/drivers/char/watchdog/pcwd_pci.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Berkshire PCI-PC Watchdog Card Driver | 2 | * Berkshire PCI-PC Watchdog Card Driver |
3 | * | 3 | * |
4 | * (c) Copyright 2003-2005 Wim Van Sebroeck <wim@iguana.be>. | 4 | * (c) Copyright 2003-2007 Wim Van Sebroeck <wim@iguana.be>. |
5 | * | 5 | * |
6 | * Based on source code of the following authors: | 6 | * Based on source code of the following authors: |
7 | * Ken Hollis <kenji@bitgate.com>, | 7 | * Ken Hollis <kenji@bitgate.com>, |
@@ -51,8 +51,8 @@ | |||
51 | #include <asm/io.h> /* For inb/outb/... */ | 51 | #include <asm/io.h> /* For inb/outb/... */ |
52 | 52 | ||
53 | /* Module and version information */ | 53 | /* Module and version information */ |
54 | #define WATCHDOG_VERSION "1.02" | 54 | #define WATCHDOG_VERSION "1.03" |
55 | #define WATCHDOG_DATE "03 Sep 2005" | 55 | #define WATCHDOG_DATE "21 Jan 2007" |
56 | #define WATCHDOG_DRIVER_NAME "PCI-PC Watchdog" | 56 | #define WATCHDOG_DRIVER_NAME "PCI-PC Watchdog" |
57 | #define WATCHDOG_NAME "pcwd_pci" | 57 | #define WATCHDOG_NAME "pcwd_pci" |
58 | #define PFX WATCHDOG_NAME ": " | 58 | #define PFX WATCHDOG_NAME ": " |
@@ -96,6 +96,18 @@ | |||
96 | #define CMD_WRITE_WATCHDOG_TIMEOUT 0x19 | 96 | #define CMD_WRITE_WATCHDOG_TIMEOUT 0x19 |
97 | #define CMD_GET_CLEAR_RESET_COUNT 0x84 | 97 | #define CMD_GET_CLEAR_RESET_COUNT 0x84 |
98 | 98 | ||
99 | /* Watchdog's Dip Switch heartbeat values */ | ||
100 | static const int heartbeat_tbl [] = { | ||
101 | 5, /* OFF-OFF-OFF = 5 Sec */ | ||
102 | 10, /* OFF-OFF-ON = 10 Sec */ | ||
103 | 30, /* OFF-ON-OFF = 30 Sec */ | ||
104 | 60, /* OFF-ON-ON = 1 Min */ | ||
105 | 300, /* ON-OFF-OFF = 5 Min */ | ||
106 | 600, /* ON-OFF-ON = 10 Min */ | ||
107 | 1800, /* ON-ON-OFF = 30 Min */ | ||
108 | 3600, /* ON-ON-ON = 1 hour */ | ||
109 | }; | ||
110 | |||
99 | /* We can only use 1 card due to the /dev/watchdog restriction */ | 111 | /* We can only use 1 card due to the /dev/watchdog restriction */ |
100 | static int cards_found; | 112 | static int cards_found; |
101 | 113 | ||
@@ -119,14 +131,14 @@ static int debug = QUIET; | |||
119 | module_param(debug, int, 0); | 131 | module_param(debug, int, 0); |
120 | MODULE_PARM_DESC(debug, "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)"); | 132 | MODULE_PARM_DESC(debug, "Debug level: 0=Quiet, 1=Verbose, 2=Debug (default=0)"); |
121 | 133 | ||
122 | #define WATCHDOG_HEARTBEAT 2 /* 2 sec default heartbeat */ | 134 | #define WATCHDOG_HEARTBEAT 0 /* default heartbeat = delay-time from dip-switches */ |
123 | static int heartbeat = WATCHDOG_HEARTBEAT; | 135 | static int heartbeat = WATCHDOG_HEARTBEAT; |
124 | module_param(heartbeat, int, 0); | 136 | module_param(heartbeat, int, 0); |
125 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (0<heartbeat<65536, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | 137 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (0<heartbeat<65536 or 0=delay-time from dip-switches, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); |
126 | 138 | ||
127 | static int nowayout = WATCHDOG_NOWAYOUT; | 139 | static int nowayout = WATCHDOG_NOWAYOUT; |
128 | module_param(nowayout, int, 0); | 140 | module_param(nowayout, int, 0); |
129 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 141 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
130 | 142 | ||
131 | /* | 143 | /* |
132 | * Internal functions | 144 | * Internal functions |
@@ -286,7 +298,9 @@ static int pcipcwd_stop(void) | |||
286 | static int pcipcwd_keepalive(void) | 298 | static int pcipcwd_keepalive(void) |
287 | { | 299 | { |
288 | /* Re-trigger watchdog by writing to port 0 */ | 300 | /* Re-trigger watchdog by writing to port 0 */ |
301 | spin_lock(&pcipcwd_private.io_lock); | ||
289 | outb_p(0x42, pcipcwd_private.io_addr); /* send out any data */ | 302 | outb_p(0x42, pcipcwd_private.io_addr); /* send out any data */ |
303 | spin_unlock(&pcipcwd_private.io_lock); | ||
290 | 304 | ||
291 | if (debug >= DEBUG) | 305 | if (debug >= DEBUG) |
292 | printk(KERN_DEBUG PFX "Watchdog keepalive signal send\n"); | 306 | printk(KERN_DEBUG PFX "Watchdog keepalive signal send\n"); |
@@ -373,7 +387,9 @@ static int pcipcwd_get_temperature(int *temperature) | |||
373 | if (!pcipcwd_private.supports_temp) | 387 | if (!pcipcwd_private.supports_temp) |
374 | return -ENODEV; | 388 | return -ENODEV; |
375 | 389 | ||
390 | spin_lock(&pcipcwd_private.io_lock); | ||
376 | *temperature = inb_p(pcipcwd_private.io_addr); | 391 | *temperature = inb_p(pcipcwd_private.io_addr); |
392 | spin_unlock(&pcipcwd_private.io_lock); | ||
377 | 393 | ||
378 | /* | 394 | /* |
379 | * Convert celsius to fahrenheit, since this was | 395 | * Convert celsius to fahrenheit, since this was |
@@ -711,6 +727,10 @@ static int __devinit pcipcwd_card_init(struct pci_dev *pdev, | |||
711 | /* Show info about the card itself */ | 727 | /* Show info about the card itself */ |
712 | pcipcwd_show_card_info(); | 728 | pcipcwd_show_card_info(); |
713 | 729 | ||
730 | /* If heartbeat = 0 then we use the heartbeat from the dip-switches */ | ||
731 | if (heartbeat == 0) | ||
732 | heartbeat = heartbeat_tbl[(pcipcwd_get_option_switches() & 0x07)]; | ||
733 | |||
714 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ | 734 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ |
715 | if (pcipcwd_set_heartbeat(heartbeat)) { | 735 | if (pcipcwd_set_heartbeat(heartbeat)) { |
716 | pcipcwd_set_heartbeat(WATCHDOG_HEARTBEAT); | 736 | pcipcwd_set_heartbeat(WATCHDOG_HEARTBEAT); |
@@ -798,6 +818,8 @@ static int __init pcipcwd_init_module(void) | |||
798 | static void __exit pcipcwd_cleanup_module(void) | 818 | static void __exit pcipcwd_cleanup_module(void) |
799 | { | 819 | { |
800 | pci_unregister_driver(&pcipcwd_driver); | 820 | pci_unregister_driver(&pcipcwd_driver); |
821 | |||
822 | printk(KERN_INFO PFX "Watchdog Module Unloaded.\n"); | ||
801 | } | 823 | } |
802 | 824 | ||
803 | module_init(pcipcwd_init_module); | 825 | module_init(pcipcwd_init_module); |
diff --git a/drivers/char/watchdog/pcwd_usb.c b/drivers/char/watchdog/pcwd_usb.c index 2da5ac99687c..31037f9c9ffe 100644 --- a/drivers/char/watchdog/pcwd_usb.c +++ b/drivers/char/watchdog/pcwd_usb.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Berkshire USB-PC Watchdog Card Driver | 2 | * Berkshire USB-PC Watchdog Card Driver |
3 | * | 3 | * |
4 | * (c) Copyright 2004 Wim Van Sebroeck <wim@iguana.be>. | 4 | * (c) Copyright 2004-2007 Wim Van Sebroeck <wim@iguana.be>. |
5 | * | 5 | * |
6 | * Based on source code of the following authors: | 6 | * Based on source code of the following authors: |
7 | * Ken Hollis <kenji@bitgate.com>, | 7 | * Ken Hollis <kenji@bitgate.com>, |
@@ -24,26 +24,25 @@ | |||
24 | * http://www.berkprod.com/ or http://www.pcwatchdog.com/ | 24 | * http://www.berkprod.com/ or http://www.pcwatchdog.com/ |
25 | */ | 25 | */ |
26 | 26 | ||
27 | #include <linux/kernel.h> | 27 | #include <linux/module.h> /* For module specific items */ |
28 | #include <linux/errno.h> | 28 | #include <linux/moduleparam.h> /* For new moduleparam's */ |
29 | #include <linux/init.h> | 29 | #include <linux/types.h> /* For standard types (like size_t) */ |
30 | #include <linux/slab.h> | 30 | #include <linux/errno.h> /* For the -ENODEV/... values */ |
31 | #include <linux/module.h> | 31 | #include <linux/kernel.h> /* For printk/panic/... */ |
32 | #include <linux/moduleparam.h> | 32 | #include <linux/delay.h> /* For mdelay function */ |
33 | #include <linux/types.h> | 33 | #include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR) */ |
34 | #include <linux/delay.h> | 34 | #include <linux/watchdog.h> /* For the watchdog specific items */ |
35 | #include <linux/miscdevice.h> | 35 | #include <linux/notifier.h> /* For notifier support */ |
36 | #include <linux/watchdog.h> | 36 | #include <linux/reboot.h> /* For reboot_notifier stuff */ |
37 | #include <linux/notifier.h> | 37 | #include <linux/init.h> /* For __init/__exit/... */ |
38 | #include <linux/reboot.h> | 38 | #include <linux/fs.h> /* For file operations */ |
39 | #include <linux/fs.h> | 39 | #include <linux/usb.h> /* For USB functions */ |
40 | #include <linux/smp_lock.h> | 40 | #include <linux/slab.h> /* For kmalloc, ... */ |
41 | #include <linux/completion.h> | 41 | #include <linux/mutex.h> /* For mutex locking */ |
42 | #include <asm/uaccess.h> | ||
43 | #include <linux/usb.h> | ||
44 | #include <linux/mutex.h> | ||
45 | #include <linux/hid.h> /* For HID_REQ_SET_REPORT & HID_DT_REPORT */ | 42 | #include <linux/hid.h> /* For HID_REQ_SET_REPORT & HID_DT_REPORT */ |
46 | 43 | ||
44 | #include <asm/uaccess.h> /* For copy_to_user/put_user/... */ | ||
45 | |||
47 | 46 | ||
48 | #ifdef CONFIG_USB_DEBUG | 47 | #ifdef CONFIG_USB_DEBUG |
49 | static int debug = 1; | 48 | static int debug = 1; |
@@ -57,8 +56,8 @@ | |||
57 | 56 | ||
58 | 57 | ||
59 | /* Module and Version Information */ | 58 | /* Module and Version Information */ |
60 | #define DRIVER_VERSION "1.01" | 59 | #define DRIVER_VERSION "1.02" |
61 | #define DRIVER_DATE "15 Mar 2005" | 60 | #define DRIVER_DATE "21 Jan 2007" |
62 | #define DRIVER_AUTHOR "Wim Van Sebroeck <wim@iguana.be>" | 61 | #define DRIVER_AUTHOR "Wim Van Sebroeck <wim@iguana.be>" |
63 | #define DRIVER_DESC "Berkshire USB-PC Watchdog driver" | 62 | #define DRIVER_DESC "Berkshire USB-PC Watchdog driver" |
64 | #define DRIVER_LICENSE "GPL" | 63 | #define DRIVER_LICENSE "GPL" |
@@ -75,14 +74,14 @@ MODULE_ALIAS_MISCDEV(TEMP_MINOR); | |||
75 | module_param(debug, int, 0); | 74 | module_param(debug, int, 0); |
76 | MODULE_PARM_DESC(debug, "Debug enabled or not"); | 75 | MODULE_PARM_DESC(debug, "Debug enabled or not"); |
77 | 76 | ||
78 | #define WATCHDOG_HEARTBEAT 2 /* 2 sec default heartbeat */ | 77 | #define WATCHDOG_HEARTBEAT 0 /* default heartbeat = delay-time from dip-switches */ |
79 | static int heartbeat = WATCHDOG_HEARTBEAT; | 78 | static int heartbeat = WATCHDOG_HEARTBEAT; |
80 | module_param(heartbeat, int, 0); | 79 | module_param(heartbeat, int, 0); |
81 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (0<heartbeat<65536, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | 80 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (0<heartbeat<65536 or 0=delay-time from dip-switches, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); |
82 | 81 | ||
83 | static int nowayout = WATCHDOG_NOWAYOUT; | 82 | static int nowayout = WATCHDOG_NOWAYOUT; |
84 | module_param(nowayout, int, 0); | 83 | module_param(nowayout, int, 0); |
85 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 84 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
86 | 85 | ||
87 | /* The vendor and product id's for the USB-PC Watchdog card */ | 86 | /* The vendor and product id's for the USB-PC Watchdog card */ |
88 | #define USB_PCWD_VENDOR_ID 0x0c98 | 87 | #define USB_PCWD_VENDOR_ID 0x0c98 |
@@ -110,6 +109,18 @@ MODULE_DEVICE_TABLE (usb, usb_pcwd_table); | |||
110 | #define CMD_ENABLE_WATCHDOG 0x30 /* Enable / Disable Watchdog */ | 109 | #define CMD_ENABLE_WATCHDOG 0x30 /* Enable / Disable Watchdog */ |
111 | #define CMD_DISABLE_WATCHDOG CMD_ENABLE_WATCHDOG | 110 | #define CMD_DISABLE_WATCHDOG CMD_ENABLE_WATCHDOG |
112 | 111 | ||
112 | /* Watchdog's Dip Switch heartbeat values */ | ||
113 | static const int heartbeat_tbl [] = { | ||
114 | 5, /* OFF-OFF-OFF = 5 Sec */ | ||
115 | 10, /* OFF-OFF-ON = 10 Sec */ | ||
116 | 30, /* OFF-ON-OFF = 30 Sec */ | ||
117 | 60, /* OFF-ON-ON = 1 Min */ | ||
118 | 300, /* ON-OFF-OFF = 5 Min */ | ||
119 | 600, /* ON-OFF-ON = 10 Min */ | ||
120 | 1800, /* ON-ON-OFF = 30 Min */ | ||
121 | 3600, /* ON-ON-ON = 1 hour */ | ||
122 | }; | ||
123 | |||
113 | /* We can only use 1 card due to the /dev/watchdog restriction */ | 124 | /* We can only use 1 card due to the /dev/watchdog restriction */ |
114 | static int cards_found; | 125 | static int cards_found; |
115 | 126 | ||
@@ -682,6 +693,10 @@ static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_devi | |||
682 | ((option_switches & 0x10) ? "ON" : "OFF"), | 693 | ((option_switches & 0x10) ? "ON" : "OFF"), |
683 | ((option_switches & 0x08) ? "ON" : "OFF")); | 694 | ((option_switches & 0x08) ? "ON" : "OFF")); |
684 | 695 | ||
696 | /* If heartbeat = 0 then we use the heartbeat from the dip-switches */ | ||
697 | if (heartbeat == 0) | ||
698 | heartbeat = heartbeat_tbl[(option_switches & 0x07)]; | ||
699 | |||
685 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ | 700 | /* Check that the heartbeat value is within it's range ; if not reset to the default */ |
686 | if (usb_pcwd_set_heartbeat(usb_pcwd, heartbeat)) { | 701 | if (usb_pcwd_set_heartbeat(usb_pcwd, heartbeat)) { |
687 | usb_pcwd_set_heartbeat(usb_pcwd, WATCHDOG_HEARTBEAT); | 702 | usb_pcwd_set_heartbeat(usb_pcwd, WATCHDOG_HEARTBEAT); |
diff --git a/drivers/char/watchdog/pnx4008_wdt.c b/drivers/char/watchdog/pnx4008_wdt.c index ff6f1ca1e5e7..5991add702b0 100644 --- a/drivers/char/watchdog/pnx4008_wdt.c +++ b/drivers/char/watchdog/pnx4008_wdt.c | |||
@@ -283,7 +283,8 @@ static int pnx4008_wdt_probe(struct platform_device *pdev) | |||
283 | wdt_base = (void __iomem *)IO_ADDRESS(res->start); | 283 | wdt_base = (void __iomem *)IO_ADDRESS(res->start); |
284 | 284 | ||
285 | wdt_clk = clk_get(&pdev->dev, "wdt_ck"); | 285 | wdt_clk = clk_get(&pdev->dev, "wdt_ck"); |
286 | if (!wdt_clk) { | 286 | if (IS_ERR(wdt_clk)) { |
287 | ret = PTR_ERR(wdt_clk); | ||
287 | release_resource(wdt_mem); | 288 | release_resource(wdt_mem); |
288 | kfree(wdt_mem); | 289 | kfree(wdt_mem); |
289 | goto out; | 290 | goto out; |
diff --git a/drivers/char/watchdog/s3c2410_wdt.c b/drivers/char/watchdog/s3c2410_wdt.c index 18cb050c3862..dff6cb5dc9a7 100644 --- a/drivers/char/watchdog/s3c2410_wdt.c +++ b/drivers/char/watchdog/s3c2410_wdt.c | |||
@@ -78,7 +78,7 @@ MODULE_PARM_DESC(tmr_margin, "Watchdog tmr_margin in seconds. default=" __MODULE | |||
78 | 78 | ||
79 | MODULE_PARM_DESC(tmr_atboot, "Watchdog is started at boot time if set to 1, default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT)); | 79 | MODULE_PARM_DESC(tmr_atboot, "Watchdog is started at boot time if set to 1, default=" __MODULE_STRING(CONFIG_S3C2410_WATCHDOG_ATBOOT)); |
80 | 80 | ||
81 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 81 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
82 | 82 | ||
83 | MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default depends on ONLY_TESTING)"); | 83 | MODULE_PARM_DESC(soft_noboot, "Watchdog action, set to 1 to ignore reboots, 0 to reboot (default depends on ONLY_TESTING)"); |
84 | 84 | ||
@@ -366,13 +366,15 @@ static int s3c2410wdt_probe(struct platform_device *pdev) | |||
366 | wdt_mem = request_mem_region(res->start, size, pdev->name); | 366 | wdt_mem = request_mem_region(res->start, size, pdev->name); |
367 | if (wdt_mem == NULL) { | 367 | if (wdt_mem == NULL) { |
368 | printk(KERN_INFO PFX "failed to get memory region\n"); | 368 | printk(KERN_INFO PFX "failed to get memory region\n"); |
369 | return -ENOENT; | 369 | ret = -ENOENT; |
370 | goto err_req; | ||
370 | } | 371 | } |
371 | 372 | ||
372 | wdt_base = ioremap(res->start, size); | 373 | wdt_base = ioremap(res->start, size); |
373 | if (wdt_base == 0) { | 374 | if (wdt_base == 0) { |
374 | printk(KERN_INFO PFX "failed to ioremap() region\n"); | 375 | printk(KERN_INFO PFX "failed to ioremap() region\n"); |
375 | return -EINVAL; | 376 | ret = -EINVAL; |
377 | goto err_req; | ||
376 | } | 378 | } |
377 | 379 | ||
378 | DBG("probe: mapped wdt_base=%p\n", wdt_base); | 380 | DBG("probe: mapped wdt_base=%p\n", wdt_base); |
@@ -380,22 +382,21 @@ static int s3c2410wdt_probe(struct platform_device *pdev) | |||
380 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | 382 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
381 | if (res == NULL) { | 383 | if (res == NULL) { |
382 | printk(KERN_INFO PFX "failed to get irq resource\n"); | 384 | printk(KERN_INFO PFX "failed to get irq resource\n"); |
383 | iounmap(wdt_base); | 385 | ret = -ENOENT; |
384 | return -ENOENT; | 386 | goto err_map; |
385 | } | 387 | } |
386 | 388 | ||
387 | ret = request_irq(res->start, s3c2410wdt_irq, 0, pdev->name, pdev); | 389 | ret = request_irq(res->start, s3c2410wdt_irq, 0, pdev->name, pdev); |
388 | if (ret != 0) { | 390 | if (ret != 0) { |
389 | printk(KERN_INFO PFX "failed to install irq (%d)\n", ret); | 391 | printk(KERN_INFO PFX "failed to install irq (%d)\n", ret); |
390 | iounmap(wdt_base); | 392 | goto err_map; |
391 | return ret; | ||
392 | } | 393 | } |
393 | 394 | ||
394 | wdt_clock = clk_get(&pdev->dev, "watchdog"); | 395 | wdt_clock = clk_get(&pdev->dev, "watchdog"); |
395 | if (wdt_clock == NULL) { | 396 | if (IS_ERR(wdt_clock)) { |
396 | printk(KERN_INFO PFX "failed to find watchdog clock source\n"); | 397 | printk(KERN_INFO PFX "failed to find watchdog clock source\n"); |
397 | iounmap(wdt_base); | 398 | ret = PTR_ERR(wdt_clock); |
398 | return -ENOENT; | 399 | goto err_irq; |
399 | } | 400 | } |
400 | 401 | ||
401 | clk_enable(wdt_clock); | 402 | clk_enable(wdt_clock); |
@@ -418,8 +419,7 @@ static int s3c2410wdt_probe(struct platform_device *pdev) | |||
418 | if (ret) { | 419 | if (ret) { |
419 | printk (KERN_ERR PFX "cannot register miscdev on minor=%d (%d)\n", | 420 | printk (KERN_ERR PFX "cannot register miscdev on minor=%d (%d)\n", |
420 | WATCHDOG_MINOR, ret); | 421 | WATCHDOG_MINOR, ret); |
421 | iounmap(wdt_base); | 422 | goto err_clk; |
422 | return ret; | ||
423 | } | 423 | } |
424 | 424 | ||
425 | if (tmr_atboot && started == 0) { | 425 | if (tmr_atboot && started == 0) { |
@@ -434,26 +434,36 @@ static int s3c2410wdt_probe(struct platform_device *pdev) | |||
434 | } | 434 | } |
435 | 435 | ||
436 | return 0; | 436 | return 0; |
437 | |||
438 | err_clk: | ||
439 | clk_disable(wdt_clock); | ||
440 | clk_put(wdt_clock); | ||
441 | |||
442 | err_irq: | ||
443 | free_irq(wdt_irq->start, pdev); | ||
444 | |||
445 | err_map: | ||
446 | iounmap(wdt_base); | ||
447 | |||
448 | err_req: | ||
449 | release_resource(wdt_mem); | ||
450 | kfree(wdt_mem); | ||
451 | |||
452 | return ret; | ||
437 | } | 453 | } |
438 | 454 | ||
439 | static int s3c2410wdt_remove(struct platform_device *dev) | 455 | static int s3c2410wdt_remove(struct platform_device *dev) |
440 | { | 456 | { |
441 | if (wdt_mem != NULL) { | 457 | release_resource(wdt_mem); |
442 | release_resource(wdt_mem); | 458 | kfree(wdt_mem); |
443 | kfree(wdt_mem); | 459 | wdt_mem = NULL; |
444 | wdt_mem = NULL; | ||
445 | } | ||
446 | 460 | ||
447 | if (wdt_irq != NULL) { | 461 | free_irq(wdt_irq->start, dev); |
448 | free_irq(wdt_irq->start, dev); | 462 | wdt_irq = NULL; |
449 | wdt_irq = NULL; | ||
450 | } | ||
451 | 463 | ||
452 | if (wdt_clock != NULL) { | 464 | clk_disable(wdt_clock); |
453 | clk_disable(wdt_clock); | 465 | clk_put(wdt_clock); |
454 | clk_put(wdt_clock); | 466 | wdt_clock = NULL; |
455 | wdt_clock = NULL; | ||
456 | } | ||
457 | 467 | ||
458 | iounmap(wdt_base); | 468 | iounmap(wdt_base); |
459 | misc_deregister(&s3c2410wdt_miscdev); | 469 | misc_deregister(&s3c2410wdt_miscdev); |
diff --git a/drivers/char/watchdog/sbc60xxwdt.c b/drivers/char/watchdog/sbc60xxwdt.c index c7b2045bc76b..b6282039198c 100644 --- a/drivers/char/watchdog/sbc60xxwdt.c +++ b/drivers/char/watchdog/sbc60xxwdt.c | |||
@@ -100,10 +100,10 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, defau | |||
100 | 100 | ||
101 | static int nowayout = WATCHDOG_NOWAYOUT; | 101 | static int nowayout = WATCHDOG_NOWAYOUT; |
102 | module_param(nowayout, int, 0); | 102 | module_param(nowayout, int, 0); |
103 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 103 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
104 | 104 | ||
105 | static void wdt_timer_ping(unsigned long); | 105 | static void wdt_timer_ping(unsigned long); |
106 | static struct timer_list timer; | 106 | static DEFINE_TIMER(timer, wdt_timer_ping, 0, 0); |
107 | static unsigned long next_heartbeat; | 107 | static unsigned long next_heartbeat; |
108 | static unsigned long wdt_is_open; | 108 | static unsigned long wdt_is_open; |
109 | static char wdt_expect_close; | 109 | static char wdt_expect_close; |
@@ -122,8 +122,7 @@ static void wdt_timer_ping(unsigned long data) | |||
122 | /* Ping the WDT by reading from wdt_start */ | 122 | /* Ping the WDT by reading from wdt_start */ |
123 | inb_p(wdt_start); | 123 | inb_p(wdt_start); |
124 | /* Re-set the timer interval */ | 124 | /* Re-set the timer interval */ |
125 | timer.expires = jiffies + WDT_INTERVAL; | 125 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
126 | add_timer(&timer); | ||
127 | } else { | 126 | } else { |
128 | printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); | 127 | printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); |
129 | } | 128 | } |
@@ -138,8 +137,7 @@ static void wdt_startup(void) | |||
138 | next_heartbeat = jiffies + (timeout * HZ); | 137 | next_heartbeat = jiffies + (timeout * HZ); |
139 | 138 | ||
140 | /* Start the timer */ | 139 | /* Start the timer */ |
141 | timer.expires = jiffies + WDT_INTERVAL; | 140 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
142 | add_timer(&timer); | ||
143 | printk(KERN_INFO PFX "Watchdog timer is now enabled.\n"); | 141 | printk(KERN_INFO PFX "Watchdog timer is now enabled.\n"); |
144 | } | 142 | } |
145 | 143 | ||
@@ -363,10 +361,6 @@ static int __init sbc60xxwdt_init(void) | |||
363 | } | 361 | } |
364 | } | 362 | } |
365 | 363 | ||
366 | init_timer(&timer); | ||
367 | timer.function = wdt_timer_ping; | ||
368 | timer.data = 0; | ||
369 | |||
370 | rc = misc_register(&wdt_miscdev); | 364 | rc = misc_register(&wdt_miscdev); |
371 | if (rc) | 365 | if (rc) |
372 | { | 366 | { |
diff --git a/drivers/char/watchdog/sbc8360.c b/drivers/char/watchdog/sbc8360.c index 41fc6f80c493..67ae42685e75 100644 --- a/drivers/char/watchdog/sbc8360.c +++ b/drivers/char/watchdog/sbc8360.c | |||
@@ -204,7 +204,7 @@ module_param(timeout, int, 0); | |||
204 | MODULE_PARM_DESC(timeout, "Index into timeout table (0-63) (default=27 (60s))"); | 204 | MODULE_PARM_DESC(timeout, "Index into timeout table (0-63) (default=27 (60s))"); |
205 | module_param(nowayout, int, 0); | 205 | module_param(nowayout, int, 0); |
206 | MODULE_PARM_DESC(nowayout, | 206 | MODULE_PARM_DESC(nowayout, |
207 | "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 207 | "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
208 | 208 | ||
209 | /* | 209 | /* |
210 | * Kernel methods. | 210 | * Kernel methods. |
diff --git a/drivers/char/watchdog/sbc_epx_c3.c b/drivers/char/watchdog/sbc_epx_c3.c index 8882b427d24f..82cbd8809a69 100644 --- a/drivers/char/watchdog/sbc_epx_c3.c +++ b/drivers/char/watchdog/sbc_epx_c3.c | |||
@@ -35,7 +35,7 @@ static int epx_c3_alive; | |||
35 | 35 | ||
36 | static int nowayout = WATCHDOG_NOWAYOUT; | 36 | static int nowayout = WATCHDOG_NOWAYOUT; |
37 | module_param(nowayout, int, 0); | 37 | module_param(nowayout, int, 0); |
38 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 38 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
39 | 39 | ||
40 | #define EPXC3_WATCHDOG_CTL_REG 0x1ee /* write 1 to enable, 0 to disable */ | 40 | #define EPXC3_WATCHDOG_CTL_REG 0x1ee /* write 1 to enable, 0 to disable */ |
41 | #define EPXC3_WATCHDOG_PET_REG 0x1ef /* write anything to pet once enabled */ | 41 | #define EPXC3_WATCHDOG_PET_REG 0x1ef /* write anything to pet once enabled */ |
diff --git a/drivers/char/watchdog/sc1200wdt.c b/drivers/char/watchdog/sc1200wdt.c index e3239833e4b0..1e4a8d751a71 100644 --- a/drivers/char/watchdog/sc1200wdt.c +++ b/drivers/char/watchdog/sc1200wdt.c | |||
@@ -92,7 +92,7 @@ MODULE_PARM_DESC(timeout, "range is 0-255 minutes, default is 1"); | |||
92 | 92 | ||
93 | static int nowayout = WATCHDOG_NOWAYOUT; | 93 | static int nowayout = WATCHDOG_NOWAYOUT; |
94 | module_param(nowayout, int, 0); | 94 | module_param(nowayout, int, 0); |
95 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 95 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
96 | 96 | ||
97 | 97 | ||
98 | 98 | ||
diff --git a/drivers/char/watchdog/sc520_wdt.c b/drivers/char/watchdog/sc520_wdt.c index caec37ba750a..2676a43895a7 100644 --- a/drivers/char/watchdog/sc520_wdt.c +++ b/drivers/char/watchdog/sc520_wdt.c | |||
@@ -97,7 +97,7 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, defau | |||
97 | 97 | ||
98 | static int nowayout = WATCHDOG_NOWAYOUT; | 98 | static int nowayout = WATCHDOG_NOWAYOUT; |
99 | module_param(nowayout, int, 0); | 99 | module_param(nowayout, int, 0); |
100 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 100 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
101 | 101 | ||
102 | /* | 102 | /* |
103 | * AMD Elan SC520 - Watchdog Timer Registers | 103 | * AMD Elan SC520 - Watchdog Timer Registers |
@@ -121,7 +121,7 @@ MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CON | |||
121 | static __u16 __iomem *wdtmrctl; | 121 | static __u16 __iomem *wdtmrctl; |
122 | 122 | ||
123 | static void wdt_timer_ping(unsigned long); | 123 | static void wdt_timer_ping(unsigned long); |
124 | static struct timer_list timer; | 124 | static DEFINE_TIMER(timer, wdt_timer_ping, 0, 0); |
125 | static unsigned long next_heartbeat; | 125 | static unsigned long next_heartbeat; |
126 | static unsigned long wdt_is_open; | 126 | static unsigned long wdt_is_open; |
127 | static char wdt_expect_close; | 127 | static char wdt_expect_close; |
@@ -145,8 +145,7 @@ static void wdt_timer_ping(unsigned long data) | |||
145 | spin_unlock(&wdt_spinlock); | 145 | spin_unlock(&wdt_spinlock); |
146 | 146 | ||
147 | /* Re-set the timer interval */ | 147 | /* Re-set the timer interval */ |
148 | timer.expires = jiffies + WDT_INTERVAL; | 148 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
149 | add_timer(&timer); | ||
150 | } else { | 149 | } else { |
151 | printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); | 150 | printk(KERN_WARNING PFX "Heartbeat lost! Will not ping the watchdog\n"); |
152 | } | 151 | } |
@@ -179,8 +178,7 @@ static int wdt_startup(void) | |||
179 | next_heartbeat = jiffies + (timeout * HZ); | 178 | next_heartbeat = jiffies + (timeout * HZ); |
180 | 179 | ||
181 | /* Start the timer */ | 180 | /* Start the timer */ |
182 | timer.expires = jiffies + WDT_INTERVAL; | 181 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
183 | add_timer(&timer); | ||
184 | 182 | ||
185 | /* Start the watchdog */ | 183 | /* Start the watchdog */ |
186 | wdt_config(WDT_ENB | WDT_WRST_ENB | WDT_EXP_SEL_04); | 184 | wdt_config(WDT_ENB | WDT_WRST_ENB | WDT_EXP_SEL_04); |
@@ -389,10 +387,6 @@ static int __init sc520_wdt_init(void) | |||
389 | 387 | ||
390 | spin_lock_init(&wdt_spinlock); | 388 | spin_lock_init(&wdt_spinlock); |
391 | 389 | ||
392 | init_timer(&timer); | ||
393 | timer.function = wdt_timer_ping; | ||
394 | timer.data = 0; | ||
395 | |||
396 | /* Check that the timeout value is within it's range ; if not reset to the default */ | 390 | /* Check that the timeout value is within it's range ; if not reset to the default */ |
397 | if (wdt_set_heartbeat(timeout)) { | 391 | if (wdt_set_heartbeat(timeout)) { |
398 | wdt_set_heartbeat(WATCHDOG_TIMEOUT); | 392 | wdt_set_heartbeat(WATCHDOG_TIMEOUT); |
diff --git a/drivers/char/watchdog/shwdt.c b/drivers/char/watchdog/shwdt.c index dc403629aeb3..cecbedd473a4 100644 --- a/drivers/char/watchdog/shwdt.c +++ b/drivers/char/watchdog/shwdt.c | |||
@@ -65,10 +65,12 @@ static int clock_division_ratio = WTCSR_CKS_4096; | |||
65 | 65 | ||
66 | #define next_ping_period(cks) msecs_to_jiffies(cks - 4) | 66 | #define next_ping_period(cks) msecs_to_jiffies(cks - 4) |
67 | 67 | ||
68 | static void sh_wdt_ping(unsigned long data); | ||
69 | |||
68 | static unsigned long shwdt_is_open; | 70 | static unsigned long shwdt_is_open; |
69 | static struct watchdog_info sh_wdt_info; | 71 | static struct watchdog_info sh_wdt_info; |
70 | static char shwdt_expect_close; | 72 | static char shwdt_expect_close; |
71 | static struct timer_list timer; | 73 | static DEFINE_TIMER(timer, sh_wdt_ping, 0, 0); |
72 | static unsigned long next_heartbeat; | 74 | static unsigned long next_heartbeat; |
73 | 75 | ||
74 | #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */ | 76 | #define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */ |
@@ -433,10 +435,6 @@ static int __init sh_wdt_init(void) | |||
433 | "be 1<=x<=3600, using %d\n", heartbeat); | 435 | "be 1<=x<=3600, using %d\n", heartbeat); |
434 | } | 436 | } |
435 | 437 | ||
436 | init_timer(&timer); | ||
437 | timer.function = sh_wdt_ping; | ||
438 | timer.data = 0; | ||
439 | |||
440 | rc = register_reboot_notifier(&sh_wdt_notifier); | 438 | rc = register_reboot_notifier(&sh_wdt_notifier); |
441 | if (unlikely(rc)) { | 439 | if (unlikely(rc)) { |
442 | printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n", | 440 | printk(KERN_ERR PFX "Can't register reboot notifier (err=%d)\n", |
diff --git a/drivers/char/watchdog/smsc37b787_wdt.c b/drivers/char/watchdog/smsc37b787_wdt.c index a9681d580dd3..d3cb0a766020 100644 --- a/drivers/char/watchdog/smsc37b787_wdt.c +++ b/drivers/char/watchdog/smsc37b787_wdt.c | |||
@@ -624,4 +624,4 @@ module_param(timeout, int, 0); | |||
624 | MODULE_PARM_DESC(timeout, "range is 1-255 units, default is 60"); | 624 | MODULE_PARM_DESC(timeout, "range is 1-255 units, default is 60"); |
625 | 625 | ||
626 | module_param(nowayout, int, 0); | 626 | module_param(nowayout, int, 0); |
627 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 627 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
diff --git a/drivers/char/watchdog/softdog.c b/drivers/char/watchdog/softdog.c index 4067e1f8a368..9c3694909243 100644 --- a/drivers/char/watchdog/softdog.c +++ b/drivers/char/watchdog/softdog.c | |||
@@ -59,7 +59,7 @@ MODULE_PARM_DESC(soft_margin, "Watchdog soft_margin in seconds. (0<soft_margin<6 | |||
59 | 59 | ||
60 | static int nowayout = WATCHDOG_NOWAYOUT; | 60 | static int nowayout = WATCHDOG_NOWAYOUT; |
61 | module_param(nowayout, int, 0); | 61 | module_param(nowayout, int, 0); |
62 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 62 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
63 | 63 | ||
64 | #ifdef ONLY_TESTING | 64 | #ifdef ONLY_TESTING |
65 | static int soft_noboot = 1; | 65 | static int soft_noboot = 1; |
diff --git a/drivers/char/watchdog/w83627hf_wdt.c b/drivers/char/watchdog/w83627hf_wdt.c index 07d4bff27226..337ee42c90dd 100644 --- a/drivers/char/watchdog/w83627hf_wdt.c +++ b/drivers/char/watchdog/w83627hf_wdt.c | |||
@@ -58,7 +58,7 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=63, defaul | |||
58 | 58 | ||
59 | static int nowayout = WATCHDOG_NOWAYOUT; | 59 | static int nowayout = WATCHDOG_NOWAYOUT; |
60 | module_param(nowayout, int, 0); | 60 | module_param(nowayout, int, 0); |
61 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 61 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
62 | 62 | ||
63 | /* | 63 | /* |
64 | * Kernel methods. | 64 | * Kernel methods. |
diff --git a/drivers/char/watchdog/w83697hf_wdt.c b/drivers/char/watchdog/w83697hf_wdt.c index c960ec110dd7..d9e821d08deb 100644 --- a/drivers/char/watchdog/w83697hf_wdt.c +++ b/drivers/char/watchdog/w83697hf_wdt.c | |||
@@ -60,7 +60,7 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=255, defau | |||
60 | 60 | ||
61 | static int nowayout = WATCHDOG_NOWAYOUT; | 61 | static int nowayout = WATCHDOG_NOWAYOUT; |
62 | module_param(nowayout, int, 0); | 62 | module_param(nowayout, int, 0); |
63 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 63 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * Kernel methods. | 66 | * Kernel methods. |
diff --git a/drivers/char/watchdog/w83877f_wdt.c b/drivers/char/watchdog/w83877f_wdt.c index b0e5f84d6baf..3c88fe18f4f4 100644 --- a/drivers/char/watchdog/w83877f_wdt.c +++ b/drivers/char/watchdog/w83877f_wdt.c | |||
@@ -87,10 +87,10 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. (1<=timeout<=3600, defau | |||
87 | 87 | ||
88 | static int nowayout = WATCHDOG_NOWAYOUT; | 88 | static int nowayout = WATCHDOG_NOWAYOUT; |
89 | module_param(nowayout, int, 0); | 89 | module_param(nowayout, int, 0); |
90 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 90 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
91 | 91 | ||
92 | static void wdt_timer_ping(unsigned long); | 92 | static void wdt_timer_ping(unsigned long); |
93 | static struct timer_list timer; | 93 | static DEFINE_TIMER(timer, wdt_timer_ping, 0, 0); |
94 | static unsigned long next_heartbeat; | 94 | static unsigned long next_heartbeat; |
95 | static unsigned long wdt_is_open; | 95 | static unsigned long wdt_is_open; |
96 | static char wdt_expect_close; | 96 | static char wdt_expect_close; |
@@ -114,8 +114,7 @@ static void wdt_timer_ping(unsigned long data) | |||
114 | inb_p(WDT_PING); | 114 | inb_p(WDT_PING); |
115 | 115 | ||
116 | /* Re-set the timer interval */ | 116 | /* Re-set the timer interval */ |
117 | timer.expires = jiffies + WDT_INTERVAL; | 117 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
118 | add_timer(&timer); | ||
119 | 118 | ||
120 | spin_unlock(&wdt_spinlock); | 119 | spin_unlock(&wdt_spinlock); |
121 | 120 | ||
@@ -155,8 +154,7 @@ static void wdt_startup(void) | |||
155 | next_heartbeat = jiffies + (timeout * HZ); | 154 | next_heartbeat = jiffies + (timeout * HZ); |
156 | 155 | ||
157 | /* Start the timer */ | 156 | /* Start the timer */ |
158 | timer.expires = jiffies + WDT_INTERVAL; | 157 | mod_timer(&timer, jiffies + WDT_INTERVAL); |
159 | add_timer(&timer); | ||
160 | 158 | ||
161 | wdt_change(WDT_ENABLE); | 159 | wdt_change(WDT_ENABLE); |
162 | 160 | ||
@@ -377,10 +375,6 @@ static int __init w83877f_wdt_init(void) | |||
377 | goto err_out_region1; | 375 | goto err_out_region1; |
378 | } | 376 | } |
379 | 377 | ||
380 | init_timer(&timer); | ||
381 | timer.function = wdt_timer_ping; | ||
382 | timer.data = 0; | ||
383 | |||
384 | rc = misc_register(&wdt_miscdev); | 378 | rc = misc_register(&wdt_miscdev); |
385 | if (rc) | 379 | if (rc) |
386 | { | 380 | { |
diff --git a/drivers/char/watchdog/w83977f_wdt.c b/drivers/char/watchdog/w83977f_wdt.c index 2c8d5d8bd4e8..157968442891 100644 --- a/drivers/char/watchdog/w83977f_wdt.c +++ b/drivers/char/watchdog/w83977f_wdt.c | |||
@@ -59,7 +59,7 @@ MODULE_PARM_DESC(testmode,"Watchdog testmode (1 = no reboot), default=0"); | |||
59 | 59 | ||
60 | static int nowayout = WATCHDOG_NOWAYOUT; | 60 | static int nowayout = WATCHDOG_NOWAYOUT; |
61 | module_param(nowayout, int, 0); | 61 | module_param(nowayout, int, 0); |
62 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 62 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
63 | 63 | ||
64 | /* | 64 | /* |
65 | * Start the watchdog | 65 | * Start the watchdog |
diff --git a/drivers/char/watchdog/wafer5823wdt.c b/drivers/char/watchdog/wafer5823wdt.c index 163e028ef9ed..950905d3c39f 100644 --- a/drivers/char/watchdog/wafer5823wdt.c +++ b/drivers/char/watchdog/wafer5823wdt.c | |||
@@ -65,7 +65,7 @@ MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds. 1<= timeout <=255, defau | |||
65 | 65 | ||
66 | static int nowayout = WATCHDOG_NOWAYOUT; | 66 | static int nowayout = WATCHDOG_NOWAYOUT; |
67 | module_param(nowayout, int, 0); | 67 | module_param(nowayout, int, 0); |
68 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 68 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
69 | 69 | ||
70 | static void wafwdt_ping(void) | 70 | static void wafwdt_ping(void) |
71 | { | 71 | { |
diff --git a/drivers/char/watchdog/wdt.c b/drivers/char/watchdog/wdt.c index 517fbd8643f8..0a3de6a02442 100644 --- a/drivers/char/watchdog/wdt.c +++ b/drivers/char/watchdog/wdt.c | |||
@@ -64,7 +64,7 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (0<heartbeat<65536, | |||
64 | 64 | ||
65 | static int nowayout = WATCHDOG_NOWAYOUT; | 65 | static int nowayout = WATCHDOG_NOWAYOUT; |
66 | module_param(nowayout, int, 0); | 66 | module_param(nowayout, int, 0); |
67 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 67 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
68 | 68 | ||
69 | /* You must set these - there is no sane way to probe for this board. */ | 69 | /* You must set these - there is no sane way to probe for this board. */ |
70 | static int io=0x240; | 70 | static int io=0x240; |
diff --git a/drivers/char/watchdog/wdt977.c b/drivers/char/watchdog/wdt977.c index 6253041b235b..7d300ff7ab07 100644 --- a/drivers/char/watchdog/wdt977.c +++ b/drivers/char/watchdog/wdt977.c | |||
@@ -68,7 +68,7 @@ MODULE_PARM_DESC(testmode,"Watchdog testmode (1 = no reboot), default=0"); | |||
68 | 68 | ||
69 | static int nowayout = WATCHDOG_NOWAYOUT; | 69 | static int nowayout = WATCHDOG_NOWAYOUT; |
70 | module_param(nowayout, int, 0); | 70 | module_param(nowayout, int, 0); |
71 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 71 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
72 | 72 | ||
73 | /* | 73 | /* |
74 | * Start the watchdog | 74 | * Start the watchdog |
diff --git a/drivers/char/watchdog/wdt_pci.c b/drivers/char/watchdog/wdt_pci.c index ce1261c5cbce..6baf4ae42c9d 100644 --- a/drivers/char/watchdog/wdt_pci.c +++ b/drivers/char/watchdog/wdt_pci.c | |||
@@ -90,7 +90,7 @@ MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (0<heartbeat<65536, | |||
90 | 90 | ||
91 | static int nowayout = WATCHDOG_NOWAYOUT; | 91 | static int nowayout = WATCHDOG_NOWAYOUT; |
92 | module_param(nowayout, int, 0); | 92 | module_param(nowayout, int, 0); |
93 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 93 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); |
94 | 94 | ||
95 | #ifdef CONFIG_WDT_501_PCI | 95 | #ifdef CONFIG_WDT_501_PCI |
96 | /* Support for the Fan Tachometer on the PCI-WDT501 */ | 96 | /* Support for the Fan Tachometer on the PCI-WDT501 */ |
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c index 93f93d4fb8ae..a6a4aa0eee16 100644 --- a/drivers/hwmon/vt8231.c +++ b/drivers/hwmon/vt8231.c | |||
@@ -727,7 +727,6 @@ int vt8231_detect(struct i2c_adapter *adapter) | |||
727 | client->addr = isa_address; | 727 | client->addr = isa_address; |
728 | client->adapter = adapter; | 728 | client->adapter = adapter; |
729 | client->driver = &vt8231_driver; | 729 | client->driver = &vt8231_driver; |
730 | client->dev.parent = &adapter->dev; | ||
731 | 730 | ||
732 | /* Fill in the remaining client fields and put into the global list */ | 731 | /* Fill in the remaining client fields and put into the global list */ |
733 | strlcpy(client->name, "vt8231", I2C_NAME_SIZE); | 732 | strlcpy(client->name, "vt8231", I2C_NAME_SIZE); |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 9367c4cfe936..4d44a2db29dd 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -183,6 +183,7 @@ config I2C_PIIX4 | |||
183 | ATI IXP200 | 183 | ATI IXP200 |
184 | ATI IXP300 | 184 | ATI IXP300 |
185 | ATI IXP400 | 185 | ATI IXP400 |
186 | ATI SB600 | ||
186 | Serverworks OSB4 | 187 | Serverworks OSB4 |
187 | Serverworks CSB5 | 188 | Serverworks CSB5 |
188 | Serverworks CSB6 | 189 | Serverworks CSB6 |
@@ -341,6 +342,13 @@ config I2C_PARPORT_LIGHT | |||
341 | This support is also available as a module. If so, the module | 342 | This support is also available as a module. If so, the module |
342 | will be called i2c-parport-light. | 343 | will be called i2c-parport-light. |
343 | 344 | ||
345 | config I2C_PASEMI | ||
346 | tristate "PA Semi SMBus interface" | ||
347 | # depends on PPC_PASEMI && I2C && PCI | ||
348 | depends on I2C && PCI | ||
349 | help | ||
350 | Supports the PA Semi PWRficient on-chip SMBus interfaces. | ||
351 | |||
344 | config I2C_PROSAVAGE | 352 | config I2C_PROSAVAGE |
345 | tristate "S3/VIA (Pro)Savage" | 353 | tristate "S3/VIA (Pro)Savage" |
346 | depends on I2C && PCI | 354 | depends on I2C && PCI |
@@ -499,11 +507,11 @@ config I2C_VIA | |||
499 | will be called i2c-via. | 507 | will be called i2c-via. |
500 | 508 | ||
501 | config I2C_VIAPRO | 509 | config I2C_VIAPRO |
502 | tristate "VIA 82C596/82C686/82xx" | 510 | tristate "VIA VT82C596/82C686/82xx and CX700" |
503 | depends on I2C && PCI | 511 | depends on I2C && PCI |
504 | help | 512 | help |
505 | If you say yes to this option, support will be included for the VIA | 513 | If you say yes to this option, support will be included for the VIA |
506 | 82C596/82C686/82xx I2C interfaces. Specifically, the following | 514 | VT82C596 and later SMBus interface. Specifically, the following |
507 | chipsets are supported: | 515 | chipsets are supported: |
508 | VT82C596A/B | 516 | VT82C596A/B |
509 | VT82C686A/B | 517 | VT82C686A/B |
@@ -512,6 +520,7 @@ config I2C_VIAPRO | |||
512 | VT8235 | 520 | VT8235 |
513 | VT8237R/A | 521 | VT8237R/A |
514 | VT8251 | 522 | VT8251 |
523 | CX700 | ||
515 | 524 | ||
516 | This driver can also be built as a module. If so, the module | 525 | This driver can also be built as a module. If so, the module |
517 | will be called i2c-viapro. | 526 | will be called i2c-viapro. |
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile index 37196c1d0794..03505aa44bbf 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile | |||
@@ -27,6 +27,7 @@ obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o | |||
27 | obj-$(CONFIG_I2C_OMAP) += i2c-omap.o | 27 | obj-$(CONFIG_I2C_OMAP) += i2c-omap.o |
28 | obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o | 28 | obj-$(CONFIG_I2C_PARPORT) += i2c-parport.o |
29 | obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o | 29 | obj-$(CONFIG_I2C_PARPORT_LIGHT) += i2c-parport-light.o |
30 | obj-$(CONFIG_I2C_PASEMI) += i2c-pasemi.o | ||
30 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o | 31 | obj-$(CONFIG_I2C_PCA_ISA) += i2c-pca-isa.o |
31 | obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o | 32 | obj-$(CONFIG_I2C_PIIX4) += i2c-piix4.o |
32 | obj-$(CONFIG_I2C_PNX) += i2c-pnx.o | 33 | obj-$(CONFIG_I2C_PNX) += i2c-pnx.o |
diff --git a/drivers/i2c/busses/i2c-ali1535.c b/drivers/i2c/busses/i2c-ali1535.c index e75d339a3481..0b0a87b8d107 100644 --- a/drivers/i2c/busses/i2c-ali1535.c +++ b/drivers/i2c/busses/i2c-ali1535.c | |||
@@ -475,6 +475,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
475 | 475 | ||
476 | static struct i2c_adapter ali1535_adapter = { | 476 | static struct i2c_adapter ali1535_adapter = { |
477 | .owner = THIS_MODULE, | 477 | .owner = THIS_MODULE, |
478 | .id = I2C_HW_SMBUS_ALI1535, | ||
478 | .class = I2C_CLASS_HWMON, | 479 | .class = I2C_CLASS_HWMON, |
479 | .algo = &smbus_algorithm, | 480 | .algo = &smbus_algorithm, |
480 | }; | 481 | }; |
diff --git a/drivers/i2c/busses/i2c-ali1563.c b/drivers/i2c/busses/i2c-ali1563.c index 8e1e3f8e40a4..6b68074e518a 100644 --- a/drivers/i2c/busses/i2c-ali1563.c +++ b/drivers/i2c/busses/i2c-ali1563.c | |||
@@ -314,35 +314,11 @@ static u32 ali1563_func(struct i2c_adapter * a) | |||
314 | } | 314 | } |
315 | 315 | ||
316 | 316 | ||
317 | static void ali1563_enable(struct pci_dev * dev) | ||
318 | { | ||
319 | u16 ctrl; | ||
320 | |||
321 | pci_read_config_word(dev,ALI1563_SMBBA,&ctrl); | ||
322 | ctrl |= 0x7; | ||
323 | pci_write_config_word(dev,ALI1563_SMBBA,ctrl); | ||
324 | } | ||
325 | |||
326 | static int __devinit ali1563_setup(struct pci_dev * dev) | 317 | static int __devinit ali1563_setup(struct pci_dev * dev) |
327 | { | 318 | { |
328 | u16 ctrl; | 319 | u16 ctrl; |
329 | 320 | ||
330 | pci_read_config_word(dev,ALI1563_SMBBA,&ctrl); | 321 | pci_read_config_word(dev,ALI1563_SMBBA,&ctrl); |
331 | printk("ali1563: SMBus control = %04x\n",ctrl); | ||
332 | |||
333 | /* Check if device is even enabled first */ | ||
334 | if (!(ctrl & ALI1563_SMB_IOEN)) { | ||
335 | dev_warn(&dev->dev,"I/O space not enabled, trying manually\n"); | ||
336 | ali1563_enable(dev); | ||
337 | } | ||
338 | if (!(ctrl & ALI1563_SMB_IOEN)) { | ||
339 | dev_warn(&dev->dev,"I/O space still not enabled, giving up\n"); | ||
340 | goto Err; | ||
341 | } | ||
342 | if (!(ctrl & ALI1563_SMB_HOSTEN)) { | ||
343 | dev_warn(&dev->dev,"Host Controller not enabled\n"); | ||
344 | goto Err; | ||
345 | } | ||
346 | 322 | ||
347 | /* SMB I/O Base in high 12 bits and must be aligned with the | 323 | /* SMB I/O Base in high 12 bits and must be aligned with the |
348 | * size of the I/O space. */ | 324 | * size of the I/O space. */ |
@@ -351,11 +327,31 @@ static int __devinit ali1563_setup(struct pci_dev * dev) | |||
351 | dev_warn(&dev->dev,"ali1563_smba Uninitialized\n"); | 327 | dev_warn(&dev->dev,"ali1563_smba Uninitialized\n"); |
352 | goto Err; | 328 | goto Err; |
353 | } | 329 | } |
330 | |||
331 | /* Check if device is enabled */ | ||
332 | if (!(ctrl & ALI1563_SMB_HOSTEN)) { | ||
333 | dev_warn(&dev->dev, "Host Controller not enabled\n"); | ||
334 | goto Err; | ||
335 | } | ||
336 | if (!(ctrl & ALI1563_SMB_IOEN)) { | ||
337 | dev_warn(&dev->dev, "I/O space not enabled, trying manually\n"); | ||
338 | pci_write_config_word(dev, ALI1563_SMBBA, | ||
339 | ctrl | ALI1563_SMB_IOEN); | ||
340 | pci_read_config_word(dev, ALI1563_SMBBA, &ctrl); | ||
341 | if (!(ctrl & ALI1563_SMB_IOEN)) { | ||
342 | dev_err(&dev->dev, "I/O space still not enabled, " | ||
343 | "giving up\n"); | ||
344 | goto Err; | ||
345 | } | ||
346 | } | ||
347 | |||
354 | if (!request_region(ali1563_smba, ALI1563_SMB_IOSIZE, | 348 | if (!request_region(ali1563_smba, ALI1563_SMB_IOSIZE, |
355 | ali1563_pci_driver.name)) { | 349 | ali1563_pci_driver.name)) { |
356 | dev_warn(&dev->dev,"Could not allocate I/O space"); | 350 | dev_err(&dev->dev, "Could not allocate I/O space at 0x%04x\n", |
351 | ali1563_smba); | ||
357 | goto Err; | 352 | goto Err; |
358 | } | 353 | } |
354 | dev_info(&dev->dev, "Found ALi1563 SMBus at 0x%04x\n", ali1563_smba); | ||
359 | 355 | ||
360 | return 0; | 356 | return 0; |
361 | Err: | 357 | Err: |
@@ -374,6 +370,7 @@ static const struct i2c_algorithm ali1563_algorithm = { | |||
374 | 370 | ||
375 | static struct i2c_adapter ali1563_adapter = { | 371 | static struct i2c_adapter ali1563_adapter = { |
376 | .owner = THIS_MODULE, | 372 | .owner = THIS_MODULE, |
373 | .id = I2C_HW_SMBUS_ALI1563, | ||
377 | .class = I2C_CLASS_HWMON, | 374 | .class = I2C_CLASS_HWMON, |
378 | .algo = &ali1563_algorithm, | 375 | .algo = &ali1563_algorithm, |
379 | }; | 376 | }; |
@@ -384,13 +381,18 @@ static int __devinit ali1563_probe(struct pci_dev * dev, | |||
384 | int error; | 381 | int error; |
385 | 382 | ||
386 | if ((error = ali1563_setup(dev))) | 383 | if ((error = ali1563_setup(dev))) |
387 | return error; | 384 | goto exit; |
388 | ali1563_adapter.dev.parent = &dev->dev; | 385 | ali1563_adapter.dev.parent = &dev->dev; |
389 | sprintf(ali1563_adapter.name,"SMBus ALi 1563 Adapter @ %04x", | 386 | sprintf(ali1563_adapter.name,"SMBus ALi 1563 Adapter @ %04x", |
390 | ali1563_smba); | 387 | ali1563_smba); |
391 | if ((error = i2c_add_adapter(&ali1563_adapter))) | 388 | if ((error = i2c_add_adapter(&ali1563_adapter))) |
392 | ali1563_shutdown(dev); | 389 | goto exit_shutdown; |
393 | printk("%s: Returning %d\n",__FUNCTION__,error); | 390 | return 0; |
391 | |||
392 | exit_shutdown: | ||
393 | ali1563_shutdown(dev); | ||
394 | exit: | ||
395 | dev_warn(&dev->dev, "ALi1563 SMBus probe failed (%d)\n", error); | ||
394 | return error; | 396 | return error; |
395 | } | 397 | } |
396 | 398 | ||
diff --git a/drivers/i2c/busses/i2c-ali15x3.c b/drivers/i2c/busses/i2c-ali15x3.c index 3f11b6e1a341..c537441ac038 100644 --- a/drivers/i2c/busses/i2c-ali15x3.c +++ b/drivers/i2c/busses/i2c-ali15x3.c | |||
@@ -470,6 +470,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
470 | 470 | ||
471 | static struct i2c_adapter ali15x3_adapter = { | 471 | static struct i2c_adapter ali15x3_adapter = { |
472 | .owner = THIS_MODULE, | 472 | .owner = THIS_MODULE, |
473 | .id = I2C_HW_SMBUS_ALI15X3, | ||
473 | .class = I2C_CLASS_HWMON, | 474 | .class = I2C_CLASS_HWMON, |
474 | .algo = &smbus_algorithm, | 475 | .algo = &smbus_algorithm, |
475 | }; | 476 | }; |
diff --git a/drivers/i2c/busses/i2c-amd756-s4882.c b/drivers/i2c/busses/i2c-amd756-s4882.c index 08e915730caf..e5e96c817566 100644 --- a/drivers/i2c/busses/i2c-amd756-s4882.c +++ b/drivers/i2c/busses/i2c-amd756-s4882.c | |||
@@ -184,12 +184,14 @@ static int __init amd756_s4882_init(void) | |||
184 | s4882_algo[0].smbus_xfer = amd756_access_virt0; | 184 | s4882_algo[0].smbus_xfer = amd756_access_virt0; |
185 | s4882_adapter[0] = amd756_smbus; | 185 | s4882_adapter[0] = amd756_smbus; |
186 | s4882_adapter[0].algo = s4882_algo; | 186 | s4882_adapter[0].algo = s4882_algo; |
187 | s4882_adapter[0].dev.parent = amd756_smbus.dev.parent; | ||
187 | for (i = 1; i < 5; i++) { | 188 | for (i = 1; i < 5; i++) { |
188 | s4882_algo[i] = *(amd756_smbus.algo); | 189 | s4882_algo[i] = *(amd756_smbus.algo); |
189 | s4882_adapter[i] = amd756_smbus; | 190 | s4882_adapter[i] = amd756_smbus; |
190 | sprintf(s4882_adapter[i].name, | 191 | sprintf(s4882_adapter[i].name, |
191 | "SMBus 8111 adapter (CPU%d)", i-1); | 192 | "SMBus 8111 adapter (CPU%d)", i-1); |
192 | s4882_adapter[i].algo = s4882_algo+i; | 193 | s4882_adapter[i].algo = s4882_algo+i; |
194 | s4882_adapter[i].dev.parent = amd756_smbus.dev.parent; | ||
193 | } | 195 | } |
194 | s4882_algo[1].smbus_xfer = amd756_access_virt1; | 196 | s4882_algo[1].smbus_xfer = amd756_access_virt1; |
195 | s4882_algo[2].smbus_xfer = amd756_access_virt2; | 197 | s4882_algo[2].smbus_xfer = amd756_access_virt2; |
diff --git a/drivers/i2c/busses/i2c-amd756.c b/drivers/i2c/busses/i2c-amd756.c index 2d21afdc5b1c..91fbc0ee439c 100644 --- a/drivers/i2c/busses/i2c-amd756.c +++ b/drivers/i2c/busses/i2c-amd756.c | |||
@@ -301,6 +301,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
301 | 301 | ||
302 | struct i2c_adapter amd756_smbus = { | 302 | struct i2c_adapter amd756_smbus = { |
303 | .owner = THIS_MODULE, | 303 | .owner = THIS_MODULE, |
304 | .id = I2C_HW_SMBUS_AMD756, | ||
304 | .class = I2C_CLASS_HWMON, | 305 | .class = I2C_CLASS_HWMON, |
305 | .algo = &smbus_algorithm, | 306 | .algo = &smbus_algorithm, |
306 | }; | 307 | }; |
diff --git a/drivers/i2c/busses/i2c-amd8111.c b/drivers/i2c/busses/i2c-amd8111.c index 0fbc7186c91a..14ad9912f204 100644 --- a/drivers/i2c/busses/i2c-amd8111.c +++ b/drivers/i2c/busses/i2c-amd8111.c | |||
@@ -76,7 +76,8 @@ static unsigned int amd_ec_wait_write(struct amd_smbus *smbus) | |||
76 | udelay(1); | 76 | udelay(1); |
77 | 77 | ||
78 | if (!timeout) { | 78 | if (!timeout) { |
79 | dev_warn(&smbus->dev->dev, "Timeout while waiting for IBF to clear\n"); | 79 | dev_warn(&smbus->dev->dev, |
80 | "Timeout while waiting for IBF to clear\n"); | ||
80 | return -1; | 81 | return -1; |
81 | } | 82 | } |
82 | 83 | ||
@@ -91,14 +92,16 @@ static unsigned int amd_ec_wait_read(struct amd_smbus *smbus) | |||
91 | udelay(1); | 92 | udelay(1); |
92 | 93 | ||
93 | if (!timeout) { | 94 | if (!timeout) { |
94 | dev_warn(&smbus->dev->dev, "Timeout while waiting for OBF to set\n"); | 95 | dev_warn(&smbus->dev->dev, |
96 | "Timeout while waiting for OBF to set\n"); | ||
95 | return -1; | 97 | return -1; |
96 | } | 98 | } |
97 | 99 | ||
98 | return 0; | 100 | return 0; |
99 | } | 101 | } |
100 | 102 | ||
101 | static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address, unsigned char *data) | 103 | static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address, |
104 | unsigned char *data) | ||
102 | { | 105 | { |
103 | if (amd_ec_wait_write(smbus)) | 106 | if (amd_ec_wait_write(smbus)) |
104 | return -1; | 107 | return -1; |
@@ -115,7 +118,8 @@ static unsigned int amd_ec_read(struct amd_smbus *smbus, unsigned char address, | |||
115 | return 0; | 118 | return 0; |
116 | } | 119 | } |
117 | 120 | ||
118 | static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address, unsigned char data) | 121 | static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address, |
122 | unsigned char data) | ||
119 | { | 123 | { |
120 | if (amd_ec_wait_write(smbus)) | 124 | if (amd_ec_wait_write(smbus)) |
121 | return -1; | 125 | return -1; |
@@ -175,18 +179,19 @@ static unsigned int amd_ec_write(struct amd_smbus *smbus, unsigned char address, | |||
175 | #define AMD_SMB_PRTCL_PEC 0x80 | 179 | #define AMD_SMB_PRTCL_PEC 0x80 |
176 | 180 | ||
177 | 181 | ||
178 | static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short flags, | 182 | static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, |
179 | char read_write, u8 command, int size, union i2c_smbus_data * data) | 183 | unsigned short flags, char read_write, u8 command, int size, |
184 | union i2c_smbus_data * data) | ||
180 | { | 185 | { |
181 | struct amd_smbus *smbus = adap->algo_data; | 186 | struct amd_smbus *smbus = adap->algo_data; |
182 | unsigned char protocol, len, pec, temp[2]; | 187 | unsigned char protocol, len, pec, temp[2]; |
183 | int i; | 188 | int i; |
184 | 189 | ||
185 | protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ : AMD_SMB_PRTCL_WRITE; | 190 | protocol = (read_write == I2C_SMBUS_READ) ? AMD_SMB_PRTCL_READ |
191 | : AMD_SMB_PRTCL_WRITE; | ||
186 | pec = (flags & I2C_CLIENT_PEC) ? AMD_SMB_PRTCL_PEC : 0; | 192 | pec = (flags & I2C_CLIENT_PEC) ? AMD_SMB_PRTCL_PEC : 0; |
187 | 193 | ||
188 | switch (size) { | 194 | switch (size) { |
189 | |||
190 | case I2C_SMBUS_QUICK: | 195 | case I2C_SMBUS_QUICK: |
191 | protocol |= AMD_SMB_PRTCL_QUICK; | 196 | protocol |= AMD_SMB_PRTCL_QUICK; |
192 | read_write = I2C_SMBUS_WRITE; | 197 | read_write = I2C_SMBUS_WRITE; |
@@ -208,8 +213,10 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short fl | |||
208 | case I2C_SMBUS_WORD_DATA: | 213 | case I2C_SMBUS_WORD_DATA: |
209 | amd_ec_write(smbus, AMD_SMB_CMD, command); | 214 | amd_ec_write(smbus, AMD_SMB_CMD, command); |
210 | if (read_write == I2C_SMBUS_WRITE) { | 215 | if (read_write == I2C_SMBUS_WRITE) { |
211 | amd_ec_write(smbus, AMD_SMB_DATA, data->word); | 216 | amd_ec_write(smbus, AMD_SMB_DATA, |
212 | amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8); | 217 | data->word & 0xff); |
218 | amd_ec_write(smbus, AMD_SMB_DATA + 1, | ||
219 | data->word >> 8); | ||
213 | } | 220 | } |
214 | protocol |= AMD_SMB_PRTCL_WORD_DATA | pec; | 221 | protocol |= AMD_SMB_PRTCL_WORD_DATA | pec; |
215 | break; | 222 | break; |
@@ -217,27 +224,31 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short fl | |||
217 | case I2C_SMBUS_BLOCK_DATA: | 224 | case I2C_SMBUS_BLOCK_DATA: |
218 | amd_ec_write(smbus, AMD_SMB_CMD, command); | 225 | amd_ec_write(smbus, AMD_SMB_CMD, command); |
219 | if (read_write == I2C_SMBUS_WRITE) { | 226 | if (read_write == I2C_SMBUS_WRITE) { |
220 | len = min_t(u8, data->block[0], 32); | 227 | len = min_t(u8, data->block[0], |
228 | I2C_SMBUS_BLOCK_MAX); | ||
221 | amd_ec_write(smbus, AMD_SMB_BCNT, len); | 229 | amd_ec_write(smbus, AMD_SMB_BCNT, len); |
222 | for (i = 0; i < len; i++) | 230 | for (i = 0; i < len; i++) |
223 | amd_ec_write(smbus, AMD_SMB_DATA + i, data->block[i + 1]); | 231 | amd_ec_write(smbus, AMD_SMB_DATA + i, |
232 | data->block[i + 1]); | ||
224 | } | 233 | } |
225 | protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec; | 234 | protocol |= AMD_SMB_PRTCL_BLOCK_DATA | pec; |
226 | break; | 235 | break; |
227 | 236 | ||
228 | case I2C_SMBUS_I2C_BLOCK_DATA: | 237 | case I2C_SMBUS_I2C_BLOCK_DATA: |
229 | len = min_t(u8, data->block[0], 32); | 238 | len = min_t(u8, data->block[0], |
239 | I2C_SMBUS_BLOCK_MAX); | ||
230 | amd_ec_write(smbus, AMD_SMB_CMD, command); | 240 | amd_ec_write(smbus, AMD_SMB_CMD, command); |
231 | amd_ec_write(smbus, AMD_SMB_BCNT, len); | 241 | amd_ec_write(smbus, AMD_SMB_BCNT, len); |
232 | if (read_write == I2C_SMBUS_WRITE) | 242 | if (read_write == I2C_SMBUS_WRITE) |
233 | for (i = 0; i < len; i++) | 243 | for (i = 0; i < len; i++) |
234 | amd_ec_write(smbus, AMD_SMB_DATA + i, data->block[i + 1]); | 244 | amd_ec_write(smbus, AMD_SMB_DATA + i, |
245 | data->block[i + 1]); | ||
235 | protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA; | 246 | protocol |= AMD_SMB_PRTCL_I2C_BLOCK_DATA; |
236 | break; | 247 | break; |
237 | 248 | ||
238 | case I2C_SMBUS_PROC_CALL: | 249 | case I2C_SMBUS_PROC_CALL: |
239 | amd_ec_write(smbus, AMD_SMB_CMD, command); | 250 | amd_ec_write(smbus, AMD_SMB_CMD, command); |
240 | amd_ec_write(smbus, AMD_SMB_DATA, data->word); | 251 | amd_ec_write(smbus, AMD_SMB_DATA, data->word & 0xff); |
241 | amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8); | 252 | amd_ec_write(smbus, AMD_SMB_DATA + 1, data->word >> 8); |
242 | protocol = AMD_SMB_PRTCL_PROC_CALL | pec; | 253 | protocol = AMD_SMB_PRTCL_PROC_CALL | pec; |
243 | read_write = I2C_SMBUS_READ; | 254 | read_write = I2C_SMBUS_READ; |
@@ -248,7 +259,8 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short fl | |||
248 | amd_ec_write(smbus, AMD_SMB_CMD, command); | 259 | amd_ec_write(smbus, AMD_SMB_CMD, command); |
249 | amd_ec_write(smbus, AMD_SMB_BCNT, len); | 260 | amd_ec_write(smbus, AMD_SMB_BCNT, len); |
250 | for (i = 0; i < len; i++) | 261 | for (i = 0; i < len; i++) |
251 | amd_ec_write(smbus, AMD_SMB_DATA + i, data->block[i + 1]); | 262 | amd_ec_write(smbus, AMD_SMB_DATA + i, |
263 | data->block[i + 1]); | ||
252 | protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec; | 264 | protocol = AMD_SMB_PRTCL_BLOCK_PROC_CALL | pec; |
253 | read_write = I2C_SMBUS_READ; | 265 | read_write = I2C_SMBUS_READ; |
254 | break; | 266 | break; |
@@ -280,7 +292,6 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short fl | |||
280 | return 0; | 292 | return 0; |
281 | 293 | ||
282 | switch (size) { | 294 | switch (size) { |
283 | |||
284 | case I2C_SMBUS_BYTE: | 295 | case I2C_SMBUS_BYTE: |
285 | case I2C_SMBUS_BYTE_DATA: | 296 | case I2C_SMBUS_BYTE_DATA: |
286 | amd_ec_read(smbus, AMD_SMB_DATA, &data->byte); | 297 | amd_ec_read(smbus, AMD_SMB_DATA, &data->byte); |
@@ -296,10 +307,11 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short fl | |||
296 | case I2C_SMBUS_BLOCK_DATA: | 307 | case I2C_SMBUS_BLOCK_DATA: |
297 | case I2C_SMBUS_BLOCK_PROC_CALL: | 308 | case I2C_SMBUS_BLOCK_PROC_CALL: |
298 | amd_ec_read(smbus, AMD_SMB_BCNT, &len); | 309 | amd_ec_read(smbus, AMD_SMB_BCNT, &len); |
299 | len = min_t(u8, len, 32); | 310 | len = min_t(u8, len, I2C_SMBUS_BLOCK_MAX); |
300 | case I2C_SMBUS_I2C_BLOCK_DATA: | 311 | case I2C_SMBUS_I2C_BLOCK_DATA: |
301 | for (i = 0; i < len; i++) | 312 | for (i = 0; i < len; i++) |
302 | amd_ec_read(smbus, AMD_SMB_DATA + i, data->block + i + 1); | 313 | amd_ec_read(smbus, AMD_SMB_DATA + i, |
314 | data->block + i + 1); | ||
303 | data->block[0] = len; | 315 | data->block[0] = len; |
304 | break; | 316 | break; |
305 | } | 317 | } |
@@ -310,7 +322,8 @@ static s32 amd8111_access(struct i2c_adapter * adap, u16 addr, unsigned short fl | |||
310 | 322 | ||
311 | static u32 amd8111_func(struct i2c_adapter *adapter) | 323 | static u32 amd8111_func(struct i2c_adapter *adapter) |
312 | { | 324 | { |
313 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | I2C_FUNC_SMBUS_BYTE_DATA | | 325 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | |
326 | I2C_FUNC_SMBUS_BYTE_DATA | | ||
314 | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA | | 327 | I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA | |
315 | I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | | 328 | I2C_FUNC_SMBUS_PROC_CALL | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | |
316 | I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_HWPEC_CALC; | 329 | I2C_FUNC_SMBUS_I2C_BLOCK | I2C_FUNC_SMBUS_HWPEC_CALC; |
@@ -329,12 +342,13 @@ static struct pci_device_id amd8111_ids[] = { | |||
329 | 342 | ||
330 | MODULE_DEVICE_TABLE (pci, amd8111_ids); | 343 | MODULE_DEVICE_TABLE (pci, amd8111_ids); |
331 | 344 | ||
332 | static int __devinit amd8111_probe(struct pci_dev *dev, const struct pci_device_id *id) | 345 | static int __devinit amd8111_probe(struct pci_dev *dev, |
346 | const struct pci_device_id *id) | ||
333 | { | 347 | { |
334 | struct amd_smbus *smbus; | 348 | struct amd_smbus *smbus; |
335 | int error = -ENODEV; | 349 | int error; |
336 | 350 | ||
337 | if (~pci_resource_flags(dev, 0) & IORESOURCE_IO) | 351 | if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO)) |
338 | return -ENODEV; | 352 | return -ENODEV; |
339 | 353 | ||
340 | smbus = kzalloc(sizeof(struct amd_smbus), GFP_KERNEL); | 354 | smbus = kzalloc(sizeof(struct amd_smbus), GFP_KERNEL); |
@@ -345,12 +359,15 @@ static int __devinit amd8111_probe(struct pci_dev *dev, const struct pci_device_ | |||
345 | smbus->base = pci_resource_start(dev, 0); | 359 | smbus->base = pci_resource_start(dev, 0); |
346 | smbus->size = pci_resource_len(dev, 0); | 360 | smbus->size = pci_resource_len(dev, 0); |
347 | 361 | ||
348 | if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) | 362 | if (!request_region(smbus->base, smbus->size, amd8111_driver.name)) { |
363 | error = -EBUSY; | ||
349 | goto out_kfree; | 364 | goto out_kfree; |
365 | } | ||
350 | 366 | ||
351 | smbus->adapter.owner = THIS_MODULE; | 367 | smbus->adapter.owner = THIS_MODULE; |
352 | snprintf(smbus->adapter.name, I2C_NAME_SIZE, | 368 | snprintf(smbus->adapter.name, I2C_NAME_SIZE, |
353 | "SMBus2 AMD8111 adapter at %04x", smbus->base); | 369 | "SMBus2 AMD8111 adapter at %04x", smbus->base); |
370 | smbus->adapter.id = I2C_HW_SMBUS_AMD8111; | ||
354 | smbus->adapter.class = I2C_CLASS_HWMON; | 371 | smbus->adapter.class = I2C_CLASS_HWMON; |
355 | smbus->adapter.algo = &smbus_algorithm; | 372 | smbus->adapter.algo = &smbus_algorithm; |
356 | smbus->adapter.algo_data = smbus; | 373 | smbus->adapter.algo_data = smbus; |
@@ -358,11 +375,11 @@ static int __devinit amd8111_probe(struct pci_dev *dev, const struct pci_device_ | |||
358 | /* set up the driverfs linkage to our parent device */ | 375 | /* set up the driverfs linkage to our parent device */ |
359 | smbus->adapter.dev.parent = &dev->dev; | 376 | smbus->adapter.dev.parent = &dev->dev; |
360 | 377 | ||
378 | pci_write_config_dword(smbus->dev, AMD_PCI_MISC, 0); | ||
361 | error = i2c_add_adapter(&smbus->adapter); | 379 | error = i2c_add_adapter(&smbus->adapter); |
362 | if (error) | 380 | if (error) |
363 | goto out_release_region; | 381 | goto out_release_region; |
364 | 382 | ||
365 | pci_write_config_dword(smbus->dev, AMD_PCI_MISC, 0); | ||
366 | pci_set_drvdata(dev, smbus); | 383 | pci_set_drvdata(dev, smbus); |
367 | return 0; | 384 | return 0; |
368 | 385 | ||
@@ -370,10 +387,9 @@ static int __devinit amd8111_probe(struct pci_dev *dev, const struct pci_device_ | |||
370 | release_region(smbus->base, smbus->size); | 387 | release_region(smbus->base, smbus->size); |
371 | out_kfree: | 388 | out_kfree: |
372 | kfree(smbus); | 389 | kfree(smbus); |
373 | return -1; | 390 | return error; |
374 | } | 391 | } |
375 | 392 | ||
376 | |||
377 | static void __devexit amd8111_remove(struct pci_dev *dev) | 393 | static void __devexit amd8111_remove(struct pci_dev *dev) |
378 | { | 394 | { |
379 | struct amd_smbus *smbus = pci_get_drvdata(dev); | 395 | struct amd_smbus *smbus = pci_get_drvdata(dev); |
@@ -395,7 +411,6 @@ static int __init i2c_amd8111_init(void) | |||
395 | return pci_register_driver(&amd8111_driver); | 411 | return pci_register_driver(&amd8111_driver); |
396 | } | 412 | } |
397 | 413 | ||
398 | |||
399 | static void __exit i2c_amd8111_exit(void) | 414 | static void __exit i2c_amd8111_exit(void) |
400 | { | 415 | { |
401 | pci_unregister_driver(&amd8111_driver); | 416 | pci_unregister_driver(&amd8111_driver); |
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c index ae625b854470..8c3569a9775b 100644 --- a/drivers/i2c/busses/i2c-i801.c +++ b/drivers/i2c/busses/i2c-i801.c | |||
@@ -123,7 +123,7 @@ static int i801_transaction(void) | |||
123 | dev_dbg(&I801_dev->dev, "Failed! (%02x)\n", temp); | 123 | dev_dbg(&I801_dev->dev, "Failed! (%02x)\n", temp); |
124 | return -1; | 124 | return -1; |
125 | } else { | 125 | } else { |
126 | dev_dbg(&I801_dev->dev, "Successfull!\n"); | 126 | dev_dbg(&I801_dev->dev, "Successful!\n"); |
127 | } | 127 | } |
128 | } | 128 | } |
129 | 129 | ||
@@ -442,6 +442,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
442 | 442 | ||
443 | static struct i2c_adapter i801_adapter = { | 443 | static struct i2c_adapter i801_adapter = { |
444 | .owner = THIS_MODULE, | 444 | .owner = THIS_MODULE, |
445 | .id = I2C_HW_SMBUS_I801, | ||
445 | .class = I2C_CLASS_HWMON, | 446 | .class = I2C_CLASS_HWMON, |
446 | .algo = &smbus_algorithm, | 447 | .algo = &smbus_algorithm, |
447 | }; | 448 | }; |
diff --git a/drivers/i2c/busses/i2c-i810.c b/drivers/i2c/busses/i2c-i810.c index 10c98bc88aa6..42e8d94c276f 100644 --- a/drivers/i2c/busses/i2c-i810.c +++ b/drivers/i2c/busses/i2c-i810.c | |||
@@ -171,6 +171,7 @@ static struct i2c_algo_bit_data i810_i2c_bit_data = { | |||
171 | 171 | ||
172 | static struct i2c_adapter i810_i2c_adapter = { | 172 | static struct i2c_adapter i810_i2c_adapter = { |
173 | .owner = THIS_MODULE, | 173 | .owner = THIS_MODULE, |
174 | .id = I2C_HW_B_I810, | ||
174 | .name = "I810/I815 I2C Adapter", | 175 | .name = "I810/I815 I2C Adapter", |
175 | .algo_data = &i810_i2c_bit_data, | 176 | .algo_data = &i810_i2c_bit_data, |
176 | }; | 177 | }; |
@@ -186,6 +187,7 @@ static struct i2c_algo_bit_data i810_ddc_bit_data = { | |||
186 | 187 | ||
187 | static struct i2c_adapter i810_ddc_adapter = { | 188 | static struct i2c_adapter i810_ddc_adapter = { |
188 | .owner = THIS_MODULE, | 189 | .owner = THIS_MODULE, |
190 | .id = I2C_HW_B_I810, | ||
189 | .name = "I810/I815 DDC Adapter", | 191 | .name = "I810/I815 DDC Adapter", |
190 | .algo_data = &i810_ddc_bit_data, | 192 | .algo_data = &i810_ddc_bit_data, |
191 | }; | 193 | }; |
diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c index 1898e9987021..8b14d14e60ca 100644 --- a/drivers/i2c/busses/i2c-ibm_iic.c +++ b/drivers/i2c/busses/i2c-ibm_iic.c | |||
@@ -727,6 +727,7 @@ static int __devinit iic_probe(struct ocp_device *ocp){ | |||
727 | 727 | ||
728 | /* Register it with i2c layer */ | 728 | /* Register it with i2c layer */ |
729 | adap = &dev->adap; | 729 | adap = &dev->adap; |
730 | adap->dev.parent = &ocp->dev; | ||
730 | strcpy(adap->name, "IBM IIC"); | 731 | strcpy(adap->name, "IBM IIC"); |
731 | i2c_set_adapdata(adap, dev); | 732 | i2c_set_adapdata(adap, dev); |
732 | adap->id = I2C_HW_OCP; | 733 | adap->id = I2C_HW_OCP; |
diff --git a/drivers/i2c/busses/i2c-isa.c b/drivers/i2c/busses/i2c-isa.c index 8ed59a2dff53..5f33bc9c1e02 100644 --- a/drivers/i2c/busses/i2c-isa.c +++ b/drivers/i2c/busses/i2c-isa.c | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <linux/i2c.h> | 39 | #include <linux/i2c.h> |
40 | #include <linux/i2c-isa.h> | 40 | #include <linux/i2c-isa.h> |
41 | #include <linux/platform_device.h> | 41 | #include <linux/platform_device.h> |
42 | #include <linux/completion.h> | ||
42 | 43 | ||
43 | static u32 isa_func(struct i2c_adapter *adapter); | 44 | static u32 isa_func(struct i2c_adapter *adapter); |
44 | 45 | ||
diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index 490173611d6b..a3283b907eb8 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c | |||
@@ -520,6 +520,7 @@ mv64xxx_i2c_probe(struct platform_device *pd) | |||
520 | rc = -ENXIO; | 520 | rc = -ENXIO; |
521 | goto exit_unmap_regs; | 521 | goto exit_unmap_regs; |
522 | } | 522 | } |
523 | drv_data->adapter.dev.parent = &pd->dev; | ||
523 | drv_data->adapter.id = I2C_HW_MV64XXX; | 524 | drv_data->adapter.id = I2C_HW_MV64XXX; |
524 | drv_data->adapter.algo = &mv64xxx_i2c_algo; | 525 | drv_data->adapter.algo = &mv64xxx_i2c_algo; |
525 | drv_data->adapter.owner = THIS_MODULE; | 526 | drv_data->adapter.owner = THIS_MODULE; |
diff --git a/drivers/i2c/busses/i2c-nforce2.c b/drivers/i2c/busses/i2c-nforce2.c index ad37c10e7fec..653555184a64 100644 --- a/drivers/i2c/busses/i2c-nforce2.c +++ b/drivers/i2c/busses/i2c-nforce2.c | |||
@@ -57,7 +57,6 @@ MODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver"); | |||
57 | 57 | ||
58 | 58 | ||
59 | struct nforce2_smbus { | 59 | struct nforce2_smbus { |
60 | struct pci_dev *dev; | ||
61 | struct i2c_adapter adapter; | 60 | struct i2c_adapter adapter; |
62 | int base; | 61 | int base; |
63 | int size; | 62 | int size; |
@@ -230,7 +229,6 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar, | |||
230 | smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; | 229 | smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK; |
231 | smbus->size = 64; | 230 | smbus->size = 64; |
232 | } | 231 | } |
233 | smbus->dev = dev; | ||
234 | 232 | ||
235 | if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { | 233 | if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) { |
236 | dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", | 234 | dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n", |
@@ -238,6 +236,7 @@ static int __devinit nforce2_probe_smb (struct pci_dev *dev, int bar, | |||
238 | return -1; | 236 | return -1; |
239 | } | 237 | } |
240 | smbus->adapter.owner = THIS_MODULE; | 238 | smbus->adapter.owner = THIS_MODULE; |
239 | smbus->adapter.id = I2C_HW_SMBUS_NFORCE2; | ||
241 | smbus->adapter.class = I2C_CLASS_HWMON; | 240 | smbus->adapter.class = I2C_CLASS_HWMON; |
242 | smbus->adapter.algo = &smbus_algorithm; | 241 | smbus->adapter.algo = &smbus_algorithm; |
243 | smbus->adapter.algo_data = smbus; | 242 | smbus->adapter.algo_data = smbus; |
diff --git a/drivers/i2c/busses/i2c-parport.h b/drivers/i2c/busses/i2c-parport.h index 9ddd816d5d0f..ed69d846cb95 100644 --- a/drivers/i2c/busses/i2c-parport.h +++ b/drivers/i2c/busses/i2c-parport.h | |||
@@ -88,6 +88,13 @@ static struct adapter_parm adapter_parm[] = { | |||
88 | .getscl = { 0x40, STAT, 0 }, | 88 | .getscl = { 0x40, STAT, 0 }, |
89 | .init = { 0xfc, DATA, 0 }, | 89 | .init = { 0xfc, DATA, 0 }, |
90 | }, | 90 | }, |
91 | /* type 7: One For All JP1 parallel port adapter */ | ||
92 | { | ||
93 | .setsda = { 0x01, DATA, 0 }, | ||
94 | .setscl = { 0x02, DATA, 0 }, | ||
95 | .getsda = { 0x80, STAT, 1 }, | ||
96 | .init = { 0x04, DATA, 1 }, | ||
97 | }, | ||
91 | }; | 98 | }; |
92 | 99 | ||
93 | static int type = -1; | 100 | static int type = -1; |
@@ -101,4 +108,5 @@ MODULE_PARM_DESC(type, | |||
101 | " 4 = ADM1032 evaluation board\n" | 108 | " 4 = ADM1032 evaluation board\n" |
102 | " 5 = ADM1025, ADM1030 and ADM1031 evaluation boards\n" | 109 | " 5 = ADM1025, ADM1030 and ADM1031 evaluation boards\n" |
103 | " 6 = Barco LPT->DVI (K5800236) adapter\n" | 110 | " 6 = Barco LPT->DVI (K5800236) adapter\n" |
111 | " 7 = One For All JP1 parallel port adapter\n" | ||
104 | ); | 112 | ); |
diff --git a/drivers/i2c/busses/i2c-pasemi.c b/drivers/i2c/busses/i2c-pasemi.c new file mode 100644 index 000000000000..f54fb5d65cc4 --- /dev/null +++ b/drivers/i2c/busses/i2c-pasemi.c | |||
@@ -0,0 +1,426 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006-2007 PA Semi, Inc | ||
3 | * | ||
4 | * SMBus host driver for PA Semi PWRficient | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/module.h> | ||
21 | #include <linux/pci.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/stddef.h> | ||
24 | #include <linux/sched.h> | ||
25 | #include <linux/i2c.h> | ||
26 | #include <linux/delay.h> | ||
27 | #include <asm/io.h> | ||
28 | |||
29 | static struct pci_driver pasemi_smb_driver; | ||
30 | |||
31 | struct pasemi_smbus { | ||
32 | struct pci_dev *dev; | ||
33 | struct i2c_adapter adapter; | ||
34 | unsigned long base; | ||
35 | int size; | ||
36 | }; | ||
37 | |||
38 | /* Register offsets */ | ||
39 | #define REG_MTXFIFO 0x00 | ||
40 | #define REG_MRXFIFO 0x04 | ||
41 | #define REG_SMSTA 0x14 | ||
42 | #define REG_CTL 0x1c | ||
43 | |||
44 | /* Register defs */ | ||
45 | #define MTXFIFO_READ 0x00000400 | ||
46 | #define MTXFIFO_STOP 0x00000200 | ||
47 | #define MTXFIFO_START 0x00000100 | ||
48 | #define MTXFIFO_DATA_M 0x000000ff | ||
49 | |||
50 | #define MRXFIFO_EMPTY 0x00000100 | ||
51 | #define MRXFIFO_DATA_M 0x000000ff | ||
52 | |||
53 | #define SMSTA_XEN 0x08000000 | ||
54 | |||
55 | #define CTL_MRR 0x00000400 | ||
56 | #define CTL_MTR 0x00000200 | ||
57 | #define CTL_CLK_M 0x000000ff | ||
58 | |||
59 | #define CLK_100K_DIV 84 | ||
60 | #define CLK_400K_DIV 21 | ||
61 | |||
62 | static inline void reg_write(struct pasemi_smbus *smbus, int reg, int val) | ||
63 | { | ||
64 | dev_dbg(&smbus->dev->dev, "smbus write reg %lx val %08x\n", | ||
65 | smbus->base + reg, val); | ||
66 | outl(val, smbus->base + reg); | ||
67 | } | ||
68 | |||
69 | static inline int reg_read(struct pasemi_smbus *smbus, int reg) | ||
70 | { | ||
71 | int ret; | ||
72 | ret = inl(smbus->base + reg); | ||
73 | dev_dbg(&smbus->dev->dev, "smbus read reg %lx val %08x\n", | ||
74 | smbus->base + reg, ret); | ||
75 | return ret; | ||
76 | } | ||
77 | |||
78 | #define TXFIFO_WR(smbus, reg) reg_write((smbus), REG_MTXFIFO, (reg)) | ||
79 | #define RXFIFO_RD(smbus) reg_read((smbus), REG_MRXFIFO) | ||
80 | |||
81 | static void pasemi_smb_clear(struct pasemi_smbus *smbus) | ||
82 | { | ||
83 | unsigned int status; | ||
84 | |||
85 | status = reg_read(smbus, REG_SMSTA); | ||
86 | reg_write(smbus, REG_SMSTA, status); | ||
87 | } | ||
88 | |||
89 | static unsigned int pasemi_smb_waitready(struct pasemi_smbus *smbus) | ||
90 | { | ||
91 | int timeout = 10; | ||
92 | unsigned int status; | ||
93 | |||
94 | status = reg_read(smbus, REG_SMSTA); | ||
95 | |||
96 | while (!(status & SMSTA_XEN) && timeout--) { | ||
97 | msleep(1); | ||
98 | status = reg_read(smbus, REG_SMSTA); | ||
99 | } | ||
100 | |||
101 | if (timeout < 0) { | ||
102 | dev_warn(&smbus->dev->dev, "Timeout, status 0x%08x\n", status); | ||
103 | reg_write(smbus, REG_SMSTA, status); | ||
104 | return -ETIME; | ||
105 | } | ||
106 | |||
107 | /* Clear XEN */ | ||
108 | reg_write(smbus, REG_SMSTA, SMSTA_XEN); | ||
109 | |||
110 | return 0; | ||
111 | } | ||
112 | |||
113 | static int pasemi_i2c_xfer_msg(struct i2c_adapter *adapter, | ||
114 | struct i2c_msg *msg, int stop) | ||
115 | { | ||
116 | struct pasemi_smbus *smbus = adapter->algo_data; | ||
117 | int read, i, err; | ||
118 | u32 rd; | ||
119 | |||
120 | read = msg->flags & I2C_M_RD ? 1 : 0; | ||
121 | |||
122 | TXFIFO_WR(smbus, MTXFIFO_START | (msg->addr << 1) | read); | ||
123 | |||
124 | if (read) { | ||
125 | TXFIFO_WR(smbus, msg->len | MTXFIFO_READ | | ||
126 | (stop ? MTXFIFO_STOP : 0)); | ||
127 | |||
128 | err = pasemi_smb_waitready(smbus); | ||
129 | if (err) | ||
130 | goto reset_out; | ||
131 | |||
132 | for (i = 0; i < msg->len; i++) { | ||
133 | rd = RXFIFO_RD(smbus); | ||
134 | if (rd & MRXFIFO_EMPTY) { | ||
135 | err = -ENODATA; | ||
136 | goto reset_out; | ||
137 | } | ||
138 | msg->buf[i] = rd & MRXFIFO_DATA_M; | ||
139 | } | ||
140 | } else { | ||
141 | for (i = 0; i < msg->len - 1; i++) | ||
142 | TXFIFO_WR(smbus, msg->buf[i]); | ||
143 | |||
144 | TXFIFO_WR(smbus, msg->buf[msg->len] | | ||
145 | (stop ? MTXFIFO_STOP : 0)); | ||
146 | } | ||
147 | |||
148 | return 0; | ||
149 | |||
150 | reset_out: | ||
151 | reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | | ||
152 | (CLK_100K_DIV & CTL_CLK_M))); | ||
153 | return err; | ||
154 | } | ||
155 | |||
156 | static int pasemi_i2c_xfer(struct i2c_adapter *adapter, | ||
157 | struct i2c_msg *msgs, int num) | ||
158 | { | ||
159 | struct pasemi_smbus *smbus = adapter->algo_data; | ||
160 | int ret, i; | ||
161 | |||
162 | pasemi_smb_clear(smbus); | ||
163 | |||
164 | ret = 0; | ||
165 | |||
166 | for (i = 0; i < num && !ret; i++) | ||
167 | ret = pasemi_i2c_xfer_msg(adapter, &msgs[i], (i == (num - 1))); | ||
168 | |||
169 | return ret ? ret : num; | ||
170 | } | ||
171 | |||
172 | static int pasemi_smb_xfer(struct i2c_adapter *adapter, | ||
173 | u16 addr, unsigned short flags, char read_write, u8 command, | ||
174 | int size, union i2c_smbus_data *data) | ||
175 | { | ||
176 | struct pasemi_smbus *smbus = adapter->algo_data; | ||
177 | unsigned int rd; | ||
178 | int read_flag, err; | ||
179 | int len = 0, i; | ||
180 | |||
181 | /* All our ops take 8-bit shifted addresses */ | ||
182 | addr <<= 1; | ||
183 | read_flag = read_write == I2C_SMBUS_READ; | ||
184 | |||
185 | pasemi_smb_clear(smbus); | ||
186 | |||
187 | switch (size) { | ||
188 | case I2C_SMBUS_QUICK: | ||
189 | TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START | | ||
190 | MTXFIFO_STOP); | ||
191 | break; | ||
192 | case I2C_SMBUS_BYTE: | ||
193 | TXFIFO_WR(smbus, addr | read_flag | MTXFIFO_START); | ||
194 | if (read_write) | ||
195 | TXFIFO_WR(smbus, 1 | MTXFIFO_STOP | MTXFIFO_READ); | ||
196 | else | ||
197 | TXFIFO_WR(smbus, MTXFIFO_STOP | command); | ||
198 | break; | ||
199 | case I2C_SMBUS_BYTE_DATA: | ||
200 | TXFIFO_WR(smbus, addr | MTXFIFO_START); | ||
201 | TXFIFO_WR(smbus, command); | ||
202 | if (read_write) { | ||
203 | TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); | ||
204 | TXFIFO_WR(smbus, 1 | MTXFIFO_READ | MTXFIFO_STOP); | ||
205 | } else { | ||
206 | TXFIFO_WR(smbus, MTXFIFO_STOP | data->byte); | ||
207 | } | ||
208 | break; | ||
209 | case I2C_SMBUS_WORD_DATA: | ||
210 | TXFIFO_WR(smbus, addr | MTXFIFO_START); | ||
211 | TXFIFO_WR(smbus, command); | ||
212 | if (read_write) { | ||
213 | TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); | ||
214 | TXFIFO_WR(smbus, 2 | MTXFIFO_READ | MTXFIFO_STOP); | ||
215 | } else { | ||
216 | TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M); | ||
217 | TXFIFO_WR(smbus, MTXFIFO_STOP | (data->word >> 8)); | ||
218 | } | ||
219 | break; | ||
220 | case I2C_SMBUS_BLOCK_DATA: | ||
221 | TXFIFO_WR(smbus, addr | MTXFIFO_START); | ||
222 | TXFIFO_WR(smbus, command); | ||
223 | if (read_write) { | ||
224 | TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); | ||
225 | TXFIFO_WR(smbus, 1 | MTXFIFO_READ); | ||
226 | rd = RXFIFO_RD(smbus); | ||
227 | len = min_t(u8, (rd & MRXFIFO_DATA_M), | ||
228 | I2C_SMBUS_BLOCK_MAX); | ||
229 | TXFIFO_WR(smbus, (len + 1) | MTXFIFO_READ | | ||
230 | MTXFIFO_STOP); | ||
231 | } else { | ||
232 | len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX); | ||
233 | TXFIFO_WR(smbus, len); | ||
234 | for (i = 1; i < len; i++) | ||
235 | TXFIFO_WR(smbus, data->block[i]); | ||
236 | TXFIFO_WR(smbus, data->block[len] | MTXFIFO_STOP); | ||
237 | } | ||
238 | break; | ||
239 | case I2C_SMBUS_PROC_CALL: | ||
240 | read_write = I2C_SMBUS_READ; | ||
241 | TXFIFO_WR(smbus, addr | MTXFIFO_START); | ||
242 | TXFIFO_WR(smbus, command); | ||
243 | TXFIFO_WR(smbus, data->word & MTXFIFO_DATA_M); | ||
244 | TXFIFO_WR(smbus, (data->word >> 8) & MTXFIFO_DATA_M); | ||
245 | TXFIFO_WR(smbus, addr | I2C_SMBUS_READ | MTXFIFO_START); | ||
246 | TXFIFO_WR(smbus, 2 | MTXFIFO_STOP | MTXFIFO_READ); | ||
247 | break; | ||
248 | case I2C_SMBUS_BLOCK_PROC_CALL: | ||
249 | len = min_t(u8, data->block[0], I2C_SMBUS_BLOCK_MAX - 1); | ||
250 | read_write = I2C_SMBUS_READ; | ||
251 | TXFIFO_WR(smbus, addr | MTXFIFO_START); | ||
252 | TXFIFO_WR(smbus, command); | ||
253 | TXFIFO_WR(smbus, len); | ||
254 | for (i = 1; i <= len; i++) | ||
255 | TXFIFO_WR(smbus, data->block[i]); | ||
256 | TXFIFO_WR(smbus, addr | I2C_SMBUS_READ); | ||
257 | TXFIFO_WR(smbus, MTXFIFO_READ | 1); | ||
258 | rd = RXFIFO_RD(smbus); | ||
259 | len = min_t(u8, (rd & MRXFIFO_DATA_M), | ||
260 | I2C_SMBUS_BLOCK_MAX - len); | ||
261 | TXFIFO_WR(smbus, (len + 1) | MTXFIFO_READ | MTXFIFO_STOP); | ||
262 | break; | ||
263 | |||
264 | default: | ||
265 | dev_warn(&adapter->dev, "Unsupported transaction %d\n", size); | ||
266 | return -EINVAL; | ||
267 | } | ||
268 | |||
269 | err = pasemi_smb_waitready(smbus); | ||
270 | if (err) | ||
271 | goto reset_out; | ||
272 | |||
273 | if (read_write == I2C_SMBUS_WRITE) | ||
274 | return 0; | ||
275 | |||
276 | switch (size) { | ||
277 | case I2C_SMBUS_BYTE: | ||
278 | case I2C_SMBUS_BYTE_DATA: | ||
279 | rd = RXFIFO_RD(smbus); | ||
280 | if (rd & MRXFIFO_EMPTY) { | ||
281 | err = -ENODATA; | ||
282 | goto reset_out; | ||
283 | } | ||
284 | data->byte = rd & MRXFIFO_DATA_M; | ||
285 | break; | ||
286 | case I2C_SMBUS_WORD_DATA: | ||
287 | case I2C_SMBUS_PROC_CALL: | ||
288 | rd = RXFIFO_RD(smbus); | ||
289 | if (rd & MRXFIFO_EMPTY) { | ||
290 | err = -ENODATA; | ||
291 | goto reset_out; | ||
292 | } | ||
293 | data->word = rd & MRXFIFO_DATA_M; | ||
294 | rd = RXFIFO_RD(smbus); | ||
295 | if (rd & MRXFIFO_EMPTY) { | ||
296 | err = -ENODATA; | ||
297 | goto reset_out; | ||
298 | } | ||
299 | data->word |= (rd & MRXFIFO_DATA_M) << 8; | ||
300 | break; | ||
301 | case I2C_SMBUS_BLOCK_DATA: | ||
302 | case I2C_SMBUS_BLOCK_PROC_CALL: | ||
303 | data->block[0] = len; | ||
304 | for (i = 1; i <= len; i ++) { | ||
305 | rd = RXFIFO_RD(smbus); | ||
306 | if (rd & MRXFIFO_EMPTY) { | ||
307 | err = -ENODATA; | ||
308 | goto reset_out; | ||
309 | } | ||
310 | data->block[i] = rd & MRXFIFO_DATA_M; | ||
311 | } | ||
312 | break; | ||
313 | } | ||
314 | |||
315 | return 0; | ||
316 | |||
317 | reset_out: | ||
318 | reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | | ||
319 | (CLK_100K_DIV & CTL_CLK_M))); | ||
320 | return err; | ||
321 | } | ||
322 | |||
323 | static u32 pasemi_smb_func(struct i2c_adapter *adapter) | ||
324 | { | ||
325 | return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | | ||
326 | I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | | ||
327 | I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_PROC_CALL | | ||
328 | I2C_FUNC_SMBUS_BLOCK_PROC_CALL | I2C_FUNC_I2C; | ||
329 | } | ||
330 | |||
331 | static const struct i2c_algorithm smbus_algorithm = { | ||
332 | .master_xfer = pasemi_i2c_xfer, | ||
333 | .smbus_xfer = pasemi_smb_xfer, | ||
334 | .functionality = pasemi_smb_func, | ||
335 | }; | ||
336 | |||
337 | static int __devinit pasemi_smb_probe(struct pci_dev *dev, | ||
338 | const struct pci_device_id *id) | ||
339 | { | ||
340 | struct pasemi_smbus *smbus; | ||
341 | int error; | ||
342 | |||
343 | if (!(pci_resource_flags(dev, 0) & IORESOURCE_IO)) | ||
344 | return -ENODEV; | ||
345 | |||
346 | smbus = kzalloc(sizeof(struct pasemi_smbus), GFP_KERNEL); | ||
347 | if (!smbus) | ||
348 | return -ENOMEM; | ||
349 | |||
350 | smbus->dev = dev; | ||
351 | smbus->base = pci_resource_start(dev, 0); | ||
352 | smbus->size = pci_resource_len(dev, 0); | ||
353 | |||
354 | if (!request_region(smbus->base, smbus->size, | ||
355 | pasemi_smb_driver.name)) { | ||
356 | error = -EBUSY; | ||
357 | goto out_kfree; | ||
358 | } | ||
359 | |||
360 | smbus->adapter.owner = THIS_MODULE; | ||
361 | snprintf(smbus->adapter.name, I2C_NAME_SIZE, | ||
362 | "PA Semi SMBus adapter at 0x%lx", smbus->base); | ||
363 | smbus->adapter.class = I2C_CLASS_HWMON; | ||
364 | smbus->adapter.algo = &smbus_algorithm; | ||
365 | smbus->adapter.algo_data = smbus; | ||
366 | |||
367 | /* set up the driverfs linkage to our parent device */ | ||
368 | smbus->adapter.dev.parent = &dev->dev; | ||
369 | |||
370 | reg_write(smbus, REG_CTL, (CTL_MTR | CTL_MRR | | ||
371 | (CLK_100K_DIV & CTL_CLK_M))); | ||
372 | |||
373 | error = i2c_add_adapter(&smbus->adapter); | ||
374 | if (error) | ||
375 | goto out_release_region; | ||
376 | |||
377 | pci_set_drvdata(dev, smbus); | ||
378 | |||
379 | return 0; | ||
380 | |||
381 | out_release_region: | ||
382 | release_region(smbus->base, smbus->size); | ||
383 | out_kfree: | ||
384 | kfree(smbus); | ||
385 | return error; | ||
386 | } | ||
387 | |||
388 | static void __devexit pasemi_smb_remove(struct pci_dev *dev) | ||
389 | { | ||
390 | struct pasemi_smbus *smbus = pci_get_drvdata(dev); | ||
391 | |||
392 | i2c_del_adapter(&smbus->adapter); | ||
393 | release_region(smbus->base, smbus->size); | ||
394 | kfree(smbus); | ||
395 | } | ||
396 | |||
397 | static struct pci_device_id pasemi_smb_ids[] = { | ||
398 | { PCI_DEVICE(0x1959, 0xa003) }, | ||
399 | { 0, } | ||
400 | }; | ||
401 | |||
402 | MODULE_DEVICE_TABLE(pci, pasemi_smb_ids); | ||
403 | |||
404 | static struct pci_driver pasemi_smb_driver = { | ||
405 | .name = "i2c-pasemi", | ||
406 | .id_table = pasemi_smb_ids, | ||
407 | .probe = pasemi_smb_probe, | ||
408 | .remove = __devexit_p(pasemi_smb_remove), | ||
409 | }; | ||
410 | |||
411 | static int __init pasemi_smb_init(void) | ||
412 | { | ||
413 | return pci_register_driver(&pasemi_smb_driver); | ||
414 | } | ||
415 | |||
416 | static void __exit pasemi_smb_exit(void) | ||
417 | { | ||
418 | pci_unregister_driver(&pasemi_smb_driver); | ||
419 | } | ||
420 | |||
421 | MODULE_LICENSE("GPL"); | ||
422 | MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>"); | ||
423 | MODULE_DESCRIPTION("PA Semi PWRficient SMBus driver"); | ||
424 | |||
425 | module_init(pasemi_smb_init); | ||
426 | module_exit(pasemi_smb_exit); | ||
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index 30c7a1b38cbd..03d0aeea0189 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c | |||
@@ -23,6 +23,7 @@ | |||
23 | Supports: | 23 | Supports: |
24 | Intel PIIX4, 440MX | 24 | Intel PIIX4, 440MX |
25 | Serverworks OSB4, CSB5, CSB6, HT-1000 | 25 | Serverworks OSB4, CSB5, CSB6, HT-1000 |
26 | ATI IXP200, IXP300, IXP400, SB600 | ||
26 | SMSC Victory66 | 27 | SMSC Victory66 |
27 | 28 | ||
28 | Note: we assume there can only be one device, with one SMBus interface. | 29 | Note: we assume there can only be one device, with one SMBus interface. |
@@ -383,6 +384,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
383 | 384 | ||
384 | static struct i2c_adapter piix4_adapter = { | 385 | static struct i2c_adapter piix4_adapter = { |
385 | .owner = THIS_MODULE, | 386 | .owner = THIS_MODULE, |
387 | .id = I2C_HW_SMBUS_PIIX4, | ||
386 | .class = I2C_CLASS_HWMON, | 388 | .class = I2C_CLASS_HWMON, |
387 | .algo = &smbus_algorithm, | 389 | .algo = &smbus_algorithm, |
388 | }; | 390 | }; |
@@ -396,6 +398,8 @@ static struct pci_device_id piix4_ids[] = { | |||
396 | .driver_data = 0 }, | 398 | .driver_data = 0 }, |
397 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS), | 399 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS), |
398 | .driver_data = 0 }, | 400 | .driver_data = 0 }, |
401 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SMBUS), | ||
402 | .driver_data = 0 }, | ||
399 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), | 403 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4), |
400 | .driver_data = 0 }, | 404 | .driver_data = 0 }, |
401 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), | 405 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5), |
diff --git a/drivers/i2c/busses/i2c-powermac.c b/drivers/i2c/busses/i2c-powermac.c index 648d55533d87..1425d2245c82 100644 --- a/drivers/i2c/busses/i2c-powermac.c +++ b/drivers/i2c/busses/i2c-powermac.c | |||
@@ -25,7 +25,6 @@ | |||
25 | #include <linux/types.h> | 25 | #include <linux/types.h> |
26 | #include <linux/i2c.h> | 26 | #include <linux/i2c.h> |
27 | #include <linux/init.h> | 27 | #include <linux/init.h> |
28 | #include <linux/completion.h> | ||
29 | #include <linux/device.h> | 28 | #include <linux/device.h> |
30 | #include <linux/platform_device.h> | 29 | #include <linux/platform_device.h> |
31 | #include <asm/prom.h> | 30 | #include <asm/prom.h> |
diff --git a/drivers/i2c/busses/i2c-savage4.c b/drivers/i2c/busses/i2c-savage4.c index 844b4ff90893..b7fb65c30112 100644 --- a/drivers/i2c/busses/i2c-savage4.c +++ b/drivers/i2c/busses/i2c-savage4.c | |||
@@ -145,6 +145,7 @@ static struct i2c_algo_bit_data sav_i2c_bit_data = { | |||
145 | 145 | ||
146 | static struct i2c_adapter savage4_i2c_adapter = { | 146 | static struct i2c_adapter savage4_i2c_adapter = { |
147 | .owner = THIS_MODULE, | 147 | .owner = THIS_MODULE, |
148 | .id = I2C_HW_B_SAVAGE, | ||
148 | .name = "I2C Savage4 adapter", | 149 | .name = "I2C Savage4 adapter", |
149 | .algo_data = &sav_i2c_bit_data, | 150 | .algo_data = &sav_i2c_bit_data, |
150 | }; | 151 | }; |
diff --git a/drivers/i2c/busses/i2c-sis5595.c b/drivers/i2c/busses/i2c-sis5595.c index 38bbfd840b6b..d333babe4ad3 100644 --- a/drivers/i2c/busses/i2c-sis5595.c +++ b/drivers/i2c/busses/i2c-sis5595.c | |||
@@ -365,6 +365,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
365 | 365 | ||
366 | static struct i2c_adapter sis5595_adapter = { | 366 | static struct i2c_adapter sis5595_adapter = { |
367 | .owner = THIS_MODULE, | 367 | .owner = THIS_MODULE, |
368 | .id = I2C_HW_SMBUS_SIS5595, | ||
368 | .class = I2C_CLASS_HWMON, | 369 | .class = I2C_CLASS_HWMON, |
369 | .algo = &smbus_algorithm, | 370 | .algo = &smbus_algorithm, |
370 | }; | 371 | }; |
diff --git a/drivers/i2c/busses/i2c-sis630.c b/drivers/i2c/busses/i2c-sis630.c index dec0bafb52ab..172bacf932a6 100644 --- a/drivers/i2c/busses/i2c-sis630.c +++ b/drivers/i2c/busses/i2c-sis630.c | |||
@@ -457,6 +457,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
457 | 457 | ||
458 | static struct i2c_adapter sis630_adapter = { | 458 | static struct i2c_adapter sis630_adapter = { |
459 | .owner = THIS_MODULE, | 459 | .owner = THIS_MODULE, |
460 | .id = I2C_HW_SMBUS_SIS630, | ||
460 | .class = I2C_CLASS_HWMON, | 461 | .class = I2C_CLASS_HWMON, |
461 | .algo = &smbus_algorithm, | 462 | .algo = &smbus_algorithm, |
462 | }; | 463 | }; |
diff --git a/drivers/i2c/busses/i2c-sis96x.c b/drivers/i2c/busses/i2c-sis96x.c index 7fd07fbac336..869a635d37e9 100644 --- a/drivers/i2c/busses/i2c-sis96x.c +++ b/drivers/i2c/busses/i2c-sis96x.c | |||
@@ -249,6 +249,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
249 | 249 | ||
250 | static struct i2c_adapter sis96x_adapter = { | 250 | static struct i2c_adapter sis96x_adapter = { |
251 | .owner = THIS_MODULE, | 251 | .owner = THIS_MODULE, |
252 | .id = I2C_HW_SMBUS_SIS96X, | ||
252 | .class = I2C_CLASS_HWMON, | 253 | .class = I2C_CLASS_HWMON, |
253 | .algo = &smbus_algorithm, | 254 | .algo = &smbus_algorithm, |
254 | }; | 255 | }; |
diff --git a/drivers/i2c/busses/i2c-via.c b/drivers/i2c/busses/i2c-via.c index 15d7e00e47e6..bbcc62151f7c 100644 --- a/drivers/i2c/busses/i2c-via.c +++ b/drivers/i2c/busses/i2c-via.c | |||
@@ -86,6 +86,7 @@ static struct i2c_algo_bit_data bit_data = { | |||
86 | 86 | ||
87 | static struct i2c_adapter vt586b_adapter = { | 87 | static struct i2c_adapter vt586b_adapter = { |
88 | .owner = THIS_MODULE, | 88 | .owner = THIS_MODULE, |
89 | .id = I2C_HW_B_VIA, | ||
89 | .class = I2C_CLASS_HWMON, | 90 | .class = I2C_CLASS_HWMON, |
90 | .name = "VIA i2c", | 91 | .name = "VIA i2c", |
91 | .algo_data = &bit_data, | 92 | .algo_data = &bit_data, |
diff --git a/drivers/i2c/busses/i2c-viapro.c b/drivers/i2c/busses/i2c-viapro.c index efc6bbf0cc0a..03c5fc868548 100644 --- a/drivers/i2c/busses/i2c-viapro.c +++ b/drivers/i2c/busses/i2c-viapro.c | |||
@@ -4,7 +4,7 @@ | |||
4 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, | 4 | Copyright (c) 1998 - 2002 Frodo Looijaard <frodol@dds.nl>, |
5 | Philip Edelbrock <phil@netroedge.com>, Kyösti Mälkki <kmalkki@cc.hut.fi>, | 5 | Philip Edelbrock <phil@netroedge.com>, Kyösti Mälkki <kmalkki@cc.hut.fi>, |
6 | Mark D. Studebaker <mdsxyz123@yahoo.com> | 6 | Mark D. Studebaker <mdsxyz123@yahoo.com> |
7 | Copyright (C) 2005 Jean Delvare <khali@linux-fr.org> | 7 | Copyright (C) 2005 - 2007 Jean Delvare <khali@linux-fr.org> |
8 | 8 | ||
9 | This program is free software; you can redistribute it and/or modify | 9 | This program is free software; you can redistribute it and/or modify |
10 | it under the terms of the GNU General Public License as published by | 10 | it under the terms of the GNU General Public License as published by |
@@ -36,6 +36,7 @@ | |||
36 | VT8237R 0x3227 yes | 36 | VT8237R 0x3227 yes |
37 | VT8237A 0x3337 yes | 37 | VT8237A 0x3337 yes |
38 | VT8251 0x3287 yes | 38 | VT8251 0x3287 yes |
39 | CX700 0x8324 yes | ||
39 | 40 | ||
40 | Note: we assume there can only be one device, with one SMBus interface. | 41 | Note: we assume there can only be one device, with one SMBus interface. |
41 | */ | 42 | */ |
@@ -306,6 +307,7 @@ static const struct i2c_algorithm smbus_algorithm = { | |||
306 | 307 | ||
307 | static struct i2c_adapter vt596_adapter = { | 308 | static struct i2c_adapter vt596_adapter = { |
308 | .owner = THIS_MODULE, | 309 | .owner = THIS_MODULE, |
310 | .id = I2C_HW_SMBUS_VIA2, | ||
309 | .class = I2C_CLASS_HWMON, | 311 | .class = I2C_CLASS_HWMON, |
310 | .algo = &smbus_algorithm, | 312 | .algo = &smbus_algorithm, |
311 | }; | 313 | }; |
@@ -383,6 +385,7 @@ found: | |||
383 | dev_dbg(&pdev->dev, "VT596_smba = 0x%X\n", vt596_smba); | 385 | dev_dbg(&pdev->dev, "VT596_smba = 0x%X\n", vt596_smba); |
384 | 386 | ||
385 | switch (pdev->device) { | 387 | switch (pdev->device) { |
388 | case PCI_DEVICE_ID_VIA_CX700: | ||
386 | case PCI_DEVICE_ID_VIA_8251: | 389 | case PCI_DEVICE_ID_VIA_8251: |
387 | case PCI_DEVICE_ID_VIA_8237: | 390 | case PCI_DEVICE_ID_VIA_8237: |
388 | case PCI_DEVICE_ID_VIA_8237A: | 391 | case PCI_DEVICE_ID_VIA_8237A: |
@@ -442,6 +445,8 @@ static struct pci_device_id vt596_ids[] = { | |||
442 | .driver_data = SMBBA1 }, | 445 | .driver_data = SMBBA1 }, |
443 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8251), | 446 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8251), |
444 | .driver_data = SMBBA3 }, | 447 | .driver_data = SMBBA3 }, |
448 | { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_CX700), | ||
449 | .driver_data = SMBBA3 }, | ||
445 | { 0, } | 450 | { 0, } |
446 | }; | 451 | }; |
447 | 452 | ||
diff --git a/drivers/i2c/busses/i2c-voodoo3.c b/drivers/i2c/busses/i2c-voodoo3.c index b0377b81744b..88a3447e11e1 100644 --- a/drivers/i2c/busses/i2c-voodoo3.c +++ b/drivers/i2c/busses/i2c-voodoo3.c | |||
@@ -165,6 +165,7 @@ static struct i2c_algo_bit_data voo_i2c_bit_data = { | |||
165 | 165 | ||
166 | static struct i2c_adapter voodoo3_i2c_adapter = { | 166 | static struct i2c_adapter voodoo3_i2c_adapter = { |
167 | .owner = THIS_MODULE, | 167 | .owner = THIS_MODULE, |
168 | .id = I2C_HW_B_VOO, | ||
168 | .class = I2C_CLASS_TV_ANALOG, | 169 | .class = I2C_CLASS_TV_ANALOG, |
169 | .name = "I2C Voodoo3/Banshee adapter", | 170 | .name = "I2C Voodoo3/Banshee adapter", |
170 | .algo_data = &voo_i2c_bit_data, | 171 | .algo_data = &voo_i2c_bit_data, |
@@ -181,6 +182,7 @@ static struct i2c_algo_bit_data voo_ddc_bit_data = { | |||
181 | 182 | ||
182 | static struct i2c_adapter voodoo3_ddc_adapter = { | 183 | static struct i2c_adapter voodoo3_ddc_adapter = { |
183 | .owner = THIS_MODULE, | 184 | .owner = THIS_MODULE, |
185 | .id = I2C_HW_B_VOO, | ||
184 | .class = I2C_CLASS_DDC, | 186 | .class = I2C_CLASS_DDC, |
185 | .name = "DDC Voodoo3/Banshee adapter", | 187 | .name = "DDC Voodoo3/Banshee adapter", |
186 | .algo_data = &voo_ddc_bit_data, | 188 | .algo_data = &voo_ddc_bit_data, |
diff --git a/drivers/i2c/busses/scx200_acb.c b/drivers/i2c/busses/scx200_acb.c index 714bae780953..0b082c5a0195 100644 --- a/drivers/i2c/busses/scx200_acb.c +++ b/drivers/i2c/busses/scx200_acb.c | |||
@@ -428,7 +428,7 @@ static __init int scx200_acb_probe(struct scx200_acb_iface *iface) | |||
428 | } | 428 | } |
429 | 429 | ||
430 | static __init struct scx200_acb_iface *scx200_create_iface(const char *text, | 430 | static __init struct scx200_acb_iface *scx200_create_iface(const char *text, |
431 | int index) | 431 | struct device *dev, int index) |
432 | { | 432 | { |
433 | struct scx200_acb_iface *iface; | 433 | struct scx200_acb_iface *iface; |
434 | struct i2c_adapter *adapter; | 434 | struct i2c_adapter *adapter; |
@@ -446,6 +446,7 @@ static __init struct scx200_acb_iface *scx200_create_iface(const char *text, | |||
446 | adapter->id = I2C_HW_SMBUS_SCX200; | 446 | adapter->id = I2C_HW_SMBUS_SCX200; |
447 | adapter->algo = &scx200_acb_algorithm; | 447 | adapter->algo = &scx200_acb_algorithm; |
448 | adapter->class = I2C_CLASS_HWMON; | 448 | adapter->class = I2C_CLASS_HWMON; |
449 | adapter->dev.parent = dev; | ||
449 | 450 | ||
450 | mutex_init(&iface->mutex); | 451 | mutex_init(&iface->mutex); |
451 | 452 | ||
@@ -486,7 +487,7 @@ static __init int scx200_create_pci(const char *text, struct pci_dev *pdev, | |||
486 | struct scx200_acb_iface *iface; | 487 | struct scx200_acb_iface *iface; |
487 | int rc; | 488 | int rc; |
488 | 489 | ||
489 | iface = scx200_create_iface(text, 0); | 490 | iface = scx200_create_iface(text, &pdev->dev, 0); |
490 | 491 | ||
491 | if (iface == NULL) | 492 | if (iface == NULL) |
492 | return -ENOMEM; | 493 | return -ENOMEM; |
@@ -524,7 +525,7 @@ static int __init scx200_create_isa(const char *text, unsigned long base, | |||
524 | struct scx200_acb_iface *iface; | 525 | struct scx200_acb_iface *iface; |
525 | int rc; | 526 | int rc; |
526 | 527 | ||
527 | iface = scx200_create_iface(text, index); | 528 | iface = scx200_create_iface(text, NULL, index); |
528 | 529 | ||
529 | if (iface == NULL) | 530 | if (iface == NULL) |
530 | return -ENOMEM; | 531 | return -ENOMEM; |
diff --git a/drivers/i2c/busses/scx200_i2c.c b/drivers/i2c/busses/scx200_i2c.c index 6cd96e43aa72..c3022a023449 100644 --- a/drivers/i2c/busses/scx200_i2c.c +++ b/drivers/i2c/busses/scx200_i2c.c | |||
@@ -81,6 +81,7 @@ static struct i2c_algo_bit_data scx200_i2c_data = { | |||
81 | 81 | ||
82 | static struct i2c_adapter scx200_i2c_ops = { | 82 | static struct i2c_adapter scx200_i2c_ops = { |
83 | .owner = THIS_MODULE, | 83 | .owner = THIS_MODULE, |
84 | .id = I2C_HW_B_SCX200, | ||
84 | .algo_data = &scx200_i2c_data, | 85 | .algo_data = &scx200_i2c_data, |
85 | .name = "NatSemi SCx200 I2C", | 86 | .name = "NatSemi SCx200 I2C", |
86 | }; | 87 | }; |
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c index b05378a3d673..21fe1406c8b4 100644 --- a/drivers/i2c/i2c-core.c +++ b/drivers/i2c/i2c-core.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/seq_file.h> | 32 | #include <linux/seq_file.h> |
33 | #include <linux/platform_device.h> | 33 | #include <linux/platform_device.h> |
34 | #include <linux/mutex.h> | 34 | #include <linux/mutex.h> |
35 | #include <linux/completion.h> | ||
35 | #include <asm/uaccess.h> | 36 | #include <asm/uaccess.h> |
36 | 37 | ||
37 | 38 | ||
@@ -40,49 +41,72 @@ static LIST_HEAD(drivers); | |||
40 | static DEFINE_MUTEX(core_lists); | 41 | static DEFINE_MUTEX(core_lists); |
41 | static DEFINE_IDR(i2c_adapter_idr); | 42 | static DEFINE_IDR(i2c_adapter_idr); |
42 | 43 | ||
44 | |||
45 | /* ------------------------------------------------------------------------- */ | ||
46 | |||
43 | /* match always succeeds, as we want the probe() to tell if we really accept this match */ | 47 | /* match always succeeds, as we want the probe() to tell if we really accept this match */ |
44 | static int i2c_device_match(struct device *dev, struct device_driver *drv) | 48 | static int i2c_device_match(struct device *dev, struct device_driver *drv) |
45 | { | 49 | { |
46 | return 1; | 50 | return 1; |
47 | } | 51 | } |
48 | 52 | ||
49 | static int i2c_bus_suspend(struct device * dev, pm_message_t state) | 53 | static int i2c_device_probe(struct device *dev) |
50 | { | 54 | { |
51 | int rc = 0; | 55 | return -ENODEV; |
56 | } | ||
52 | 57 | ||
53 | if (dev->driver && dev->driver->suspend) | 58 | static int i2c_device_remove(struct device *dev) |
54 | rc = dev->driver->suspend(dev, state); | 59 | { |
55 | return rc; | 60 | return 0; |
56 | } | 61 | } |
57 | 62 | ||
58 | static int i2c_bus_resume(struct device * dev) | 63 | static void i2c_device_shutdown(struct device *dev) |
59 | { | 64 | { |
60 | int rc = 0; | 65 | struct i2c_driver *driver; |
61 | 66 | ||
62 | if (dev->driver && dev->driver->resume) | 67 | if (!dev->driver) |
63 | rc = dev->driver->resume(dev); | 68 | return; |
64 | return rc; | 69 | driver = to_i2c_driver(dev->driver); |
70 | if (driver->shutdown) | ||
71 | driver->shutdown(to_i2c_client(dev)); | ||
65 | } | 72 | } |
66 | 73 | ||
67 | static int i2c_device_probe(struct device *dev) | 74 | static int i2c_device_suspend(struct device * dev, pm_message_t mesg) |
68 | { | 75 | { |
69 | return -ENODEV; | 76 | struct i2c_driver *driver; |
77 | |||
78 | if (!dev->driver) | ||
79 | return 0; | ||
80 | driver = to_i2c_driver(dev->driver); | ||
81 | if (!driver->suspend) | ||
82 | return 0; | ||
83 | return driver->suspend(to_i2c_client(dev), mesg); | ||
70 | } | 84 | } |
71 | 85 | ||
72 | static int i2c_device_remove(struct device *dev) | 86 | static int i2c_device_resume(struct device * dev) |
73 | { | 87 | { |
74 | return 0; | 88 | struct i2c_driver *driver; |
89 | |||
90 | if (!dev->driver) | ||
91 | return 0; | ||
92 | driver = to_i2c_driver(dev->driver); | ||
93 | if (!driver->resume) | ||
94 | return 0; | ||
95 | return driver->resume(to_i2c_client(dev)); | ||
75 | } | 96 | } |
76 | 97 | ||
77 | struct bus_type i2c_bus_type = { | 98 | struct bus_type i2c_bus_type = { |
78 | .name = "i2c", | 99 | .name = "i2c", |
79 | .match = i2c_device_match, | 100 | .match = i2c_device_match, |
80 | .probe = i2c_device_probe, | 101 | .probe = i2c_device_probe, |
81 | .remove = i2c_device_remove, | 102 | .remove = i2c_device_remove, |
82 | .suspend = i2c_bus_suspend, | 103 | .shutdown = i2c_device_shutdown, |
83 | .resume = i2c_bus_resume, | 104 | .suspend = i2c_device_suspend, |
105 | .resume = i2c_device_resume, | ||
84 | }; | 106 | }; |
85 | 107 | ||
108 | /* ------------------------------------------------------------------------- */ | ||
109 | |||
86 | void i2c_adapter_dev_release(struct device *dev) | 110 | void i2c_adapter_dev_release(struct device *dev) |
87 | { | 111 | { |
88 | struct i2c_adapter *adap = dev_to_i2c_adapter(dev); | 112 | struct i2c_adapter *adap = dev_to_i2c_adapter(dev); |
@@ -193,9 +217,8 @@ int i2c_add_adapter(struct i2c_adapter *adap) | |||
193 | */ | 217 | */ |
194 | if (adap->dev.parent == NULL) { | 218 | if (adap->dev.parent == NULL) { |
195 | adap->dev.parent = &platform_bus; | 219 | adap->dev.parent = &platform_bus; |
196 | printk(KERN_WARNING "**WARNING** I2C adapter driver [%s] " | 220 | pr_debug("I2C adapter driver [%s] forgot to specify " |
197 | "forgot to specify physical device; fix it!\n", | 221 | "physical device\n", adap->name); |
198 | adap->name); | ||
199 | } | 222 | } |
200 | sprintf(adap->dev.bus_id, "i2c-%d", adap->nr); | 223 | sprintf(adap->dev.bus_id, "i2c-%d", adap->nr); |
201 | adap->dev.driver = &i2c_adapter_driver; | 224 | adap->dev.driver = &i2c_adapter_driver; |
diff --git a/drivers/ieee1394/pcilynx.c b/drivers/ieee1394/pcilynx.c index fbb7f14ec509..0742befe9227 100644 --- a/drivers/ieee1394/pcilynx.c +++ b/drivers/ieee1394/pcilynx.c | |||
@@ -1434,6 +1434,7 @@ static int __devinit add_card(struct pci_dev *dev, | |||
1434 | i2c_adapter_data = bit_data; | 1434 | i2c_adapter_data = bit_data; |
1435 | i2c_ad->algo_data = &i2c_adapter_data; | 1435 | i2c_ad->algo_data = &i2c_adapter_data; |
1436 | i2c_adapter_data.data = lynx; | 1436 | i2c_adapter_data.data = lynx; |
1437 | i2c_ad->dev.parent = &dev->dev; | ||
1437 | 1438 | ||
1438 | PRINTD(KERN_DEBUG, lynx->id,"original eeprom control: %d", | 1439 | PRINTD(KERN_DEBUG, lynx->id,"original eeprom control: %d", |
1439 | reg_read(lynx, SERIAL_EEPROM_CONTROL)); | 1440 | reg_read(lynx, SERIAL_EEPROM_CONTROL)); |
diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig index 9edfacee7d84..66b36de9fa6f 100644 --- a/drivers/infiniband/Kconfig +++ b/drivers/infiniband/Kconfig | |||
@@ -38,6 +38,7 @@ source "drivers/infiniband/hw/mthca/Kconfig" | |||
38 | source "drivers/infiniband/hw/ipath/Kconfig" | 38 | source "drivers/infiniband/hw/ipath/Kconfig" |
39 | source "drivers/infiniband/hw/ehca/Kconfig" | 39 | source "drivers/infiniband/hw/ehca/Kconfig" |
40 | source "drivers/infiniband/hw/amso1100/Kconfig" | 40 | source "drivers/infiniband/hw/amso1100/Kconfig" |
41 | source "drivers/infiniband/hw/cxgb3/Kconfig" | ||
41 | 42 | ||
42 | source "drivers/infiniband/ulp/ipoib/Kconfig" | 43 | source "drivers/infiniband/ulp/ipoib/Kconfig" |
43 | 44 | ||
diff --git a/drivers/infiniband/Makefile b/drivers/infiniband/Makefile index 2b5d1098ef45..da2066c4f22c 100644 --- a/drivers/infiniband/Makefile +++ b/drivers/infiniband/Makefile | |||
@@ -3,6 +3,7 @@ obj-$(CONFIG_INFINIBAND_MTHCA) += hw/mthca/ | |||
3 | obj-$(CONFIG_INFINIBAND_IPATH) += hw/ipath/ | 3 | obj-$(CONFIG_INFINIBAND_IPATH) += hw/ipath/ |
4 | obj-$(CONFIG_INFINIBAND_EHCA) += hw/ehca/ | 4 | obj-$(CONFIG_INFINIBAND_EHCA) += hw/ehca/ |
5 | obj-$(CONFIG_INFINIBAND_AMSO1100) += hw/amso1100/ | 5 | obj-$(CONFIG_INFINIBAND_AMSO1100) += hw/amso1100/ |
6 | obj-$(CONFIG_INFINIBAND_CXGB3) += hw/cxgb3/ | ||
6 | obj-$(CONFIG_INFINIBAND_IPOIB) += ulp/ipoib/ | 7 | obj-$(CONFIG_INFINIBAND_IPOIB) += ulp/ipoib/ |
7 | obj-$(CONFIG_INFINIBAND_SRP) += ulp/srp/ | 8 | obj-$(CONFIG_INFINIBAND_SRP) += ulp/srp/ |
8 | obj-$(CONFIG_INFINIBAND_ISER) += ulp/iser/ | 9 | obj-$(CONFIG_INFINIBAND_ISER) += ulp/iser/ |
diff --git a/drivers/infiniband/core/addr.c b/drivers/infiniband/core/addr.c index d2bb5a9a303f..a91001c59b69 100644 --- a/drivers/infiniband/core/addr.c +++ b/drivers/infiniband/core/addr.c | |||
@@ -373,7 +373,7 @@ static struct notifier_block nb = { | |||
373 | 373 | ||
374 | static int addr_init(void) | 374 | static int addr_init(void) |
375 | { | 375 | { |
376 | addr_wq = create_singlethread_workqueue("ib_addr_wq"); | 376 | addr_wq = create_singlethread_workqueue("ib_addr"); |
377 | if (!addr_wq) | 377 | if (!addr_wq) |
378 | return -ENOMEM; | 378 | return -ENOMEM; |
379 | 379 | ||
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c index 9e0ab048c878..db88e609bf42 100644 --- a/drivers/infiniband/core/cma.c +++ b/drivers/infiniband/core/cma.c | |||
@@ -71,6 +71,7 @@ static struct workqueue_struct *cma_wq; | |||
71 | static DEFINE_IDR(sdp_ps); | 71 | static DEFINE_IDR(sdp_ps); |
72 | static DEFINE_IDR(tcp_ps); | 72 | static DEFINE_IDR(tcp_ps); |
73 | static DEFINE_IDR(udp_ps); | 73 | static DEFINE_IDR(udp_ps); |
74 | static int next_port; | ||
74 | 75 | ||
75 | struct cma_device { | 76 | struct cma_device { |
76 | struct list_head list; | 77 | struct list_head list; |
@@ -1722,33 +1723,74 @@ static int cma_alloc_port(struct idr *ps, struct rdma_id_private *id_priv, | |||
1722 | unsigned short snum) | 1723 | unsigned short snum) |
1723 | { | 1724 | { |
1724 | struct rdma_bind_list *bind_list; | 1725 | struct rdma_bind_list *bind_list; |
1725 | int port, start, ret; | 1726 | int port, ret; |
1726 | 1727 | ||
1727 | bind_list = kzalloc(sizeof *bind_list, GFP_KERNEL); | 1728 | bind_list = kzalloc(sizeof *bind_list, GFP_KERNEL); |
1728 | if (!bind_list) | 1729 | if (!bind_list) |
1729 | return -ENOMEM; | 1730 | return -ENOMEM; |
1730 | 1731 | ||
1731 | start = snum ? snum : sysctl_local_port_range[0]; | 1732 | do { |
1733 | ret = idr_get_new_above(ps, bind_list, snum, &port); | ||
1734 | } while ((ret == -EAGAIN) && idr_pre_get(ps, GFP_KERNEL)); | ||
1735 | |||
1736 | if (ret) | ||
1737 | goto err1; | ||
1738 | |||
1739 | if (port != snum) { | ||
1740 | ret = -EADDRNOTAVAIL; | ||
1741 | goto err2; | ||
1742 | } | ||
1743 | |||
1744 | bind_list->ps = ps; | ||
1745 | bind_list->port = (unsigned short) port; | ||
1746 | cma_bind_port(bind_list, id_priv); | ||
1747 | return 0; | ||
1748 | err2: | ||
1749 | idr_remove(ps, port); | ||
1750 | err1: | ||
1751 | kfree(bind_list); | ||
1752 | return ret; | ||
1753 | } | ||
1732 | 1754 | ||
1755 | static int cma_alloc_any_port(struct idr *ps, struct rdma_id_private *id_priv) | ||
1756 | { | ||
1757 | struct rdma_bind_list *bind_list; | ||
1758 | int port, ret; | ||
1759 | |||
1760 | bind_list = kzalloc(sizeof *bind_list, GFP_KERNEL); | ||
1761 | if (!bind_list) | ||
1762 | return -ENOMEM; | ||
1763 | |||
1764 | retry: | ||
1733 | do { | 1765 | do { |
1734 | ret = idr_get_new_above(ps, bind_list, start, &port); | 1766 | ret = idr_get_new_above(ps, bind_list, next_port, &port); |
1735 | } while ((ret == -EAGAIN) && idr_pre_get(ps, GFP_KERNEL)); | 1767 | } while ((ret == -EAGAIN) && idr_pre_get(ps, GFP_KERNEL)); |
1736 | 1768 | ||
1737 | if (ret) | 1769 | if (ret) |
1738 | goto err; | 1770 | goto err1; |
1739 | 1771 | ||
1740 | if ((snum && port != snum) || | 1772 | if (port > sysctl_local_port_range[1]) { |
1741 | (!snum && port > sysctl_local_port_range[1])) { | 1773 | if (next_port != sysctl_local_port_range[0]) { |
1742 | idr_remove(ps, port); | 1774 | idr_remove(ps, port); |
1775 | next_port = sysctl_local_port_range[0]; | ||
1776 | goto retry; | ||
1777 | } | ||
1743 | ret = -EADDRNOTAVAIL; | 1778 | ret = -EADDRNOTAVAIL; |
1744 | goto err; | 1779 | goto err2; |
1745 | } | 1780 | } |
1746 | 1781 | ||
1782 | if (port == sysctl_local_port_range[1]) | ||
1783 | next_port = sysctl_local_port_range[0]; | ||
1784 | else | ||
1785 | next_port = port + 1; | ||
1786 | |||
1747 | bind_list->ps = ps; | 1787 | bind_list->ps = ps; |
1748 | bind_list->port = (unsigned short) port; | 1788 | bind_list->port = (unsigned short) port; |
1749 | cma_bind_port(bind_list, id_priv); | 1789 | cma_bind_port(bind_list, id_priv); |
1750 | return 0; | 1790 | return 0; |
1751 | err: | 1791 | err2: |
1792 | idr_remove(ps, port); | ||
1793 | err1: | ||
1752 | kfree(bind_list); | 1794 | kfree(bind_list); |
1753 | return ret; | 1795 | return ret; |
1754 | } | 1796 | } |
@@ -1811,7 +1853,7 @@ static int cma_get_port(struct rdma_id_private *id_priv) | |||
1811 | 1853 | ||
1812 | mutex_lock(&lock); | 1854 | mutex_lock(&lock); |
1813 | if (cma_any_port(&id_priv->id.route.addr.src_addr)) | 1855 | if (cma_any_port(&id_priv->id.route.addr.src_addr)) |
1814 | ret = cma_alloc_port(ps, id_priv, 0); | 1856 | ret = cma_alloc_any_port(ps, id_priv); |
1815 | else | 1857 | else |
1816 | ret = cma_use_port(ps, id_priv); | 1858 | ret = cma_use_port(ps, id_priv); |
1817 | mutex_unlock(&lock); | 1859 | mutex_unlock(&lock); |
@@ -2448,7 +2490,11 @@ static int cma_init(void) | |||
2448 | { | 2490 | { |
2449 | int ret; | 2491 | int ret; |
2450 | 2492 | ||
2451 | cma_wq = create_singlethread_workqueue("rdma_cm_wq"); | 2493 | get_random_bytes(&next_port, sizeof next_port); |
2494 | next_port = (next_port % (sysctl_local_port_range[1] - | ||
2495 | sysctl_local_port_range[0])) + | ||
2496 | sysctl_local_port_range[0]; | ||
2497 | cma_wq = create_singlethread_workqueue("rdma_cm"); | ||
2452 | if (!cma_wq) | 2498 | if (!cma_wq) |
2453 | return -ENOMEM; | 2499 | return -ENOMEM; |
2454 | 2500 | ||
diff --git a/drivers/infiniband/core/device.c b/drivers/infiniband/core/device.c index 63d2a39fb82c..7fabb425b033 100644 --- a/drivers/infiniband/core/device.c +++ b/drivers/infiniband/core/device.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <linux/module.h> | 36 | #include <linux/module.h> |
37 | #include <linux/string.h> | 37 | #include <linux/string.h> |
38 | #include <linux/errno.h> | 38 | #include <linux/errno.h> |
39 | #include <linux/kernel.h> | ||
39 | #include <linux/slab.h> | 40 | #include <linux/slab.h> |
40 | #include <linux/init.h> | 41 | #include <linux/init.h> |
41 | #include <linux/mutex.h> | 42 | #include <linux/mutex.h> |
@@ -93,7 +94,7 @@ static int ib_device_check_mandatory(struct ib_device *device) | |||
93 | }; | 94 | }; |
94 | int i; | 95 | int i; |
95 | 96 | ||
96 | for (i = 0; i < sizeof mandatory_table / sizeof mandatory_table[0]; ++i) { | 97 | for (i = 0; i < ARRAY_SIZE(mandatory_table); ++i) { |
97 | if (!*(void **) ((void *) device + mandatory_table[i].offset)) { | 98 | if (!*(void **) ((void *) device + mandatory_table[i].offset)) { |
98 | printk(KERN_WARNING "Device %s is missing mandatory function %s\n", | 99 | printk(KERN_WARNING "Device %s is missing mandatory function %s\n", |
99 | device->name, mandatory_table[i].name); | 100 | device->name, mandatory_table[i].name); |
diff --git a/drivers/infiniband/hw/cxgb3/Kconfig b/drivers/infiniband/hw/cxgb3/Kconfig new file mode 100644 index 000000000000..77977f55dca3 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/Kconfig | |||
@@ -0,0 +1,27 @@ | |||
1 | config INFINIBAND_CXGB3 | ||
2 | tristate "Chelsio RDMA Driver" | ||
3 | depends on CHELSIO_T3 && INFINIBAND && INET | ||
4 | select GENERIC_ALLOCATOR | ||
5 | ---help--- | ||
6 | This is an iWARP/RDMA driver for the Chelsio T3 1GbE and | ||
7 | 10GbE adapters. | ||
8 | |||
9 | For general information about Chelsio and our products, visit | ||
10 | our website at <http://www.chelsio.com>. | ||
11 | |||
12 | For customer support, please visit our customer support page at | ||
13 | <http://www.chelsio.com/support.htm>. | ||
14 | |||
15 | Please send feedback to <linux-bugs@chelsio.com>. | ||
16 | |||
17 | To compile this driver as a module, choose M here: the module | ||
18 | will be called iw_cxgb3. | ||
19 | |||
20 | config INFINIBAND_CXGB3_DEBUG | ||
21 | bool "Verbose debugging output" | ||
22 | depends on INFINIBAND_CXGB3 | ||
23 | default n | ||
24 | ---help--- | ||
25 | This option causes the Chelsio RDMA driver to produce copious | ||
26 | amounts of debug messages. Select this if you are developing | ||
27 | the driver or trying to diagnose a problem. | ||
diff --git a/drivers/infiniband/hw/cxgb3/Makefile b/drivers/infiniband/hw/cxgb3/Makefile new file mode 100644 index 000000000000..0e110f32f128 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/Makefile | |||
@@ -0,0 +1,12 @@ | |||
1 | EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/cxgb3 \ | ||
2 | -I$(TOPDIR)/drivers/infiniband/hw/cxgb3/core | ||
3 | |||
4 | obj-$(CONFIG_INFINIBAND_CXGB3) += iw_cxgb3.o | ||
5 | |||
6 | iw_cxgb3-y := iwch_cm.o iwch_ev.o iwch_cq.o iwch_qp.o iwch_mem.o \ | ||
7 | iwch_provider.o iwch.o cxio_hal.o cxio_resource.o | ||
8 | |||
9 | ifdef CONFIG_INFINIBAND_CXGB3_DEBUG | ||
10 | EXTRA_CFLAGS += -DDEBUG | ||
11 | iw_cxgb3-y += cxio_dbg.o | ||
12 | endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_dbg.c b/drivers/infiniband/hw/cxgb3/cxio_dbg.c new file mode 100644 index 000000000000..5a7306f5efae --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/cxio_dbg.c | |||
@@ -0,0 +1,207 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifdef DEBUG | ||
34 | #include <linux/types.h> | ||
35 | #include "common.h" | ||
36 | #include "cxgb3_ioctl.h" | ||
37 | #include "cxio_hal.h" | ||
38 | #include "cxio_wr.h" | ||
39 | |||
40 | void cxio_dump_tpt(struct cxio_rdev *rdev, u32 stag) | ||
41 | { | ||
42 | struct ch_mem_range *m; | ||
43 | u64 *data; | ||
44 | int rc; | ||
45 | int size = 32; | ||
46 | |||
47 | m = kmalloc(sizeof(*m) + size, GFP_ATOMIC); | ||
48 | if (!m) { | ||
49 | PDBG("%s couldn't allocate memory.\n", __FUNCTION__); | ||
50 | return; | ||
51 | } | ||
52 | m->mem_id = MEM_PMRX; | ||
53 | m->addr = (stag>>8) * 32 + rdev->rnic_info.tpt_base; | ||
54 | m->len = size; | ||
55 | PDBG("%s TPT addr 0x%x len %d\n", __FUNCTION__, m->addr, m->len); | ||
56 | rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); | ||
57 | if (rc) { | ||
58 | PDBG("%s toectl returned error %d\n", __FUNCTION__, rc); | ||
59 | kfree(m); | ||
60 | return; | ||
61 | } | ||
62 | |||
63 | data = (u64 *)m->buf; | ||
64 | while (size > 0) { | ||
65 | PDBG("TPT %08x: %016llx\n", m->addr, (unsigned long long) *data); | ||
66 | size -= 8; | ||
67 | data++; | ||
68 | m->addr += 8; | ||
69 | } | ||
70 | kfree(m); | ||
71 | } | ||
72 | |||
73 | void cxio_dump_pbl(struct cxio_rdev *rdev, u32 pbl_addr, uint len, u8 shift) | ||
74 | { | ||
75 | struct ch_mem_range *m; | ||
76 | u64 *data; | ||
77 | int rc; | ||
78 | int size, npages; | ||
79 | |||
80 | shift += 12; | ||
81 | npages = (len + (1ULL << shift) - 1) >> shift; | ||
82 | size = npages * sizeof(u64); | ||
83 | |||
84 | m = kmalloc(sizeof(*m) + size, GFP_ATOMIC); | ||
85 | if (!m) { | ||
86 | PDBG("%s couldn't allocate memory.\n", __FUNCTION__); | ||
87 | return; | ||
88 | } | ||
89 | m->mem_id = MEM_PMRX; | ||
90 | m->addr = pbl_addr; | ||
91 | m->len = size; | ||
92 | PDBG("%s PBL addr 0x%x len %d depth %d\n", | ||
93 | __FUNCTION__, m->addr, m->len, npages); | ||
94 | rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); | ||
95 | if (rc) { | ||
96 | PDBG("%s toectl returned error %d\n", __FUNCTION__, rc); | ||
97 | kfree(m); | ||
98 | return; | ||
99 | } | ||
100 | |||
101 | data = (u64 *)m->buf; | ||
102 | while (size > 0) { | ||
103 | PDBG("PBL %08x: %016llx\n", m->addr, (unsigned long long) *data); | ||
104 | size -= 8; | ||
105 | data++; | ||
106 | m->addr += 8; | ||
107 | } | ||
108 | kfree(m); | ||
109 | } | ||
110 | |||
111 | void cxio_dump_wqe(union t3_wr *wqe) | ||
112 | { | ||
113 | __be64 *data = (__be64 *)wqe; | ||
114 | uint size = (uint)(be64_to_cpu(*data) & 0xff); | ||
115 | |||
116 | if (size == 0) | ||
117 | size = 8; | ||
118 | while (size > 0) { | ||
119 | PDBG("WQE %p: %016llx\n", data, | ||
120 | (unsigned long long) be64_to_cpu(*data)); | ||
121 | size--; | ||
122 | data++; | ||
123 | } | ||
124 | } | ||
125 | |||
126 | void cxio_dump_wce(struct t3_cqe *wce) | ||
127 | { | ||
128 | __be64 *data = (__be64 *)wce; | ||
129 | int size = sizeof(*wce); | ||
130 | |||
131 | while (size > 0) { | ||
132 | PDBG("WCE %p: %016llx\n", data, | ||
133 | (unsigned long long) be64_to_cpu(*data)); | ||
134 | size -= 8; | ||
135 | data++; | ||
136 | } | ||
137 | } | ||
138 | |||
139 | void cxio_dump_rqt(struct cxio_rdev *rdev, u32 hwtid, int nents) | ||
140 | { | ||
141 | struct ch_mem_range *m; | ||
142 | int size = nents * 64; | ||
143 | u64 *data; | ||
144 | int rc; | ||
145 | |||
146 | m = kmalloc(sizeof(*m) + size, GFP_ATOMIC); | ||
147 | if (!m) { | ||
148 | PDBG("%s couldn't allocate memory.\n", __FUNCTION__); | ||
149 | return; | ||
150 | } | ||
151 | m->mem_id = MEM_PMRX; | ||
152 | m->addr = ((hwtid)<<10) + rdev->rnic_info.rqt_base; | ||
153 | m->len = size; | ||
154 | PDBG("%s RQT addr 0x%x len %d\n", __FUNCTION__, m->addr, m->len); | ||
155 | rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); | ||
156 | if (rc) { | ||
157 | PDBG("%s toectl returned error %d\n", __FUNCTION__, rc); | ||
158 | kfree(m); | ||
159 | return; | ||
160 | } | ||
161 | |||
162 | data = (u64 *)m->buf; | ||
163 | while (size > 0) { | ||
164 | PDBG("RQT %08x: %016llx\n", m->addr, (unsigned long long) *data); | ||
165 | size -= 8; | ||
166 | data++; | ||
167 | m->addr += 8; | ||
168 | } | ||
169 | kfree(m); | ||
170 | } | ||
171 | |||
172 | void cxio_dump_tcb(struct cxio_rdev *rdev, u32 hwtid) | ||
173 | { | ||
174 | struct ch_mem_range *m; | ||
175 | int size = TCB_SIZE; | ||
176 | u32 *data; | ||
177 | int rc; | ||
178 | |||
179 | m = kmalloc(sizeof(*m) + size, GFP_ATOMIC); | ||
180 | if (!m) { | ||
181 | PDBG("%s couldn't allocate memory.\n", __FUNCTION__); | ||
182 | return; | ||
183 | } | ||
184 | m->mem_id = MEM_CM; | ||
185 | m->addr = hwtid * size; | ||
186 | m->len = size; | ||
187 | PDBG("%s TCB %d len %d\n", __FUNCTION__, m->addr, m->len); | ||
188 | rc = rdev->t3cdev_p->ctl(rdev->t3cdev_p, RDMA_GET_MEM, m); | ||
189 | if (rc) { | ||
190 | PDBG("%s toectl returned error %d\n", __FUNCTION__, rc); | ||
191 | kfree(m); | ||
192 | return; | ||
193 | } | ||
194 | |||
195 | data = (u32 *)m->buf; | ||
196 | while (size > 0) { | ||
197 | printk("%2u: %08x %08x %08x %08x %08x %08x %08x %08x\n", | ||
198 | m->addr, | ||
199 | *(data+2), *(data+3), *(data),*(data+1), | ||
200 | *(data+6), *(data+7), *(data+4), *(data+5)); | ||
201 | size -= 32; | ||
202 | data += 8; | ||
203 | m->addr += 32; | ||
204 | } | ||
205 | kfree(m); | ||
206 | } | ||
207 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.c b/drivers/infiniband/hw/cxgb3/cxio_hal.c new file mode 100644 index 000000000000..82fa72041989 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.c | |||
@@ -0,0 +1,1280 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include <asm/delay.h> | ||
34 | |||
35 | #include <linux/mutex.h> | ||
36 | #include <linux/netdevice.h> | ||
37 | #include <linux/sched.h> | ||
38 | #include <linux/spinlock.h> | ||
39 | #include <linux/pci.h> | ||
40 | |||
41 | #include "cxio_resource.h" | ||
42 | #include "cxio_hal.h" | ||
43 | #include "cxgb3_offload.h" | ||
44 | #include "sge_defs.h" | ||
45 | |||
46 | static LIST_HEAD(rdev_list); | ||
47 | static cxio_hal_ev_callback_func_t cxio_ev_cb = NULL; | ||
48 | |||
49 | static inline struct cxio_rdev *cxio_hal_find_rdev_by_name(char *dev_name) | ||
50 | { | ||
51 | struct cxio_rdev *rdev; | ||
52 | |||
53 | list_for_each_entry(rdev, &rdev_list, entry) | ||
54 | if (!strcmp(rdev->dev_name, dev_name)) | ||
55 | return rdev; | ||
56 | return NULL; | ||
57 | } | ||
58 | |||
59 | static inline struct cxio_rdev *cxio_hal_find_rdev_by_t3cdev(struct t3cdev | ||
60 | *tdev) | ||
61 | { | ||
62 | struct cxio_rdev *rdev; | ||
63 | |||
64 | list_for_each_entry(rdev, &rdev_list, entry) | ||
65 | if (rdev->t3cdev_p == tdev) | ||
66 | return rdev; | ||
67 | return NULL; | ||
68 | } | ||
69 | |||
70 | int cxio_hal_cq_op(struct cxio_rdev *rdev_p, struct t3_cq *cq, | ||
71 | enum t3_cq_opcode op, u32 credit) | ||
72 | { | ||
73 | int ret; | ||
74 | struct t3_cqe *cqe; | ||
75 | u32 rptr; | ||
76 | |||
77 | struct rdma_cq_op setup; | ||
78 | setup.id = cq->cqid; | ||
79 | setup.credits = (op == CQ_CREDIT_UPDATE) ? credit : 0; | ||
80 | setup.op = op; | ||
81 | ret = rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_OP, &setup); | ||
82 | |||
83 | if ((ret < 0) || (op == CQ_CREDIT_UPDATE)) | ||
84 | return ret; | ||
85 | |||
86 | /* | ||
87 | * If the rearm returned an index other than our current index, | ||
88 | * then there might be CQE's in flight (being DMA'd). We must wait | ||
89 | * here for them to complete or the consumer can miss a notification. | ||
90 | */ | ||
91 | if (Q_PTR2IDX((cq->rptr), cq->size_log2) != ret) { | ||
92 | int i=0; | ||
93 | |||
94 | rptr = cq->rptr; | ||
95 | |||
96 | /* | ||
97 | * Keep the generation correct by bumping rptr until it | ||
98 | * matches the index returned by the rearm - 1. | ||
99 | */ | ||
100 | while (Q_PTR2IDX((rptr+1), cq->size_log2) != ret) | ||
101 | rptr++; | ||
102 | |||
103 | /* | ||
104 | * Now rptr is the index for the (last) cqe that was | ||
105 | * in-flight at the time the HW rearmed the CQ. We | ||
106 | * spin until that CQE is valid. | ||
107 | */ | ||
108 | cqe = cq->queue + Q_PTR2IDX(rptr, cq->size_log2); | ||
109 | while (!CQ_VLD_ENTRY(rptr, cq->size_log2, cqe)) { | ||
110 | udelay(1); | ||
111 | if (i++ > 1000000) { | ||
112 | BUG_ON(1); | ||
113 | printk(KERN_ERR "%s: stalled rnic\n", | ||
114 | rdev_p->dev_name); | ||
115 | return -EIO; | ||
116 | } | ||
117 | } | ||
118 | } | ||
119 | return 0; | ||
120 | } | ||
121 | |||
122 | static inline int cxio_hal_clear_cq_ctx(struct cxio_rdev *rdev_p, u32 cqid) | ||
123 | { | ||
124 | struct rdma_cq_setup setup; | ||
125 | setup.id = cqid; | ||
126 | setup.base_addr = 0; /* NULL address */ | ||
127 | setup.size = 0; /* disaable the CQ */ | ||
128 | setup.credits = 0; | ||
129 | setup.credit_thres = 0; | ||
130 | setup.ovfl_mode = 0; | ||
131 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | ||
132 | } | ||
133 | |||
134 | int cxio_hal_clear_qp_ctx(struct cxio_rdev *rdev_p, u32 qpid) | ||
135 | { | ||
136 | u64 sge_cmd; | ||
137 | struct t3_modify_qp_wr *wqe; | ||
138 | struct sk_buff *skb = alloc_skb(sizeof(*wqe), GFP_KERNEL); | ||
139 | if (!skb) { | ||
140 | PDBG("%s alloc_skb failed\n", __FUNCTION__); | ||
141 | return -ENOMEM; | ||
142 | } | ||
143 | wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe)); | ||
144 | memset(wqe, 0, sizeof(*wqe)); | ||
145 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 3, 1, qpid, 7); | ||
146 | wqe->flags = cpu_to_be32(MODQP_WRITE_EC); | ||
147 | sge_cmd = qpid << 8 | 3; | ||
148 | wqe->sge_cmd = cpu_to_be64(sge_cmd); | ||
149 | skb->priority = CPL_PRIORITY_CONTROL; | ||
150 | return (cxgb3_ofld_send(rdev_p->t3cdev_p, skb)); | ||
151 | } | ||
152 | |||
153 | int cxio_create_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | ||
154 | { | ||
155 | struct rdma_cq_setup setup; | ||
156 | int size = (1UL << (cq->size_log2)) * sizeof(struct t3_cqe); | ||
157 | |||
158 | cq->cqid = cxio_hal_get_cqid(rdev_p->rscp); | ||
159 | if (!cq->cqid) | ||
160 | return -ENOMEM; | ||
161 | cq->sw_queue = kzalloc(size, GFP_KERNEL); | ||
162 | if (!cq->sw_queue) | ||
163 | return -ENOMEM; | ||
164 | cq->queue = dma_alloc_coherent(&(rdev_p->rnic_info.pdev->dev), | ||
165 | (1UL << (cq->size_log2)) * | ||
166 | sizeof(struct t3_cqe), | ||
167 | &(cq->dma_addr), GFP_KERNEL); | ||
168 | if (!cq->queue) { | ||
169 | kfree(cq->sw_queue); | ||
170 | return -ENOMEM; | ||
171 | } | ||
172 | pci_unmap_addr_set(cq, mapping, cq->dma_addr); | ||
173 | memset(cq->queue, 0, size); | ||
174 | setup.id = cq->cqid; | ||
175 | setup.base_addr = (u64) (cq->dma_addr); | ||
176 | setup.size = 1UL << cq->size_log2; | ||
177 | setup.credits = 65535; | ||
178 | setup.credit_thres = 1; | ||
179 | if (rdev_p->t3cdev_p->type == T3B) | ||
180 | setup.ovfl_mode = 0; | ||
181 | else | ||
182 | setup.ovfl_mode = 1; | ||
183 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | ||
184 | } | ||
185 | |||
186 | int cxio_resize_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | ||
187 | { | ||
188 | struct rdma_cq_setup setup; | ||
189 | setup.id = cq->cqid; | ||
190 | setup.base_addr = (u64) (cq->dma_addr); | ||
191 | setup.size = 1UL << cq->size_log2; | ||
192 | setup.credits = setup.size; | ||
193 | setup.credit_thres = setup.size; /* TBD: overflow recovery */ | ||
194 | setup.ovfl_mode = 1; | ||
195 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | ||
196 | } | ||
197 | |||
198 | static u32 get_qpid(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) | ||
199 | { | ||
200 | struct cxio_qpid_list *entry; | ||
201 | u32 qpid; | ||
202 | int i; | ||
203 | |||
204 | mutex_lock(&uctx->lock); | ||
205 | if (!list_empty(&uctx->qpids)) { | ||
206 | entry = list_entry(uctx->qpids.next, struct cxio_qpid_list, | ||
207 | entry); | ||
208 | list_del(&entry->entry); | ||
209 | qpid = entry->qpid; | ||
210 | kfree(entry); | ||
211 | } else { | ||
212 | qpid = cxio_hal_get_qpid(rdev_p->rscp); | ||
213 | if (!qpid) | ||
214 | goto out; | ||
215 | for (i = qpid+1; i & rdev_p->qpmask; i++) { | ||
216 | entry = kmalloc(sizeof *entry, GFP_KERNEL); | ||
217 | if (!entry) | ||
218 | break; | ||
219 | entry->qpid = i; | ||
220 | list_add_tail(&entry->entry, &uctx->qpids); | ||
221 | } | ||
222 | } | ||
223 | out: | ||
224 | mutex_unlock(&uctx->lock); | ||
225 | PDBG("%s qpid 0x%x\n", __FUNCTION__, qpid); | ||
226 | return qpid; | ||
227 | } | ||
228 | |||
229 | static void put_qpid(struct cxio_rdev *rdev_p, u32 qpid, | ||
230 | struct cxio_ucontext *uctx) | ||
231 | { | ||
232 | struct cxio_qpid_list *entry; | ||
233 | |||
234 | entry = kmalloc(sizeof *entry, GFP_KERNEL); | ||
235 | if (!entry) | ||
236 | return; | ||
237 | PDBG("%s qpid 0x%x\n", __FUNCTION__, qpid); | ||
238 | entry->qpid = qpid; | ||
239 | mutex_lock(&uctx->lock); | ||
240 | list_add_tail(&entry->entry, &uctx->qpids); | ||
241 | mutex_unlock(&uctx->lock); | ||
242 | } | ||
243 | |||
244 | void cxio_release_ucontext(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) | ||
245 | { | ||
246 | struct list_head *pos, *nxt; | ||
247 | struct cxio_qpid_list *entry; | ||
248 | |||
249 | mutex_lock(&uctx->lock); | ||
250 | list_for_each_safe(pos, nxt, &uctx->qpids) { | ||
251 | entry = list_entry(pos, struct cxio_qpid_list, entry); | ||
252 | list_del_init(&entry->entry); | ||
253 | if (!(entry->qpid & rdev_p->qpmask)) | ||
254 | cxio_hal_put_qpid(rdev_p->rscp, entry->qpid); | ||
255 | kfree(entry); | ||
256 | } | ||
257 | mutex_unlock(&uctx->lock); | ||
258 | } | ||
259 | |||
260 | void cxio_init_ucontext(struct cxio_rdev *rdev_p, struct cxio_ucontext *uctx) | ||
261 | { | ||
262 | INIT_LIST_HEAD(&uctx->qpids); | ||
263 | mutex_init(&uctx->lock); | ||
264 | } | ||
265 | |||
266 | int cxio_create_qp(struct cxio_rdev *rdev_p, u32 kernel_domain, | ||
267 | struct t3_wq *wq, struct cxio_ucontext *uctx) | ||
268 | { | ||
269 | int depth = 1UL << wq->size_log2; | ||
270 | int rqsize = 1UL << wq->rq_size_log2; | ||
271 | |||
272 | wq->qpid = get_qpid(rdev_p, uctx); | ||
273 | if (!wq->qpid) | ||
274 | return -ENOMEM; | ||
275 | |||
276 | wq->rq = kzalloc(depth * sizeof(u64), GFP_KERNEL); | ||
277 | if (!wq->rq) | ||
278 | goto err1; | ||
279 | |||
280 | wq->rq_addr = cxio_hal_rqtpool_alloc(rdev_p, rqsize); | ||
281 | if (!wq->rq_addr) | ||
282 | goto err2; | ||
283 | |||
284 | wq->sq = kzalloc(depth * sizeof(struct t3_swsq), GFP_KERNEL); | ||
285 | if (!wq->sq) | ||
286 | goto err3; | ||
287 | |||
288 | wq->queue = dma_alloc_coherent(&(rdev_p->rnic_info.pdev->dev), | ||
289 | depth * sizeof(union t3_wr), | ||
290 | &(wq->dma_addr), GFP_KERNEL); | ||
291 | if (!wq->queue) | ||
292 | goto err4; | ||
293 | |||
294 | memset(wq->queue, 0, depth * sizeof(union t3_wr)); | ||
295 | pci_unmap_addr_set(wq, mapping, wq->dma_addr); | ||
296 | wq->doorbell = (void __iomem *)rdev_p->rnic_info.kdb_addr; | ||
297 | if (!kernel_domain) | ||
298 | wq->udb = (u64)rdev_p->rnic_info.udbell_physbase + | ||
299 | (wq->qpid << rdev_p->qpshift); | ||
300 | PDBG("%s qpid 0x%x doorbell 0x%p udb 0x%llx\n", __FUNCTION__, | ||
301 | wq->qpid, wq->doorbell, (unsigned long long) wq->udb); | ||
302 | return 0; | ||
303 | err4: | ||
304 | kfree(wq->sq); | ||
305 | err3: | ||
306 | cxio_hal_rqtpool_free(rdev_p, wq->rq_addr, rqsize); | ||
307 | err2: | ||
308 | kfree(wq->rq); | ||
309 | err1: | ||
310 | put_qpid(rdev_p, wq->qpid, uctx); | ||
311 | return -ENOMEM; | ||
312 | } | ||
313 | |||
314 | int cxio_destroy_cq(struct cxio_rdev *rdev_p, struct t3_cq *cq) | ||
315 | { | ||
316 | int err; | ||
317 | err = cxio_hal_clear_cq_ctx(rdev_p, cq->cqid); | ||
318 | kfree(cq->sw_queue); | ||
319 | dma_free_coherent(&(rdev_p->rnic_info.pdev->dev), | ||
320 | (1UL << (cq->size_log2)) | ||
321 | * sizeof(struct t3_cqe), cq->queue, | ||
322 | pci_unmap_addr(cq, mapping)); | ||
323 | cxio_hal_put_cqid(rdev_p->rscp, cq->cqid); | ||
324 | return err; | ||
325 | } | ||
326 | |||
327 | int cxio_destroy_qp(struct cxio_rdev *rdev_p, struct t3_wq *wq, | ||
328 | struct cxio_ucontext *uctx) | ||
329 | { | ||
330 | dma_free_coherent(&(rdev_p->rnic_info.pdev->dev), | ||
331 | (1UL << (wq->size_log2)) | ||
332 | * sizeof(union t3_wr), wq->queue, | ||
333 | pci_unmap_addr(wq, mapping)); | ||
334 | kfree(wq->sq); | ||
335 | cxio_hal_rqtpool_free(rdev_p, wq->rq_addr, (1UL << wq->rq_size_log2)); | ||
336 | kfree(wq->rq); | ||
337 | put_qpid(rdev_p, wq->qpid, uctx); | ||
338 | return 0; | ||
339 | } | ||
340 | |||
341 | static void insert_recv_cqe(struct t3_wq *wq, struct t3_cq *cq) | ||
342 | { | ||
343 | struct t3_cqe cqe; | ||
344 | |||
345 | PDBG("%s wq %p cq %p sw_rptr 0x%x sw_wptr 0x%x\n", __FUNCTION__, | ||
346 | wq, cq, cq->sw_rptr, cq->sw_wptr); | ||
347 | memset(&cqe, 0, sizeof(cqe)); | ||
348 | cqe.header = cpu_to_be32(V_CQE_STATUS(TPT_ERR_SWFLUSH) | | ||
349 | V_CQE_OPCODE(T3_SEND) | | ||
350 | V_CQE_TYPE(0) | | ||
351 | V_CQE_SWCQE(1) | | ||
352 | V_CQE_QPID(wq->qpid) | | ||
353 | V_CQE_GENBIT(Q_GENBIT(cq->sw_wptr, | ||
354 | cq->size_log2))); | ||
355 | *(cq->sw_queue + Q_PTR2IDX(cq->sw_wptr, cq->size_log2)) = cqe; | ||
356 | cq->sw_wptr++; | ||
357 | } | ||
358 | |||
359 | void cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count) | ||
360 | { | ||
361 | u32 ptr; | ||
362 | |||
363 | PDBG("%s wq %p cq %p\n", __FUNCTION__, wq, cq); | ||
364 | |||
365 | /* flush RQ */ | ||
366 | PDBG("%s rq_rptr %u rq_wptr %u skip count %u\n", __FUNCTION__, | ||
367 | wq->rq_rptr, wq->rq_wptr, count); | ||
368 | ptr = wq->rq_rptr + count; | ||
369 | while (ptr++ != wq->rq_wptr) | ||
370 | insert_recv_cqe(wq, cq); | ||
371 | } | ||
372 | |||
373 | static void insert_sq_cqe(struct t3_wq *wq, struct t3_cq *cq, | ||
374 | struct t3_swsq *sqp) | ||
375 | { | ||
376 | struct t3_cqe cqe; | ||
377 | |||
378 | PDBG("%s wq %p cq %p sw_rptr 0x%x sw_wptr 0x%x\n", __FUNCTION__, | ||
379 | wq, cq, cq->sw_rptr, cq->sw_wptr); | ||
380 | memset(&cqe, 0, sizeof(cqe)); | ||
381 | cqe.header = cpu_to_be32(V_CQE_STATUS(TPT_ERR_SWFLUSH) | | ||
382 | V_CQE_OPCODE(sqp->opcode) | | ||
383 | V_CQE_TYPE(1) | | ||
384 | V_CQE_SWCQE(1) | | ||
385 | V_CQE_QPID(wq->qpid) | | ||
386 | V_CQE_GENBIT(Q_GENBIT(cq->sw_wptr, | ||
387 | cq->size_log2))); | ||
388 | cqe.u.scqe.wrid_hi = sqp->sq_wptr; | ||
389 | |||
390 | *(cq->sw_queue + Q_PTR2IDX(cq->sw_wptr, cq->size_log2)) = cqe; | ||
391 | cq->sw_wptr++; | ||
392 | } | ||
393 | |||
394 | void cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count) | ||
395 | { | ||
396 | __u32 ptr; | ||
397 | struct t3_swsq *sqp = wq->sq + Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2); | ||
398 | |||
399 | ptr = wq->sq_rptr + count; | ||
400 | sqp += count; | ||
401 | while (ptr != wq->sq_wptr) { | ||
402 | insert_sq_cqe(wq, cq, sqp); | ||
403 | sqp++; | ||
404 | ptr++; | ||
405 | } | ||
406 | } | ||
407 | |||
408 | /* | ||
409 | * Move all CQEs from the HWCQ into the SWCQ. | ||
410 | */ | ||
411 | void cxio_flush_hw_cq(struct t3_cq *cq) | ||
412 | { | ||
413 | struct t3_cqe *cqe, *swcqe; | ||
414 | |||
415 | PDBG("%s cq %p cqid 0x%x\n", __FUNCTION__, cq, cq->cqid); | ||
416 | cqe = cxio_next_hw_cqe(cq); | ||
417 | while (cqe) { | ||
418 | PDBG("%s flushing hwcq rptr 0x%x to swcq wptr 0x%x\n", | ||
419 | __FUNCTION__, cq->rptr, cq->sw_wptr); | ||
420 | swcqe = cq->sw_queue + Q_PTR2IDX(cq->sw_wptr, cq->size_log2); | ||
421 | *swcqe = *cqe; | ||
422 | swcqe->header |= cpu_to_be32(V_CQE_SWCQE(1)); | ||
423 | cq->sw_wptr++; | ||
424 | cq->rptr++; | ||
425 | cqe = cxio_next_hw_cqe(cq); | ||
426 | } | ||
427 | } | ||
428 | |||
429 | static inline int cqe_completes_wr(struct t3_cqe *cqe, struct t3_wq *wq) | ||
430 | { | ||
431 | if (CQE_OPCODE(*cqe) == T3_TERMINATE) | ||
432 | return 0; | ||
433 | |||
434 | if ((CQE_OPCODE(*cqe) == T3_RDMA_WRITE) && RQ_TYPE(*cqe)) | ||
435 | return 0; | ||
436 | |||
437 | if ((CQE_OPCODE(*cqe) == T3_READ_RESP) && SQ_TYPE(*cqe)) | ||
438 | return 0; | ||
439 | |||
440 | if ((CQE_OPCODE(*cqe) == T3_SEND) && RQ_TYPE(*cqe) && | ||
441 | Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) | ||
442 | return 0; | ||
443 | |||
444 | return 1; | ||
445 | } | ||
446 | |||
447 | void cxio_count_scqes(struct t3_cq *cq, struct t3_wq *wq, int *count) | ||
448 | { | ||
449 | struct t3_cqe *cqe; | ||
450 | u32 ptr; | ||
451 | |||
452 | *count = 0; | ||
453 | ptr = cq->sw_rptr; | ||
454 | while (!Q_EMPTY(ptr, cq->sw_wptr)) { | ||
455 | cqe = cq->sw_queue + (Q_PTR2IDX(ptr, cq->size_log2)); | ||
456 | if ((SQ_TYPE(*cqe) || (CQE_OPCODE(*cqe) == T3_READ_RESP)) && | ||
457 | (CQE_QPID(*cqe) == wq->qpid)) | ||
458 | (*count)++; | ||
459 | ptr++; | ||
460 | } | ||
461 | PDBG("%s cq %p count %d\n", __FUNCTION__, cq, *count); | ||
462 | } | ||
463 | |||
464 | void cxio_count_rcqes(struct t3_cq *cq, struct t3_wq *wq, int *count) | ||
465 | { | ||
466 | struct t3_cqe *cqe; | ||
467 | u32 ptr; | ||
468 | |||
469 | *count = 0; | ||
470 | PDBG("%s count zero %d\n", __FUNCTION__, *count); | ||
471 | ptr = cq->sw_rptr; | ||
472 | while (!Q_EMPTY(ptr, cq->sw_wptr)) { | ||
473 | cqe = cq->sw_queue + (Q_PTR2IDX(ptr, cq->size_log2)); | ||
474 | if (RQ_TYPE(*cqe) && (CQE_OPCODE(*cqe) != T3_READ_RESP) && | ||
475 | (CQE_QPID(*cqe) == wq->qpid) && cqe_completes_wr(cqe, wq)) | ||
476 | (*count)++; | ||
477 | ptr++; | ||
478 | } | ||
479 | PDBG("%s cq %p count %d\n", __FUNCTION__, cq, *count); | ||
480 | } | ||
481 | |||
482 | static int cxio_hal_init_ctrl_cq(struct cxio_rdev *rdev_p) | ||
483 | { | ||
484 | struct rdma_cq_setup setup; | ||
485 | setup.id = 0; | ||
486 | setup.base_addr = 0; /* NULL address */ | ||
487 | setup.size = 1; /* enable the CQ */ | ||
488 | setup.credits = 0; | ||
489 | |||
490 | /* force SGE to redirect to RspQ and interrupt */ | ||
491 | setup.credit_thres = 0; | ||
492 | setup.ovfl_mode = 1; | ||
493 | return (rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_CQ_SETUP, &setup)); | ||
494 | } | ||
495 | |||
496 | static int cxio_hal_init_ctrl_qp(struct cxio_rdev *rdev_p) | ||
497 | { | ||
498 | int err; | ||
499 | u64 sge_cmd, ctx0, ctx1; | ||
500 | u64 base_addr; | ||
501 | struct t3_modify_qp_wr *wqe; | ||
502 | struct sk_buff *skb = alloc_skb(sizeof(*wqe), GFP_KERNEL); | ||
503 | |||
504 | |||
505 | if (!skb) { | ||
506 | PDBG("%s alloc_skb failed\n", __FUNCTION__); | ||
507 | return -ENOMEM; | ||
508 | } | ||
509 | err = cxio_hal_init_ctrl_cq(rdev_p); | ||
510 | if (err) { | ||
511 | PDBG("%s err %d initializing ctrl_cq\n", __FUNCTION__, err); | ||
512 | return err; | ||
513 | } | ||
514 | rdev_p->ctrl_qp.workq = dma_alloc_coherent( | ||
515 | &(rdev_p->rnic_info.pdev->dev), | ||
516 | (1 << T3_CTRL_QP_SIZE_LOG2) * | ||
517 | sizeof(union t3_wr), | ||
518 | &(rdev_p->ctrl_qp.dma_addr), | ||
519 | GFP_KERNEL); | ||
520 | if (!rdev_p->ctrl_qp.workq) { | ||
521 | PDBG("%s dma_alloc_coherent failed\n", __FUNCTION__); | ||
522 | return -ENOMEM; | ||
523 | } | ||
524 | pci_unmap_addr_set(&rdev_p->ctrl_qp, mapping, | ||
525 | rdev_p->ctrl_qp.dma_addr); | ||
526 | rdev_p->ctrl_qp.doorbell = (void __iomem *)rdev_p->rnic_info.kdb_addr; | ||
527 | memset(rdev_p->ctrl_qp.workq, 0, | ||
528 | (1 << T3_CTRL_QP_SIZE_LOG2) * sizeof(union t3_wr)); | ||
529 | |||
530 | mutex_init(&rdev_p->ctrl_qp.lock); | ||
531 | init_waitqueue_head(&rdev_p->ctrl_qp.waitq); | ||
532 | |||
533 | /* update HW Ctrl QP context */ | ||
534 | base_addr = rdev_p->ctrl_qp.dma_addr; | ||
535 | base_addr >>= 12; | ||
536 | ctx0 = (V_EC_SIZE((1 << T3_CTRL_QP_SIZE_LOG2)) | | ||
537 | V_EC_BASE_LO((u32) base_addr & 0xffff)); | ||
538 | ctx0 <<= 32; | ||
539 | ctx0 |= V_EC_CREDITS(FW_WR_NUM); | ||
540 | base_addr >>= 16; | ||
541 | ctx1 = (u32) base_addr; | ||
542 | base_addr >>= 32; | ||
543 | ctx1 |= ((u64) (V_EC_BASE_HI((u32) base_addr & 0xf) | V_EC_RESPQ(0) | | ||
544 | V_EC_TYPE(0) | V_EC_GEN(1) | | ||
545 | V_EC_UP_TOKEN(T3_CTL_QP_TID) | F_EC_VALID)) << 32; | ||
546 | wqe = (struct t3_modify_qp_wr *) skb_put(skb, sizeof(*wqe)); | ||
547 | memset(wqe, 0, sizeof(*wqe)); | ||
548 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_QP_MOD, 0, 1, | ||
549 | T3_CTL_QP_TID, 7); | ||
550 | wqe->flags = cpu_to_be32(MODQP_WRITE_EC); | ||
551 | sge_cmd = (3ULL << 56) | FW_RI_SGEEC_START << 8 | 3; | ||
552 | wqe->sge_cmd = cpu_to_be64(sge_cmd); | ||
553 | wqe->ctx1 = cpu_to_be64(ctx1); | ||
554 | wqe->ctx0 = cpu_to_be64(ctx0); | ||
555 | PDBG("CtrlQP dma_addr 0x%llx workq %p size %d\n", | ||
556 | (unsigned long long) rdev_p->ctrl_qp.dma_addr, | ||
557 | rdev_p->ctrl_qp.workq, 1 << T3_CTRL_QP_SIZE_LOG2); | ||
558 | skb->priority = CPL_PRIORITY_CONTROL; | ||
559 | return (cxgb3_ofld_send(rdev_p->t3cdev_p, skb)); | ||
560 | } | ||
561 | |||
562 | static int cxio_hal_destroy_ctrl_qp(struct cxio_rdev *rdev_p) | ||
563 | { | ||
564 | dma_free_coherent(&(rdev_p->rnic_info.pdev->dev), | ||
565 | (1UL << T3_CTRL_QP_SIZE_LOG2) | ||
566 | * sizeof(union t3_wr), rdev_p->ctrl_qp.workq, | ||
567 | pci_unmap_addr(&rdev_p->ctrl_qp, mapping)); | ||
568 | return cxio_hal_clear_qp_ctx(rdev_p, T3_CTRL_QP_ID); | ||
569 | } | ||
570 | |||
571 | /* write len bytes of data into addr (32B aligned address) | ||
572 | * If data is NULL, clear len byte of memory to zero. | ||
573 | * caller aquires the ctrl_qp lock before the call | ||
574 | */ | ||
575 | static int cxio_hal_ctrl_qp_write_mem(struct cxio_rdev *rdev_p, u32 addr, | ||
576 | u32 len, void *data, int completion) | ||
577 | { | ||
578 | u32 i, nr_wqe, copy_len; | ||
579 | u8 *copy_data; | ||
580 | u8 wr_len, utx_len; /* lenght in 8 byte flit */ | ||
581 | enum t3_wr_flags flag; | ||
582 | __be64 *wqe; | ||
583 | u64 utx_cmd; | ||
584 | addr &= 0x7FFFFFF; | ||
585 | nr_wqe = len % 96 ? len / 96 + 1 : len / 96; /* 96B max per WQE */ | ||
586 | PDBG("%s wptr 0x%x rptr 0x%x len %d, nr_wqe %d data %p addr 0x%0x\n", | ||
587 | __FUNCTION__, rdev_p->ctrl_qp.wptr, rdev_p->ctrl_qp.rptr, len, | ||
588 | nr_wqe, data, addr); | ||
589 | utx_len = 3; /* in 32B unit */ | ||
590 | for (i = 0; i < nr_wqe; i++) { | ||
591 | if (Q_FULL(rdev_p->ctrl_qp.rptr, rdev_p->ctrl_qp.wptr, | ||
592 | T3_CTRL_QP_SIZE_LOG2)) { | ||
593 | PDBG("%s ctrl_qp full wtpr 0x%0x rptr 0x%0x, " | ||
594 | "wait for more space i %d\n", __FUNCTION__, | ||
595 | rdev_p->ctrl_qp.wptr, rdev_p->ctrl_qp.rptr, i); | ||
596 | if (wait_event_interruptible(rdev_p->ctrl_qp.waitq, | ||
597 | !Q_FULL(rdev_p->ctrl_qp.rptr, | ||
598 | rdev_p->ctrl_qp.wptr, | ||
599 | T3_CTRL_QP_SIZE_LOG2))) { | ||
600 | PDBG("%s ctrl_qp workq interrupted\n", | ||
601 | __FUNCTION__); | ||
602 | return -ERESTARTSYS; | ||
603 | } | ||
604 | PDBG("%s ctrl_qp wakeup, continue posting work request " | ||
605 | "i %d\n", __FUNCTION__, i); | ||
606 | } | ||
607 | wqe = (__be64 *)(rdev_p->ctrl_qp.workq + (rdev_p->ctrl_qp.wptr % | ||
608 | (1 << T3_CTRL_QP_SIZE_LOG2))); | ||
609 | flag = 0; | ||
610 | if (i == (nr_wqe - 1)) { | ||
611 | /* last WQE */ | ||
612 | flag = completion ? T3_COMPLETION_FLAG : 0; | ||
613 | if (len % 32) | ||
614 | utx_len = len / 32 + 1; | ||
615 | else | ||
616 | utx_len = len / 32; | ||
617 | } | ||
618 | |||
619 | /* | ||
620 | * Force a CQE to return the credit to the workq in case | ||
621 | * we posted more than half the max QP size of WRs | ||
622 | */ | ||
623 | if ((i != 0) && | ||
624 | (i % (((1 << T3_CTRL_QP_SIZE_LOG2)) >> 1) == 0)) { | ||
625 | flag = T3_COMPLETION_FLAG; | ||
626 | PDBG("%s force completion at i %d\n", __FUNCTION__, i); | ||
627 | } | ||
628 | |||
629 | /* build the utx mem command */ | ||
630 | wqe += (sizeof(struct t3_bypass_wr) >> 3); | ||
631 | utx_cmd = (T3_UTX_MEM_WRITE << 28) | (addr + i * 3); | ||
632 | utx_cmd <<= 32; | ||
633 | utx_cmd |= (utx_len << 28) | ((utx_len << 2) + 1); | ||
634 | *wqe = cpu_to_be64(utx_cmd); | ||
635 | wqe++; | ||
636 | copy_data = (u8 *) data + i * 96; | ||
637 | copy_len = len > 96 ? 96 : len; | ||
638 | |||
639 | /* clear memory content if data is NULL */ | ||
640 | if (data) | ||
641 | memcpy(wqe, copy_data, copy_len); | ||
642 | else | ||
643 | memset(wqe, 0, copy_len); | ||
644 | if (copy_len % 32) | ||
645 | memset(((u8 *) wqe) + copy_len, 0, | ||
646 | 32 - (copy_len % 32)); | ||
647 | wr_len = ((sizeof(struct t3_bypass_wr)) >> 3) + 1 + | ||
648 | (utx_len << 2); | ||
649 | wqe = (__be64 *)(rdev_p->ctrl_qp.workq + (rdev_p->ctrl_qp.wptr % | ||
650 | (1 << T3_CTRL_QP_SIZE_LOG2))); | ||
651 | |||
652 | /* wptr in the WRID[31:0] */ | ||
653 | ((union t3_wrid *)(wqe+1))->id0.low = rdev_p->ctrl_qp.wptr; | ||
654 | |||
655 | /* | ||
656 | * This must be the last write with a memory barrier | ||
657 | * for the genbit | ||
658 | */ | ||
659 | build_fw_riwrh((struct fw_riwrh *) wqe, T3_WR_BP, flag, | ||
660 | Q_GENBIT(rdev_p->ctrl_qp.wptr, | ||
661 | T3_CTRL_QP_SIZE_LOG2), T3_CTRL_QP_ID, | ||
662 | wr_len); | ||
663 | if (flag == T3_COMPLETION_FLAG) | ||
664 | ring_doorbell(rdev_p->ctrl_qp.doorbell, T3_CTRL_QP_ID); | ||
665 | len -= 96; | ||
666 | rdev_p->ctrl_qp.wptr++; | ||
667 | } | ||
668 | return 0; | ||
669 | } | ||
670 | |||
671 | /* IN: stag key, pdid, perm, zbva, to, len, page_size, pbl, and pbl_size | ||
672 | * OUT: stag index, actual pbl_size, pbl_addr allocated. | ||
673 | * TBD: shared memory region support | ||
674 | */ | ||
675 | static int __cxio_tpt_op(struct cxio_rdev *rdev_p, u32 reset_tpt_entry, | ||
676 | u32 *stag, u8 stag_state, u32 pdid, | ||
677 | enum tpt_mem_type type, enum tpt_mem_perm perm, | ||
678 | u32 zbva, u64 to, u32 len, u8 page_size, __be64 *pbl, | ||
679 | u32 *pbl_size, u32 *pbl_addr) | ||
680 | { | ||
681 | int err; | ||
682 | struct tpt_entry tpt; | ||
683 | u32 stag_idx; | ||
684 | u32 wptr; | ||
685 | int rereg = (*stag != T3_STAG_UNSET); | ||
686 | |||
687 | stag_state = stag_state > 0; | ||
688 | stag_idx = (*stag) >> 8; | ||
689 | |||
690 | if ((!reset_tpt_entry) && !(*stag != T3_STAG_UNSET)) { | ||
691 | stag_idx = cxio_hal_get_stag(rdev_p->rscp); | ||
692 | if (!stag_idx) | ||
693 | return -ENOMEM; | ||
694 | *stag = (stag_idx << 8) | ((*stag) & 0xFF); | ||
695 | } | ||
696 | PDBG("%s stag_state 0x%0x type 0x%0x pdid 0x%0x, stag_idx 0x%x\n", | ||
697 | __FUNCTION__, stag_state, type, pdid, stag_idx); | ||
698 | |||
699 | if (reset_tpt_entry) | ||
700 | cxio_hal_pblpool_free(rdev_p, *pbl_addr, *pbl_size << 3); | ||
701 | else if (!rereg) { | ||
702 | *pbl_addr = cxio_hal_pblpool_alloc(rdev_p, *pbl_size << 3); | ||
703 | if (!*pbl_addr) { | ||
704 | return -ENOMEM; | ||
705 | } | ||
706 | } | ||
707 | |||
708 | mutex_lock(&rdev_p->ctrl_qp.lock); | ||
709 | |||
710 | /* write PBL first if any - update pbl only if pbl list exist */ | ||
711 | if (pbl) { | ||
712 | |||
713 | PDBG("%s *pdb_addr 0x%x, pbl_base 0x%x, pbl_size %d\n", | ||
714 | __FUNCTION__, *pbl_addr, rdev_p->rnic_info.pbl_base, | ||
715 | *pbl_size); | ||
716 | err = cxio_hal_ctrl_qp_write_mem(rdev_p, | ||
717 | (*pbl_addr >> 5), | ||
718 | (*pbl_size << 3), pbl, 0); | ||
719 | if (err) | ||
720 | goto ret; | ||
721 | } | ||
722 | |||
723 | /* write TPT entry */ | ||
724 | if (reset_tpt_entry) | ||
725 | memset(&tpt, 0, sizeof(tpt)); | ||
726 | else { | ||
727 | tpt.valid_stag_pdid = cpu_to_be32(F_TPT_VALID | | ||
728 | V_TPT_STAG_KEY((*stag) & M_TPT_STAG_KEY) | | ||
729 | V_TPT_STAG_STATE(stag_state) | | ||
730 | V_TPT_STAG_TYPE(type) | V_TPT_PDID(pdid)); | ||
731 | BUG_ON(page_size >= 28); | ||
732 | tpt.flags_pagesize_qpid = cpu_to_be32(V_TPT_PERM(perm) | | ||
733 | F_TPT_MW_BIND_ENABLE | | ||
734 | V_TPT_ADDR_TYPE((zbva ? TPT_ZBTO : TPT_VATO)) | | ||
735 | V_TPT_PAGE_SIZE(page_size)); | ||
736 | tpt.rsvd_pbl_addr = reset_tpt_entry ? 0 : | ||
737 | cpu_to_be32(V_TPT_PBL_ADDR(PBL_OFF(rdev_p, *pbl_addr)>>3)); | ||
738 | tpt.len = cpu_to_be32(len); | ||
739 | tpt.va_hi = cpu_to_be32((u32) (to >> 32)); | ||
740 | tpt.va_low_or_fbo = cpu_to_be32((u32) (to & 0xFFFFFFFFULL)); | ||
741 | tpt.rsvd_bind_cnt_or_pstag = 0; | ||
742 | tpt.rsvd_pbl_size = reset_tpt_entry ? 0 : | ||
743 | cpu_to_be32(V_TPT_PBL_SIZE((*pbl_size) >> 2)); | ||
744 | } | ||
745 | err = cxio_hal_ctrl_qp_write_mem(rdev_p, | ||
746 | stag_idx + | ||
747 | (rdev_p->rnic_info.tpt_base >> 5), | ||
748 | sizeof(tpt), &tpt, 1); | ||
749 | |||
750 | /* release the stag index to free pool */ | ||
751 | if (reset_tpt_entry) | ||
752 | cxio_hal_put_stag(rdev_p->rscp, stag_idx); | ||
753 | ret: | ||
754 | wptr = rdev_p->ctrl_qp.wptr; | ||
755 | mutex_unlock(&rdev_p->ctrl_qp.lock); | ||
756 | if (!err) | ||
757 | if (wait_event_interruptible(rdev_p->ctrl_qp.waitq, | ||
758 | SEQ32_GE(rdev_p->ctrl_qp.rptr, | ||
759 | wptr))) | ||
760 | return -ERESTARTSYS; | ||
761 | return err; | ||
762 | } | ||
763 | |||
764 | /* IN : stag key, pdid, pbl_size | ||
765 | * Out: stag index, actaul pbl_size, and pbl_addr allocated. | ||
766 | */ | ||
767 | int cxio_allocate_stag(struct cxio_rdev *rdev_p, u32 * stag, u32 pdid, | ||
768 | enum tpt_mem_perm perm, u32 * pbl_size, u32 * pbl_addr) | ||
769 | { | ||
770 | *stag = T3_STAG_UNSET; | ||
771 | return (__cxio_tpt_op(rdev_p, 0, stag, 0, pdid, TPT_NON_SHARED_MR, | ||
772 | perm, 0, 0ULL, 0, 0, NULL, pbl_size, pbl_addr)); | ||
773 | } | ||
774 | |||
775 | int cxio_register_phys_mem(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid, | ||
776 | enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, | ||
777 | u8 page_size, __be64 *pbl, u32 *pbl_size, | ||
778 | u32 *pbl_addr) | ||
779 | { | ||
780 | *stag = T3_STAG_UNSET; | ||
781 | return __cxio_tpt_op(rdev_p, 0, stag, 1, pdid, TPT_NON_SHARED_MR, perm, | ||
782 | zbva, to, len, page_size, pbl, pbl_size, pbl_addr); | ||
783 | } | ||
784 | |||
785 | int cxio_reregister_phys_mem(struct cxio_rdev *rdev_p, u32 *stag, u32 pdid, | ||
786 | enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, | ||
787 | u8 page_size, __be64 *pbl, u32 *pbl_size, | ||
788 | u32 *pbl_addr) | ||
789 | { | ||
790 | return __cxio_tpt_op(rdev_p, 0, stag, 1, pdid, TPT_NON_SHARED_MR, perm, | ||
791 | zbva, to, len, page_size, pbl, pbl_size, pbl_addr); | ||
792 | } | ||
793 | |||
794 | int cxio_dereg_mem(struct cxio_rdev *rdev_p, u32 stag, u32 pbl_size, | ||
795 | u32 pbl_addr) | ||
796 | { | ||
797 | return __cxio_tpt_op(rdev_p, 1, &stag, 0, 0, 0, 0, 0, 0ULL, 0, 0, NULL, | ||
798 | &pbl_size, &pbl_addr); | ||
799 | } | ||
800 | |||
801 | int cxio_allocate_window(struct cxio_rdev *rdev_p, u32 * stag, u32 pdid) | ||
802 | { | ||
803 | u32 pbl_size = 0; | ||
804 | *stag = T3_STAG_UNSET; | ||
805 | return __cxio_tpt_op(rdev_p, 0, stag, 0, pdid, TPT_MW, 0, 0, 0ULL, 0, 0, | ||
806 | NULL, &pbl_size, NULL); | ||
807 | } | ||
808 | |||
809 | int cxio_deallocate_window(struct cxio_rdev *rdev_p, u32 stag) | ||
810 | { | ||
811 | return __cxio_tpt_op(rdev_p, 1, &stag, 0, 0, 0, 0, 0, 0ULL, 0, 0, NULL, | ||
812 | NULL, NULL); | ||
813 | } | ||
814 | |||
815 | int cxio_rdma_init(struct cxio_rdev *rdev_p, struct t3_rdma_init_attr *attr) | ||
816 | { | ||
817 | struct t3_rdma_init_wr *wqe; | ||
818 | struct sk_buff *skb = alloc_skb(sizeof(*wqe), GFP_ATOMIC); | ||
819 | if (!skb) | ||
820 | return -ENOMEM; | ||
821 | PDBG("%s rdev_p %p\n", __FUNCTION__, rdev_p); | ||
822 | wqe = (struct t3_rdma_init_wr *) __skb_put(skb, sizeof(*wqe)); | ||
823 | wqe->wrh.op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(T3_WR_INIT)); | ||
824 | wqe->wrh.gen_tid_len = cpu_to_be32(V_FW_RIWR_TID(attr->tid) | | ||
825 | V_FW_RIWR_LEN(sizeof(*wqe) >> 3)); | ||
826 | wqe->wrid.id1 = 0; | ||
827 | wqe->qpid = cpu_to_be32(attr->qpid); | ||
828 | wqe->pdid = cpu_to_be32(attr->pdid); | ||
829 | wqe->scqid = cpu_to_be32(attr->scqid); | ||
830 | wqe->rcqid = cpu_to_be32(attr->rcqid); | ||
831 | wqe->rq_addr = cpu_to_be32(attr->rq_addr - rdev_p->rnic_info.rqt_base); | ||
832 | wqe->rq_size = cpu_to_be32(attr->rq_size); | ||
833 | wqe->mpaattrs = attr->mpaattrs; | ||
834 | wqe->qpcaps = attr->qpcaps; | ||
835 | wqe->ulpdu_size = cpu_to_be16(attr->tcp_emss); | ||
836 | wqe->flags = cpu_to_be32(attr->flags); | ||
837 | wqe->ord = cpu_to_be32(attr->ord); | ||
838 | wqe->ird = cpu_to_be32(attr->ird); | ||
839 | wqe->qp_dma_addr = cpu_to_be64(attr->qp_dma_addr); | ||
840 | wqe->qp_dma_size = cpu_to_be32(attr->qp_dma_size); | ||
841 | wqe->rsvd = 0; | ||
842 | skb->priority = 0; /* 0=>ToeQ; 1=>CtrlQ */ | ||
843 | return (cxgb3_ofld_send(rdev_p->t3cdev_p, skb)); | ||
844 | } | ||
845 | |||
846 | void cxio_register_ev_cb(cxio_hal_ev_callback_func_t ev_cb) | ||
847 | { | ||
848 | cxio_ev_cb = ev_cb; | ||
849 | } | ||
850 | |||
851 | void cxio_unregister_ev_cb(cxio_hal_ev_callback_func_t ev_cb) | ||
852 | { | ||
853 | cxio_ev_cb = NULL; | ||
854 | } | ||
855 | |||
856 | static int cxio_hal_ev_handler(struct t3cdev *t3cdev_p, struct sk_buff *skb) | ||
857 | { | ||
858 | static int cnt; | ||
859 | struct cxio_rdev *rdev_p = NULL; | ||
860 | struct respQ_msg_t *rsp_msg = (struct respQ_msg_t *) skb->data; | ||
861 | PDBG("%d: %s cq_id 0x%x cq_ptr 0x%x genbit %0x overflow %0x an %0x" | ||
862 | " se %0x notify %0x cqbranch %0x creditth %0x\n", | ||
863 | cnt, __FUNCTION__, RSPQ_CQID(rsp_msg), RSPQ_CQPTR(rsp_msg), | ||
864 | RSPQ_GENBIT(rsp_msg), RSPQ_OVERFLOW(rsp_msg), RSPQ_AN(rsp_msg), | ||
865 | RSPQ_SE(rsp_msg), RSPQ_NOTIFY(rsp_msg), RSPQ_CQBRANCH(rsp_msg), | ||
866 | RSPQ_CREDIT_THRESH(rsp_msg)); | ||
867 | PDBG("CQE: QPID 0x%0x genbit %0x type 0x%0x status 0x%0x opcode %d " | ||
868 | "len 0x%0x wrid_hi_stag 0x%x wrid_low_msn 0x%x\n", | ||
869 | CQE_QPID(rsp_msg->cqe), CQE_GENBIT(rsp_msg->cqe), | ||
870 | CQE_TYPE(rsp_msg->cqe), CQE_STATUS(rsp_msg->cqe), | ||
871 | CQE_OPCODE(rsp_msg->cqe), CQE_LEN(rsp_msg->cqe), | ||
872 | CQE_WRID_HI(rsp_msg->cqe), CQE_WRID_LOW(rsp_msg->cqe)); | ||
873 | rdev_p = (struct cxio_rdev *)t3cdev_p->ulp; | ||
874 | if (!rdev_p) { | ||
875 | PDBG("%s called by t3cdev %p with null ulp\n", __FUNCTION__, | ||
876 | t3cdev_p); | ||
877 | return 0; | ||
878 | } | ||
879 | if (CQE_QPID(rsp_msg->cqe) == T3_CTRL_QP_ID) { | ||
880 | rdev_p->ctrl_qp.rptr = CQE_WRID_LOW(rsp_msg->cqe) + 1; | ||
881 | wake_up_interruptible(&rdev_p->ctrl_qp.waitq); | ||
882 | dev_kfree_skb_irq(skb); | ||
883 | } else if (CQE_QPID(rsp_msg->cqe) == 0xfff8) | ||
884 | dev_kfree_skb_irq(skb); | ||
885 | else if (cxio_ev_cb) | ||
886 | (*cxio_ev_cb) (rdev_p, skb); | ||
887 | else | ||
888 | dev_kfree_skb_irq(skb); | ||
889 | cnt++; | ||
890 | return 0; | ||
891 | } | ||
892 | |||
893 | /* Caller takes care of locking if needed */ | ||
894 | int cxio_rdev_open(struct cxio_rdev *rdev_p) | ||
895 | { | ||
896 | struct net_device *netdev_p = NULL; | ||
897 | int err = 0; | ||
898 | if (strlen(rdev_p->dev_name)) { | ||
899 | if (cxio_hal_find_rdev_by_name(rdev_p->dev_name)) { | ||
900 | return -EBUSY; | ||
901 | } | ||
902 | netdev_p = dev_get_by_name(rdev_p->dev_name); | ||
903 | if (!netdev_p) { | ||
904 | return -EINVAL; | ||
905 | } | ||
906 | dev_put(netdev_p); | ||
907 | } else if (rdev_p->t3cdev_p) { | ||
908 | if (cxio_hal_find_rdev_by_t3cdev(rdev_p->t3cdev_p)) { | ||
909 | return -EBUSY; | ||
910 | } | ||
911 | netdev_p = rdev_p->t3cdev_p->lldev; | ||
912 | strncpy(rdev_p->dev_name, rdev_p->t3cdev_p->name, | ||
913 | T3_MAX_DEV_NAME_LEN); | ||
914 | } else { | ||
915 | PDBG("%s t3cdev_p or dev_name must be set\n", __FUNCTION__); | ||
916 | return -EINVAL; | ||
917 | } | ||
918 | |||
919 | list_add_tail(&rdev_p->entry, &rdev_list); | ||
920 | |||
921 | PDBG("%s opening rnic dev %s\n", __FUNCTION__, rdev_p->dev_name); | ||
922 | memset(&rdev_p->ctrl_qp, 0, sizeof(rdev_p->ctrl_qp)); | ||
923 | if (!rdev_p->t3cdev_p) | ||
924 | rdev_p->t3cdev_p = T3CDEV(netdev_p); | ||
925 | rdev_p->t3cdev_p->ulp = (void *) rdev_p; | ||
926 | err = rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, RDMA_GET_PARAMS, | ||
927 | &(rdev_p->rnic_info)); | ||
928 | if (err) { | ||
929 | printk(KERN_ERR "%s t3cdev_p(%p)->ctl returned error %d.\n", | ||
930 | __FUNCTION__, rdev_p->t3cdev_p, err); | ||
931 | goto err1; | ||
932 | } | ||
933 | err = rdev_p->t3cdev_p->ctl(rdev_p->t3cdev_p, GET_PORTS, | ||
934 | &(rdev_p->port_info)); | ||
935 | if (err) { | ||
936 | printk(KERN_ERR "%s t3cdev_p(%p)->ctl returned error %d.\n", | ||
937 | __FUNCTION__, rdev_p->t3cdev_p, err); | ||
938 | goto err1; | ||
939 | } | ||
940 | |||
941 | /* | ||
942 | * qpshift is the number of bits to shift the qpid left in order | ||
943 | * to get the correct address of the doorbell for that qp. | ||
944 | */ | ||
945 | cxio_init_ucontext(rdev_p, &rdev_p->uctx); | ||
946 | rdev_p->qpshift = PAGE_SHIFT - | ||
947 | ilog2(65536 >> | ||
948 | ilog2(rdev_p->rnic_info.udbell_len >> | ||
949 | PAGE_SHIFT)); | ||
950 | rdev_p->qpnr = rdev_p->rnic_info.udbell_len >> PAGE_SHIFT; | ||
951 | rdev_p->qpmask = (65536 >> ilog2(rdev_p->qpnr)) - 1; | ||
952 | PDBG("%s rnic %s info: tpt_base 0x%0x tpt_top 0x%0x num stags %d " | ||
953 | "pbl_base 0x%0x pbl_top 0x%0x rqt_base 0x%0x, rqt_top 0x%0x\n", | ||
954 | __FUNCTION__, rdev_p->dev_name, rdev_p->rnic_info.tpt_base, | ||
955 | rdev_p->rnic_info.tpt_top, cxio_num_stags(rdev_p), | ||
956 | rdev_p->rnic_info.pbl_base, | ||
957 | rdev_p->rnic_info.pbl_top, rdev_p->rnic_info.rqt_base, | ||
958 | rdev_p->rnic_info.rqt_top); | ||
959 | PDBG("udbell_len 0x%0x udbell_physbase 0x%lx kdb_addr %p qpshift %lu " | ||
960 | "qpnr %d qpmask 0x%x\n", | ||
961 | rdev_p->rnic_info.udbell_len, | ||
962 | rdev_p->rnic_info.udbell_physbase, rdev_p->rnic_info.kdb_addr, | ||
963 | rdev_p->qpshift, rdev_p->qpnr, rdev_p->qpmask); | ||
964 | |||
965 | err = cxio_hal_init_ctrl_qp(rdev_p); | ||
966 | if (err) { | ||
967 | printk(KERN_ERR "%s error %d initializing ctrl_qp.\n", | ||
968 | __FUNCTION__, err); | ||
969 | goto err1; | ||
970 | } | ||
971 | err = cxio_hal_init_resource(rdev_p, cxio_num_stags(rdev_p), 0, | ||
972 | 0, T3_MAX_NUM_QP, T3_MAX_NUM_CQ, | ||
973 | T3_MAX_NUM_PD); | ||
974 | if (err) { | ||
975 | printk(KERN_ERR "%s error %d initializing hal resources.\n", | ||
976 | __FUNCTION__, err); | ||
977 | goto err2; | ||
978 | } | ||
979 | err = cxio_hal_pblpool_create(rdev_p); | ||
980 | if (err) { | ||
981 | printk(KERN_ERR "%s error %d initializing pbl mem pool.\n", | ||
982 | __FUNCTION__, err); | ||
983 | goto err3; | ||
984 | } | ||
985 | err = cxio_hal_rqtpool_create(rdev_p); | ||
986 | if (err) { | ||
987 | printk(KERN_ERR "%s error %d initializing rqt mem pool.\n", | ||
988 | __FUNCTION__, err); | ||
989 | goto err4; | ||
990 | } | ||
991 | return 0; | ||
992 | err4: | ||
993 | cxio_hal_pblpool_destroy(rdev_p); | ||
994 | err3: | ||
995 | cxio_hal_destroy_resource(rdev_p->rscp); | ||
996 | err2: | ||
997 | cxio_hal_destroy_ctrl_qp(rdev_p); | ||
998 | err1: | ||
999 | list_del(&rdev_p->entry); | ||
1000 | return err; | ||
1001 | } | ||
1002 | |||
1003 | void cxio_rdev_close(struct cxio_rdev *rdev_p) | ||
1004 | { | ||
1005 | if (rdev_p) { | ||
1006 | cxio_hal_pblpool_destroy(rdev_p); | ||
1007 | cxio_hal_rqtpool_destroy(rdev_p); | ||
1008 | list_del(&rdev_p->entry); | ||
1009 | rdev_p->t3cdev_p->ulp = NULL; | ||
1010 | cxio_hal_destroy_ctrl_qp(rdev_p); | ||
1011 | cxio_hal_destroy_resource(rdev_p->rscp); | ||
1012 | } | ||
1013 | } | ||
1014 | |||
1015 | int __init cxio_hal_init(void) | ||
1016 | { | ||
1017 | if (cxio_hal_init_rhdl_resource(T3_MAX_NUM_RI)) | ||
1018 | return -ENOMEM; | ||
1019 | t3_register_cpl_handler(CPL_ASYNC_NOTIF, cxio_hal_ev_handler); | ||
1020 | return 0; | ||
1021 | } | ||
1022 | |||
1023 | void __exit cxio_hal_exit(void) | ||
1024 | { | ||
1025 | struct cxio_rdev *rdev, *tmp; | ||
1026 | |||
1027 | t3_register_cpl_handler(CPL_ASYNC_NOTIF, NULL); | ||
1028 | list_for_each_entry_safe(rdev, tmp, &rdev_list, entry) | ||
1029 | cxio_rdev_close(rdev); | ||
1030 | cxio_hal_destroy_rhdl_resource(); | ||
1031 | } | ||
1032 | |||
1033 | static inline void flush_completed_wrs(struct t3_wq *wq, struct t3_cq *cq) | ||
1034 | { | ||
1035 | struct t3_swsq *sqp; | ||
1036 | __u32 ptr = wq->sq_rptr; | ||
1037 | int count = Q_COUNT(wq->sq_rptr, wq->sq_wptr); | ||
1038 | |||
1039 | sqp = wq->sq + Q_PTR2IDX(ptr, wq->sq_size_log2); | ||
1040 | while (count--) | ||
1041 | if (!sqp->signaled) { | ||
1042 | ptr++; | ||
1043 | sqp = wq->sq + Q_PTR2IDX(ptr, wq->sq_size_log2); | ||
1044 | } else if (sqp->complete) { | ||
1045 | |||
1046 | /* | ||
1047 | * Insert this completed cqe into the swcq. | ||
1048 | */ | ||
1049 | PDBG("%s moving cqe into swcq sq idx %ld cq idx %ld\n", | ||
1050 | __FUNCTION__, Q_PTR2IDX(ptr, wq->sq_size_log2), | ||
1051 | Q_PTR2IDX(cq->sw_wptr, cq->size_log2)); | ||
1052 | sqp->cqe.header |= htonl(V_CQE_SWCQE(1)); | ||
1053 | *(cq->sw_queue + Q_PTR2IDX(cq->sw_wptr, cq->size_log2)) | ||
1054 | = sqp->cqe; | ||
1055 | cq->sw_wptr++; | ||
1056 | sqp->signaled = 0; | ||
1057 | break; | ||
1058 | } else | ||
1059 | break; | ||
1060 | } | ||
1061 | |||
1062 | static inline void create_read_req_cqe(struct t3_wq *wq, | ||
1063 | struct t3_cqe *hw_cqe, | ||
1064 | struct t3_cqe *read_cqe) | ||
1065 | { | ||
1066 | read_cqe->u.scqe.wrid_hi = wq->oldest_read->sq_wptr; | ||
1067 | read_cqe->len = wq->oldest_read->read_len; | ||
1068 | read_cqe->header = htonl(V_CQE_QPID(CQE_QPID(*hw_cqe)) | | ||
1069 | V_CQE_SWCQE(SW_CQE(*hw_cqe)) | | ||
1070 | V_CQE_OPCODE(T3_READ_REQ) | | ||
1071 | V_CQE_TYPE(1)); | ||
1072 | } | ||
1073 | |||
1074 | /* | ||
1075 | * Return a ptr to the next read wr in the SWSQ or NULL. | ||
1076 | */ | ||
1077 | static inline void advance_oldest_read(struct t3_wq *wq) | ||
1078 | { | ||
1079 | |||
1080 | u32 rptr = wq->oldest_read - wq->sq + 1; | ||
1081 | u32 wptr = Q_PTR2IDX(wq->sq_wptr, wq->sq_size_log2); | ||
1082 | |||
1083 | while (Q_PTR2IDX(rptr, wq->sq_size_log2) != wptr) { | ||
1084 | wq->oldest_read = wq->sq + Q_PTR2IDX(rptr, wq->sq_size_log2); | ||
1085 | |||
1086 | if (wq->oldest_read->opcode == T3_READ_REQ) | ||
1087 | return; | ||
1088 | rptr++; | ||
1089 | } | ||
1090 | wq->oldest_read = NULL; | ||
1091 | } | ||
1092 | |||
1093 | /* | ||
1094 | * cxio_poll_cq | ||
1095 | * | ||
1096 | * Caller must: | ||
1097 | * check the validity of the first CQE, | ||
1098 | * supply the wq assicated with the qpid. | ||
1099 | * | ||
1100 | * credit: cq credit to return to sge. | ||
1101 | * cqe_flushed: 1 iff the CQE is flushed. | ||
1102 | * cqe: copy of the polled CQE. | ||
1103 | * | ||
1104 | * return value: | ||
1105 | * 0 CQE returned, | ||
1106 | * -1 CQE skipped, try again. | ||
1107 | */ | ||
1108 | int cxio_poll_cq(struct t3_wq *wq, struct t3_cq *cq, struct t3_cqe *cqe, | ||
1109 | u8 *cqe_flushed, u64 *cookie, u32 *credit) | ||
1110 | { | ||
1111 | int ret = 0; | ||
1112 | struct t3_cqe *hw_cqe, read_cqe; | ||
1113 | |||
1114 | *cqe_flushed = 0; | ||
1115 | *credit = 0; | ||
1116 | hw_cqe = cxio_next_cqe(cq); | ||
1117 | |||
1118 | PDBG("%s CQE OOO %d qpid 0x%0x genbit %d type %d status 0x%0x" | ||
1119 | " opcode 0x%0x len 0x%0x wrid_hi_stag 0x%x wrid_low_msn 0x%x\n", | ||
1120 | __FUNCTION__, CQE_OOO(*hw_cqe), CQE_QPID(*hw_cqe), | ||
1121 | CQE_GENBIT(*hw_cqe), CQE_TYPE(*hw_cqe), CQE_STATUS(*hw_cqe), | ||
1122 | CQE_OPCODE(*hw_cqe), CQE_LEN(*hw_cqe), CQE_WRID_HI(*hw_cqe), | ||
1123 | CQE_WRID_LOW(*hw_cqe)); | ||
1124 | |||
1125 | /* | ||
1126 | * skip cqe's not affiliated with a QP. | ||
1127 | */ | ||
1128 | if (wq == NULL) { | ||
1129 | ret = -1; | ||
1130 | goto skip_cqe; | ||
1131 | } | ||
1132 | |||
1133 | /* | ||
1134 | * Gotta tweak READ completions: | ||
1135 | * 1) the cqe doesn't contain the sq_wptr from the wr. | ||
1136 | * 2) opcode not reflected from the wr. | ||
1137 | * 3) read_len not reflected from the wr. | ||
1138 | * 4) cq_type is RQ_TYPE not SQ_TYPE. | ||
1139 | */ | ||
1140 | if (RQ_TYPE(*hw_cqe) && (CQE_OPCODE(*hw_cqe) == T3_READ_RESP)) { | ||
1141 | |||
1142 | /* | ||
1143 | * Don't write to the HWCQ, so create a new read req CQE | ||
1144 | * in local memory. | ||
1145 | */ | ||
1146 | create_read_req_cqe(wq, hw_cqe, &read_cqe); | ||
1147 | hw_cqe = &read_cqe; | ||
1148 | advance_oldest_read(wq); | ||
1149 | } | ||
1150 | |||
1151 | /* | ||
1152 | * T3A: Discard TERMINATE CQEs. | ||
1153 | */ | ||
1154 | if (CQE_OPCODE(*hw_cqe) == T3_TERMINATE) { | ||
1155 | ret = -1; | ||
1156 | wq->error = 1; | ||
1157 | goto skip_cqe; | ||
1158 | } | ||
1159 | |||
1160 | if (CQE_STATUS(*hw_cqe) || wq->error) { | ||
1161 | *cqe_flushed = wq->error; | ||
1162 | wq->error = 1; | ||
1163 | |||
1164 | /* | ||
1165 | * T3A inserts errors into the CQE. We cannot return | ||
1166 | * these as work completions. | ||
1167 | */ | ||
1168 | /* incoming write failures */ | ||
1169 | if ((CQE_OPCODE(*hw_cqe) == T3_RDMA_WRITE) | ||
1170 | && RQ_TYPE(*hw_cqe)) { | ||
1171 | ret = -1; | ||
1172 | goto skip_cqe; | ||
1173 | } | ||
1174 | /* incoming read request failures */ | ||
1175 | if ((CQE_OPCODE(*hw_cqe) == T3_READ_RESP) && SQ_TYPE(*hw_cqe)) { | ||
1176 | ret = -1; | ||
1177 | goto skip_cqe; | ||
1178 | } | ||
1179 | |||
1180 | /* incoming SEND with no receive posted failures */ | ||
1181 | if ((CQE_OPCODE(*hw_cqe) == T3_SEND) && RQ_TYPE(*hw_cqe) && | ||
1182 | Q_EMPTY(wq->rq_rptr, wq->rq_wptr)) { | ||
1183 | ret = -1; | ||
1184 | goto skip_cqe; | ||
1185 | } | ||
1186 | goto proc_cqe; | ||
1187 | } | ||
1188 | |||
1189 | /* | ||
1190 | * RECV completion. | ||
1191 | */ | ||
1192 | if (RQ_TYPE(*hw_cqe)) { | ||
1193 | |||
1194 | /* | ||
1195 | * HW only validates 4 bits of MSN. So we must validate that | ||
1196 | * the MSN in the SEND is the next expected MSN. If its not, | ||
1197 | * then we complete this with TPT_ERR_MSN and mark the wq in | ||
1198 | * error. | ||
1199 | */ | ||
1200 | if (unlikely((CQE_WRID_MSN(*hw_cqe) != (wq->rq_rptr + 1)))) { | ||
1201 | wq->error = 1; | ||
1202 | hw_cqe->header |= htonl(V_CQE_STATUS(TPT_ERR_MSN)); | ||
1203 | goto proc_cqe; | ||
1204 | } | ||
1205 | goto proc_cqe; | ||
1206 | } | ||
1207 | |||
1208 | /* | ||
1209 | * If we get here its a send completion. | ||
1210 | * | ||
1211 | * Handle out of order completion. These get stuffed | ||
1212 | * in the SW SQ. Then the SW SQ is walked to move any | ||
1213 | * now in-order completions into the SW CQ. This handles | ||
1214 | * 2 cases: | ||
1215 | * 1) reaping unsignaled WRs when the first subsequent | ||
1216 | * signaled WR is completed. | ||
1217 | * 2) out of order read completions. | ||
1218 | */ | ||
1219 | if (!SW_CQE(*hw_cqe) && (CQE_WRID_SQ_WPTR(*hw_cqe) != wq->sq_rptr)) { | ||
1220 | struct t3_swsq *sqp; | ||
1221 | |||
1222 | PDBG("%s out of order completion going in swsq at idx %ld\n", | ||
1223 | __FUNCTION__, | ||
1224 | Q_PTR2IDX(CQE_WRID_SQ_WPTR(*hw_cqe), wq->sq_size_log2)); | ||
1225 | sqp = wq->sq + | ||
1226 | Q_PTR2IDX(CQE_WRID_SQ_WPTR(*hw_cqe), wq->sq_size_log2); | ||
1227 | sqp->cqe = *hw_cqe; | ||
1228 | sqp->complete = 1; | ||
1229 | ret = -1; | ||
1230 | goto flush_wq; | ||
1231 | } | ||
1232 | |||
1233 | proc_cqe: | ||
1234 | *cqe = *hw_cqe; | ||
1235 | |||
1236 | /* | ||
1237 | * Reap the associated WR(s) that are freed up with this | ||
1238 | * completion. | ||
1239 | */ | ||
1240 | if (SQ_TYPE(*hw_cqe)) { | ||
1241 | wq->sq_rptr = CQE_WRID_SQ_WPTR(*hw_cqe); | ||
1242 | PDBG("%s completing sq idx %ld\n", __FUNCTION__, | ||
1243 | Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2)); | ||
1244 | *cookie = (wq->sq + | ||
1245 | Q_PTR2IDX(wq->sq_rptr, wq->sq_size_log2))->wr_id; | ||
1246 | wq->sq_rptr++; | ||
1247 | } else { | ||
1248 | PDBG("%s completing rq idx %ld\n", __FUNCTION__, | ||
1249 | Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)); | ||
1250 | *cookie = *(wq->rq + Q_PTR2IDX(wq->rq_rptr, wq->rq_size_log2)); | ||
1251 | wq->rq_rptr++; | ||
1252 | } | ||
1253 | |||
1254 | flush_wq: | ||
1255 | /* | ||
1256 | * Flush any completed cqes that are now in-order. | ||
1257 | */ | ||
1258 | flush_completed_wrs(wq, cq); | ||
1259 | |||
1260 | skip_cqe: | ||
1261 | if (SW_CQE(*hw_cqe)) { | ||
1262 | PDBG("%s cq %p cqid 0x%x skip sw cqe sw_rptr 0x%x\n", | ||
1263 | __FUNCTION__, cq, cq->cqid, cq->sw_rptr); | ||
1264 | ++cq->sw_rptr; | ||
1265 | } else { | ||
1266 | PDBG("%s cq %p cqid 0x%x skip hw cqe rptr 0x%x\n", | ||
1267 | __FUNCTION__, cq, cq->cqid, cq->rptr); | ||
1268 | ++cq->rptr; | ||
1269 | |||
1270 | /* | ||
1271 | * T3A: compute credits. | ||
1272 | */ | ||
1273 | if (((cq->rptr - cq->wptr) > (1 << (cq->size_log2 - 1))) | ||
1274 | || ((cq->rptr - cq->wptr) >= 128)) { | ||
1275 | *credit = cq->rptr - cq->wptr; | ||
1276 | cq->wptr = cq->rptr; | ||
1277 | } | ||
1278 | } | ||
1279 | return ret; | ||
1280 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h new file mode 100644 index 000000000000..1b97e80b8780 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h | |||
@@ -0,0 +1,201 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef __CXIO_HAL_H__ | ||
34 | #define __CXIO_HAL_H__ | ||
35 | |||
36 | #include <linux/list.h> | ||
37 | #include <linux/mutex.h> | ||
38 | |||
39 | #include "t3_cpl.h" | ||
40 | #include "t3cdev.h" | ||
41 | #include "cxgb3_ctl_defs.h" | ||
42 | #include "cxio_wr.h" | ||
43 | |||
44 | #define T3_CTRL_QP_ID FW_RI_SGEEC_START | ||
45 | #define T3_CTL_QP_TID FW_RI_TID_START | ||
46 | #define T3_CTRL_QP_SIZE_LOG2 8 | ||
47 | #define T3_CTRL_CQ_ID 0 | ||
48 | |||
49 | /* TBD */ | ||
50 | #define T3_MAX_NUM_RI (1<<15) | ||
51 | #define T3_MAX_NUM_QP (1<<15) | ||
52 | #define T3_MAX_NUM_CQ (1<<15) | ||
53 | #define T3_MAX_NUM_PD (1<<15) | ||
54 | #define T3_MAX_PBL_SIZE 256 | ||
55 | #define T3_MAX_RQ_SIZE 1024 | ||
56 | #define T3_MAX_NUM_STAG (1<<15) | ||
57 | |||
58 | #define T3_STAG_UNSET 0xffffffff | ||
59 | |||
60 | #define T3_MAX_DEV_NAME_LEN 32 | ||
61 | |||
62 | struct cxio_hal_ctrl_qp { | ||
63 | u32 wptr; | ||
64 | u32 rptr; | ||
65 | struct mutex lock; /* for the wtpr, can sleep */ | ||
66 | wait_queue_head_t waitq;/* wait for RspQ/CQE msg */ | ||
67 | union t3_wr *workq; /* the work request queue */ | ||
68 | dma_addr_t dma_addr; /* pci bus address of the workq */ | ||
69 | DECLARE_PCI_UNMAP_ADDR(mapping) | ||
70 | void __iomem *doorbell; | ||
71 | }; | ||
72 | |||
73 | struct cxio_hal_resource { | ||
74 | struct kfifo *tpt_fifo; | ||
75 | spinlock_t tpt_fifo_lock; | ||
76 | struct kfifo *qpid_fifo; | ||
77 | spinlock_t qpid_fifo_lock; | ||
78 | struct kfifo *cqid_fifo; | ||
79 | spinlock_t cqid_fifo_lock; | ||
80 | struct kfifo *pdid_fifo; | ||
81 | spinlock_t pdid_fifo_lock; | ||
82 | }; | ||
83 | |||
84 | struct cxio_qpid_list { | ||
85 | struct list_head entry; | ||
86 | u32 qpid; | ||
87 | }; | ||
88 | |||
89 | struct cxio_ucontext { | ||
90 | struct list_head qpids; | ||
91 | struct mutex lock; | ||
92 | }; | ||
93 | |||
94 | struct cxio_rdev { | ||
95 | char dev_name[T3_MAX_DEV_NAME_LEN]; | ||
96 | struct t3cdev *t3cdev_p; | ||
97 | struct rdma_info rnic_info; | ||
98 | struct adap_ports port_info; | ||
99 | struct cxio_hal_resource *rscp; | ||
100 | struct cxio_hal_ctrl_qp ctrl_qp; | ||
101 | void *ulp; | ||
102 | unsigned long qpshift; | ||
103 | u32 qpnr; | ||
104 | u32 qpmask; | ||
105 | struct cxio_ucontext uctx; | ||
106 | struct gen_pool *pbl_pool; | ||
107 | struct gen_pool *rqt_pool; | ||
108 | struct list_head entry; | ||
109 | }; | ||
110 | |||
111 | static inline int cxio_num_stags(struct cxio_rdev *rdev_p) | ||
112 | { | ||
113 | return min((int)T3_MAX_NUM_STAG, (int)((rdev_p->rnic_info.tpt_top - rdev_p->rnic_info.tpt_base) >> 5)); | ||
114 | } | ||
115 | |||
116 | typedef void (*cxio_hal_ev_callback_func_t) (struct cxio_rdev * rdev_p, | ||
117 | struct sk_buff * skb); | ||
118 | |||
119 | #define RSPQ_CQID(rsp) (be32_to_cpu(rsp->cq_ptrid) & 0xffff) | ||
120 | #define RSPQ_CQPTR(rsp) ((be32_to_cpu(rsp->cq_ptrid) >> 16) & 0xffff) | ||
121 | #define RSPQ_GENBIT(rsp) ((be32_to_cpu(rsp->flags) >> 16) & 1) | ||
122 | #define RSPQ_OVERFLOW(rsp) ((be32_to_cpu(rsp->flags) >> 17) & 1) | ||
123 | #define RSPQ_AN(rsp) ((be32_to_cpu(rsp->flags) >> 18) & 1) | ||
124 | #define RSPQ_SE(rsp) ((be32_to_cpu(rsp->flags) >> 19) & 1) | ||
125 | #define RSPQ_NOTIFY(rsp) ((be32_to_cpu(rsp->flags) >> 20) & 1) | ||
126 | #define RSPQ_CQBRANCH(rsp) ((be32_to_cpu(rsp->flags) >> 21) & 1) | ||
127 | #define RSPQ_CREDIT_THRESH(rsp) ((be32_to_cpu(rsp->flags) >> 22) & 1) | ||
128 | |||
129 | struct respQ_msg_t { | ||
130 | __be32 flags; /* flit 0 */ | ||
131 | __be32 cq_ptrid; | ||
132 | __be64 rsvd; /* flit 1 */ | ||
133 | struct t3_cqe cqe; /* flits 2-3 */ | ||
134 | }; | ||
135 | |||
136 | enum t3_cq_opcode { | ||
137 | CQ_ARM_AN = 0x2, | ||
138 | CQ_ARM_SE = 0x6, | ||
139 | CQ_FORCE_AN = 0x3, | ||
140 | CQ_CREDIT_UPDATE = 0x7 | ||
141 | }; | ||
142 | |||
143 | int cxio_rdev_open(struct cxio_rdev *rdev); | ||
144 | void cxio_rdev_close(struct cxio_rdev *rdev); | ||
145 | int cxio_hal_cq_op(struct cxio_rdev *rdev, struct t3_cq *cq, | ||
146 | enum t3_cq_opcode op, u32 credit); | ||
147 | int cxio_hal_clear_qp_ctx(struct cxio_rdev *rdev, u32 qpid); | ||
148 | int cxio_create_cq(struct cxio_rdev *rdev, struct t3_cq *cq); | ||
149 | int cxio_destroy_cq(struct cxio_rdev *rdev, struct t3_cq *cq); | ||
150 | int cxio_resize_cq(struct cxio_rdev *rdev, struct t3_cq *cq); | ||
151 | void cxio_release_ucontext(struct cxio_rdev *rdev, struct cxio_ucontext *uctx); | ||
152 | void cxio_init_ucontext(struct cxio_rdev *rdev, struct cxio_ucontext *uctx); | ||
153 | int cxio_create_qp(struct cxio_rdev *rdev, u32 kernel_domain, struct t3_wq *wq, | ||
154 | struct cxio_ucontext *uctx); | ||
155 | int cxio_destroy_qp(struct cxio_rdev *rdev, struct t3_wq *wq, | ||
156 | struct cxio_ucontext *uctx); | ||
157 | int cxio_peek_cq(struct t3_wq *wr, struct t3_cq *cq, int opcode); | ||
158 | int cxio_allocate_stag(struct cxio_rdev *rdev, u32 * stag, u32 pdid, | ||
159 | enum tpt_mem_perm perm, u32 * pbl_size, u32 * pbl_addr); | ||
160 | int cxio_register_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, | ||
161 | enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, | ||
162 | u8 page_size, __be64 *pbl, u32 *pbl_size, | ||
163 | u32 *pbl_addr); | ||
164 | int cxio_reregister_phys_mem(struct cxio_rdev *rdev, u32 * stag, u32 pdid, | ||
165 | enum tpt_mem_perm perm, u32 zbva, u64 to, u32 len, | ||
166 | u8 page_size, __be64 *pbl, u32 *pbl_size, | ||
167 | u32 *pbl_addr); | ||
168 | int cxio_dereg_mem(struct cxio_rdev *rdev, u32 stag, u32 pbl_size, | ||
169 | u32 pbl_addr); | ||
170 | int cxio_allocate_window(struct cxio_rdev *rdev, u32 * stag, u32 pdid); | ||
171 | int cxio_deallocate_window(struct cxio_rdev *rdev, u32 stag); | ||
172 | int cxio_rdma_init(struct cxio_rdev *rdev, struct t3_rdma_init_attr *attr); | ||
173 | void cxio_register_ev_cb(cxio_hal_ev_callback_func_t ev_cb); | ||
174 | void cxio_unregister_ev_cb(cxio_hal_ev_callback_func_t ev_cb); | ||
175 | u32 cxio_hal_get_rhdl(void); | ||
176 | void cxio_hal_put_rhdl(u32 rhdl); | ||
177 | u32 cxio_hal_get_pdid(struct cxio_hal_resource *rscp); | ||
178 | void cxio_hal_put_pdid(struct cxio_hal_resource *rscp, u32 pdid); | ||
179 | int __init cxio_hal_init(void); | ||
180 | void __exit cxio_hal_exit(void); | ||
181 | void cxio_flush_rq(struct t3_wq *wq, struct t3_cq *cq, int count); | ||
182 | void cxio_flush_sq(struct t3_wq *wq, struct t3_cq *cq, int count); | ||
183 | void cxio_count_rcqes(struct t3_cq *cq, struct t3_wq *wq, int *count); | ||
184 | void cxio_count_scqes(struct t3_cq *cq, struct t3_wq *wq, int *count); | ||
185 | void cxio_flush_hw_cq(struct t3_cq *cq); | ||
186 | int cxio_poll_cq(struct t3_wq *wq, struct t3_cq *cq, struct t3_cqe *cqe, | ||
187 | u8 *cqe_flushed, u64 *cookie, u32 *credit); | ||
188 | |||
189 | #define MOD "iw_cxgb3: " | ||
190 | #define PDBG(fmt, args...) pr_debug(MOD fmt, ## args) | ||
191 | |||
192 | #ifdef DEBUG | ||
193 | void cxio_dump_tpt(struct cxio_rdev *rev, u32 stag); | ||
194 | void cxio_dump_pbl(struct cxio_rdev *rev, u32 pbl_addr, uint len, u8 shift); | ||
195 | void cxio_dump_wqe(union t3_wr *wqe); | ||
196 | void cxio_dump_wce(struct t3_cqe *wce); | ||
197 | void cxio_dump_rqt(struct cxio_rdev *rdev, u32 hwtid, int nents); | ||
198 | void cxio_dump_tcb(struct cxio_rdev *rdev, u32 hwtid); | ||
199 | #endif | ||
200 | |||
201 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_resource.c b/drivers/infiniband/hw/cxgb3/cxio_resource.c new file mode 100644 index 000000000000..997aa32cbf07 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/cxio_resource.c | |||
@@ -0,0 +1,331 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | /* Crude resource management */ | ||
34 | #include <linux/kernel.h> | ||
35 | #include <linux/random.h> | ||
36 | #include <linux/slab.h> | ||
37 | #include <linux/kfifo.h> | ||
38 | #include <linux/spinlock.h> | ||
39 | #include <linux/errno.h> | ||
40 | #include "cxio_resource.h" | ||
41 | #include "cxio_hal.h" | ||
42 | |||
43 | static struct kfifo *rhdl_fifo; | ||
44 | static spinlock_t rhdl_fifo_lock; | ||
45 | |||
46 | #define RANDOM_SIZE 16 | ||
47 | |||
48 | static int __cxio_init_resource_fifo(struct kfifo **fifo, | ||
49 | spinlock_t *fifo_lock, | ||
50 | u32 nr, u32 skip_low, | ||
51 | u32 skip_high, | ||
52 | int random) | ||
53 | { | ||
54 | u32 i, j, entry = 0, idx; | ||
55 | u32 random_bytes; | ||
56 | u32 rarray[16]; | ||
57 | spin_lock_init(fifo_lock); | ||
58 | |||
59 | *fifo = kfifo_alloc(nr * sizeof(u32), GFP_KERNEL, fifo_lock); | ||
60 | if (IS_ERR(*fifo)) | ||
61 | return -ENOMEM; | ||
62 | |||
63 | for (i = 0; i < skip_low + skip_high; i++) | ||
64 | __kfifo_put(*fifo, (unsigned char *) &entry, sizeof(u32)); | ||
65 | if (random) { | ||
66 | j = 0; | ||
67 | random_bytes = random32(); | ||
68 | for (i = 0; i < RANDOM_SIZE; i++) | ||
69 | rarray[i] = i + skip_low; | ||
70 | for (i = skip_low + RANDOM_SIZE; i < nr - skip_high; i++) { | ||
71 | if (j >= RANDOM_SIZE) { | ||
72 | j = 0; | ||
73 | random_bytes = random32(); | ||
74 | } | ||
75 | idx = (random_bytes >> (j * 2)) & 0xF; | ||
76 | __kfifo_put(*fifo, | ||
77 | (unsigned char *) &rarray[idx], | ||
78 | sizeof(u32)); | ||
79 | rarray[idx] = i; | ||
80 | j++; | ||
81 | } | ||
82 | for (i = 0; i < RANDOM_SIZE; i++) | ||
83 | __kfifo_put(*fifo, | ||
84 | (unsigned char *) &rarray[i], | ||
85 | sizeof(u32)); | ||
86 | } else | ||
87 | for (i = skip_low; i < nr - skip_high; i++) | ||
88 | __kfifo_put(*fifo, (unsigned char *) &i, sizeof(u32)); | ||
89 | |||
90 | for (i = 0; i < skip_low + skip_high; i++) | ||
91 | kfifo_get(*fifo, (unsigned char *) &entry, sizeof(u32)); | ||
92 | return 0; | ||
93 | } | ||
94 | |||
95 | static int cxio_init_resource_fifo(struct kfifo **fifo, spinlock_t * fifo_lock, | ||
96 | u32 nr, u32 skip_low, u32 skip_high) | ||
97 | { | ||
98 | return (__cxio_init_resource_fifo(fifo, fifo_lock, nr, skip_low, | ||
99 | skip_high, 0)); | ||
100 | } | ||
101 | |||
102 | static int cxio_init_resource_fifo_random(struct kfifo **fifo, | ||
103 | spinlock_t * fifo_lock, | ||
104 | u32 nr, u32 skip_low, u32 skip_high) | ||
105 | { | ||
106 | |||
107 | return (__cxio_init_resource_fifo(fifo, fifo_lock, nr, skip_low, | ||
108 | skip_high, 1)); | ||
109 | } | ||
110 | |||
111 | static int cxio_init_qpid_fifo(struct cxio_rdev *rdev_p) | ||
112 | { | ||
113 | u32 i; | ||
114 | |||
115 | spin_lock_init(&rdev_p->rscp->qpid_fifo_lock); | ||
116 | |||
117 | rdev_p->rscp->qpid_fifo = kfifo_alloc(T3_MAX_NUM_QP * sizeof(u32), | ||
118 | GFP_KERNEL, | ||
119 | &rdev_p->rscp->qpid_fifo_lock); | ||
120 | if (IS_ERR(rdev_p->rscp->qpid_fifo)) | ||
121 | return -ENOMEM; | ||
122 | |||
123 | for (i = 16; i < T3_MAX_NUM_QP; i++) | ||
124 | if (!(i & rdev_p->qpmask)) | ||
125 | __kfifo_put(rdev_p->rscp->qpid_fifo, | ||
126 | (unsigned char *) &i, sizeof(u32)); | ||
127 | return 0; | ||
128 | } | ||
129 | |||
130 | int cxio_hal_init_rhdl_resource(u32 nr_rhdl) | ||
131 | { | ||
132 | return cxio_init_resource_fifo(&rhdl_fifo, &rhdl_fifo_lock, nr_rhdl, 1, | ||
133 | 0); | ||
134 | } | ||
135 | |||
136 | void cxio_hal_destroy_rhdl_resource(void) | ||
137 | { | ||
138 | kfifo_free(rhdl_fifo); | ||
139 | } | ||
140 | |||
141 | /* nr_* must be power of 2 */ | ||
142 | int cxio_hal_init_resource(struct cxio_rdev *rdev_p, | ||
143 | u32 nr_tpt, u32 nr_pbl, | ||
144 | u32 nr_rqt, u32 nr_qpid, u32 nr_cqid, u32 nr_pdid) | ||
145 | { | ||
146 | int err = 0; | ||
147 | struct cxio_hal_resource *rscp; | ||
148 | |||
149 | rscp = kmalloc(sizeof(*rscp), GFP_KERNEL); | ||
150 | if (!rscp) | ||
151 | return -ENOMEM; | ||
152 | rdev_p->rscp = rscp; | ||
153 | err = cxio_init_resource_fifo_random(&rscp->tpt_fifo, | ||
154 | &rscp->tpt_fifo_lock, | ||
155 | nr_tpt, 1, 0); | ||
156 | if (err) | ||
157 | goto tpt_err; | ||
158 | err = cxio_init_qpid_fifo(rdev_p); | ||
159 | if (err) | ||
160 | goto qpid_err; | ||
161 | err = cxio_init_resource_fifo(&rscp->cqid_fifo, &rscp->cqid_fifo_lock, | ||
162 | nr_cqid, 1, 0); | ||
163 | if (err) | ||
164 | goto cqid_err; | ||
165 | err = cxio_init_resource_fifo(&rscp->pdid_fifo, &rscp->pdid_fifo_lock, | ||
166 | nr_pdid, 1, 0); | ||
167 | if (err) | ||
168 | goto pdid_err; | ||
169 | return 0; | ||
170 | pdid_err: | ||
171 | kfifo_free(rscp->cqid_fifo); | ||
172 | cqid_err: | ||
173 | kfifo_free(rscp->qpid_fifo); | ||
174 | qpid_err: | ||
175 | kfifo_free(rscp->tpt_fifo); | ||
176 | tpt_err: | ||
177 | return -ENOMEM; | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * returns 0 if no resource available | ||
182 | */ | ||
183 | static inline u32 cxio_hal_get_resource(struct kfifo *fifo) | ||
184 | { | ||
185 | u32 entry; | ||
186 | if (kfifo_get(fifo, (unsigned char *) &entry, sizeof(u32))) | ||
187 | return entry; | ||
188 | else | ||
189 | return 0; /* fifo emptry */ | ||
190 | } | ||
191 | |||
192 | static inline void cxio_hal_put_resource(struct kfifo *fifo, u32 entry) | ||
193 | { | ||
194 | BUG_ON(kfifo_put(fifo, (unsigned char *) &entry, sizeof(u32)) == 0); | ||
195 | } | ||
196 | |||
197 | u32 cxio_hal_get_rhdl(void) | ||
198 | { | ||
199 | return cxio_hal_get_resource(rhdl_fifo); | ||
200 | } | ||
201 | |||
202 | void cxio_hal_put_rhdl(u32 rhdl) | ||
203 | { | ||
204 | cxio_hal_put_resource(rhdl_fifo, rhdl); | ||
205 | } | ||
206 | |||
207 | u32 cxio_hal_get_stag(struct cxio_hal_resource *rscp) | ||
208 | { | ||
209 | return cxio_hal_get_resource(rscp->tpt_fifo); | ||
210 | } | ||
211 | |||
212 | void cxio_hal_put_stag(struct cxio_hal_resource *rscp, u32 stag) | ||
213 | { | ||
214 | cxio_hal_put_resource(rscp->tpt_fifo, stag); | ||
215 | } | ||
216 | |||
217 | u32 cxio_hal_get_qpid(struct cxio_hal_resource *rscp) | ||
218 | { | ||
219 | u32 qpid = cxio_hal_get_resource(rscp->qpid_fifo); | ||
220 | PDBG("%s qpid 0x%x\n", __FUNCTION__, qpid); | ||
221 | return qpid; | ||
222 | } | ||
223 | |||
224 | void cxio_hal_put_qpid(struct cxio_hal_resource *rscp, u32 qpid) | ||
225 | { | ||
226 | PDBG("%s qpid 0x%x\n", __FUNCTION__, qpid); | ||
227 | cxio_hal_put_resource(rscp->qpid_fifo, qpid); | ||
228 | } | ||
229 | |||
230 | u32 cxio_hal_get_cqid(struct cxio_hal_resource *rscp) | ||
231 | { | ||
232 | return cxio_hal_get_resource(rscp->cqid_fifo); | ||
233 | } | ||
234 | |||
235 | void cxio_hal_put_cqid(struct cxio_hal_resource *rscp, u32 cqid) | ||
236 | { | ||
237 | cxio_hal_put_resource(rscp->cqid_fifo, cqid); | ||
238 | } | ||
239 | |||
240 | u32 cxio_hal_get_pdid(struct cxio_hal_resource *rscp) | ||
241 | { | ||
242 | return cxio_hal_get_resource(rscp->pdid_fifo); | ||
243 | } | ||
244 | |||
245 | void cxio_hal_put_pdid(struct cxio_hal_resource *rscp, u32 pdid) | ||
246 | { | ||
247 | cxio_hal_put_resource(rscp->pdid_fifo, pdid); | ||
248 | } | ||
249 | |||
250 | void cxio_hal_destroy_resource(struct cxio_hal_resource *rscp) | ||
251 | { | ||
252 | kfifo_free(rscp->tpt_fifo); | ||
253 | kfifo_free(rscp->cqid_fifo); | ||
254 | kfifo_free(rscp->qpid_fifo); | ||
255 | kfifo_free(rscp->pdid_fifo); | ||
256 | kfree(rscp); | ||
257 | } | ||
258 | |||
259 | /* | ||
260 | * PBL Memory Manager. Uses Linux generic allocator. | ||
261 | */ | ||
262 | |||
263 | #define MIN_PBL_SHIFT 8 /* 256B == min PBL size (32 entries) */ | ||
264 | #define PBL_CHUNK 2*1024*1024 | ||
265 | |||
266 | u32 cxio_hal_pblpool_alloc(struct cxio_rdev *rdev_p, int size) | ||
267 | { | ||
268 | unsigned long addr = gen_pool_alloc(rdev_p->pbl_pool, size); | ||
269 | PDBG("%s addr 0x%x size %d\n", __FUNCTION__, (u32)addr, size); | ||
270 | return (u32)addr; | ||
271 | } | ||
272 | |||
273 | void cxio_hal_pblpool_free(struct cxio_rdev *rdev_p, u32 addr, int size) | ||
274 | { | ||
275 | PDBG("%s addr 0x%x size %d\n", __FUNCTION__, addr, size); | ||
276 | gen_pool_free(rdev_p->pbl_pool, (unsigned long)addr, size); | ||
277 | } | ||
278 | |||
279 | int cxio_hal_pblpool_create(struct cxio_rdev *rdev_p) | ||
280 | { | ||
281 | unsigned long i; | ||
282 | rdev_p->pbl_pool = gen_pool_create(MIN_PBL_SHIFT, -1); | ||
283 | if (rdev_p->pbl_pool) | ||
284 | for (i = rdev_p->rnic_info.pbl_base; | ||
285 | i <= rdev_p->rnic_info.pbl_top - PBL_CHUNK + 1; | ||
286 | i += PBL_CHUNK) | ||
287 | gen_pool_add(rdev_p->pbl_pool, i, PBL_CHUNK, -1); | ||
288 | return rdev_p->pbl_pool ? 0 : -ENOMEM; | ||
289 | } | ||
290 | |||
291 | void cxio_hal_pblpool_destroy(struct cxio_rdev *rdev_p) | ||
292 | { | ||
293 | gen_pool_destroy(rdev_p->pbl_pool); | ||
294 | } | ||
295 | |||
296 | /* | ||
297 | * RQT Memory Manager. Uses Linux generic allocator. | ||
298 | */ | ||
299 | |||
300 | #define MIN_RQT_SHIFT 10 /* 1KB == mini RQT size (16 entries) */ | ||
301 | #define RQT_CHUNK 2*1024*1024 | ||
302 | |||
303 | u32 cxio_hal_rqtpool_alloc(struct cxio_rdev *rdev_p, int size) | ||
304 | { | ||
305 | unsigned long addr = gen_pool_alloc(rdev_p->rqt_pool, size << 6); | ||
306 | PDBG("%s addr 0x%x size %d\n", __FUNCTION__, (u32)addr, size << 6); | ||
307 | return (u32)addr; | ||
308 | } | ||
309 | |||
310 | void cxio_hal_rqtpool_free(struct cxio_rdev *rdev_p, u32 addr, int size) | ||
311 | { | ||
312 | PDBG("%s addr 0x%x size %d\n", __FUNCTION__, addr, size << 6); | ||
313 | gen_pool_free(rdev_p->rqt_pool, (unsigned long)addr, size << 6); | ||
314 | } | ||
315 | |||
316 | int cxio_hal_rqtpool_create(struct cxio_rdev *rdev_p) | ||
317 | { | ||
318 | unsigned long i; | ||
319 | rdev_p->rqt_pool = gen_pool_create(MIN_RQT_SHIFT, -1); | ||
320 | if (rdev_p->rqt_pool) | ||
321 | for (i = rdev_p->rnic_info.rqt_base; | ||
322 | i <= rdev_p->rnic_info.rqt_top - RQT_CHUNK + 1; | ||
323 | i += RQT_CHUNK) | ||
324 | gen_pool_add(rdev_p->rqt_pool, i, RQT_CHUNK, -1); | ||
325 | return rdev_p->rqt_pool ? 0 : -ENOMEM; | ||
326 | } | ||
327 | |||
328 | void cxio_hal_rqtpool_destroy(struct cxio_rdev *rdev_p) | ||
329 | { | ||
330 | gen_pool_destroy(rdev_p->rqt_pool); | ||
331 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_resource.h b/drivers/infiniband/hw/cxgb3/cxio_resource.h new file mode 100644 index 000000000000..a6bbe8370d81 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/cxio_resource.h | |||
@@ -0,0 +1,70 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef __CXIO_RESOURCE_H__ | ||
34 | #define __CXIO_RESOURCE_H__ | ||
35 | |||
36 | #include <linux/kernel.h> | ||
37 | #include <linux/random.h> | ||
38 | #include <linux/slab.h> | ||
39 | #include <linux/kfifo.h> | ||
40 | #include <linux/spinlock.h> | ||
41 | #include <linux/errno.h> | ||
42 | #include <linux/genalloc.h> | ||
43 | #include "cxio_hal.h" | ||
44 | |||
45 | extern int cxio_hal_init_rhdl_resource(u32 nr_rhdl); | ||
46 | extern void cxio_hal_destroy_rhdl_resource(void); | ||
47 | extern int cxio_hal_init_resource(struct cxio_rdev *rdev_p, | ||
48 | u32 nr_tpt, u32 nr_pbl, | ||
49 | u32 nr_rqt, u32 nr_qpid, u32 nr_cqid, | ||
50 | u32 nr_pdid); | ||
51 | extern u32 cxio_hal_get_stag(struct cxio_hal_resource *rscp); | ||
52 | extern void cxio_hal_put_stag(struct cxio_hal_resource *rscp, u32 stag); | ||
53 | extern u32 cxio_hal_get_qpid(struct cxio_hal_resource *rscp); | ||
54 | extern void cxio_hal_put_qpid(struct cxio_hal_resource *rscp, u32 qpid); | ||
55 | extern u32 cxio_hal_get_cqid(struct cxio_hal_resource *rscp); | ||
56 | extern void cxio_hal_put_cqid(struct cxio_hal_resource *rscp, u32 cqid); | ||
57 | extern void cxio_hal_destroy_resource(struct cxio_hal_resource *rscp); | ||
58 | |||
59 | #define PBL_OFF(rdev_p, a) ( (a) - (rdev_p)->rnic_info.pbl_base ) | ||
60 | extern int cxio_hal_pblpool_create(struct cxio_rdev *rdev_p); | ||
61 | extern void cxio_hal_pblpool_destroy(struct cxio_rdev *rdev_p); | ||
62 | extern u32 cxio_hal_pblpool_alloc(struct cxio_rdev *rdev_p, int size); | ||
63 | extern void cxio_hal_pblpool_free(struct cxio_rdev *rdev_p, u32 addr, int size); | ||
64 | |||
65 | #define RQT_OFF(rdev_p, a) ( (a) - (rdev_p)->rnic_info.rqt_base ) | ||
66 | extern int cxio_hal_rqtpool_create(struct cxio_rdev *rdev_p); | ||
67 | extern void cxio_hal_rqtpool_destroy(struct cxio_rdev *rdev_p); | ||
68 | extern u32 cxio_hal_rqtpool_alloc(struct cxio_rdev *rdev_p, int size); | ||
69 | extern void cxio_hal_rqtpool_free(struct cxio_rdev *rdev_p, u32 addr, int size); | ||
70 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/cxio_wr.h b/drivers/infiniband/hw/cxgb3/cxio_wr.h new file mode 100644 index 000000000000..103fc42d6976 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/cxio_wr.h | |||
@@ -0,0 +1,685 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef __CXIO_WR_H__ | ||
34 | #define __CXIO_WR_H__ | ||
35 | |||
36 | #include <asm/io.h> | ||
37 | #include <linux/pci.h> | ||
38 | #include <linux/timer.h> | ||
39 | #include "firmware_exports.h" | ||
40 | |||
41 | #define T3_MAX_SGE 4 | ||
42 | |||
43 | #define Q_EMPTY(rptr,wptr) ((rptr)==(wptr)) | ||
44 | #define Q_FULL(rptr,wptr,size_log2) ( (((wptr)-(rptr))>>(size_log2)) && \ | ||
45 | ((rptr)!=(wptr)) ) | ||
46 | #define Q_GENBIT(ptr,size_log2) (!(((ptr)>>size_log2)&0x1)) | ||
47 | #define Q_FREECNT(rptr,wptr,size_log2) ((1UL<<size_log2)-((wptr)-(rptr))) | ||
48 | #define Q_COUNT(rptr,wptr) ((wptr)-(rptr)) | ||
49 | #define Q_PTR2IDX(ptr,size_log2) (ptr & ((1UL<<size_log2)-1)) | ||
50 | |||
51 | static inline void ring_doorbell(void __iomem *doorbell, u32 qpid) | ||
52 | { | ||
53 | writel(((1<<31) | qpid), doorbell); | ||
54 | } | ||
55 | |||
56 | #define SEQ32_GE(x,y) (!( (((u32) (x)) - ((u32) (y))) & 0x80000000 )) | ||
57 | |||
58 | enum t3_wr_flags { | ||
59 | T3_COMPLETION_FLAG = 0x01, | ||
60 | T3_NOTIFY_FLAG = 0x02, | ||
61 | T3_SOLICITED_EVENT_FLAG = 0x04, | ||
62 | T3_READ_FENCE_FLAG = 0x08, | ||
63 | T3_LOCAL_FENCE_FLAG = 0x10 | ||
64 | } __attribute__ ((packed)); | ||
65 | |||
66 | enum t3_wr_opcode { | ||
67 | T3_WR_BP = FW_WROPCODE_RI_BYPASS, | ||
68 | T3_WR_SEND = FW_WROPCODE_RI_SEND, | ||
69 | T3_WR_WRITE = FW_WROPCODE_RI_RDMA_WRITE, | ||
70 | T3_WR_READ = FW_WROPCODE_RI_RDMA_READ, | ||
71 | T3_WR_INV_STAG = FW_WROPCODE_RI_LOCAL_INV, | ||
72 | T3_WR_BIND = FW_WROPCODE_RI_BIND_MW, | ||
73 | T3_WR_RCV = FW_WROPCODE_RI_RECEIVE, | ||
74 | T3_WR_INIT = FW_WROPCODE_RI_RDMA_INIT, | ||
75 | T3_WR_QP_MOD = FW_WROPCODE_RI_MODIFY_QP | ||
76 | } __attribute__ ((packed)); | ||
77 | |||
78 | enum t3_rdma_opcode { | ||
79 | T3_RDMA_WRITE, /* IETF RDMAP v1.0 ... */ | ||
80 | T3_READ_REQ, | ||
81 | T3_READ_RESP, | ||
82 | T3_SEND, | ||
83 | T3_SEND_WITH_INV, | ||
84 | T3_SEND_WITH_SE, | ||
85 | T3_SEND_WITH_SE_INV, | ||
86 | T3_TERMINATE, | ||
87 | T3_RDMA_INIT, /* CHELSIO RI specific ... */ | ||
88 | T3_BIND_MW, | ||
89 | T3_FAST_REGISTER, | ||
90 | T3_LOCAL_INV, | ||
91 | T3_QP_MOD, | ||
92 | T3_BYPASS | ||
93 | } __attribute__ ((packed)); | ||
94 | |||
95 | static inline enum t3_rdma_opcode wr2opcode(enum t3_wr_opcode wrop) | ||
96 | { | ||
97 | switch (wrop) { | ||
98 | case T3_WR_BP: return T3_BYPASS; | ||
99 | case T3_WR_SEND: return T3_SEND; | ||
100 | case T3_WR_WRITE: return T3_RDMA_WRITE; | ||
101 | case T3_WR_READ: return T3_READ_REQ; | ||
102 | case T3_WR_INV_STAG: return T3_LOCAL_INV; | ||
103 | case T3_WR_BIND: return T3_BIND_MW; | ||
104 | case T3_WR_INIT: return T3_RDMA_INIT; | ||
105 | case T3_WR_QP_MOD: return T3_QP_MOD; | ||
106 | default: break; | ||
107 | } | ||
108 | return -1; | ||
109 | } | ||
110 | |||
111 | |||
112 | /* Work request id */ | ||
113 | union t3_wrid { | ||
114 | struct { | ||
115 | u32 hi; | ||
116 | u32 low; | ||
117 | } id0; | ||
118 | u64 id1; | ||
119 | }; | ||
120 | |||
121 | #define WRID(wrid) (wrid.id1) | ||
122 | #define WRID_GEN(wrid) (wrid.id0.wr_gen) | ||
123 | #define WRID_IDX(wrid) (wrid.id0.wr_idx) | ||
124 | #define WRID_LO(wrid) (wrid.id0.wr_lo) | ||
125 | |||
126 | struct fw_riwrh { | ||
127 | __be32 op_seop_flags; | ||
128 | __be32 gen_tid_len; | ||
129 | }; | ||
130 | |||
131 | #define S_FW_RIWR_OP 24 | ||
132 | #define M_FW_RIWR_OP 0xff | ||
133 | #define V_FW_RIWR_OP(x) ((x) << S_FW_RIWR_OP) | ||
134 | #define G_FW_RIWR_OP(x) ((((x) >> S_FW_RIWR_OP)) & M_FW_RIWR_OP) | ||
135 | |||
136 | #define S_FW_RIWR_SOPEOP 22 | ||
137 | #define M_FW_RIWR_SOPEOP 0x3 | ||
138 | #define V_FW_RIWR_SOPEOP(x) ((x) << S_FW_RIWR_SOPEOP) | ||
139 | |||
140 | #define S_FW_RIWR_FLAGS 8 | ||
141 | #define M_FW_RIWR_FLAGS 0x3fffff | ||
142 | #define V_FW_RIWR_FLAGS(x) ((x) << S_FW_RIWR_FLAGS) | ||
143 | #define G_FW_RIWR_FLAGS(x) ((((x) >> S_FW_RIWR_FLAGS)) & M_FW_RIWR_FLAGS) | ||
144 | |||
145 | #define S_FW_RIWR_TID 8 | ||
146 | #define V_FW_RIWR_TID(x) ((x) << S_FW_RIWR_TID) | ||
147 | |||
148 | #define S_FW_RIWR_LEN 0 | ||
149 | #define V_FW_RIWR_LEN(x) ((x) << S_FW_RIWR_LEN) | ||
150 | |||
151 | #define S_FW_RIWR_GEN 31 | ||
152 | #define V_FW_RIWR_GEN(x) ((x) << S_FW_RIWR_GEN) | ||
153 | |||
154 | struct t3_sge { | ||
155 | __be32 stag; | ||
156 | __be32 len; | ||
157 | __be64 to; | ||
158 | }; | ||
159 | |||
160 | /* If num_sgle is zero, flit 5+ contains immediate data.*/ | ||
161 | struct t3_send_wr { | ||
162 | struct fw_riwrh wrh; /* 0 */ | ||
163 | union t3_wrid wrid; /* 1 */ | ||
164 | |||
165 | u8 rdmaop; /* 2 */ | ||
166 | u8 reserved[3]; | ||
167 | __be32 rem_stag; | ||
168 | __be32 plen; /* 3 */ | ||
169 | __be32 num_sgle; | ||
170 | struct t3_sge sgl[T3_MAX_SGE]; /* 4+ */ | ||
171 | }; | ||
172 | |||
173 | struct t3_local_inv_wr { | ||
174 | struct fw_riwrh wrh; /* 0 */ | ||
175 | union t3_wrid wrid; /* 1 */ | ||
176 | __be32 stag; /* 2 */ | ||
177 | __be32 reserved3; | ||
178 | }; | ||
179 | |||
180 | struct t3_rdma_write_wr { | ||
181 | struct fw_riwrh wrh; /* 0 */ | ||
182 | union t3_wrid wrid; /* 1 */ | ||
183 | u8 rdmaop; /* 2 */ | ||
184 | u8 reserved[3]; | ||
185 | __be32 stag_sink; | ||
186 | __be64 to_sink; /* 3 */ | ||
187 | __be32 plen; /* 4 */ | ||
188 | __be32 num_sgle; | ||
189 | struct t3_sge sgl[T3_MAX_SGE]; /* 5+ */ | ||
190 | }; | ||
191 | |||
192 | struct t3_rdma_read_wr { | ||
193 | struct fw_riwrh wrh; /* 0 */ | ||
194 | union t3_wrid wrid; /* 1 */ | ||
195 | u8 rdmaop; /* 2 */ | ||
196 | u8 reserved[3]; | ||
197 | __be32 rem_stag; | ||
198 | __be64 rem_to; /* 3 */ | ||
199 | __be32 local_stag; /* 4 */ | ||
200 | __be32 local_len; | ||
201 | __be64 local_to; /* 5 */ | ||
202 | }; | ||
203 | |||
204 | enum t3_addr_type { | ||
205 | T3_VA_BASED_TO = 0x0, | ||
206 | T3_ZERO_BASED_TO = 0x1 | ||
207 | } __attribute__ ((packed)); | ||
208 | |||
209 | enum t3_mem_perms { | ||
210 | T3_MEM_ACCESS_LOCAL_READ = 0x1, | ||
211 | T3_MEM_ACCESS_LOCAL_WRITE = 0x2, | ||
212 | T3_MEM_ACCESS_REM_READ = 0x4, | ||
213 | T3_MEM_ACCESS_REM_WRITE = 0x8 | ||
214 | } __attribute__ ((packed)); | ||
215 | |||
216 | struct t3_bind_mw_wr { | ||
217 | struct fw_riwrh wrh; /* 0 */ | ||
218 | union t3_wrid wrid; /* 1 */ | ||
219 | u16 reserved; /* 2 */ | ||
220 | u8 type; | ||
221 | u8 perms; | ||
222 | __be32 mr_stag; | ||
223 | __be32 mw_stag; /* 3 */ | ||
224 | __be32 mw_len; | ||
225 | __be64 mw_va; /* 4 */ | ||
226 | __be32 mr_pbl_addr; /* 5 */ | ||
227 | u8 reserved2[3]; | ||
228 | u8 mr_pagesz; | ||
229 | }; | ||
230 | |||
231 | struct t3_receive_wr { | ||
232 | struct fw_riwrh wrh; /* 0 */ | ||
233 | union t3_wrid wrid; /* 1 */ | ||
234 | u8 pagesz[T3_MAX_SGE]; | ||
235 | __be32 num_sgle; /* 2 */ | ||
236 | struct t3_sge sgl[T3_MAX_SGE]; /* 3+ */ | ||
237 | __be32 pbl_addr[T3_MAX_SGE]; | ||
238 | }; | ||
239 | |||
240 | struct t3_bypass_wr { | ||
241 | struct fw_riwrh wrh; | ||
242 | union t3_wrid wrid; /* 1 */ | ||
243 | }; | ||
244 | |||
245 | struct t3_modify_qp_wr { | ||
246 | struct fw_riwrh wrh; /* 0 */ | ||
247 | union t3_wrid wrid; /* 1 */ | ||
248 | __be32 flags; /* 2 */ | ||
249 | __be32 quiesce; /* 2 */ | ||
250 | __be32 max_ird; /* 3 */ | ||
251 | __be32 max_ord; /* 3 */ | ||
252 | __be64 sge_cmd; /* 4 */ | ||
253 | __be64 ctx1; /* 5 */ | ||
254 | __be64 ctx0; /* 6 */ | ||
255 | }; | ||
256 | |||
257 | enum t3_modify_qp_flags { | ||
258 | MODQP_QUIESCE = 0x01, | ||
259 | MODQP_MAX_IRD = 0x02, | ||
260 | MODQP_MAX_ORD = 0x04, | ||
261 | MODQP_WRITE_EC = 0x08, | ||
262 | MODQP_READ_EC = 0x10, | ||
263 | }; | ||
264 | |||
265 | |||
266 | enum t3_mpa_attrs { | ||
267 | uP_RI_MPA_RX_MARKER_ENABLE = 0x1, | ||
268 | uP_RI_MPA_TX_MARKER_ENABLE = 0x2, | ||
269 | uP_RI_MPA_CRC_ENABLE = 0x4, | ||
270 | uP_RI_MPA_IETF_ENABLE = 0x8 | ||
271 | } __attribute__ ((packed)); | ||
272 | |||
273 | enum t3_qp_caps { | ||
274 | uP_RI_QP_RDMA_READ_ENABLE = 0x01, | ||
275 | uP_RI_QP_RDMA_WRITE_ENABLE = 0x02, | ||
276 | uP_RI_QP_BIND_ENABLE = 0x04, | ||
277 | uP_RI_QP_FAST_REGISTER_ENABLE = 0x08, | ||
278 | uP_RI_QP_STAG0_ENABLE = 0x10 | ||
279 | } __attribute__ ((packed)); | ||
280 | |||
281 | struct t3_rdma_init_attr { | ||
282 | u32 tid; | ||
283 | u32 qpid; | ||
284 | u32 pdid; | ||
285 | u32 scqid; | ||
286 | u32 rcqid; | ||
287 | u32 rq_addr; | ||
288 | u32 rq_size; | ||
289 | enum t3_mpa_attrs mpaattrs; | ||
290 | enum t3_qp_caps qpcaps; | ||
291 | u16 tcp_emss; | ||
292 | u32 ord; | ||
293 | u32 ird; | ||
294 | u64 qp_dma_addr; | ||
295 | u32 qp_dma_size; | ||
296 | u32 flags; | ||
297 | }; | ||
298 | |||
299 | struct t3_rdma_init_wr { | ||
300 | struct fw_riwrh wrh; /* 0 */ | ||
301 | union t3_wrid wrid; /* 1 */ | ||
302 | __be32 qpid; /* 2 */ | ||
303 | __be32 pdid; | ||
304 | __be32 scqid; /* 3 */ | ||
305 | __be32 rcqid; | ||
306 | __be32 rq_addr; /* 4 */ | ||
307 | __be32 rq_size; | ||
308 | u8 mpaattrs; /* 5 */ | ||
309 | u8 qpcaps; | ||
310 | __be16 ulpdu_size; | ||
311 | __be32 flags; /* bits 31-1 - reservered */ | ||
312 | /* bit 0 - set if RECV posted */ | ||
313 | __be32 ord; /* 6 */ | ||
314 | __be32 ird; | ||
315 | __be64 qp_dma_addr; /* 7 */ | ||
316 | __be32 qp_dma_size; /* 8 */ | ||
317 | u32 rsvd; | ||
318 | }; | ||
319 | |||
320 | struct t3_genbit { | ||
321 | u64 flit[15]; | ||
322 | __be64 genbit; | ||
323 | }; | ||
324 | |||
325 | enum rdma_init_wr_flags { | ||
326 | RECVS_POSTED = 1, | ||
327 | }; | ||
328 | |||
329 | union t3_wr { | ||
330 | struct t3_send_wr send; | ||
331 | struct t3_rdma_write_wr write; | ||
332 | struct t3_rdma_read_wr read; | ||
333 | struct t3_receive_wr recv; | ||
334 | struct t3_local_inv_wr local_inv; | ||
335 | struct t3_bind_mw_wr bind; | ||
336 | struct t3_bypass_wr bypass; | ||
337 | struct t3_rdma_init_wr init; | ||
338 | struct t3_modify_qp_wr qp_mod; | ||
339 | struct t3_genbit genbit; | ||
340 | u64 flit[16]; | ||
341 | }; | ||
342 | |||
343 | #define T3_SQ_CQE_FLIT 13 | ||
344 | #define T3_SQ_COOKIE_FLIT 14 | ||
345 | |||
346 | #define T3_RQ_COOKIE_FLIT 13 | ||
347 | #define T3_RQ_CQE_FLIT 14 | ||
348 | |||
349 | static inline enum t3_wr_opcode fw_riwrh_opcode(struct fw_riwrh *wqe) | ||
350 | { | ||
351 | return G_FW_RIWR_OP(be32_to_cpu(wqe->op_seop_flags)); | ||
352 | } | ||
353 | |||
354 | static inline void build_fw_riwrh(struct fw_riwrh *wqe, enum t3_wr_opcode op, | ||
355 | enum t3_wr_flags flags, u8 genbit, u32 tid, | ||
356 | u8 len) | ||
357 | { | ||
358 | wqe->op_seop_flags = cpu_to_be32(V_FW_RIWR_OP(op) | | ||
359 | V_FW_RIWR_SOPEOP(M_FW_RIWR_SOPEOP) | | ||
360 | V_FW_RIWR_FLAGS(flags)); | ||
361 | wmb(); | ||
362 | wqe->gen_tid_len = cpu_to_be32(V_FW_RIWR_GEN(genbit) | | ||
363 | V_FW_RIWR_TID(tid) | | ||
364 | V_FW_RIWR_LEN(len)); | ||
365 | /* 2nd gen bit... */ | ||
366 | ((union t3_wr *)wqe)->genbit.genbit = cpu_to_be64(genbit); | ||
367 | } | ||
368 | |||
369 | /* | ||
370 | * T3 ULP2_TX commands | ||
371 | */ | ||
372 | enum t3_utx_mem_op { | ||
373 | T3_UTX_MEM_READ = 2, | ||
374 | T3_UTX_MEM_WRITE = 3 | ||
375 | }; | ||
376 | |||
377 | /* T3 MC7 RDMA TPT entry format */ | ||
378 | |||
379 | enum tpt_mem_type { | ||
380 | TPT_NON_SHARED_MR = 0x0, | ||
381 | TPT_SHARED_MR = 0x1, | ||
382 | TPT_MW = 0x2, | ||
383 | TPT_MW_RELAXED_PROTECTION = 0x3 | ||
384 | }; | ||
385 | |||
386 | enum tpt_addr_type { | ||
387 | TPT_ZBTO = 0, | ||
388 | TPT_VATO = 1 | ||
389 | }; | ||
390 | |||
391 | enum tpt_mem_perm { | ||
392 | TPT_LOCAL_READ = 0x8, | ||
393 | TPT_LOCAL_WRITE = 0x4, | ||
394 | TPT_REMOTE_READ = 0x2, | ||
395 | TPT_REMOTE_WRITE = 0x1 | ||
396 | }; | ||
397 | |||
398 | struct tpt_entry { | ||
399 | __be32 valid_stag_pdid; | ||
400 | __be32 flags_pagesize_qpid; | ||
401 | |||
402 | __be32 rsvd_pbl_addr; | ||
403 | __be32 len; | ||
404 | __be32 va_hi; | ||
405 | __be32 va_low_or_fbo; | ||
406 | |||
407 | __be32 rsvd_bind_cnt_or_pstag; | ||
408 | __be32 rsvd_pbl_size; | ||
409 | }; | ||
410 | |||
411 | #define S_TPT_VALID 31 | ||
412 | #define V_TPT_VALID(x) ((x) << S_TPT_VALID) | ||
413 | #define F_TPT_VALID V_TPT_VALID(1U) | ||
414 | |||
415 | #define S_TPT_STAG_KEY 23 | ||
416 | #define M_TPT_STAG_KEY 0xFF | ||
417 | #define V_TPT_STAG_KEY(x) ((x) << S_TPT_STAG_KEY) | ||
418 | #define G_TPT_STAG_KEY(x) (((x) >> S_TPT_STAG_KEY) & M_TPT_STAG_KEY) | ||
419 | |||
420 | #define S_TPT_STAG_STATE 22 | ||
421 | #define V_TPT_STAG_STATE(x) ((x) << S_TPT_STAG_STATE) | ||
422 | #define F_TPT_STAG_STATE V_TPT_STAG_STATE(1U) | ||
423 | |||
424 | #define S_TPT_STAG_TYPE 20 | ||
425 | #define M_TPT_STAG_TYPE 0x3 | ||
426 | #define V_TPT_STAG_TYPE(x) ((x) << S_TPT_STAG_TYPE) | ||
427 | #define G_TPT_STAG_TYPE(x) (((x) >> S_TPT_STAG_TYPE) & M_TPT_STAG_TYPE) | ||
428 | |||
429 | #define S_TPT_PDID 0 | ||
430 | #define M_TPT_PDID 0xFFFFF | ||
431 | #define V_TPT_PDID(x) ((x) << S_TPT_PDID) | ||
432 | #define G_TPT_PDID(x) (((x) >> S_TPT_PDID) & M_TPT_PDID) | ||
433 | |||
434 | #define S_TPT_PERM 28 | ||
435 | #define M_TPT_PERM 0xF | ||
436 | #define V_TPT_PERM(x) ((x) << S_TPT_PERM) | ||
437 | #define G_TPT_PERM(x) (((x) >> S_TPT_PERM) & M_TPT_PERM) | ||
438 | |||
439 | #define S_TPT_REM_INV_DIS 27 | ||
440 | #define V_TPT_REM_INV_DIS(x) ((x) << S_TPT_REM_INV_DIS) | ||
441 | #define F_TPT_REM_INV_DIS V_TPT_REM_INV_DIS(1U) | ||
442 | |||
443 | #define S_TPT_ADDR_TYPE 26 | ||
444 | #define V_TPT_ADDR_TYPE(x) ((x) << S_TPT_ADDR_TYPE) | ||
445 | #define F_TPT_ADDR_TYPE V_TPT_ADDR_TYPE(1U) | ||
446 | |||
447 | #define S_TPT_MW_BIND_ENABLE 25 | ||
448 | #define V_TPT_MW_BIND_ENABLE(x) ((x) << S_TPT_MW_BIND_ENABLE) | ||
449 | #define F_TPT_MW_BIND_ENABLE V_TPT_MW_BIND_ENABLE(1U) | ||
450 | |||
451 | #define S_TPT_PAGE_SIZE 20 | ||
452 | #define M_TPT_PAGE_SIZE 0x1F | ||
453 | #define V_TPT_PAGE_SIZE(x) ((x) << S_TPT_PAGE_SIZE) | ||
454 | #define G_TPT_PAGE_SIZE(x) (((x) >> S_TPT_PAGE_SIZE) & M_TPT_PAGE_SIZE) | ||
455 | |||
456 | #define S_TPT_PBL_ADDR 0 | ||
457 | #define M_TPT_PBL_ADDR 0x1FFFFFFF | ||
458 | #define V_TPT_PBL_ADDR(x) ((x) << S_TPT_PBL_ADDR) | ||
459 | #define G_TPT_PBL_ADDR(x) (((x) >> S_TPT_PBL_ADDR) & M_TPT_PBL_ADDR) | ||
460 | |||
461 | #define S_TPT_QPID 0 | ||
462 | #define M_TPT_QPID 0xFFFFF | ||
463 | #define V_TPT_QPID(x) ((x) << S_TPT_QPID) | ||
464 | #define G_TPT_QPID(x) (((x) >> S_TPT_QPID) & M_TPT_QPID) | ||
465 | |||
466 | #define S_TPT_PSTAG 0 | ||
467 | #define M_TPT_PSTAG 0xFFFFFF | ||
468 | #define V_TPT_PSTAG(x) ((x) << S_TPT_PSTAG) | ||
469 | #define G_TPT_PSTAG(x) (((x) >> S_TPT_PSTAG) & M_TPT_PSTAG) | ||
470 | |||
471 | #define S_TPT_PBL_SIZE 0 | ||
472 | #define M_TPT_PBL_SIZE 0xFFFFF | ||
473 | #define V_TPT_PBL_SIZE(x) ((x) << S_TPT_PBL_SIZE) | ||
474 | #define G_TPT_PBL_SIZE(x) (((x) >> S_TPT_PBL_SIZE) & M_TPT_PBL_SIZE) | ||
475 | |||
476 | /* | ||
477 | * CQE defs | ||
478 | */ | ||
479 | struct t3_cqe { | ||
480 | __be32 header; | ||
481 | __be32 len; | ||
482 | union { | ||
483 | struct { | ||
484 | __be32 stag; | ||
485 | __be32 msn; | ||
486 | } rcqe; | ||
487 | struct { | ||
488 | u32 wrid_hi; | ||
489 | u32 wrid_low; | ||
490 | } scqe; | ||
491 | } u; | ||
492 | }; | ||
493 | |||
494 | #define S_CQE_OOO 31 | ||
495 | #define M_CQE_OOO 0x1 | ||
496 | #define G_CQE_OOO(x) ((((x) >> S_CQE_OOO)) & M_CQE_OOO) | ||
497 | #define V_CEQ_OOO(x) ((x)<<S_CQE_OOO) | ||
498 | |||
499 | #define S_CQE_QPID 12 | ||
500 | #define M_CQE_QPID 0x7FFFF | ||
501 | #define G_CQE_QPID(x) ((((x) >> S_CQE_QPID)) & M_CQE_QPID) | ||
502 | #define V_CQE_QPID(x) ((x)<<S_CQE_QPID) | ||
503 | |||
504 | #define S_CQE_SWCQE 11 | ||
505 | #define M_CQE_SWCQE 0x1 | ||
506 | #define G_CQE_SWCQE(x) ((((x) >> S_CQE_SWCQE)) & M_CQE_SWCQE) | ||
507 | #define V_CQE_SWCQE(x) ((x)<<S_CQE_SWCQE) | ||
508 | |||
509 | #define S_CQE_GENBIT 10 | ||
510 | #define M_CQE_GENBIT 0x1 | ||
511 | #define G_CQE_GENBIT(x) (((x) >> S_CQE_GENBIT) & M_CQE_GENBIT) | ||
512 | #define V_CQE_GENBIT(x) ((x)<<S_CQE_GENBIT) | ||
513 | |||
514 | #define S_CQE_STATUS 5 | ||
515 | #define M_CQE_STATUS 0x1F | ||
516 | #define G_CQE_STATUS(x) ((((x) >> S_CQE_STATUS)) & M_CQE_STATUS) | ||
517 | #define V_CQE_STATUS(x) ((x)<<S_CQE_STATUS) | ||
518 | |||
519 | #define S_CQE_TYPE 4 | ||
520 | #define M_CQE_TYPE 0x1 | ||
521 | #define G_CQE_TYPE(x) ((((x) >> S_CQE_TYPE)) & M_CQE_TYPE) | ||
522 | #define V_CQE_TYPE(x) ((x)<<S_CQE_TYPE) | ||
523 | |||
524 | #define S_CQE_OPCODE 0 | ||
525 | #define M_CQE_OPCODE 0xF | ||
526 | #define G_CQE_OPCODE(x) ((((x) >> S_CQE_OPCODE)) & M_CQE_OPCODE) | ||
527 | #define V_CQE_OPCODE(x) ((x)<<S_CQE_OPCODE) | ||
528 | |||
529 | #define SW_CQE(x) (G_CQE_SWCQE(be32_to_cpu((x).header))) | ||
530 | #define CQE_OOO(x) (G_CQE_OOO(be32_to_cpu((x).header))) | ||
531 | #define CQE_QPID(x) (G_CQE_QPID(be32_to_cpu((x).header))) | ||
532 | #define CQE_GENBIT(x) (G_CQE_GENBIT(be32_to_cpu((x).header))) | ||
533 | #define CQE_TYPE(x) (G_CQE_TYPE(be32_to_cpu((x).header))) | ||
534 | #define SQ_TYPE(x) (CQE_TYPE((x))) | ||
535 | #define RQ_TYPE(x) (!CQE_TYPE((x))) | ||
536 | #define CQE_STATUS(x) (G_CQE_STATUS(be32_to_cpu((x).header))) | ||
537 | #define CQE_OPCODE(x) (G_CQE_OPCODE(be32_to_cpu((x).header))) | ||
538 | |||
539 | #define CQE_LEN(x) (be32_to_cpu((x).len)) | ||
540 | |||
541 | /* used for RQ completion processing */ | ||
542 | #define CQE_WRID_STAG(x) (be32_to_cpu((x).u.rcqe.stag)) | ||
543 | #define CQE_WRID_MSN(x) (be32_to_cpu((x).u.rcqe.msn)) | ||
544 | |||
545 | /* used for SQ completion processing */ | ||
546 | #define CQE_WRID_SQ_WPTR(x) ((x).u.scqe.wrid_hi) | ||
547 | #define CQE_WRID_WPTR(x) ((x).u.scqe.wrid_low) | ||
548 | |||
549 | /* generic accessor macros */ | ||
550 | #define CQE_WRID_HI(x) ((x).u.scqe.wrid_hi) | ||
551 | #define CQE_WRID_LOW(x) ((x).u.scqe.wrid_low) | ||
552 | |||
553 | #define TPT_ERR_SUCCESS 0x0 | ||
554 | #define TPT_ERR_STAG 0x1 /* STAG invalid: either the */ | ||
555 | /* STAG is offlimt, being 0, */ | ||
556 | /* or STAG_key mismatch */ | ||
557 | #define TPT_ERR_PDID 0x2 /* PDID mismatch */ | ||
558 | #define TPT_ERR_QPID 0x3 /* QPID mismatch */ | ||
559 | #define TPT_ERR_ACCESS 0x4 /* Invalid access right */ | ||
560 | #define TPT_ERR_WRAP 0x5 /* Wrap error */ | ||
561 | #define TPT_ERR_BOUND 0x6 /* base and bounds voilation */ | ||
562 | #define TPT_ERR_INVALIDATE_SHARED_MR 0x7 /* attempt to invalidate a */ | ||
563 | /* shared memory region */ | ||
564 | #define TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND 0x8 /* attempt to invalidate a */ | ||
565 | /* shared memory region */ | ||
566 | #define TPT_ERR_ECC 0x9 /* ECC error detected */ | ||
567 | #define TPT_ERR_ECC_PSTAG 0xA /* ECC error detected when */ | ||
568 | /* reading PSTAG for a MW */ | ||
569 | /* Invalidate */ | ||
570 | #define TPT_ERR_PBL_ADDR_BOUND 0xB /* pbl addr out of bounds: */ | ||
571 | /* software error */ | ||
572 | #define TPT_ERR_SWFLUSH 0xC /* SW FLUSHED */ | ||
573 | #define TPT_ERR_CRC 0x10 /* CRC error */ | ||
574 | #define TPT_ERR_MARKER 0x11 /* Marker error */ | ||
575 | #define TPT_ERR_PDU_LEN_ERR 0x12 /* invalid PDU length */ | ||
576 | #define TPT_ERR_OUT_OF_RQE 0x13 /* out of RQE */ | ||
577 | #define TPT_ERR_DDP_VERSION 0x14 /* wrong DDP version */ | ||
578 | #define TPT_ERR_RDMA_VERSION 0x15 /* wrong RDMA version */ | ||
579 | #define TPT_ERR_OPCODE 0x16 /* invalid rdma opcode */ | ||
580 | #define TPT_ERR_DDP_QUEUE_NUM 0x17 /* invalid ddp queue number */ | ||
581 | #define TPT_ERR_MSN 0x18 /* MSN error */ | ||
582 | #define TPT_ERR_TBIT 0x19 /* tag bit not set correctly */ | ||
583 | #define TPT_ERR_MO 0x1A /* MO not 0 for TERMINATE */ | ||
584 | /* or READ_REQ */ | ||
585 | #define TPT_ERR_MSN_GAP 0x1B | ||
586 | #define TPT_ERR_MSN_RANGE 0x1C | ||
587 | #define TPT_ERR_IRD_OVERFLOW 0x1D | ||
588 | #define TPT_ERR_RQE_ADDR_BOUND 0x1E /* RQE addr out of bounds: */ | ||
589 | /* software error */ | ||
590 | #define TPT_ERR_INTERNAL_ERR 0x1F /* internal error (opcode */ | ||
591 | /* mismatch) */ | ||
592 | |||
593 | struct t3_swsq { | ||
594 | __u64 wr_id; | ||
595 | struct t3_cqe cqe; | ||
596 | __u32 sq_wptr; | ||
597 | __be32 read_len; | ||
598 | int opcode; | ||
599 | int complete; | ||
600 | int signaled; | ||
601 | }; | ||
602 | |||
603 | /* | ||
604 | * A T3 WQ implements both the SQ and RQ. | ||
605 | */ | ||
606 | struct t3_wq { | ||
607 | union t3_wr *queue; /* DMA accessable memory */ | ||
608 | dma_addr_t dma_addr; /* DMA address for HW */ | ||
609 | DECLARE_PCI_UNMAP_ADDR(mapping) /* unmap kruft */ | ||
610 | u32 error; /* 1 once we go to ERROR */ | ||
611 | u32 qpid; | ||
612 | u32 wptr; /* idx to next available WR slot */ | ||
613 | u32 size_log2; /* total wq size */ | ||
614 | struct t3_swsq *sq; /* SW SQ */ | ||
615 | struct t3_swsq *oldest_read; /* tracks oldest pending read */ | ||
616 | u32 sq_wptr; /* sq_wptr - sq_rptr == count of */ | ||
617 | u32 sq_rptr; /* pending wrs */ | ||
618 | u32 sq_size_log2; /* sq size */ | ||
619 | u64 *rq; /* SW RQ (holds consumer wr_ids */ | ||
620 | u32 rq_wptr; /* rq_wptr - rq_rptr == count of */ | ||
621 | u32 rq_rptr; /* pending wrs */ | ||
622 | u64 *rq_oldest_wr; /* oldest wr on the SW RQ */ | ||
623 | u32 rq_size_log2; /* rq size */ | ||
624 | u32 rq_addr; /* rq adapter address */ | ||
625 | void __iomem *doorbell; /* kernel db */ | ||
626 | u64 udb; /* user db if any */ | ||
627 | }; | ||
628 | |||
629 | struct t3_cq { | ||
630 | u32 cqid; | ||
631 | u32 rptr; | ||
632 | u32 wptr; | ||
633 | u32 size_log2; | ||
634 | dma_addr_t dma_addr; | ||
635 | DECLARE_PCI_UNMAP_ADDR(mapping) | ||
636 | struct t3_cqe *queue; | ||
637 | struct t3_cqe *sw_queue; | ||
638 | u32 sw_rptr; | ||
639 | u32 sw_wptr; | ||
640 | }; | ||
641 | |||
642 | #define CQ_VLD_ENTRY(ptr,size_log2,cqe) (Q_GENBIT(ptr,size_log2) == \ | ||
643 | CQE_GENBIT(*cqe)) | ||
644 | |||
645 | static inline void cxio_set_wq_in_error(struct t3_wq *wq) | ||
646 | { | ||
647 | wq->queue->flit[13] = 1; | ||
648 | } | ||
649 | |||
650 | static inline struct t3_cqe *cxio_next_hw_cqe(struct t3_cq *cq) | ||
651 | { | ||
652 | struct t3_cqe *cqe; | ||
653 | |||
654 | cqe = cq->queue + (Q_PTR2IDX(cq->rptr, cq->size_log2)); | ||
655 | if (CQ_VLD_ENTRY(cq->rptr, cq->size_log2, cqe)) | ||
656 | return cqe; | ||
657 | return NULL; | ||
658 | } | ||
659 | |||
660 | static inline struct t3_cqe *cxio_next_sw_cqe(struct t3_cq *cq) | ||
661 | { | ||
662 | struct t3_cqe *cqe; | ||
663 | |||
664 | if (!Q_EMPTY(cq->sw_rptr, cq->sw_wptr)) { | ||
665 | cqe = cq->sw_queue + (Q_PTR2IDX(cq->sw_rptr, cq->size_log2)); | ||
666 | return cqe; | ||
667 | } | ||
668 | return NULL; | ||
669 | } | ||
670 | |||
671 | static inline struct t3_cqe *cxio_next_cqe(struct t3_cq *cq) | ||
672 | { | ||
673 | struct t3_cqe *cqe; | ||
674 | |||
675 | if (!Q_EMPTY(cq->sw_rptr, cq->sw_wptr)) { | ||
676 | cqe = cq->sw_queue + (Q_PTR2IDX(cq->sw_rptr, cq->size_log2)); | ||
677 | return cqe; | ||
678 | } | ||
679 | cqe = cq->queue + (Q_PTR2IDX(cq->rptr, cq->size_log2)); | ||
680 | if (CQ_VLD_ENTRY(cq->rptr, cq->size_log2, cqe)) | ||
681 | return cqe; | ||
682 | return NULL; | ||
683 | } | ||
684 | |||
685 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch.c b/drivers/infiniband/hw/cxgb3/iwch.c new file mode 100644 index 000000000000..4611afa52220 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch.c | |||
@@ -0,0 +1,189 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include <linux/module.h> | ||
34 | #include <linux/moduleparam.h> | ||
35 | |||
36 | #include <rdma/ib_verbs.h> | ||
37 | |||
38 | #include "cxgb3_offload.h" | ||
39 | #include "iwch_provider.h" | ||
40 | #include "iwch_user.h" | ||
41 | #include "iwch.h" | ||
42 | #include "iwch_cm.h" | ||
43 | |||
44 | #define DRV_VERSION "1.1" | ||
45 | |||
46 | MODULE_AUTHOR("Boyd Faulkner, Steve Wise"); | ||
47 | MODULE_DESCRIPTION("Chelsio T3 RDMA Driver"); | ||
48 | MODULE_LICENSE("Dual BSD/GPL"); | ||
49 | MODULE_VERSION(DRV_VERSION); | ||
50 | |||
51 | cxgb3_cpl_handler_func t3c_handlers[NUM_CPL_CMDS]; | ||
52 | |||
53 | static void open_rnic_dev(struct t3cdev *); | ||
54 | static void close_rnic_dev(struct t3cdev *); | ||
55 | |||
56 | struct cxgb3_client t3c_client = { | ||
57 | .name = "iw_cxgb3", | ||
58 | .add = open_rnic_dev, | ||
59 | .remove = close_rnic_dev, | ||
60 | .handlers = t3c_handlers, | ||
61 | .redirect = iwch_ep_redirect | ||
62 | }; | ||
63 | |||
64 | static LIST_HEAD(dev_list); | ||
65 | static DEFINE_MUTEX(dev_mutex); | ||
66 | |||
67 | static void rnic_init(struct iwch_dev *rnicp) | ||
68 | { | ||
69 | PDBG("%s iwch_dev %p\n", __FUNCTION__, rnicp); | ||
70 | idr_init(&rnicp->cqidr); | ||
71 | idr_init(&rnicp->qpidr); | ||
72 | idr_init(&rnicp->mmidr); | ||
73 | spin_lock_init(&rnicp->lock); | ||
74 | |||
75 | rnicp->attr.vendor_id = 0x168; | ||
76 | rnicp->attr.vendor_part_id = 7; | ||
77 | rnicp->attr.max_qps = T3_MAX_NUM_QP - 32; | ||
78 | rnicp->attr.max_wrs = (1UL << 24) - 1; | ||
79 | rnicp->attr.max_sge_per_wr = T3_MAX_SGE; | ||
80 | rnicp->attr.max_sge_per_rdma_write_wr = T3_MAX_SGE; | ||
81 | rnicp->attr.max_cqs = T3_MAX_NUM_CQ - 1; | ||
82 | rnicp->attr.max_cqes_per_cq = (1UL << 24) - 1; | ||
83 | rnicp->attr.max_mem_regs = cxio_num_stags(&rnicp->rdev); | ||
84 | rnicp->attr.max_phys_buf_entries = T3_MAX_PBL_SIZE; | ||
85 | rnicp->attr.max_pds = T3_MAX_NUM_PD - 1; | ||
86 | rnicp->attr.mem_pgsizes_bitmask = 0x7FFF; /* 4KB-128MB */ | ||
87 | rnicp->attr.can_resize_wq = 0; | ||
88 | rnicp->attr.max_rdma_reads_per_qp = 8; | ||
89 | rnicp->attr.max_rdma_read_resources = | ||
90 | rnicp->attr.max_rdma_reads_per_qp * rnicp->attr.max_qps; | ||
91 | rnicp->attr.max_rdma_read_qp_depth = 8; /* IRD */ | ||
92 | rnicp->attr.max_rdma_read_depth = | ||
93 | rnicp->attr.max_rdma_read_qp_depth * rnicp->attr.max_qps; | ||
94 | rnicp->attr.rq_overflow_handled = 0; | ||
95 | rnicp->attr.can_modify_ird = 0; | ||
96 | rnicp->attr.can_modify_ord = 0; | ||
97 | rnicp->attr.max_mem_windows = rnicp->attr.max_mem_regs - 1; | ||
98 | rnicp->attr.stag0_value = 1; | ||
99 | rnicp->attr.zbva_support = 1; | ||
100 | rnicp->attr.local_invalidate_fence = 1; | ||
101 | rnicp->attr.cq_overflow_detection = 1; | ||
102 | return; | ||
103 | } | ||
104 | |||
105 | static void open_rnic_dev(struct t3cdev *tdev) | ||
106 | { | ||
107 | struct iwch_dev *rnicp; | ||
108 | static int vers_printed; | ||
109 | |||
110 | PDBG("%s t3cdev %p\n", __FUNCTION__, tdev); | ||
111 | if (!vers_printed++) | ||
112 | printk(KERN_INFO MOD "Chelsio T3 RDMA Driver - version %s\n", | ||
113 | DRV_VERSION); | ||
114 | rnicp = (struct iwch_dev *)ib_alloc_device(sizeof(*rnicp)); | ||
115 | if (!rnicp) { | ||
116 | printk(KERN_ERR MOD "Cannot allocate ib device\n"); | ||
117 | return; | ||
118 | } | ||
119 | rnicp->rdev.ulp = rnicp; | ||
120 | rnicp->rdev.t3cdev_p = tdev; | ||
121 | |||
122 | mutex_lock(&dev_mutex); | ||
123 | |||
124 | if (cxio_rdev_open(&rnicp->rdev)) { | ||
125 | mutex_unlock(&dev_mutex); | ||
126 | printk(KERN_ERR MOD "Unable to open CXIO rdev\n"); | ||
127 | ib_dealloc_device(&rnicp->ibdev); | ||
128 | return; | ||
129 | } | ||
130 | |||
131 | rnic_init(rnicp); | ||
132 | |||
133 | list_add_tail(&rnicp->entry, &dev_list); | ||
134 | mutex_unlock(&dev_mutex); | ||
135 | |||
136 | if (iwch_register_device(rnicp)) { | ||
137 | printk(KERN_ERR MOD "Unable to register device\n"); | ||
138 | close_rnic_dev(tdev); | ||
139 | } | ||
140 | printk(KERN_INFO MOD "Initialized device %s\n", | ||
141 | pci_name(rnicp->rdev.rnic_info.pdev)); | ||
142 | return; | ||
143 | } | ||
144 | |||
145 | static void close_rnic_dev(struct t3cdev *tdev) | ||
146 | { | ||
147 | struct iwch_dev *dev, *tmp; | ||
148 | PDBG("%s t3cdev %p\n", __FUNCTION__, tdev); | ||
149 | mutex_lock(&dev_mutex); | ||
150 | list_for_each_entry_safe(dev, tmp, &dev_list, entry) { | ||
151 | if (dev->rdev.t3cdev_p == tdev) { | ||
152 | list_del(&dev->entry); | ||
153 | iwch_unregister_device(dev); | ||
154 | cxio_rdev_close(&dev->rdev); | ||
155 | idr_destroy(&dev->cqidr); | ||
156 | idr_destroy(&dev->qpidr); | ||
157 | idr_destroy(&dev->mmidr); | ||
158 | ib_dealloc_device(&dev->ibdev); | ||
159 | break; | ||
160 | } | ||
161 | } | ||
162 | mutex_unlock(&dev_mutex); | ||
163 | } | ||
164 | |||
165 | static int __init iwch_init_module(void) | ||
166 | { | ||
167 | int err; | ||
168 | |||
169 | err = cxio_hal_init(); | ||
170 | if (err) | ||
171 | return err; | ||
172 | err = iwch_cm_init(); | ||
173 | if (err) | ||
174 | return err; | ||
175 | cxio_register_ev_cb(iwch_ev_dispatch); | ||
176 | cxgb3_register_client(&t3c_client); | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static void __exit iwch_exit_module(void) | ||
181 | { | ||
182 | cxgb3_unregister_client(&t3c_client); | ||
183 | cxio_unregister_ev_cb(iwch_ev_dispatch); | ||
184 | iwch_cm_term(); | ||
185 | cxio_hal_exit(); | ||
186 | } | ||
187 | |||
188 | module_init(iwch_init_module); | ||
189 | module_exit(iwch_exit_module); | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch.h b/drivers/infiniband/hw/cxgb3/iwch.h new file mode 100644 index 000000000000..6517ef85026f --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch.h | |||
@@ -0,0 +1,177 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef __IWCH_H__ | ||
34 | #define __IWCH_H__ | ||
35 | |||
36 | #include <linux/mutex.h> | ||
37 | #include <linux/list.h> | ||
38 | #include <linux/spinlock.h> | ||
39 | #include <linux/idr.h> | ||
40 | |||
41 | #include <rdma/ib_verbs.h> | ||
42 | |||
43 | #include "cxio_hal.h" | ||
44 | #include "cxgb3_offload.h" | ||
45 | |||
46 | struct iwch_pd; | ||
47 | struct iwch_cq; | ||
48 | struct iwch_qp; | ||
49 | struct iwch_mr; | ||
50 | |||
51 | struct iwch_rnic_attributes { | ||
52 | u32 vendor_id; | ||
53 | u32 vendor_part_id; | ||
54 | u32 max_qps; | ||
55 | u32 max_wrs; /* Max for any SQ/RQ */ | ||
56 | u32 max_sge_per_wr; | ||
57 | u32 max_sge_per_rdma_write_wr; /* for RDMA Write WR */ | ||
58 | u32 max_cqs; | ||
59 | u32 max_cqes_per_cq; | ||
60 | u32 max_mem_regs; | ||
61 | u32 max_phys_buf_entries; /* for phys buf list */ | ||
62 | u32 max_pds; | ||
63 | |||
64 | /* | ||
65 | * The memory page sizes supported by this RNIC. | ||
66 | * Bit position i in bitmap indicates page of | ||
67 | * size (4k)^i. Phys block list mode unsupported. | ||
68 | */ | ||
69 | u32 mem_pgsizes_bitmask; | ||
70 | u8 can_resize_wq; | ||
71 | |||
72 | /* | ||
73 | * The maximum number of RDMA Reads that can be outstanding | ||
74 | * per QP with this RNIC as the target. | ||
75 | */ | ||
76 | u32 max_rdma_reads_per_qp; | ||
77 | |||
78 | /* | ||
79 | * The maximum number of resources used for RDMA Reads | ||
80 | * by this RNIC with this RNIC as the target. | ||
81 | */ | ||
82 | u32 max_rdma_read_resources; | ||
83 | |||
84 | /* | ||
85 | * The max depth per QP for initiation of RDMA Read | ||
86 | * by this RNIC. | ||
87 | */ | ||
88 | u32 max_rdma_read_qp_depth; | ||
89 | |||
90 | /* | ||
91 | * The maximum depth for initiation of RDMA Read | ||
92 | * operations by this RNIC on all QPs | ||
93 | */ | ||
94 | u32 max_rdma_read_depth; | ||
95 | u8 rq_overflow_handled; | ||
96 | u32 can_modify_ird; | ||
97 | u32 can_modify_ord; | ||
98 | u32 max_mem_windows; | ||
99 | u32 stag0_value; | ||
100 | u8 zbva_support; | ||
101 | u8 local_invalidate_fence; | ||
102 | u32 cq_overflow_detection; | ||
103 | }; | ||
104 | |||
105 | struct iwch_dev { | ||
106 | struct ib_device ibdev; | ||
107 | struct cxio_rdev rdev; | ||
108 | u32 device_cap_flags; | ||
109 | struct iwch_rnic_attributes attr; | ||
110 | struct idr cqidr; | ||
111 | struct idr qpidr; | ||
112 | struct idr mmidr; | ||
113 | spinlock_t lock; | ||
114 | struct list_head entry; | ||
115 | }; | ||
116 | |||
117 | static inline struct iwch_dev *to_iwch_dev(struct ib_device *ibdev) | ||
118 | { | ||
119 | return container_of(ibdev, struct iwch_dev, ibdev); | ||
120 | } | ||
121 | |||
122 | static inline int t3b_device(const struct iwch_dev *rhp) | ||
123 | { | ||
124 | return rhp->rdev.t3cdev_p->type == T3B; | ||
125 | } | ||
126 | |||
127 | static inline int t3a_device(const struct iwch_dev *rhp) | ||
128 | { | ||
129 | return rhp->rdev.t3cdev_p->type == T3A; | ||
130 | } | ||
131 | |||
132 | static inline struct iwch_cq *get_chp(struct iwch_dev *rhp, u32 cqid) | ||
133 | { | ||
134 | return idr_find(&rhp->cqidr, cqid); | ||
135 | } | ||
136 | |||
137 | static inline struct iwch_qp *get_qhp(struct iwch_dev *rhp, u32 qpid) | ||
138 | { | ||
139 | return idr_find(&rhp->qpidr, qpid); | ||
140 | } | ||
141 | |||
142 | static inline struct iwch_mr *get_mhp(struct iwch_dev *rhp, u32 mmid) | ||
143 | { | ||
144 | return idr_find(&rhp->mmidr, mmid); | ||
145 | } | ||
146 | |||
147 | static inline int insert_handle(struct iwch_dev *rhp, struct idr *idr, | ||
148 | void *handle, u32 id) | ||
149 | { | ||
150 | int ret; | ||
151 | u32 newid; | ||
152 | |||
153 | do { | ||
154 | if (!idr_pre_get(idr, GFP_KERNEL)) { | ||
155 | return -ENOMEM; | ||
156 | } | ||
157 | spin_lock_irq(&rhp->lock); | ||
158 | ret = idr_get_new_above(idr, handle, id, &newid); | ||
159 | BUG_ON(newid != id); | ||
160 | spin_unlock_irq(&rhp->lock); | ||
161 | } while (ret == -EAGAIN); | ||
162 | |||
163 | return ret; | ||
164 | } | ||
165 | |||
166 | static inline void remove_handle(struct iwch_dev *rhp, struct idr *idr, u32 id) | ||
167 | { | ||
168 | spin_lock_irq(&rhp->lock); | ||
169 | idr_remove(idr, id); | ||
170 | spin_unlock_irq(&rhp->lock); | ||
171 | } | ||
172 | |||
173 | extern struct cxgb3_client t3c_client; | ||
174 | extern cxgb3_cpl_handler_func t3c_handlers[NUM_CPL_CMDS]; | ||
175 | extern void iwch_ev_dispatch(struct cxio_rdev *rdev_p, struct sk_buff *skb); | ||
176 | |||
177 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c new file mode 100644 index 000000000000..a522b1baa3b4 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c | |||
@@ -0,0 +1,2081 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include <linux/module.h> | ||
34 | #include <linux/list.h> | ||
35 | #include <linux/workqueue.h> | ||
36 | #include <linux/skbuff.h> | ||
37 | #include <linux/timer.h> | ||
38 | #include <linux/notifier.h> | ||
39 | |||
40 | #include <net/neighbour.h> | ||
41 | #include <net/netevent.h> | ||
42 | #include <net/route.h> | ||
43 | |||
44 | #include "tcb.h" | ||
45 | #include "cxgb3_offload.h" | ||
46 | #include "iwch.h" | ||
47 | #include "iwch_provider.h" | ||
48 | #include "iwch_cm.h" | ||
49 | |||
50 | static char *states[] = { | ||
51 | "idle", | ||
52 | "listen", | ||
53 | "connecting", | ||
54 | "mpa_wait_req", | ||
55 | "mpa_req_sent", | ||
56 | "mpa_req_rcvd", | ||
57 | "mpa_rep_sent", | ||
58 | "fpdu_mode", | ||
59 | "aborting", | ||
60 | "closing", | ||
61 | "moribund", | ||
62 | "dead", | ||
63 | NULL, | ||
64 | }; | ||
65 | |||
66 | static int ep_timeout_secs = 10; | ||
67 | module_param(ep_timeout_secs, int, 0444); | ||
68 | MODULE_PARM_DESC(ep_timeout_secs, "CM Endpoint operation timeout " | ||
69 | "in seconds (default=10)"); | ||
70 | |||
71 | static int mpa_rev = 1; | ||
72 | module_param(mpa_rev, int, 0444); | ||
73 | MODULE_PARM_DESC(mpa_rev, "MPA Revision, 0 supports amso1100, " | ||
74 | "1 is spec compliant. (default=1)"); | ||
75 | |||
76 | static int markers_enabled = 0; | ||
77 | module_param(markers_enabled, int, 0444); | ||
78 | MODULE_PARM_DESC(markers_enabled, "Enable MPA MARKERS (default(0)=disabled)"); | ||
79 | |||
80 | static int crc_enabled = 1; | ||
81 | module_param(crc_enabled, int, 0444); | ||
82 | MODULE_PARM_DESC(crc_enabled, "Enable MPA CRC (default(1)=enabled)"); | ||
83 | |||
84 | static int rcv_win = 256 * 1024; | ||
85 | module_param(rcv_win, int, 0444); | ||
86 | MODULE_PARM_DESC(rcv_win, "TCP receive window in bytes (default=256)"); | ||
87 | |||
88 | static int snd_win = 32 * 1024; | ||
89 | module_param(snd_win, int, 0444); | ||
90 | MODULE_PARM_DESC(snd_win, "TCP send window in bytes (default=32KB)"); | ||
91 | |||
92 | static unsigned int nocong = 0; | ||
93 | module_param(nocong, uint, 0444); | ||
94 | MODULE_PARM_DESC(nocong, "Turn off congestion control (default=0)"); | ||
95 | |||
96 | static unsigned int cong_flavor = 1; | ||
97 | module_param(cong_flavor, uint, 0444); | ||
98 | MODULE_PARM_DESC(cong_flavor, "TCP Congestion control flavor (default=1)"); | ||
99 | |||
100 | static void process_work(struct work_struct *work); | ||
101 | static struct workqueue_struct *workq; | ||
102 | static DECLARE_WORK(skb_work, process_work); | ||
103 | |||
104 | static struct sk_buff_head rxq; | ||
105 | static cxgb3_cpl_handler_func work_handlers[NUM_CPL_CMDS]; | ||
106 | |||
107 | static struct sk_buff *get_skb(struct sk_buff *skb, int len, gfp_t gfp); | ||
108 | static void ep_timeout(unsigned long arg); | ||
109 | static void connect_reply_upcall(struct iwch_ep *ep, int status); | ||
110 | |||
111 | static void start_ep_timer(struct iwch_ep *ep) | ||
112 | { | ||
113 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
114 | if (timer_pending(&ep->timer)) { | ||
115 | PDBG("%s stopped / restarted timer ep %p\n", __FUNCTION__, ep); | ||
116 | del_timer_sync(&ep->timer); | ||
117 | } else | ||
118 | get_ep(&ep->com); | ||
119 | ep->timer.expires = jiffies + ep_timeout_secs * HZ; | ||
120 | ep->timer.data = (unsigned long)ep; | ||
121 | ep->timer.function = ep_timeout; | ||
122 | add_timer(&ep->timer); | ||
123 | } | ||
124 | |||
125 | static void stop_ep_timer(struct iwch_ep *ep) | ||
126 | { | ||
127 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
128 | del_timer_sync(&ep->timer); | ||
129 | put_ep(&ep->com); | ||
130 | } | ||
131 | |||
132 | static void release_tid(struct t3cdev *tdev, u32 hwtid, struct sk_buff *skb) | ||
133 | { | ||
134 | struct cpl_tid_release *req; | ||
135 | |||
136 | skb = get_skb(skb, sizeof *req, GFP_KERNEL); | ||
137 | if (!skb) | ||
138 | return; | ||
139 | req = (struct cpl_tid_release *) skb_put(skb, sizeof(*req)); | ||
140 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
141 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_TID_RELEASE, hwtid)); | ||
142 | skb->priority = CPL_PRIORITY_SETUP; | ||
143 | tdev->send(tdev, skb); | ||
144 | return; | ||
145 | } | ||
146 | |||
147 | int iwch_quiesce_tid(struct iwch_ep *ep) | ||
148 | { | ||
149 | struct cpl_set_tcb_field *req; | ||
150 | struct sk_buff *skb = get_skb(NULL, sizeof(*req), GFP_KERNEL); | ||
151 | |||
152 | if (!skb) | ||
153 | return -ENOMEM; | ||
154 | req = (struct cpl_set_tcb_field *) skb_put(skb, sizeof(*req)); | ||
155 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
156 | req->wr.wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
157 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, ep->hwtid)); | ||
158 | req->reply = 0; | ||
159 | req->cpu_idx = 0; | ||
160 | req->word = htons(W_TCB_RX_QUIESCE); | ||
161 | req->mask = cpu_to_be64(1ULL << S_TCB_RX_QUIESCE); | ||
162 | req->val = cpu_to_be64(1 << S_TCB_RX_QUIESCE); | ||
163 | |||
164 | skb->priority = CPL_PRIORITY_DATA; | ||
165 | ep->com.tdev->send(ep->com.tdev, skb); | ||
166 | return 0; | ||
167 | } | ||
168 | |||
169 | int iwch_resume_tid(struct iwch_ep *ep) | ||
170 | { | ||
171 | struct cpl_set_tcb_field *req; | ||
172 | struct sk_buff *skb = get_skb(NULL, sizeof(*req), GFP_KERNEL); | ||
173 | |||
174 | if (!skb) | ||
175 | return -ENOMEM; | ||
176 | req = (struct cpl_set_tcb_field *) skb_put(skb, sizeof(*req)); | ||
177 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
178 | req->wr.wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
179 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, ep->hwtid)); | ||
180 | req->reply = 0; | ||
181 | req->cpu_idx = 0; | ||
182 | req->word = htons(W_TCB_RX_QUIESCE); | ||
183 | req->mask = cpu_to_be64(1ULL << S_TCB_RX_QUIESCE); | ||
184 | req->val = 0; | ||
185 | |||
186 | skb->priority = CPL_PRIORITY_DATA; | ||
187 | ep->com.tdev->send(ep->com.tdev, skb); | ||
188 | return 0; | ||
189 | } | ||
190 | |||
191 | static void set_emss(struct iwch_ep *ep, u16 opt) | ||
192 | { | ||
193 | PDBG("%s ep %p opt %u\n", __FUNCTION__, ep, opt); | ||
194 | ep->emss = T3C_DATA(ep->com.tdev)->mtus[G_TCPOPT_MSS(opt)] - 40; | ||
195 | if (G_TCPOPT_TSTAMP(opt)) | ||
196 | ep->emss -= 12; | ||
197 | if (ep->emss < 128) | ||
198 | ep->emss = 128; | ||
199 | PDBG("emss=%d\n", ep->emss); | ||
200 | } | ||
201 | |||
202 | static enum iwch_ep_state state_read(struct iwch_ep_common *epc) | ||
203 | { | ||
204 | unsigned long flags; | ||
205 | enum iwch_ep_state state; | ||
206 | |||
207 | spin_lock_irqsave(&epc->lock, flags); | ||
208 | state = epc->state; | ||
209 | spin_unlock_irqrestore(&epc->lock, flags); | ||
210 | return state; | ||
211 | } | ||
212 | |||
213 | static inline void __state_set(struct iwch_ep_common *epc, | ||
214 | enum iwch_ep_state new) | ||
215 | { | ||
216 | epc->state = new; | ||
217 | } | ||
218 | |||
219 | static void state_set(struct iwch_ep_common *epc, enum iwch_ep_state new) | ||
220 | { | ||
221 | unsigned long flags; | ||
222 | |||
223 | spin_lock_irqsave(&epc->lock, flags); | ||
224 | PDBG("%s - %s -> %s\n", __FUNCTION__, states[epc->state], states[new]); | ||
225 | __state_set(epc, new); | ||
226 | spin_unlock_irqrestore(&epc->lock, flags); | ||
227 | return; | ||
228 | } | ||
229 | |||
230 | static void *alloc_ep(int size, gfp_t gfp) | ||
231 | { | ||
232 | struct iwch_ep_common *epc; | ||
233 | |||
234 | epc = kmalloc(size, gfp); | ||
235 | if (epc) { | ||
236 | memset(epc, 0, size); | ||
237 | kref_init(&epc->kref); | ||
238 | spin_lock_init(&epc->lock); | ||
239 | init_waitqueue_head(&epc->waitq); | ||
240 | } | ||
241 | PDBG("%s alloc ep %p\n", __FUNCTION__, epc); | ||
242 | return epc; | ||
243 | } | ||
244 | |||
245 | void __free_ep(struct kref *kref) | ||
246 | { | ||
247 | struct iwch_ep_common *epc; | ||
248 | epc = container_of(kref, struct iwch_ep_common, kref); | ||
249 | PDBG("%s ep %p state %s\n", __FUNCTION__, epc, states[state_read(epc)]); | ||
250 | kfree(epc); | ||
251 | } | ||
252 | |||
253 | static void release_ep_resources(struct iwch_ep *ep) | ||
254 | { | ||
255 | PDBG("%s ep %p tid %d\n", __FUNCTION__, ep, ep->hwtid); | ||
256 | cxgb3_remove_tid(ep->com.tdev, (void *)ep, ep->hwtid); | ||
257 | dst_release(ep->dst); | ||
258 | l2t_release(L2DATA(ep->com.tdev), ep->l2t); | ||
259 | if (ep->com.tdev->type == T3B) | ||
260 | release_tid(ep->com.tdev, ep->hwtid, NULL); | ||
261 | put_ep(&ep->com); | ||
262 | } | ||
263 | |||
264 | static void process_work(struct work_struct *work) | ||
265 | { | ||
266 | struct sk_buff *skb = NULL; | ||
267 | void *ep; | ||
268 | struct t3cdev *tdev; | ||
269 | int ret; | ||
270 | |||
271 | while ((skb = skb_dequeue(&rxq))) { | ||
272 | ep = *((void **) (skb->cb)); | ||
273 | tdev = *((struct t3cdev **) (skb->cb + sizeof(void *))); | ||
274 | ret = work_handlers[G_OPCODE(ntohl((__force __be32)skb->csum))](tdev, skb, ep); | ||
275 | if (ret & CPL_RET_BUF_DONE) | ||
276 | kfree_skb(skb); | ||
277 | |||
278 | /* | ||
279 | * ep was referenced in sched(), and is freed here. | ||
280 | */ | ||
281 | put_ep((struct iwch_ep_common *)ep); | ||
282 | } | ||
283 | } | ||
284 | |||
285 | static int status2errno(int status) | ||
286 | { | ||
287 | switch (status) { | ||
288 | case CPL_ERR_NONE: | ||
289 | return 0; | ||
290 | case CPL_ERR_CONN_RESET: | ||
291 | return -ECONNRESET; | ||
292 | case CPL_ERR_ARP_MISS: | ||
293 | return -EHOSTUNREACH; | ||
294 | case CPL_ERR_CONN_TIMEDOUT: | ||
295 | return -ETIMEDOUT; | ||
296 | case CPL_ERR_TCAM_FULL: | ||
297 | return -ENOMEM; | ||
298 | case CPL_ERR_CONN_EXIST: | ||
299 | return -EADDRINUSE; | ||
300 | default: | ||
301 | return -EIO; | ||
302 | } | ||
303 | } | ||
304 | |||
305 | /* | ||
306 | * Try and reuse skbs already allocated... | ||
307 | */ | ||
308 | static struct sk_buff *get_skb(struct sk_buff *skb, int len, gfp_t gfp) | ||
309 | { | ||
310 | if (skb) { | ||
311 | BUG_ON(skb_cloned(skb)); | ||
312 | skb_trim(skb, 0); | ||
313 | skb_get(skb); | ||
314 | } else { | ||
315 | skb = alloc_skb(len, gfp); | ||
316 | } | ||
317 | return skb; | ||
318 | } | ||
319 | |||
320 | static struct rtable *find_route(struct t3cdev *dev, __be32 local_ip, | ||
321 | __be32 peer_ip, __be16 local_port, | ||
322 | __be16 peer_port, u8 tos) | ||
323 | { | ||
324 | struct rtable *rt; | ||
325 | struct flowi fl = { | ||
326 | .oif = 0, | ||
327 | .nl_u = { | ||
328 | .ip4_u = { | ||
329 | .daddr = peer_ip, | ||
330 | .saddr = local_ip, | ||
331 | .tos = tos} | ||
332 | }, | ||
333 | .proto = IPPROTO_TCP, | ||
334 | .uli_u = { | ||
335 | .ports = { | ||
336 | .sport = local_port, | ||
337 | .dport = peer_port} | ||
338 | } | ||
339 | }; | ||
340 | |||
341 | if (ip_route_output_flow(&rt, &fl, NULL, 0)) | ||
342 | return NULL; | ||
343 | return rt; | ||
344 | } | ||
345 | |||
346 | static unsigned int find_best_mtu(const struct t3c_data *d, unsigned short mtu) | ||
347 | { | ||
348 | int i = 0; | ||
349 | |||
350 | while (i < d->nmtus - 1 && d->mtus[i + 1] <= mtu) | ||
351 | ++i; | ||
352 | return i; | ||
353 | } | ||
354 | |||
355 | static void arp_failure_discard(struct t3cdev *dev, struct sk_buff *skb) | ||
356 | { | ||
357 | PDBG("%s t3cdev %p\n", __FUNCTION__, dev); | ||
358 | kfree_skb(skb); | ||
359 | } | ||
360 | |||
361 | /* | ||
362 | * Handle an ARP failure for an active open. | ||
363 | */ | ||
364 | static void act_open_req_arp_failure(struct t3cdev *dev, struct sk_buff *skb) | ||
365 | { | ||
366 | printk(KERN_ERR MOD "ARP failure duing connect\n"); | ||
367 | kfree_skb(skb); | ||
368 | } | ||
369 | |||
370 | /* | ||
371 | * Handle an ARP failure for a CPL_ABORT_REQ. Change it into a no RST variant | ||
372 | * and send it along. | ||
373 | */ | ||
374 | static void abort_arp_failure(struct t3cdev *dev, struct sk_buff *skb) | ||
375 | { | ||
376 | struct cpl_abort_req *req = cplhdr(skb); | ||
377 | |||
378 | PDBG("%s t3cdev %p\n", __FUNCTION__, dev); | ||
379 | req->cmd = CPL_ABORT_NO_RST; | ||
380 | cxgb3_ofld_send(dev, skb); | ||
381 | } | ||
382 | |||
383 | static int send_halfclose(struct iwch_ep *ep, gfp_t gfp) | ||
384 | { | ||
385 | struct cpl_close_con_req *req; | ||
386 | struct sk_buff *skb; | ||
387 | |||
388 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
389 | skb = get_skb(NULL, sizeof(*req), gfp); | ||
390 | if (!skb) { | ||
391 | printk(KERN_ERR MOD "%s - failed to alloc skb\n", __FUNCTION__); | ||
392 | return -ENOMEM; | ||
393 | } | ||
394 | skb->priority = CPL_PRIORITY_DATA; | ||
395 | set_arp_failure_handler(skb, arp_failure_discard); | ||
396 | req = (struct cpl_close_con_req *) skb_put(skb, sizeof(*req)); | ||
397 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_OFLD_CLOSE_CON)); | ||
398 | req->wr.wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
399 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_CLOSE_CON_REQ, ep->hwtid)); | ||
400 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
401 | return 0; | ||
402 | } | ||
403 | |||
404 | static int send_abort(struct iwch_ep *ep, struct sk_buff *skb, gfp_t gfp) | ||
405 | { | ||
406 | struct cpl_abort_req *req; | ||
407 | |||
408 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
409 | skb = get_skb(skb, sizeof(*req), gfp); | ||
410 | if (!skb) { | ||
411 | printk(KERN_ERR MOD "%s - failed to alloc skb.\n", | ||
412 | __FUNCTION__); | ||
413 | return -ENOMEM; | ||
414 | } | ||
415 | skb->priority = CPL_PRIORITY_DATA; | ||
416 | set_arp_failure_handler(skb, abort_arp_failure); | ||
417 | req = (struct cpl_abort_req *) skb_put(skb, sizeof(*req)); | ||
418 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ)); | ||
419 | req->wr.wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
420 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_ABORT_REQ, ep->hwtid)); | ||
421 | req->cmd = CPL_ABORT_SEND_RST; | ||
422 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
423 | return 0; | ||
424 | } | ||
425 | |||
426 | static int send_connect(struct iwch_ep *ep) | ||
427 | { | ||
428 | struct cpl_act_open_req *req; | ||
429 | struct sk_buff *skb; | ||
430 | u32 opt0h, opt0l, opt2; | ||
431 | unsigned int mtu_idx; | ||
432 | int wscale; | ||
433 | |||
434 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
435 | |||
436 | skb = get_skb(NULL, sizeof(*req), GFP_KERNEL); | ||
437 | if (!skb) { | ||
438 | printk(KERN_ERR MOD "%s - failed to alloc skb.\n", | ||
439 | __FUNCTION__); | ||
440 | return -ENOMEM; | ||
441 | } | ||
442 | mtu_idx = find_best_mtu(T3C_DATA(ep->com.tdev), dst_mtu(ep->dst)); | ||
443 | wscale = compute_wscale(rcv_win); | ||
444 | opt0h = V_NAGLE(0) | | ||
445 | V_NO_CONG(nocong) | | ||
446 | V_KEEP_ALIVE(1) | | ||
447 | F_TCAM_BYPASS | | ||
448 | V_WND_SCALE(wscale) | | ||
449 | V_MSS_IDX(mtu_idx) | | ||
450 | V_L2T_IDX(ep->l2t->idx) | V_TX_CHANNEL(ep->l2t->smt_idx); | ||
451 | opt0l = V_TOS((ep->tos >> 2) & M_TOS) | V_RCV_BUFSIZ(rcv_win>>10); | ||
452 | opt2 = V_FLAVORS_VALID(1) | V_CONG_CONTROL_FLAVOR(cong_flavor); | ||
453 | skb->priority = CPL_PRIORITY_SETUP; | ||
454 | set_arp_failure_handler(skb, act_open_req_arp_failure); | ||
455 | |||
456 | req = (struct cpl_act_open_req *) skb_put(skb, sizeof(*req)); | ||
457 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
458 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_ACT_OPEN_REQ, ep->atid)); | ||
459 | req->local_port = ep->com.local_addr.sin_port; | ||
460 | req->peer_port = ep->com.remote_addr.sin_port; | ||
461 | req->local_ip = ep->com.local_addr.sin_addr.s_addr; | ||
462 | req->peer_ip = ep->com.remote_addr.sin_addr.s_addr; | ||
463 | req->opt0h = htonl(opt0h); | ||
464 | req->opt0l = htonl(opt0l); | ||
465 | req->params = 0; | ||
466 | req->opt2 = htonl(opt2); | ||
467 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
468 | return 0; | ||
469 | } | ||
470 | |||
471 | static void send_mpa_req(struct iwch_ep *ep, struct sk_buff *skb) | ||
472 | { | ||
473 | int mpalen; | ||
474 | struct tx_data_wr *req; | ||
475 | struct mpa_message *mpa; | ||
476 | int len; | ||
477 | |||
478 | PDBG("%s ep %p pd_len %d\n", __FUNCTION__, ep, ep->plen); | ||
479 | |||
480 | BUG_ON(skb_cloned(skb)); | ||
481 | |||
482 | mpalen = sizeof(*mpa) + ep->plen; | ||
483 | if (skb->data + mpalen + sizeof(*req) > skb->end) { | ||
484 | kfree_skb(skb); | ||
485 | skb=alloc_skb(mpalen + sizeof(*req), GFP_KERNEL); | ||
486 | if (!skb) { | ||
487 | connect_reply_upcall(ep, -ENOMEM); | ||
488 | return; | ||
489 | } | ||
490 | } | ||
491 | skb_trim(skb, 0); | ||
492 | skb_reserve(skb, sizeof(*req)); | ||
493 | skb_put(skb, mpalen); | ||
494 | skb->priority = CPL_PRIORITY_DATA; | ||
495 | mpa = (struct mpa_message *) skb->data; | ||
496 | memset(mpa, 0, sizeof(*mpa)); | ||
497 | memcpy(mpa->key, MPA_KEY_REQ, sizeof(mpa->key)); | ||
498 | mpa->flags = (crc_enabled ? MPA_CRC : 0) | | ||
499 | (markers_enabled ? MPA_MARKERS : 0); | ||
500 | mpa->private_data_size = htons(ep->plen); | ||
501 | mpa->revision = mpa_rev; | ||
502 | |||
503 | if (ep->plen) | ||
504 | memcpy(mpa->private_data, ep->mpa_pkt + sizeof(*mpa), ep->plen); | ||
505 | |||
506 | /* | ||
507 | * Reference the mpa skb. This ensures the data area | ||
508 | * will remain in memory until the hw acks the tx. | ||
509 | * Function tx_ack() will deref it. | ||
510 | */ | ||
511 | skb_get(skb); | ||
512 | set_arp_failure_handler(skb, arp_failure_discard); | ||
513 | skb->h.raw = skb->data; | ||
514 | len = skb->len; | ||
515 | req = (struct tx_data_wr *) skb_push(skb, sizeof(*req)); | ||
516 | req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_OFLD_TX_DATA)); | ||
517 | req->wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
518 | req->len = htonl(len); | ||
519 | req->param = htonl(V_TX_PORT(ep->l2t->smt_idx) | | ||
520 | V_TX_SNDBUF(snd_win>>15)); | ||
521 | req->flags = htonl(F_TX_IMM_ACK|F_TX_INIT); | ||
522 | req->sndseq = htonl(ep->snd_seq); | ||
523 | BUG_ON(ep->mpa_skb); | ||
524 | ep->mpa_skb = skb; | ||
525 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
526 | start_ep_timer(ep); | ||
527 | state_set(&ep->com, MPA_REQ_SENT); | ||
528 | return; | ||
529 | } | ||
530 | |||
531 | static int send_mpa_reject(struct iwch_ep *ep, const void *pdata, u8 plen) | ||
532 | { | ||
533 | int mpalen; | ||
534 | struct tx_data_wr *req; | ||
535 | struct mpa_message *mpa; | ||
536 | struct sk_buff *skb; | ||
537 | |||
538 | PDBG("%s ep %p plen %d\n", __FUNCTION__, ep, plen); | ||
539 | |||
540 | mpalen = sizeof(*mpa) + plen; | ||
541 | |||
542 | skb = get_skb(NULL, mpalen + sizeof(*req), GFP_KERNEL); | ||
543 | if (!skb) { | ||
544 | printk(KERN_ERR MOD "%s - cannot alloc skb!\n", __FUNCTION__); | ||
545 | return -ENOMEM; | ||
546 | } | ||
547 | skb_reserve(skb, sizeof(*req)); | ||
548 | mpa = (struct mpa_message *) skb_put(skb, mpalen); | ||
549 | memset(mpa, 0, sizeof(*mpa)); | ||
550 | memcpy(mpa->key, MPA_KEY_REP, sizeof(mpa->key)); | ||
551 | mpa->flags = MPA_REJECT; | ||
552 | mpa->revision = mpa_rev; | ||
553 | mpa->private_data_size = htons(plen); | ||
554 | if (plen) | ||
555 | memcpy(mpa->private_data, pdata, plen); | ||
556 | |||
557 | /* | ||
558 | * Reference the mpa skb again. This ensures the data area | ||
559 | * will remain in memory until the hw acks the tx. | ||
560 | * Function tx_ack() will deref it. | ||
561 | */ | ||
562 | skb_get(skb); | ||
563 | skb->priority = CPL_PRIORITY_DATA; | ||
564 | set_arp_failure_handler(skb, arp_failure_discard); | ||
565 | skb->h.raw = skb->data; | ||
566 | req = (struct tx_data_wr *) skb_push(skb, sizeof(*req)); | ||
567 | req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_OFLD_TX_DATA)); | ||
568 | req->wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
569 | req->len = htonl(mpalen); | ||
570 | req->param = htonl(V_TX_PORT(ep->l2t->smt_idx) | | ||
571 | V_TX_SNDBUF(snd_win>>15)); | ||
572 | req->flags = htonl(F_TX_IMM_ACK|F_TX_INIT); | ||
573 | req->sndseq = htonl(ep->snd_seq); | ||
574 | BUG_ON(ep->mpa_skb); | ||
575 | ep->mpa_skb = skb; | ||
576 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
577 | return 0; | ||
578 | } | ||
579 | |||
580 | static int send_mpa_reply(struct iwch_ep *ep, const void *pdata, u8 plen) | ||
581 | { | ||
582 | int mpalen; | ||
583 | struct tx_data_wr *req; | ||
584 | struct mpa_message *mpa; | ||
585 | int len; | ||
586 | struct sk_buff *skb; | ||
587 | |||
588 | PDBG("%s ep %p plen %d\n", __FUNCTION__, ep, plen); | ||
589 | |||
590 | mpalen = sizeof(*mpa) + plen; | ||
591 | |||
592 | skb = get_skb(NULL, mpalen + sizeof(*req), GFP_KERNEL); | ||
593 | if (!skb) { | ||
594 | printk(KERN_ERR MOD "%s - cannot alloc skb!\n", __FUNCTION__); | ||
595 | return -ENOMEM; | ||
596 | } | ||
597 | skb->priority = CPL_PRIORITY_DATA; | ||
598 | skb_reserve(skb, sizeof(*req)); | ||
599 | mpa = (struct mpa_message *) skb_put(skb, mpalen); | ||
600 | memset(mpa, 0, sizeof(*mpa)); | ||
601 | memcpy(mpa->key, MPA_KEY_REP, sizeof(mpa->key)); | ||
602 | mpa->flags = (ep->mpa_attr.crc_enabled ? MPA_CRC : 0) | | ||
603 | (markers_enabled ? MPA_MARKERS : 0); | ||
604 | mpa->revision = mpa_rev; | ||
605 | mpa->private_data_size = htons(plen); | ||
606 | if (plen) | ||
607 | memcpy(mpa->private_data, pdata, plen); | ||
608 | |||
609 | /* | ||
610 | * Reference the mpa skb. This ensures the data area | ||
611 | * will remain in memory until the hw acks the tx. | ||
612 | * Function tx_ack() will deref it. | ||
613 | */ | ||
614 | skb_get(skb); | ||
615 | set_arp_failure_handler(skb, arp_failure_discard); | ||
616 | skb->h.raw = skb->data; | ||
617 | len = skb->len; | ||
618 | req = (struct tx_data_wr *) skb_push(skb, sizeof(*req)); | ||
619 | req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_OFLD_TX_DATA)); | ||
620 | req->wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
621 | req->len = htonl(len); | ||
622 | req->param = htonl(V_TX_PORT(ep->l2t->smt_idx) | | ||
623 | V_TX_SNDBUF(snd_win>>15)); | ||
624 | req->flags = htonl(F_TX_MORE | F_TX_IMM_ACK | F_TX_INIT); | ||
625 | req->sndseq = htonl(ep->snd_seq); | ||
626 | ep->mpa_skb = skb; | ||
627 | state_set(&ep->com, MPA_REP_SENT); | ||
628 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
629 | return 0; | ||
630 | } | ||
631 | |||
632 | static int act_establish(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
633 | { | ||
634 | struct iwch_ep *ep = ctx; | ||
635 | struct cpl_act_establish *req = cplhdr(skb); | ||
636 | unsigned int tid = GET_TID(req); | ||
637 | |||
638 | PDBG("%s ep %p tid %d\n", __FUNCTION__, ep, tid); | ||
639 | |||
640 | dst_confirm(ep->dst); | ||
641 | |||
642 | /* setup the hwtid for this connection */ | ||
643 | ep->hwtid = tid; | ||
644 | cxgb3_insert_tid(ep->com.tdev, &t3c_client, ep, tid); | ||
645 | |||
646 | ep->snd_seq = ntohl(req->snd_isn); | ||
647 | |||
648 | set_emss(ep, ntohs(req->tcp_opt)); | ||
649 | |||
650 | /* dealloc the atid */ | ||
651 | cxgb3_free_atid(ep->com.tdev, ep->atid); | ||
652 | |||
653 | /* start MPA negotiation */ | ||
654 | send_mpa_req(ep, skb); | ||
655 | |||
656 | return 0; | ||
657 | } | ||
658 | |||
659 | static void abort_connection(struct iwch_ep *ep, struct sk_buff *skb, gfp_t gfp) | ||
660 | { | ||
661 | PDBG("%s ep %p\n", __FILE__, ep); | ||
662 | state_set(&ep->com, ABORTING); | ||
663 | send_abort(ep, skb, gfp); | ||
664 | } | ||
665 | |||
666 | static void close_complete_upcall(struct iwch_ep *ep) | ||
667 | { | ||
668 | struct iw_cm_event event; | ||
669 | |||
670 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
671 | memset(&event, 0, sizeof(event)); | ||
672 | event.event = IW_CM_EVENT_CLOSE; | ||
673 | if (ep->com.cm_id) { | ||
674 | PDBG("close complete delivered ep %p cm_id %p tid %d\n", | ||
675 | ep, ep->com.cm_id, ep->hwtid); | ||
676 | ep->com.cm_id->event_handler(ep->com.cm_id, &event); | ||
677 | ep->com.cm_id->rem_ref(ep->com.cm_id); | ||
678 | ep->com.cm_id = NULL; | ||
679 | ep->com.qp = NULL; | ||
680 | } | ||
681 | } | ||
682 | |||
683 | static void peer_close_upcall(struct iwch_ep *ep) | ||
684 | { | ||
685 | struct iw_cm_event event; | ||
686 | |||
687 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
688 | memset(&event, 0, sizeof(event)); | ||
689 | event.event = IW_CM_EVENT_DISCONNECT; | ||
690 | if (ep->com.cm_id) { | ||
691 | PDBG("peer close delivered ep %p cm_id %p tid %d\n", | ||
692 | ep, ep->com.cm_id, ep->hwtid); | ||
693 | ep->com.cm_id->event_handler(ep->com.cm_id, &event); | ||
694 | } | ||
695 | } | ||
696 | |||
697 | static void peer_abort_upcall(struct iwch_ep *ep) | ||
698 | { | ||
699 | struct iw_cm_event event; | ||
700 | |||
701 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
702 | memset(&event, 0, sizeof(event)); | ||
703 | event.event = IW_CM_EVENT_CLOSE; | ||
704 | event.status = -ECONNRESET; | ||
705 | if (ep->com.cm_id) { | ||
706 | PDBG("abort delivered ep %p cm_id %p tid %d\n", ep, | ||
707 | ep->com.cm_id, ep->hwtid); | ||
708 | ep->com.cm_id->event_handler(ep->com.cm_id, &event); | ||
709 | ep->com.cm_id->rem_ref(ep->com.cm_id); | ||
710 | ep->com.cm_id = NULL; | ||
711 | ep->com.qp = NULL; | ||
712 | } | ||
713 | } | ||
714 | |||
715 | static void connect_reply_upcall(struct iwch_ep *ep, int status) | ||
716 | { | ||
717 | struct iw_cm_event event; | ||
718 | |||
719 | PDBG("%s ep %p status %d\n", __FUNCTION__, ep, status); | ||
720 | memset(&event, 0, sizeof(event)); | ||
721 | event.event = IW_CM_EVENT_CONNECT_REPLY; | ||
722 | event.status = status; | ||
723 | event.local_addr = ep->com.local_addr; | ||
724 | event.remote_addr = ep->com.remote_addr; | ||
725 | |||
726 | if ((status == 0) || (status == -ECONNREFUSED)) { | ||
727 | event.private_data_len = ep->plen; | ||
728 | event.private_data = ep->mpa_pkt + sizeof(struct mpa_message); | ||
729 | } | ||
730 | if (ep->com.cm_id) { | ||
731 | PDBG("%s ep %p tid %d status %d\n", __FUNCTION__, ep, | ||
732 | ep->hwtid, status); | ||
733 | ep->com.cm_id->event_handler(ep->com.cm_id, &event); | ||
734 | } | ||
735 | if (status < 0) { | ||
736 | ep->com.cm_id->rem_ref(ep->com.cm_id); | ||
737 | ep->com.cm_id = NULL; | ||
738 | ep->com.qp = NULL; | ||
739 | } | ||
740 | } | ||
741 | |||
742 | static void connect_request_upcall(struct iwch_ep *ep) | ||
743 | { | ||
744 | struct iw_cm_event event; | ||
745 | |||
746 | PDBG("%s ep %p tid %d\n", __FUNCTION__, ep, ep->hwtid); | ||
747 | memset(&event, 0, sizeof(event)); | ||
748 | event.event = IW_CM_EVENT_CONNECT_REQUEST; | ||
749 | event.local_addr = ep->com.local_addr; | ||
750 | event.remote_addr = ep->com.remote_addr; | ||
751 | event.private_data_len = ep->plen; | ||
752 | event.private_data = ep->mpa_pkt + sizeof(struct mpa_message); | ||
753 | event.provider_data = ep; | ||
754 | if (state_read(&ep->parent_ep->com) != DEAD) | ||
755 | ep->parent_ep->com.cm_id->event_handler( | ||
756 | ep->parent_ep->com.cm_id, | ||
757 | &event); | ||
758 | put_ep(&ep->parent_ep->com); | ||
759 | ep->parent_ep = NULL; | ||
760 | } | ||
761 | |||
762 | static void established_upcall(struct iwch_ep *ep) | ||
763 | { | ||
764 | struct iw_cm_event event; | ||
765 | |||
766 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
767 | memset(&event, 0, sizeof(event)); | ||
768 | event.event = IW_CM_EVENT_ESTABLISHED; | ||
769 | if (ep->com.cm_id) { | ||
770 | PDBG("%s ep %p tid %d\n", __FUNCTION__, ep, ep->hwtid); | ||
771 | ep->com.cm_id->event_handler(ep->com.cm_id, &event); | ||
772 | } | ||
773 | } | ||
774 | |||
775 | static int update_rx_credits(struct iwch_ep *ep, u32 credits) | ||
776 | { | ||
777 | struct cpl_rx_data_ack *req; | ||
778 | struct sk_buff *skb; | ||
779 | |||
780 | PDBG("%s ep %p credits %u\n", __FUNCTION__, ep, credits); | ||
781 | skb = get_skb(NULL, sizeof(*req), GFP_KERNEL); | ||
782 | if (!skb) { | ||
783 | printk(KERN_ERR MOD "update_rx_credits - cannot alloc skb!\n"); | ||
784 | return 0; | ||
785 | } | ||
786 | |||
787 | req = (struct cpl_rx_data_ack *) skb_put(skb, sizeof(*req)); | ||
788 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
789 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_RX_DATA_ACK, ep->hwtid)); | ||
790 | req->credit_dack = htonl(V_RX_CREDITS(credits) | V_RX_FORCE_ACK(1)); | ||
791 | skb->priority = CPL_PRIORITY_ACK; | ||
792 | ep->com.tdev->send(ep->com.tdev, skb); | ||
793 | return credits; | ||
794 | } | ||
795 | |||
796 | static void process_mpa_reply(struct iwch_ep *ep, struct sk_buff *skb) | ||
797 | { | ||
798 | struct mpa_message *mpa; | ||
799 | u16 plen; | ||
800 | struct iwch_qp_attributes attrs; | ||
801 | enum iwch_qp_attr_mask mask; | ||
802 | int err; | ||
803 | |||
804 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
805 | |||
806 | /* | ||
807 | * Stop mpa timer. If it expired, then the state has | ||
808 | * changed and we bail since ep_timeout already aborted | ||
809 | * the connection. | ||
810 | */ | ||
811 | stop_ep_timer(ep); | ||
812 | if (state_read(&ep->com) != MPA_REQ_SENT) | ||
813 | return; | ||
814 | |||
815 | /* | ||
816 | * If we get more than the supported amount of private data | ||
817 | * then we must fail this connection. | ||
818 | */ | ||
819 | if (ep->mpa_pkt_len + skb->len > sizeof(ep->mpa_pkt)) { | ||
820 | err = -EINVAL; | ||
821 | goto err; | ||
822 | } | ||
823 | |||
824 | /* | ||
825 | * copy the new data into our accumulation buffer. | ||
826 | */ | ||
827 | memcpy(&(ep->mpa_pkt[ep->mpa_pkt_len]), skb->data, skb->len); | ||
828 | ep->mpa_pkt_len += skb->len; | ||
829 | |||
830 | /* | ||
831 | * if we don't even have the mpa message, then bail. | ||
832 | */ | ||
833 | if (ep->mpa_pkt_len < sizeof(*mpa)) | ||
834 | return; | ||
835 | mpa = (struct mpa_message *) ep->mpa_pkt; | ||
836 | |||
837 | /* Validate MPA header. */ | ||
838 | if (mpa->revision != mpa_rev) { | ||
839 | err = -EPROTO; | ||
840 | goto err; | ||
841 | } | ||
842 | if (memcmp(mpa->key, MPA_KEY_REP, sizeof(mpa->key))) { | ||
843 | err = -EPROTO; | ||
844 | goto err; | ||
845 | } | ||
846 | |||
847 | plen = ntohs(mpa->private_data_size); | ||
848 | |||
849 | /* | ||
850 | * Fail if there's too much private data. | ||
851 | */ | ||
852 | if (plen > MPA_MAX_PRIVATE_DATA) { | ||
853 | err = -EPROTO; | ||
854 | goto err; | ||
855 | } | ||
856 | |||
857 | /* | ||
858 | * If plen does not account for pkt size | ||
859 | */ | ||
860 | if (ep->mpa_pkt_len > (sizeof(*mpa) + plen)) { | ||
861 | err = -EPROTO; | ||
862 | goto err; | ||
863 | } | ||
864 | |||
865 | ep->plen = (u8) plen; | ||
866 | |||
867 | /* | ||
868 | * If we don't have all the pdata yet, then bail. | ||
869 | * We'll continue process when more data arrives. | ||
870 | */ | ||
871 | if (ep->mpa_pkt_len < (sizeof(*mpa) + plen)) | ||
872 | return; | ||
873 | |||
874 | if (mpa->flags & MPA_REJECT) { | ||
875 | err = -ECONNREFUSED; | ||
876 | goto err; | ||
877 | } | ||
878 | |||
879 | /* | ||
880 | * If we get here we have accumulated the entire mpa | ||
881 | * start reply message including private data. And | ||
882 | * the MPA header is valid. | ||
883 | */ | ||
884 | state_set(&ep->com, FPDU_MODE); | ||
885 | ep->mpa_attr.crc_enabled = (mpa->flags & MPA_CRC) | crc_enabled ? 1 : 0; | ||
886 | ep->mpa_attr.recv_marker_enabled = markers_enabled; | ||
887 | ep->mpa_attr.xmit_marker_enabled = mpa->flags & MPA_MARKERS ? 1 : 0; | ||
888 | ep->mpa_attr.version = mpa_rev; | ||
889 | PDBG("%s - crc_enabled=%d, recv_marker_enabled=%d, " | ||
890 | "xmit_marker_enabled=%d, version=%d\n", __FUNCTION__, | ||
891 | ep->mpa_attr.crc_enabled, ep->mpa_attr.recv_marker_enabled, | ||
892 | ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version); | ||
893 | |||
894 | attrs.mpa_attr = ep->mpa_attr; | ||
895 | attrs.max_ird = ep->ird; | ||
896 | attrs.max_ord = ep->ord; | ||
897 | attrs.llp_stream_handle = ep; | ||
898 | attrs.next_state = IWCH_QP_STATE_RTS; | ||
899 | |||
900 | mask = IWCH_QP_ATTR_NEXT_STATE | | ||
901 | IWCH_QP_ATTR_LLP_STREAM_HANDLE | IWCH_QP_ATTR_MPA_ATTR | | ||
902 | IWCH_QP_ATTR_MAX_IRD | IWCH_QP_ATTR_MAX_ORD; | ||
903 | |||
904 | /* bind QP and TID with INIT_WR */ | ||
905 | err = iwch_modify_qp(ep->com.qp->rhp, | ||
906 | ep->com.qp, mask, &attrs, 1); | ||
907 | if (!err) | ||
908 | goto out; | ||
909 | err: | ||
910 | abort_connection(ep, skb, GFP_KERNEL); | ||
911 | out: | ||
912 | connect_reply_upcall(ep, err); | ||
913 | return; | ||
914 | } | ||
915 | |||
916 | static void process_mpa_request(struct iwch_ep *ep, struct sk_buff *skb) | ||
917 | { | ||
918 | struct mpa_message *mpa; | ||
919 | u16 plen; | ||
920 | |||
921 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
922 | |||
923 | /* | ||
924 | * Stop mpa timer. If it expired, then the state has | ||
925 | * changed and we bail since ep_timeout already aborted | ||
926 | * the connection. | ||
927 | */ | ||
928 | stop_ep_timer(ep); | ||
929 | if (state_read(&ep->com) != MPA_REQ_WAIT) | ||
930 | return; | ||
931 | |||
932 | /* | ||
933 | * If we get more than the supported amount of private data | ||
934 | * then we must fail this connection. | ||
935 | */ | ||
936 | if (ep->mpa_pkt_len + skb->len > sizeof(ep->mpa_pkt)) { | ||
937 | abort_connection(ep, skb, GFP_KERNEL); | ||
938 | return; | ||
939 | } | ||
940 | |||
941 | PDBG("%s enter (%s line %u)\n", __FUNCTION__, __FILE__, __LINE__); | ||
942 | |||
943 | /* | ||
944 | * Copy the new data into our accumulation buffer. | ||
945 | */ | ||
946 | memcpy(&(ep->mpa_pkt[ep->mpa_pkt_len]), skb->data, skb->len); | ||
947 | ep->mpa_pkt_len += skb->len; | ||
948 | |||
949 | /* | ||
950 | * If we don't even have the mpa message, then bail. | ||
951 | * We'll continue process when more data arrives. | ||
952 | */ | ||
953 | if (ep->mpa_pkt_len < sizeof(*mpa)) | ||
954 | return; | ||
955 | PDBG("%s enter (%s line %u)\n", __FUNCTION__, __FILE__, __LINE__); | ||
956 | mpa = (struct mpa_message *) ep->mpa_pkt; | ||
957 | |||
958 | /* | ||
959 | * Validate MPA Header. | ||
960 | */ | ||
961 | if (mpa->revision != mpa_rev) { | ||
962 | abort_connection(ep, skb, GFP_KERNEL); | ||
963 | return; | ||
964 | } | ||
965 | |||
966 | if (memcmp(mpa->key, MPA_KEY_REQ, sizeof(mpa->key))) { | ||
967 | abort_connection(ep, skb, GFP_KERNEL); | ||
968 | return; | ||
969 | } | ||
970 | |||
971 | plen = ntohs(mpa->private_data_size); | ||
972 | |||
973 | /* | ||
974 | * Fail if there's too much private data. | ||
975 | */ | ||
976 | if (plen > MPA_MAX_PRIVATE_DATA) { | ||
977 | abort_connection(ep, skb, GFP_KERNEL); | ||
978 | return; | ||
979 | } | ||
980 | |||
981 | /* | ||
982 | * If plen does not account for pkt size | ||
983 | */ | ||
984 | if (ep->mpa_pkt_len > (sizeof(*mpa) + plen)) { | ||
985 | abort_connection(ep, skb, GFP_KERNEL); | ||
986 | return; | ||
987 | } | ||
988 | ep->plen = (u8) plen; | ||
989 | |||
990 | /* | ||
991 | * If we don't have all the pdata yet, then bail. | ||
992 | */ | ||
993 | if (ep->mpa_pkt_len < (sizeof(*mpa) + plen)) | ||
994 | return; | ||
995 | |||
996 | /* | ||
997 | * If we get here we have accumulated the entire mpa | ||
998 | * start reply message including private data. | ||
999 | */ | ||
1000 | ep->mpa_attr.crc_enabled = (mpa->flags & MPA_CRC) | crc_enabled ? 1 : 0; | ||
1001 | ep->mpa_attr.recv_marker_enabled = markers_enabled; | ||
1002 | ep->mpa_attr.xmit_marker_enabled = mpa->flags & MPA_MARKERS ? 1 : 0; | ||
1003 | ep->mpa_attr.version = mpa_rev; | ||
1004 | PDBG("%s - crc_enabled=%d, recv_marker_enabled=%d, " | ||
1005 | "xmit_marker_enabled=%d, version=%d\n", __FUNCTION__, | ||
1006 | ep->mpa_attr.crc_enabled, ep->mpa_attr.recv_marker_enabled, | ||
1007 | ep->mpa_attr.xmit_marker_enabled, ep->mpa_attr.version); | ||
1008 | |||
1009 | state_set(&ep->com, MPA_REQ_RCVD); | ||
1010 | |||
1011 | /* drive upcall */ | ||
1012 | connect_request_upcall(ep); | ||
1013 | return; | ||
1014 | } | ||
1015 | |||
1016 | static int rx_data(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1017 | { | ||
1018 | struct iwch_ep *ep = ctx; | ||
1019 | struct cpl_rx_data *hdr = cplhdr(skb); | ||
1020 | unsigned int dlen = ntohs(hdr->len); | ||
1021 | |||
1022 | PDBG("%s ep %p dlen %u\n", __FUNCTION__, ep, dlen); | ||
1023 | |||
1024 | skb_pull(skb, sizeof(*hdr)); | ||
1025 | skb_trim(skb, dlen); | ||
1026 | |||
1027 | switch (state_read(&ep->com)) { | ||
1028 | case MPA_REQ_SENT: | ||
1029 | process_mpa_reply(ep, skb); | ||
1030 | break; | ||
1031 | case MPA_REQ_WAIT: | ||
1032 | process_mpa_request(ep, skb); | ||
1033 | break; | ||
1034 | case MPA_REP_SENT: | ||
1035 | break; | ||
1036 | default: | ||
1037 | printk(KERN_ERR MOD "%s Unexpected streaming data." | ||
1038 | " ep %p state %d tid %d\n", | ||
1039 | __FUNCTION__, ep, state_read(&ep->com), ep->hwtid); | ||
1040 | |||
1041 | /* | ||
1042 | * The ep will timeout and inform the ULP of the failure. | ||
1043 | * See ep_timeout(). | ||
1044 | */ | ||
1045 | break; | ||
1046 | } | ||
1047 | |||
1048 | /* update RX credits */ | ||
1049 | update_rx_credits(ep, dlen); | ||
1050 | |||
1051 | return CPL_RET_BUF_DONE; | ||
1052 | } | ||
1053 | |||
1054 | /* | ||
1055 | * Upcall from the adapter indicating data has been transmitted. | ||
1056 | * For us its just the single MPA request or reply. We can now free | ||
1057 | * the skb holding the mpa message. | ||
1058 | */ | ||
1059 | static int tx_ack(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1060 | { | ||
1061 | struct iwch_ep *ep = ctx; | ||
1062 | struct cpl_wr_ack *hdr = cplhdr(skb); | ||
1063 | unsigned int credits = ntohs(hdr->credits); | ||
1064 | enum iwch_qp_attr_mask mask; | ||
1065 | |||
1066 | PDBG("%s ep %p credits %u\n", __FUNCTION__, ep, credits); | ||
1067 | |||
1068 | if (credits == 0) | ||
1069 | return CPL_RET_BUF_DONE; | ||
1070 | BUG_ON(credits != 1); | ||
1071 | BUG_ON(ep->mpa_skb == NULL); | ||
1072 | kfree_skb(ep->mpa_skb); | ||
1073 | ep->mpa_skb = NULL; | ||
1074 | dst_confirm(ep->dst); | ||
1075 | if (state_read(&ep->com) == MPA_REP_SENT) { | ||
1076 | struct iwch_qp_attributes attrs; | ||
1077 | |||
1078 | /* bind QP to EP and move to RTS */ | ||
1079 | attrs.mpa_attr = ep->mpa_attr; | ||
1080 | attrs.max_ird = ep->ord; | ||
1081 | attrs.max_ord = ep->ord; | ||
1082 | attrs.llp_stream_handle = ep; | ||
1083 | attrs.next_state = IWCH_QP_STATE_RTS; | ||
1084 | |||
1085 | /* bind QP and TID with INIT_WR */ | ||
1086 | mask = IWCH_QP_ATTR_NEXT_STATE | | ||
1087 | IWCH_QP_ATTR_LLP_STREAM_HANDLE | | ||
1088 | IWCH_QP_ATTR_MPA_ATTR | | ||
1089 | IWCH_QP_ATTR_MAX_IRD | | ||
1090 | IWCH_QP_ATTR_MAX_ORD; | ||
1091 | |||
1092 | ep->com.rpl_err = iwch_modify_qp(ep->com.qp->rhp, | ||
1093 | ep->com.qp, mask, &attrs, 1); | ||
1094 | |||
1095 | if (!ep->com.rpl_err) { | ||
1096 | state_set(&ep->com, FPDU_MODE); | ||
1097 | established_upcall(ep); | ||
1098 | } | ||
1099 | |||
1100 | ep->com.rpl_done = 1; | ||
1101 | PDBG("waking up ep %p\n", ep); | ||
1102 | wake_up(&ep->com.waitq); | ||
1103 | } | ||
1104 | return CPL_RET_BUF_DONE; | ||
1105 | } | ||
1106 | |||
1107 | static int abort_rpl(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1108 | { | ||
1109 | struct iwch_ep *ep = ctx; | ||
1110 | |||
1111 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1112 | |||
1113 | close_complete_upcall(ep); | ||
1114 | state_set(&ep->com, DEAD); | ||
1115 | release_ep_resources(ep); | ||
1116 | return CPL_RET_BUF_DONE; | ||
1117 | } | ||
1118 | |||
1119 | static int act_open_rpl(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1120 | { | ||
1121 | struct iwch_ep *ep = ctx; | ||
1122 | struct cpl_act_open_rpl *rpl = cplhdr(skb); | ||
1123 | |||
1124 | PDBG("%s ep %p status %u errno %d\n", __FUNCTION__, ep, rpl->status, | ||
1125 | status2errno(rpl->status)); | ||
1126 | connect_reply_upcall(ep, status2errno(rpl->status)); | ||
1127 | state_set(&ep->com, DEAD); | ||
1128 | if (ep->com.tdev->type == T3B) | ||
1129 | release_tid(ep->com.tdev, GET_TID(rpl), NULL); | ||
1130 | cxgb3_free_atid(ep->com.tdev, ep->atid); | ||
1131 | dst_release(ep->dst); | ||
1132 | l2t_release(L2DATA(ep->com.tdev), ep->l2t); | ||
1133 | put_ep(&ep->com); | ||
1134 | return CPL_RET_BUF_DONE; | ||
1135 | } | ||
1136 | |||
1137 | static int listen_start(struct iwch_listen_ep *ep) | ||
1138 | { | ||
1139 | struct sk_buff *skb; | ||
1140 | struct cpl_pass_open_req *req; | ||
1141 | |||
1142 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1143 | skb = get_skb(NULL, sizeof(*req), GFP_KERNEL); | ||
1144 | if (!skb) { | ||
1145 | printk(KERN_ERR MOD "t3c_listen_start failed to alloc skb!\n"); | ||
1146 | return -ENOMEM; | ||
1147 | } | ||
1148 | |||
1149 | req = (struct cpl_pass_open_req *) skb_put(skb, sizeof(*req)); | ||
1150 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
1151 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_PASS_OPEN_REQ, ep->stid)); | ||
1152 | req->local_port = ep->com.local_addr.sin_port; | ||
1153 | req->local_ip = ep->com.local_addr.sin_addr.s_addr; | ||
1154 | req->peer_port = 0; | ||
1155 | req->peer_ip = 0; | ||
1156 | req->peer_netmask = 0; | ||
1157 | req->opt0h = htonl(F_DELACK | F_TCAM_BYPASS); | ||
1158 | req->opt0l = htonl(V_RCV_BUFSIZ(rcv_win>>10)); | ||
1159 | req->opt1 = htonl(V_CONN_POLICY(CPL_CONN_POLICY_ASK)); | ||
1160 | |||
1161 | skb->priority = 1; | ||
1162 | ep->com.tdev->send(ep->com.tdev, skb); | ||
1163 | return 0; | ||
1164 | } | ||
1165 | |||
1166 | static int pass_open_rpl(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1167 | { | ||
1168 | struct iwch_listen_ep *ep = ctx; | ||
1169 | struct cpl_pass_open_rpl *rpl = cplhdr(skb); | ||
1170 | |||
1171 | PDBG("%s ep %p status %d error %d\n", __FUNCTION__, ep, | ||
1172 | rpl->status, status2errno(rpl->status)); | ||
1173 | ep->com.rpl_err = status2errno(rpl->status); | ||
1174 | ep->com.rpl_done = 1; | ||
1175 | wake_up(&ep->com.waitq); | ||
1176 | |||
1177 | return CPL_RET_BUF_DONE; | ||
1178 | } | ||
1179 | |||
1180 | static int listen_stop(struct iwch_listen_ep *ep) | ||
1181 | { | ||
1182 | struct sk_buff *skb; | ||
1183 | struct cpl_close_listserv_req *req; | ||
1184 | |||
1185 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1186 | skb = get_skb(NULL, sizeof(*req), GFP_KERNEL); | ||
1187 | if (!skb) { | ||
1188 | printk(KERN_ERR MOD "%s - failed to alloc skb\n", __FUNCTION__); | ||
1189 | return -ENOMEM; | ||
1190 | } | ||
1191 | req = (struct cpl_close_listserv_req *) skb_put(skb, sizeof(*req)); | ||
1192 | req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
1193 | OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_CLOSE_LISTSRV_REQ, ep->stid)); | ||
1194 | skb->priority = 1; | ||
1195 | ep->com.tdev->send(ep->com.tdev, skb); | ||
1196 | return 0; | ||
1197 | } | ||
1198 | |||
1199 | static int close_listsrv_rpl(struct t3cdev *tdev, struct sk_buff *skb, | ||
1200 | void *ctx) | ||
1201 | { | ||
1202 | struct iwch_listen_ep *ep = ctx; | ||
1203 | struct cpl_close_listserv_rpl *rpl = cplhdr(skb); | ||
1204 | |||
1205 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1206 | ep->com.rpl_err = status2errno(rpl->status); | ||
1207 | ep->com.rpl_done = 1; | ||
1208 | wake_up(&ep->com.waitq); | ||
1209 | return CPL_RET_BUF_DONE; | ||
1210 | } | ||
1211 | |||
1212 | static void accept_cr(struct iwch_ep *ep, __be32 peer_ip, struct sk_buff *skb) | ||
1213 | { | ||
1214 | struct cpl_pass_accept_rpl *rpl; | ||
1215 | unsigned int mtu_idx; | ||
1216 | u32 opt0h, opt0l, opt2; | ||
1217 | int wscale; | ||
1218 | |||
1219 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1220 | BUG_ON(skb_cloned(skb)); | ||
1221 | skb_trim(skb, sizeof(*rpl)); | ||
1222 | skb_get(skb); | ||
1223 | mtu_idx = find_best_mtu(T3C_DATA(ep->com.tdev), dst_mtu(ep->dst)); | ||
1224 | wscale = compute_wscale(rcv_win); | ||
1225 | opt0h = V_NAGLE(0) | | ||
1226 | V_NO_CONG(nocong) | | ||
1227 | V_KEEP_ALIVE(1) | | ||
1228 | F_TCAM_BYPASS | | ||
1229 | V_WND_SCALE(wscale) | | ||
1230 | V_MSS_IDX(mtu_idx) | | ||
1231 | V_L2T_IDX(ep->l2t->idx) | V_TX_CHANNEL(ep->l2t->smt_idx); | ||
1232 | opt0l = V_TOS((ep->tos >> 2) & M_TOS) | V_RCV_BUFSIZ(rcv_win>>10); | ||
1233 | opt2 = V_FLAVORS_VALID(1) | V_CONG_CONTROL_FLAVOR(cong_flavor); | ||
1234 | |||
1235 | rpl = cplhdr(skb); | ||
1236 | rpl->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
1237 | OPCODE_TID(rpl) = htonl(MK_OPCODE_TID(CPL_PASS_ACCEPT_RPL, ep->hwtid)); | ||
1238 | rpl->peer_ip = peer_ip; | ||
1239 | rpl->opt0h = htonl(opt0h); | ||
1240 | rpl->opt0l_status = htonl(opt0l | CPL_PASS_OPEN_ACCEPT); | ||
1241 | rpl->opt2 = htonl(opt2); | ||
1242 | rpl->rsvd = rpl->opt2; /* workaround for HW bug */ | ||
1243 | skb->priority = CPL_PRIORITY_SETUP; | ||
1244 | l2t_send(ep->com.tdev, skb, ep->l2t); | ||
1245 | |||
1246 | return; | ||
1247 | } | ||
1248 | |||
1249 | static void reject_cr(struct t3cdev *tdev, u32 hwtid, __be32 peer_ip, | ||
1250 | struct sk_buff *skb) | ||
1251 | { | ||
1252 | PDBG("%s t3cdev %p tid %u peer_ip %x\n", __FUNCTION__, tdev, hwtid, | ||
1253 | peer_ip); | ||
1254 | BUG_ON(skb_cloned(skb)); | ||
1255 | skb_trim(skb, sizeof(struct cpl_tid_release)); | ||
1256 | skb_get(skb); | ||
1257 | |||
1258 | if (tdev->type == T3B) | ||
1259 | release_tid(tdev, hwtid, skb); | ||
1260 | else { | ||
1261 | struct cpl_pass_accept_rpl *rpl; | ||
1262 | |||
1263 | rpl = cplhdr(skb); | ||
1264 | skb->priority = CPL_PRIORITY_SETUP; | ||
1265 | rpl->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); | ||
1266 | OPCODE_TID(rpl) = htonl(MK_OPCODE_TID(CPL_PASS_ACCEPT_RPL, | ||
1267 | hwtid)); | ||
1268 | rpl->peer_ip = peer_ip; | ||
1269 | rpl->opt0h = htonl(F_TCAM_BYPASS); | ||
1270 | rpl->opt0l_status = htonl(CPL_PASS_OPEN_REJECT); | ||
1271 | rpl->opt2 = 0; | ||
1272 | rpl->rsvd = rpl->opt2; | ||
1273 | tdev->send(tdev, skb); | ||
1274 | } | ||
1275 | } | ||
1276 | |||
1277 | static int pass_accept_req(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1278 | { | ||
1279 | struct iwch_ep *child_ep, *parent_ep = ctx; | ||
1280 | struct cpl_pass_accept_req *req = cplhdr(skb); | ||
1281 | unsigned int hwtid = GET_TID(req); | ||
1282 | struct dst_entry *dst; | ||
1283 | struct l2t_entry *l2t; | ||
1284 | struct rtable *rt; | ||
1285 | struct iff_mac tim; | ||
1286 | |||
1287 | PDBG("%s parent ep %p tid %u\n", __FUNCTION__, parent_ep, hwtid); | ||
1288 | |||
1289 | if (state_read(&parent_ep->com) != LISTEN) { | ||
1290 | printk(KERN_ERR "%s - listening ep not in LISTEN\n", | ||
1291 | __FUNCTION__); | ||
1292 | goto reject; | ||
1293 | } | ||
1294 | |||
1295 | /* | ||
1296 | * Find the netdev for this connection request. | ||
1297 | */ | ||
1298 | tim.mac_addr = req->dst_mac; | ||
1299 | tim.vlan_tag = ntohs(req->vlan_tag); | ||
1300 | if (tdev->ctl(tdev, GET_IFF_FROM_MAC, &tim) < 0 || !tim.dev) { | ||
1301 | printk(KERN_ERR | ||
1302 | "%s bad dst mac %02x %02x %02x %02x %02x %02x\n", | ||
1303 | __FUNCTION__, | ||
1304 | req->dst_mac[0], | ||
1305 | req->dst_mac[1], | ||
1306 | req->dst_mac[2], | ||
1307 | req->dst_mac[3], | ||
1308 | req->dst_mac[4], | ||
1309 | req->dst_mac[5]); | ||
1310 | goto reject; | ||
1311 | } | ||
1312 | |||
1313 | /* Find output route */ | ||
1314 | rt = find_route(tdev, | ||
1315 | req->local_ip, | ||
1316 | req->peer_ip, | ||
1317 | req->local_port, | ||
1318 | req->peer_port, G_PASS_OPEN_TOS(ntohl(req->tos_tid))); | ||
1319 | if (!rt) { | ||
1320 | printk(KERN_ERR MOD "%s - failed to find dst entry!\n", | ||
1321 | __FUNCTION__); | ||
1322 | goto reject; | ||
1323 | } | ||
1324 | dst = &rt->u.dst; | ||
1325 | l2t = t3_l2t_get(tdev, dst->neighbour, dst->neighbour->dev); | ||
1326 | if (!l2t) { | ||
1327 | printk(KERN_ERR MOD "%s - failed to allocate l2t entry!\n", | ||
1328 | __FUNCTION__); | ||
1329 | dst_release(dst); | ||
1330 | goto reject; | ||
1331 | } | ||
1332 | child_ep = alloc_ep(sizeof(*child_ep), GFP_KERNEL); | ||
1333 | if (!child_ep) { | ||
1334 | printk(KERN_ERR MOD "%s - failed to allocate ep entry!\n", | ||
1335 | __FUNCTION__); | ||
1336 | l2t_release(L2DATA(tdev), l2t); | ||
1337 | dst_release(dst); | ||
1338 | goto reject; | ||
1339 | } | ||
1340 | state_set(&child_ep->com, CONNECTING); | ||
1341 | child_ep->com.tdev = tdev; | ||
1342 | child_ep->com.cm_id = NULL; | ||
1343 | child_ep->com.local_addr.sin_family = PF_INET; | ||
1344 | child_ep->com.local_addr.sin_port = req->local_port; | ||
1345 | child_ep->com.local_addr.sin_addr.s_addr = req->local_ip; | ||
1346 | child_ep->com.remote_addr.sin_family = PF_INET; | ||
1347 | child_ep->com.remote_addr.sin_port = req->peer_port; | ||
1348 | child_ep->com.remote_addr.sin_addr.s_addr = req->peer_ip; | ||
1349 | get_ep(&parent_ep->com); | ||
1350 | child_ep->parent_ep = parent_ep; | ||
1351 | child_ep->tos = G_PASS_OPEN_TOS(ntohl(req->tos_tid)); | ||
1352 | child_ep->l2t = l2t; | ||
1353 | child_ep->dst = dst; | ||
1354 | child_ep->hwtid = hwtid; | ||
1355 | init_timer(&child_ep->timer); | ||
1356 | cxgb3_insert_tid(tdev, &t3c_client, child_ep, hwtid); | ||
1357 | accept_cr(child_ep, req->peer_ip, skb); | ||
1358 | goto out; | ||
1359 | reject: | ||
1360 | reject_cr(tdev, hwtid, req->peer_ip, skb); | ||
1361 | out: | ||
1362 | return CPL_RET_BUF_DONE; | ||
1363 | } | ||
1364 | |||
1365 | static int pass_establish(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1366 | { | ||
1367 | struct iwch_ep *ep = ctx; | ||
1368 | struct cpl_pass_establish *req = cplhdr(skb); | ||
1369 | |||
1370 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1371 | ep->snd_seq = ntohl(req->snd_isn); | ||
1372 | |||
1373 | set_emss(ep, ntohs(req->tcp_opt)); | ||
1374 | |||
1375 | dst_confirm(ep->dst); | ||
1376 | state_set(&ep->com, MPA_REQ_WAIT); | ||
1377 | start_ep_timer(ep); | ||
1378 | |||
1379 | return CPL_RET_BUF_DONE; | ||
1380 | } | ||
1381 | |||
1382 | static int peer_close(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1383 | { | ||
1384 | struct iwch_ep *ep = ctx; | ||
1385 | struct iwch_qp_attributes attrs; | ||
1386 | unsigned long flags; | ||
1387 | int disconnect = 1; | ||
1388 | int release = 0; | ||
1389 | |||
1390 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1391 | dst_confirm(ep->dst); | ||
1392 | |||
1393 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1394 | switch (ep->com.state) { | ||
1395 | case MPA_REQ_WAIT: | ||
1396 | __state_set(&ep->com, CLOSING); | ||
1397 | break; | ||
1398 | case MPA_REQ_SENT: | ||
1399 | __state_set(&ep->com, CLOSING); | ||
1400 | connect_reply_upcall(ep, -ECONNRESET); | ||
1401 | break; | ||
1402 | case MPA_REQ_RCVD: | ||
1403 | |||
1404 | /* | ||
1405 | * We're gonna mark this puppy DEAD, but keep | ||
1406 | * the reference on it until the ULP accepts or | ||
1407 | * rejects the CR. | ||
1408 | */ | ||
1409 | __state_set(&ep->com, CLOSING); | ||
1410 | get_ep(&ep->com); | ||
1411 | break; | ||
1412 | case MPA_REP_SENT: | ||
1413 | __state_set(&ep->com, CLOSING); | ||
1414 | ep->com.rpl_done = 1; | ||
1415 | ep->com.rpl_err = -ECONNRESET; | ||
1416 | PDBG("waking up ep %p\n", ep); | ||
1417 | wake_up(&ep->com.waitq); | ||
1418 | break; | ||
1419 | case FPDU_MODE: | ||
1420 | __state_set(&ep->com, CLOSING); | ||
1421 | attrs.next_state = IWCH_QP_STATE_CLOSING; | ||
1422 | iwch_modify_qp(ep->com.qp->rhp, ep->com.qp, | ||
1423 | IWCH_QP_ATTR_NEXT_STATE, &attrs, 1); | ||
1424 | peer_close_upcall(ep); | ||
1425 | break; | ||
1426 | case ABORTING: | ||
1427 | disconnect = 0; | ||
1428 | break; | ||
1429 | case CLOSING: | ||
1430 | start_ep_timer(ep); | ||
1431 | __state_set(&ep->com, MORIBUND); | ||
1432 | disconnect = 0; | ||
1433 | break; | ||
1434 | case MORIBUND: | ||
1435 | stop_ep_timer(ep); | ||
1436 | if (ep->com.cm_id && ep->com.qp) { | ||
1437 | attrs.next_state = IWCH_QP_STATE_IDLE; | ||
1438 | iwch_modify_qp(ep->com.qp->rhp, ep->com.qp, | ||
1439 | IWCH_QP_ATTR_NEXT_STATE, &attrs, 1); | ||
1440 | } | ||
1441 | close_complete_upcall(ep); | ||
1442 | __state_set(&ep->com, DEAD); | ||
1443 | release = 1; | ||
1444 | disconnect = 0; | ||
1445 | break; | ||
1446 | case DEAD: | ||
1447 | disconnect = 0; | ||
1448 | break; | ||
1449 | default: | ||
1450 | BUG_ON(1); | ||
1451 | } | ||
1452 | spin_unlock_irqrestore(&ep->com.lock, flags); | ||
1453 | if (disconnect) | ||
1454 | iwch_ep_disconnect(ep, 0, GFP_KERNEL); | ||
1455 | if (release) | ||
1456 | release_ep_resources(ep); | ||
1457 | return CPL_RET_BUF_DONE; | ||
1458 | } | ||
1459 | |||
1460 | /* | ||
1461 | * Returns whether an ABORT_REQ_RSS message is a negative advice. | ||
1462 | */ | ||
1463 | static inline int is_neg_adv_abort(unsigned int status) | ||
1464 | { | ||
1465 | return status == CPL_ERR_RTX_NEG_ADVICE || | ||
1466 | status == CPL_ERR_PERSIST_NEG_ADVICE; | ||
1467 | } | ||
1468 | |||
1469 | static int peer_abort(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1470 | { | ||
1471 | struct cpl_abort_req_rss *req = cplhdr(skb); | ||
1472 | struct iwch_ep *ep = ctx; | ||
1473 | struct cpl_abort_rpl *rpl; | ||
1474 | struct sk_buff *rpl_skb; | ||
1475 | struct iwch_qp_attributes attrs; | ||
1476 | int ret; | ||
1477 | int state; | ||
1478 | |||
1479 | if (is_neg_adv_abort(req->status)) { | ||
1480 | PDBG("%s neg_adv_abort ep %p tid %d\n", __FUNCTION__, ep, | ||
1481 | ep->hwtid); | ||
1482 | t3_l2t_send_event(ep->com.tdev, ep->l2t); | ||
1483 | return CPL_RET_BUF_DONE; | ||
1484 | } | ||
1485 | |||
1486 | state = state_read(&ep->com); | ||
1487 | PDBG("%s ep %p state %u\n", __FUNCTION__, ep, state); | ||
1488 | switch (state) { | ||
1489 | case CONNECTING: | ||
1490 | break; | ||
1491 | case MPA_REQ_WAIT: | ||
1492 | break; | ||
1493 | case MPA_REQ_SENT: | ||
1494 | connect_reply_upcall(ep, -ECONNRESET); | ||
1495 | break; | ||
1496 | case MPA_REP_SENT: | ||
1497 | ep->com.rpl_done = 1; | ||
1498 | ep->com.rpl_err = -ECONNRESET; | ||
1499 | PDBG("waking up ep %p\n", ep); | ||
1500 | wake_up(&ep->com.waitq); | ||
1501 | break; | ||
1502 | case MPA_REQ_RCVD: | ||
1503 | |||
1504 | /* | ||
1505 | * We're gonna mark this puppy DEAD, but keep | ||
1506 | * the reference on it until the ULP accepts or | ||
1507 | * rejects the CR. | ||
1508 | */ | ||
1509 | get_ep(&ep->com); | ||
1510 | break; | ||
1511 | case MORIBUND: | ||
1512 | stop_ep_timer(ep); | ||
1513 | case FPDU_MODE: | ||
1514 | case CLOSING: | ||
1515 | if (ep->com.cm_id && ep->com.qp) { | ||
1516 | attrs.next_state = IWCH_QP_STATE_ERROR; | ||
1517 | ret = iwch_modify_qp(ep->com.qp->rhp, | ||
1518 | ep->com.qp, IWCH_QP_ATTR_NEXT_STATE, | ||
1519 | &attrs, 1); | ||
1520 | if (ret) | ||
1521 | printk(KERN_ERR MOD | ||
1522 | "%s - qp <- error failed!\n", | ||
1523 | __FUNCTION__); | ||
1524 | } | ||
1525 | peer_abort_upcall(ep); | ||
1526 | break; | ||
1527 | case ABORTING: | ||
1528 | break; | ||
1529 | case DEAD: | ||
1530 | PDBG("%s PEER_ABORT IN DEAD STATE!!!!\n", __FUNCTION__); | ||
1531 | return CPL_RET_BUF_DONE; | ||
1532 | default: | ||
1533 | BUG_ON(1); | ||
1534 | break; | ||
1535 | } | ||
1536 | dst_confirm(ep->dst); | ||
1537 | |||
1538 | rpl_skb = get_skb(skb, sizeof(*rpl), GFP_KERNEL); | ||
1539 | if (!rpl_skb) { | ||
1540 | printk(KERN_ERR MOD "%s - cannot allocate skb!\n", | ||
1541 | __FUNCTION__); | ||
1542 | dst_release(ep->dst); | ||
1543 | l2t_release(L2DATA(ep->com.tdev), ep->l2t); | ||
1544 | put_ep(&ep->com); | ||
1545 | return CPL_RET_BUF_DONE; | ||
1546 | } | ||
1547 | rpl_skb->priority = CPL_PRIORITY_DATA; | ||
1548 | rpl = (struct cpl_abort_rpl *) skb_put(rpl_skb, sizeof(*rpl)); | ||
1549 | rpl->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL)); | ||
1550 | rpl->wr.wr_lo = htonl(V_WR_TID(ep->hwtid)); | ||
1551 | OPCODE_TID(rpl) = htonl(MK_OPCODE_TID(CPL_ABORT_RPL, ep->hwtid)); | ||
1552 | rpl->cmd = CPL_ABORT_NO_RST; | ||
1553 | ep->com.tdev->send(ep->com.tdev, rpl_skb); | ||
1554 | if (state != ABORTING) { | ||
1555 | state_set(&ep->com, DEAD); | ||
1556 | release_ep_resources(ep); | ||
1557 | } | ||
1558 | return CPL_RET_BUF_DONE; | ||
1559 | } | ||
1560 | |||
1561 | static int close_con_rpl(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1562 | { | ||
1563 | struct iwch_ep *ep = ctx; | ||
1564 | struct iwch_qp_attributes attrs; | ||
1565 | unsigned long flags; | ||
1566 | int release = 0; | ||
1567 | |||
1568 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1569 | BUG_ON(!ep); | ||
1570 | |||
1571 | /* The cm_id may be null if we failed to connect */ | ||
1572 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1573 | switch (ep->com.state) { | ||
1574 | case CLOSING: | ||
1575 | start_ep_timer(ep); | ||
1576 | __state_set(&ep->com, MORIBUND); | ||
1577 | break; | ||
1578 | case MORIBUND: | ||
1579 | stop_ep_timer(ep); | ||
1580 | if ((ep->com.cm_id) && (ep->com.qp)) { | ||
1581 | attrs.next_state = IWCH_QP_STATE_IDLE; | ||
1582 | iwch_modify_qp(ep->com.qp->rhp, | ||
1583 | ep->com.qp, | ||
1584 | IWCH_QP_ATTR_NEXT_STATE, | ||
1585 | &attrs, 1); | ||
1586 | } | ||
1587 | close_complete_upcall(ep); | ||
1588 | __state_set(&ep->com, DEAD); | ||
1589 | release = 1; | ||
1590 | break; | ||
1591 | case DEAD: | ||
1592 | default: | ||
1593 | BUG_ON(1); | ||
1594 | break; | ||
1595 | } | ||
1596 | spin_unlock_irqrestore(&ep->com.lock, flags); | ||
1597 | if (release) | ||
1598 | release_ep_resources(ep); | ||
1599 | return CPL_RET_BUF_DONE; | ||
1600 | } | ||
1601 | |||
1602 | /* | ||
1603 | * T3A does 3 things when a TERM is received: | ||
1604 | * 1) send up a CPL_RDMA_TERMINATE message with the TERM packet | ||
1605 | * 2) generate an async event on the QP with the TERMINATE opcode | ||
1606 | * 3) post a TERMINATE opcde cqe into the associated CQ. | ||
1607 | * | ||
1608 | * For (1), we save the message in the qp for later consumer consumption. | ||
1609 | * For (2), we move the QP into TERMINATE, post a QP event and disconnect. | ||
1610 | * For (3), we toss the CQE in cxio_poll_cq(). | ||
1611 | * | ||
1612 | * terminate() handles case (1)... | ||
1613 | */ | ||
1614 | static int terminate(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1615 | { | ||
1616 | struct iwch_ep *ep = ctx; | ||
1617 | |||
1618 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1619 | skb_pull(skb, sizeof(struct cpl_rdma_terminate)); | ||
1620 | PDBG("%s saving %d bytes of term msg\n", __FUNCTION__, skb->len); | ||
1621 | memcpy(ep->com.qp->attr.terminate_buffer, skb->data, skb->len); | ||
1622 | ep->com.qp->attr.terminate_msg_len = skb->len; | ||
1623 | ep->com.qp->attr.is_terminate_local = 0; | ||
1624 | return CPL_RET_BUF_DONE; | ||
1625 | } | ||
1626 | |||
1627 | static int ec_status(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
1628 | { | ||
1629 | struct cpl_rdma_ec_status *rep = cplhdr(skb); | ||
1630 | struct iwch_ep *ep = ctx; | ||
1631 | |||
1632 | PDBG("%s ep %p tid %u status %d\n", __FUNCTION__, ep, ep->hwtid, | ||
1633 | rep->status); | ||
1634 | if (rep->status) { | ||
1635 | struct iwch_qp_attributes attrs; | ||
1636 | |||
1637 | printk(KERN_ERR MOD "%s BAD CLOSE - Aborting tid %u\n", | ||
1638 | __FUNCTION__, ep->hwtid); | ||
1639 | attrs.next_state = IWCH_QP_STATE_ERROR; | ||
1640 | iwch_modify_qp(ep->com.qp->rhp, | ||
1641 | ep->com.qp, IWCH_QP_ATTR_NEXT_STATE, | ||
1642 | &attrs, 1); | ||
1643 | abort_connection(ep, NULL, GFP_KERNEL); | ||
1644 | } | ||
1645 | return CPL_RET_BUF_DONE; | ||
1646 | } | ||
1647 | |||
1648 | static void ep_timeout(unsigned long arg) | ||
1649 | { | ||
1650 | struct iwch_ep *ep = (struct iwch_ep *)arg; | ||
1651 | struct iwch_qp_attributes attrs; | ||
1652 | unsigned long flags; | ||
1653 | |||
1654 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1655 | PDBG("%s ep %p tid %u state %d\n", __FUNCTION__, ep, ep->hwtid, | ||
1656 | ep->com.state); | ||
1657 | switch (ep->com.state) { | ||
1658 | case MPA_REQ_SENT: | ||
1659 | connect_reply_upcall(ep, -ETIMEDOUT); | ||
1660 | break; | ||
1661 | case MPA_REQ_WAIT: | ||
1662 | break; | ||
1663 | case MORIBUND: | ||
1664 | if (ep->com.cm_id && ep->com.qp) { | ||
1665 | attrs.next_state = IWCH_QP_STATE_ERROR; | ||
1666 | iwch_modify_qp(ep->com.qp->rhp, | ||
1667 | ep->com.qp, IWCH_QP_ATTR_NEXT_STATE, | ||
1668 | &attrs, 1); | ||
1669 | } | ||
1670 | break; | ||
1671 | default: | ||
1672 | BUG(); | ||
1673 | } | ||
1674 | __state_set(&ep->com, CLOSING); | ||
1675 | spin_unlock_irqrestore(&ep->com.lock, flags); | ||
1676 | abort_connection(ep, NULL, GFP_ATOMIC); | ||
1677 | put_ep(&ep->com); | ||
1678 | } | ||
1679 | |||
1680 | int iwch_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len) | ||
1681 | { | ||
1682 | int err; | ||
1683 | struct iwch_ep *ep = to_ep(cm_id); | ||
1684 | PDBG("%s ep %p tid %u\n", __FUNCTION__, ep, ep->hwtid); | ||
1685 | |||
1686 | if (state_read(&ep->com) == DEAD) { | ||
1687 | put_ep(&ep->com); | ||
1688 | return -ECONNRESET; | ||
1689 | } | ||
1690 | BUG_ON(state_read(&ep->com) != MPA_REQ_RCVD); | ||
1691 | state_set(&ep->com, CLOSING); | ||
1692 | if (mpa_rev == 0) | ||
1693 | abort_connection(ep, NULL, GFP_KERNEL); | ||
1694 | else { | ||
1695 | err = send_mpa_reject(ep, pdata, pdata_len); | ||
1696 | err = send_halfclose(ep, GFP_KERNEL); | ||
1697 | } | ||
1698 | return 0; | ||
1699 | } | ||
1700 | |||
1701 | int iwch_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) | ||
1702 | { | ||
1703 | int err; | ||
1704 | struct iwch_qp_attributes attrs; | ||
1705 | enum iwch_qp_attr_mask mask; | ||
1706 | struct iwch_ep *ep = to_ep(cm_id); | ||
1707 | struct iwch_dev *h = to_iwch_dev(cm_id->device); | ||
1708 | struct iwch_qp *qp = get_qhp(h, conn_param->qpn); | ||
1709 | |||
1710 | PDBG("%s ep %p tid %u\n", __FUNCTION__, ep, ep->hwtid); | ||
1711 | if (state_read(&ep->com) == DEAD) { | ||
1712 | put_ep(&ep->com); | ||
1713 | return -ECONNRESET; | ||
1714 | } | ||
1715 | |||
1716 | BUG_ON(state_read(&ep->com) != MPA_REQ_RCVD); | ||
1717 | BUG_ON(!qp); | ||
1718 | |||
1719 | if ((conn_param->ord > qp->rhp->attr.max_rdma_read_qp_depth) || | ||
1720 | (conn_param->ird > qp->rhp->attr.max_rdma_reads_per_qp)) { | ||
1721 | abort_connection(ep, NULL, GFP_KERNEL); | ||
1722 | return -EINVAL; | ||
1723 | } | ||
1724 | |||
1725 | cm_id->add_ref(cm_id); | ||
1726 | ep->com.cm_id = cm_id; | ||
1727 | ep->com.qp = qp; | ||
1728 | |||
1729 | ep->com.rpl_done = 0; | ||
1730 | ep->com.rpl_err = 0; | ||
1731 | ep->ird = conn_param->ird; | ||
1732 | ep->ord = conn_param->ord; | ||
1733 | PDBG("%s %d ird %d ord %d\n", __FUNCTION__, __LINE__, ep->ird, ep->ord); | ||
1734 | get_ep(&ep->com); | ||
1735 | err = send_mpa_reply(ep, conn_param->private_data, | ||
1736 | conn_param->private_data_len); | ||
1737 | if (err) { | ||
1738 | ep->com.cm_id = NULL; | ||
1739 | ep->com.qp = NULL; | ||
1740 | cm_id->rem_ref(cm_id); | ||
1741 | abort_connection(ep, NULL, GFP_KERNEL); | ||
1742 | put_ep(&ep->com); | ||
1743 | return err; | ||
1744 | } | ||
1745 | |||
1746 | /* bind QP to EP and move to RTS */ | ||
1747 | attrs.mpa_attr = ep->mpa_attr; | ||
1748 | attrs.max_ird = ep->ord; | ||
1749 | attrs.max_ord = ep->ord; | ||
1750 | attrs.llp_stream_handle = ep; | ||
1751 | attrs.next_state = IWCH_QP_STATE_RTS; | ||
1752 | |||
1753 | /* bind QP and TID with INIT_WR */ | ||
1754 | mask = IWCH_QP_ATTR_NEXT_STATE | | ||
1755 | IWCH_QP_ATTR_LLP_STREAM_HANDLE | | ||
1756 | IWCH_QP_ATTR_MPA_ATTR | | ||
1757 | IWCH_QP_ATTR_MAX_IRD | | ||
1758 | IWCH_QP_ATTR_MAX_ORD; | ||
1759 | |||
1760 | err = iwch_modify_qp(ep->com.qp->rhp, | ||
1761 | ep->com.qp, mask, &attrs, 1); | ||
1762 | |||
1763 | if (err) { | ||
1764 | ep->com.cm_id = NULL; | ||
1765 | ep->com.qp = NULL; | ||
1766 | cm_id->rem_ref(cm_id); | ||
1767 | abort_connection(ep, NULL, GFP_KERNEL); | ||
1768 | } else { | ||
1769 | state_set(&ep->com, FPDU_MODE); | ||
1770 | established_upcall(ep); | ||
1771 | } | ||
1772 | put_ep(&ep->com); | ||
1773 | return err; | ||
1774 | } | ||
1775 | |||
1776 | int iwch_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) | ||
1777 | { | ||
1778 | int err = 0; | ||
1779 | struct iwch_dev *h = to_iwch_dev(cm_id->device); | ||
1780 | struct iwch_ep *ep; | ||
1781 | struct rtable *rt; | ||
1782 | |||
1783 | ep = alloc_ep(sizeof(*ep), GFP_KERNEL); | ||
1784 | if (!ep) { | ||
1785 | printk(KERN_ERR MOD "%s - cannot alloc ep.\n", __FUNCTION__); | ||
1786 | err = -ENOMEM; | ||
1787 | goto out; | ||
1788 | } | ||
1789 | init_timer(&ep->timer); | ||
1790 | ep->plen = conn_param->private_data_len; | ||
1791 | if (ep->plen) | ||
1792 | memcpy(ep->mpa_pkt + sizeof(struct mpa_message), | ||
1793 | conn_param->private_data, ep->plen); | ||
1794 | ep->ird = conn_param->ird; | ||
1795 | ep->ord = conn_param->ord; | ||
1796 | ep->com.tdev = h->rdev.t3cdev_p; | ||
1797 | |||
1798 | cm_id->add_ref(cm_id); | ||
1799 | ep->com.cm_id = cm_id; | ||
1800 | ep->com.qp = get_qhp(h, conn_param->qpn); | ||
1801 | BUG_ON(!ep->com.qp); | ||
1802 | PDBG("%s qpn 0x%x qp %p cm_id %p\n", __FUNCTION__, conn_param->qpn, | ||
1803 | ep->com.qp, cm_id); | ||
1804 | |||
1805 | /* | ||
1806 | * Allocate an active TID to initiate a TCP connection. | ||
1807 | */ | ||
1808 | ep->atid = cxgb3_alloc_atid(h->rdev.t3cdev_p, &t3c_client, ep); | ||
1809 | if (ep->atid == -1) { | ||
1810 | printk(KERN_ERR MOD "%s - cannot alloc atid.\n", __FUNCTION__); | ||
1811 | err = -ENOMEM; | ||
1812 | goto fail2; | ||
1813 | } | ||
1814 | |||
1815 | /* find a route */ | ||
1816 | rt = find_route(h->rdev.t3cdev_p, | ||
1817 | cm_id->local_addr.sin_addr.s_addr, | ||
1818 | cm_id->remote_addr.sin_addr.s_addr, | ||
1819 | cm_id->local_addr.sin_port, | ||
1820 | cm_id->remote_addr.sin_port, IPTOS_LOWDELAY); | ||
1821 | if (!rt) { | ||
1822 | printk(KERN_ERR MOD "%s - cannot find route.\n", __FUNCTION__); | ||
1823 | err = -EHOSTUNREACH; | ||
1824 | goto fail3; | ||
1825 | } | ||
1826 | ep->dst = &rt->u.dst; | ||
1827 | |||
1828 | /* get a l2t entry */ | ||
1829 | ep->l2t = t3_l2t_get(ep->com.tdev, ep->dst->neighbour, | ||
1830 | ep->dst->neighbour->dev); | ||
1831 | if (!ep->l2t) { | ||
1832 | printk(KERN_ERR MOD "%s - cannot alloc l2e.\n", __FUNCTION__); | ||
1833 | err = -ENOMEM; | ||
1834 | goto fail4; | ||
1835 | } | ||
1836 | |||
1837 | state_set(&ep->com, CONNECTING); | ||
1838 | ep->tos = IPTOS_LOWDELAY; | ||
1839 | ep->com.local_addr = cm_id->local_addr; | ||
1840 | ep->com.remote_addr = cm_id->remote_addr; | ||
1841 | |||
1842 | /* send connect request to rnic */ | ||
1843 | err = send_connect(ep); | ||
1844 | if (!err) | ||
1845 | goto out; | ||
1846 | |||
1847 | l2t_release(L2DATA(h->rdev.t3cdev_p), ep->l2t); | ||
1848 | fail4: | ||
1849 | dst_release(ep->dst); | ||
1850 | fail3: | ||
1851 | cxgb3_free_atid(ep->com.tdev, ep->atid); | ||
1852 | fail2: | ||
1853 | put_ep(&ep->com); | ||
1854 | out: | ||
1855 | return err; | ||
1856 | } | ||
1857 | |||
1858 | int iwch_create_listen(struct iw_cm_id *cm_id, int backlog) | ||
1859 | { | ||
1860 | int err = 0; | ||
1861 | struct iwch_dev *h = to_iwch_dev(cm_id->device); | ||
1862 | struct iwch_listen_ep *ep; | ||
1863 | |||
1864 | |||
1865 | might_sleep(); | ||
1866 | |||
1867 | ep = alloc_ep(sizeof(*ep), GFP_KERNEL); | ||
1868 | if (!ep) { | ||
1869 | printk(KERN_ERR MOD "%s - cannot alloc ep.\n", __FUNCTION__); | ||
1870 | err = -ENOMEM; | ||
1871 | goto fail1; | ||
1872 | } | ||
1873 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1874 | ep->com.tdev = h->rdev.t3cdev_p; | ||
1875 | cm_id->add_ref(cm_id); | ||
1876 | ep->com.cm_id = cm_id; | ||
1877 | ep->backlog = backlog; | ||
1878 | ep->com.local_addr = cm_id->local_addr; | ||
1879 | |||
1880 | /* | ||
1881 | * Allocate a server TID. | ||
1882 | */ | ||
1883 | ep->stid = cxgb3_alloc_stid(h->rdev.t3cdev_p, &t3c_client, ep); | ||
1884 | if (ep->stid == -1) { | ||
1885 | printk(KERN_ERR MOD "%s - cannot alloc atid.\n", __FUNCTION__); | ||
1886 | err = -ENOMEM; | ||
1887 | goto fail2; | ||
1888 | } | ||
1889 | |||
1890 | state_set(&ep->com, LISTEN); | ||
1891 | err = listen_start(ep); | ||
1892 | if (err) | ||
1893 | goto fail3; | ||
1894 | |||
1895 | /* wait for pass_open_rpl */ | ||
1896 | wait_event(ep->com.waitq, ep->com.rpl_done); | ||
1897 | err = ep->com.rpl_err; | ||
1898 | if (!err) { | ||
1899 | cm_id->provider_data = ep; | ||
1900 | goto out; | ||
1901 | } | ||
1902 | fail3: | ||
1903 | cxgb3_free_stid(ep->com.tdev, ep->stid); | ||
1904 | fail2: | ||
1905 | put_ep(&ep->com); | ||
1906 | fail1: | ||
1907 | out: | ||
1908 | return err; | ||
1909 | } | ||
1910 | |||
1911 | int iwch_destroy_listen(struct iw_cm_id *cm_id) | ||
1912 | { | ||
1913 | int err; | ||
1914 | struct iwch_listen_ep *ep = to_listen_ep(cm_id); | ||
1915 | |||
1916 | PDBG("%s ep %p\n", __FUNCTION__, ep); | ||
1917 | |||
1918 | might_sleep(); | ||
1919 | state_set(&ep->com, DEAD); | ||
1920 | ep->com.rpl_done = 0; | ||
1921 | ep->com.rpl_err = 0; | ||
1922 | err = listen_stop(ep); | ||
1923 | wait_event(ep->com.waitq, ep->com.rpl_done); | ||
1924 | cxgb3_free_stid(ep->com.tdev, ep->stid); | ||
1925 | err = ep->com.rpl_err; | ||
1926 | cm_id->rem_ref(cm_id); | ||
1927 | put_ep(&ep->com); | ||
1928 | return err; | ||
1929 | } | ||
1930 | |||
1931 | int iwch_ep_disconnect(struct iwch_ep *ep, int abrupt, gfp_t gfp) | ||
1932 | { | ||
1933 | int ret=0; | ||
1934 | unsigned long flags; | ||
1935 | int close = 0; | ||
1936 | |||
1937 | spin_lock_irqsave(&ep->com.lock, flags); | ||
1938 | |||
1939 | PDBG("%s ep %p state %s, abrupt %d\n", __FUNCTION__, ep, | ||
1940 | states[ep->com.state], abrupt); | ||
1941 | |||
1942 | if (ep->com.state == DEAD) { | ||
1943 | PDBG("%s already dead ep %p\n", __FUNCTION__, ep); | ||
1944 | goto out; | ||
1945 | } | ||
1946 | |||
1947 | if (abrupt) { | ||
1948 | if (ep->com.state != ABORTING) { | ||
1949 | ep->com.state = ABORTING; | ||
1950 | close = 1; | ||
1951 | } | ||
1952 | goto out; | ||
1953 | } | ||
1954 | |||
1955 | switch (ep->com.state) { | ||
1956 | case MPA_REQ_WAIT: | ||
1957 | case MPA_REQ_SENT: | ||
1958 | case MPA_REQ_RCVD: | ||
1959 | case MPA_REP_SENT: | ||
1960 | case FPDU_MODE: | ||
1961 | ep->com.state = CLOSING; | ||
1962 | close = 1; | ||
1963 | break; | ||
1964 | case CLOSING: | ||
1965 | start_ep_timer(ep); | ||
1966 | ep->com.state = MORIBUND; | ||
1967 | close = 1; | ||
1968 | break; | ||
1969 | case MORIBUND: | ||
1970 | break; | ||
1971 | default: | ||
1972 | BUG(); | ||
1973 | break; | ||
1974 | } | ||
1975 | out: | ||
1976 | spin_unlock_irqrestore(&ep->com.lock, flags); | ||
1977 | if (close) { | ||
1978 | if (abrupt) | ||
1979 | ret = send_abort(ep, NULL, gfp); | ||
1980 | else | ||
1981 | ret = send_halfclose(ep, gfp); | ||
1982 | } | ||
1983 | return ret; | ||
1984 | } | ||
1985 | |||
1986 | int iwch_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new, | ||
1987 | struct l2t_entry *l2t) | ||
1988 | { | ||
1989 | struct iwch_ep *ep = ctx; | ||
1990 | |||
1991 | if (ep->dst != old) | ||
1992 | return 0; | ||
1993 | |||
1994 | PDBG("%s ep %p redirect to dst %p l2t %p\n", __FUNCTION__, ep, new, | ||
1995 | l2t); | ||
1996 | dst_hold(new); | ||
1997 | l2t_release(L2DATA(ep->com.tdev), ep->l2t); | ||
1998 | ep->l2t = l2t; | ||
1999 | dst_release(old); | ||
2000 | ep->dst = new; | ||
2001 | return 1; | ||
2002 | } | ||
2003 | |||
2004 | /* | ||
2005 | * All the CM events are handled on a work queue to have a safe context. | ||
2006 | */ | ||
2007 | static int sched(struct t3cdev *tdev, struct sk_buff *skb, void *ctx) | ||
2008 | { | ||
2009 | struct iwch_ep_common *epc = ctx; | ||
2010 | |||
2011 | get_ep(epc); | ||
2012 | |||
2013 | /* | ||
2014 | * Save ctx and tdev in the skb->cb area. | ||
2015 | */ | ||
2016 | *((void **) skb->cb) = ctx; | ||
2017 | *((struct t3cdev **) (skb->cb + sizeof(void *))) = tdev; | ||
2018 | |||
2019 | /* | ||
2020 | * Queue the skb and schedule the worker thread. | ||
2021 | */ | ||
2022 | skb_queue_tail(&rxq, skb); | ||
2023 | queue_work(workq, &skb_work); | ||
2024 | return 0; | ||
2025 | } | ||
2026 | |||
2027 | int __init iwch_cm_init(void) | ||
2028 | { | ||
2029 | skb_queue_head_init(&rxq); | ||
2030 | |||
2031 | workq = create_singlethread_workqueue("iw_cxgb3"); | ||
2032 | if (!workq) | ||
2033 | return -ENOMEM; | ||
2034 | |||
2035 | /* | ||
2036 | * All upcalls from the T3 Core go to sched() to | ||
2037 | * schedule the processing on a work queue. | ||
2038 | */ | ||
2039 | t3c_handlers[CPL_ACT_ESTABLISH] = sched; | ||
2040 | t3c_handlers[CPL_ACT_OPEN_RPL] = sched; | ||
2041 | t3c_handlers[CPL_RX_DATA] = sched; | ||
2042 | t3c_handlers[CPL_TX_DMA_ACK] = sched; | ||
2043 | t3c_handlers[CPL_ABORT_RPL_RSS] = sched; | ||
2044 | t3c_handlers[CPL_ABORT_RPL] = sched; | ||
2045 | t3c_handlers[CPL_PASS_OPEN_RPL] = sched; | ||
2046 | t3c_handlers[CPL_CLOSE_LISTSRV_RPL] = sched; | ||
2047 | t3c_handlers[CPL_PASS_ACCEPT_REQ] = sched; | ||
2048 | t3c_handlers[CPL_PASS_ESTABLISH] = sched; | ||
2049 | t3c_handlers[CPL_PEER_CLOSE] = sched; | ||
2050 | t3c_handlers[CPL_CLOSE_CON_RPL] = sched; | ||
2051 | t3c_handlers[CPL_ABORT_REQ_RSS] = sched; | ||
2052 | t3c_handlers[CPL_RDMA_TERMINATE] = sched; | ||
2053 | t3c_handlers[CPL_RDMA_EC_STATUS] = sched; | ||
2054 | |||
2055 | /* | ||
2056 | * These are the real handlers that are called from a | ||
2057 | * work queue. | ||
2058 | */ | ||
2059 | work_handlers[CPL_ACT_ESTABLISH] = act_establish; | ||
2060 | work_handlers[CPL_ACT_OPEN_RPL] = act_open_rpl; | ||
2061 | work_handlers[CPL_RX_DATA] = rx_data; | ||
2062 | work_handlers[CPL_TX_DMA_ACK] = tx_ack; | ||
2063 | work_handlers[CPL_ABORT_RPL_RSS] = abort_rpl; | ||
2064 | work_handlers[CPL_ABORT_RPL] = abort_rpl; | ||
2065 | work_handlers[CPL_PASS_OPEN_RPL] = pass_open_rpl; | ||
2066 | work_handlers[CPL_CLOSE_LISTSRV_RPL] = close_listsrv_rpl; | ||
2067 | work_handlers[CPL_PASS_ACCEPT_REQ] = pass_accept_req; | ||
2068 | work_handlers[CPL_PASS_ESTABLISH] = pass_establish; | ||
2069 | work_handlers[CPL_PEER_CLOSE] = peer_close; | ||
2070 | work_handlers[CPL_ABORT_REQ_RSS] = peer_abort; | ||
2071 | work_handlers[CPL_CLOSE_CON_RPL] = close_con_rpl; | ||
2072 | work_handlers[CPL_RDMA_TERMINATE] = terminate; | ||
2073 | work_handlers[CPL_RDMA_EC_STATUS] = ec_status; | ||
2074 | return 0; | ||
2075 | } | ||
2076 | |||
2077 | void __exit iwch_cm_term(void) | ||
2078 | { | ||
2079 | flush_workqueue(workq); | ||
2080 | destroy_workqueue(workq); | ||
2081 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.h b/drivers/infiniband/hw/cxgb3/iwch_cm.h new file mode 100644 index 000000000000..7c810d904279 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_cm.h | |||
@@ -0,0 +1,223 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef _IWCH_CM_H_ | ||
34 | #define _IWCH_CM_H_ | ||
35 | |||
36 | #include <linux/inet.h> | ||
37 | #include <linux/wait.h> | ||
38 | #include <linux/spinlock.h> | ||
39 | #include <linux/kref.h> | ||
40 | |||
41 | #include <rdma/ib_verbs.h> | ||
42 | #include <rdma/iw_cm.h> | ||
43 | |||
44 | #include "cxgb3_offload.h" | ||
45 | #include "iwch_provider.h" | ||
46 | |||
47 | #define MPA_KEY_REQ "MPA ID Req Frame" | ||
48 | #define MPA_KEY_REP "MPA ID Rep Frame" | ||
49 | |||
50 | #define MPA_MAX_PRIVATE_DATA 256 | ||
51 | #define MPA_REV 0 /* XXX - amso1100 uses rev 0 ! */ | ||
52 | #define MPA_REJECT 0x20 | ||
53 | #define MPA_CRC 0x40 | ||
54 | #define MPA_MARKERS 0x80 | ||
55 | #define MPA_FLAGS_MASK 0xE0 | ||
56 | |||
57 | #define put_ep(ep) { \ | ||
58 | PDBG("put_ep (via %s:%u) ep %p refcnt %d\n", __FUNCTION__, __LINE__, \ | ||
59 | ep, atomic_read(&((ep)->kref.refcount))); \ | ||
60 | kref_put(&((ep)->kref), __free_ep); \ | ||
61 | } | ||
62 | |||
63 | #define get_ep(ep) { \ | ||
64 | PDBG("get_ep (via %s:%u) ep %p, refcnt %d\n", __FUNCTION__, __LINE__, \ | ||
65 | ep, atomic_read(&((ep)->kref.refcount))); \ | ||
66 | kref_get(&((ep)->kref)); \ | ||
67 | } | ||
68 | |||
69 | struct mpa_message { | ||
70 | u8 key[16]; | ||
71 | u8 flags; | ||
72 | u8 revision; | ||
73 | __be16 private_data_size; | ||
74 | u8 private_data[0]; | ||
75 | }; | ||
76 | |||
77 | struct terminate_message { | ||
78 | u8 layer_etype; | ||
79 | u8 ecode; | ||
80 | __be16 hdrct_rsvd; | ||
81 | u8 len_hdrs[0]; | ||
82 | }; | ||
83 | |||
84 | #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28) | ||
85 | |||
86 | enum iwch_layers_types { | ||
87 | LAYER_RDMAP = 0x00, | ||
88 | LAYER_DDP = 0x10, | ||
89 | LAYER_MPA = 0x20, | ||
90 | RDMAP_LOCAL_CATA = 0x00, | ||
91 | RDMAP_REMOTE_PROT = 0x01, | ||
92 | RDMAP_REMOTE_OP = 0x02, | ||
93 | DDP_LOCAL_CATA = 0x00, | ||
94 | DDP_TAGGED_ERR = 0x01, | ||
95 | DDP_UNTAGGED_ERR = 0x02, | ||
96 | DDP_LLP = 0x03 | ||
97 | }; | ||
98 | |||
99 | enum iwch_rdma_ecodes { | ||
100 | RDMAP_INV_STAG = 0x00, | ||
101 | RDMAP_BASE_BOUNDS = 0x01, | ||
102 | RDMAP_ACC_VIOL = 0x02, | ||
103 | RDMAP_STAG_NOT_ASSOC = 0x03, | ||
104 | RDMAP_TO_WRAP = 0x04, | ||
105 | RDMAP_INV_VERS = 0x05, | ||
106 | RDMAP_INV_OPCODE = 0x06, | ||
107 | RDMAP_STREAM_CATA = 0x07, | ||
108 | RDMAP_GLOBAL_CATA = 0x08, | ||
109 | RDMAP_CANT_INV_STAG = 0x09, | ||
110 | RDMAP_UNSPECIFIED = 0xff | ||
111 | }; | ||
112 | |||
113 | enum iwch_ddp_ecodes { | ||
114 | DDPT_INV_STAG = 0x00, | ||
115 | DDPT_BASE_BOUNDS = 0x01, | ||
116 | DDPT_STAG_NOT_ASSOC = 0x02, | ||
117 | DDPT_TO_WRAP = 0x03, | ||
118 | DDPT_INV_VERS = 0x04, | ||
119 | DDPU_INV_QN = 0x01, | ||
120 | DDPU_INV_MSN_NOBUF = 0x02, | ||
121 | DDPU_INV_MSN_RANGE = 0x03, | ||
122 | DDPU_INV_MO = 0x04, | ||
123 | DDPU_MSG_TOOBIG = 0x05, | ||
124 | DDPU_INV_VERS = 0x06 | ||
125 | }; | ||
126 | |||
127 | enum iwch_mpa_ecodes { | ||
128 | MPA_CRC_ERR = 0x02, | ||
129 | MPA_MARKER_ERR = 0x03 | ||
130 | }; | ||
131 | |||
132 | enum iwch_ep_state { | ||
133 | IDLE = 0, | ||
134 | LISTEN, | ||
135 | CONNECTING, | ||
136 | MPA_REQ_WAIT, | ||
137 | MPA_REQ_SENT, | ||
138 | MPA_REQ_RCVD, | ||
139 | MPA_REP_SENT, | ||
140 | FPDU_MODE, | ||
141 | ABORTING, | ||
142 | CLOSING, | ||
143 | MORIBUND, | ||
144 | DEAD, | ||
145 | }; | ||
146 | |||
147 | struct iwch_ep_common { | ||
148 | struct iw_cm_id *cm_id; | ||
149 | struct iwch_qp *qp; | ||
150 | struct t3cdev *tdev; | ||
151 | enum iwch_ep_state state; | ||
152 | struct kref kref; | ||
153 | spinlock_t lock; | ||
154 | struct sockaddr_in local_addr; | ||
155 | struct sockaddr_in remote_addr; | ||
156 | wait_queue_head_t waitq; | ||
157 | int rpl_done; | ||
158 | int rpl_err; | ||
159 | }; | ||
160 | |||
161 | struct iwch_listen_ep { | ||
162 | struct iwch_ep_common com; | ||
163 | unsigned int stid; | ||
164 | int backlog; | ||
165 | }; | ||
166 | |||
167 | struct iwch_ep { | ||
168 | struct iwch_ep_common com; | ||
169 | struct iwch_ep *parent_ep; | ||
170 | struct timer_list timer; | ||
171 | unsigned int atid; | ||
172 | u32 hwtid; | ||
173 | u32 snd_seq; | ||
174 | struct l2t_entry *l2t; | ||
175 | struct dst_entry *dst; | ||
176 | struct sk_buff *mpa_skb; | ||
177 | struct iwch_mpa_attributes mpa_attr; | ||
178 | unsigned int mpa_pkt_len; | ||
179 | u8 mpa_pkt[sizeof(struct mpa_message) + MPA_MAX_PRIVATE_DATA]; | ||
180 | u8 tos; | ||
181 | u16 emss; | ||
182 | u16 plen; | ||
183 | u32 ird; | ||
184 | u32 ord; | ||
185 | }; | ||
186 | |||
187 | static inline struct iwch_ep *to_ep(struct iw_cm_id *cm_id) | ||
188 | { | ||
189 | return cm_id->provider_data; | ||
190 | } | ||
191 | |||
192 | static inline struct iwch_listen_ep *to_listen_ep(struct iw_cm_id *cm_id) | ||
193 | { | ||
194 | return cm_id->provider_data; | ||
195 | } | ||
196 | |||
197 | static inline int compute_wscale(int win) | ||
198 | { | ||
199 | int wscale = 0; | ||
200 | |||
201 | while (wscale < 14 && (65535<<wscale) < win) | ||
202 | wscale++; | ||
203 | return wscale; | ||
204 | } | ||
205 | |||
206 | /* CM prototypes */ | ||
207 | |||
208 | int iwch_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param); | ||
209 | int iwch_create_listen(struct iw_cm_id *cm_id, int backlog); | ||
210 | int iwch_destroy_listen(struct iw_cm_id *cm_id); | ||
211 | int iwch_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len); | ||
212 | int iwch_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param); | ||
213 | int iwch_ep_disconnect(struct iwch_ep *ep, int abrupt, gfp_t gfp); | ||
214 | int iwch_quiesce_tid(struct iwch_ep *ep); | ||
215 | int iwch_resume_tid(struct iwch_ep *ep); | ||
216 | void __free_ep(struct kref *kref); | ||
217 | void iwch_rearp(struct iwch_ep *ep); | ||
218 | int iwch_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new, struct l2t_entry *l2t); | ||
219 | |||
220 | int __init iwch_cm_init(void); | ||
221 | void __exit iwch_cm_term(void); | ||
222 | |||
223 | #endif /* _IWCH_CM_H_ */ | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cq.c b/drivers/infiniband/hw/cxgb3/iwch_cq.c new file mode 100644 index 000000000000..98b3bdb5de9e --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_cq.c | |||
@@ -0,0 +1,225 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include "iwch_provider.h" | ||
34 | #include "iwch.h" | ||
35 | |||
36 | /* | ||
37 | * Get one cq entry from cxio and map it to openib. | ||
38 | * | ||
39 | * Returns: | ||
40 | * 0 EMPTY; | ||
41 | * 1 cqe returned | ||
42 | * -EAGAIN caller must try again | ||
43 | * any other -errno fatal error | ||
44 | */ | ||
45 | static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | ||
46 | struct ib_wc *wc) | ||
47 | { | ||
48 | struct iwch_qp *qhp = NULL; | ||
49 | struct t3_cqe cqe, *rd_cqe; | ||
50 | struct t3_wq *wq; | ||
51 | u32 credit = 0; | ||
52 | u8 cqe_flushed; | ||
53 | u64 cookie; | ||
54 | int ret = 1; | ||
55 | |||
56 | rd_cqe = cxio_next_cqe(&chp->cq); | ||
57 | |||
58 | if (!rd_cqe) | ||
59 | return 0; | ||
60 | |||
61 | qhp = get_qhp(rhp, CQE_QPID(*rd_cqe)); | ||
62 | if (!qhp) | ||
63 | wq = NULL; | ||
64 | else { | ||
65 | spin_lock(&qhp->lock); | ||
66 | wq = &(qhp->wq); | ||
67 | } | ||
68 | ret = cxio_poll_cq(wq, &(chp->cq), &cqe, &cqe_flushed, &cookie, | ||
69 | &credit); | ||
70 | if (t3a_device(chp->rhp) && credit) { | ||
71 | PDBG("%s updating %d cq credits on id %d\n", __FUNCTION__, | ||
72 | credit, chp->cq.cqid); | ||
73 | cxio_hal_cq_op(&rhp->rdev, &chp->cq, CQ_CREDIT_UPDATE, credit); | ||
74 | } | ||
75 | |||
76 | if (ret) { | ||
77 | ret = -EAGAIN; | ||
78 | goto out; | ||
79 | } | ||
80 | ret = 1; | ||
81 | |||
82 | wc->wr_id = cookie; | ||
83 | wc->qp = &qhp->ibqp; | ||
84 | wc->vendor_err = CQE_STATUS(cqe); | ||
85 | |||
86 | PDBG("%s qpid 0x%x type %d opcode %d status 0x%x wrid hi 0x%x " | ||
87 | "lo 0x%x cookie 0x%llx\n", __FUNCTION__, | ||
88 | CQE_QPID(cqe), CQE_TYPE(cqe), | ||
89 | CQE_OPCODE(cqe), CQE_STATUS(cqe), CQE_WRID_HI(cqe), | ||
90 | CQE_WRID_LOW(cqe), (unsigned long long) cookie); | ||
91 | |||
92 | if (CQE_TYPE(cqe) == 0) { | ||
93 | if (!CQE_STATUS(cqe)) | ||
94 | wc->byte_len = CQE_LEN(cqe); | ||
95 | else | ||
96 | wc->byte_len = 0; | ||
97 | wc->opcode = IB_WC_RECV; | ||
98 | } else { | ||
99 | switch (CQE_OPCODE(cqe)) { | ||
100 | case T3_RDMA_WRITE: | ||
101 | wc->opcode = IB_WC_RDMA_WRITE; | ||
102 | break; | ||
103 | case T3_READ_REQ: | ||
104 | wc->opcode = IB_WC_RDMA_READ; | ||
105 | wc->byte_len = CQE_LEN(cqe); | ||
106 | break; | ||
107 | case T3_SEND: | ||
108 | case T3_SEND_WITH_SE: | ||
109 | wc->opcode = IB_WC_SEND; | ||
110 | break; | ||
111 | case T3_BIND_MW: | ||
112 | wc->opcode = IB_WC_BIND_MW; | ||
113 | break; | ||
114 | |||
115 | /* these aren't supported yet */ | ||
116 | case T3_SEND_WITH_INV: | ||
117 | case T3_SEND_WITH_SE_INV: | ||
118 | case T3_LOCAL_INV: | ||
119 | case T3_FAST_REGISTER: | ||
120 | default: | ||
121 | printk(KERN_ERR MOD "Unexpected opcode %d " | ||
122 | "in the CQE received for QPID=0x%0x\n", | ||
123 | CQE_OPCODE(cqe), CQE_QPID(cqe)); | ||
124 | ret = -EINVAL; | ||
125 | goto out; | ||
126 | } | ||
127 | } | ||
128 | |||
129 | if (cqe_flushed) | ||
130 | wc->status = IB_WC_WR_FLUSH_ERR; | ||
131 | else { | ||
132 | |||
133 | switch (CQE_STATUS(cqe)) { | ||
134 | case TPT_ERR_SUCCESS: | ||
135 | wc->status = IB_WC_SUCCESS; | ||
136 | break; | ||
137 | case TPT_ERR_STAG: | ||
138 | wc->status = IB_WC_LOC_ACCESS_ERR; | ||
139 | break; | ||
140 | case TPT_ERR_PDID: | ||
141 | wc->status = IB_WC_LOC_PROT_ERR; | ||
142 | break; | ||
143 | case TPT_ERR_QPID: | ||
144 | case TPT_ERR_ACCESS: | ||
145 | wc->status = IB_WC_LOC_ACCESS_ERR; | ||
146 | break; | ||
147 | case TPT_ERR_WRAP: | ||
148 | wc->status = IB_WC_GENERAL_ERR; | ||
149 | break; | ||
150 | case TPT_ERR_BOUND: | ||
151 | wc->status = IB_WC_LOC_LEN_ERR; | ||
152 | break; | ||
153 | case TPT_ERR_INVALIDATE_SHARED_MR: | ||
154 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: | ||
155 | wc->status = IB_WC_MW_BIND_ERR; | ||
156 | break; | ||
157 | case TPT_ERR_CRC: | ||
158 | case TPT_ERR_MARKER: | ||
159 | case TPT_ERR_PDU_LEN_ERR: | ||
160 | case TPT_ERR_OUT_OF_RQE: | ||
161 | case TPT_ERR_DDP_VERSION: | ||
162 | case TPT_ERR_RDMA_VERSION: | ||
163 | case TPT_ERR_DDP_QUEUE_NUM: | ||
164 | case TPT_ERR_MSN: | ||
165 | case TPT_ERR_TBIT: | ||
166 | case TPT_ERR_MO: | ||
167 | case TPT_ERR_MSN_RANGE: | ||
168 | case TPT_ERR_IRD_OVERFLOW: | ||
169 | case TPT_ERR_OPCODE: | ||
170 | wc->status = IB_WC_FATAL_ERR; | ||
171 | break; | ||
172 | case TPT_ERR_SWFLUSH: | ||
173 | wc->status = IB_WC_WR_FLUSH_ERR; | ||
174 | break; | ||
175 | default: | ||
176 | printk(KERN_ERR MOD "Unexpected cqe_status 0x%x for " | ||
177 | "QPID=0x%0x\n", CQE_STATUS(cqe), CQE_QPID(cqe)); | ||
178 | ret = -EINVAL; | ||
179 | } | ||
180 | } | ||
181 | out: | ||
182 | if (wq) | ||
183 | spin_unlock(&qhp->lock); | ||
184 | return ret; | ||
185 | } | ||
186 | |||
187 | int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc) | ||
188 | { | ||
189 | struct iwch_dev *rhp; | ||
190 | struct iwch_cq *chp; | ||
191 | unsigned long flags; | ||
192 | int npolled; | ||
193 | int err = 0; | ||
194 | |||
195 | chp = to_iwch_cq(ibcq); | ||
196 | rhp = chp->rhp; | ||
197 | |||
198 | spin_lock_irqsave(&chp->lock, flags); | ||
199 | for (npolled = 0; npolled < num_entries; ++npolled) { | ||
200 | #ifdef DEBUG | ||
201 | int i=0; | ||
202 | #endif | ||
203 | |||
204 | /* | ||
205 | * Because T3 can post CQEs that are _not_ associated | ||
206 | * with a WR, we might have to poll again after removing | ||
207 | * one of these. | ||
208 | */ | ||
209 | do { | ||
210 | err = iwch_poll_cq_one(rhp, chp, wc + npolled); | ||
211 | #ifdef DEBUG | ||
212 | BUG_ON(++i > 1000); | ||
213 | #endif | ||
214 | } while (err == -EAGAIN); | ||
215 | if (err <= 0) | ||
216 | break; | ||
217 | } | ||
218 | spin_unlock_irqrestore(&chp->lock, flags); | ||
219 | |||
220 | if (err < 0) | ||
221 | return err; | ||
222 | else { | ||
223 | return npolled; | ||
224 | } | ||
225 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_ev.c b/drivers/infiniband/hw/cxgb3/iwch_ev.c new file mode 100644 index 000000000000..a6efa8fe15d8 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_ev.c | |||
@@ -0,0 +1,231 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include <linux/slab.h> | ||
34 | #include <linux/mman.h> | ||
35 | #include <net/sock.h> | ||
36 | #include "iwch_provider.h" | ||
37 | #include "iwch.h" | ||
38 | #include "iwch_cm.h" | ||
39 | #include "cxio_hal.h" | ||
40 | #include "cxio_wr.h" | ||
41 | |||
42 | static void post_qp_event(struct iwch_dev *rnicp, struct iwch_cq *chp, | ||
43 | struct respQ_msg_t *rsp_msg, | ||
44 | enum ib_event_type ib_event, | ||
45 | int send_term) | ||
46 | { | ||
47 | struct ib_event event; | ||
48 | struct iwch_qp_attributes attrs; | ||
49 | struct iwch_qp *qhp; | ||
50 | |||
51 | printk(KERN_ERR "%s - AE qpid 0x%x opcode %d status 0x%x " | ||
52 | "type %d wrid.hi 0x%x wrid.lo 0x%x \n", __FUNCTION__, | ||
53 | CQE_QPID(rsp_msg->cqe), CQE_OPCODE(rsp_msg->cqe), | ||
54 | CQE_STATUS(rsp_msg->cqe), CQE_TYPE(rsp_msg->cqe), | ||
55 | CQE_WRID_HI(rsp_msg->cqe), CQE_WRID_LOW(rsp_msg->cqe)); | ||
56 | |||
57 | spin_lock(&rnicp->lock); | ||
58 | qhp = get_qhp(rnicp, CQE_QPID(rsp_msg->cqe)); | ||
59 | |||
60 | if (!qhp) { | ||
61 | printk(KERN_ERR "%s unaffiliated error 0x%x qpid 0x%x\n", | ||
62 | __FUNCTION__, CQE_STATUS(rsp_msg->cqe), | ||
63 | CQE_QPID(rsp_msg->cqe)); | ||
64 | spin_unlock(&rnicp->lock); | ||
65 | return; | ||
66 | } | ||
67 | |||
68 | if ((qhp->attr.state == IWCH_QP_STATE_ERROR) || | ||
69 | (qhp->attr.state == IWCH_QP_STATE_TERMINATE)) { | ||
70 | PDBG("%s AE received after RTS - " | ||
71 | "qp state %d qpid 0x%x status 0x%x\n", __FUNCTION__, | ||
72 | qhp->attr.state, qhp->wq.qpid, CQE_STATUS(rsp_msg->cqe)); | ||
73 | spin_unlock(&rnicp->lock); | ||
74 | return; | ||
75 | } | ||
76 | |||
77 | atomic_inc(&qhp->refcnt); | ||
78 | spin_unlock(&rnicp->lock); | ||
79 | |||
80 | event.event = ib_event; | ||
81 | event.device = chp->ibcq.device; | ||
82 | if (ib_event == IB_EVENT_CQ_ERR) | ||
83 | event.element.cq = &chp->ibcq; | ||
84 | else | ||
85 | event.element.qp = &qhp->ibqp; | ||
86 | |||
87 | if (qhp->ibqp.event_handler) | ||
88 | (*qhp->ibqp.event_handler)(&event, qhp->ibqp.qp_context); | ||
89 | |||
90 | if (qhp->attr.state == IWCH_QP_STATE_RTS) { | ||
91 | attrs.next_state = IWCH_QP_STATE_TERMINATE; | ||
92 | iwch_modify_qp(qhp->rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, | ||
93 | &attrs, 1); | ||
94 | if (send_term) | ||
95 | iwch_post_terminate(qhp, rsp_msg); | ||
96 | } | ||
97 | |||
98 | if (atomic_dec_and_test(&qhp->refcnt)) | ||
99 | wake_up(&qhp->wait); | ||
100 | } | ||
101 | |||
102 | void iwch_ev_dispatch(struct cxio_rdev *rdev_p, struct sk_buff *skb) | ||
103 | { | ||
104 | struct iwch_dev *rnicp; | ||
105 | struct respQ_msg_t *rsp_msg = (struct respQ_msg_t *) skb->data; | ||
106 | struct iwch_cq *chp; | ||
107 | struct iwch_qp *qhp; | ||
108 | u32 cqid = RSPQ_CQID(rsp_msg); | ||
109 | |||
110 | rnicp = (struct iwch_dev *) rdev_p->ulp; | ||
111 | spin_lock(&rnicp->lock); | ||
112 | chp = get_chp(rnicp, cqid); | ||
113 | qhp = get_qhp(rnicp, CQE_QPID(rsp_msg->cqe)); | ||
114 | if (!chp || !qhp) { | ||
115 | printk(KERN_ERR MOD "BAD AE cqid 0x%x qpid 0x%x opcode %d " | ||
116 | "status 0x%x type %d wrid.hi 0x%x wrid.lo 0x%x \n", | ||
117 | cqid, CQE_QPID(rsp_msg->cqe), | ||
118 | CQE_OPCODE(rsp_msg->cqe), CQE_STATUS(rsp_msg->cqe), | ||
119 | CQE_TYPE(rsp_msg->cqe), CQE_WRID_HI(rsp_msg->cqe), | ||
120 | CQE_WRID_LOW(rsp_msg->cqe)); | ||
121 | spin_unlock(&rnicp->lock); | ||
122 | goto out; | ||
123 | } | ||
124 | iwch_qp_add_ref(&qhp->ibqp); | ||
125 | atomic_inc(&chp->refcnt); | ||
126 | spin_unlock(&rnicp->lock); | ||
127 | |||
128 | /* | ||
129 | * 1) completion of our sending a TERMINATE. | ||
130 | * 2) incoming TERMINATE message. | ||
131 | */ | ||
132 | if ((CQE_OPCODE(rsp_msg->cqe) == T3_TERMINATE) && | ||
133 | (CQE_STATUS(rsp_msg->cqe) == 0)) { | ||
134 | if (SQ_TYPE(rsp_msg->cqe)) { | ||
135 | PDBG("%s QPID 0x%x ep %p disconnecting\n", | ||
136 | __FUNCTION__, qhp->wq.qpid, qhp->ep); | ||
137 | iwch_ep_disconnect(qhp->ep, 0, GFP_ATOMIC); | ||
138 | } else { | ||
139 | PDBG("%s post REQ_ERR AE QPID 0x%x\n", __FUNCTION__, | ||
140 | qhp->wq.qpid); | ||
141 | post_qp_event(rnicp, chp, rsp_msg, | ||
142 | IB_EVENT_QP_REQ_ERR, 0); | ||
143 | iwch_ep_disconnect(qhp->ep, 0, GFP_ATOMIC); | ||
144 | } | ||
145 | goto done; | ||
146 | } | ||
147 | |||
148 | /* Bad incoming Read request */ | ||
149 | if (SQ_TYPE(rsp_msg->cqe) && | ||
150 | (CQE_OPCODE(rsp_msg->cqe) == T3_READ_RESP)) { | ||
151 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_REQ_ERR, 1); | ||
152 | goto done; | ||
153 | } | ||
154 | |||
155 | /* Bad incoming write */ | ||
156 | if (RQ_TYPE(rsp_msg->cqe) && | ||
157 | (CQE_OPCODE(rsp_msg->cqe) == T3_RDMA_WRITE)) { | ||
158 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_REQ_ERR, 1); | ||
159 | goto done; | ||
160 | } | ||
161 | |||
162 | switch (CQE_STATUS(rsp_msg->cqe)) { | ||
163 | |||
164 | /* Completion Events */ | ||
165 | case TPT_ERR_SUCCESS: | ||
166 | |||
167 | /* | ||
168 | * Confirm the destination entry if this is a RECV completion. | ||
169 | */ | ||
170 | if (qhp->ep && SQ_TYPE(rsp_msg->cqe)) | ||
171 | dst_confirm(qhp->ep->dst); | ||
172 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); | ||
173 | break; | ||
174 | |||
175 | case TPT_ERR_STAG: | ||
176 | case TPT_ERR_PDID: | ||
177 | case TPT_ERR_QPID: | ||
178 | case TPT_ERR_ACCESS: | ||
179 | case TPT_ERR_WRAP: | ||
180 | case TPT_ERR_BOUND: | ||
181 | case TPT_ERR_INVALIDATE_SHARED_MR: | ||
182 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: | ||
183 | printk(KERN_ERR "%s - CQE Err qpid 0x%x opcode %d status 0x%x " | ||
184 | "type %d wrid.hi 0x%x wrid.lo 0x%x \n", __FUNCTION__, | ||
185 | CQE_QPID(rsp_msg->cqe), CQE_OPCODE(rsp_msg->cqe), | ||
186 | CQE_STATUS(rsp_msg->cqe), CQE_TYPE(rsp_msg->cqe), | ||
187 | CQE_WRID_HI(rsp_msg->cqe), CQE_WRID_LOW(rsp_msg->cqe)); | ||
188 | (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); | ||
189 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_ACCESS_ERR, 1); | ||
190 | break; | ||
191 | |||
192 | /* Device Fatal Errors */ | ||
193 | case TPT_ERR_ECC: | ||
194 | case TPT_ERR_ECC_PSTAG: | ||
195 | case TPT_ERR_INTERNAL_ERR: | ||
196 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_DEVICE_FATAL, 1); | ||
197 | break; | ||
198 | |||
199 | /* QP Fatal Errors */ | ||
200 | case TPT_ERR_OUT_OF_RQE: | ||
201 | case TPT_ERR_PBL_ADDR_BOUND: | ||
202 | case TPT_ERR_CRC: | ||
203 | case TPT_ERR_MARKER: | ||
204 | case TPT_ERR_PDU_LEN_ERR: | ||
205 | case TPT_ERR_DDP_VERSION: | ||
206 | case TPT_ERR_RDMA_VERSION: | ||
207 | case TPT_ERR_OPCODE: | ||
208 | case TPT_ERR_DDP_QUEUE_NUM: | ||
209 | case TPT_ERR_MSN: | ||
210 | case TPT_ERR_TBIT: | ||
211 | case TPT_ERR_MO: | ||
212 | case TPT_ERR_MSN_GAP: | ||
213 | case TPT_ERR_MSN_RANGE: | ||
214 | case TPT_ERR_RQE_ADDR_BOUND: | ||
215 | case TPT_ERR_IRD_OVERFLOW: | ||
216 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_FATAL, 1); | ||
217 | break; | ||
218 | |||
219 | default: | ||
220 | printk(KERN_ERR MOD "Unknown T3 status 0x%x QPID 0x%x\n", | ||
221 | CQE_STATUS(rsp_msg->cqe), qhp->wq.qpid); | ||
222 | post_qp_event(rnicp, chp, rsp_msg, IB_EVENT_QP_FATAL, 1); | ||
223 | break; | ||
224 | } | ||
225 | done: | ||
226 | if (atomic_dec_and_test(&chp->refcnt)) | ||
227 | wake_up(&chp->wait); | ||
228 | iwch_qp_rem_ref(&qhp->ibqp); | ||
229 | out: | ||
230 | dev_kfree_skb_irq(skb); | ||
231 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_mem.c b/drivers/infiniband/hw/cxgb3/iwch_mem.c new file mode 100644 index 000000000000..2b6cd53bb3fc --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_mem.c | |||
@@ -0,0 +1,172 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include <asm/byteorder.h> | ||
34 | |||
35 | #include <rdma/iw_cm.h> | ||
36 | #include <rdma/ib_verbs.h> | ||
37 | |||
38 | #include "cxio_hal.h" | ||
39 | #include "iwch.h" | ||
40 | #include "iwch_provider.h" | ||
41 | |||
42 | int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, | ||
43 | struct iwch_mr *mhp, | ||
44 | int shift, | ||
45 | __be64 *page_list) | ||
46 | { | ||
47 | u32 stag; | ||
48 | u32 mmid; | ||
49 | |||
50 | |||
51 | if (cxio_register_phys_mem(&rhp->rdev, | ||
52 | &stag, mhp->attr.pdid, | ||
53 | mhp->attr.perms, | ||
54 | mhp->attr.zbva, | ||
55 | mhp->attr.va_fbo, | ||
56 | mhp->attr.len, | ||
57 | shift-12, | ||
58 | page_list, | ||
59 | &mhp->attr.pbl_size, &mhp->attr.pbl_addr)) | ||
60 | return -ENOMEM; | ||
61 | mhp->attr.state = 1; | ||
62 | mhp->attr.stag = stag; | ||
63 | mmid = stag >> 8; | ||
64 | mhp->ibmr.rkey = mhp->ibmr.lkey = stag; | ||
65 | insert_handle(rhp, &rhp->mmidr, mhp, mmid); | ||
66 | PDBG("%s mmid 0x%x mhp %p\n", __FUNCTION__, mmid, mhp); | ||
67 | return 0; | ||
68 | } | ||
69 | |||
70 | int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php, | ||
71 | struct iwch_mr *mhp, | ||
72 | int shift, | ||
73 | __be64 *page_list, | ||
74 | int npages) | ||
75 | { | ||
76 | u32 stag; | ||
77 | u32 mmid; | ||
78 | |||
79 | |||
80 | /* We could support this... */ | ||
81 | if (npages > mhp->attr.pbl_size) | ||
82 | return -ENOMEM; | ||
83 | |||
84 | stag = mhp->attr.stag; | ||
85 | if (cxio_reregister_phys_mem(&rhp->rdev, | ||
86 | &stag, mhp->attr.pdid, | ||
87 | mhp->attr.perms, | ||
88 | mhp->attr.zbva, | ||
89 | mhp->attr.va_fbo, | ||
90 | mhp->attr.len, | ||
91 | shift-12, | ||
92 | page_list, | ||
93 | &mhp->attr.pbl_size, &mhp->attr.pbl_addr)) | ||
94 | return -ENOMEM; | ||
95 | mhp->attr.state = 1; | ||
96 | mhp->attr.stag = stag; | ||
97 | mmid = stag >> 8; | ||
98 | mhp->ibmr.rkey = mhp->ibmr.lkey = stag; | ||
99 | insert_handle(rhp, &rhp->mmidr, mhp, mmid); | ||
100 | PDBG("%s mmid 0x%x mhp %p\n", __FUNCTION__, mmid, mhp); | ||
101 | return 0; | ||
102 | } | ||
103 | |||
104 | int build_phys_page_list(struct ib_phys_buf *buffer_list, | ||
105 | int num_phys_buf, | ||
106 | u64 *iova_start, | ||
107 | u64 *total_size, | ||
108 | int *npages, | ||
109 | int *shift, | ||
110 | __be64 **page_list) | ||
111 | { | ||
112 | u64 mask; | ||
113 | int i, j, n; | ||
114 | |||
115 | mask = 0; | ||
116 | *total_size = 0; | ||
117 | for (i = 0; i < num_phys_buf; ++i) { | ||
118 | if (i != 0 && buffer_list[i].addr & ~PAGE_MASK) | ||
119 | return -EINVAL; | ||
120 | if (i != 0 && i != num_phys_buf - 1 && | ||
121 | (buffer_list[i].size & ~PAGE_MASK)) | ||
122 | return -EINVAL; | ||
123 | *total_size += buffer_list[i].size; | ||
124 | if (i > 0) | ||
125 | mask |= buffer_list[i].addr; | ||
126 | } | ||
127 | |||
128 | if (*total_size > 0xFFFFFFFFULL) | ||
129 | return -ENOMEM; | ||
130 | |||
131 | /* Find largest page shift we can use to cover buffers */ | ||
132 | for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift)) | ||
133 | if (num_phys_buf > 1) { | ||
134 | if ((1ULL << *shift) & mask) | ||
135 | break; | ||
136 | } else | ||
137 | if (1ULL << *shift >= | ||
138 | buffer_list[0].size + | ||
139 | (buffer_list[0].addr & ((1ULL << *shift) - 1))) | ||
140 | break; | ||
141 | |||
142 | buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1); | ||
143 | buffer_list[0].addr &= ~0ull << *shift; | ||
144 | |||
145 | *npages = 0; | ||
146 | for (i = 0; i < num_phys_buf; ++i) | ||
147 | *npages += (buffer_list[i].size + | ||
148 | (1ULL << *shift) - 1) >> *shift; | ||
149 | |||
150 | if (!*npages) | ||
151 | return -EINVAL; | ||
152 | |||
153 | *page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL); | ||
154 | if (!*page_list) | ||
155 | return -ENOMEM; | ||
156 | |||
157 | n = 0; | ||
158 | for (i = 0; i < num_phys_buf; ++i) | ||
159 | for (j = 0; | ||
160 | j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift; | ||
161 | ++j) | ||
162 | (*page_list)[n++] = cpu_to_be64(buffer_list[i].addr + | ||
163 | ((u64) j << *shift)); | ||
164 | |||
165 | PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n", | ||
166 | __FUNCTION__, (unsigned long long) *iova_start, | ||
167 | (unsigned long long) mask, *shift, (unsigned long long) *total_size, | ||
168 | *npages); | ||
169 | |||
170 | return 0; | ||
171 | |||
172 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.c b/drivers/infiniband/hw/cxgb3/iwch_provider.c new file mode 100644 index 000000000000..6861087d776c --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.c | |||
@@ -0,0 +1,1203 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include <linux/module.h> | ||
34 | #include <linux/moduleparam.h> | ||
35 | #include <linux/device.h> | ||
36 | #include <linux/netdevice.h> | ||
37 | #include <linux/etherdevice.h> | ||
38 | #include <linux/delay.h> | ||
39 | #include <linux/errno.h> | ||
40 | #include <linux/list.h> | ||
41 | #include <linux/spinlock.h> | ||
42 | #include <linux/ethtool.h> | ||
43 | |||
44 | #include <asm/io.h> | ||
45 | #include <asm/irq.h> | ||
46 | #include <asm/byteorder.h> | ||
47 | |||
48 | #include <rdma/iw_cm.h> | ||
49 | #include <rdma/ib_verbs.h> | ||
50 | #include <rdma/ib_smi.h> | ||
51 | #include <rdma/ib_user_verbs.h> | ||
52 | |||
53 | #include "cxio_hal.h" | ||
54 | #include "iwch.h" | ||
55 | #include "iwch_provider.h" | ||
56 | #include "iwch_cm.h" | ||
57 | #include "iwch_user.h" | ||
58 | |||
59 | static int iwch_modify_port(struct ib_device *ibdev, | ||
60 | u8 port, int port_modify_mask, | ||
61 | struct ib_port_modify *props) | ||
62 | { | ||
63 | return -ENOSYS; | ||
64 | } | ||
65 | |||
66 | static struct ib_ah *iwch_ah_create(struct ib_pd *pd, | ||
67 | struct ib_ah_attr *ah_attr) | ||
68 | { | ||
69 | return ERR_PTR(-ENOSYS); | ||
70 | } | ||
71 | |||
72 | static int iwch_ah_destroy(struct ib_ah *ah) | ||
73 | { | ||
74 | return -ENOSYS; | ||
75 | } | ||
76 | |||
77 | static int iwch_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | ||
78 | { | ||
79 | return -ENOSYS; | ||
80 | } | ||
81 | |||
82 | static int iwch_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid) | ||
83 | { | ||
84 | return -ENOSYS; | ||
85 | } | ||
86 | |||
87 | static int iwch_process_mad(struct ib_device *ibdev, | ||
88 | int mad_flags, | ||
89 | u8 port_num, | ||
90 | struct ib_wc *in_wc, | ||
91 | struct ib_grh *in_grh, | ||
92 | struct ib_mad *in_mad, struct ib_mad *out_mad) | ||
93 | { | ||
94 | return -ENOSYS; | ||
95 | } | ||
96 | |||
97 | static int iwch_dealloc_ucontext(struct ib_ucontext *context) | ||
98 | { | ||
99 | struct iwch_dev *rhp = to_iwch_dev(context->device); | ||
100 | struct iwch_ucontext *ucontext = to_iwch_ucontext(context); | ||
101 | struct iwch_mm_entry *mm, *tmp; | ||
102 | |||
103 | PDBG("%s context %p\n", __FUNCTION__, context); | ||
104 | list_for_each_entry_safe(mm, tmp, &ucontext->mmaps, entry) | ||
105 | kfree(mm); | ||
106 | cxio_release_ucontext(&rhp->rdev, &ucontext->uctx); | ||
107 | kfree(ucontext); | ||
108 | return 0; | ||
109 | } | ||
110 | |||
111 | static struct ib_ucontext *iwch_alloc_ucontext(struct ib_device *ibdev, | ||
112 | struct ib_udata *udata) | ||
113 | { | ||
114 | struct iwch_ucontext *context; | ||
115 | struct iwch_dev *rhp = to_iwch_dev(ibdev); | ||
116 | |||
117 | PDBG("%s ibdev %p\n", __FUNCTION__, ibdev); | ||
118 | context = kzalloc(sizeof(*context), GFP_KERNEL); | ||
119 | if (!context) | ||
120 | return ERR_PTR(-ENOMEM); | ||
121 | cxio_init_ucontext(&rhp->rdev, &context->uctx); | ||
122 | INIT_LIST_HEAD(&context->mmaps); | ||
123 | spin_lock_init(&context->mmap_lock); | ||
124 | return &context->ibucontext; | ||
125 | } | ||
126 | |||
127 | static int iwch_destroy_cq(struct ib_cq *ib_cq) | ||
128 | { | ||
129 | struct iwch_cq *chp; | ||
130 | |||
131 | PDBG("%s ib_cq %p\n", __FUNCTION__, ib_cq); | ||
132 | chp = to_iwch_cq(ib_cq); | ||
133 | |||
134 | remove_handle(chp->rhp, &chp->rhp->cqidr, chp->cq.cqid); | ||
135 | atomic_dec(&chp->refcnt); | ||
136 | wait_event(chp->wait, !atomic_read(&chp->refcnt)); | ||
137 | |||
138 | cxio_destroy_cq(&chp->rhp->rdev, &chp->cq); | ||
139 | kfree(chp); | ||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | static struct ib_cq *iwch_create_cq(struct ib_device *ibdev, int entries, | ||
144 | struct ib_ucontext *ib_context, | ||
145 | struct ib_udata *udata) | ||
146 | { | ||
147 | struct iwch_dev *rhp; | ||
148 | struct iwch_cq *chp; | ||
149 | struct iwch_create_cq_resp uresp; | ||
150 | struct iwch_create_cq_req ureq; | ||
151 | struct iwch_ucontext *ucontext = NULL; | ||
152 | |||
153 | PDBG("%s ib_dev %p entries %d\n", __FUNCTION__, ibdev, entries); | ||
154 | rhp = to_iwch_dev(ibdev); | ||
155 | chp = kzalloc(sizeof(*chp), GFP_KERNEL); | ||
156 | if (!chp) | ||
157 | return ERR_PTR(-ENOMEM); | ||
158 | |||
159 | if (ib_context) { | ||
160 | ucontext = to_iwch_ucontext(ib_context); | ||
161 | if (!t3a_device(rhp)) { | ||
162 | if (ib_copy_from_udata(&ureq, udata, sizeof (ureq))) { | ||
163 | kfree(chp); | ||
164 | return ERR_PTR(-EFAULT); | ||
165 | } | ||
166 | chp->user_rptr_addr = (u32 __user *)(unsigned long)ureq.user_rptr_addr; | ||
167 | } | ||
168 | } | ||
169 | |||
170 | if (t3a_device(rhp)) { | ||
171 | |||
172 | /* | ||
173 | * T3A: Add some fluff to handle extra CQEs inserted | ||
174 | * for various errors. | ||
175 | * Additional CQE possibilities: | ||
176 | * TERMINATE, | ||
177 | * incoming RDMA WRITE Failures | ||
178 | * incoming RDMA READ REQUEST FAILUREs | ||
179 | * NOTE: We cannot ensure the CQ won't overflow. | ||
180 | */ | ||
181 | entries += 16; | ||
182 | } | ||
183 | entries = roundup_pow_of_two(entries); | ||
184 | chp->cq.size_log2 = ilog2(entries); | ||
185 | |||
186 | if (cxio_create_cq(&rhp->rdev, &chp->cq)) { | ||
187 | kfree(chp); | ||
188 | return ERR_PTR(-ENOMEM); | ||
189 | } | ||
190 | chp->rhp = rhp; | ||
191 | chp->ibcq.cqe = (1 << chp->cq.size_log2) - 1; | ||
192 | spin_lock_init(&chp->lock); | ||
193 | atomic_set(&chp->refcnt, 1); | ||
194 | init_waitqueue_head(&chp->wait); | ||
195 | insert_handle(rhp, &rhp->cqidr, chp, chp->cq.cqid); | ||
196 | |||
197 | if (ucontext) { | ||
198 | struct iwch_mm_entry *mm; | ||
199 | |||
200 | mm = kmalloc(sizeof *mm, GFP_KERNEL); | ||
201 | if (!mm) { | ||
202 | iwch_destroy_cq(&chp->ibcq); | ||
203 | return ERR_PTR(-ENOMEM); | ||
204 | } | ||
205 | uresp.cqid = chp->cq.cqid; | ||
206 | uresp.size_log2 = chp->cq.size_log2; | ||
207 | spin_lock(&ucontext->mmap_lock); | ||
208 | uresp.key = ucontext->key; | ||
209 | ucontext->key += PAGE_SIZE; | ||
210 | spin_unlock(&ucontext->mmap_lock); | ||
211 | if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) { | ||
212 | kfree(mm); | ||
213 | iwch_destroy_cq(&chp->ibcq); | ||
214 | return ERR_PTR(-EFAULT); | ||
215 | } | ||
216 | mm->key = uresp.key; | ||
217 | mm->addr = virt_to_phys(chp->cq.queue); | ||
218 | mm->len = PAGE_ALIGN((1UL << uresp.size_log2) * | ||
219 | sizeof (struct t3_cqe)); | ||
220 | insert_mmap(ucontext, mm); | ||
221 | } | ||
222 | PDBG("created cqid 0x%0x chp %p size 0x%0x, dma_addr 0x%0llx\n", | ||
223 | chp->cq.cqid, chp, (1 << chp->cq.size_log2), | ||
224 | (unsigned long long) chp->cq.dma_addr); | ||
225 | return &chp->ibcq; | ||
226 | } | ||
227 | |||
228 | static int iwch_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata) | ||
229 | { | ||
230 | #ifdef notyet | ||
231 | struct iwch_cq *chp = to_iwch_cq(cq); | ||
232 | struct t3_cq oldcq, newcq; | ||
233 | int ret; | ||
234 | |||
235 | PDBG("%s ib_cq %p cqe %d\n", __FUNCTION__, cq, cqe); | ||
236 | |||
237 | /* We don't downsize... */ | ||
238 | if (cqe <= cq->cqe) | ||
239 | return 0; | ||
240 | |||
241 | /* create new t3_cq with new size */ | ||
242 | cqe = roundup_pow_of_two(cqe+1); | ||
243 | newcq.size_log2 = ilog2(cqe); | ||
244 | |||
245 | /* Dont allow resize to less than the current wce count */ | ||
246 | if (cqe < Q_COUNT(chp->cq.rptr, chp->cq.wptr)) { | ||
247 | return -ENOMEM; | ||
248 | } | ||
249 | |||
250 | /* Quiesce all QPs using this CQ */ | ||
251 | ret = iwch_quiesce_qps(chp); | ||
252 | if (ret) { | ||
253 | return ret; | ||
254 | } | ||
255 | |||
256 | ret = cxio_create_cq(&chp->rhp->rdev, &newcq); | ||
257 | if (ret) { | ||
258 | return ret; | ||
259 | } | ||
260 | |||
261 | /* copy CQEs */ | ||
262 | memcpy(newcq.queue, chp->cq.queue, (1 << chp->cq.size_log2) * | ||
263 | sizeof(struct t3_cqe)); | ||
264 | |||
265 | /* old iwch_qp gets new t3_cq but keeps old cqid */ | ||
266 | oldcq = chp->cq; | ||
267 | chp->cq = newcq; | ||
268 | chp->cq.cqid = oldcq.cqid; | ||
269 | |||
270 | /* resize new t3_cq to update the HW context */ | ||
271 | ret = cxio_resize_cq(&chp->rhp->rdev, &chp->cq); | ||
272 | if (ret) { | ||
273 | chp->cq = oldcq; | ||
274 | return ret; | ||
275 | } | ||
276 | chp->ibcq.cqe = (1<<chp->cq.size_log2) - 1; | ||
277 | |||
278 | /* destroy old t3_cq */ | ||
279 | oldcq.cqid = newcq.cqid; | ||
280 | ret = cxio_destroy_cq(&chp->rhp->rdev, &oldcq); | ||
281 | if (ret) { | ||
282 | printk(KERN_ERR MOD "%s - cxio_destroy_cq failed %d\n", | ||
283 | __FUNCTION__, ret); | ||
284 | } | ||
285 | |||
286 | /* add user hooks here */ | ||
287 | |||
288 | /* resume qps */ | ||
289 | ret = iwch_resume_qps(chp); | ||
290 | return ret; | ||
291 | #else | ||
292 | return -ENOSYS; | ||
293 | #endif | ||
294 | } | ||
295 | |||
296 | static int iwch_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify notify) | ||
297 | { | ||
298 | struct iwch_dev *rhp; | ||
299 | struct iwch_cq *chp; | ||
300 | enum t3_cq_opcode cq_op; | ||
301 | int err; | ||
302 | unsigned long flag; | ||
303 | u32 rptr; | ||
304 | |||
305 | chp = to_iwch_cq(ibcq); | ||
306 | rhp = chp->rhp; | ||
307 | if (notify == IB_CQ_SOLICITED) | ||
308 | cq_op = CQ_ARM_SE; | ||
309 | else | ||
310 | cq_op = CQ_ARM_AN; | ||
311 | if (chp->user_rptr_addr) { | ||
312 | if (get_user(rptr, chp->user_rptr_addr)) | ||
313 | return -EFAULT; | ||
314 | spin_lock_irqsave(&chp->lock, flag); | ||
315 | chp->cq.rptr = rptr; | ||
316 | } else | ||
317 | spin_lock_irqsave(&chp->lock, flag); | ||
318 | PDBG("%s rptr 0x%x\n", __FUNCTION__, chp->cq.rptr); | ||
319 | err = cxio_hal_cq_op(&rhp->rdev, &chp->cq, cq_op, 0); | ||
320 | spin_unlock_irqrestore(&chp->lock, flag); | ||
321 | if (err) | ||
322 | printk(KERN_ERR MOD "Error %d rearming CQID 0x%x\n", err, | ||
323 | chp->cq.cqid); | ||
324 | return err; | ||
325 | } | ||
326 | |||
327 | static int iwch_mmap(struct ib_ucontext *context, struct vm_area_struct *vma) | ||
328 | { | ||
329 | int len = vma->vm_end - vma->vm_start; | ||
330 | u32 key = vma->vm_pgoff << PAGE_SHIFT; | ||
331 | struct cxio_rdev *rdev_p; | ||
332 | int ret = 0; | ||
333 | struct iwch_mm_entry *mm; | ||
334 | struct iwch_ucontext *ucontext; | ||
335 | |||
336 | PDBG("%s pgoff 0x%lx key 0x%x len %d\n", __FUNCTION__, vma->vm_pgoff, | ||
337 | key, len); | ||
338 | |||
339 | if (vma->vm_start & (PAGE_SIZE-1)) { | ||
340 | return -EINVAL; | ||
341 | } | ||
342 | |||
343 | rdev_p = &(to_iwch_dev(context->device)->rdev); | ||
344 | ucontext = to_iwch_ucontext(context); | ||
345 | |||
346 | mm = remove_mmap(ucontext, key, len); | ||
347 | if (!mm) | ||
348 | return -EINVAL; | ||
349 | kfree(mm); | ||
350 | |||
351 | if ((mm->addr >= rdev_p->rnic_info.udbell_physbase) && | ||
352 | (mm->addr < (rdev_p->rnic_info.udbell_physbase + | ||
353 | rdev_p->rnic_info.udbell_len))) { | ||
354 | |||
355 | /* | ||
356 | * Map T3 DB register. | ||
357 | */ | ||
358 | if (vma->vm_flags & VM_READ) { | ||
359 | return -EPERM; | ||
360 | } | ||
361 | |||
362 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | ||
363 | vma->vm_flags |= VM_DONTCOPY | VM_DONTEXPAND; | ||
364 | vma->vm_flags &= ~VM_MAYREAD; | ||
365 | ret = io_remap_pfn_range(vma, vma->vm_start, | ||
366 | mm->addr >> PAGE_SHIFT, | ||
367 | len, vma->vm_page_prot); | ||
368 | } else { | ||
369 | |||
370 | /* | ||
371 | * Map WQ or CQ contig dma memory... | ||
372 | */ | ||
373 | ret = remap_pfn_range(vma, vma->vm_start, | ||
374 | mm->addr >> PAGE_SHIFT, | ||
375 | len, vma->vm_page_prot); | ||
376 | } | ||
377 | |||
378 | return ret; | ||
379 | } | ||
380 | |||
381 | static int iwch_deallocate_pd(struct ib_pd *pd) | ||
382 | { | ||
383 | struct iwch_dev *rhp; | ||
384 | struct iwch_pd *php; | ||
385 | |||
386 | php = to_iwch_pd(pd); | ||
387 | rhp = php->rhp; | ||
388 | PDBG("%s ibpd %p pdid 0x%x\n", __FUNCTION__, pd, php->pdid); | ||
389 | cxio_hal_put_pdid(rhp->rdev.rscp, php->pdid); | ||
390 | kfree(php); | ||
391 | return 0; | ||
392 | } | ||
393 | |||
394 | static struct ib_pd *iwch_allocate_pd(struct ib_device *ibdev, | ||
395 | struct ib_ucontext *context, | ||
396 | struct ib_udata *udata) | ||
397 | { | ||
398 | struct iwch_pd *php; | ||
399 | u32 pdid; | ||
400 | struct iwch_dev *rhp; | ||
401 | |||
402 | PDBG("%s ibdev %p\n", __FUNCTION__, ibdev); | ||
403 | rhp = (struct iwch_dev *) ibdev; | ||
404 | pdid = cxio_hal_get_pdid(rhp->rdev.rscp); | ||
405 | if (!pdid) | ||
406 | return ERR_PTR(-EINVAL); | ||
407 | php = kzalloc(sizeof(*php), GFP_KERNEL); | ||
408 | if (!php) { | ||
409 | cxio_hal_put_pdid(rhp->rdev.rscp, pdid); | ||
410 | return ERR_PTR(-ENOMEM); | ||
411 | } | ||
412 | php->pdid = pdid; | ||
413 | php->rhp = rhp; | ||
414 | if (context) { | ||
415 | if (ib_copy_to_udata(udata, &php->pdid, sizeof (__u32))) { | ||
416 | iwch_deallocate_pd(&php->ibpd); | ||
417 | return ERR_PTR(-EFAULT); | ||
418 | } | ||
419 | } | ||
420 | PDBG("%s pdid 0x%0x ptr 0x%p\n", __FUNCTION__, pdid, php); | ||
421 | return &php->ibpd; | ||
422 | } | ||
423 | |||
424 | static int iwch_dereg_mr(struct ib_mr *ib_mr) | ||
425 | { | ||
426 | struct iwch_dev *rhp; | ||
427 | struct iwch_mr *mhp; | ||
428 | u32 mmid; | ||
429 | |||
430 | PDBG("%s ib_mr %p\n", __FUNCTION__, ib_mr); | ||
431 | /* There can be no memory windows */ | ||
432 | if (atomic_read(&ib_mr->usecnt)) | ||
433 | return -EINVAL; | ||
434 | |||
435 | mhp = to_iwch_mr(ib_mr); | ||
436 | rhp = mhp->rhp; | ||
437 | mmid = mhp->attr.stag >> 8; | ||
438 | cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size, | ||
439 | mhp->attr.pbl_addr); | ||
440 | remove_handle(rhp, &rhp->mmidr, mmid); | ||
441 | if (mhp->kva) | ||
442 | kfree((void *) (unsigned long) mhp->kva); | ||
443 | PDBG("%s mmid 0x%x ptr %p\n", __FUNCTION__, mmid, mhp); | ||
444 | kfree(mhp); | ||
445 | return 0; | ||
446 | } | ||
447 | |||
448 | static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd, | ||
449 | struct ib_phys_buf *buffer_list, | ||
450 | int num_phys_buf, | ||
451 | int acc, | ||
452 | u64 *iova_start) | ||
453 | { | ||
454 | __be64 *page_list; | ||
455 | int shift; | ||
456 | u64 total_size; | ||
457 | int npages; | ||
458 | struct iwch_dev *rhp; | ||
459 | struct iwch_pd *php; | ||
460 | struct iwch_mr *mhp; | ||
461 | int ret; | ||
462 | |||
463 | PDBG("%s ib_pd %p\n", __FUNCTION__, pd); | ||
464 | php = to_iwch_pd(pd); | ||
465 | rhp = php->rhp; | ||
466 | |||
467 | acc = iwch_convert_access(acc); | ||
468 | |||
469 | |||
470 | mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); | ||
471 | if (!mhp) | ||
472 | return ERR_PTR(-ENOMEM); | ||
473 | |||
474 | /* First check that we have enough alignment */ | ||
475 | if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) { | ||
476 | ret = -EINVAL; | ||
477 | goto err; | ||
478 | } | ||
479 | |||
480 | if (num_phys_buf > 1 && | ||
481 | ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) { | ||
482 | ret = -EINVAL; | ||
483 | goto err; | ||
484 | } | ||
485 | |||
486 | ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start, | ||
487 | &total_size, &npages, &shift, &page_list); | ||
488 | if (ret) | ||
489 | goto err; | ||
490 | |||
491 | mhp->rhp = rhp; | ||
492 | mhp->attr.pdid = php->pdid; | ||
493 | mhp->attr.zbva = 0; | ||
494 | |||
495 | /* NOTE: TPT perms are backwards from BIND WR perms! */ | ||
496 | mhp->attr.perms = (acc & 0x1) << 3; | ||
497 | mhp->attr.perms |= (acc & 0x2) << 1; | ||
498 | mhp->attr.perms |= (acc & 0x4) >> 1; | ||
499 | mhp->attr.perms |= (acc & 0x8) >> 3; | ||
500 | |||
501 | mhp->attr.va_fbo = *iova_start; | ||
502 | mhp->attr.page_size = shift - 12; | ||
503 | |||
504 | mhp->attr.len = (u32) total_size; | ||
505 | mhp->attr.pbl_size = npages; | ||
506 | ret = iwch_register_mem(rhp, php, mhp, shift, page_list); | ||
507 | kfree(page_list); | ||
508 | if (ret) { | ||
509 | goto err; | ||
510 | } | ||
511 | return &mhp->ibmr; | ||
512 | err: | ||
513 | kfree(mhp); | ||
514 | return ERR_PTR(ret); | ||
515 | |||
516 | } | ||
517 | |||
518 | static int iwch_reregister_phys_mem(struct ib_mr *mr, | ||
519 | int mr_rereg_mask, | ||
520 | struct ib_pd *pd, | ||
521 | struct ib_phys_buf *buffer_list, | ||
522 | int num_phys_buf, | ||
523 | int acc, u64 * iova_start) | ||
524 | { | ||
525 | |||
526 | struct iwch_mr mh, *mhp; | ||
527 | struct iwch_pd *php; | ||
528 | struct iwch_dev *rhp; | ||
529 | int new_acc; | ||
530 | __be64 *page_list = NULL; | ||
531 | int shift = 0; | ||
532 | u64 total_size; | ||
533 | int npages; | ||
534 | int ret; | ||
535 | |||
536 | PDBG("%s ib_mr %p ib_pd %p\n", __FUNCTION__, mr, pd); | ||
537 | |||
538 | /* There can be no memory windows */ | ||
539 | if (atomic_read(&mr->usecnt)) | ||
540 | return -EINVAL; | ||
541 | |||
542 | mhp = to_iwch_mr(mr); | ||
543 | rhp = mhp->rhp; | ||
544 | php = to_iwch_pd(mr->pd); | ||
545 | |||
546 | /* make sure we are on the same adapter */ | ||
547 | if (rhp != php->rhp) | ||
548 | return -EINVAL; | ||
549 | |||
550 | new_acc = mhp->attr.perms; | ||
551 | |||
552 | memcpy(&mh, mhp, sizeof *mhp); | ||
553 | |||
554 | if (mr_rereg_mask & IB_MR_REREG_PD) | ||
555 | php = to_iwch_pd(pd); | ||
556 | if (mr_rereg_mask & IB_MR_REREG_ACCESS) | ||
557 | mh.attr.perms = iwch_convert_access(acc); | ||
558 | if (mr_rereg_mask & IB_MR_REREG_TRANS) | ||
559 | ret = build_phys_page_list(buffer_list, num_phys_buf, | ||
560 | iova_start, | ||
561 | &total_size, &npages, | ||
562 | &shift, &page_list); | ||
563 | |||
564 | ret = iwch_reregister_mem(rhp, php, &mh, shift, page_list, npages); | ||
565 | kfree(page_list); | ||
566 | if (ret) { | ||
567 | return ret; | ||
568 | } | ||
569 | if (mr_rereg_mask & IB_MR_REREG_PD) | ||
570 | mhp->attr.pdid = php->pdid; | ||
571 | if (mr_rereg_mask & IB_MR_REREG_ACCESS) | ||
572 | mhp->attr.perms = acc; | ||
573 | if (mr_rereg_mask & IB_MR_REREG_TRANS) { | ||
574 | mhp->attr.zbva = 0; | ||
575 | mhp->attr.va_fbo = *iova_start; | ||
576 | mhp->attr.page_size = shift - 12; | ||
577 | mhp->attr.len = (u32) total_size; | ||
578 | mhp->attr.pbl_size = npages; | ||
579 | } | ||
580 | |||
581 | return 0; | ||
582 | } | ||
583 | |||
584 | |||
585 | static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, struct ib_umem *region, | ||
586 | int acc, struct ib_udata *udata) | ||
587 | { | ||
588 | __be64 *pages; | ||
589 | int shift, n, len; | ||
590 | int i, j, k; | ||
591 | int err = 0; | ||
592 | struct ib_umem_chunk *chunk; | ||
593 | struct iwch_dev *rhp; | ||
594 | struct iwch_pd *php; | ||
595 | struct iwch_mr *mhp; | ||
596 | struct iwch_reg_user_mr_resp uresp; | ||
597 | |||
598 | PDBG("%s ib_pd %p\n", __FUNCTION__, pd); | ||
599 | shift = ffs(region->page_size) - 1; | ||
600 | |||
601 | php = to_iwch_pd(pd); | ||
602 | rhp = php->rhp; | ||
603 | mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); | ||
604 | if (!mhp) | ||
605 | return ERR_PTR(-ENOMEM); | ||
606 | |||
607 | n = 0; | ||
608 | list_for_each_entry(chunk, ®ion->chunk_list, list) | ||
609 | n += chunk->nents; | ||
610 | |||
611 | pages = kmalloc(n * sizeof(u64), GFP_KERNEL); | ||
612 | if (!pages) { | ||
613 | err = -ENOMEM; | ||
614 | goto err; | ||
615 | } | ||
616 | |||
617 | acc = iwch_convert_access(acc); | ||
618 | |||
619 | i = n = 0; | ||
620 | |||
621 | list_for_each_entry(chunk, ®ion->chunk_list, list) | ||
622 | for (j = 0; j < chunk->nmap; ++j) { | ||
623 | len = sg_dma_len(&chunk->page_list[j]) >> shift; | ||
624 | for (k = 0; k < len; ++k) { | ||
625 | pages[i++] = cpu_to_be64(sg_dma_address( | ||
626 | &chunk->page_list[j]) + | ||
627 | region->page_size * k); | ||
628 | } | ||
629 | } | ||
630 | |||
631 | mhp->rhp = rhp; | ||
632 | mhp->attr.pdid = php->pdid; | ||
633 | mhp->attr.zbva = 0; | ||
634 | mhp->attr.perms = (acc & 0x1) << 3; | ||
635 | mhp->attr.perms |= (acc & 0x2) << 1; | ||
636 | mhp->attr.perms |= (acc & 0x4) >> 1; | ||
637 | mhp->attr.perms |= (acc & 0x8) >> 3; | ||
638 | mhp->attr.va_fbo = region->virt_base; | ||
639 | mhp->attr.page_size = shift - 12; | ||
640 | mhp->attr.len = (u32) region->length; | ||
641 | mhp->attr.pbl_size = i; | ||
642 | err = iwch_register_mem(rhp, php, mhp, shift, pages); | ||
643 | kfree(pages); | ||
644 | if (err) | ||
645 | goto err; | ||
646 | |||
647 | if (udata && t3b_device(rhp)) { | ||
648 | uresp.pbl_addr = (mhp->attr.pbl_addr - | ||
649 | rhp->rdev.rnic_info.pbl_base) >> 3; | ||
650 | PDBG("%s user resp pbl_addr 0x%x\n", __FUNCTION__, | ||
651 | uresp.pbl_addr); | ||
652 | |||
653 | if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) { | ||
654 | iwch_dereg_mr(&mhp->ibmr); | ||
655 | err = -EFAULT; | ||
656 | goto err; | ||
657 | } | ||
658 | } | ||
659 | |||
660 | return &mhp->ibmr; | ||
661 | |||
662 | err: | ||
663 | kfree(mhp); | ||
664 | return ERR_PTR(err); | ||
665 | } | ||
666 | |||
667 | static struct ib_mr *iwch_get_dma_mr(struct ib_pd *pd, int acc) | ||
668 | { | ||
669 | struct ib_phys_buf bl; | ||
670 | u64 kva; | ||
671 | struct ib_mr *ibmr; | ||
672 | |||
673 | PDBG("%s ib_pd %p\n", __FUNCTION__, pd); | ||
674 | |||
675 | /* | ||
676 | * T3 only supports 32 bits of size. | ||
677 | */ | ||
678 | bl.size = 0xffffffff; | ||
679 | bl.addr = 0; | ||
680 | kva = 0; | ||
681 | ibmr = iwch_register_phys_mem(pd, &bl, 1, acc, &kva); | ||
682 | return ibmr; | ||
683 | } | ||
684 | |||
685 | static struct ib_mw *iwch_alloc_mw(struct ib_pd *pd) | ||
686 | { | ||
687 | struct iwch_dev *rhp; | ||
688 | struct iwch_pd *php; | ||
689 | struct iwch_mw *mhp; | ||
690 | u32 mmid; | ||
691 | u32 stag = 0; | ||
692 | int ret; | ||
693 | |||
694 | php = to_iwch_pd(pd); | ||
695 | rhp = php->rhp; | ||
696 | mhp = kzalloc(sizeof(*mhp), GFP_KERNEL); | ||
697 | if (!mhp) | ||
698 | return ERR_PTR(-ENOMEM); | ||
699 | ret = cxio_allocate_window(&rhp->rdev, &stag, php->pdid); | ||
700 | if (ret) { | ||
701 | kfree(mhp); | ||
702 | return ERR_PTR(ret); | ||
703 | } | ||
704 | mhp->rhp = rhp; | ||
705 | mhp->attr.pdid = php->pdid; | ||
706 | mhp->attr.type = TPT_MW; | ||
707 | mhp->attr.stag = stag; | ||
708 | mmid = (stag) >> 8; | ||
709 | insert_handle(rhp, &rhp->mmidr, mhp, mmid); | ||
710 | PDBG("%s mmid 0x%x mhp %p stag 0x%x\n", __FUNCTION__, mmid, mhp, stag); | ||
711 | return &(mhp->ibmw); | ||
712 | } | ||
713 | |||
714 | static int iwch_dealloc_mw(struct ib_mw *mw) | ||
715 | { | ||
716 | struct iwch_dev *rhp; | ||
717 | struct iwch_mw *mhp; | ||
718 | u32 mmid; | ||
719 | |||
720 | mhp = to_iwch_mw(mw); | ||
721 | rhp = mhp->rhp; | ||
722 | mmid = (mw->rkey) >> 8; | ||
723 | cxio_deallocate_window(&rhp->rdev, mhp->attr.stag); | ||
724 | remove_handle(rhp, &rhp->mmidr, mmid); | ||
725 | kfree(mhp); | ||
726 | PDBG("%s ib_mw %p mmid 0x%x ptr %p\n", __FUNCTION__, mw, mmid, mhp); | ||
727 | return 0; | ||
728 | } | ||
729 | |||
730 | static int iwch_destroy_qp(struct ib_qp *ib_qp) | ||
731 | { | ||
732 | struct iwch_dev *rhp; | ||
733 | struct iwch_qp *qhp; | ||
734 | struct iwch_qp_attributes attrs; | ||
735 | struct iwch_ucontext *ucontext; | ||
736 | |||
737 | qhp = to_iwch_qp(ib_qp); | ||
738 | rhp = qhp->rhp; | ||
739 | |||
740 | if (qhp->attr.state == IWCH_QP_STATE_RTS) { | ||
741 | attrs.next_state = IWCH_QP_STATE_ERROR; | ||
742 | iwch_modify_qp(rhp, qhp, IWCH_QP_ATTR_NEXT_STATE, &attrs, 0); | ||
743 | } | ||
744 | wait_event(qhp->wait, !qhp->ep); | ||
745 | |||
746 | remove_handle(rhp, &rhp->qpidr, qhp->wq.qpid); | ||
747 | |||
748 | atomic_dec(&qhp->refcnt); | ||
749 | wait_event(qhp->wait, !atomic_read(&qhp->refcnt)); | ||
750 | |||
751 | ucontext = ib_qp->uobject ? to_iwch_ucontext(ib_qp->uobject->context) | ||
752 | : NULL; | ||
753 | cxio_destroy_qp(&rhp->rdev, &qhp->wq, | ||
754 | ucontext ? &ucontext->uctx : &rhp->rdev.uctx); | ||
755 | |||
756 | PDBG("%s ib_qp %p qpid 0x%0x qhp %p\n", __FUNCTION__, | ||
757 | ib_qp, qhp->wq.qpid, qhp); | ||
758 | kfree(qhp); | ||
759 | return 0; | ||
760 | } | ||
761 | |||
762 | static struct ib_qp *iwch_create_qp(struct ib_pd *pd, | ||
763 | struct ib_qp_init_attr *attrs, | ||
764 | struct ib_udata *udata) | ||
765 | { | ||
766 | struct iwch_dev *rhp; | ||
767 | struct iwch_qp *qhp; | ||
768 | struct iwch_pd *php; | ||
769 | struct iwch_cq *schp; | ||
770 | struct iwch_cq *rchp; | ||
771 | struct iwch_create_qp_resp uresp; | ||
772 | int wqsize, sqsize, rqsize; | ||
773 | struct iwch_ucontext *ucontext; | ||
774 | |||
775 | PDBG("%s ib_pd %p\n", __FUNCTION__, pd); | ||
776 | if (attrs->qp_type != IB_QPT_RC) | ||
777 | return ERR_PTR(-EINVAL); | ||
778 | php = to_iwch_pd(pd); | ||
779 | rhp = php->rhp; | ||
780 | schp = get_chp(rhp, ((struct iwch_cq *) attrs->send_cq)->cq.cqid); | ||
781 | rchp = get_chp(rhp, ((struct iwch_cq *) attrs->recv_cq)->cq.cqid); | ||
782 | if (!schp || !rchp) | ||
783 | return ERR_PTR(-EINVAL); | ||
784 | |||
785 | /* The RQT size must be # of entries + 1 rounded up to a power of two */ | ||
786 | rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr); | ||
787 | if (rqsize == attrs->cap.max_recv_wr) | ||
788 | rqsize = roundup_pow_of_two(attrs->cap.max_recv_wr+1); | ||
789 | |||
790 | /* T3 doesn't support RQT depth < 16 */ | ||
791 | if (rqsize < 16) | ||
792 | rqsize = 16; | ||
793 | |||
794 | if (rqsize > T3_MAX_RQ_SIZE) | ||
795 | return ERR_PTR(-EINVAL); | ||
796 | |||
797 | /* | ||
798 | * NOTE: The SQ and total WQ sizes don't need to be | ||
799 | * a power of two. However, all the code assumes | ||
800 | * they are. EG: Q_FREECNT() and friends. | ||
801 | */ | ||
802 | sqsize = roundup_pow_of_two(attrs->cap.max_send_wr); | ||
803 | wqsize = roundup_pow_of_two(rqsize + sqsize); | ||
804 | PDBG("%s wqsize %d sqsize %d rqsize %d\n", __FUNCTION__, | ||
805 | wqsize, sqsize, rqsize); | ||
806 | qhp = kzalloc(sizeof(*qhp), GFP_KERNEL); | ||
807 | if (!qhp) | ||
808 | return ERR_PTR(-ENOMEM); | ||
809 | qhp->wq.size_log2 = ilog2(wqsize); | ||
810 | qhp->wq.rq_size_log2 = ilog2(rqsize); | ||
811 | qhp->wq.sq_size_log2 = ilog2(sqsize); | ||
812 | ucontext = pd->uobject ? to_iwch_ucontext(pd->uobject->context) : NULL; | ||
813 | if (cxio_create_qp(&rhp->rdev, !udata, &qhp->wq, | ||
814 | ucontext ? &ucontext->uctx : &rhp->rdev.uctx)) { | ||
815 | kfree(qhp); | ||
816 | return ERR_PTR(-ENOMEM); | ||
817 | } | ||
818 | attrs->cap.max_recv_wr = rqsize - 1; | ||
819 | attrs->cap.max_send_wr = sqsize; | ||
820 | qhp->rhp = rhp; | ||
821 | qhp->attr.pd = php->pdid; | ||
822 | qhp->attr.scq = ((struct iwch_cq *) attrs->send_cq)->cq.cqid; | ||
823 | qhp->attr.rcq = ((struct iwch_cq *) attrs->recv_cq)->cq.cqid; | ||
824 | qhp->attr.sq_num_entries = attrs->cap.max_send_wr; | ||
825 | qhp->attr.rq_num_entries = attrs->cap.max_recv_wr; | ||
826 | qhp->attr.sq_max_sges = attrs->cap.max_send_sge; | ||
827 | qhp->attr.sq_max_sges_rdma_write = attrs->cap.max_send_sge; | ||
828 | qhp->attr.rq_max_sges = attrs->cap.max_recv_sge; | ||
829 | qhp->attr.state = IWCH_QP_STATE_IDLE; | ||
830 | qhp->attr.next_state = IWCH_QP_STATE_IDLE; | ||
831 | |||
832 | /* | ||
833 | * XXX - These don't get passed in from the openib user | ||
834 | * at create time. The CM sets them via a QP modify. | ||
835 | * Need to fix... I think the CM should | ||
836 | */ | ||
837 | qhp->attr.enable_rdma_read = 1; | ||
838 | qhp->attr.enable_rdma_write = 1; | ||
839 | qhp->attr.enable_bind = 1; | ||
840 | qhp->attr.max_ord = 1; | ||
841 | qhp->attr.max_ird = 1; | ||
842 | |||
843 | spin_lock_init(&qhp->lock); | ||
844 | init_waitqueue_head(&qhp->wait); | ||
845 | atomic_set(&qhp->refcnt, 1); | ||
846 | insert_handle(rhp, &rhp->qpidr, qhp, qhp->wq.qpid); | ||
847 | |||
848 | if (udata) { | ||
849 | |||
850 | struct iwch_mm_entry *mm1, *mm2; | ||
851 | |||
852 | mm1 = kmalloc(sizeof *mm1, GFP_KERNEL); | ||
853 | if (!mm1) { | ||
854 | iwch_destroy_qp(&qhp->ibqp); | ||
855 | return ERR_PTR(-ENOMEM); | ||
856 | } | ||
857 | |||
858 | mm2 = kmalloc(sizeof *mm2, GFP_KERNEL); | ||
859 | if (!mm2) { | ||
860 | kfree(mm1); | ||
861 | iwch_destroy_qp(&qhp->ibqp); | ||
862 | return ERR_PTR(-ENOMEM); | ||
863 | } | ||
864 | |||
865 | uresp.qpid = qhp->wq.qpid; | ||
866 | uresp.size_log2 = qhp->wq.size_log2; | ||
867 | uresp.sq_size_log2 = qhp->wq.sq_size_log2; | ||
868 | uresp.rq_size_log2 = qhp->wq.rq_size_log2; | ||
869 | spin_lock(&ucontext->mmap_lock); | ||
870 | uresp.key = ucontext->key; | ||
871 | ucontext->key += PAGE_SIZE; | ||
872 | uresp.db_key = ucontext->key; | ||
873 | ucontext->key += PAGE_SIZE; | ||
874 | spin_unlock(&ucontext->mmap_lock); | ||
875 | if (ib_copy_to_udata(udata, &uresp, sizeof (uresp))) { | ||
876 | kfree(mm1); | ||
877 | kfree(mm2); | ||
878 | iwch_destroy_qp(&qhp->ibqp); | ||
879 | return ERR_PTR(-EFAULT); | ||
880 | } | ||
881 | mm1->key = uresp.key; | ||
882 | mm1->addr = virt_to_phys(qhp->wq.queue); | ||
883 | mm1->len = PAGE_ALIGN(wqsize * sizeof (union t3_wr)); | ||
884 | insert_mmap(ucontext, mm1); | ||
885 | mm2->key = uresp.db_key; | ||
886 | mm2->addr = qhp->wq.udb & PAGE_MASK; | ||
887 | mm2->len = PAGE_SIZE; | ||
888 | insert_mmap(ucontext, mm2); | ||
889 | } | ||
890 | qhp->ibqp.qp_num = qhp->wq.qpid; | ||
891 | init_timer(&(qhp->timer)); | ||
892 | PDBG("%s sq_num_entries %d, rq_num_entries %d " | ||
893 | "qpid 0x%0x qhp %p dma_addr 0x%llx size %d\n", | ||
894 | __FUNCTION__, qhp->attr.sq_num_entries, qhp->attr.rq_num_entries, | ||
895 | qhp->wq.qpid, qhp, (unsigned long long) qhp->wq.dma_addr, | ||
896 | 1 << qhp->wq.size_log2); | ||
897 | return &qhp->ibqp; | ||
898 | } | ||
899 | |||
900 | static int iwch_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | ||
901 | int attr_mask, struct ib_udata *udata) | ||
902 | { | ||
903 | struct iwch_dev *rhp; | ||
904 | struct iwch_qp *qhp; | ||
905 | enum iwch_qp_attr_mask mask = 0; | ||
906 | struct iwch_qp_attributes attrs; | ||
907 | |||
908 | PDBG("%s ib_qp %p\n", __FUNCTION__, ibqp); | ||
909 | |||
910 | /* iwarp does not support the RTR state */ | ||
911 | if ((attr_mask & IB_QP_STATE) && (attr->qp_state == IB_QPS_RTR)) | ||
912 | attr_mask &= ~IB_QP_STATE; | ||
913 | |||
914 | /* Make sure we still have something left to do */ | ||
915 | if (!attr_mask) | ||
916 | return 0; | ||
917 | |||
918 | memset(&attrs, 0, sizeof attrs); | ||
919 | qhp = to_iwch_qp(ibqp); | ||
920 | rhp = qhp->rhp; | ||
921 | |||
922 | attrs.next_state = iwch_convert_state(attr->qp_state); | ||
923 | attrs.enable_rdma_read = (attr->qp_access_flags & | ||
924 | IB_ACCESS_REMOTE_READ) ? 1 : 0; | ||
925 | attrs.enable_rdma_write = (attr->qp_access_flags & | ||
926 | IB_ACCESS_REMOTE_WRITE) ? 1 : 0; | ||
927 | attrs.enable_bind = (attr->qp_access_flags & IB_ACCESS_MW_BIND) ? 1 : 0; | ||
928 | |||
929 | |||
930 | mask |= (attr_mask & IB_QP_STATE) ? IWCH_QP_ATTR_NEXT_STATE : 0; | ||
931 | mask |= (attr_mask & IB_QP_ACCESS_FLAGS) ? | ||
932 | (IWCH_QP_ATTR_ENABLE_RDMA_READ | | ||
933 | IWCH_QP_ATTR_ENABLE_RDMA_WRITE | | ||
934 | IWCH_QP_ATTR_ENABLE_RDMA_BIND) : 0; | ||
935 | |||
936 | return iwch_modify_qp(rhp, qhp, mask, &attrs, 0); | ||
937 | } | ||
938 | |||
939 | void iwch_qp_add_ref(struct ib_qp *qp) | ||
940 | { | ||
941 | PDBG("%s ib_qp %p\n", __FUNCTION__, qp); | ||
942 | atomic_inc(&(to_iwch_qp(qp)->refcnt)); | ||
943 | } | ||
944 | |||
945 | void iwch_qp_rem_ref(struct ib_qp *qp) | ||
946 | { | ||
947 | PDBG("%s ib_qp %p\n", __FUNCTION__, qp); | ||
948 | if (atomic_dec_and_test(&(to_iwch_qp(qp)->refcnt))) | ||
949 | wake_up(&(to_iwch_qp(qp)->wait)); | ||
950 | } | ||
951 | |||
952 | struct ib_qp *iwch_get_qp(struct ib_device *dev, int qpn) | ||
953 | { | ||
954 | PDBG("%s ib_dev %p qpn 0x%x\n", __FUNCTION__, dev, qpn); | ||
955 | return (struct ib_qp *)get_qhp(to_iwch_dev(dev), qpn); | ||
956 | } | ||
957 | |||
958 | |||
959 | static int iwch_query_pkey(struct ib_device *ibdev, | ||
960 | u8 port, u16 index, u16 * pkey) | ||
961 | { | ||
962 | PDBG("%s ibdev %p\n", __FUNCTION__, ibdev); | ||
963 | *pkey = 0; | ||
964 | return 0; | ||
965 | } | ||
966 | |||
967 | static int iwch_query_gid(struct ib_device *ibdev, u8 port, | ||
968 | int index, union ib_gid *gid) | ||
969 | { | ||
970 | struct iwch_dev *dev; | ||
971 | |||
972 | PDBG("%s ibdev %p, port %d, index %d, gid %p\n", | ||
973 | __FUNCTION__, ibdev, port, index, gid); | ||
974 | dev = to_iwch_dev(ibdev); | ||
975 | BUG_ON(port == 0 || port > 2); | ||
976 | memset(&(gid->raw[0]), 0, sizeof(gid->raw)); | ||
977 | memcpy(&(gid->raw[0]), dev->rdev.port_info.lldevs[port-1]->dev_addr, 6); | ||
978 | return 0; | ||
979 | } | ||
980 | |||
981 | static int iwch_query_device(struct ib_device *ibdev, | ||
982 | struct ib_device_attr *props) | ||
983 | { | ||
984 | |||
985 | struct iwch_dev *dev; | ||
986 | PDBG("%s ibdev %p\n", __FUNCTION__, ibdev); | ||
987 | |||
988 | dev = to_iwch_dev(ibdev); | ||
989 | memset(props, 0, sizeof *props); | ||
990 | memcpy(&props->sys_image_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); | ||
991 | props->device_cap_flags = dev->device_cap_flags; | ||
992 | props->vendor_id = (u32)dev->rdev.rnic_info.pdev->vendor; | ||
993 | props->vendor_part_id = (u32)dev->rdev.rnic_info.pdev->device; | ||
994 | props->max_mr_size = ~0ull; | ||
995 | props->max_qp = dev->attr.max_qps; | ||
996 | props->max_qp_wr = dev->attr.max_wrs; | ||
997 | props->max_sge = dev->attr.max_sge_per_wr; | ||
998 | props->max_sge_rd = 1; | ||
999 | props->max_qp_rd_atom = dev->attr.max_rdma_reads_per_qp; | ||
1000 | props->max_cq = dev->attr.max_cqs; | ||
1001 | props->max_cqe = dev->attr.max_cqes_per_cq; | ||
1002 | props->max_mr = dev->attr.max_mem_regs; | ||
1003 | props->max_pd = dev->attr.max_pds; | ||
1004 | props->local_ca_ack_delay = 0; | ||
1005 | |||
1006 | return 0; | ||
1007 | } | ||
1008 | |||
1009 | static int iwch_query_port(struct ib_device *ibdev, | ||
1010 | u8 port, struct ib_port_attr *props) | ||
1011 | { | ||
1012 | PDBG("%s ibdev %p\n", __FUNCTION__, ibdev); | ||
1013 | props->max_mtu = IB_MTU_4096; | ||
1014 | props->lid = 0; | ||
1015 | props->lmc = 0; | ||
1016 | props->sm_lid = 0; | ||
1017 | props->sm_sl = 0; | ||
1018 | props->state = IB_PORT_ACTIVE; | ||
1019 | props->phys_state = 0; | ||
1020 | props->port_cap_flags = | ||
1021 | IB_PORT_CM_SUP | | ||
1022 | IB_PORT_SNMP_TUNNEL_SUP | | ||
1023 | IB_PORT_REINIT_SUP | | ||
1024 | IB_PORT_DEVICE_MGMT_SUP | | ||
1025 | IB_PORT_VENDOR_CLASS_SUP | IB_PORT_BOOT_MGMT_SUP; | ||
1026 | props->gid_tbl_len = 1; | ||
1027 | props->pkey_tbl_len = 1; | ||
1028 | props->qkey_viol_cntr = 0; | ||
1029 | props->active_width = 2; | ||
1030 | props->active_speed = 2; | ||
1031 | props->max_msg_sz = -1; | ||
1032 | |||
1033 | return 0; | ||
1034 | } | ||
1035 | |||
1036 | static ssize_t show_rev(struct class_device *cdev, char *buf) | ||
1037 | { | ||
1038 | struct iwch_dev *dev = container_of(cdev, struct iwch_dev, | ||
1039 | ibdev.class_dev); | ||
1040 | PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev); | ||
1041 | return sprintf(buf, "%d\n", dev->rdev.t3cdev_p->type); | ||
1042 | } | ||
1043 | |||
1044 | static ssize_t show_fw_ver(struct class_device *cdev, char *buf) | ||
1045 | { | ||
1046 | struct iwch_dev *dev = container_of(cdev, struct iwch_dev, | ||
1047 | ibdev.class_dev); | ||
1048 | struct ethtool_drvinfo info; | ||
1049 | struct net_device *lldev = dev->rdev.t3cdev_p->lldev; | ||
1050 | |||
1051 | PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev); | ||
1052 | lldev->ethtool_ops->get_drvinfo(lldev, &info); | ||
1053 | return sprintf(buf, "%s\n", info.fw_version); | ||
1054 | } | ||
1055 | |||
1056 | static ssize_t show_hca(struct class_device *cdev, char *buf) | ||
1057 | { | ||
1058 | struct iwch_dev *dev = container_of(cdev, struct iwch_dev, | ||
1059 | ibdev.class_dev); | ||
1060 | struct ethtool_drvinfo info; | ||
1061 | struct net_device *lldev = dev->rdev.t3cdev_p->lldev; | ||
1062 | |||
1063 | PDBG("%s class dev 0x%p\n", __FUNCTION__, cdev); | ||
1064 | lldev->ethtool_ops->get_drvinfo(lldev, &info); | ||
1065 | return sprintf(buf, "%s\n", info.driver); | ||
1066 | } | ||
1067 | |||
1068 | static ssize_t show_board(struct class_device *cdev, char *buf) | ||
1069 | { | ||
1070 | struct iwch_dev *dev = container_of(cdev, struct iwch_dev, | ||
1071 | ibdev.class_dev); | ||
1072 | PDBG("%s class dev 0x%p\n", __FUNCTION__, dev); | ||
1073 | return sprintf(buf, "%x.%x\n", dev->rdev.rnic_info.pdev->vendor, | ||
1074 | dev->rdev.rnic_info.pdev->device); | ||
1075 | } | ||
1076 | |||
1077 | static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL); | ||
1078 | static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL); | ||
1079 | static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL); | ||
1080 | static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL); | ||
1081 | |||
1082 | static struct class_device_attribute *iwch_class_attributes[] = { | ||
1083 | &class_device_attr_hw_rev, | ||
1084 | &class_device_attr_fw_ver, | ||
1085 | &class_device_attr_hca_type, | ||
1086 | &class_device_attr_board_id | ||
1087 | }; | ||
1088 | |||
1089 | int iwch_register_device(struct iwch_dev *dev) | ||
1090 | { | ||
1091 | int ret; | ||
1092 | int i; | ||
1093 | |||
1094 | PDBG("%s iwch_dev %p\n", __FUNCTION__, dev); | ||
1095 | strlcpy(dev->ibdev.name, "cxgb3_%d", IB_DEVICE_NAME_MAX); | ||
1096 | memset(&dev->ibdev.node_guid, 0, sizeof(dev->ibdev.node_guid)); | ||
1097 | memcpy(&dev->ibdev.node_guid, dev->rdev.t3cdev_p->lldev->dev_addr, 6); | ||
1098 | dev->ibdev.owner = THIS_MODULE; | ||
1099 | dev->device_cap_flags = | ||
1100 | (IB_DEVICE_ZERO_STAG | | ||
1101 | IB_DEVICE_SEND_W_INV | IB_DEVICE_MEM_WINDOW); | ||
1102 | |||
1103 | dev->ibdev.uverbs_cmd_mask = | ||
1104 | (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | | ||
1105 | (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | | ||
1106 | (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | | ||
1107 | (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | | ||
1108 | (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | | ||
1109 | (1ull << IB_USER_VERBS_CMD_REG_MR) | | ||
1110 | (1ull << IB_USER_VERBS_CMD_DEREG_MR) | | ||
1111 | (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | | ||
1112 | (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | | ||
1113 | (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | | ||
1114 | (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) | | ||
1115 | (1ull << IB_USER_VERBS_CMD_CREATE_QP) | | ||
1116 | (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | | ||
1117 | (1ull << IB_USER_VERBS_CMD_POLL_CQ) | | ||
1118 | (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | | ||
1119 | (1ull << IB_USER_VERBS_CMD_POST_SEND) | | ||
1120 | (1ull << IB_USER_VERBS_CMD_POST_RECV); | ||
1121 | dev->ibdev.node_type = RDMA_NODE_RNIC; | ||
1122 | memcpy(dev->ibdev.node_desc, IWCH_NODE_DESC, sizeof(IWCH_NODE_DESC)); | ||
1123 | dev->ibdev.phys_port_cnt = dev->rdev.port_info.nports; | ||
1124 | dev->ibdev.dma_device = &(dev->rdev.rnic_info.pdev->dev); | ||
1125 | dev->ibdev.class_dev.dev = &(dev->rdev.rnic_info.pdev->dev); | ||
1126 | dev->ibdev.query_device = iwch_query_device; | ||
1127 | dev->ibdev.query_port = iwch_query_port; | ||
1128 | dev->ibdev.modify_port = iwch_modify_port; | ||
1129 | dev->ibdev.query_pkey = iwch_query_pkey; | ||
1130 | dev->ibdev.query_gid = iwch_query_gid; | ||
1131 | dev->ibdev.alloc_ucontext = iwch_alloc_ucontext; | ||
1132 | dev->ibdev.dealloc_ucontext = iwch_dealloc_ucontext; | ||
1133 | dev->ibdev.mmap = iwch_mmap; | ||
1134 | dev->ibdev.alloc_pd = iwch_allocate_pd; | ||
1135 | dev->ibdev.dealloc_pd = iwch_deallocate_pd; | ||
1136 | dev->ibdev.create_ah = iwch_ah_create; | ||
1137 | dev->ibdev.destroy_ah = iwch_ah_destroy; | ||
1138 | dev->ibdev.create_qp = iwch_create_qp; | ||
1139 | dev->ibdev.modify_qp = iwch_ib_modify_qp; | ||
1140 | dev->ibdev.destroy_qp = iwch_destroy_qp; | ||
1141 | dev->ibdev.create_cq = iwch_create_cq; | ||
1142 | dev->ibdev.destroy_cq = iwch_destroy_cq; | ||
1143 | dev->ibdev.resize_cq = iwch_resize_cq; | ||
1144 | dev->ibdev.poll_cq = iwch_poll_cq; | ||
1145 | dev->ibdev.get_dma_mr = iwch_get_dma_mr; | ||
1146 | dev->ibdev.reg_phys_mr = iwch_register_phys_mem; | ||
1147 | dev->ibdev.rereg_phys_mr = iwch_reregister_phys_mem; | ||
1148 | dev->ibdev.reg_user_mr = iwch_reg_user_mr; | ||
1149 | dev->ibdev.dereg_mr = iwch_dereg_mr; | ||
1150 | dev->ibdev.alloc_mw = iwch_alloc_mw; | ||
1151 | dev->ibdev.bind_mw = iwch_bind_mw; | ||
1152 | dev->ibdev.dealloc_mw = iwch_dealloc_mw; | ||
1153 | |||
1154 | dev->ibdev.attach_mcast = iwch_multicast_attach; | ||
1155 | dev->ibdev.detach_mcast = iwch_multicast_detach; | ||
1156 | dev->ibdev.process_mad = iwch_process_mad; | ||
1157 | |||
1158 | dev->ibdev.req_notify_cq = iwch_arm_cq; | ||
1159 | dev->ibdev.post_send = iwch_post_send; | ||
1160 | dev->ibdev.post_recv = iwch_post_receive; | ||
1161 | |||
1162 | |||
1163 | dev->ibdev.iwcm = | ||
1164 | (struct iw_cm_verbs *) kmalloc(sizeof(struct iw_cm_verbs), | ||
1165 | GFP_KERNEL); | ||
1166 | dev->ibdev.iwcm->connect = iwch_connect; | ||
1167 | dev->ibdev.iwcm->accept = iwch_accept_cr; | ||
1168 | dev->ibdev.iwcm->reject = iwch_reject_cr; | ||
1169 | dev->ibdev.iwcm->create_listen = iwch_create_listen; | ||
1170 | dev->ibdev.iwcm->destroy_listen = iwch_destroy_listen; | ||
1171 | dev->ibdev.iwcm->add_ref = iwch_qp_add_ref; | ||
1172 | dev->ibdev.iwcm->rem_ref = iwch_qp_rem_ref; | ||
1173 | dev->ibdev.iwcm->get_qp = iwch_get_qp; | ||
1174 | |||
1175 | ret = ib_register_device(&dev->ibdev); | ||
1176 | if (ret) | ||
1177 | goto bail1; | ||
1178 | |||
1179 | for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i) { | ||
1180 | ret = class_device_create_file(&dev->ibdev.class_dev, | ||
1181 | iwch_class_attributes[i]); | ||
1182 | if (ret) { | ||
1183 | goto bail2; | ||
1184 | } | ||
1185 | } | ||
1186 | return 0; | ||
1187 | bail2: | ||
1188 | ib_unregister_device(&dev->ibdev); | ||
1189 | bail1: | ||
1190 | return ret; | ||
1191 | } | ||
1192 | |||
1193 | void iwch_unregister_device(struct iwch_dev *dev) | ||
1194 | { | ||
1195 | int i; | ||
1196 | |||
1197 | PDBG("%s iwch_dev %p\n", __FUNCTION__, dev); | ||
1198 | for (i = 0; i < ARRAY_SIZE(iwch_class_attributes); ++i) | ||
1199 | class_device_remove_file(&dev->ibdev.class_dev, | ||
1200 | iwch_class_attributes[i]); | ||
1201 | ib_unregister_device(&dev->ibdev); | ||
1202 | return; | ||
1203 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_provider.h b/drivers/infiniband/hw/cxgb3/iwch_provider.h new file mode 100644 index 000000000000..61e3278fd7a8 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_provider.h | |||
@@ -0,0 +1,367 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef __IWCH_PROVIDER_H__ | ||
34 | #define __IWCH_PROVIDER_H__ | ||
35 | |||
36 | #include <linux/list.h> | ||
37 | #include <linux/spinlock.h> | ||
38 | #include <rdma/ib_verbs.h> | ||
39 | #include <asm/types.h> | ||
40 | #include "t3cdev.h" | ||
41 | #include "iwch.h" | ||
42 | #include "cxio_wr.h" | ||
43 | #include "cxio_hal.h" | ||
44 | |||
45 | struct iwch_pd { | ||
46 | struct ib_pd ibpd; | ||
47 | u32 pdid; | ||
48 | struct iwch_dev *rhp; | ||
49 | }; | ||
50 | |||
51 | static inline struct iwch_pd *to_iwch_pd(struct ib_pd *ibpd) | ||
52 | { | ||
53 | return container_of(ibpd, struct iwch_pd, ibpd); | ||
54 | } | ||
55 | |||
56 | struct tpt_attributes { | ||
57 | u32 stag; | ||
58 | u32 state:1; | ||
59 | u32 type:2; | ||
60 | u32 rsvd:1; | ||
61 | enum tpt_mem_perm perms; | ||
62 | u32 remote_invaliate_disable:1; | ||
63 | u32 zbva:1; | ||
64 | u32 mw_bind_enable:1; | ||
65 | u32 page_size:5; | ||
66 | |||
67 | u32 pdid; | ||
68 | u32 qpid; | ||
69 | u32 pbl_addr; | ||
70 | u32 len; | ||
71 | u64 va_fbo; | ||
72 | u32 pbl_size; | ||
73 | }; | ||
74 | |||
75 | struct iwch_mr { | ||
76 | struct ib_mr ibmr; | ||
77 | struct iwch_dev *rhp; | ||
78 | u64 kva; | ||
79 | struct tpt_attributes attr; | ||
80 | }; | ||
81 | |||
82 | typedef struct iwch_mw iwch_mw_handle; | ||
83 | |||
84 | static inline struct iwch_mr *to_iwch_mr(struct ib_mr *ibmr) | ||
85 | { | ||
86 | return container_of(ibmr, struct iwch_mr, ibmr); | ||
87 | } | ||
88 | |||
89 | struct iwch_mw { | ||
90 | struct ib_mw ibmw; | ||
91 | struct iwch_dev *rhp; | ||
92 | u64 kva; | ||
93 | struct tpt_attributes attr; | ||
94 | }; | ||
95 | |||
96 | static inline struct iwch_mw *to_iwch_mw(struct ib_mw *ibmw) | ||
97 | { | ||
98 | return container_of(ibmw, struct iwch_mw, ibmw); | ||
99 | } | ||
100 | |||
101 | struct iwch_cq { | ||
102 | struct ib_cq ibcq; | ||
103 | struct iwch_dev *rhp; | ||
104 | struct t3_cq cq; | ||
105 | spinlock_t lock; | ||
106 | atomic_t refcnt; | ||
107 | wait_queue_head_t wait; | ||
108 | u32 __user *user_rptr_addr; | ||
109 | }; | ||
110 | |||
111 | static inline struct iwch_cq *to_iwch_cq(struct ib_cq *ibcq) | ||
112 | { | ||
113 | return container_of(ibcq, struct iwch_cq, ibcq); | ||
114 | } | ||
115 | |||
116 | enum IWCH_QP_FLAGS { | ||
117 | QP_QUIESCED = 0x01 | ||
118 | }; | ||
119 | |||
120 | struct iwch_mpa_attributes { | ||
121 | u8 recv_marker_enabled; | ||
122 | u8 xmit_marker_enabled; /* iWARP: enable inbound Read Resp. */ | ||
123 | u8 crc_enabled; | ||
124 | u8 version; /* 0 or 1 */ | ||
125 | }; | ||
126 | |||
127 | struct iwch_qp_attributes { | ||
128 | u32 scq; | ||
129 | u32 rcq; | ||
130 | u32 sq_num_entries; | ||
131 | u32 rq_num_entries; | ||
132 | u32 sq_max_sges; | ||
133 | u32 sq_max_sges_rdma_write; | ||
134 | u32 rq_max_sges; | ||
135 | u32 state; | ||
136 | u8 enable_rdma_read; | ||
137 | u8 enable_rdma_write; /* enable inbound Read Resp. */ | ||
138 | u8 enable_bind; | ||
139 | u8 enable_mmid0_fastreg; /* Enable STAG0 + Fast-register */ | ||
140 | /* | ||
141 | * Next QP state. If specify the current state, only the | ||
142 | * QP attributes will be modified. | ||
143 | */ | ||
144 | u32 max_ord; | ||
145 | u32 max_ird; | ||
146 | u32 pd; /* IN */ | ||
147 | u32 next_state; | ||
148 | char terminate_buffer[52]; | ||
149 | u32 terminate_msg_len; | ||
150 | u8 is_terminate_local; | ||
151 | struct iwch_mpa_attributes mpa_attr; /* IN-OUT */ | ||
152 | struct iwch_ep *llp_stream_handle; | ||
153 | char *stream_msg_buf; /* Last stream msg. before Idle -> RTS */ | ||
154 | u32 stream_msg_buf_len; /* Only on Idle -> RTS */ | ||
155 | }; | ||
156 | |||
157 | struct iwch_qp { | ||
158 | struct ib_qp ibqp; | ||
159 | struct iwch_dev *rhp; | ||
160 | struct iwch_ep *ep; | ||
161 | struct iwch_qp_attributes attr; | ||
162 | struct t3_wq wq; | ||
163 | spinlock_t lock; | ||
164 | atomic_t refcnt; | ||
165 | wait_queue_head_t wait; | ||
166 | enum IWCH_QP_FLAGS flags; | ||
167 | struct timer_list timer; | ||
168 | }; | ||
169 | |||
170 | static inline int qp_quiesced(struct iwch_qp *qhp) | ||
171 | { | ||
172 | return qhp->flags & QP_QUIESCED; | ||
173 | } | ||
174 | |||
175 | static inline struct iwch_qp *to_iwch_qp(struct ib_qp *ibqp) | ||
176 | { | ||
177 | return container_of(ibqp, struct iwch_qp, ibqp); | ||
178 | } | ||
179 | |||
180 | void iwch_qp_add_ref(struct ib_qp *qp); | ||
181 | void iwch_qp_rem_ref(struct ib_qp *qp); | ||
182 | struct ib_qp *iwch_get_qp(struct ib_device *dev, int qpn); | ||
183 | |||
184 | struct iwch_ucontext { | ||
185 | struct ib_ucontext ibucontext; | ||
186 | struct cxio_ucontext uctx; | ||
187 | u32 key; | ||
188 | spinlock_t mmap_lock; | ||
189 | struct list_head mmaps; | ||
190 | }; | ||
191 | |||
192 | static inline struct iwch_ucontext *to_iwch_ucontext(struct ib_ucontext *c) | ||
193 | { | ||
194 | return container_of(c, struct iwch_ucontext, ibucontext); | ||
195 | } | ||
196 | |||
197 | struct iwch_mm_entry { | ||
198 | struct list_head entry; | ||
199 | u64 addr; | ||
200 | u32 key; | ||
201 | unsigned len; | ||
202 | }; | ||
203 | |||
204 | static inline struct iwch_mm_entry *remove_mmap(struct iwch_ucontext *ucontext, | ||
205 | u32 key, unsigned len) | ||
206 | { | ||
207 | struct list_head *pos, *nxt; | ||
208 | struct iwch_mm_entry *mm; | ||
209 | |||
210 | spin_lock(&ucontext->mmap_lock); | ||
211 | list_for_each_safe(pos, nxt, &ucontext->mmaps) { | ||
212 | |||
213 | mm = list_entry(pos, struct iwch_mm_entry, entry); | ||
214 | if (mm->key == key && mm->len == len) { | ||
215 | list_del_init(&mm->entry); | ||
216 | spin_unlock(&ucontext->mmap_lock); | ||
217 | PDBG("%s key 0x%x addr 0x%llx len %d\n", __FUNCTION__, | ||
218 | key, (unsigned long long) mm->addr, mm->len); | ||
219 | return mm; | ||
220 | } | ||
221 | } | ||
222 | spin_unlock(&ucontext->mmap_lock); | ||
223 | return NULL; | ||
224 | } | ||
225 | |||
226 | static inline void insert_mmap(struct iwch_ucontext *ucontext, | ||
227 | struct iwch_mm_entry *mm) | ||
228 | { | ||
229 | spin_lock(&ucontext->mmap_lock); | ||
230 | PDBG("%s key 0x%x addr 0x%llx len %d\n", __FUNCTION__, | ||
231 | mm->key, (unsigned long long) mm->addr, mm->len); | ||
232 | list_add_tail(&mm->entry, &ucontext->mmaps); | ||
233 | spin_unlock(&ucontext->mmap_lock); | ||
234 | } | ||
235 | |||
236 | enum iwch_qp_attr_mask { | ||
237 | IWCH_QP_ATTR_NEXT_STATE = 1 << 0, | ||
238 | IWCH_QP_ATTR_ENABLE_RDMA_READ = 1 << 7, | ||
239 | IWCH_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8, | ||
240 | IWCH_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9, | ||
241 | IWCH_QP_ATTR_MAX_ORD = 1 << 11, | ||
242 | IWCH_QP_ATTR_MAX_IRD = 1 << 12, | ||
243 | IWCH_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22, | ||
244 | IWCH_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23, | ||
245 | IWCH_QP_ATTR_MPA_ATTR = 1 << 24, | ||
246 | IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25, | ||
247 | IWCH_QP_ATTR_VALID_MODIFY = (IWCH_QP_ATTR_ENABLE_RDMA_READ | | ||
248 | IWCH_QP_ATTR_ENABLE_RDMA_WRITE | | ||
249 | IWCH_QP_ATTR_MAX_ORD | | ||
250 | IWCH_QP_ATTR_MAX_IRD | | ||
251 | IWCH_QP_ATTR_LLP_STREAM_HANDLE | | ||
252 | IWCH_QP_ATTR_STREAM_MSG_BUFFER | | ||
253 | IWCH_QP_ATTR_MPA_ATTR | | ||
254 | IWCH_QP_ATTR_QP_CONTEXT_ACTIVATE) | ||
255 | }; | ||
256 | |||
257 | int iwch_modify_qp(struct iwch_dev *rhp, | ||
258 | struct iwch_qp *qhp, | ||
259 | enum iwch_qp_attr_mask mask, | ||
260 | struct iwch_qp_attributes *attrs, | ||
261 | int internal); | ||
262 | |||
263 | enum iwch_qp_state { | ||
264 | IWCH_QP_STATE_IDLE, | ||
265 | IWCH_QP_STATE_RTS, | ||
266 | IWCH_QP_STATE_ERROR, | ||
267 | IWCH_QP_STATE_TERMINATE, | ||
268 | IWCH_QP_STATE_CLOSING, | ||
269 | IWCH_QP_STATE_TOT | ||
270 | }; | ||
271 | |||
272 | static inline int iwch_convert_state(enum ib_qp_state ib_state) | ||
273 | { | ||
274 | switch (ib_state) { | ||
275 | case IB_QPS_RESET: | ||
276 | case IB_QPS_INIT: | ||
277 | return IWCH_QP_STATE_IDLE; | ||
278 | case IB_QPS_RTS: | ||
279 | return IWCH_QP_STATE_RTS; | ||
280 | case IB_QPS_SQD: | ||
281 | return IWCH_QP_STATE_CLOSING; | ||
282 | case IB_QPS_SQE: | ||
283 | return IWCH_QP_STATE_TERMINATE; | ||
284 | case IB_QPS_ERR: | ||
285 | return IWCH_QP_STATE_ERROR; | ||
286 | default: | ||
287 | return -1; | ||
288 | } | ||
289 | } | ||
290 | |||
291 | enum iwch_mem_perms { | ||
292 | IWCH_MEM_ACCESS_LOCAL_READ = 1 << 0, | ||
293 | IWCH_MEM_ACCESS_LOCAL_WRITE = 1 << 1, | ||
294 | IWCH_MEM_ACCESS_REMOTE_READ = 1 << 2, | ||
295 | IWCH_MEM_ACCESS_REMOTE_WRITE = 1 << 3, | ||
296 | IWCH_MEM_ACCESS_ATOMICS = 1 << 4, | ||
297 | IWCH_MEM_ACCESS_BINDING = 1 << 5, | ||
298 | IWCH_MEM_ACCESS_LOCAL = | ||
299 | (IWCH_MEM_ACCESS_LOCAL_READ | IWCH_MEM_ACCESS_LOCAL_WRITE), | ||
300 | IWCH_MEM_ACCESS_REMOTE = | ||
301 | (IWCH_MEM_ACCESS_REMOTE_WRITE | IWCH_MEM_ACCESS_REMOTE_READ) | ||
302 | /* cannot go beyond 1 << 31 */ | ||
303 | } __attribute__ ((packed)); | ||
304 | |||
305 | static inline u32 iwch_convert_access(int acc) | ||
306 | { | ||
307 | return (acc & IB_ACCESS_REMOTE_WRITE ? IWCH_MEM_ACCESS_REMOTE_WRITE : 0) | ||
308 | | (acc & IB_ACCESS_REMOTE_READ ? IWCH_MEM_ACCESS_REMOTE_READ : 0) | | ||
309 | (acc & IB_ACCESS_LOCAL_WRITE ? IWCH_MEM_ACCESS_LOCAL_WRITE : 0) | | ||
310 | (acc & IB_ACCESS_MW_BIND ? IWCH_MEM_ACCESS_BINDING : 0) | | ||
311 | IWCH_MEM_ACCESS_LOCAL_READ; | ||
312 | } | ||
313 | |||
314 | enum iwch_mmid_state { | ||
315 | IWCH_STAG_STATE_VALID, | ||
316 | IWCH_STAG_STATE_INVALID | ||
317 | }; | ||
318 | |||
319 | enum iwch_qp_query_flags { | ||
320 | IWCH_QP_QUERY_CONTEXT_NONE = 0x0, /* No ctx; Only attrs */ | ||
321 | IWCH_QP_QUERY_CONTEXT_GET = 0x1, /* Get ctx + attrs */ | ||
322 | IWCH_QP_QUERY_CONTEXT_SUSPEND = 0x2, /* Not Supported */ | ||
323 | |||
324 | /* | ||
325 | * Quiesce QP context; Consumer | ||
326 | * will NOT replay outstanding WR | ||
327 | */ | ||
328 | IWCH_QP_QUERY_CONTEXT_QUIESCE = 0x4, | ||
329 | IWCH_QP_QUERY_CONTEXT_REMOVE = 0x8, | ||
330 | IWCH_QP_QUERY_TEST_USERWRITE = 0x32 /* Test special */ | ||
331 | }; | ||
332 | |||
333 | int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | ||
334 | struct ib_send_wr **bad_wr); | ||
335 | int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, | ||
336 | struct ib_recv_wr **bad_wr); | ||
337 | int iwch_bind_mw(struct ib_qp *qp, | ||
338 | struct ib_mw *mw, | ||
339 | struct ib_mw_bind *mw_bind); | ||
340 | int iwch_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc); | ||
341 | int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg); | ||
342 | int iwch_register_device(struct iwch_dev *dev); | ||
343 | void iwch_unregister_device(struct iwch_dev *dev); | ||
344 | int iwch_quiesce_qps(struct iwch_cq *chp); | ||
345 | int iwch_resume_qps(struct iwch_cq *chp); | ||
346 | void stop_read_rep_timer(struct iwch_qp *qhp); | ||
347 | int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, | ||
348 | struct iwch_mr *mhp, | ||
349 | int shift, | ||
350 | __be64 *page_list); | ||
351 | int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php, | ||
352 | struct iwch_mr *mhp, | ||
353 | int shift, | ||
354 | __be64 *page_list, | ||
355 | int npages); | ||
356 | int build_phys_page_list(struct ib_phys_buf *buffer_list, | ||
357 | int num_phys_buf, | ||
358 | u64 *iova_start, | ||
359 | u64 *total_size, | ||
360 | int *npages, | ||
361 | int *shift, | ||
362 | __be64 **page_list); | ||
363 | |||
364 | |||
365 | #define IWCH_NODE_DESC "cxgb3 Chelsio Communications" | ||
366 | |||
367 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_qp.c b/drivers/infiniband/hw/cxgb3/iwch_qp.c new file mode 100644 index 000000000000..e066727504b6 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_qp.c | |||
@@ -0,0 +1,1007 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #include "iwch_provider.h" | ||
34 | #include "iwch.h" | ||
35 | #include "iwch_cm.h" | ||
36 | #include "cxio_hal.h" | ||
37 | |||
38 | #define NO_SUPPORT -1 | ||
39 | |||
40 | static inline int iwch_build_rdma_send(union t3_wr *wqe, struct ib_send_wr *wr, | ||
41 | u8 * flit_cnt) | ||
42 | { | ||
43 | int i; | ||
44 | u32 plen; | ||
45 | |||
46 | switch (wr->opcode) { | ||
47 | case IB_WR_SEND: | ||
48 | case IB_WR_SEND_WITH_IMM: | ||
49 | if (wr->send_flags & IB_SEND_SOLICITED) | ||
50 | wqe->send.rdmaop = T3_SEND_WITH_SE; | ||
51 | else | ||
52 | wqe->send.rdmaop = T3_SEND; | ||
53 | wqe->send.rem_stag = 0; | ||
54 | break; | ||
55 | #if 0 /* Not currently supported */ | ||
56 | case TYPE_SEND_INVALIDATE: | ||
57 | case TYPE_SEND_INVALIDATE_IMMEDIATE: | ||
58 | wqe->send.rdmaop = T3_SEND_WITH_INV; | ||
59 | wqe->send.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); | ||
60 | break; | ||
61 | case TYPE_SEND_SE_INVALIDATE: | ||
62 | wqe->send.rdmaop = T3_SEND_WITH_SE_INV; | ||
63 | wqe->send.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); | ||
64 | break; | ||
65 | #endif | ||
66 | default: | ||
67 | break; | ||
68 | } | ||
69 | if (wr->num_sge > T3_MAX_SGE) | ||
70 | return -EINVAL; | ||
71 | wqe->send.reserved[0] = 0; | ||
72 | wqe->send.reserved[1] = 0; | ||
73 | wqe->send.reserved[2] = 0; | ||
74 | if (wr->opcode == IB_WR_SEND_WITH_IMM) { | ||
75 | plen = 4; | ||
76 | wqe->send.sgl[0].stag = wr->imm_data; | ||
77 | wqe->send.sgl[0].len = __constant_cpu_to_be32(0); | ||
78 | wqe->send.num_sgle = __constant_cpu_to_be32(0); | ||
79 | *flit_cnt = 5; | ||
80 | } else { | ||
81 | plen = 0; | ||
82 | for (i = 0; i < wr->num_sge; i++) { | ||
83 | if ((plen + wr->sg_list[i].length) < plen) { | ||
84 | return -EMSGSIZE; | ||
85 | } | ||
86 | plen += wr->sg_list[i].length; | ||
87 | wqe->send.sgl[i].stag = | ||
88 | cpu_to_be32(wr->sg_list[i].lkey); | ||
89 | wqe->send.sgl[i].len = | ||
90 | cpu_to_be32(wr->sg_list[i].length); | ||
91 | wqe->send.sgl[i].to = cpu_to_be64(wr->sg_list[i].addr); | ||
92 | } | ||
93 | wqe->send.num_sgle = cpu_to_be32(wr->num_sge); | ||
94 | *flit_cnt = 4 + ((wr->num_sge) << 1); | ||
95 | } | ||
96 | wqe->send.plen = cpu_to_be32(plen); | ||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | static inline int iwch_build_rdma_write(union t3_wr *wqe, struct ib_send_wr *wr, | ||
101 | u8 *flit_cnt) | ||
102 | { | ||
103 | int i; | ||
104 | u32 plen; | ||
105 | if (wr->num_sge > T3_MAX_SGE) | ||
106 | return -EINVAL; | ||
107 | wqe->write.rdmaop = T3_RDMA_WRITE; | ||
108 | wqe->write.reserved[0] = 0; | ||
109 | wqe->write.reserved[1] = 0; | ||
110 | wqe->write.reserved[2] = 0; | ||
111 | wqe->write.stag_sink = cpu_to_be32(wr->wr.rdma.rkey); | ||
112 | wqe->write.to_sink = cpu_to_be64(wr->wr.rdma.remote_addr); | ||
113 | |||
114 | if (wr->opcode == IB_WR_RDMA_WRITE_WITH_IMM) { | ||
115 | plen = 4; | ||
116 | wqe->write.sgl[0].stag = wr->imm_data; | ||
117 | wqe->write.sgl[0].len = __constant_cpu_to_be32(0); | ||
118 | wqe->write.num_sgle = __constant_cpu_to_be32(0); | ||
119 | *flit_cnt = 6; | ||
120 | } else { | ||
121 | plen = 0; | ||
122 | for (i = 0; i < wr->num_sge; i++) { | ||
123 | if ((plen + wr->sg_list[i].length) < plen) { | ||
124 | return -EMSGSIZE; | ||
125 | } | ||
126 | plen += wr->sg_list[i].length; | ||
127 | wqe->write.sgl[i].stag = | ||
128 | cpu_to_be32(wr->sg_list[i].lkey); | ||
129 | wqe->write.sgl[i].len = | ||
130 | cpu_to_be32(wr->sg_list[i].length); | ||
131 | wqe->write.sgl[i].to = | ||
132 | cpu_to_be64(wr->sg_list[i].addr); | ||
133 | } | ||
134 | wqe->write.num_sgle = cpu_to_be32(wr->num_sge); | ||
135 | *flit_cnt = 5 + ((wr->num_sge) << 1); | ||
136 | } | ||
137 | wqe->write.plen = cpu_to_be32(plen); | ||
138 | return 0; | ||
139 | } | ||
140 | |||
141 | static inline int iwch_build_rdma_read(union t3_wr *wqe, struct ib_send_wr *wr, | ||
142 | u8 *flit_cnt) | ||
143 | { | ||
144 | if (wr->num_sge > 1) | ||
145 | return -EINVAL; | ||
146 | wqe->read.rdmaop = T3_READ_REQ; | ||
147 | wqe->read.reserved[0] = 0; | ||
148 | wqe->read.reserved[1] = 0; | ||
149 | wqe->read.reserved[2] = 0; | ||
150 | wqe->read.rem_stag = cpu_to_be32(wr->wr.rdma.rkey); | ||
151 | wqe->read.rem_to = cpu_to_be64(wr->wr.rdma.remote_addr); | ||
152 | wqe->read.local_stag = cpu_to_be32(wr->sg_list[0].lkey); | ||
153 | wqe->read.local_len = cpu_to_be32(wr->sg_list[0].length); | ||
154 | wqe->read.local_to = cpu_to_be64(wr->sg_list[0].addr); | ||
155 | *flit_cnt = sizeof(struct t3_rdma_read_wr) >> 3; | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | /* | ||
160 | * TBD: this is going to be moved to firmware. Missing pdid/qpid check for now. | ||
161 | */ | ||
162 | static inline int iwch_sgl2pbl_map(struct iwch_dev *rhp, | ||
163 | struct ib_sge *sg_list, u32 num_sgle, | ||
164 | u32 * pbl_addr, u8 * page_size) | ||
165 | { | ||
166 | int i; | ||
167 | struct iwch_mr *mhp; | ||
168 | u32 offset; | ||
169 | for (i = 0; i < num_sgle; i++) { | ||
170 | |||
171 | mhp = get_mhp(rhp, (sg_list[i].lkey) >> 8); | ||
172 | if (!mhp) { | ||
173 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
174 | return -EIO; | ||
175 | } | ||
176 | if (!mhp->attr.state) { | ||
177 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
178 | return -EIO; | ||
179 | } | ||
180 | if (mhp->attr.zbva) { | ||
181 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
182 | return -EIO; | ||
183 | } | ||
184 | |||
185 | if (sg_list[i].addr < mhp->attr.va_fbo) { | ||
186 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
187 | return -EINVAL; | ||
188 | } | ||
189 | if (sg_list[i].addr + ((u64) sg_list[i].length) < | ||
190 | sg_list[i].addr) { | ||
191 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
192 | return -EINVAL; | ||
193 | } | ||
194 | if (sg_list[i].addr + ((u64) sg_list[i].length) > | ||
195 | mhp->attr.va_fbo + ((u64) mhp->attr.len)) { | ||
196 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
197 | return -EINVAL; | ||
198 | } | ||
199 | offset = sg_list[i].addr - mhp->attr.va_fbo; | ||
200 | offset += ((u32) mhp->attr.va_fbo) % | ||
201 | (1UL << (12 + mhp->attr.page_size)); | ||
202 | pbl_addr[i] = ((mhp->attr.pbl_addr - | ||
203 | rhp->rdev.rnic_info.pbl_base) >> 3) + | ||
204 | (offset >> (12 + mhp->attr.page_size)); | ||
205 | page_size[i] = mhp->attr.page_size; | ||
206 | } | ||
207 | return 0; | ||
208 | } | ||
209 | |||
210 | static inline int iwch_build_rdma_recv(struct iwch_dev *rhp, | ||
211 | union t3_wr *wqe, | ||
212 | struct ib_recv_wr *wr) | ||
213 | { | ||
214 | int i, err = 0; | ||
215 | u32 pbl_addr[4]; | ||
216 | u8 page_size[4]; | ||
217 | if (wr->num_sge > T3_MAX_SGE) | ||
218 | return -EINVAL; | ||
219 | err = iwch_sgl2pbl_map(rhp, wr->sg_list, wr->num_sge, pbl_addr, | ||
220 | page_size); | ||
221 | if (err) | ||
222 | return err; | ||
223 | wqe->recv.pagesz[0] = page_size[0]; | ||
224 | wqe->recv.pagesz[1] = page_size[1]; | ||
225 | wqe->recv.pagesz[2] = page_size[2]; | ||
226 | wqe->recv.pagesz[3] = page_size[3]; | ||
227 | wqe->recv.num_sgle = cpu_to_be32(wr->num_sge); | ||
228 | for (i = 0; i < wr->num_sge; i++) { | ||
229 | wqe->recv.sgl[i].stag = cpu_to_be32(wr->sg_list[i].lkey); | ||
230 | wqe->recv.sgl[i].len = cpu_to_be32(wr->sg_list[i].length); | ||
231 | |||
232 | /* to in the WQE == the offset into the page */ | ||
233 | wqe->recv.sgl[i].to = cpu_to_be64(((u32) wr->sg_list[i].addr) % | ||
234 | (1UL << (12 + page_size[i]))); | ||
235 | |||
236 | /* pbl_addr is the adapters address in the PBL */ | ||
237 | wqe->recv.pbl_addr[i] = cpu_to_be32(pbl_addr[i]); | ||
238 | } | ||
239 | for (; i < T3_MAX_SGE; i++) { | ||
240 | wqe->recv.sgl[i].stag = 0; | ||
241 | wqe->recv.sgl[i].len = 0; | ||
242 | wqe->recv.sgl[i].to = 0; | ||
243 | wqe->recv.pbl_addr[i] = 0; | ||
244 | } | ||
245 | return 0; | ||
246 | } | ||
247 | |||
248 | int iwch_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, | ||
249 | struct ib_send_wr **bad_wr) | ||
250 | { | ||
251 | int err = 0; | ||
252 | u8 t3_wr_flit_cnt; | ||
253 | enum t3_wr_opcode t3_wr_opcode = 0; | ||
254 | enum t3_wr_flags t3_wr_flags; | ||
255 | struct iwch_qp *qhp; | ||
256 | u32 idx; | ||
257 | union t3_wr *wqe; | ||
258 | u32 num_wrs; | ||
259 | unsigned long flag; | ||
260 | struct t3_swsq *sqp; | ||
261 | |||
262 | qhp = to_iwch_qp(ibqp); | ||
263 | spin_lock_irqsave(&qhp->lock, flag); | ||
264 | if (qhp->attr.state > IWCH_QP_STATE_RTS) { | ||
265 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
266 | return -EINVAL; | ||
267 | } | ||
268 | num_wrs = Q_FREECNT(qhp->wq.sq_rptr, qhp->wq.sq_wptr, | ||
269 | qhp->wq.sq_size_log2); | ||
270 | if (num_wrs <= 0) { | ||
271 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
272 | return -ENOMEM; | ||
273 | } | ||
274 | while (wr) { | ||
275 | if (num_wrs == 0) { | ||
276 | err = -ENOMEM; | ||
277 | *bad_wr = wr; | ||
278 | break; | ||
279 | } | ||
280 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); | ||
281 | wqe = (union t3_wr *) (qhp->wq.queue + idx); | ||
282 | t3_wr_flags = 0; | ||
283 | if (wr->send_flags & IB_SEND_SOLICITED) | ||
284 | t3_wr_flags |= T3_SOLICITED_EVENT_FLAG; | ||
285 | if (wr->send_flags & IB_SEND_FENCE) | ||
286 | t3_wr_flags |= T3_READ_FENCE_FLAG; | ||
287 | if (wr->send_flags & IB_SEND_SIGNALED) | ||
288 | t3_wr_flags |= T3_COMPLETION_FLAG; | ||
289 | sqp = qhp->wq.sq + | ||
290 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); | ||
291 | switch (wr->opcode) { | ||
292 | case IB_WR_SEND: | ||
293 | case IB_WR_SEND_WITH_IMM: | ||
294 | t3_wr_opcode = T3_WR_SEND; | ||
295 | err = iwch_build_rdma_send(wqe, wr, &t3_wr_flit_cnt); | ||
296 | break; | ||
297 | case IB_WR_RDMA_WRITE: | ||
298 | case IB_WR_RDMA_WRITE_WITH_IMM: | ||
299 | t3_wr_opcode = T3_WR_WRITE; | ||
300 | err = iwch_build_rdma_write(wqe, wr, &t3_wr_flit_cnt); | ||
301 | break; | ||
302 | case IB_WR_RDMA_READ: | ||
303 | t3_wr_opcode = T3_WR_READ; | ||
304 | t3_wr_flags = 0; /* T3 reads are always signaled */ | ||
305 | err = iwch_build_rdma_read(wqe, wr, &t3_wr_flit_cnt); | ||
306 | if (err) | ||
307 | break; | ||
308 | sqp->read_len = wqe->read.local_len; | ||
309 | if (!qhp->wq.oldest_read) | ||
310 | qhp->wq.oldest_read = sqp; | ||
311 | break; | ||
312 | default: | ||
313 | PDBG("%s post of type=%d TBD!\n", __FUNCTION__, | ||
314 | wr->opcode); | ||
315 | err = -EINVAL; | ||
316 | } | ||
317 | if (err) { | ||
318 | *bad_wr = wr; | ||
319 | break; | ||
320 | } | ||
321 | wqe->send.wrid.id0.hi = qhp->wq.sq_wptr; | ||
322 | sqp->wr_id = wr->wr_id; | ||
323 | sqp->opcode = wr2opcode(t3_wr_opcode); | ||
324 | sqp->sq_wptr = qhp->wq.sq_wptr; | ||
325 | sqp->complete = 0; | ||
326 | sqp->signaled = (wr->send_flags & IB_SEND_SIGNALED); | ||
327 | |||
328 | build_fw_riwrh((void *) wqe, t3_wr_opcode, t3_wr_flags, | ||
329 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), | ||
330 | 0, t3_wr_flit_cnt); | ||
331 | PDBG("%s cookie 0x%llx wq idx 0x%x swsq idx %ld opcode %d\n", | ||
332 | __FUNCTION__, (unsigned long long) wr->wr_id, idx, | ||
333 | Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2), | ||
334 | sqp->opcode); | ||
335 | wr = wr->next; | ||
336 | num_wrs--; | ||
337 | ++(qhp->wq.wptr); | ||
338 | ++(qhp->wq.sq_wptr); | ||
339 | } | ||
340 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
341 | ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); | ||
342 | return err; | ||
343 | } | ||
344 | |||
345 | int iwch_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr, | ||
346 | struct ib_recv_wr **bad_wr) | ||
347 | { | ||
348 | int err = 0; | ||
349 | struct iwch_qp *qhp; | ||
350 | u32 idx; | ||
351 | union t3_wr *wqe; | ||
352 | u32 num_wrs; | ||
353 | unsigned long flag; | ||
354 | |||
355 | qhp = to_iwch_qp(ibqp); | ||
356 | spin_lock_irqsave(&qhp->lock, flag); | ||
357 | if (qhp->attr.state > IWCH_QP_STATE_RTS) { | ||
358 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
359 | return -EINVAL; | ||
360 | } | ||
361 | num_wrs = Q_FREECNT(qhp->wq.rq_rptr, qhp->wq.rq_wptr, | ||
362 | qhp->wq.rq_size_log2) - 1; | ||
363 | if (!wr) { | ||
364 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
365 | return -EINVAL; | ||
366 | } | ||
367 | while (wr) { | ||
368 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); | ||
369 | wqe = (union t3_wr *) (qhp->wq.queue + idx); | ||
370 | if (num_wrs) | ||
371 | err = iwch_build_rdma_recv(qhp->rhp, wqe, wr); | ||
372 | else | ||
373 | err = -ENOMEM; | ||
374 | if (err) { | ||
375 | *bad_wr = wr; | ||
376 | break; | ||
377 | } | ||
378 | qhp->wq.rq[Q_PTR2IDX(qhp->wq.rq_wptr, qhp->wq.rq_size_log2)] = | ||
379 | wr->wr_id; | ||
380 | build_fw_riwrh((void *) wqe, T3_WR_RCV, T3_COMPLETION_FLAG, | ||
381 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), | ||
382 | 0, sizeof(struct t3_receive_wr) >> 3); | ||
383 | PDBG("%s cookie 0x%llx idx 0x%x rq_wptr 0x%x rw_rptr 0x%x " | ||
384 | "wqe %p \n", __FUNCTION__, (unsigned long long) wr->wr_id, | ||
385 | idx, qhp->wq.rq_wptr, qhp->wq.rq_rptr, wqe); | ||
386 | ++(qhp->wq.rq_wptr); | ||
387 | ++(qhp->wq.wptr); | ||
388 | wr = wr->next; | ||
389 | num_wrs--; | ||
390 | } | ||
391 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
392 | ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); | ||
393 | return err; | ||
394 | } | ||
395 | |||
396 | int iwch_bind_mw(struct ib_qp *qp, | ||
397 | struct ib_mw *mw, | ||
398 | struct ib_mw_bind *mw_bind) | ||
399 | { | ||
400 | struct iwch_dev *rhp; | ||
401 | struct iwch_mw *mhp; | ||
402 | struct iwch_qp *qhp; | ||
403 | union t3_wr *wqe; | ||
404 | u32 pbl_addr; | ||
405 | u8 page_size; | ||
406 | u32 num_wrs; | ||
407 | unsigned long flag; | ||
408 | struct ib_sge sgl; | ||
409 | int err=0; | ||
410 | enum t3_wr_flags t3_wr_flags; | ||
411 | u32 idx; | ||
412 | struct t3_swsq *sqp; | ||
413 | |||
414 | qhp = to_iwch_qp(qp); | ||
415 | mhp = to_iwch_mw(mw); | ||
416 | rhp = qhp->rhp; | ||
417 | |||
418 | spin_lock_irqsave(&qhp->lock, flag); | ||
419 | if (qhp->attr.state > IWCH_QP_STATE_RTS) { | ||
420 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
421 | return -EINVAL; | ||
422 | } | ||
423 | num_wrs = Q_FREECNT(qhp->wq.sq_rptr, qhp->wq.sq_wptr, | ||
424 | qhp->wq.sq_size_log2); | ||
425 | if ((num_wrs) <= 0) { | ||
426 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
427 | return -ENOMEM; | ||
428 | } | ||
429 | idx = Q_PTR2IDX(qhp->wq.wptr, qhp->wq.size_log2); | ||
430 | PDBG("%s: idx 0x%0x, mw 0x%p, mw_bind 0x%p\n", __FUNCTION__, idx, | ||
431 | mw, mw_bind); | ||
432 | wqe = (union t3_wr *) (qhp->wq.queue + idx); | ||
433 | |||
434 | t3_wr_flags = 0; | ||
435 | if (mw_bind->send_flags & IB_SEND_SIGNALED) | ||
436 | t3_wr_flags = T3_COMPLETION_FLAG; | ||
437 | |||
438 | sgl.addr = mw_bind->addr; | ||
439 | sgl.lkey = mw_bind->mr->lkey; | ||
440 | sgl.length = mw_bind->length; | ||
441 | wqe->bind.reserved = 0; | ||
442 | wqe->bind.type = T3_VA_BASED_TO; | ||
443 | |||
444 | /* TBD: check perms */ | ||
445 | wqe->bind.perms = iwch_convert_access(mw_bind->mw_access_flags); | ||
446 | wqe->bind.mr_stag = cpu_to_be32(mw_bind->mr->lkey); | ||
447 | wqe->bind.mw_stag = cpu_to_be32(mw->rkey); | ||
448 | wqe->bind.mw_len = cpu_to_be32(mw_bind->length); | ||
449 | wqe->bind.mw_va = cpu_to_be64(mw_bind->addr); | ||
450 | err = iwch_sgl2pbl_map(rhp, &sgl, 1, &pbl_addr, &page_size); | ||
451 | if (err) { | ||
452 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
453 | return err; | ||
454 | } | ||
455 | wqe->send.wrid.id0.hi = qhp->wq.sq_wptr; | ||
456 | sqp = qhp->wq.sq + Q_PTR2IDX(qhp->wq.sq_wptr, qhp->wq.sq_size_log2); | ||
457 | sqp->wr_id = mw_bind->wr_id; | ||
458 | sqp->opcode = T3_BIND_MW; | ||
459 | sqp->sq_wptr = qhp->wq.sq_wptr; | ||
460 | sqp->complete = 0; | ||
461 | sqp->signaled = (mw_bind->send_flags & IB_SEND_SIGNALED); | ||
462 | wqe->bind.mr_pbl_addr = cpu_to_be32(pbl_addr); | ||
463 | wqe->bind.mr_pagesz = page_size; | ||
464 | wqe->flit[T3_SQ_COOKIE_FLIT] = mw_bind->wr_id; | ||
465 | build_fw_riwrh((void *)wqe, T3_WR_BIND, t3_wr_flags, | ||
466 | Q_GENBIT(qhp->wq.wptr, qhp->wq.size_log2), 0, | ||
467 | sizeof(struct t3_bind_mw_wr) >> 3); | ||
468 | ++(qhp->wq.wptr); | ||
469 | ++(qhp->wq.sq_wptr); | ||
470 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
471 | |||
472 | ring_doorbell(qhp->wq.doorbell, qhp->wq.qpid); | ||
473 | |||
474 | return err; | ||
475 | } | ||
476 | |||
477 | static inline void build_term_codes(int t3err, u8 *layer_type, u8 *ecode, | ||
478 | int tagged) | ||
479 | { | ||
480 | switch (t3err) { | ||
481 | case TPT_ERR_STAG: | ||
482 | if (tagged == 1) { | ||
483 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; | ||
484 | *ecode = DDPT_INV_STAG; | ||
485 | } else if (tagged == 2) { | ||
486 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; | ||
487 | *ecode = RDMAP_INV_STAG; | ||
488 | } | ||
489 | break; | ||
490 | case TPT_ERR_PDID: | ||
491 | case TPT_ERR_QPID: | ||
492 | case TPT_ERR_ACCESS: | ||
493 | if (tagged == 1) { | ||
494 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; | ||
495 | *ecode = DDPT_STAG_NOT_ASSOC; | ||
496 | } else if (tagged == 2) { | ||
497 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; | ||
498 | *ecode = RDMAP_STAG_NOT_ASSOC; | ||
499 | } | ||
500 | break; | ||
501 | case TPT_ERR_WRAP: | ||
502 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; | ||
503 | *ecode = RDMAP_TO_WRAP; | ||
504 | break; | ||
505 | case TPT_ERR_BOUND: | ||
506 | if (tagged == 1) { | ||
507 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; | ||
508 | *ecode = DDPT_BASE_BOUNDS; | ||
509 | } else if (tagged == 2) { | ||
510 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_PROT; | ||
511 | *ecode = RDMAP_BASE_BOUNDS; | ||
512 | } else { | ||
513 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
514 | *ecode = DDPU_MSG_TOOBIG; | ||
515 | } | ||
516 | break; | ||
517 | case TPT_ERR_INVALIDATE_SHARED_MR: | ||
518 | case TPT_ERR_INVALIDATE_MR_WITH_MW_BOUND: | ||
519 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; | ||
520 | *ecode = RDMAP_CANT_INV_STAG; | ||
521 | break; | ||
522 | case TPT_ERR_ECC: | ||
523 | case TPT_ERR_ECC_PSTAG: | ||
524 | case TPT_ERR_INTERNAL_ERR: | ||
525 | *layer_type = LAYER_RDMAP|RDMAP_LOCAL_CATA; | ||
526 | *ecode = 0; | ||
527 | break; | ||
528 | case TPT_ERR_OUT_OF_RQE: | ||
529 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
530 | *ecode = DDPU_INV_MSN_NOBUF; | ||
531 | break; | ||
532 | case TPT_ERR_PBL_ADDR_BOUND: | ||
533 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; | ||
534 | *ecode = DDPT_BASE_BOUNDS; | ||
535 | break; | ||
536 | case TPT_ERR_CRC: | ||
537 | *layer_type = LAYER_MPA|DDP_LLP; | ||
538 | *ecode = MPA_CRC_ERR; | ||
539 | break; | ||
540 | case TPT_ERR_MARKER: | ||
541 | *layer_type = LAYER_MPA|DDP_LLP; | ||
542 | *ecode = MPA_MARKER_ERR; | ||
543 | break; | ||
544 | case TPT_ERR_PDU_LEN_ERR: | ||
545 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
546 | *ecode = DDPU_MSG_TOOBIG; | ||
547 | break; | ||
548 | case TPT_ERR_DDP_VERSION: | ||
549 | if (tagged) { | ||
550 | *layer_type = LAYER_DDP|DDP_TAGGED_ERR; | ||
551 | *ecode = DDPT_INV_VERS; | ||
552 | } else { | ||
553 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
554 | *ecode = DDPU_INV_VERS; | ||
555 | } | ||
556 | break; | ||
557 | case TPT_ERR_RDMA_VERSION: | ||
558 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; | ||
559 | *ecode = RDMAP_INV_VERS; | ||
560 | break; | ||
561 | case TPT_ERR_OPCODE: | ||
562 | *layer_type = LAYER_RDMAP|RDMAP_REMOTE_OP; | ||
563 | *ecode = RDMAP_INV_OPCODE; | ||
564 | break; | ||
565 | case TPT_ERR_DDP_QUEUE_NUM: | ||
566 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
567 | *ecode = DDPU_INV_QN; | ||
568 | break; | ||
569 | case TPT_ERR_MSN: | ||
570 | case TPT_ERR_MSN_GAP: | ||
571 | case TPT_ERR_MSN_RANGE: | ||
572 | case TPT_ERR_IRD_OVERFLOW: | ||
573 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
574 | *ecode = DDPU_INV_MSN_RANGE; | ||
575 | break; | ||
576 | case TPT_ERR_TBIT: | ||
577 | *layer_type = LAYER_DDP|DDP_LOCAL_CATA; | ||
578 | *ecode = 0; | ||
579 | break; | ||
580 | case TPT_ERR_MO: | ||
581 | *layer_type = LAYER_DDP|DDP_UNTAGGED_ERR; | ||
582 | *ecode = DDPU_INV_MO; | ||
583 | break; | ||
584 | default: | ||
585 | *layer_type = LAYER_RDMAP|DDP_LOCAL_CATA; | ||
586 | *ecode = 0; | ||
587 | break; | ||
588 | } | ||
589 | } | ||
590 | |||
591 | /* | ||
592 | * This posts a TERMINATE with layer=RDMA, type=catastrophic. | ||
593 | */ | ||
594 | int iwch_post_terminate(struct iwch_qp *qhp, struct respQ_msg_t *rsp_msg) | ||
595 | { | ||
596 | union t3_wr *wqe; | ||
597 | struct terminate_message *term; | ||
598 | int status; | ||
599 | int tagged = 0; | ||
600 | struct sk_buff *skb; | ||
601 | |||
602 | PDBG("%s %d\n", __FUNCTION__, __LINE__); | ||
603 | skb = alloc_skb(40, GFP_ATOMIC); | ||
604 | if (!skb) { | ||
605 | printk(KERN_ERR "%s cannot send TERMINATE!\n", __FUNCTION__); | ||
606 | return -ENOMEM; | ||
607 | } | ||
608 | wqe = (union t3_wr *)skb_put(skb, 40); | ||
609 | memset(wqe, 0, 40); | ||
610 | wqe->send.rdmaop = T3_TERMINATE; | ||
611 | |||
612 | /* immediate data length */ | ||
613 | wqe->send.plen = htonl(4); | ||
614 | |||
615 | /* immediate data starts here. */ | ||
616 | term = (struct terminate_message *)wqe->send.sgl; | ||
617 | if (rsp_msg) { | ||
618 | status = CQE_STATUS(rsp_msg->cqe); | ||
619 | if (CQE_OPCODE(rsp_msg->cqe) == T3_RDMA_WRITE) | ||
620 | tagged = 1; | ||
621 | if ((CQE_OPCODE(rsp_msg->cqe) == T3_READ_REQ) || | ||
622 | (CQE_OPCODE(rsp_msg->cqe) == T3_READ_RESP)) | ||
623 | tagged = 2; | ||
624 | } else { | ||
625 | status = TPT_ERR_INTERNAL_ERR; | ||
626 | } | ||
627 | build_term_codes(status, &term->layer_etype, &term->ecode, tagged); | ||
628 | build_fw_riwrh((void *)wqe, T3_WR_SEND, | ||
629 | T3_COMPLETION_FLAG | T3_NOTIFY_FLAG, 1, | ||
630 | qhp->ep->hwtid, 5); | ||
631 | skb->priority = CPL_PRIORITY_DATA; | ||
632 | return cxgb3_ofld_send(qhp->rhp->rdev.t3cdev_p, skb); | ||
633 | } | ||
634 | |||
635 | /* | ||
636 | * Assumes qhp lock is held. | ||
637 | */ | ||
638 | static void __flush_qp(struct iwch_qp *qhp, unsigned long *flag) | ||
639 | { | ||
640 | struct iwch_cq *rchp, *schp; | ||
641 | int count; | ||
642 | |||
643 | rchp = get_chp(qhp->rhp, qhp->attr.rcq); | ||
644 | schp = get_chp(qhp->rhp, qhp->attr.scq); | ||
645 | |||
646 | PDBG("%s qhp %p rchp %p schp %p\n", __FUNCTION__, qhp, rchp, schp); | ||
647 | /* take a ref on the qhp since we must release the lock */ | ||
648 | atomic_inc(&qhp->refcnt); | ||
649 | spin_unlock_irqrestore(&qhp->lock, *flag); | ||
650 | |||
651 | /* locking heirarchy: cq lock first, then qp lock. */ | ||
652 | spin_lock_irqsave(&rchp->lock, *flag); | ||
653 | spin_lock(&qhp->lock); | ||
654 | cxio_flush_hw_cq(&rchp->cq); | ||
655 | cxio_count_rcqes(&rchp->cq, &qhp->wq, &count); | ||
656 | cxio_flush_rq(&qhp->wq, &rchp->cq, count); | ||
657 | spin_unlock(&qhp->lock); | ||
658 | spin_unlock_irqrestore(&rchp->lock, *flag); | ||
659 | |||
660 | /* locking heirarchy: cq lock first, then qp lock. */ | ||
661 | spin_lock_irqsave(&schp->lock, *flag); | ||
662 | spin_lock(&qhp->lock); | ||
663 | cxio_flush_hw_cq(&schp->cq); | ||
664 | cxio_count_scqes(&schp->cq, &qhp->wq, &count); | ||
665 | cxio_flush_sq(&qhp->wq, &schp->cq, count); | ||
666 | spin_unlock(&qhp->lock); | ||
667 | spin_unlock_irqrestore(&schp->lock, *flag); | ||
668 | |||
669 | /* deref */ | ||
670 | if (atomic_dec_and_test(&qhp->refcnt)) | ||
671 | wake_up(&qhp->wait); | ||
672 | |||
673 | spin_lock_irqsave(&qhp->lock, *flag); | ||
674 | } | ||
675 | |||
676 | static inline void flush_qp(struct iwch_qp *qhp, unsigned long *flag) | ||
677 | { | ||
678 | if (t3b_device(qhp->rhp)) | ||
679 | cxio_set_wq_in_error(&qhp->wq); | ||
680 | else | ||
681 | __flush_qp(qhp, flag); | ||
682 | } | ||
683 | |||
684 | |||
685 | /* | ||
686 | * Return non zero if at least one RECV was pre-posted. | ||
687 | */ | ||
688 | static inline int rqes_posted(struct iwch_qp *qhp) | ||
689 | { | ||
690 | return fw_riwrh_opcode((struct fw_riwrh *)qhp->wq.queue) == T3_WR_RCV; | ||
691 | } | ||
692 | |||
693 | static int rdma_init(struct iwch_dev *rhp, struct iwch_qp *qhp, | ||
694 | enum iwch_qp_attr_mask mask, | ||
695 | struct iwch_qp_attributes *attrs) | ||
696 | { | ||
697 | struct t3_rdma_init_attr init_attr; | ||
698 | int ret; | ||
699 | |||
700 | init_attr.tid = qhp->ep->hwtid; | ||
701 | init_attr.qpid = qhp->wq.qpid; | ||
702 | init_attr.pdid = qhp->attr.pd; | ||
703 | init_attr.scqid = qhp->attr.scq; | ||
704 | init_attr.rcqid = qhp->attr.rcq; | ||
705 | init_attr.rq_addr = qhp->wq.rq_addr; | ||
706 | init_attr.rq_size = 1 << qhp->wq.rq_size_log2; | ||
707 | init_attr.mpaattrs = uP_RI_MPA_IETF_ENABLE | | ||
708 | qhp->attr.mpa_attr.recv_marker_enabled | | ||
709 | (qhp->attr.mpa_attr.xmit_marker_enabled << 1) | | ||
710 | (qhp->attr.mpa_attr.crc_enabled << 2); | ||
711 | |||
712 | /* | ||
713 | * XXX - The IWCM doesn't quite handle getting these | ||
714 | * attrs set before going into RTS. For now, just turn | ||
715 | * them on always... | ||
716 | */ | ||
717 | #if 0 | ||
718 | init_attr.qpcaps = qhp->attr.enableRdmaRead | | ||
719 | (qhp->attr.enableRdmaWrite << 1) | | ||
720 | (qhp->attr.enableBind << 2) | | ||
721 | (qhp->attr.enable_stag0_fastreg << 3) | | ||
722 | (qhp->attr.enable_stag0_fastreg << 4); | ||
723 | #else | ||
724 | init_attr.qpcaps = 0x1f; | ||
725 | #endif | ||
726 | init_attr.tcp_emss = qhp->ep->emss; | ||
727 | init_attr.ord = qhp->attr.max_ord; | ||
728 | init_attr.ird = qhp->attr.max_ird; | ||
729 | init_attr.qp_dma_addr = qhp->wq.dma_addr; | ||
730 | init_attr.qp_dma_size = (1UL << qhp->wq.size_log2); | ||
731 | init_attr.flags = rqes_posted(qhp) ? RECVS_POSTED : 0; | ||
732 | PDBG("%s init_attr.rq_addr 0x%x init_attr.rq_size = %d " | ||
733 | "flags 0x%x qpcaps 0x%x\n", __FUNCTION__, | ||
734 | init_attr.rq_addr, init_attr.rq_size, | ||
735 | init_attr.flags, init_attr.qpcaps); | ||
736 | ret = cxio_rdma_init(&rhp->rdev, &init_attr); | ||
737 | PDBG("%s ret %d\n", __FUNCTION__, ret); | ||
738 | return ret; | ||
739 | } | ||
740 | |||
741 | int iwch_modify_qp(struct iwch_dev *rhp, struct iwch_qp *qhp, | ||
742 | enum iwch_qp_attr_mask mask, | ||
743 | struct iwch_qp_attributes *attrs, | ||
744 | int internal) | ||
745 | { | ||
746 | int ret = 0; | ||
747 | struct iwch_qp_attributes newattr = qhp->attr; | ||
748 | unsigned long flag; | ||
749 | int disconnect = 0; | ||
750 | int terminate = 0; | ||
751 | int abort = 0; | ||
752 | int free = 0; | ||
753 | struct iwch_ep *ep = NULL; | ||
754 | |||
755 | PDBG("%s qhp %p qpid 0x%x ep %p state %d -> %d\n", __FUNCTION__, | ||
756 | qhp, qhp->wq.qpid, qhp->ep, qhp->attr.state, | ||
757 | (mask & IWCH_QP_ATTR_NEXT_STATE) ? attrs->next_state : -1); | ||
758 | |||
759 | spin_lock_irqsave(&qhp->lock, flag); | ||
760 | |||
761 | /* Process attr changes if in IDLE */ | ||
762 | if (mask & IWCH_QP_ATTR_VALID_MODIFY) { | ||
763 | if (qhp->attr.state != IWCH_QP_STATE_IDLE) { | ||
764 | ret = -EIO; | ||
765 | goto out; | ||
766 | } | ||
767 | if (mask & IWCH_QP_ATTR_ENABLE_RDMA_READ) | ||
768 | newattr.enable_rdma_read = attrs->enable_rdma_read; | ||
769 | if (mask & IWCH_QP_ATTR_ENABLE_RDMA_WRITE) | ||
770 | newattr.enable_rdma_write = attrs->enable_rdma_write; | ||
771 | if (mask & IWCH_QP_ATTR_ENABLE_RDMA_BIND) | ||
772 | newattr.enable_bind = attrs->enable_bind; | ||
773 | if (mask & IWCH_QP_ATTR_MAX_ORD) { | ||
774 | if (attrs->max_ord > | ||
775 | rhp->attr.max_rdma_read_qp_depth) { | ||
776 | ret = -EINVAL; | ||
777 | goto out; | ||
778 | } | ||
779 | newattr.max_ord = attrs->max_ord; | ||
780 | } | ||
781 | if (mask & IWCH_QP_ATTR_MAX_IRD) { | ||
782 | if (attrs->max_ird > | ||
783 | rhp->attr.max_rdma_reads_per_qp) { | ||
784 | ret = -EINVAL; | ||
785 | goto out; | ||
786 | } | ||
787 | newattr.max_ird = attrs->max_ird; | ||
788 | } | ||
789 | qhp->attr = newattr; | ||
790 | } | ||
791 | |||
792 | if (!(mask & IWCH_QP_ATTR_NEXT_STATE)) | ||
793 | goto out; | ||
794 | if (qhp->attr.state == attrs->next_state) | ||
795 | goto out; | ||
796 | |||
797 | switch (qhp->attr.state) { | ||
798 | case IWCH_QP_STATE_IDLE: | ||
799 | switch (attrs->next_state) { | ||
800 | case IWCH_QP_STATE_RTS: | ||
801 | if (!(mask & IWCH_QP_ATTR_LLP_STREAM_HANDLE)) { | ||
802 | ret = -EINVAL; | ||
803 | goto out; | ||
804 | } | ||
805 | if (!(mask & IWCH_QP_ATTR_MPA_ATTR)) { | ||
806 | ret = -EINVAL; | ||
807 | goto out; | ||
808 | } | ||
809 | qhp->attr.mpa_attr = attrs->mpa_attr; | ||
810 | qhp->attr.llp_stream_handle = attrs->llp_stream_handle; | ||
811 | qhp->ep = qhp->attr.llp_stream_handle; | ||
812 | qhp->attr.state = IWCH_QP_STATE_RTS; | ||
813 | |||
814 | /* | ||
815 | * Ref the endpoint here and deref when we | ||
816 | * disassociate the endpoint from the QP. This | ||
817 | * happens in CLOSING->IDLE transition or *->ERROR | ||
818 | * transition. | ||
819 | */ | ||
820 | get_ep(&qhp->ep->com); | ||
821 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
822 | ret = rdma_init(rhp, qhp, mask, attrs); | ||
823 | spin_lock_irqsave(&qhp->lock, flag); | ||
824 | if (ret) | ||
825 | goto err; | ||
826 | break; | ||
827 | case IWCH_QP_STATE_ERROR: | ||
828 | qhp->attr.state = IWCH_QP_STATE_ERROR; | ||
829 | flush_qp(qhp, &flag); | ||
830 | break; | ||
831 | default: | ||
832 | ret = -EINVAL; | ||
833 | goto out; | ||
834 | } | ||
835 | break; | ||
836 | case IWCH_QP_STATE_RTS: | ||
837 | switch (attrs->next_state) { | ||
838 | case IWCH_QP_STATE_CLOSING: | ||
839 | BUG_ON(atomic_read(&qhp->ep->com.kref.refcount) < 2); | ||
840 | qhp->attr.state = IWCH_QP_STATE_CLOSING; | ||
841 | if (!internal) { | ||
842 | abort=0; | ||
843 | disconnect = 1; | ||
844 | ep = qhp->ep; | ||
845 | } | ||
846 | break; | ||
847 | case IWCH_QP_STATE_TERMINATE: | ||
848 | qhp->attr.state = IWCH_QP_STATE_TERMINATE; | ||
849 | if (!internal) | ||
850 | terminate = 1; | ||
851 | break; | ||
852 | case IWCH_QP_STATE_ERROR: | ||
853 | qhp->attr.state = IWCH_QP_STATE_ERROR; | ||
854 | if (!internal) { | ||
855 | abort=1; | ||
856 | disconnect = 1; | ||
857 | ep = qhp->ep; | ||
858 | } | ||
859 | goto err; | ||
860 | break; | ||
861 | default: | ||
862 | ret = -EINVAL; | ||
863 | goto out; | ||
864 | } | ||
865 | break; | ||
866 | case IWCH_QP_STATE_CLOSING: | ||
867 | if (!internal) { | ||
868 | ret = -EINVAL; | ||
869 | goto out; | ||
870 | } | ||
871 | switch (attrs->next_state) { | ||
872 | case IWCH_QP_STATE_IDLE: | ||
873 | qhp->attr.state = IWCH_QP_STATE_IDLE; | ||
874 | qhp->attr.llp_stream_handle = NULL; | ||
875 | put_ep(&qhp->ep->com); | ||
876 | qhp->ep = NULL; | ||
877 | wake_up(&qhp->wait); | ||
878 | break; | ||
879 | case IWCH_QP_STATE_ERROR: | ||
880 | goto err; | ||
881 | default: | ||
882 | ret = -EINVAL; | ||
883 | goto err; | ||
884 | } | ||
885 | break; | ||
886 | case IWCH_QP_STATE_ERROR: | ||
887 | if (attrs->next_state != IWCH_QP_STATE_IDLE) { | ||
888 | ret = -EINVAL; | ||
889 | goto out; | ||
890 | } | ||
891 | |||
892 | if (!Q_EMPTY(qhp->wq.sq_rptr, qhp->wq.sq_wptr) || | ||
893 | !Q_EMPTY(qhp->wq.rq_rptr, qhp->wq.rq_wptr)) { | ||
894 | ret = -EINVAL; | ||
895 | goto out; | ||
896 | } | ||
897 | qhp->attr.state = IWCH_QP_STATE_IDLE; | ||
898 | memset(&qhp->attr, 0, sizeof(qhp->attr)); | ||
899 | break; | ||
900 | case IWCH_QP_STATE_TERMINATE: | ||
901 | if (!internal) { | ||
902 | ret = -EINVAL; | ||
903 | goto out; | ||
904 | } | ||
905 | goto err; | ||
906 | break; | ||
907 | default: | ||
908 | printk(KERN_ERR "%s in a bad state %d\n", | ||
909 | __FUNCTION__, qhp->attr.state); | ||
910 | ret = -EINVAL; | ||
911 | goto err; | ||
912 | break; | ||
913 | } | ||
914 | goto out; | ||
915 | err: | ||
916 | PDBG("%s disassociating ep %p qpid 0x%x\n", __FUNCTION__, qhp->ep, | ||
917 | qhp->wq.qpid); | ||
918 | |||
919 | /* disassociate the LLP connection */ | ||
920 | qhp->attr.llp_stream_handle = NULL; | ||
921 | ep = qhp->ep; | ||
922 | qhp->ep = NULL; | ||
923 | qhp->attr.state = IWCH_QP_STATE_ERROR; | ||
924 | free=1; | ||
925 | wake_up(&qhp->wait); | ||
926 | BUG_ON(!ep); | ||
927 | flush_qp(qhp, &flag); | ||
928 | out: | ||
929 | spin_unlock_irqrestore(&qhp->lock, flag); | ||
930 | |||
931 | if (terminate) | ||
932 | iwch_post_terminate(qhp, NULL); | ||
933 | |||
934 | /* | ||
935 | * If disconnect is 1, then we need to initiate a disconnect | ||
936 | * on the EP. This can be a normal close (RTS->CLOSING) or | ||
937 | * an abnormal close (RTS/CLOSING->ERROR). | ||
938 | */ | ||
939 | if (disconnect) | ||
940 | iwch_ep_disconnect(ep, abort, GFP_KERNEL); | ||
941 | |||
942 | /* | ||
943 | * If free is 1, then we've disassociated the EP from the QP | ||
944 | * and we need to dereference the EP. | ||
945 | */ | ||
946 | if (free) | ||
947 | put_ep(&ep->com); | ||
948 | |||
949 | PDBG("%s exit state %d\n", __FUNCTION__, qhp->attr.state); | ||
950 | return ret; | ||
951 | } | ||
952 | |||
953 | static int quiesce_qp(struct iwch_qp *qhp) | ||
954 | { | ||
955 | spin_lock_irq(&qhp->lock); | ||
956 | iwch_quiesce_tid(qhp->ep); | ||
957 | qhp->flags |= QP_QUIESCED; | ||
958 | spin_unlock_irq(&qhp->lock); | ||
959 | return 0; | ||
960 | } | ||
961 | |||
962 | static int resume_qp(struct iwch_qp *qhp) | ||
963 | { | ||
964 | spin_lock_irq(&qhp->lock); | ||
965 | iwch_resume_tid(qhp->ep); | ||
966 | qhp->flags &= ~QP_QUIESCED; | ||
967 | spin_unlock_irq(&qhp->lock); | ||
968 | return 0; | ||
969 | } | ||
970 | |||
971 | int iwch_quiesce_qps(struct iwch_cq *chp) | ||
972 | { | ||
973 | int i; | ||
974 | struct iwch_qp *qhp; | ||
975 | |||
976 | for (i=0; i < T3_MAX_NUM_QP; i++) { | ||
977 | qhp = get_qhp(chp->rhp, i); | ||
978 | if (!qhp) | ||
979 | continue; | ||
980 | if ((qhp->attr.rcq == chp->cq.cqid) && !qp_quiesced(qhp)) { | ||
981 | quiesce_qp(qhp); | ||
982 | continue; | ||
983 | } | ||
984 | if ((qhp->attr.scq == chp->cq.cqid) && !qp_quiesced(qhp)) | ||
985 | quiesce_qp(qhp); | ||
986 | } | ||
987 | return 0; | ||
988 | } | ||
989 | |||
990 | int iwch_resume_qps(struct iwch_cq *chp) | ||
991 | { | ||
992 | int i; | ||
993 | struct iwch_qp *qhp; | ||
994 | |||
995 | for (i=0; i < T3_MAX_NUM_QP; i++) { | ||
996 | qhp = get_qhp(chp->rhp, i); | ||
997 | if (!qhp) | ||
998 | continue; | ||
999 | if ((qhp->attr.rcq == chp->cq.cqid) && qp_quiesced(qhp)) { | ||
1000 | resume_qp(qhp); | ||
1001 | continue; | ||
1002 | } | ||
1003 | if ((qhp->attr.scq == chp->cq.cqid) && qp_quiesced(qhp)) | ||
1004 | resume_qp(qhp); | ||
1005 | } | ||
1006 | return 0; | ||
1007 | } | ||
diff --git a/drivers/infiniband/hw/cxgb3/iwch_user.h b/drivers/infiniband/hw/cxgb3/iwch_user.h new file mode 100644 index 000000000000..c4e7fbea8bbd --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/iwch_user.h | |||
@@ -0,0 +1,67 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Chelsio, Inc. All rights reserved. | ||
3 | * Copyright (c) 2006 Open Grid Computing, Inc. All rights reserved. | ||
4 | * | ||
5 | * This software is available to you under a choice of one of two | ||
6 | * licenses. You may choose to be licensed under the terms of the GNU | ||
7 | * General Public License (GPL) Version 2, available from the file | ||
8 | * COPYING in the main directory of this source tree, or the | ||
9 | * OpenIB.org BSD license below: | ||
10 | * | ||
11 | * Redistribution and use in source and binary forms, with or | ||
12 | * without modification, are permitted provided that the following | ||
13 | * conditions are met: | ||
14 | * | ||
15 | * - Redistributions of source code must retain the above | ||
16 | * copyright notice, this list of conditions and the following | ||
17 | * disclaimer. | ||
18 | * | ||
19 | * - Redistributions in binary form must reproduce the above | ||
20 | * copyright notice, this list of conditions and the following | ||
21 | * disclaimer in the documentation and/or other materials | ||
22 | * provided with the distribution. | ||
23 | * | ||
24 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
25 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
26 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
27 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
28 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
29 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
30 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
31 | * SOFTWARE. | ||
32 | */ | ||
33 | #ifndef __IWCH_USER_H__ | ||
34 | #define __IWCH_USER_H__ | ||
35 | |||
36 | #define IWCH_UVERBS_ABI_VERSION 1 | ||
37 | |||
38 | /* | ||
39 | * Make sure that all structs defined in this file remain laid out so | ||
40 | * that they pack the same way on 32-bit and 64-bit architectures (to | ||
41 | * avoid incompatibility between 32-bit userspace and 64-bit kernels). | ||
42 | * In particular do not use pointer types -- pass pointers in __u64 | ||
43 | * instead. | ||
44 | */ | ||
45 | struct iwch_create_cq_req { | ||
46 | __u64 user_rptr_addr; | ||
47 | }; | ||
48 | |||
49 | struct iwch_create_cq_resp { | ||
50 | __u64 key; | ||
51 | __u32 cqid; | ||
52 | __u32 size_log2; | ||
53 | }; | ||
54 | |||
55 | struct iwch_create_qp_resp { | ||
56 | __u64 key; | ||
57 | __u64 db_key; | ||
58 | __u32 qpid; | ||
59 | __u32 size_log2; | ||
60 | __u32 sq_size_log2; | ||
61 | __u32 rq_size_log2; | ||
62 | }; | ||
63 | |||
64 | struct iwch_reg_user_mr_resp { | ||
65 | __u32 pbl_addr; | ||
66 | }; | ||
67 | #endif | ||
diff --git a/drivers/infiniband/hw/cxgb3/tcb.h b/drivers/infiniband/hw/cxgb3/tcb.h new file mode 100644 index 000000000000..c702dc199e18 --- /dev/null +++ b/drivers/infiniband/hw/cxgb3/tcb.h | |||
@@ -0,0 +1,632 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2007 Chelsio, Inc. All rights reserved. | ||
3 | * | ||
4 | * This software is available to you under a choice of one of two | ||
5 | * licenses. You may choose to be licensed under the terms of the GNU | ||
6 | * General Public License (GPL) Version 2, available from the file | ||
7 | * COPYING in the main directory of this source tree, or the | ||
8 | * OpenIB.org BSD license below: | ||
9 | * | ||
10 | * Redistribution and use in source and binary forms, with or | ||
11 | * without modification, are permitted provided that the following | ||
12 | * conditions are met: | ||
13 | * | ||
14 | * - Redistributions of source code must retain the above | ||
15 | * copyright notice, this list of conditions and the following | ||
16 | * disclaimer. | ||
17 | * | ||
18 | * - Redistributions in binary form must reproduce the above | ||
19 | * copyright notice, this list of conditions and the following | ||
20 | * disclaimer in the documentation and/or other materials | ||
21 | * provided with the distribution. | ||
22 | * | ||
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
30 | * SOFTWARE. | ||
31 | */ | ||
32 | #ifndef _TCB_DEFS_H | ||
33 | #define _TCB_DEFS_H | ||
34 | |||
35 | #define W_TCB_T_STATE 0 | ||
36 | #define S_TCB_T_STATE 0 | ||
37 | #define M_TCB_T_STATE 0xfULL | ||
38 | #define V_TCB_T_STATE(x) ((x) << S_TCB_T_STATE) | ||
39 | |||
40 | #define W_TCB_TIMER 0 | ||
41 | #define S_TCB_TIMER 4 | ||
42 | #define M_TCB_TIMER 0x1ULL | ||
43 | #define V_TCB_TIMER(x) ((x) << S_TCB_TIMER) | ||
44 | |||
45 | #define W_TCB_DACK_TIMER 0 | ||
46 | #define S_TCB_DACK_TIMER 5 | ||
47 | #define M_TCB_DACK_TIMER 0x1ULL | ||
48 | #define V_TCB_DACK_TIMER(x) ((x) << S_TCB_DACK_TIMER) | ||
49 | |||
50 | #define W_TCB_DEL_FLAG 0 | ||
51 | #define S_TCB_DEL_FLAG 6 | ||
52 | #define M_TCB_DEL_FLAG 0x1ULL | ||
53 | #define V_TCB_DEL_FLAG(x) ((x) << S_TCB_DEL_FLAG) | ||
54 | |||
55 | #define W_TCB_L2T_IX 0 | ||
56 | #define S_TCB_L2T_IX 7 | ||
57 | #define M_TCB_L2T_IX 0x7ffULL | ||
58 | #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX) | ||
59 | |||
60 | #define W_TCB_SMAC_SEL 0 | ||
61 | #define S_TCB_SMAC_SEL 18 | ||
62 | #define M_TCB_SMAC_SEL 0x3ULL | ||
63 | #define V_TCB_SMAC_SEL(x) ((x) << S_TCB_SMAC_SEL) | ||
64 | |||
65 | #define W_TCB_TOS 0 | ||
66 | #define S_TCB_TOS 20 | ||
67 | #define M_TCB_TOS 0x3fULL | ||
68 | #define V_TCB_TOS(x) ((x) << S_TCB_TOS) | ||
69 | |||
70 | #define W_TCB_MAX_RT 0 | ||
71 | #define S_TCB_MAX_RT 26 | ||
72 | #define M_TCB_MAX_RT 0xfULL | ||
73 | #define V_TCB_MAX_RT(x) ((x) << S_TCB_MAX_RT) | ||
74 | |||
75 | #define W_TCB_T_RXTSHIFT 0 | ||
76 | #define S_TCB_T_RXTSHIFT 30 | ||
77 | #define M_TCB_T_RXTSHIFT 0xfULL | ||
78 | #define V_TCB_T_RXTSHIFT(x) ((x) << S_TCB_T_RXTSHIFT) | ||
79 | |||
80 | #define W_TCB_T_DUPACKS 1 | ||
81 | #define S_TCB_T_DUPACKS 2 | ||
82 | #define M_TCB_T_DUPACKS 0xfULL | ||
83 | #define V_TCB_T_DUPACKS(x) ((x) << S_TCB_T_DUPACKS) | ||
84 | |||
85 | #define W_TCB_T_MAXSEG 1 | ||
86 | #define S_TCB_T_MAXSEG 6 | ||
87 | #define M_TCB_T_MAXSEG 0xfULL | ||
88 | #define V_TCB_T_MAXSEG(x) ((x) << S_TCB_T_MAXSEG) | ||
89 | |||
90 | #define W_TCB_T_FLAGS1 1 | ||
91 | #define S_TCB_T_FLAGS1 10 | ||
92 | #define M_TCB_T_FLAGS1 0xffffffffULL | ||
93 | #define V_TCB_T_FLAGS1(x) ((x) << S_TCB_T_FLAGS1) | ||
94 | |||
95 | #define W_TCB_T_MIGRATION 1 | ||
96 | #define S_TCB_T_MIGRATION 20 | ||
97 | #define M_TCB_T_MIGRATION 0x1ULL | ||
98 | #define V_TCB_T_MIGRATION(x) ((x) << S_TCB_T_MIGRATION) | ||
99 | |||
100 | #define W_TCB_T_FLAGS2 2 | ||
101 | #define S_TCB_T_FLAGS2 10 | ||
102 | #define M_TCB_T_FLAGS2 0x7fULL | ||
103 | #define V_TCB_T_FLAGS2(x) ((x) << S_TCB_T_FLAGS2) | ||
104 | |||
105 | #define W_TCB_SND_SCALE 2 | ||
106 | #define S_TCB_SND_SCALE 17 | ||
107 | #define M_TCB_SND_SCALE 0xfULL | ||
108 | #define V_TCB_SND_SCALE(x) ((x) << S_TCB_SND_SCALE) | ||
109 | |||
110 | #define W_TCB_RCV_SCALE 2 | ||
111 | #define S_TCB_RCV_SCALE 21 | ||
112 | #define M_TCB_RCV_SCALE 0xfULL | ||
113 | #define V_TCB_RCV_SCALE(x) ((x) << S_TCB_RCV_SCALE) | ||
114 | |||
115 | #define W_TCB_SND_UNA_RAW 2 | ||
116 | #define S_TCB_SND_UNA_RAW 25 | ||
117 | #define M_TCB_SND_UNA_RAW 0x7ffffffULL | ||
118 | #define V_TCB_SND_UNA_RAW(x) ((x) << S_TCB_SND_UNA_RAW) | ||
119 | |||
120 | #define W_TCB_SND_NXT_RAW 3 | ||
121 | #define S_TCB_SND_NXT_RAW 20 | ||
122 | #define M_TCB_SND_NXT_RAW 0x7ffffffULL | ||
123 | #define V_TCB_SND_NXT_RAW(x) ((x) << S_TCB_SND_NXT_RAW) | ||
124 | |||
125 | #define W_TCB_RCV_NXT 4 | ||
126 | #define S_TCB_RCV_NXT 15 | ||
127 | #define M_TCB_RCV_NXT 0xffffffffULL | ||
128 | #define V_TCB_RCV_NXT(x) ((x) << S_TCB_RCV_NXT) | ||
129 | |||
130 | #define W_TCB_RCV_ADV 5 | ||
131 | #define S_TCB_RCV_ADV 15 | ||
132 | #define M_TCB_RCV_ADV 0xffffULL | ||
133 | #define V_TCB_RCV_ADV(x) ((x) << S_TCB_RCV_ADV) | ||
134 | |||
135 | #define W_TCB_SND_MAX_RAW 5 | ||
136 | #define S_TCB_SND_MAX_RAW 31 | ||
137 | #define M_TCB_SND_MAX_RAW 0x7ffffffULL | ||
138 | #define V_TCB_SND_MAX_RAW(x) ((x) << S_TCB_SND_MAX_RAW) | ||
139 | |||
140 | #define W_TCB_SND_CWND 6 | ||
141 | #define S_TCB_SND_CWND 26 | ||
142 | #define M_TCB_SND_CWND 0x7ffffffULL | ||
143 | #define V_TCB_SND_CWND(x) ((x) << S_TCB_SND_CWND) | ||
144 | |||
145 | #define W_TCB_SND_SSTHRESH 7 | ||
146 | #define S_TCB_SND_SSTHRESH 21 | ||
147 | #define M_TCB_SND_SSTHRESH 0x7ffffffULL | ||
148 | #define V_TCB_SND_SSTHRESH(x) ((x) << S_TCB_SND_SSTHRESH) | ||
149 | |||
150 | #define W_TCB_T_RTT_TS_RECENT_AGE 8 | ||
151 | #define S_TCB_T_RTT_TS_RECENT_AGE 16 | ||
152 | #define M_TCB_T_RTT_TS_RECENT_AGE 0xffffffffULL | ||
153 | #define V_TCB_T_RTT_TS_RECENT_AGE(x) ((x) << S_TCB_T_RTT_TS_RECENT_AGE) | ||
154 | |||
155 | #define W_TCB_T_RTSEQ_RECENT 9 | ||
156 | #define S_TCB_T_RTSEQ_RECENT 16 | ||
157 | #define M_TCB_T_RTSEQ_RECENT 0xffffffffULL | ||
158 | #define V_TCB_T_RTSEQ_RECENT(x) ((x) << S_TCB_T_RTSEQ_RECENT) | ||
159 | |||
160 | #define W_TCB_T_SRTT 10 | ||
161 | #define S_TCB_T_SRTT 16 | ||
162 | #define M_TCB_T_SRTT 0xffffULL | ||
163 | #define V_TCB_T_SRTT(x) ((x) << S_TCB_T_SRTT) | ||
164 | |||
165 | #define W_TCB_T_RTTVAR 11 | ||
166 | #define S_TCB_T_RTTVAR 0 | ||
167 | #define M_TCB_T_RTTVAR 0xffffULL | ||
168 | #define V_TCB_T_RTTVAR(x) ((x) << S_TCB_T_RTTVAR) | ||
169 | |||
170 | #define W_TCB_TS_LAST_ACK_SENT_RAW 11 | ||
171 | #define S_TCB_TS_LAST_ACK_SENT_RAW 16 | ||
172 | #define M_TCB_TS_LAST_ACK_SENT_RAW 0x7ffffffULL | ||
173 | #define V_TCB_TS_LAST_ACK_SENT_RAW(x) ((x) << S_TCB_TS_LAST_ACK_SENT_RAW) | ||
174 | |||
175 | #define W_TCB_DIP 12 | ||
176 | #define S_TCB_DIP 11 | ||
177 | #define M_TCB_DIP 0xffffffffULL | ||
178 | #define V_TCB_DIP(x) ((x) << S_TCB_DIP) | ||
179 | |||
180 | #define W_TCB_SIP 13 | ||
181 | #define S_TCB_SIP 11 | ||
182 | #define M_TCB_SIP 0xffffffffULL | ||
183 | #define V_TCB_SIP(x) ((x) << S_TCB_SIP) | ||
184 | |||
185 | #define W_TCB_DP 14 | ||
186 | #define S_TCB_DP 11 | ||
187 | #define M_TCB_DP 0xffffULL | ||
188 | #define V_TCB_DP(x) ((x) << S_TCB_DP) | ||
189 | |||
190 | #define W_TCB_SP 14 | ||
191 | #define S_TCB_SP 27 | ||
192 | #define M_TCB_SP 0xffffULL | ||
193 | #define V_TCB_SP(x) ((x) << S_TCB_SP) | ||
194 | |||
195 | #define W_TCB_TIMESTAMP 15 | ||
196 | #define S_TCB_TIMESTAMP 11 | ||
197 | #define M_TCB_TIMESTAMP 0xffffffffULL | ||
198 | #define V_TCB_TIMESTAMP(x) ((x) << S_TCB_TIMESTAMP) | ||
199 | |||
200 | #define W_TCB_TIMESTAMP_OFFSET 16 | ||
201 | #define S_TCB_TIMESTAMP_OFFSET 11 | ||
202 | #define M_TCB_TIMESTAMP_OFFSET 0xfULL | ||
203 | #define V_TCB_TIMESTAMP_OFFSET(x) ((x) << S_TCB_TIMESTAMP_OFFSET) | ||
204 | |||
205 | #define W_TCB_TX_MAX 16 | ||
206 | #define S_TCB_TX_MAX 15 | ||
207 | #define M_TCB_TX_MAX 0xffffffffULL | ||
208 | #define V_TCB_TX_MAX(x) ((x) << S_TCB_TX_MAX) | ||
209 | |||
210 | #define W_TCB_TX_HDR_PTR_RAW 17 | ||
211 | #define S_TCB_TX_HDR_PTR_RAW 15 | ||
212 | #define M_TCB_TX_HDR_PTR_RAW 0x1ffffULL | ||
213 | #define V_TCB_TX_HDR_PTR_RAW(x) ((x) << S_TCB_TX_HDR_PTR_RAW) | ||
214 | |||
215 | #define W_TCB_TX_LAST_PTR_RAW 18 | ||
216 | #define S_TCB_TX_LAST_PTR_RAW 0 | ||
217 | #define M_TCB_TX_LAST_PTR_RAW 0x1ffffULL | ||
218 | #define V_TCB_TX_LAST_PTR_RAW(x) ((x) << S_TCB_TX_LAST_PTR_RAW) | ||
219 | |||
220 | #define W_TCB_TX_COMPACT 18 | ||
221 | #define S_TCB_TX_COMPACT 17 | ||
222 | #define M_TCB_TX_COMPACT 0x1ULL | ||
223 | #define V_TCB_TX_COMPACT(x) ((x) << S_TCB_TX_COMPACT) | ||
224 | |||
225 | #define W_TCB_RX_COMPACT 18 | ||
226 | #define S_TCB_RX_COMPACT 18 | ||
227 | #define M_TCB_RX_COMPACT 0x1ULL | ||
228 | #define V_TCB_RX_COMPACT(x) ((x) << S_TCB_RX_COMPACT) | ||
229 | |||
230 | #define W_TCB_RCV_WND 18 | ||
231 | #define S_TCB_RCV_WND 19 | ||
232 | #define M_TCB_RCV_WND 0x7ffffffULL | ||
233 | #define V_TCB_RCV_WND(x) ((x) << S_TCB_RCV_WND) | ||
234 | |||
235 | #define W_TCB_RX_HDR_OFFSET 19 | ||
236 | #define S_TCB_RX_HDR_OFFSET 14 | ||
237 | #define M_TCB_RX_HDR_OFFSET 0x7ffffffULL | ||
238 | #define V_TCB_RX_HDR_OFFSET(x) ((x) << S_TCB_RX_HDR_OFFSET) | ||
239 | |||
240 | #define W_TCB_RX_FRAG0_START_IDX_RAW 20 | ||
241 | #define S_TCB_RX_FRAG0_START_IDX_RAW 9 | ||
242 | #define M_TCB_RX_FRAG0_START_IDX_RAW 0x7ffffffULL | ||
243 | #define V_TCB_RX_FRAG0_START_IDX_RAW(x) ((x) << S_TCB_RX_FRAG0_START_IDX_RAW) | ||
244 | |||
245 | #define W_TCB_RX_FRAG1_START_IDX_OFFSET 21 | ||
246 | #define S_TCB_RX_FRAG1_START_IDX_OFFSET 4 | ||
247 | #define M_TCB_RX_FRAG1_START_IDX_OFFSET 0x7ffffffULL | ||
248 | #define V_TCB_RX_FRAG1_START_IDX_OFFSET(x) ((x) << S_TCB_RX_FRAG1_START_IDX_OFFSET) | ||
249 | |||
250 | #define W_TCB_RX_FRAG0_LEN 21 | ||
251 | #define S_TCB_RX_FRAG0_LEN 31 | ||
252 | #define M_TCB_RX_FRAG0_LEN 0x7ffffffULL | ||
253 | #define V_TCB_RX_FRAG0_LEN(x) ((x) << S_TCB_RX_FRAG0_LEN) | ||
254 | |||
255 | #define W_TCB_RX_FRAG1_LEN 22 | ||
256 | #define S_TCB_RX_FRAG1_LEN 26 | ||
257 | #define M_TCB_RX_FRAG1_LEN 0x7ffffffULL | ||
258 | #define V_TCB_RX_FRAG1_LEN(x) ((x) << S_TCB_RX_FRAG1_LEN) | ||
259 | |||
260 | #define W_TCB_NEWRENO_RECOVER 23 | ||
261 | #define S_TCB_NEWRENO_RECOVER 21 | ||
262 | #define M_TCB_NEWRENO_RECOVER 0x7ffffffULL | ||
263 | #define V_TCB_NEWRENO_RECOVER(x) ((x) << S_TCB_NEWRENO_RECOVER) | ||
264 | |||
265 | #define W_TCB_PDU_HAVE_LEN 24 | ||
266 | #define S_TCB_PDU_HAVE_LEN 16 | ||
267 | #define M_TCB_PDU_HAVE_LEN 0x1ULL | ||
268 | #define V_TCB_PDU_HAVE_LEN(x) ((x) << S_TCB_PDU_HAVE_LEN) | ||
269 | |||
270 | #define W_TCB_PDU_LEN 24 | ||
271 | #define S_TCB_PDU_LEN 17 | ||
272 | #define M_TCB_PDU_LEN 0xffffULL | ||
273 | #define V_TCB_PDU_LEN(x) ((x) << S_TCB_PDU_LEN) | ||
274 | |||
275 | #define W_TCB_RX_QUIESCE 25 | ||
276 | #define S_TCB_RX_QUIESCE 1 | ||
277 | #define M_TCB_RX_QUIESCE 0x1ULL | ||
278 | #define V_TCB_RX_QUIESCE(x) ((x) << S_TCB_RX_QUIESCE) | ||
279 | |||
280 | #define W_TCB_RX_PTR_RAW 25 | ||
281 | #define S_TCB_RX_PTR_RAW 2 | ||
282 | #define M_TCB_RX_PTR_RAW 0x1ffffULL | ||
283 | #define V_TCB_RX_PTR_RAW(x) ((x) << S_TCB_RX_PTR_RAW) | ||
284 | |||
285 | #define W_TCB_CPU_NO 25 | ||
286 | #define S_TCB_CPU_NO 19 | ||
287 | #define M_TCB_CPU_NO 0x7fULL | ||
288 | #define V_TCB_CPU_NO(x) ((x) << S_TCB_CPU_NO) | ||
289 | |||
290 | #define W_TCB_ULP_TYPE 25 | ||
291 | #define S_TCB_ULP_TYPE 26 | ||
292 | #define M_TCB_ULP_TYPE 0xfULL | ||
293 | #define V_TCB_ULP_TYPE(x) ((x) << S_TCB_ULP_TYPE) | ||
294 | |||
295 | #define W_TCB_RX_FRAG1_PTR_RAW 25 | ||
296 | #define S_TCB_RX_FRAG1_PTR_RAW 30 | ||
297 | #define M_TCB_RX_FRAG1_PTR_RAW 0x1ffffULL | ||
298 | #define V_TCB_RX_FRAG1_PTR_RAW(x) ((x) << S_TCB_RX_FRAG1_PTR_RAW) | ||
299 | |||
300 | #define W_TCB_RX_FRAG2_START_IDX_OFFSET_RAW 26 | ||
301 | #define S_TCB_RX_FRAG2_START_IDX_OFFSET_RAW 15 | ||
302 | #define M_TCB_RX_FRAG2_START_IDX_OFFSET_RAW 0x7ffffffULL | ||
303 | #define V_TCB_RX_FRAG2_START_IDX_OFFSET_RAW(x) ((x) << S_TCB_RX_FRAG2_START_IDX_OFFSET_RAW) | ||
304 | |||
305 | #define W_TCB_RX_FRAG2_PTR_RAW 27 | ||
306 | #define S_TCB_RX_FRAG2_PTR_RAW 10 | ||
307 | #define M_TCB_RX_FRAG2_PTR_RAW 0x1ffffULL | ||
308 | #define V_TCB_RX_FRAG2_PTR_RAW(x) ((x) << S_TCB_RX_FRAG2_PTR_RAW) | ||
309 | |||
310 | #define W_TCB_RX_FRAG2_LEN_RAW 27 | ||
311 | #define S_TCB_RX_FRAG2_LEN_RAW 27 | ||
312 | #define M_TCB_RX_FRAG2_LEN_RAW 0x7ffffffULL | ||
313 | #define V_TCB_RX_FRAG2_LEN_RAW(x) ((x) << S_TCB_RX_FRAG2_LEN_RAW) | ||
314 | |||
315 | #define W_TCB_RX_FRAG3_PTR_RAW 28 | ||
316 | #define S_TCB_RX_FRAG3_PTR_RAW 22 | ||
317 | #define M_TCB_RX_FRAG3_PTR_RAW 0x1ffffULL | ||
318 | #define V_TCB_RX_FRAG3_PTR_RAW(x) ((x) << S_TCB_RX_FRAG3_PTR_RAW) | ||
319 | |||
320 | #define W_TCB_RX_FRAG3_LEN_RAW 29 | ||
321 | #define S_TCB_RX_FRAG3_LEN_RAW 7 | ||
322 | #define M_TCB_RX_FRAG3_LEN_RAW 0x7ffffffULL | ||
323 | #define V_TCB_RX_FRAG3_LEN_RAW(x) ((x) << S_TCB_RX_FRAG3_LEN_RAW) | ||
324 | |||
325 | #define W_TCB_RX_FRAG3_START_IDX_OFFSET_RAW 30 | ||
326 | #define S_TCB_RX_FRAG3_START_IDX_OFFSET_RAW 2 | ||
327 | #define M_TCB_RX_FRAG3_START_IDX_OFFSET_RAW 0x7ffffffULL | ||
328 | #define V_TCB_RX_FRAG3_START_IDX_OFFSET_RAW(x) ((x) << S_TCB_RX_FRAG3_START_IDX_OFFSET_RAW) | ||
329 | |||
330 | #define W_TCB_PDU_HDR_LEN 30 | ||
331 | #define S_TCB_PDU_HDR_LEN 29 | ||
332 | #define M_TCB_PDU_HDR_LEN 0xffULL | ||
333 | #define V_TCB_PDU_HDR_LEN(x) ((x) << S_TCB_PDU_HDR_LEN) | ||
334 | |||
335 | #define W_TCB_SLUSH1 31 | ||
336 | #define S_TCB_SLUSH1 5 | ||
337 | #define M_TCB_SLUSH1 0x7ffffULL | ||
338 | #define V_TCB_SLUSH1(x) ((x) << S_TCB_SLUSH1) | ||
339 | |||
340 | #define W_TCB_ULP_RAW 31 | ||
341 | #define S_TCB_ULP_RAW 24 | ||
342 | #define M_TCB_ULP_RAW 0xffULL | ||
343 | #define V_TCB_ULP_RAW(x) ((x) << S_TCB_ULP_RAW) | ||
344 | |||
345 | #define W_TCB_DDP_RDMAP_VERSION 25 | ||
346 | #define S_TCB_DDP_RDMAP_VERSION 30 | ||
347 | #define M_TCB_DDP_RDMAP_VERSION 0x1ULL | ||
348 | #define V_TCB_DDP_RDMAP_VERSION(x) ((x) << S_TCB_DDP_RDMAP_VERSION) | ||
349 | |||
350 | #define W_TCB_MARKER_ENABLE_RX 25 | ||
351 | #define S_TCB_MARKER_ENABLE_RX 31 | ||
352 | #define M_TCB_MARKER_ENABLE_RX 0x1ULL | ||
353 | #define V_TCB_MARKER_ENABLE_RX(x) ((x) << S_TCB_MARKER_ENABLE_RX) | ||
354 | |||
355 | #define W_TCB_MARKER_ENABLE_TX 26 | ||
356 | #define S_TCB_MARKER_ENABLE_TX 0 | ||
357 | #define M_TCB_MARKER_ENABLE_TX 0x1ULL | ||
358 | #define V_TCB_MARKER_ENABLE_TX(x) ((x) << S_TCB_MARKER_ENABLE_TX) | ||
359 | |||
360 | #define W_TCB_CRC_ENABLE 26 | ||
361 | #define S_TCB_CRC_ENABLE 1 | ||
362 | #define M_TCB_CRC_ENABLE 0x1ULL | ||
363 | #define V_TCB_CRC_ENABLE(x) ((x) << S_TCB_CRC_ENABLE) | ||
364 | |||
365 | #define W_TCB_IRS_ULP 26 | ||
366 | #define S_TCB_IRS_ULP 2 | ||
367 | #define M_TCB_IRS_ULP 0x1ffULL | ||
368 | #define V_TCB_IRS_ULP(x) ((x) << S_TCB_IRS_ULP) | ||
369 | |||
370 | #define W_TCB_ISS_ULP 26 | ||
371 | #define S_TCB_ISS_ULP 11 | ||
372 | #define M_TCB_ISS_ULP 0x1ffULL | ||
373 | #define V_TCB_ISS_ULP(x) ((x) << S_TCB_ISS_ULP) | ||
374 | |||
375 | #define W_TCB_TX_PDU_LEN 26 | ||
376 | #define S_TCB_TX_PDU_LEN 20 | ||
377 | #define M_TCB_TX_PDU_LEN 0x3fffULL | ||
378 | #define V_TCB_TX_PDU_LEN(x) ((x) << S_TCB_TX_PDU_LEN) | ||
379 | |||
380 | #define W_TCB_TX_PDU_OUT 27 | ||
381 | #define S_TCB_TX_PDU_OUT 2 | ||
382 | #define M_TCB_TX_PDU_OUT 0x1ULL | ||
383 | #define V_TCB_TX_PDU_OUT(x) ((x) << S_TCB_TX_PDU_OUT) | ||
384 | |||
385 | #define W_TCB_CQ_IDX_SQ 27 | ||
386 | #define S_TCB_CQ_IDX_SQ 3 | ||
387 | #define M_TCB_CQ_IDX_SQ 0xffffULL | ||
388 | #define V_TCB_CQ_IDX_SQ(x) ((x) << S_TCB_CQ_IDX_SQ) | ||
389 | |||
390 | #define W_TCB_CQ_IDX_RQ 27 | ||
391 | #define S_TCB_CQ_IDX_RQ 19 | ||
392 | #define M_TCB_CQ_IDX_RQ 0xffffULL | ||
393 | #define V_TCB_CQ_IDX_RQ(x) ((x) << S_TCB_CQ_IDX_RQ) | ||
394 | |||
395 | #define W_TCB_QP_ID 28 | ||
396 | #define S_TCB_QP_ID 3 | ||
397 | #define M_TCB_QP_ID 0xffffULL | ||
398 | #define V_TCB_QP_ID(x) ((x) << S_TCB_QP_ID) | ||
399 | |||
400 | #define W_TCB_PD_ID 28 | ||
401 | #define S_TCB_PD_ID 19 | ||
402 | #define M_TCB_PD_ID 0xffffULL | ||
403 | #define V_TCB_PD_ID(x) ((x) << S_TCB_PD_ID) | ||
404 | |||
405 | #define W_TCB_STAG 29 | ||
406 | #define S_TCB_STAG 3 | ||
407 | #define M_TCB_STAG 0xffffffffULL | ||
408 | #define V_TCB_STAG(x) ((x) << S_TCB_STAG) | ||
409 | |||
410 | #define W_TCB_RQ_START 30 | ||
411 | #define S_TCB_RQ_START 3 | ||
412 | #define M_TCB_RQ_START 0x3ffffffULL | ||
413 | #define V_TCB_RQ_START(x) ((x) << S_TCB_RQ_START) | ||
414 | |||
415 | #define W_TCB_RQ_MSN 30 | ||
416 | #define S_TCB_RQ_MSN 29 | ||
417 | #define M_TCB_RQ_MSN 0x3ffULL | ||
418 | #define V_TCB_RQ_MSN(x) ((x) << S_TCB_RQ_MSN) | ||
419 | |||
420 | #define W_TCB_RQ_MAX_OFFSET 31 | ||
421 | #define S_TCB_RQ_MAX_OFFSET 7 | ||
422 | #define M_TCB_RQ_MAX_OFFSET 0xfULL | ||
423 | #define V_TCB_RQ_MAX_OFFSET(x) ((x) << S_TCB_RQ_MAX_OFFSET) | ||
424 | |||
425 | #define W_TCB_RQ_WRITE_PTR 31 | ||
426 | #define S_TCB_RQ_WRITE_PTR 11 | ||
427 | #define M_TCB_RQ_WRITE_PTR 0x3ffULL | ||
428 | #define V_TCB_RQ_WRITE_PTR(x) ((x) << S_TCB_RQ_WRITE_PTR) | ||
429 | |||
430 | #define W_TCB_INB_WRITE_PERM 31 | ||
431 | #define S_TCB_INB_WRITE_PERM 21 | ||
432 | #define M_TCB_INB_WRITE_PERM 0x1ULL | ||
433 | #define V_TCB_INB_WRITE_PERM(x) ((x) << S_TCB_INB_WRITE_PERM) | ||
434 | |||
435 | #define W_TCB_INB_READ_PERM 31 | ||
436 | #define S_TCB_INB_READ_PERM 22 | ||
437 | #define M_TCB_INB_READ_PERM 0x1ULL | ||
438 | #define V_TCB_INB_READ_PERM(x) ((x) << S_TCB_INB_READ_PERM) | ||
439 | |||
440 | #define W_TCB_ORD_L_BIT_VLD 31 | ||
441 | #define S_TCB_ORD_L_BIT_VLD 23 | ||
442 | #define M_TCB_ORD_L_BIT_VLD 0x1ULL | ||
443 | #define V_TCB_ORD_L_BIT_VLD(x) ((x) << S_TCB_ORD_L_BIT_VLD) | ||
444 | |||
445 | #define W_TCB_RDMAP_OPCODE 31 | ||
446 | #define S_TCB_RDMAP_OPCODE 24 | ||
447 | #define M_TCB_RDMAP_OPCODE 0xfULL | ||
448 | #define V_TCB_RDMAP_OPCODE(x) ((x) << S_TCB_RDMAP_OPCODE) | ||
449 | |||
450 | #define W_TCB_TX_FLUSH 31 | ||
451 | #define S_TCB_TX_FLUSH 28 | ||
452 | #define M_TCB_TX_FLUSH 0x1ULL | ||
453 | #define V_TCB_TX_FLUSH(x) ((x) << S_TCB_TX_FLUSH) | ||
454 | |||
455 | #define W_TCB_TX_OOS_RXMT 31 | ||
456 | #define S_TCB_TX_OOS_RXMT 29 | ||
457 | #define M_TCB_TX_OOS_RXMT 0x1ULL | ||
458 | #define V_TCB_TX_OOS_RXMT(x) ((x) << S_TCB_TX_OOS_RXMT) | ||
459 | |||
460 | #define W_TCB_TX_OOS_TXMT 31 | ||
461 | #define S_TCB_TX_OOS_TXMT 30 | ||
462 | #define M_TCB_TX_OOS_TXMT 0x1ULL | ||
463 | #define V_TCB_TX_OOS_TXMT(x) ((x) << S_TCB_TX_OOS_TXMT) | ||
464 | |||
465 | #define W_TCB_SLUSH_AUX2 31 | ||
466 | #define S_TCB_SLUSH_AUX2 31 | ||
467 | #define M_TCB_SLUSH_AUX2 0x1ULL | ||
468 | #define V_TCB_SLUSH_AUX2(x) ((x) << S_TCB_SLUSH_AUX2) | ||
469 | |||
470 | #define W_TCB_RX_FRAG1_PTR_RAW2 25 | ||
471 | #define S_TCB_RX_FRAG1_PTR_RAW2 30 | ||
472 | #define M_TCB_RX_FRAG1_PTR_RAW2 0x1ffffULL | ||
473 | #define V_TCB_RX_FRAG1_PTR_RAW2(x) ((x) << S_TCB_RX_FRAG1_PTR_RAW2) | ||
474 | |||
475 | #define W_TCB_RX_DDP_FLAGS 26 | ||
476 | #define S_TCB_RX_DDP_FLAGS 15 | ||
477 | #define M_TCB_RX_DDP_FLAGS 0x3ffULL | ||
478 | #define V_TCB_RX_DDP_FLAGS(x) ((x) << S_TCB_RX_DDP_FLAGS) | ||
479 | |||
480 | #define W_TCB_SLUSH_AUX3 26 | ||
481 | #define S_TCB_SLUSH_AUX3 31 | ||
482 | #define M_TCB_SLUSH_AUX3 0x1ffULL | ||
483 | #define V_TCB_SLUSH_AUX3(x) ((x) << S_TCB_SLUSH_AUX3) | ||
484 | |||
485 | #define W_TCB_RX_DDP_BUF0_OFFSET 27 | ||
486 | #define S_TCB_RX_DDP_BUF0_OFFSET 8 | ||
487 | #define M_TCB_RX_DDP_BUF0_OFFSET 0x3fffffULL | ||
488 | #define V_TCB_RX_DDP_BUF0_OFFSET(x) ((x) << S_TCB_RX_DDP_BUF0_OFFSET) | ||
489 | |||
490 | #define W_TCB_RX_DDP_BUF0_LEN 27 | ||
491 | #define S_TCB_RX_DDP_BUF0_LEN 30 | ||
492 | #define M_TCB_RX_DDP_BUF0_LEN 0x3fffffULL | ||
493 | #define V_TCB_RX_DDP_BUF0_LEN(x) ((x) << S_TCB_RX_DDP_BUF0_LEN) | ||
494 | |||
495 | #define W_TCB_RX_DDP_BUF1_OFFSET 28 | ||
496 | #define S_TCB_RX_DDP_BUF1_OFFSET 20 | ||
497 | #define M_TCB_RX_DDP_BUF1_OFFSET 0x3fffffULL | ||
498 | #define V_TCB_RX_DDP_BUF1_OFFSET(x) ((x) << S_TCB_RX_DDP_BUF1_OFFSET) | ||
499 | |||
500 | #define W_TCB_RX_DDP_BUF1_LEN 29 | ||
501 | #define S_TCB_RX_DDP_BUF1_LEN 10 | ||
502 | #define M_TCB_RX_DDP_BUF1_LEN 0x3fffffULL | ||
503 | #define V_TCB_RX_DDP_BUF1_LEN(x) ((x) << S_TCB_RX_DDP_BUF1_LEN) | ||
504 | |||
505 | #define W_TCB_RX_DDP_BUF0_TAG 30 | ||
506 | #define S_TCB_RX_DDP_BUF0_TAG 0 | ||
507 | #define M_TCB_RX_DDP_BUF0_TAG 0xffffffffULL | ||
508 | #define V_TCB_RX_DDP_BUF0_TAG(x) ((x) << S_TCB_RX_DDP_BUF0_TAG) | ||
509 | |||
510 | #define W_TCB_RX_DDP_BUF1_TAG 31 | ||
511 | #define S_TCB_RX_DDP_BUF1_TAG 0 | ||
512 | #define M_TCB_RX_DDP_BUF1_TAG 0xffffffffULL | ||
513 | #define V_TCB_RX_DDP_BUF1_TAG(x) ((x) << S_TCB_RX_DDP_BUF1_TAG) | ||
514 | |||
515 | #define S_TF_DACK 10 | ||
516 | #define V_TF_DACK(x) ((x) << S_TF_DACK) | ||
517 | |||
518 | #define S_TF_NAGLE 11 | ||
519 | #define V_TF_NAGLE(x) ((x) << S_TF_NAGLE) | ||
520 | |||
521 | #define S_TF_RECV_SCALE 12 | ||
522 | #define V_TF_RECV_SCALE(x) ((x) << S_TF_RECV_SCALE) | ||
523 | |||
524 | #define S_TF_RECV_TSTMP 13 | ||
525 | #define V_TF_RECV_TSTMP(x) ((x) << S_TF_RECV_TSTMP) | ||
526 | |||
527 | #define S_TF_RECV_SACK 14 | ||
528 | #define V_TF_RECV_SACK(x) ((x) << S_TF_RECV_SACK) | ||
529 | |||
530 | #define S_TF_TURBO 15 | ||
531 | #define V_TF_TURBO(x) ((x) << S_TF_TURBO) | ||
532 | |||
533 | #define S_TF_KEEPALIVE 16 | ||
534 | #define V_TF_KEEPALIVE(x) ((x) << S_TF_KEEPALIVE) | ||
535 | |||
536 | #define S_TF_TCAM_BYPASS 17 | ||
537 | #define V_TF_TCAM_BYPASS(x) ((x) << S_TF_TCAM_BYPASS) | ||
538 | |||
539 | #define S_TF_CORE_FIN 18 | ||
540 | #define V_TF_CORE_FIN(x) ((x) << S_TF_CORE_FIN) | ||
541 | |||
542 | #define S_TF_CORE_MORE 19 | ||
543 | #define V_TF_CORE_MORE(x) ((x) << S_TF_CORE_MORE) | ||
544 | |||
545 | #define S_TF_MIGRATING 20 | ||
546 | #define V_TF_MIGRATING(x) ((x) << S_TF_MIGRATING) | ||
547 | |||
548 | #define S_TF_ACTIVE_OPEN 21 | ||
549 | #define V_TF_ACTIVE_OPEN(x) ((x) << S_TF_ACTIVE_OPEN) | ||
550 | |||
551 | #define S_TF_ASK_MODE 22 | ||
552 | #define V_TF_ASK_MODE(x) ((x) << S_TF_ASK_MODE) | ||
553 | |||
554 | #define S_TF_NON_OFFLOAD 23 | ||
555 | #define V_TF_NON_OFFLOAD(x) ((x) << S_TF_NON_OFFLOAD) | ||
556 | |||
557 | #define S_TF_MOD_SCHD 24 | ||
558 | #define V_TF_MOD_SCHD(x) ((x) << S_TF_MOD_SCHD) | ||
559 | |||
560 | #define S_TF_MOD_SCHD_REASON0 25 | ||
561 | #define V_TF_MOD_SCHD_REASON0(x) ((x) << S_TF_MOD_SCHD_REASON0) | ||
562 | |||
563 | #define S_TF_MOD_SCHD_REASON1 26 | ||
564 | #define V_TF_MOD_SCHD_REASON1(x) ((x) << S_TF_MOD_SCHD_REASON1) | ||
565 | |||
566 | #define S_TF_MOD_SCHD_RX 27 | ||
567 | #define V_TF_MOD_SCHD_RX(x) ((x) << S_TF_MOD_SCHD_RX) | ||
568 | |||
569 | #define S_TF_CORE_PUSH 28 | ||
570 | #define V_TF_CORE_PUSH(x) ((x) << S_TF_CORE_PUSH) | ||
571 | |||
572 | #define S_TF_RCV_COALESCE_ENABLE 29 | ||
573 | #define V_TF_RCV_COALESCE_ENABLE(x) ((x) << S_TF_RCV_COALESCE_ENABLE) | ||
574 | |||
575 | #define S_TF_RCV_COALESCE_PUSH 30 | ||
576 | #define V_TF_RCV_COALESCE_PUSH(x) ((x) << S_TF_RCV_COALESCE_PUSH) | ||
577 | |||
578 | #define S_TF_RCV_COALESCE_LAST_PSH 31 | ||
579 | #define V_TF_RCV_COALESCE_LAST_PSH(x) ((x) << S_TF_RCV_COALESCE_LAST_PSH) | ||
580 | |||
581 | #define S_TF_RCV_COALESCE_HEARTBEAT 32 | ||
582 | #define V_TF_RCV_COALESCE_HEARTBEAT(x) ((x) << S_TF_RCV_COALESCE_HEARTBEAT) | ||
583 | |||
584 | #define S_TF_HALF_CLOSE 33 | ||
585 | #define V_TF_HALF_CLOSE(x) ((x) << S_TF_HALF_CLOSE) | ||
586 | |||
587 | #define S_TF_DACK_MSS 34 | ||
588 | #define V_TF_DACK_MSS(x) ((x) << S_TF_DACK_MSS) | ||
589 | |||
590 | #define S_TF_CCTRL_SEL0 35 | ||
591 | #define V_TF_CCTRL_SEL0(x) ((x) << S_TF_CCTRL_SEL0) | ||
592 | |||
593 | #define S_TF_CCTRL_SEL1 36 | ||
594 | #define V_TF_CCTRL_SEL1(x) ((x) << S_TF_CCTRL_SEL1) | ||
595 | |||
596 | #define S_TF_TCP_NEWRENO_FAST_RECOVERY 37 | ||
597 | #define V_TF_TCP_NEWRENO_FAST_RECOVERY(x) ((x) << S_TF_TCP_NEWRENO_FAST_RECOVERY) | ||
598 | |||
599 | #define S_TF_TX_PACE_AUTO 38 | ||
600 | #define V_TF_TX_PACE_AUTO(x) ((x) << S_TF_TX_PACE_AUTO) | ||
601 | |||
602 | #define S_TF_PEER_FIN_HELD 39 | ||
603 | #define V_TF_PEER_FIN_HELD(x) ((x) << S_TF_PEER_FIN_HELD) | ||
604 | |||
605 | #define S_TF_CORE_URG 40 | ||
606 | #define V_TF_CORE_URG(x) ((x) << S_TF_CORE_URG) | ||
607 | |||
608 | #define S_TF_RDMA_ERROR 41 | ||
609 | #define V_TF_RDMA_ERROR(x) ((x) << S_TF_RDMA_ERROR) | ||
610 | |||
611 | #define S_TF_SSWS_DISABLED 42 | ||
612 | #define V_TF_SSWS_DISABLED(x) ((x) << S_TF_SSWS_DISABLED) | ||
613 | |||
614 | #define S_TF_DUPACK_COUNT_ODD 43 | ||
615 | #define V_TF_DUPACK_COUNT_ODD(x) ((x) << S_TF_DUPACK_COUNT_ODD) | ||
616 | |||
617 | #define S_TF_TX_CHANNEL 44 | ||
618 | #define V_TF_TX_CHANNEL(x) ((x) << S_TF_TX_CHANNEL) | ||
619 | |||
620 | #define S_TF_RX_CHANNEL 45 | ||
621 | #define V_TF_RX_CHANNEL(x) ((x) << S_TF_RX_CHANNEL) | ||
622 | |||
623 | #define S_TF_TX_PACE_FIXED 46 | ||
624 | #define V_TF_TX_PACE_FIXED(x) ((x) << S_TF_TX_PACE_FIXED) | ||
625 | |||
626 | #define S_TF_RDMA_FLM_ERROR 47 | ||
627 | #define V_TF_RDMA_FLM_ERROR(x) ((x) << S_TF_RDMA_FLM_ERROR) | ||
628 | |||
629 | #define S_TF_RX_FLOW_CONTROL_DISABLE 48 | ||
630 | #define V_TF_RX_FLOW_CONTROL_DISABLE(x) ((x) << S_TF_RX_FLOW_CONTROL_DISABLE) | ||
631 | |||
632 | #endif /* _TCB_DEFS_H */ | ||
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/infiniband/hw/ehca/ehca_irq.c index c069be8cbcb2..6c4f9f91b15d 100644 --- a/drivers/infiniband/hw/ehca/ehca_irq.c +++ b/drivers/infiniband/hw/ehca/ehca_irq.c | |||
@@ -756,6 +756,8 @@ void ehca_destroy_comp_pool(void) | |||
756 | if (cpu_online(i)) | 756 | if (cpu_online(i)) |
757 | destroy_comp_task(pool, i); | 757 | destroy_comp_task(pool, i); |
758 | } | 758 | } |
759 | free_percpu(pool->cpu_comp_tasks); | ||
760 | kfree(pool); | ||
759 | #endif | 761 | #endif |
760 | 762 | ||
761 | return; | 763 | return; |
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c index 968d1519761c..71314460b11e 100644 --- a/drivers/infiniband/hw/mthca/mthca_cmd.c +++ b/drivers/infiniband/hw/mthca/mthca_cmd.c | |||
@@ -1051,7 +1051,11 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev, | |||
1051 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_EQ_OFFSET); | 1051 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_EQ_OFFSET); |
1052 | dev_lim->max_eqs = 1 << (field & 0x7); | 1052 | dev_lim->max_eqs = 1 << (field & 0x7); |
1053 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_MTT_OFFSET); | 1053 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_MTT_OFFSET); |
1054 | dev_lim->reserved_mtts = 1 << (field >> 4); | 1054 | if (mthca_is_memfree(dev)) |
1055 | dev_lim->reserved_mtts = ALIGN((1 << (field >> 4)) * sizeof(u64), | ||
1056 | MTHCA_MTT_SEG_SIZE) / MTHCA_MTT_SEG_SIZE; | ||
1057 | else | ||
1058 | dev_lim->reserved_mtts = 1 << (field >> 4); | ||
1055 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_MRW_SZ_OFFSET); | 1059 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_MRW_SZ_OFFSET); |
1056 | dev_lim->max_mrw_sz = 1 << field; | 1060 | dev_lim->max_mrw_sz = 1 << field; |
1057 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_MRW_OFFSET); | 1061 | MTHCA_GET(field, outbox, QUERY_DEV_LIM_RSVD_MRW_OFFSET); |
diff --git a/drivers/infiniband/hw/mthca/mthca_dev.h b/drivers/infiniband/hw/mthca/mthca_dev.h index fe5cecf70fed..b7e42efaf43d 100644 --- a/drivers/infiniband/hw/mthca/mthca_dev.h +++ b/drivers/infiniband/hw/mthca/mthca_dev.h | |||
@@ -464,6 +464,8 @@ void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar); | |||
464 | int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd); | 464 | int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd); |
465 | void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd); | 465 | void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd); |
466 | 466 | ||
467 | int mthca_write_mtt_size(struct mthca_dev *dev); | ||
468 | |||
467 | struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size); | 469 | struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size); |
468 | void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt); | 470 | void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt); |
469 | int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, | 471 | int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, |
diff --git a/drivers/infiniband/hw/mthca/mthca_main.c b/drivers/infiniband/hw/mthca/mthca_main.c index 44bc6cc734ab..0d9b7d06bbc2 100644 --- a/drivers/infiniband/hw/mthca/mthca_main.c +++ b/drivers/infiniband/hw/mthca/mthca_main.c | |||
@@ -379,7 +379,7 @@ static int mthca_load_fw(struct mthca_dev *mdev) | |||
379 | 379 | ||
380 | mdev->fw.arbel.fw_icm = | 380 | mdev->fw.arbel.fw_icm = |
381 | mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, | 381 | mthca_alloc_icm(mdev, mdev->fw.arbel.fw_pages, |
382 | GFP_HIGHUSER | __GFP_NOWARN); | 382 | GFP_HIGHUSER | __GFP_NOWARN, 0); |
383 | if (!mdev->fw.arbel.fw_icm) { | 383 | if (!mdev->fw.arbel.fw_icm) { |
384 | mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); | 384 | mthca_err(mdev, "Couldn't allocate FW area, aborting.\n"); |
385 | return -ENOMEM; | 385 | return -ENOMEM; |
@@ -412,7 +412,7 @@ err_unmap_fa: | |||
412 | mthca_UNMAP_FA(mdev, &status); | 412 | mthca_UNMAP_FA(mdev, &status); |
413 | 413 | ||
414 | err_free: | 414 | err_free: |
415 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); | 415 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); |
416 | return err; | 416 | return err; |
417 | } | 417 | } |
418 | 418 | ||
@@ -441,7 +441,7 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
441 | (unsigned long long) aux_pages << 2); | 441 | (unsigned long long) aux_pages << 2); |
442 | 442 | ||
443 | mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, | 443 | mdev->fw.arbel.aux_icm = mthca_alloc_icm(mdev, aux_pages, |
444 | GFP_HIGHUSER | __GFP_NOWARN); | 444 | GFP_HIGHUSER | __GFP_NOWARN, 0); |
445 | if (!mdev->fw.arbel.aux_icm) { | 445 | if (!mdev->fw.arbel.aux_icm) { |
446 | mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); | 446 | mthca_err(mdev, "Couldn't allocate aux memory, aborting.\n"); |
447 | return -ENOMEM; | 447 | return -ENOMEM; |
@@ -464,10 +464,15 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
464 | goto err_unmap_aux; | 464 | goto err_unmap_aux; |
465 | } | 465 | } |
466 | 466 | ||
467 | /* CPU writes to non-reserved MTTs, while HCA might DMA to reserved mtts */ | ||
468 | mdev->limits.reserved_mtts = ALIGN(mdev->limits.reserved_mtts * MTHCA_MTT_SEG_SIZE, | ||
469 | dma_get_cache_alignment()) / MTHCA_MTT_SEG_SIZE; | ||
470 | |||
467 | mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, | 471 | mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, |
468 | MTHCA_MTT_SEG_SIZE, | 472 | MTHCA_MTT_SEG_SIZE, |
469 | mdev->limits.num_mtt_segs, | 473 | mdev->limits.num_mtt_segs, |
470 | mdev->limits.reserved_mtts, 1); | 474 | mdev->limits.reserved_mtts, |
475 | 1, 0); | ||
471 | if (!mdev->mr_table.mtt_table) { | 476 | if (!mdev->mr_table.mtt_table) { |
472 | mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); | 477 | mthca_err(mdev, "Failed to map MTT context memory, aborting.\n"); |
473 | err = -ENOMEM; | 478 | err = -ENOMEM; |
@@ -477,7 +482,8 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
477 | mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, | 482 | mdev->mr_table.mpt_table = mthca_alloc_icm_table(mdev, init_hca->mpt_base, |
478 | dev_lim->mpt_entry_sz, | 483 | dev_lim->mpt_entry_sz, |
479 | mdev->limits.num_mpts, | 484 | mdev->limits.num_mpts, |
480 | mdev->limits.reserved_mrws, 1); | 485 | mdev->limits.reserved_mrws, |
486 | 1, 1); | ||
481 | if (!mdev->mr_table.mpt_table) { | 487 | if (!mdev->mr_table.mpt_table) { |
482 | mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); | 488 | mthca_err(mdev, "Failed to map MPT context memory, aborting.\n"); |
483 | err = -ENOMEM; | 489 | err = -ENOMEM; |
@@ -487,7 +493,8 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
487 | mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, | 493 | mdev->qp_table.qp_table = mthca_alloc_icm_table(mdev, init_hca->qpc_base, |
488 | dev_lim->qpc_entry_sz, | 494 | dev_lim->qpc_entry_sz, |
489 | mdev->limits.num_qps, | 495 | mdev->limits.num_qps, |
490 | mdev->limits.reserved_qps, 0); | 496 | mdev->limits.reserved_qps, |
497 | 0, 0); | ||
491 | if (!mdev->qp_table.qp_table) { | 498 | if (!mdev->qp_table.qp_table) { |
492 | mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); | 499 | mthca_err(mdev, "Failed to map QP context memory, aborting.\n"); |
493 | err = -ENOMEM; | 500 | err = -ENOMEM; |
@@ -497,7 +504,8 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
497 | mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, | 504 | mdev->qp_table.eqp_table = mthca_alloc_icm_table(mdev, init_hca->eqpc_base, |
498 | dev_lim->eqpc_entry_sz, | 505 | dev_lim->eqpc_entry_sz, |
499 | mdev->limits.num_qps, | 506 | mdev->limits.num_qps, |
500 | mdev->limits.reserved_qps, 0); | 507 | mdev->limits.reserved_qps, |
508 | 0, 0); | ||
501 | if (!mdev->qp_table.eqp_table) { | 509 | if (!mdev->qp_table.eqp_table) { |
502 | mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); | 510 | mthca_err(mdev, "Failed to map EQP context memory, aborting.\n"); |
503 | err = -ENOMEM; | 511 | err = -ENOMEM; |
@@ -507,7 +515,7 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
507 | mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, | 515 | mdev->qp_table.rdb_table = mthca_alloc_icm_table(mdev, init_hca->rdb_base, |
508 | MTHCA_RDB_ENTRY_SIZE, | 516 | MTHCA_RDB_ENTRY_SIZE, |
509 | mdev->limits.num_qps << | 517 | mdev->limits.num_qps << |
510 | mdev->qp_table.rdb_shift, | 518 | mdev->qp_table.rdb_shift, 0, |
511 | 0, 0); | 519 | 0, 0); |
512 | if (!mdev->qp_table.rdb_table) { | 520 | if (!mdev->qp_table.rdb_table) { |
513 | mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); | 521 | mthca_err(mdev, "Failed to map RDB context memory, aborting\n"); |
@@ -518,7 +526,8 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
518 | mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, | 526 | mdev->cq_table.table = mthca_alloc_icm_table(mdev, init_hca->cqc_base, |
519 | dev_lim->cqc_entry_sz, | 527 | dev_lim->cqc_entry_sz, |
520 | mdev->limits.num_cqs, | 528 | mdev->limits.num_cqs, |
521 | mdev->limits.reserved_cqs, 0); | 529 | mdev->limits.reserved_cqs, |
530 | 0, 0); | ||
522 | if (!mdev->cq_table.table) { | 531 | if (!mdev->cq_table.table) { |
523 | mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); | 532 | mthca_err(mdev, "Failed to map CQ context memory, aborting.\n"); |
524 | err = -ENOMEM; | 533 | err = -ENOMEM; |
@@ -530,7 +539,8 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
530 | mthca_alloc_icm_table(mdev, init_hca->srqc_base, | 539 | mthca_alloc_icm_table(mdev, init_hca->srqc_base, |
531 | dev_lim->srq_entry_sz, | 540 | dev_lim->srq_entry_sz, |
532 | mdev->limits.num_srqs, | 541 | mdev->limits.num_srqs, |
533 | mdev->limits.reserved_srqs, 0); | 542 | mdev->limits.reserved_srqs, |
543 | 0, 0); | ||
534 | if (!mdev->srq_table.table) { | 544 | if (!mdev->srq_table.table) { |
535 | mthca_err(mdev, "Failed to map SRQ context memory, " | 545 | mthca_err(mdev, "Failed to map SRQ context memory, " |
536 | "aborting.\n"); | 546 | "aborting.\n"); |
@@ -550,7 +560,7 @@ static int mthca_init_icm(struct mthca_dev *mdev, | |||
550 | mdev->limits.num_amgms, | 560 | mdev->limits.num_amgms, |
551 | mdev->limits.num_mgms + | 561 | mdev->limits.num_mgms + |
552 | mdev->limits.num_amgms, | 562 | mdev->limits.num_amgms, |
553 | 0); | 563 | 0, 0); |
554 | if (!mdev->mcg_table.table) { | 564 | if (!mdev->mcg_table.table) { |
555 | mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); | 565 | mthca_err(mdev, "Failed to map MCG context memory, aborting.\n"); |
556 | err = -ENOMEM; | 566 | err = -ENOMEM; |
@@ -588,7 +598,7 @@ err_unmap_aux: | |||
588 | mthca_UNMAP_ICM_AUX(mdev, &status); | 598 | mthca_UNMAP_ICM_AUX(mdev, &status); |
589 | 599 | ||
590 | err_free_aux: | 600 | err_free_aux: |
591 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); | 601 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); |
592 | 602 | ||
593 | return err; | 603 | return err; |
594 | } | 604 | } |
@@ -609,7 +619,7 @@ static void mthca_free_icms(struct mthca_dev *mdev) | |||
609 | mthca_unmap_eq_icm(mdev); | 619 | mthca_unmap_eq_icm(mdev); |
610 | 620 | ||
611 | mthca_UNMAP_ICM_AUX(mdev, &status); | 621 | mthca_UNMAP_ICM_AUX(mdev, &status); |
612 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm); | 622 | mthca_free_icm(mdev, mdev->fw.arbel.aux_icm, 0); |
613 | } | 623 | } |
614 | 624 | ||
615 | static int mthca_init_arbel(struct mthca_dev *mdev) | 625 | static int mthca_init_arbel(struct mthca_dev *mdev) |
@@ -693,7 +703,7 @@ err_free_icm: | |||
693 | 703 | ||
694 | err_stop_fw: | 704 | err_stop_fw: |
695 | mthca_UNMAP_FA(mdev, &status); | 705 | mthca_UNMAP_FA(mdev, &status); |
696 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); | 706 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); |
697 | 707 | ||
698 | err_disable: | 708 | err_disable: |
699 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) | 709 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) |
@@ -712,7 +722,7 @@ static void mthca_close_hca(struct mthca_dev *mdev) | |||
712 | mthca_free_icms(mdev); | 722 | mthca_free_icms(mdev); |
713 | 723 | ||
714 | mthca_UNMAP_FA(mdev, &status); | 724 | mthca_UNMAP_FA(mdev, &status); |
715 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm); | 725 | mthca_free_icm(mdev, mdev->fw.arbel.fw_icm, 0); |
716 | 726 | ||
717 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) | 727 | if (!(mdev->mthca_flags & MTHCA_FLAG_NO_LAM)) |
718 | mthca_DISABLE_LAM(mdev, &status); | 728 | mthca_DISABLE_LAM(mdev, &status); |
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.c b/drivers/infiniband/hw/mthca/mthca_memfree.c index 6b19645d946c..0b9d053a599d 100644 --- a/drivers/infiniband/hw/mthca/mthca_memfree.c +++ b/drivers/infiniband/hw/mthca/mthca_memfree.c | |||
@@ -35,6 +35,9 @@ | |||
35 | */ | 35 | */ |
36 | 36 | ||
37 | #include <linux/mm.h> | 37 | #include <linux/mm.h> |
38 | #include <linux/scatterlist.h> | ||
39 | |||
40 | #include <asm/page.h> | ||
38 | 41 | ||
39 | #include "mthca_memfree.h" | 42 | #include "mthca_memfree.h" |
40 | #include "mthca_dev.h" | 43 | #include "mthca_dev.h" |
@@ -58,22 +61,42 @@ struct mthca_user_db_table { | |||
58 | } page[0]; | 61 | } page[0]; |
59 | }; | 62 | }; |
60 | 63 | ||
61 | void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm) | 64 | static void mthca_free_icm_pages(struct mthca_dev *dev, struct mthca_icm_chunk *chunk) |
65 | { | ||
66 | int i; | ||
67 | |||
68 | if (chunk->nsg > 0) | ||
69 | pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages, | ||
70 | PCI_DMA_BIDIRECTIONAL); | ||
71 | |||
72 | for (i = 0; i < chunk->npages; ++i) | ||
73 | __free_pages(chunk->mem[i].page, | ||
74 | get_order(chunk->mem[i].length)); | ||
75 | } | ||
76 | |||
77 | static void mthca_free_icm_coherent(struct mthca_dev *dev, struct mthca_icm_chunk *chunk) | ||
62 | { | 78 | { |
63 | struct mthca_icm_chunk *chunk, *tmp; | ||
64 | int i; | 79 | int i; |
65 | 80 | ||
81 | for (i = 0; i < chunk->npages; ++i) { | ||
82 | dma_free_coherent(&dev->pdev->dev, chunk->mem[i].length, | ||
83 | lowmem_page_address(chunk->mem[i].page), | ||
84 | sg_dma_address(&chunk->mem[i])); | ||
85 | } | ||
86 | } | ||
87 | |||
88 | void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent) | ||
89 | { | ||
90 | struct mthca_icm_chunk *chunk, *tmp; | ||
91 | |||
66 | if (!icm) | 92 | if (!icm) |
67 | return; | 93 | return; |
68 | 94 | ||
69 | list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) { | 95 | list_for_each_entry_safe(chunk, tmp, &icm->chunk_list, list) { |
70 | if (chunk->nsg > 0) | 96 | if (coherent) |
71 | pci_unmap_sg(dev->pdev, chunk->mem, chunk->npages, | 97 | mthca_free_icm_coherent(dev, chunk); |
72 | PCI_DMA_BIDIRECTIONAL); | 98 | else |
73 | 99 | mthca_free_icm_pages(dev, chunk); | |
74 | for (i = 0; i < chunk->npages; ++i) | ||
75 | __free_pages(chunk->mem[i].page, | ||
76 | get_order(chunk->mem[i].length)); | ||
77 | 100 | ||
78 | kfree(chunk); | 101 | kfree(chunk); |
79 | } | 102 | } |
@@ -81,12 +104,41 @@ void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm) | |||
81 | kfree(icm); | 104 | kfree(icm); |
82 | } | 105 | } |
83 | 106 | ||
107 | static int mthca_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_mask) | ||
108 | { | ||
109 | mem->page = alloc_pages(gfp_mask, order); | ||
110 | if (!mem->page) | ||
111 | return -ENOMEM; | ||
112 | |||
113 | mem->length = PAGE_SIZE << order; | ||
114 | mem->offset = 0; | ||
115 | return 0; | ||
116 | } | ||
117 | |||
118 | static int mthca_alloc_icm_coherent(struct device *dev, struct scatterlist *mem, | ||
119 | int order, gfp_t gfp_mask) | ||
120 | { | ||
121 | void *buf = dma_alloc_coherent(dev, PAGE_SIZE << order, &sg_dma_address(mem), | ||
122 | gfp_mask); | ||
123 | if (!buf) | ||
124 | return -ENOMEM; | ||
125 | |||
126 | sg_set_buf(mem, buf, PAGE_SIZE << order); | ||
127 | BUG_ON(mem->offset); | ||
128 | sg_dma_len(mem) = PAGE_SIZE << order; | ||
129 | return 0; | ||
130 | } | ||
131 | |||
84 | struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, | 132 | struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, |
85 | gfp_t gfp_mask) | 133 | gfp_t gfp_mask, int coherent) |
86 | { | 134 | { |
87 | struct mthca_icm *icm; | 135 | struct mthca_icm *icm; |
88 | struct mthca_icm_chunk *chunk = NULL; | 136 | struct mthca_icm_chunk *chunk = NULL; |
89 | int cur_order; | 137 | int cur_order; |
138 | int ret; | ||
139 | |||
140 | /* We use sg_set_buf for coherent allocs, which assumes low memory */ | ||
141 | BUG_ON(coherent && (gfp_mask & __GFP_HIGHMEM)); | ||
90 | 142 | ||
91 | icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); | 143 | icm = kmalloc(sizeof *icm, gfp_mask & ~(__GFP_HIGHMEM | __GFP_NOWARN)); |
92 | if (!icm) | 144 | if (!icm) |
@@ -112,21 +164,28 @@ struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, | |||
112 | while (1 << cur_order > npages) | 164 | while (1 << cur_order > npages) |
113 | --cur_order; | 165 | --cur_order; |
114 | 166 | ||
115 | chunk->mem[chunk->npages].page = alloc_pages(gfp_mask, cur_order); | 167 | if (coherent) |
116 | if (chunk->mem[chunk->npages].page) { | 168 | ret = mthca_alloc_icm_coherent(&dev->pdev->dev, |
117 | chunk->mem[chunk->npages].length = PAGE_SIZE << cur_order; | 169 | &chunk->mem[chunk->npages], |
118 | chunk->mem[chunk->npages].offset = 0; | 170 | cur_order, gfp_mask); |
171 | else | ||
172 | ret = mthca_alloc_icm_pages(&chunk->mem[chunk->npages], | ||
173 | cur_order, gfp_mask); | ||
119 | 174 | ||
120 | if (++chunk->npages == MTHCA_ICM_CHUNK_LEN) { | 175 | if (!ret) { |
176 | ++chunk->npages; | ||
177 | |||
178 | if (!coherent && chunk->npages == MTHCA_ICM_CHUNK_LEN) { | ||
121 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, | 179 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, |
122 | chunk->npages, | 180 | chunk->npages, |
123 | PCI_DMA_BIDIRECTIONAL); | 181 | PCI_DMA_BIDIRECTIONAL); |
124 | 182 | ||
125 | if (chunk->nsg <= 0) | 183 | if (chunk->nsg <= 0) |
126 | goto fail; | 184 | goto fail; |
185 | } | ||
127 | 186 | ||
187 | if (chunk->npages == MTHCA_ICM_CHUNK_LEN) | ||
128 | chunk = NULL; | 188 | chunk = NULL; |
129 | } | ||
130 | 189 | ||
131 | npages -= 1 << cur_order; | 190 | npages -= 1 << cur_order; |
132 | } else { | 191 | } else { |
@@ -136,7 +195,7 @@ struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, | |||
136 | } | 195 | } |
137 | } | 196 | } |
138 | 197 | ||
139 | if (chunk) { | 198 | if (!coherent && chunk) { |
140 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, | 199 | chunk->nsg = pci_map_sg(dev->pdev, chunk->mem, |
141 | chunk->npages, | 200 | chunk->npages, |
142 | PCI_DMA_BIDIRECTIONAL); | 201 | PCI_DMA_BIDIRECTIONAL); |
@@ -148,7 +207,7 @@ struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, | |||
148 | return icm; | 207 | return icm; |
149 | 208 | ||
150 | fail: | 209 | fail: |
151 | mthca_free_icm(dev, icm); | 210 | mthca_free_icm(dev, icm, coherent); |
152 | return NULL; | 211 | return NULL; |
153 | } | 212 | } |
154 | 213 | ||
@@ -167,7 +226,7 @@ int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int ob | |||
167 | 226 | ||
168 | table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT, | 227 | table->icm[i] = mthca_alloc_icm(dev, MTHCA_TABLE_CHUNK_SIZE >> PAGE_SHIFT, |
169 | (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) | | 228 | (table->lowmem ? GFP_KERNEL : GFP_HIGHUSER) | |
170 | __GFP_NOWARN); | 229 | __GFP_NOWARN, table->coherent); |
171 | if (!table->icm[i]) { | 230 | if (!table->icm[i]) { |
172 | ret = -ENOMEM; | 231 | ret = -ENOMEM; |
173 | goto out; | 232 | goto out; |
@@ -175,7 +234,7 @@ int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int ob | |||
175 | 234 | ||
176 | if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | 235 | if (mthca_MAP_ICM(dev, table->icm[i], table->virt + i * MTHCA_TABLE_CHUNK_SIZE, |
177 | &status) || status) { | 236 | &status) || status) { |
178 | mthca_free_icm(dev, table->icm[i]); | 237 | mthca_free_icm(dev, table->icm[i], table->coherent); |
179 | table->icm[i] = NULL; | 238 | table->icm[i] = NULL; |
180 | ret = -ENOMEM; | 239 | ret = -ENOMEM; |
181 | goto out; | 240 | goto out; |
@@ -204,16 +263,16 @@ void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int o | |||
204 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | 263 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, |
205 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, | 264 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
206 | &status); | 265 | &status); |
207 | mthca_free_icm(dev, table->icm[i]); | 266 | mthca_free_icm(dev, table->icm[i], table->coherent); |
208 | table->icm[i] = NULL; | 267 | table->icm[i] = NULL; |
209 | } | 268 | } |
210 | 269 | ||
211 | mutex_unlock(&table->mutex); | 270 | mutex_unlock(&table->mutex); |
212 | } | 271 | } |
213 | 272 | ||
214 | void *mthca_table_find(struct mthca_icm_table *table, int obj) | 273 | void *mthca_table_find(struct mthca_icm_table *table, int obj, dma_addr_t *dma_handle) |
215 | { | 274 | { |
216 | int idx, offset, i; | 275 | int idx, offset, dma_offset, i; |
217 | struct mthca_icm_chunk *chunk; | 276 | struct mthca_icm_chunk *chunk; |
218 | struct mthca_icm *icm; | 277 | struct mthca_icm *icm; |
219 | struct page *page = NULL; | 278 | struct page *page = NULL; |
@@ -225,13 +284,22 @@ void *mthca_table_find(struct mthca_icm_table *table, int obj) | |||
225 | 284 | ||
226 | idx = (obj & (table->num_obj - 1)) * table->obj_size; | 285 | idx = (obj & (table->num_obj - 1)) * table->obj_size; |
227 | icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE]; | 286 | icm = table->icm[idx / MTHCA_TABLE_CHUNK_SIZE]; |
228 | offset = idx % MTHCA_TABLE_CHUNK_SIZE; | 287 | dma_offset = offset = idx % MTHCA_TABLE_CHUNK_SIZE; |
229 | 288 | ||
230 | if (!icm) | 289 | if (!icm) |
231 | goto out; | 290 | goto out; |
232 | 291 | ||
233 | list_for_each_entry(chunk, &icm->chunk_list, list) { | 292 | list_for_each_entry(chunk, &icm->chunk_list, list) { |
234 | for (i = 0; i < chunk->npages; ++i) { | 293 | for (i = 0; i < chunk->npages; ++i) { |
294 | if (dma_handle && dma_offset >= 0) { | ||
295 | if (sg_dma_len(&chunk->mem[i]) > dma_offset) | ||
296 | *dma_handle = sg_dma_address(&chunk->mem[i]) + | ||
297 | dma_offset; | ||
298 | dma_offset -= sg_dma_len(&chunk->mem[i]); | ||
299 | } | ||
300 | /* DMA mapping can merge pages but not split them, | ||
301 | * so if we found the page, dma_handle has already | ||
302 | * been assigned to. */ | ||
235 | if (chunk->mem[i].length > offset) { | 303 | if (chunk->mem[i].length > offset) { |
236 | page = chunk->mem[i].page; | 304 | page = chunk->mem[i].page; |
237 | goto out; | 305 | goto out; |
@@ -283,7 +351,7 @@ void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table, | |||
283 | struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, | 351 | struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, |
284 | u64 virt, int obj_size, | 352 | u64 virt, int obj_size, |
285 | int nobj, int reserved, | 353 | int nobj, int reserved, |
286 | int use_lowmem) | 354 | int use_lowmem, int use_coherent) |
287 | { | 355 | { |
288 | struct mthca_icm_table *table; | 356 | struct mthca_icm_table *table; |
289 | int num_icm; | 357 | int num_icm; |
@@ -302,6 +370,7 @@ struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, | |||
302 | table->num_obj = nobj; | 370 | table->num_obj = nobj; |
303 | table->obj_size = obj_size; | 371 | table->obj_size = obj_size; |
304 | table->lowmem = use_lowmem; | 372 | table->lowmem = use_lowmem; |
373 | table->coherent = use_coherent; | ||
305 | mutex_init(&table->mutex); | 374 | mutex_init(&table->mutex); |
306 | 375 | ||
307 | for (i = 0; i < num_icm; ++i) | 376 | for (i = 0; i < num_icm; ++i) |
@@ -314,12 +383,12 @@ struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, | |||
314 | 383 | ||
315 | table->icm[i] = mthca_alloc_icm(dev, chunk_size >> PAGE_SHIFT, | 384 | table->icm[i] = mthca_alloc_icm(dev, chunk_size >> PAGE_SHIFT, |
316 | (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) | | 385 | (use_lowmem ? GFP_KERNEL : GFP_HIGHUSER) | |
317 | __GFP_NOWARN); | 386 | __GFP_NOWARN, use_coherent); |
318 | if (!table->icm[i]) | 387 | if (!table->icm[i]) |
319 | goto err; | 388 | goto err; |
320 | if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE, | 389 | if (mthca_MAP_ICM(dev, table->icm[i], virt + i * MTHCA_TABLE_CHUNK_SIZE, |
321 | &status) || status) { | 390 | &status) || status) { |
322 | mthca_free_icm(dev, table->icm[i]); | 391 | mthca_free_icm(dev, table->icm[i], table->coherent); |
323 | table->icm[i] = NULL; | 392 | table->icm[i] = NULL; |
324 | goto err; | 393 | goto err; |
325 | } | 394 | } |
@@ -339,7 +408,7 @@ err: | |||
339 | mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE, | 408 | mthca_UNMAP_ICM(dev, virt + i * MTHCA_TABLE_CHUNK_SIZE, |
340 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, | 409 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
341 | &status); | 410 | &status); |
342 | mthca_free_icm(dev, table->icm[i]); | 411 | mthca_free_icm(dev, table->icm[i], table->coherent); |
343 | } | 412 | } |
344 | 413 | ||
345 | kfree(table); | 414 | kfree(table); |
@@ -357,7 +426,7 @@ void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table) | |||
357 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, | 426 | mthca_UNMAP_ICM(dev, table->virt + i * MTHCA_TABLE_CHUNK_SIZE, |
358 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, | 427 | MTHCA_TABLE_CHUNK_SIZE / MTHCA_ICM_PAGE_SIZE, |
359 | &status); | 428 | &status); |
360 | mthca_free_icm(dev, table->icm[i]); | 429 | mthca_free_icm(dev, table->icm[i], table->coherent); |
361 | } | 430 | } |
362 | 431 | ||
363 | kfree(table); | 432 | kfree(table); |
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.h b/drivers/infiniband/hw/mthca/mthca_memfree.h index 6d42947e1dc4..594144145f45 100644 --- a/drivers/infiniband/hw/mthca/mthca_memfree.h +++ b/drivers/infiniband/hw/mthca/mthca_memfree.h | |||
@@ -69,6 +69,7 @@ struct mthca_icm_table { | |||
69 | int num_obj; | 69 | int num_obj; |
70 | int obj_size; | 70 | int obj_size; |
71 | int lowmem; | 71 | int lowmem; |
72 | int coherent; | ||
72 | struct mutex mutex; | 73 | struct mutex mutex; |
73 | struct mthca_icm *icm[0]; | 74 | struct mthca_icm *icm[0]; |
74 | }; | 75 | }; |
@@ -82,17 +83,17 @@ struct mthca_icm_iter { | |||
82 | struct mthca_dev; | 83 | struct mthca_dev; |
83 | 84 | ||
84 | struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, | 85 | struct mthca_icm *mthca_alloc_icm(struct mthca_dev *dev, int npages, |
85 | gfp_t gfp_mask); | 86 | gfp_t gfp_mask, int coherent); |
86 | void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm); | 87 | void mthca_free_icm(struct mthca_dev *dev, struct mthca_icm *icm, int coherent); |
87 | 88 | ||
88 | struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, | 89 | struct mthca_icm_table *mthca_alloc_icm_table(struct mthca_dev *dev, |
89 | u64 virt, int obj_size, | 90 | u64 virt, int obj_size, |
90 | int nobj, int reserved, | 91 | int nobj, int reserved, |
91 | int use_lowmem); | 92 | int use_lowmem, int use_coherent); |
92 | void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table); | 93 | void mthca_free_icm_table(struct mthca_dev *dev, struct mthca_icm_table *table); |
93 | int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj); | 94 | int mthca_table_get(struct mthca_dev *dev, struct mthca_icm_table *table, int obj); |
94 | void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj); | 95 | void mthca_table_put(struct mthca_dev *dev, struct mthca_icm_table *table, int obj); |
95 | void *mthca_table_find(struct mthca_icm_table *table, int obj); | 96 | void *mthca_table_find(struct mthca_icm_table *table, int obj, dma_addr_t *dma_handle); |
96 | int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table, | 97 | int mthca_table_get_range(struct mthca_dev *dev, struct mthca_icm_table *table, |
97 | int start, int end); | 98 | int start, int end); |
98 | void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table, | 99 | void mthca_table_put_range(struct mthca_dev *dev, struct mthca_icm_table *table, |
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c index f71ffa88db3a..6037dd3f87df 100644 --- a/drivers/infiniband/hw/mthca/mthca_mr.c +++ b/drivers/infiniband/hw/mthca/mthca_mr.c | |||
@@ -243,8 +243,8 @@ void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt) | |||
243 | kfree(mtt); | 243 | kfree(mtt); |
244 | } | 244 | } |
245 | 245 | ||
246 | int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, | 246 | static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, |
247 | int start_index, u64 *buffer_list, int list_len) | 247 | int start_index, u64 *buffer_list, int list_len) |
248 | { | 248 | { |
249 | struct mthca_mailbox *mailbox; | 249 | struct mthca_mailbox *mailbox; |
250 | __be64 *mtt_entry; | 250 | __be64 *mtt_entry; |
@@ -295,6 +295,84 @@ out: | |||
295 | return err; | 295 | return err; |
296 | } | 296 | } |
297 | 297 | ||
298 | int mthca_write_mtt_size(struct mthca_dev *dev) | ||
299 | { | ||
300 | if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy) | ||
301 | /* | ||
302 | * Be friendly to WRITE_MTT command | ||
303 | * and leave two empty slots for the | ||
304 | * index and reserved fields of the | ||
305 | * mailbox. | ||
306 | */ | ||
307 | return PAGE_SIZE / sizeof (u64) - 2; | ||
308 | |||
309 | /* For Arbel, all MTTs must fit in the same page. */ | ||
310 | return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff; | ||
311 | } | ||
312 | |||
313 | void mthca_tavor_write_mtt_seg(struct mthca_dev *dev, struct mthca_mtt *mtt, | ||
314 | int start_index, u64 *buffer_list, int list_len) | ||
315 | { | ||
316 | u64 __iomem *mtts; | ||
317 | int i; | ||
318 | |||
319 | mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * MTHCA_MTT_SEG_SIZE + | ||
320 | start_index * sizeof (u64); | ||
321 | for (i = 0; i < list_len; ++i) | ||
322 | mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT), | ||
323 | mtts + i); | ||
324 | } | ||
325 | |||
326 | void mthca_arbel_write_mtt_seg(struct mthca_dev *dev, struct mthca_mtt *mtt, | ||
327 | int start_index, u64 *buffer_list, int list_len) | ||
328 | { | ||
329 | __be64 *mtts; | ||
330 | dma_addr_t dma_handle; | ||
331 | int i; | ||
332 | int s = start_index * sizeof (u64); | ||
333 | |||
334 | /* For Arbel, all MTTs must fit in the same page. */ | ||
335 | BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE); | ||
336 | /* Require full segments */ | ||
337 | BUG_ON(s % MTHCA_MTT_SEG_SIZE); | ||
338 | |||
339 | mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg + | ||
340 | s / MTHCA_MTT_SEG_SIZE, &dma_handle); | ||
341 | |||
342 | BUG_ON(!mtts); | ||
343 | |||
344 | for (i = 0; i < list_len; ++i) | ||
345 | mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT); | ||
346 | |||
347 | dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE); | ||
348 | } | ||
349 | |||
350 | int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt, | ||
351 | int start_index, u64 *buffer_list, int list_len) | ||
352 | { | ||
353 | int size = mthca_write_mtt_size(dev); | ||
354 | int chunk; | ||
355 | |||
356 | if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy) | ||
357 | return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len); | ||
358 | |||
359 | while (list_len > 0) { | ||
360 | chunk = min(size, list_len); | ||
361 | if (mthca_is_memfree(dev)) | ||
362 | mthca_arbel_write_mtt_seg(dev, mtt, start_index, | ||
363 | buffer_list, chunk); | ||
364 | else | ||
365 | mthca_tavor_write_mtt_seg(dev, mtt, start_index, | ||
366 | buffer_list, chunk); | ||
367 | |||
368 | list_len -= chunk; | ||
369 | start_index += chunk; | ||
370 | buffer_list += chunk; | ||
371 | } | ||
372 | |||
373 | return 0; | ||
374 | } | ||
375 | |||
298 | static inline u32 tavor_hw_index_to_key(u32 ind) | 376 | static inline u32 tavor_hw_index_to_key(u32 ind) |
299 | { | 377 | { |
300 | return ind; | 378 | return ind; |
@@ -524,7 +602,7 @@ int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd, | |||
524 | if (err) | 602 | if (err) |
525 | goto err_out_mpt_free; | 603 | goto err_out_mpt_free; |
526 | 604 | ||
527 | mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key); | 605 | mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL); |
528 | BUG_ON(!mr->mem.arbel.mpt); | 606 | BUG_ON(!mr->mem.arbel.mpt); |
529 | } else | 607 | } else |
530 | mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base + | 608 | mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base + |
@@ -538,7 +616,8 @@ int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd, | |||
538 | 616 | ||
539 | if (mthca_is_memfree(dev)) { | 617 | if (mthca_is_memfree(dev)) { |
540 | mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table, | 618 | mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table, |
541 | mr->mtt->first_seg); | 619 | mr->mtt->first_seg, |
620 | &mr->mem.arbel.dma_handle); | ||
542 | BUG_ON(!mr->mem.arbel.mtts); | 621 | BUG_ON(!mr->mem.arbel.mtts); |
543 | } else | 622 | } else |
544 | mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg; | 623 | mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg; |
@@ -712,6 +791,9 @@ int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list, | |||
712 | fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] | | 791 | fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] | |
713 | MTHCA_MTT_FLAG_PRESENT); | 792 | MTHCA_MTT_FLAG_PRESENT); |
714 | 793 | ||
794 | dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle, | ||
795 | list_len * sizeof(u64), DMA_TO_DEVICE); | ||
796 | |||
715 | fmr->mem.arbel.mpt->key = cpu_to_be32(key); | 797 | fmr->mem.arbel.mpt->key = cpu_to_be32(key); |
716 | fmr->mem.arbel.mpt->lkey = cpu_to_be32(key); | 798 | fmr->mem.arbel.mpt->lkey = cpu_to_be32(key); |
717 | fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift)); | 799 | fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift)); |
@@ -761,7 +843,7 @@ void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr) | |||
761 | int mthca_init_mr_table(struct mthca_dev *dev) | 843 | int mthca_init_mr_table(struct mthca_dev *dev) |
762 | { | 844 | { |
763 | unsigned long addr; | 845 | unsigned long addr; |
764 | int err, i; | 846 | int mpts, mtts, err, i; |
765 | 847 | ||
766 | err = mthca_alloc_init(&dev->mr_table.mpt_alloc, | 848 | err = mthca_alloc_init(&dev->mr_table.mpt_alloc, |
767 | dev->limits.num_mpts, | 849 | dev->limits.num_mpts, |
@@ -795,13 +877,21 @@ int mthca_init_mr_table(struct mthca_dev *dev) | |||
795 | err = -EINVAL; | 877 | err = -EINVAL; |
796 | goto err_fmr_mpt; | 878 | goto err_fmr_mpt; |
797 | } | 879 | } |
880 | mpts = mtts = 1 << i; | ||
881 | } else { | ||
882 | mpts = dev->limits.num_mtt_segs; | ||
883 | mtts = dev->limits.num_mpts; | ||
884 | } | ||
885 | |||
886 | if (!mthca_is_memfree(dev) && | ||
887 | (dev->mthca_flags & MTHCA_FLAG_FMR)) { | ||
798 | 888 | ||
799 | addr = pci_resource_start(dev->pdev, 4) + | 889 | addr = pci_resource_start(dev->pdev, 4) + |
800 | ((pci_resource_len(dev->pdev, 4) - 1) & | 890 | ((pci_resource_len(dev->pdev, 4) - 1) & |
801 | dev->mr_table.mpt_base); | 891 | dev->mr_table.mpt_base); |
802 | 892 | ||
803 | dev->mr_table.tavor_fmr.mpt_base = | 893 | dev->mr_table.tavor_fmr.mpt_base = |
804 | ioremap(addr, (1 << i) * sizeof(struct mthca_mpt_entry)); | 894 | ioremap(addr, mpts * sizeof(struct mthca_mpt_entry)); |
805 | 895 | ||
806 | if (!dev->mr_table.tavor_fmr.mpt_base) { | 896 | if (!dev->mr_table.tavor_fmr.mpt_base) { |
807 | mthca_warn(dev, "MPT ioremap for FMR failed.\n"); | 897 | mthca_warn(dev, "MPT ioremap for FMR failed.\n"); |
@@ -814,19 +904,21 @@ int mthca_init_mr_table(struct mthca_dev *dev) | |||
814 | dev->mr_table.mtt_base); | 904 | dev->mr_table.mtt_base); |
815 | 905 | ||
816 | dev->mr_table.tavor_fmr.mtt_base = | 906 | dev->mr_table.tavor_fmr.mtt_base = |
817 | ioremap(addr, (1 << i) * MTHCA_MTT_SEG_SIZE); | 907 | ioremap(addr, mtts * MTHCA_MTT_SEG_SIZE); |
818 | if (!dev->mr_table.tavor_fmr.mtt_base) { | 908 | if (!dev->mr_table.tavor_fmr.mtt_base) { |
819 | mthca_warn(dev, "MTT ioremap for FMR failed.\n"); | 909 | mthca_warn(dev, "MTT ioremap for FMR failed.\n"); |
820 | err = -ENOMEM; | 910 | err = -ENOMEM; |
821 | goto err_fmr_mtt; | 911 | goto err_fmr_mtt; |
822 | } | 912 | } |
913 | } | ||
823 | 914 | ||
824 | err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, i); | 915 | if (dev->limits.fmr_reserved_mtts) { |
916 | err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1)); | ||
825 | if (err) | 917 | if (err) |
826 | goto err_fmr_mtt_buddy; | 918 | goto err_fmr_mtt_buddy; |
827 | 919 | ||
828 | /* Prevent regular MRs from using FMR keys */ | 920 | /* Prevent regular MRs from using FMR keys */ |
829 | err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, i); | 921 | err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1)); |
830 | if (err) | 922 | if (err) |
831 | goto err_reserve_fmr; | 923 | goto err_reserve_fmr; |
832 | 924 | ||
diff --git a/drivers/infiniband/hw/mthca/mthca_profile.c b/drivers/infiniband/hw/mthca/mthca_profile.c index 58d44aa3c302..26bf86d1cfcd 100644 --- a/drivers/infiniband/hw/mthca/mthca_profile.c +++ b/drivers/infiniband/hw/mthca/mthca_profile.c | |||
@@ -277,7 +277,7 @@ u64 mthca_make_profile(struct mthca_dev *dev, | |||
277 | * out of the MR pool. They don't use additional memory, but | 277 | * out of the MR pool. They don't use additional memory, but |
278 | * we assign them as part of the HCA profile anyway. | 278 | * we assign them as part of the HCA profile anyway. |
279 | */ | 279 | */ |
280 | if (mthca_is_memfree(dev)) | 280 | if (mthca_is_memfree(dev) || BITS_PER_LONG == 64) |
281 | dev->limits.fmr_reserved_mtts = 0; | 281 | dev->limits.fmr_reserved_mtts = 0; |
282 | else | 282 | else |
283 | dev->limits.fmr_reserved_mtts = request->fmr_reserved_mtts; | 283 | dev->limits.fmr_reserved_mtts = request->fmr_reserved_mtts; |
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.c b/drivers/infiniband/hw/mthca/mthca_provider.c index 7b96751695ea..0725ad7ad9bf 100644 --- a/drivers/infiniband/hw/mthca/mthca_provider.c +++ b/drivers/infiniband/hw/mthca/mthca_provider.c | |||
@@ -1015,6 +1015,7 @@ static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region, | |||
1015 | int shift, n, len; | 1015 | int shift, n, len; |
1016 | int i, j, k; | 1016 | int i, j, k; |
1017 | int err = 0; | 1017 | int err = 0; |
1018 | int write_mtt_size; | ||
1018 | 1019 | ||
1019 | shift = ffs(region->page_size) - 1; | 1020 | shift = ffs(region->page_size) - 1; |
1020 | 1021 | ||
@@ -1040,6 +1041,8 @@ static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region, | |||
1040 | 1041 | ||
1041 | i = n = 0; | 1042 | i = n = 0; |
1042 | 1043 | ||
1044 | write_mtt_size = min(mthca_write_mtt_size(dev), (int) (PAGE_SIZE / sizeof *pages)); | ||
1045 | |||
1043 | list_for_each_entry(chunk, ®ion->chunk_list, list) | 1046 | list_for_each_entry(chunk, ®ion->chunk_list, list) |
1044 | for (j = 0; j < chunk->nmap; ++j) { | 1047 | for (j = 0; j < chunk->nmap; ++j) { |
1045 | len = sg_dma_len(&chunk->page_list[j]) >> shift; | 1048 | len = sg_dma_len(&chunk->page_list[j]) >> shift; |
@@ -1047,14 +1050,11 @@ static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region, | |||
1047 | pages[i++] = sg_dma_address(&chunk->page_list[j]) + | 1050 | pages[i++] = sg_dma_address(&chunk->page_list[j]) + |
1048 | region->page_size * k; | 1051 | region->page_size * k; |
1049 | /* | 1052 | /* |
1050 | * Be friendly to WRITE_MTT command | 1053 | * Be friendly to write_mtt and pass it chunks |
1051 | * and leave two empty slots for the | 1054 | * of appropriate size. |
1052 | * index and reserved fields of the | ||
1053 | * mailbox. | ||
1054 | */ | 1055 | */ |
1055 | if (i == PAGE_SIZE / sizeof (u64) - 2) { | 1056 | if (i == write_mtt_size) { |
1056 | err = mthca_write_mtt(dev, mr->mtt, | 1057 | err = mthca_write_mtt(dev, mr->mtt, n, pages, i); |
1057 | n, pages, i); | ||
1058 | if (err) | 1058 | if (err) |
1059 | goto mtt_done; | 1059 | goto mtt_done; |
1060 | n += i; | 1060 | n += i; |
diff --git a/drivers/infiniband/hw/mthca/mthca_provider.h b/drivers/infiniband/hw/mthca/mthca_provider.h index 9a5bece3fa5c..1d266ac2e094 100644 --- a/drivers/infiniband/hw/mthca/mthca_provider.h +++ b/drivers/infiniband/hw/mthca/mthca_provider.h | |||
@@ -89,6 +89,7 @@ struct mthca_fmr { | |||
89 | struct { | 89 | struct { |
90 | struct mthca_mpt_entry *mpt; | 90 | struct mthca_mpt_entry *mpt; |
91 | __be64 *mtts; | 91 | __be64 *mtts; |
92 | dma_addr_t dma_handle; | ||
92 | } arbel; | 93 | } arbel; |
93 | } mem; | 94 | } mem; |
94 | }; | 95 | }; |
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c index 5f5214c0337d..224c93dd29eb 100644 --- a/drivers/infiniband/hw/mthca/mthca_qp.c +++ b/drivers/infiniband/hw/mthca/mthca_qp.c | |||
@@ -399,7 +399,7 @@ static int to_ib_qp_access_flags(int mthca_flags) | |||
399 | static void to_ib_ah_attr(struct mthca_dev *dev, struct ib_ah_attr *ib_ah_attr, | 399 | static void to_ib_ah_attr(struct mthca_dev *dev, struct ib_ah_attr *ib_ah_attr, |
400 | struct mthca_qp_path *path) | 400 | struct mthca_qp_path *path) |
401 | { | 401 | { |
402 | memset(ib_ah_attr, 0, sizeof *path); | 402 | memset(ib_ah_attr, 0, sizeof *ib_ah_attr); |
403 | ib_ah_attr->port_num = (be32_to_cpu(path->port_pkey) >> 24) & 0x3; | 403 | ib_ah_attr->port_num = (be32_to_cpu(path->port_pkey) >> 24) & 0x3; |
404 | 404 | ||
405 | if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->limits.num_ports) | 405 | if (ib_ah_attr->port_num == 0 || ib_ah_attr->port_num > dev->limits.num_ports) |
diff --git a/drivers/infiniband/hw/mthca/mthca_srq.c b/drivers/infiniband/hw/mthca/mthca_srq.c index 10684da33d58..61974b0296ca 100644 --- a/drivers/infiniband/hw/mthca/mthca_srq.c +++ b/drivers/infiniband/hw/mthca/mthca_srq.c | |||
@@ -116,11 +116,16 @@ static void mthca_arbel_init_srq_context(struct mthca_dev *dev, | |||
116 | struct mthca_srq *srq, | 116 | struct mthca_srq *srq, |
117 | struct mthca_arbel_srq_context *context) | 117 | struct mthca_arbel_srq_context *context) |
118 | { | 118 | { |
119 | int logsize; | 119 | int logsize, max; |
120 | 120 | ||
121 | memset(context, 0, sizeof *context); | 121 | memset(context, 0, sizeof *context); |
122 | 122 | ||
123 | logsize = ilog2(srq->max); | 123 | /* |
124 | * Put max in a temporary variable to work around gcc bug | ||
125 | * triggered by ilog2() on sparc64. | ||
126 | */ | ||
127 | max = srq->max; | ||
128 | logsize = ilog2(max); | ||
124 | context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn); | 129 | context->state_logsize_srqn = cpu_to_be32(logsize << 24 | srq->srqn); |
125 | context->lkey = cpu_to_be32(srq->mr.ibmr.lkey); | 130 | context->lkey = cpu_to_be32(srq->mr.ibmr.lkey); |
126 | context->db_index = cpu_to_be32(srq->db_index); | 131 | context->db_index = cpu_to_be32(srq->db_index); |
diff --git a/drivers/infiniband/ulp/ipoib/Kconfig b/drivers/infiniband/ulp/ipoib/Kconfig index c75322d820d4..af78ccc4ce71 100644 --- a/drivers/infiniband/ulp/ipoib/Kconfig +++ b/drivers/infiniband/ulp/ipoib/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config INFINIBAND_IPOIB | 1 | config INFINIBAND_IPOIB |
2 | tristate "IP-over-InfiniBand" | 2 | tristate "IP-over-InfiniBand" |
3 | depends on INFINIBAND && NETDEVICES && INET | 3 | depends on INFINIBAND && NETDEVICES && INET && (IPV6 || IPV6=n) |
4 | ---help--- | 4 | ---help--- |
5 | Support for the IP-over-InfiniBand protocol (IPoIB). This | 5 | Support for the IP-over-InfiniBand protocol (IPoIB). This |
6 | transports IP packets over InfiniBand so you can use your IB | 6 | transports IP packets over InfiniBand so you can use your IB |
@@ -8,6 +8,20 @@ config INFINIBAND_IPOIB | |||
8 | 8 | ||
9 | See Documentation/infiniband/ipoib.txt for more information | 9 | See Documentation/infiniband/ipoib.txt for more information |
10 | 10 | ||
11 | config INFINIBAND_IPOIB_CM | ||
12 | bool "IP-over-InfiniBand Connected Mode support" | ||
13 | depends on INFINIBAND_IPOIB && EXPERIMENTAL | ||
14 | default n | ||
15 | ---help--- | ||
16 | This option enables experimental support for IPoIB connected mode. | ||
17 | After enabling this option, you need to switch to connected mode through | ||
18 | /sys/class/net/ibXXX/mode to actually create connections, and then increase | ||
19 | the interface MTU with e.g. ifconfig ib0 mtu 65520. | ||
20 | |||
21 | WARNING: Enabling connected mode will trigger some | ||
22 | packet drops for multicast and UD mode traffic from this interface, | ||
23 | unless you limit mtu for these destinations to 2044. | ||
24 | |||
11 | config INFINIBAND_IPOIB_DEBUG | 25 | config INFINIBAND_IPOIB_DEBUG |
12 | bool "IP-over-InfiniBand debugging" if EMBEDDED | 26 | bool "IP-over-InfiniBand debugging" if EMBEDDED |
13 | depends on INFINIBAND_IPOIB | 27 | depends on INFINIBAND_IPOIB |
diff --git a/drivers/infiniband/ulp/ipoib/Makefile b/drivers/infiniband/ulp/ipoib/Makefile index 8935e74ae3f8..98ee38e8c2c4 100644 --- a/drivers/infiniband/ulp/ipoib/Makefile +++ b/drivers/infiniband/ulp/ipoib/Makefile | |||
@@ -5,5 +5,6 @@ ib_ipoib-y := ipoib_main.o \ | |||
5 | ipoib_multicast.o \ | 5 | ipoib_multicast.o \ |
6 | ipoib_verbs.o \ | 6 | ipoib_verbs.o \ |
7 | ipoib_vlan.o | 7 | ipoib_vlan.o |
8 | ib_ipoib-$(CONFIG_INFINIBAND_IPOIB_CM) += ipoib_cm.o | ||
8 | ib_ipoib-$(CONFIG_INFINIBAND_IPOIB_DEBUG) += ipoib_fs.o | 9 | ib_ipoib-$(CONFIG_INFINIBAND_IPOIB_DEBUG) += ipoib_fs.o |
9 | 10 | ||
diff --git a/drivers/infiniband/ulp/ipoib/ipoib.h b/drivers/infiniband/ulp/ipoib/ipoib.h index 07deee8f81ce..2594db2030b3 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib.h +++ b/drivers/infiniband/ulp/ipoib/ipoib.h | |||
@@ -62,6 +62,10 @@ enum { | |||
62 | 62 | ||
63 | IPOIB_ENCAP_LEN = 4, | 63 | IPOIB_ENCAP_LEN = 4, |
64 | 64 | ||
65 | IPOIB_CM_MTU = 0x10000 - 0x10, /* padding to align header to 16 */ | ||
66 | IPOIB_CM_BUF_SIZE = IPOIB_CM_MTU + IPOIB_ENCAP_LEN, | ||
67 | IPOIB_CM_HEAD_SIZE = IPOIB_CM_BUF_SIZE % PAGE_SIZE, | ||
68 | IPOIB_CM_RX_SG = ALIGN(IPOIB_CM_BUF_SIZE, PAGE_SIZE) / PAGE_SIZE, | ||
65 | IPOIB_RX_RING_SIZE = 128, | 69 | IPOIB_RX_RING_SIZE = 128, |
66 | IPOIB_TX_RING_SIZE = 64, | 70 | IPOIB_TX_RING_SIZE = 64, |
67 | IPOIB_MAX_QUEUE_SIZE = 8192, | 71 | IPOIB_MAX_QUEUE_SIZE = 8192, |
@@ -81,6 +85,8 @@ enum { | |||
81 | IPOIB_MCAST_RUN = 6, | 85 | IPOIB_MCAST_RUN = 6, |
82 | IPOIB_STOP_REAPER = 7, | 86 | IPOIB_STOP_REAPER = 7, |
83 | IPOIB_MCAST_STARTED = 8, | 87 | IPOIB_MCAST_STARTED = 8, |
88 | IPOIB_FLAG_NETIF_STOPPED = 9, | ||
89 | IPOIB_FLAG_ADMIN_CM = 10, | ||
84 | 90 | ||
85 | IPOIB_MAX_BACKOFF_SECONDS = 16, | 91 | IPOIB_MAX_BACKOFF_SECONDS = 16, |
86 | 92 | ||
@@ -90,6 +96,13 @@ enum { | |||
90 | IPOIB_MCAST_FLAG_ATTACHED = 3, | 96 | IPOIB_MCAST_FLAG_ATTACHED = 3, |
91 | }; | 97 | }; |
92 | 98 | ||
99 | #define IPOIB_OP_RECV (1ul << 31) | ||
100 | #ifdef CONFIG_INFINIBAND_IPOIB_CM | ||
101 | #define IPOIB_CM_OP_SRQ (1ul << 30) | ||
102 | #else | ||
103 | #define IPOIB_CM_OP_SRQ (0) | ||
104 | #endif | ||
105 | |||
93 | /* structs */ | 106 | /* structs */ |
94 | 107 | ||
95 | struct ipoib_header { | 108 | struct ipoib_header { |
@@ -113,6 +126,59 @@ struct ipoib_tx_buf { | |||
113 | u64 mapping; | 126 | u64 mapping; |
114 | }; | 127 | }; |
115 | 128 | ||
129 | struct ib_cm_id; | ||
130 | |||
131 | struct ipoib_cm_data { | ||
132 | __be32 qpn; /* High byte MUST be ignored on receive */ | ||
133 | __be32 mtu; | ||
134 | }; | ||
135 | |||
136 | struct ipoib_cm_rx { | ||
137 | struct ib_cm_id *id; | ||
138 | struct ib_qp *qp; | ||
139 | struct list_head list; | ||
140 | struct net_device *dev; | ||
141 | unsigned long jiffies; | ||
142 | }; | ||
143 | |||
144 | struct ipoib_cm_tx { | ||
145 | struct ib_cm_id *id; | ||
146 | struct ib_cq *cq; | ||
147 | struct ib_qp *qp; | ||
148 | struct list_head list; | ||
149 | struct net_device *dev; | ||
150 | struct ipoib_neigh *neigh; | ||
151 | struct ipoib_path *path; | ||
152 | struct ipoib_tx_buf *tx_ring; | ||
153 | unsigned tx_head; | ||
154 | unsigned tx_tail; | ||
155 | unsigned long flags; | ||
156 | u32 mtu; | ||
157 | struct ib_wc ibwc[IPOIB_NUM_WC]; | ||
158 | }; | ||
159 | |||
160 | struct ipoib_cm_rx_buf { | ||
161 | struct sk_buff *skb; | ||
162 | u64 mapping[IPOIB_CM_RX_SG]; | ||
163 | }; | ||
164 | |||
165 | struct ipoib_cm_dev_priv { | ||
166 | struct ib_srq *srq; | ||
167 | struct ipoib_cm_rx_buf *srq_ring; | ||
168 | struct ib_cm_id *id; | ||
169 | struct list_head passive_ids; | ||
170 | struct work_struct start_task; | ||
171 | struct work_struct reap_task; | ||
172 | struct work_struct skb_task; | ||
173 | struct delayed_work stale_task; | ||
174 | struct sk_buff_head skb_queue; | ||
175 | struct list_head start_list; | ||
176 | struct list_head reap_list; | ||
177 | struct ib_wc ibwc[IPOIB_NUM_WC]; | ||
178 | struct ib_sge rx_sge[IPOIB_CM_RX_SG]; | ||
179 | struct ib_recv_wr rx_wr; | ||
180 | }; | ||
181 | |||
116 | /* | 182 | /* |
117 | * Device private locking: tx_lock protects members used in TX fast | 183 | * Device private locking: tx_lock protects members used in TX fast |
118 | * path (and we use LLTX so upper layers don't do extra locking). | 184 | * path (and we use LLTX so upper layers don't do extra locking). |
@@ -179,6 +245,10 @@ struct ipoib_dev_priv { | |||
179 | struct list_head child_intfs; | 245 | struct list_head child_intfs; |
180 | struct list_head list; | 246 | struct list_head list; |
181 | 247 | ||
248 | #ifdef CONFIG_INFINIBAND_IPOIB_CM | ||
249 | struct ipoib_cm_dev_priv cm; | ||
250 | #endif | ||
251 | |||
182 | #ifdef CONFIG_INFINIBAND_IPOIB_DEBUG | 252 | #ifdef CONFIG_INFINIBAND_IPOIB_DEBUG |
183 | struct list_head fs_list; | 253 | struct list_head fs_list; |
184 | struct dentry *mcg_dentry; | 254 | struct dentry *mcg_dentry; |
@@ -212,6 +282,9 @@ struct ipoib_path { | |||
212 | 282 | ||
213 | struct ipoib_neigh { | 283 | struct ipoib_neigh { |
214 | struct ipoib_ah *ah; | 284 | struct ipoib_ah *ah; |
285 | #ifdef CONFIG_INFINIBAND_IPOIB_CM | ||
286 | struct ipoib_cm_tx *cm; | ||
287 | #endif | ||
215 | union ib_gid dgid; | 288 | union ib_gid dgid; |
216 | struct sk_buff_head queue; | 289 | struct sk_buff_head queue; |
217 | 290 | ||
@@ -315,6 +388,146 @@ int ipoib_vlan_delete(struct net_device *pdev, unsigned short pkey); | |||
315 | void ipoib_pkey_poll(struct work_struct *work); | 388 | void ipoib_pkey_poll(struct work_struct *work); |
316 | int ipoib_pkey_dev_delay_open(struct net_device *dev); | 389 | int ipoib_pkey_dev_delay_open(struct net_device *dev); |
317 | 390 | ||
391 | #ifdef CONFIG_INFINIBAND_IPOIB_CM | ||
392 | |||
393 | #define IPOIB_FLAGS_RC 0x80 | ||
394 | #define IPOIB_FLAGS_UC 0x40 | ||
395 | |||
396 | /* We don't support UC connections at the moment */ | ||
397 | #define IPOIB_CM_SUPPORTED(ha) (ha[0] & (IPOIB_FLAGS_RC)) | ||
398 | |||
399 | static inline int ipoib_cm_admin_enabled(struct net_device *dev) | ||
400 | { | ||
401 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
402 | return IPOIB_CM_SUPPORTED(dev->dev_addr) && | ||
403 | test_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags); | ||
404 | } | ||
405 | |||
406 | static inline int ipoib_cm_enabled(struct net_device *dev, struct neighbour *n) | ||
407 | { | ||
408 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
409 | return IPOIB_CM_SUPPORTED(n->ha) && | ||
410 | test_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags); | ||
411 | } | ||
412 | |||
413 | static inline int ipoib_cm_up(struct ipoib_neigh *neigh) | ||
414 | |||
415 | { | ||
416 | return test_bit(IPOIB_FLAG_OPER_UP, &neigh->cm->flags); | ||
417 | } | ||
418 | |||
419 | static inline struct ipoib_cm_tx *ipoib_cm_get(struct ipoib_neigh *neigh) | ||
420 | { | ||
421 | return neigh->cm; | ||
422 | } | ||
423 | |||
424 | static inline void ipoib_cm_set(struct ipoib_neigh *neigh, struct ipoib_cm_tx *tx) | ||
425 | { | ||
426 | neigh->cm = tx; | ||
427 | } | ||
428 | |||
429 | void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_tx *tx); | ||
430 | int ipoib_cm_dev_open(struct net_device *dev); | ||
431 | void ipoib_cm_dev_stop(struct net_device *dev); | ||
432 | int ipoib_cm_dev_init(struct net_device *dev); | ||
433 | int ipoib_cm_add_mode_attr(struct net_device *dev); | ||
434 | void ipoib_cm_dev_cleanup(struct net_device *dev); | ||
435 | struct ipoib_cm_tx *ipoib_cm_create_tx(struct net_device *dev, struct ipoib_path *path, | ||
436 | struct ipoib_neigh *neigh); | ||
437 | void ipoib_cm_destroy_tx(struct ipoib_cm_tx *tx); | ||
438 | void ipoib_cm_skb_too_long(struct net_device* dev, struct sk_buff *skb, | ||
439 | unsigned int mtu); | ||
440 | void ipoib_cm_handle_rx_wc(struct net_device *dev, struct ib_wc *wc); | ||
441 | #else | ||
442 | |||
443 | struct ipoib_cm_tx; | ||
444 | |||
445 | static inline int ipoib_cm_admin_enabled(struct net_device *dev) | ||
446 | { | ||
447 | return 0; | ||
448 | } | ||
449 | static inline int ipoib_cm_enabled(struct net_device *dev, struct neighbour *n) | ||
450 | |||
451 | { | ||
452 | return 0; | ||
453 | } | ||
454 | |||
455 | static inline int ipoib_cm_up(struct ipoib_neigh *neigh) | ||
456 | |||
457 | { | ||
458 | return 0; | ||
459 | } | ||
460 | |||
461 | static inline struct ipoib_cm_tx *ipoib_cm_get(struct ipoib_neigh *neigh) | ||
462 | { | ||
463 | return NULL; | ||
464 | } | ||
465 | |||
466 | static inline void ipoib_cm_set(struct ipoib_neigh *neigh, struct ipoib_cm_tx *tx) | ||
467 | { | ||
468 | } | ||
469 | |||
470 | static inline | ||
471 | void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_tx *tx) | ||
472 | { | ||
473 | return; | ||
474 | } | ||
475 | |||
476 | static inline | ||
477 | int ipoib_cm_dev_open(struct net_device *dev) | ||
478 | { | ||
479 | return 0; | ||
480 | } | ||
481 | |||
482 | static inline | ||
483 | void ipoib_cm_dev_stop(struct net_device *dev) | ||
484 | { | ||
485 | return; | ||
486 | } | ||
487 | |||
488 | static inline | ||
489 | int ipoib_cm_dev_init(struct net_device *dev) | ||
490 | { | ||
491 | return -ENOSYS; | ||
492 | } | ||
493 | |||
494 | static inline | ||
495 | void ipoib_cm_dev_cleanup(struct net_device *dev) | ||
496 | { | ||
497 | return; | ||
498 | } | ||
499 | |||
500 | static inline | ||
501 | struct ipoib_cm_tx *ipoib_cm_create_tx(struct net_device *dev, struct ipoib_path *path, | ||
502 | struct ipoib_neigh *neigh) | ||
503 | { | ||
504 | return NULL; | ||
505 | } | ||
506 | |||
507 | static inline | ||
508 | void ipoib_cm_destroy_tx(struct ipoib_cm_tx *tx) | ||
509 | { | ||
510 | return; | ||
511 | } | ||
512 | |||
513 | static inline | ||
514 | int ipoib_cm_add_mode_attr(struct net_device *dev) | ||
515 | { | ||
516 | return 0; | ||
517 | } | ||
518 | |||
519 | static inline void ipoib_cm_skb_too_long(struct net_device* dev, struct sk_buff *skb, | ||
520 | unsigned int mtu) | ||
521 | { | ||
522 | dev_kfree_skb_any(skb); | ||
523 | } | ||
524 | |||
525 | static inline void ipoib_cm_handle_rx_wc(struct net_device *dev, struct ib_wc *wc) | ||
526 | { | ||
527 | } | ||
528 | |||
529 | #endif | ||
530 | |||
318 | #ifdef CONFIG_INFINIBAND_IPOIB_DEBUG | 531 | #ifdef CONFIG_INFINIBAND_IPOIB_DEBUG |
319 | void ipoib_create_debug_files(struct net_device *dev); | 532 | void ipoib_create_debug_files(struct net_device *dev); |
320 | void ipoib_delete_debug_files(struct net_device *dev); | 533 | void ipoib_delete_debug_files(struct net_device *dev); |
@@ -392,4 +605,6 @@ extern int ipoib_debug_level; | |||
392 | 605 | ||
393 | #define IPOIB_GID_ARG(gid) IPOIB_GID_RAW_ARG((gid).raw) | 606 | #define IPOIB_GID_ARG(gid) IPOIB_GID_RAW_ARG((gid).raw) |
394 | 607 | ||
608 | #define IPOIB_QPN(ha) (be32_to_cpup((__be32 *) ha) & 0xffffff) | ||
609 | |||
395 | #endif /* _IPOIB_H */ | 610 | #endif /* _IPOIB_H */ |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_cm.c b/drivers/infiniband/ulp/ipoib/ipoib_cm.c new file mode 100644 index 000000000000..2d483874a589 --- /dev/null +++ b/drivers/infiniband/ulp/ipoib/ipoib_cm.c | |||
@@ -0,0 +1,1237 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2006 Mellanox Technologies. All rights reserved | ||
3 | * | ||
4 | * This software is available to you under a choice of one of two | ||
5 | * licenses. You may choose to be licensed under the terms of the GNU | ||
6 | * General Public License (GPL) Version 2, available from the file | ||
7 | * COPYING in the main directory of this source tree, or the | ||
8 | * OpenIB.org BSD license below: | ||
9 | * | ||
10 | * Redistribution and use in source and binary forms, with or | ||
11 | * without modification, are permitted provided that the following | ||
12 | * conditions are met: | ||
13 | * | ||
14 | * - Redistributions of source code must retain the above | ||
15 | * copyright notice, this list of conditions and the following | ||
16 | * disclaimer. | ||
17 | * | ||
18 | * - Redistributions in binary form must reproduce the above | ||
19 | * copyright notice, this list of conditions and the following | ||
20 | * disclaimer in the documentation and/or other materials | ||
21 | * provided with the distribution. | ||
22 | * | ||
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | ||
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | ||
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | ||
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | ||
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | ||
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | ||
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | ||
30 | * SOFTWARE. | ||
31 | * | ||
32 | * $Id$ | ||
33 | */ | ||
34 | |||
35 | #include <rdma/ib_cm.h> | ||
36 | #include <rdma/ib_cache.h> | ||
37 | #include <net/dst.h> | ||
38 | #include <net/icmp.h> | ||
39 | #include <linux/icmpv6.h> | ||
40 | |||
41 | #ifdef CONFIG_INFINIBAND_IPOIB_DEBUG_DATA | ||
42 | static int data_debug_level; | ||
43 | |||
44 | module_param_named(cm_data_debug_level, data_debug_level, int, 0644); | ||
45 | MODULE_PARM_DESC(cm_data_debug_level, | ||
46 | "Enable data path debug tracing for connected mode if > 0"); | ||
47 | #endif | ||
48 | |||
49 | #include "ipoib.h" | ||
50 | |||
51 | #define IPOIB_CM_IETF_ID 0x1000000000000000ULL | ||
52 | |||
53 | #define IPOIB_CM_RX_UPDATE_TIME (256 * HZ) | ||
54 | #define IPOIB_CM_RX_TIMEOUT (2 * 256 * HZ) | ||
55 | #define IPOIB_CM_RX_DELAY (3 * 256 * HZ) | ||
56 | #define IPOIB_CM_RX_UPDATE_MASK (0x3) | ||
57 | |||
58 | struct ipoib_cm_id { | ||
59 | struct ib_cm_id *id; | ||
60 | int flags; | ||
61 | u32 remote_qpn; | ||
62 | u32 remote_mtu; | ||
63 | }; | ||
64 | |||
65 | static int ipoib_cm_tx_handler(struct ib_cm_id *cm_id, | ||
66 | struct ib_cm_event *event); | ||
67 | |||
68 | static void ipoib_cm_dma_unmap_rx(struct ipoib_dev_priv *priv, | ||
69 | u64 mapping[IPOIB_CM_RX_SG]) | ||
70 | { | ||
71 | int i; | ||
72 | |||
73 | ib_dma_unmap_single(priv->ca, mapping[0], IPOIB_CM_HEAD_SIZE, DMA_FROM_DEVICE); | ||
74 | |||
75 | for (i = 0; i < IPOIB_CM_RX_SG - 1; ++i) | ||
76 | ib_dma_unmap_single(priv->ca, mapping[i + 1], PAGE_SIZE, DMA_FROM_DEVICE); | ||
77 | } | ||
78 | |||
79 | static int ipoib_cm_post_receive(struct net_device *dev, int id) | ||
80 | { | ||
81 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
82 | struct ib_recv_wr *bad_wr; | ||
83 | int i, ret; | ||
84 | |||
85 | priv->cm.rx_wr.wr_id = id | IPOIB_CM_OP_SRQ; | ||
86 | |||
87 | for (i = 0; i < IPOIB_CM_RX_SG; ++i) | ||
88 | priv->cm.rx_sge[i].addr = priv->cm.srq_ring[id].mapping[i]; | ||
89 | |||
90 | ret = ib_post_srq_recv(priv->cm.srq, &priv->cm.rx_wr, &bad_wr); | ||
91 | if (unlikely(ret)) { | ||
92 | ipoib_warn(priv, "post srq failed for buf %d (%d)\n", id, ret); | ||
93 | ipoib_cm_dma_unmap_rx(priv, priv->cm.srq_ring[id].mapping); | ||
94 | dev_kfree_skb_any(priv->cm.srq_ring[id].skb); | ||
95 | priv->cm.srq_ring[id].skb = NULL; | ||
96 | } | ||
97 | |||
98 | return ret; | ||
99 | } | ||
100 | |||
101 | static int ipoib_cm_alloc_rx_skb(struct net_device *dev, int id, | ||
102 | u64 mapping[IPOIB_CM_RX_SG]) | ||
103 | { | ||
104 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
105 | struct sk_buff *skb; | ||
106 | int i; | ||
107 | |||
108 | skb = dev_alloc_skb(IPOIB_CM_HEAD_SIZE + 12); | ||
109 | if (unlikely(!skb)) | ||
110 | return -ENOMEM; | ||
111 | |||
112 | /* | ||
113 | * IPoIB adds a 4 byte header. So we need 12 more bytes to align the | ||
114 | * IP header to a multiple of 16. | ||
115 | */ | ||
116 | skb_reserve(skb, 12); | ||
117 | |||
118 | mapping[0] = ib_dma_map_single(priv->ca, skb->data, IPOIB_CM_HEAD_SIZE, | ||
119 | DMA_FROM_DEVICE); | ||
120 | if (unlikely(ib_dma_mapping_error(priv->ca, mapping[0]))) { | ||
121 | dev_kfree_skb_any(skb); | ||
122 | return -EIO; | ||
123 | } | ||
124 | |||
125 | for (i = 0; i < IPOIB_CM_RX_SG - 1; i++) { | ||
126 | struct page *page = alloc_page(GFP_ATOMIC); | ||
127 | |||
128 | if (!page) | ||
129 | goto partial_error; | ||
130 | skb_fill_page_desc(skb, i, page, 0, PAGE_SIZE); | ||
131 | |||
132 | mapping[i + 1] = ib_dma_map_page(priv->ca, skb_shinfo(skb)->frags[i].page, | ||
133 | 0, PAGE_SIZE, DMA_TO_DEVICE); | ||
134 | if (unlikely(ib_dma_mapping_error(priv->ca, mapping[i + 1]))) | ||
135 | goto partial_error; | ||
136 | } | ||
137 | |||
138 | priv->cm.srq_ring[id].skb = skb; | ||
139 | return 0; | ||
140 | |||
141 | partial_error: | ||
142 | |||
143 | ib_dma_unmap_single(priv->ca, mapping[0], IPOIB_CM_HEAD_SIZE, DMA_FROM_DEVICE); | ||
144 | |||
145 | for (; i >= 0; --i) | ||
146 | ib_dma_unmap_single(priv->ca, mapping[i + 1], PAGE_SIZE, DMA_FROM_DEVICE); | ||
147 | |||
148 | kfree_skb(skb); | ||
149 | return -ENOMEM; | ||
150 | } | ||
151 | |||
152 | static struct ib_qp *ipoib_cm_create_rx_qp(struct net_device *dev, | ||
153 | struct ipoib_cm_rx *p) | ||
154 | { | ||
155 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
156 | struct ib_qp_init_attr attr = { | ||
157 | .send_cq = priv->cq, /* does not matter, we never send anything */ | ||
158 | .recv_cq = priv->cq, | ||
159 | .srq = priv->cm.srq, | ||
160 | .cap.max_send_wr = 1, /* FIXME: 0 Seems not to work */ | ||
161 | .cap.max_send_sge = 1, /* FIXME: 0 Seems not to work */ | ||
162 | .sq_sig_type = IB_SIGNAL_ALL_WR, | ||
163 | .qp_type = IB_QPT_RC, | ||
164 | .qp_context = p, | ||
165 | }; | ||
166 | return ib_create_qp(priv->pd, &attr); | ||
167 | } | ||
168 | |||
169 | static int ipoib_cm_modify_rx_qp(struct net_device *dev, | ||
170 | struct ib_cm_id *cm_id, struct ib_qp *qp, | ||
171 | unsigned psn) | ||
172 | { | ||
173 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
174 | struct ib_qp_attr qp_attr; | ||
175 | int qp_attr_mask, ret; | ||
176 | |||
177 | qp_attr.qp_state = IB_QPS_INIT; | ||
178 | ret = ib_cm_init_qp_attr(cm_id, &qp_attr, &qp_attr_mask); | ||
179 | if (ret) { | ||
180 | ipoib_warn(priv, "failed to init QP attr for INIT: %d\n", ret); | ||
181 | return ret; | ||
182 | } | ||
183 | ret = ib_modify_qp(qp, &qp_attr, qp_attr_mask); | ||
184 | if (ret) { | ||
185 | ipoib_warn(priv, "failed to modify QP to INIT: %d\n", ret); | ||
186 | return ret; | ||
187 | } | ||
188 | qp_attr.qp_state = IB_QPS_RTR; | ||
189 | ret = ib_cm_init_qp_attr(cm_id, &qp_attr, &qp_attr_mask); | ||
190 | if (ret) { | ||
191 | ipoib_warn(priv, "failed to init QP attr for RTR: %d\n", ret); | ||
192 | return ret; | ||
193 | } | ||
194 | qp_attr.rq_psn = psn; | ||
195 | ret = ib_modify_qp(qp, &qp_attr, qp_attr_mask); | ||
196 | if (ret) { | ||
197 | ipoib_warn(priv, "failed to modify QP to RTR: %d\n", ret); | ||
198 | return ret; | ||
199 | } | ||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | static int ipoib_cm_send_rep(struct net_device *dev, struct ib_cm_id *cm_id, | ||
204 | struct ib_qp *qp, struct ib_cm_req_event_param *req, | ||
205 | unsigned psn) | ||
206 | { | ||
207 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
208 | struct ipoib_cm_data data = {}; | ||
209 | struct ib_cm_rep_param rep = {}; | ||
210 | |||
211 | data.qpn = cpu_to_be32(priv->qp->qp_num); | ||
212 | data.mtu = cpu_to_be32(IPOIB_CM_BUF_SIZE); | ||
213 | |||
214 | rep.private_data = &data; | ||
215 | rep.private_data_len = sizeof data; | ||
216 | rep.flow_control = 0; | ||
217 | rep.rnr_retry_count = req->rnr_retry_count; | ||
218 | rep.target_ack_delay = 20; /* FIXME */ | ||
219 | rep.srq = 1; | ||
220 | rep.qp_num = qp->qp_num; | ||
221 | rep.starting_psn = psn; | ||
222 | return ib_send_cm_rep(cm_id, &rep); | ||
223 | } | ||
224 | |||
225 | static int ipoib_cm_req_handler(struct ib_cm_id *cm_id, struct ib_cm_event *event) | ||
226 | { | ||
227 | struct net_device *dev = cm_id->context; | ||
228 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
229 | struct ipoib_cm_rx *p; | ||
230 | unsigned long flags; | ||
231 | unsigned psn; | ||
232 | int ret; | ||
233 | |||
234 | ipoib_dbg(priv, "REQ arrived\n"); | ||
235 | p = kzalloc(sizeof *p, GFP_KERNEL); | ||
236 | if (!p) | ||
237 | return -ENOMEM; | ||
238 | p->dev = dev; | ||
239 | p->id = cm_id; | ||
240 | p->qp = ipoib_cm_create_rx_qp(dev, p); | ||
241 | if (IS_ERR(p->qp)) { | ||
242 | ret = PTR_ERR(p->qp); | ||
243 | goto err_qp; | ||
244 | } | ||
245 | |||
246 | psn = random32() & 0xffffff; | ||
247 | ret = ipoib_cm_modify_rx_qp(dev, cm_id, p->qp, psn); | ||
248 | if (ret) | ||
249 | goto err_modify; | ||
250 | |||
251 | ret = ipoib_cm_send_rep(dev, cm_id, p->qp, &event->param.req_rcvd, psn); | ||
252 | if (ret) { | ||
253 | ipoib_warn(priv, "failed to send REP: %d\n", ret); | ||
254 | goto err_rep; | ||
255 | } | ||
256 | |||
257 | cm_id->context = p; | ||
258 | p->jiffies = jiffies; | ||
259 | spin_lock_irqsave(&priv->lock, flags); | ||
260 | list_add(&p->list, &priv->cm.passive_ids); | ||
261 | spin_unlock_irqrestore(&priv->lock, flags); | ||
262 | queue_delayed_work(ipoib_workqueue, | ||
263 | &priv->cm.stale_task, IPOIB_CM_RX_DELAY); | ||
264 | return 0; | ||
265 | |||
266 | err_rep: | ||
267 | err_modify: | ||
268 | ib_destroy_qp(p->qp); | ||
269 | err_qp: | ||
270 | kfree(p); | ||
271 | return ret; | ||
272 | } | ||
273 | |||
274 | static int ipoib_cm_rx_handler(struct ib_cm_id *cm_id, | ||
275 | struct ib_cm_event *event) | ||
276 | { | ||
277 | struct ipoib_cm_rx *p; | ||
278 | struct ipoib_dev_priv *priv; | ||
279 | unsigned long flags; | ||
280 | int ret; | ||
281 | |||
282 | switch (event->event) { | ||
283 | case IB_CM_REQ_RECEIVED: | ||
284 | return ipoib_cm_req_handler(cm_id, event); | ||
285 | case IB_CM_DREQ_RECEIVED: | ||
286 | p = cm_id->context; | ||
287 | ib_send_cm_drep(cm_id, NULL, 0); | ||
288 | /* Fall through */ | ||
289 | case IB_CM_REJ_RECEIVED: | ||
290 | p = cm_id->context; | ||
291 | priv = netdev_priv(p->dev); | ||
292 | spin_lock_irqsave(&priv->lock, flags); | ||
293 | if (list_empty(&p->list)) | ||
294 | ret = 0; /* Connection is going away already. */ | ||
295 | else { | ||
296 | list_del_init(&p->list); | ||
297 | ret = -ECONNRESET; | ||
298 | } | ||
299 | spin_unlock_irqrestore(&priv->lock, flags); | ||
300 | if (ret) { | ||
301 | ib_destroy_qp(p->qp); | ||
302 | kfree(p); | ||
303 | return ret; | ||
304 | } | ||
305 | return 0; | ||
306 | default: | ||
307 | return 0; | ||
308 | } | ||
309 | } | ||
310 | /* Adjust length of skb with fragments to match received data */ | ||
311 | static void skb_put_frags(struct sk_buff *skb, unsigned int hdr_space, | ||
312 | unsigned int length) | ||
313 | { | ||
314 | int i, num_frags; | ||
315 | unsigned int size; | ||
316 | |||
317 | /* put header into skb */ | ||
318 | size = min(length, hdr_space); | ||
319 | skb->tail += size; | ||
320 | skb->len += size; | ||
321 | length -= size; | ||
322 | |||
323 | num_frags = skb_shinfo(skb)->nr_frags; | ||
324 | for (i = 0; i < num_frags; i++) { | ||
325 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | ||
326 | |||
327 | if (length == 0) { | ||
328 | /* don't need this page */ | ||
329 | __free_page(frag->page); | ||
330 | --skb_shinfo(skb)->nr_frags; | ||
331 | } else { | ||
332 | size = min(length, (unsigned) PAGE_SIZE); | ||
333 | |||
334 | frag->size = size; | ||
335 | skb->data_len += size; | ||
336 | skb->truesize += size; | ||
337 | skb->len += size; | ||
338 | length -= size; | ||
339 | } | ||
340 | } | ||
341 | } | ||
342 | |||
343 | void ipoib_cm_handle_rx_wc(struct net_device *dev, struct ib_wc *wc) | ||
344 | { | ||
345 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
346 | unsigned int wr_id = wc->wr_id & ~IPOIB_CM_OP_SRQ; | ||
347 | struct sk_buff *skb; | ||
348 | struct ipoib_cm_rx *p; | ||
349 | unsigned long flags; | ||
350 | u64 mapping[IPOIB_CM_RX_SG]; | ||
351 | |||
352 | ipoib_dbg_data(priv, "cm recv completion: id %d, op %d, status: %d\n", | ||
353 | wr_id, wc->opcode, wc->status); | ||
354 | |||
355 | if (unlikely(wr_id >= ipoib_recvq_size)) { | ||
356 | ipoib_warn(priv, "cm recv completion event with wrid %d (> %d)\n", | ||
357 | wr_id, ipoib_recvq_size); | ||
358 | return; | ||
359 | } | ||
360 | |||
361 | skb = priv->cm.srq_ring[wr_id].skb; | ||
362 | |||
363 | if (unlikely(wc->status != IB_WC_SUCCESS)) { | ||
364 | ipoib_dbg(priv, "cm recv error " | ||
365 | "(status=%d, wrid=%d vend_err %x)\n", | ||
366 | wc->status, wr_id, wc->vendor_err); | ||
367 | ++priv->stats.rx_dropped; | ||
368 | goto repost; | ||
369 | } | ||
370 | |||
371 | if (!likely(wr_id & IPOIB_CM_RX_UPDATE_MASK)) { | ||
372 | p = wc->qp->qp_context; | ||
373 | if (time_after_eq(jiffies, p->jiffies + IPOIB_CM_RX_UPDATE_TIME)) { | ||
374 | spin_lock_irqsave(&priv->lock, flags); | ||
375 | p->jiffies = jiffies; | ||
376 | /* Move this entry to list head, but do | ||
377 | * not re-add it if it has been removed. */ | ||
378 | if (!list_empty(&p->list)) | ||
379 | list_move(&p->list, &priv->cm.passive_ids); | ||
380 | spin_unlock_irqrestore(&priv->lock, flags); | ||
381 | queue_delayed_work(ipoib_workqueue, | ||
382 | &priv->cm.stale_task, IPOIB_CM_RX_DELAY); | ||
383 | } | ||
384 | } | ||
385 | |||
386 | if (unlikely(ipoib_cm_alloc_rx_skb(dev, wr_id, mapping))) { | ||
387 | /* | ||
388 | * If we can't allocate a new RX buffer, dump | ||
389 | * this packet and reuse the old buffer. | ||
390 | */ | ||
391 | ipoib_dbg(priv, "failed to allocate receive buffer %d\n", wr_id); | ||
392 | ++priv->stats.rx_dropped; | ||
393 | goto repost; | ||
394 | } | ||
395 | |||
396 | ipoib_cm_dma_unmap_rx(priv, priv->cm.srq_ring[wr_id].mapping); | ||
397 | memcpy(priv->cm.srq_ring[wr_id].mapping, mapping, sizeof mapping); | ||
398 | |||
399 | ipoib_dbg_data(priv, "received %d bytes, SLID 0x%04x\n", | ||
400 | wc->byte_len, wc->slid); | ||
401 | |||
402 | skb_put_frags(skb, IPOIB_CM_HEAD_SIZE, wc->byte_len); | ||
403 | |||
404 | skb->protocol = ((struct ipoib_header *) skb->data)->proto; | ||
405 | skb->mac.raw = skb->data; | ||
406 | skb_pull(skb, IPOIB_ENCAP_LEN); | ||
407 | |||
408 | dev->last_rx = jiffies; | ||
409 | ++priv->stats.rx_packets; | ||
410 | priv->stats.rx_bytes += skb->len; | ||
411 | |||
412 | skb->dev = dev; | ||
413 | /* XXX get correct PACKET_ type here */ | ||
414 | skb->pkt_type = PACKET_HOST; | ||
415 | netif_rx_ni(skb); | ||
416 | |||
417 | repost: | ||
418 | if (unlikely(ipoib_cm_post_receive(dev, wr_id))) | ||
419 | ipoib_warn(priv, "ipoib_cm_post_receive failed " | ||
420 | "for buf %d\n", wr_id); | ||
421 | } | ||
422 | |||
423 | static inline int post_send(struct ipoib_dev_priv *priv, | ||
424 | struct ipoib_cm_tx *tx, | ||
425 | unsigned int wr_id, | ||
426 | u64 addr, int len) | ||
427 | { | ||
428 | struct ib_send_wr *bad_wr; | ||
429 | |||
430 | priv->tx_sge.addr = addr; | ||
431 | priv->tx_sge.length = len; | ||
432 | |||
433 | priv->tx_wr.wr_id = wr_id; | ||
434 | |||
435 | return ib_post_send(tx->qp, &priv->tx_wr, &bad_wr); | ||
436 | } | ||
437 | |||
438 | void ipoib_cm_send(struct net_device *dev, struct sk_buff *skb, struct ipoib_cm_tx *tx) | ||
439 | { | ||
440 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
441 | struct ipoib_tx_buf *tx_req; | ||
442 | u64 addr; | ||
443 | |||
444 | if (unlikely(skb->len > tx->mtu)) { | ||
445 | ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n", | ||
446 | skb->len, tx->mtu); | ||
447 | ++priv->stats.tx_dropped; | ||
448 | ++priv->stats.tx_errors; | ||
449 | ipoib_cm_skb_too_long(dev, skb, tx->mtu - INFINIBAND_ALEN); | ||
450 | return; | ||
451 | } | ||
452 | |||
453 | ipoib_dbg_data(priv, "sending packet: head 0x%x length %d connection 0x%x\n", | ||
454 | tx->tx_head, skb->len, tx->qp->qp_num); | ||
455 | |||
456 | /* | ||
457 | * We put the skb into the tx_ring _before_ we call post_send() | ||
458 | * because it's entirely possible that the completion handler will | ||
459 | * run before we execute anything after the post_send(). That | ||
460 | * means we have to make sure everything is properly recorded and | ||
461 | * our state is consistent before we call post_send(). | ||
462 | */ | ||
463 | tx_req = &tx->tx_ring[tx->tx_head & (ipoib_sendq_size - 1)]; | ||
464 | tx_req->skb = skb; | ||
465 | addr = ib_dma_map_single(priv->ca, skb->data, skb->len, DMA_TO_DEVICE); | ||
466 | if (unlikely(ib_dma_mapping_error(priv->ca, addr))) { | ||
467 | ++priv->stats.tx_errors; | ||
468 | dev_kfree_skb_any(skb); | ||
469 | return; | ||
470 | } | ||
471 | |||
472 | tx_req->mapping = addr; | ||
473 | |||
474 | if (unlikely(post_send(priv, tx, tx->tx_head & (ipoib_sendq_size - 1), | ||
475 | addr, skb->len))) { | ||
476 | ipoib_warn(priv, "post_send failed\n"); | ||
477 | ++priv->stats.tx_errors; | ||
478 | ib_dma_unmap_single(priv->ca, addr, skb->len, DMA_TO_DEVICE); | ||
479 | dev_kfree_skb_any(skb); | ||
480 | } else { | ||
481 | dev->trans_start = jiffies; | ||
482 | ++tx->tx_head; | ||
483 | |||
484 | if (tx->tx_head - tx->tx_tail == ipoib_sendq_size) { | ||
485 | ipoib_dbg(priv, "TX ring 0x%x full, stopping kernel net queue\n", | ||
486 | tx->qp->qp_num); | ||
487 | netif_stop_queue(dev); | ||
488 | set_bit(IPOIB_FLAG_NETIF_STOPPED, &tx->flags); | ||
489 | } | ||
490 | } | ||
491 | } | ||
492 | |||
493 | static void ipoib_cm_handle_tx_wc(struct net_device *dev, struct ipoib_cm_tx *tx, | ||
494 | struct ib_wc *wc) | ||
495 | { | ||
496 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
497 | unsigned int wr_id = wc->wr_id; | ||
498 | struct ipoib_tx_buf *tx_req; | ||
499 | unsigned long flags; | ||
500 | |||
501 | ipoib_dbg_data(priv, "cm send completion: id %d, op %d, status: %d\n", | ||
502 | wr_id, wc->opcode, wc->status); | ||
503 | |||
504 | if (unlikely(wr_id >= ipoib_sendq_size)) { | ||
505 | ipoib_warn(priv, "cm send completion event with wrid %d (> %d)\n", | ||
506 | wr_id, ipoib_sendq_size); | ||
507 | return; | ||
508 | } | ||
509 | |||
510 | tx_req = &tx->tx_ring[wr_id]; | ||
511 | |||
512 | ib_dma_unmap_single(priv->ca, tx_req->mapping, tx_req->skb->len, DMA_TO_DEVICE); | ||
513 | |||
514 | /* FIXME: is this right? Shouldn't we only increment on success? */ | ||
515 | ++priv->stats.tx_packets; | ||
516 | priv->stats.tx_bytes += tx_req->skb->len; | ||
517 | |||
518 | dev_kfree_skb_any(tx_req->skb); | ||
519 | |||
520 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
521 | ++tx->tx_tail; | ||
522 | if (unlikely(test_bit(IPOIB_FLAG_NETIF_STOPPED, &tx->flags)) && | ||
523 | tx->tx_head - tx->tx_tail <= ipoib_sendq_size >> 1) { | ||
524 | clear_bit(IPOIB_FLAG_NETIF_STOPPED, &tx->flags); | ||
525 | netif_wake_queue(dev); | ||
526 | } | ||
527 | |||
528 | if (wc->status != IB_WC_SUCCESS && | ||
529 | wc->status != IB_WC_WR_FLUSH_ERR) { | ||
530 | struct ipoib_neigh *neigh; | ||
531 | |||
532 | ipoib_dbg(priv, "failed cm send event " | ||
533 | "(status=%d, wrid=%d vend_err %x)\n", | ||
534 | wc->status, wr_id, wc->vendor_err); | ||
535 | |||
536 | spin_lock(&priv->lock); | ||
537 | neigh = tx->neigh; | ||
538 | |||
539 | if (neigh) { | ||
540 | neigh->cm = NULL; | ||
541 | list_del(&neigh->list); | ||
542 | if (neigh->ah) | ||
543 | ipoib_put_ah(neigh->ah); | ||
544 | ipoib_neigh_free(dev, neigh); | ||
545 | |||
546 | tx->neigh = NULL; | ||
547 | } | ||
548 | |||
549 | /* queue would be re-started anyway when TX is destroyed, | ||
550 | * but it makes sense to do it ASAP here. */ | ||
551 | if (test_and_clear_bit(IPOIB_FLAG_NETIF_STOPPED, &tx->flags)) | ||
552 | netif_wake_queue(dev); | ||
553 | |||
554 | if (test_and_clear_bit(IPOIB_FLAG_INITIALIZED, &tx->flags)) { | ||
555 | list_move(&tx->list, &priv->cm.reap_list); | ||
556 | queue_work(ipoib_workqueue, &priv->cm.reap_task); | ||
557 | } | ||
558 | |||
559 | clear_bit(IPOIB_FLAG_OPER_UP, &tx->flags); | ||
560 | |||
561 | spin_unlock(&priv->lock); | ||
562 | } | ||
563 | |||
564 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
565 | } | ||
566 | |||
567 | static void ipoib_cm_tx_completion(struct ib_cq *cq, void *tx_ptr) | ||
568 | { | ||
569 | struct ipoib_cm_tx *tx = tx_ptr; | ||
570 | int n, i; | ||
571 | |||
572 | ib_req_notify_cq(cq, IB_CQ_NEXT_COMP); | ||
573 | do { | ||
574 | n = ib_poll_cq(cq, IPOIB_NUM_WC, tx->ibwc); | ||
575 | for (i = 0; i < n; ++i) | ||
576 | ipoib_cm_handle_tx_wc(tx->dev, tx, tx->ibwc + i); | ||
577 | } while (n == IPOIB_NUM_WC); | ||
578 | } | ||
579 | |||
580 | int ipoib_cm_dev_open(struct net_device *dev) | ||
581 | { | ||
582 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
583 | int ret; | ||
584 | |||
585 | if (!IPOIB_CM_SUPPORTED(dev->dev_addr)) | ||
586 | return 0; | ||
587 | |||
588 | priv->cm.id = ib_create_cm_id(priv->ca, ipoib_cm_rx_handler, dev); | ||
589 | if (IS_ERR(priv->cm.id)) { | ||
590 | printk(KERN_WARNING "%s: failed to create CM ID\n", priv->ca->name); | ||
591 | return IS_ERR(priv->cm.id); | ||
592 | } | ||
593 | |||
594 | ret = ib_cm_listen(priv->cm.id, cpu_to_be64(IPOIB_CM_IETF_ID | priv->qp->qp_num), | ||
595 | 0, NULL); | ||
596 | if (ret) { | ||
597 | printk(KERN_WARNING "%s: failed to listen on ID 0x%llx\n", priv->ca->name, | ||
598 | IPOIB_CM_IETF_ID | priv->qp->qp_num); | ||
599 | ib_destroy_cm_id(priv->cm.id); | ||
600 | return ret; | ||
601 | } | ||
602 | return 0; | ||
603 | } | ||
604 | |||
605 | void ipoib_cm_dev_stop(struct net_device *dev) | ||
606 | { | ||
607 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
608 | struct ipoib_cm_rx *p; | ||
609 | unsigned long flags; | ||
610 | |||
611 | if (!IPOIB_CM_SUPPORTED(dev->dev_addr)) | ||
612 | return; | ||
613 | |||
614 | ib_destroy_cm_id(priv->cm.id); | ||
615 | spin_lock_irqsave(&priv->lock, flags); | ||
616 | while (!list_empty(&priv->cm.passive_ids)) { | ||
617 | p = list_entry(priv->cm.passive_ids.next, typeof(*p), list); | ||
618 | list_del_init(&p->list); | ||
619 | spin_unlock_irqrestore(&priv->lock, flags); | ||
620 | ib_destroy_cm_id(p->id); | ||
621 | ib_destroy_qp(p->qp); | ||
622 | kfree(p); | ||
623 | spin_lock_irqsave(&priv->lock, flags); | ||
624 | } | ||
625 | spin_unlock_irqrestore(&priv->lock, flags); | ||
626 | |||
627 | cancel_delayed_work(&priv->cm.stale_task); | ||
628 | } | ||
629 | |||
630 | static int ipoib_cm_rep_handler(struct ib_cm_id *cm_id, struct ib_cm_event *event) | ||
631 | { | ||
632 | struct ipoib_cm_tx *p = cm_id->context; | ||
633 | struct ipoib_dev_priv *priv = netdev_priv(p->dev); | ||
634 | struct ipoib_cm_data *data = event->private_data; | ||
635 | struct sk_buff_head skqueue; | ||
636 | struct ib_qp_attr qp_attr; | ||
637 | int qp_attr_mask, ret; | ||
638 | struct sk_buff *skb; | ||
639 | unsigned long flags; | ||
640 | |||
641 | p->mtu = be32_to_cpu(data->mtu); | ||
642 | |||
643 | if (p->mtu < priv->dev->mtu + IPOIB_ENCAP_LEN) { | ||
644 | ipoib_warn(priv, "Rejecting connection: mtu %d < device mtu %d + 4\n", | ||
645 | p->mtu, priv->dev->mtu); | ||
646 | return -EINVAL; | ||
647 | } | ||
648 | |||
649 | qp_attr.qp_state = IB_QPS_RTR; | ||
650 | ret = ib_cm_init_qp_attr(cm_id, &qp_attr, &qp_attr_mask); | ||
651 | if (ret) { | ||
652 | ipoib_warn(priv, "failed to init QP attr for RTR: %d\n", ret); | ||
653 | return ret; | ||
654 | } | ||
655 | |||
656 | qp_attr.rq_psn = 0 /* FIXME */; | ||
657 | ret = ib_modify_qp(p->qp, &qp_attr, qp_attr_mask); | ||
658 | if (ret) { | ||
659 | ipoib_warn(priv, "failed to modify QP to RTR: %d\n", ret); | ||
660 | return ret; | ||
661 | } | ||
662 | |||
663 | qp_attr.qp_state = IB_QPS_RTS; | ||
664 | ret = ib_cm_init_qp_attr(cm_id, &qp_attr, &qp_attr_mask); | ||
665 | if (ret) { | ||
666 | ipoib_warn(priv, "failed to init QP attr for RTS: %d\n", ret); | ||
667 | return ret; | ||
668 | } | ||
669 | ret = ib_modify_qp(p->qp, &qp_attr, qp_attr_mask); | ||
670 | if (ret) { | ||
671 | ipoib_warn(priv, "failed to modify QP to RTS: %d\n", ret); | ||
672 | return ret; | ||
673 | } | ||
674 | |||
675 | skb_queue_head_init(&skqueue); | ||
676 | |||
677 | spin_lock_irqsave(&priv->lock, flags); | ||
678 | set_bit(IPOIB_FLAG_OPER_UP, &p->flags); | ||
679 | if (p->neigh) | ||
680 | while ((skb = __skb_dequeue(&p->neigh->queue))) | ||
681 | __skb_queue_tail(&skqueue, skb); | ||
682 | spin_unlock_irqrestore(&priv->lock, flags); | ||
683 | |||
684 | while ((skb = __skb_dequeue(&skqueue))) { | ||
685 | skb->dev = p->dev; | ||
686 | if (dev_queue_xmit(skb)) | ||
687 | ipoib_warn(priv, "dev_queue_xmit failed " | ||
688 | "to requeue packet\n"); | ||
689 | } | ||
690 | |||
691 | ret = ib_send_cm_rtu(cm_id, NULL, 0); | ||
692 | if (ret) { | ||
693 | ipoib_warn(priv, "failed to send RTU: %d\n", ret); | ||
694 | return ret; | ||
695 | } | ||
696 | return 0; | ||
697 | } | ||
698 | |||
699 | static struct ib_qp *ipoib_cm_create_tx_qp(struct net_device *dev, struct ib_cq *cq) | ||
700 | { | ||
701 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
702 | struct ib_qp_init_attr attr = {}; | ||
703 | attr.recv_cq = priv->cq; | ||
704 | attr.srq = priv->cm.srq; | ||
705 | attr.cap.max_send_wr = ipoib_sendq_size; | ||
706 | attr.cap.max_send_sge = 1; | ||
707 | attr.sq_sig_type = IB_SIGNAL_ALL_WR; | ||
708 | attr.qp_type = IB_QPT_RC; | ||
709 | attr.send_cq = cq; | ||
710 | return ib_create_qp(priv->pd, &attr); | ||
711 | } | ||
712 | |||
713 | static int ipoib_cm_send_req(struct net_device *dev, | ||
714 | struct ib_cm_id *id, struct ib_qp *qp, | ||
715 | u32 qpn, | ||
716 | struct ib_sa_path_rec *pathrec) | ||
717 | { | ||
718 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
719 | struct ipoib_cm_data data = {}; | ||
720 | struct ib_cm_req_param req = {}; | ||
721 | |||
722 | data.qpn = cpu_to_be32(priv->qp->qp_num); | ||
723 | data.mtu = cpu_to_be32(IPOIB_CM_BUF_SIZE); | ||
724 | |||
725 | req.primary_path = pathrec; | ||
726 | req.alternate_path = NULL; | ||
727 | req.service_id = cpu_to_be64(IPOIB_CM_IETF_ID | qpn); | ||
728 | req.qp_num = qp->qp_num; | ||
729 | req.qp_type = qp->qp_type; | ||
730 | req.private_data = &data; | ||
731 | req.private_data_len = sizeof data; | ||
732 | req.flow_control = 0; | ||
733 | |||
734 | req.starting_psn = 0; /* FIXME */ | ||
735 | |||
736 | /* | ||
737 | * Pick some arbitrary defaults here; we could make these | ||
738 | * module parameters if anyone cared about setting them. | ||
739 | */ | ||
740 | req.responder_resources = 4; | ||
741 | req.remote_cm_response_timeout = 20; | ||
742 | req.local_cm_response_timeout = 20; | ||
743 | req.retry_count = 0; /* RFC draft warns against retries */ | ||
744 | req.rnr_retry_count = 0; /* RFC draft warns against retries */ | ||
745 | req.max_cm_retries = 15; | ||
746 | req.srq = 1; | ||
747 | return ib_send_cm_req(id, &req); | ||
748 | } | ||
749 | |||
750 | static int ipoib_cm_modify_tx_init(struct net_device *dev, | ||
751 | struct ib_cm_id *cm_id, struct ib_qp *qp) | ||
752 | { | ||
753 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
754 | struct ib_qp_attr qp_attr; | ||
755 | int qp_attr_mask, ret; | ||
756 | ret = ib_find_cached_pkey(priv->ca, priv->port, priv->pkey, &qp_attr.pkey_index); | ||
757 | if (ret) { | ||
758 | ipoib_warn(priv, "pkey 0x%x not in cache: %d\n", priv->pkey, ret); | ||
759 | return ret; | ||
760 | } | ||
761 | |||
762 | qp_attr.qp_state = IB_QPS_INIT; | ||
763 | qp_attr.qp_access_flags = IB_ACCESS_LOCAL_WRITE; | ||
764 | qp_attr.port_num = priv->port; | ||
765 | qp_attr_mask = IB_QP_STATE | IB_QP_ACCESS_FLAGS | IB_QP_PKEY_INDEX | IB_QP_PORT; | ||
766 | |||
767 | ret = ib_modify_qp(qp, &qp_attr, qp_attr_mask); | ||
768 | if (ret) { | ||
769 | ipoib_warn(priv, "failed to modify tx QP to INIT: %d\n", ret); | ||
770 | return ret; | ||
771 | } | ||
772 | return 0; | ||
773 | } | ||
774 | |||
775 | static int ipoib_cm_tx_init(struct ipoib_cm_tx *p, u32 qpn, | ||
776 | struct ib_sa_path_rec *pathrec) | ||
777 | { | ||
778 | struct ipoib_dev_priv *priv = netdev_priv(p->dev); | ||
779 | int ret; | ||
780 | |||
781 | p->tx_ring = kzalloc(ipoib_sendq_size * sizeof *p->tx_ring, | ||
782 | GFP_KERNEL); | ||
783 | if (!p->tx_ring) { | ||
784 | ipoib_warn(priv, "failed to allocate tx ring\n"); | ||
785 | ret = -ENOMEM; | ||
786 | goto err_tx; | ||
787 | } | ||
788 | |||
789 | p->cq = ib_create_cq(priv->ca, ipoib_cm_tx_completion, NULL, p, | ||
790 | ipoib_sendq_size + 1); | ||
791 | if (IS_ERR(p->cq)) { | ||
792 | ret = PTR_ERR(p->cq); | ||
793 | ipoib_warn(priv, "failed to allocate tx cq: %d\n", ret); | ||
794 | goto err_cq; | ||
795 | } | ||
796 | |||
797 | ret = ib_req_notify_cq(p->cq, IB_CQ_NEXT_COMP); | ||
798 | if (ret) { | ||
799 | ipoib_warn(priv, "failed to request completion notification: %d\n", ret); | ||
800 | goto err_req_notify; | ||
801 | } | ||
802 | |||
803 | p->qp = ipoib_cm_create_tx_qp(p->dev, p->cq); | ||
804 | if (IS_ERR(p->qp)) { | ||
805 | ret = PTR_ERR(p->qp); | ||
806 | ipoib_warn(priv, "failed to allocate tx qp: %d\n", ret); | ||
807 | goto err_qp; | ||
808 | } | ||
809 | |||
810 | p->id = ib_create_cm_id(priv->ca, ipoib_cm_tx_handler, p); | ||
811 | if (IS_ERR(p->id)) { | ||
812 | ret = PTR_ERR(p->id); | ||
813 | ipoib_warn(priv, "failed to create tx cm id: %d\n", ret); | ||
814 | goto err_id; | ||
815 | } | ||
816 | |||
817 | ret = ipoib_cm_modify_tx_init(p->dev, p->id, p->qp); | ||
818 | if (ret) { | ||
819 | ipoib_warn(priv, "failed to modify tx qp to rtr: %d\n", ret); | ||
820 | goto err_modify; | ||
821 | } | ||
822 | |||
823 | ret = ipoib_cm_send_req(p->dev, p->id, p->qp, qpn, pathrec); | ||
824 | if (ret) { | ||
825 | ipoib_warn(priv, "failed to send cm req: %d\n", ret); | ||
826 | goto err_send_cm; | ||
827 | } | ||
828 | |||
829 | ipoib_dbg(priv, "Request connection 0x%x for gid " IPOIB_GID_FMT " qpn 0x%x\n", | ||
830 | p->qp->qp_num, IPOIB_GID_ARG(pathrec->dgid), qpn); | ||
831 | |||
832 | return 0; | ||
833 | |||
834 | err_send_cm: | ||
835 | err_modify: | ||
836 | ib_destroy_cm_id(p->id); | ||
837 | err_id: | ||
838 | p->id = NULL; | ||
839 | ib_destroy_qp(p->qp); | ||
840 | err_req_notify: | ||
841 | err_qp: | ||
842 | p->qp = NULL; | ||
843 | ib_destroy_cq(p->cq); | ||
844 | err_cq: | ||
845 | p->cq = NULL; | ||
846 | err_tx: | ||
847 | return ret; | ||
848 | } | ||
849 | |||
850 | static void ipoib_cm_tx_destroy(struct ipoib_cm_tx *p) | ||
851 | { | ||
852 | struct ipoib_dev_priv *priv = netdev_priv(p->dev); | ||
853 | struct ipoib_tx_buf *tx_req; | ||
854 | |||
855 | ipoib_dbg(priv, "Destroy active connection 0x%x head 0x%x tail 0x%x\n", | ||
856 | p->qp ? p->qp->qp_num : 0, p->tx_head, p->tx_tail); | ||
857 | |||
858 | if (p->id) | ||
859 | ib_destroy_cm_id(p->id); | ||
860 | |||
861 | if (p->qp) | ||
862 | ib_destroy_qp(p->qp); | ||
863 | |||
864 | if (p->cq) | ||
865 | ib_destroy_cq(p->cq); | ||
866 | |||
867 | if (test_bit(IPOIB_FLAG_NETIF_STOPPED, &p->flags)) | ||
868 | netif_wake_queue(p->dev); | ||
869 | |||
870 | if (p->tx_ring) { | ||
871 | while ((int) p->tx_tail - (int) p->tx_head < 0) { | ||
872 | tx_req = &p->tx_ring[p->tx_tail & (ipoib_sendq_size - 1)]; | ||
873 | ib_dma_unmap_single(priv->ca, tx_req->mapping, tx_req->skb->len, | ||
874 | DMA_TO_DEVICE); | ||
875 | dev_kfree_skb_any(tx_req->skb); | ||
876 | ++p->tx_tail; | ||
877 | } | ||
878 | |||
879 | kfree(p->tx_ring); | ||
880 | } | ||
881 | |||
882 | kfree(p); | ||
883 | } | ||
884 | |||
885 | static int ipoib_cm_tx_handler(struct ib_cm_id *cm_id, | ||
886 | struct ib_cm_event *event) | ||
887 | { | ||
888 | struct ipoib_cm_tx *tx = cm_id->context; | ||
889 | struct ipoib_dev_priv *priv = netdev_priv(tx->dev); | ||
890 | struct net_device *dev = priv->dev; | ||
891 | struct ipoib_neigh *neigh; | ||
892 | unsigned long flags; | ||
893 | int ret; | ||
894 | |||
895 | switch (event->event) { | ||
896 | case IB_CM_DREQ_RECEIVED: | ||
897 | ipoib_dbg(priv, "DREQ received.\n"); | ||
898 | ib_send_cm_drep(cm_id, NULL, 0); | ||
899 | break; | ||
900 | case IB_CM_REP_RECEIVED: | ||
901 | ipoib_dbg(priv, "REP received.\n"); | ||
902 | ret = ipoib_cm_rep_handler(cm_id, event); | ||
903 | if (ret) | ||
904 | ib_send_cm_rej(cm_id, IB_CM_REJ_CONSUMER_DEFINED, | ||
905 | NULL, 0, NULL, 0); | ||
906 | break; | ||
907 | case IB_CM_REQ_ERROR: | ||
908 | case IB_CM_REJ_RECEIVED: | ||
909 | case IB_CM_TIMEWAIT_EXIT: | ||
910 | ipoib_dbg(priv, "CM error %d.\n", event->event); | ||
911 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
912 | spin_lock(&priv->lock); | ||
913 | neigh = tx->neigh; | ||
914 | |||
915 | if (neigh) { | ||
916 | neigh->cm = NULL; | ||
917 | list_del(&neigh->list); | ||
918 | if (neigh->ah) | ||
919 | ipoib_put_ah(neigh->ah); | ||
920 | ipoib_neigh_free(dev, neigh); | ||
921 | |||
922 | tx->neigh = NULL; | ||
923 | } | ||
924 | |||
925 | if (test_and_clear_bit(IPOIB_FLAG_INITIALIZED, &tx->flags)) { | ||
926 | list_move(&tx->list, &priv->cm.reap_list); | ||
927 | queue_work(ipoib_workqueue, &priv->cm.reap_task); | ||
928 | } | ||
929 | |||
930 | spin_unlock(&priv->lock); | ||
931 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
932 | break; | ||
933 | default: | ||
934 | break; | ||
935 | } | ||
936 | |||
937 | return 0; | ||
938 | } | ||
939 | |||
940 | struct ipoib_cm_tx *ipoib_cm_create_tx(struct net_device *dev, struct ipoib_path *path, | ||
941 | struct ipoib_neigh *neigh) | ||
942 | { | ||
943 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
944 | struct ipoib_cm_tx *tx; | ||
945 | |||
946 | tx = kzalloc(sizeof *tx, GFP_ATOMIC); | ||
947 | if (!tx) | ||
948 | return NULL; | ||
949 | |||
950 | neigh->cm = tx; | ||
951 | tx->neigh = neigh; | ||
952 | tx->path = path; | ||
953 | tx->dev = dev; | ||
954 | list_add(&tx->list, &priv->cm.start_list); | ||
955 | set_bit(IPOIB_FLAG_INITIALIZED, &tx->flags); | ||
956 | queue_work(ipoib_workqueue, &priv->cm.start_task); | ||
957 | return tx; | ||
958 | } | ||
959 | |||
960 | void ipoib_cm_destroy_tx(struct ipoib_cm_tx *tx) | ||
961 | { | ||
962 | struct ipoib_dev_priv *priv = netdev_priv(tx->dev); | ||
963 | if (test_and_clear_bit(IPOIB_FLAG_INITIALIZED, &tx->flags)) { | ||
964 | list_move(&tx->list, &priv->cm.reap_list); | ||
965 | queue_work(ipoib_workqueue, &priv->cm.reap_task); | ||
966 | ipoib_dbg(priv, "Reap connection for gid " IPOIB_GID_FMT "\n", | ||
967 | IPOIB_GID_ARG(tx->neigh->dgid)); | ||
968 | tx->neigh = NULL; | ||
969 | } | ||
970 | } | ||
971 | |||
972 | static void ipoib_cm_tx_start(struct work_struct *work) | ||
973 | { | ||
974 | struct ipoib_dev_priv *priv = container_of(work, struct ipoib_dev_priv, | ||
975 | cm.start_task); | ||
976 | struct net_device *dev = priv->dev; | ||
977 | struct ipoib_neigh *neigh; | ||
978 | struct ipoib_cm_tx *p; | ||
979 | unsigned long flags; | ||
980 | int ret; | ||
981 | |||
982 | struct ib_sa_path_rec pathrec; | ||
983 | u32 qpn; | ||
984 | |||
985 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
986 | spin_lock(&priv->lock); | ||
987 | while (!list_empty(&priv->cm.start_list)) { | ||
988 | p = list_entry(priv->cm.start_list.next, typeof(*p), list); | ||
989 | list_del_init(&p->list); | ||
990 | neigh = p->neigh; | ||
991 | qpn = IPOIB_QPN(neigh->neighbour->ha); | ||
992 | memcpy(&pathrec, &p->path->pathrec, sizeof pathrec); | ||
993 | spin_unlock(&priv->lock); | ||
994 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
995 | ret = ipoib_cm_tx_init(p, qpn, &pathrec); | ||
996 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
997 | spin_lock(&priv->lock); | ||
998 | if (ret) { | ||
999 | neigh = p->neigh; | ||
1000 | if (neigh) { | ||
1001 | neigh->cm = NULL; | ||
1002 | list_del(&neigh->list); | ||
1003 | if (neigh->ah) | ||
1004 | ipoib_put_ah(neigh->ah); | ||
1005 | ipoib_neigh_free(dev, neigh); | ||
1006 | } | ||
1007 | list_del(&p->list); | ||
1008 | kfree(p); | ||
1009 | } | ||
1010 | } | ||
1011 | spin_unlock(&priv->lock); | ||
1012 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
1013 | } | ||
1014 | |||
1015 | static void ipoib_cm_tx_reap(struct work_struct *work) | ||
1016 | { | ||
1017 | struct ipoib_dev_priv *priv = container_of(work, struct ipoib_dev_priv, | ||
1018 | cm.reap_task); | ||
1019 | struct ipoib_cm_tx *p; | ||
1020 | unsigned long flags; | ||
1021 | |||
1022 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
1023 | spin_lock(&priv->lock); | ||
1024 | while (!list_empty(&priv->cm.reap_list)) { | ||
1025 | p = list_entry(priv->cm.reap_list.next, typeof(*p), list); | ||
1026 | list_del(&p->list); | ||
1027 | spin_unlock(&priv->lock); | ||
1028 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
1029 | ipoib_cm_tx_destroy(p); | ||
1030 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
1031 | spin_lock(&priv->lock); | ||
1032 | } | ||
1033 | spin_unlock(&priv->lock); | ||
1034 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
1035 | } | ||
1036 | |||
1037 | static void ipoib_cm_skb_reap(struct work_struct *work) | ||
1038 | { | ||
1039 | struct ipoib_dev_priv *priv = container_of(work, struct ipoib_dev_priv, | ||
1040 | cm.skb_task); | ||
1041 | struct net_device *dev = priv->dev; | ||
1042 | struct sk_buff *skb; | ||
1043 | unsigned long flags; | ||
1044 | |||
1045 | unsigned mtu = priv->mcast_mtu; | ||
1046 | |||
1047 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
1048 | spin_lock(&priv->lock); | ||
1049 | while ((skb = skb_dequeue(&priv->cm.skb_queue))) { | ||
1050 | spin_unlock(&priv->lock); | ||
1051 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
1052 | if (skb->protocol == htons(ETH_P_IP)) | ||
1053 | icmp_send(skb, ICMP_DEST_UNREACH, ICMP_FRAG_NEEDED, htonl(mtu)); | ||
1054 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
1055 | else if (skb->protocol == htons(ETH_P_IPV6)) | ||
1056 | icmpv6_send(skb, ICMPV6_PKT_TOOBIG, 0, mtu, dev); | ||
1057 | #endif | ||
1058 | dev_kfree_skb_any(skb); | ||
1059 | spin_lock_irqsave(&priv->tx_lock, flags); | ||
1060 | spin_lock(&priv->lock); | ||
1061 | } | ||
1062 | spin_unlock(&priv->lock); | ||
1063 | spin_unlock_irqrestore(&priv->tx_lock, flags); | ||
1064 | } | ||
1065 | |||
1066 | void ipoib_cm_skb_too_long(struct net_device* dev, struct sk_buff *skb, | ||
1067 | unsigned int mtu) | ||
1068 | { | ||
1069 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
1070 | int e = skb_queue_empty(&priv->cm.skb_queue); | ||
1071 | |||
1072 | if (skb->dst) | ||
1073 | skb->dst->ops->update_pmtu(skb->dst, mtu); | ||
1074 | |||
1075 | skb_queue_tail(&priv->cm.skb_queue, skb); | ||
1076 | if (e) | ||
1077 | queue_work(ipoib_workqueue, &priv->cm.skb_task); | ||
1078 | } | ||
1079 | |||
1080 | static void ipoib_cm_stale_task(struct work_struct *work) | ||
1081 | { | ||
1082 | struct ipoib_dev_priv *priv = container_of(work, struct ipoib_dev_priv, | ||
1083 | cm.stale_task.work); | ||
1084 | struct ipoib_cm_rx *p; | ||
1085 | unsigned long flags; | ||
1086 | |||
1087 | spin_lock_irqsave(&priv->lock, flags); | ||
1088 | while (!list_empty(&priv->cm.passive_ids)) { | ||
1089 | /* List if sorted by LRU, start from tail, | ||
1090 | * stop when we see a recently used entry */ | ||
1091 | p = list_entry(priv->cm.passive_ids.prev, typeof(*p), list); | ||
1092 | if (time_after_eq(jiffies, p->jiffies + IPOIB_CM_RX_TIMEOUT)) | ||
1093 | break; | ||
1094 | list_del_init(&p->list); | ||
1095 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1096 | ib_destroy_cm_id(p->id); | ||
1097 | ib_destroy_qp(p->qp); | ||
1098 | kfree(p); | ||
1099 | spin_lock_irqsave(&priv->lock, flags); | ||
1100 | } | ||
1101 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1102 | } | ||
1103 | |||
1104 | |||
1105 | static ssize_t show_mode(struct device *d, struct device_attribute *attr, | ||
1106 | char *buf) | ||
1107 | { | ||
1108 | struct ipoib_dev_priv *priv = netdev_priv(to_net_dev(d)); | ||
1109 | |||
1110 | if (test_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags)) | ||
1111 | return sprintf(buf, "connected\n"); | ||
1112 | else | ||
1113 | return sprintf(buf, "datagram\n"); | ||
1114 | } | ||
1115 | |||
1116 | static ssize_t set_mode(struct device *d, struct device_attribute *attr, | ||
1117 | const char *buf, size_t count) | ||
1118 | { | ||
1119 | struct net_device *dev = to_net_dev(d); | ||
1120 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
1121 | |||
1122 | /* flush paths if we switch modes so that connections are restarted */ | ||
1123 | if (IPOIB_CM_SUPPORTED(dev->dev_addr) && !strcmp(buf, "connected\n")) { | ||
1124 | set_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags); | ||
1125 | ipoib_warn(priv, "enabling connected mode " | ||
1126 | "will cause multicast packet drops\n"); | ||
1127 | ipoib_flush_paths(dev); | ||
1128 | return count; | ||
1129 | } | ||
1130 | |||
1131 | if (!strcmp(buf, "datagram\n")) { | ||
1132 | clear_bit(IPOIB_FLAG_ADMIN_CM, &priv->flags); | ||
1133 | dev->mtu = min(priv->mcast_mtu, dev->mtu); | ||
1134 | ipoib_flush_paths(dev); | ||
1135 | return count; | ||
1136 | } | ||
1137 | |||
1138 | return -EINVAL; | ||
1139 | } | ||
1140 | |||
1141 | static DEVICE_ATTR(mode, S_IWUGO | S_IRUGO, show_mode, set_mode); | ||
1142 | |||
1143 | int ipoib_cm_add_mode_attr(struct net_device *dev) | ||
1144 | { | ||
1145 | return device_create_file(&dev->dev, &dev_attr_mode); | ||
1146 | } | ||
1147 | |||
1148 | int ipoib_cm_dev_init(struct net_device *dev) | ||
1149 | { | ||
1150 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
1151 | struct ib_srq_init_attr srq_init_attr = { | ||
1152 | .attr = { | ||
1153 | .max_wr = ipoib_recvq_size, | ||
1154 | .max_sge = IPOIB_CM_RX_SG | ||
1155 | } | ||
1156 | }; | ||
1157 | int ret, i; | ||
1158 | |||
1159 | INIT_LIST_HEAD(&priv->cm.passive_ids); | ||
1160 | INIT_LIST_HEAD(&priv->cm.reap_list); | ||
1161 | INIT_LIST_HEAD(&priv->cm.start_list); | ||
1162 | INIT_WORK(&priv->cm.start_task, ipoib_cm_tx_start); | ||
1163 | INIT_WORK(&priv->cm.reap_task, ipoib_cm_tx_reap); | ||
1164 | INIT_WORK(&priv->cm.skb_task, ipoib_cm_skb_reap); | ||
1165 | INIT_DELAYED_WORK(&priv->cm.stale_task, ipoib_cm_stale_task); | ||
1166 | |||
1167 | skb_queue_head_init(&priv->cm.skb_queue); | ||
1168 | |||
1169 | priv->cm.srq = ib_create_srq(priv->pd, &srq_init_attr); | ||
1170 | if (IS_ERR(priv->cm.srq)) { | ||
1171 | ret = PTR_ERR(priv->cm.srq); | ||
1172 | priv->cm.srq = NULL; | ||
1173 | return ret; | ||
1174 | } | ||
1175 | |||
1176 | priv->cm.srq_ring = kzalloc(ipoib_recvq_size * sizeof *priv->cm.srq_ring, | ||
1177 | GFP_KERNEL); | ||
1178 | if (!priv->cm.srq_ring) { | ||
1179 | printk(KERN_WARNING "%s: failed to allocate CM ring (%d entries)\n", | ||
1180 | priv->ca->name, ipoib_recvq_size); | ||
1181 | ipoib_cm_dev_cleanup(dev); | ||
1182 | return -ENOMEM; | ||
1183 | } | ||
1184 | |||
1185 | for (i = 0; i < IPOIB_CM_RX_SG; ++i) | ||
1186 | priv->cm.rx_sge[i].lkey = priv->mr->lkey; | ||
1187 | |||
1188 | priv->cm.rx_sge[0].length = IPOIB_CM_HEAD_SIZE; | ||
1189 | for (i = 1; i < IPOIB_CM_RX_SG; ++i) | ||
1190 | priv->cm.rx_sge[i].length = PAGE_SIZE; | ||
1191 | priv->cm.rx_wr.next = NULL; | ||
1192 | priv->cm.rx_wr.sg_list = priv->cm.rx_sge; | ||
1193 | priv->cm.rx_wr.num_sge = IPOIB_CM_RX_SG; | ||
1194 | |||
1195 | for (i = 0; i < ipoib_recvq_size; ++i) { | ||
1196 | if (ipoib_cm_alloc_rx_skb(dev, i, priv->cm.srq_ring[i].mapping)) { | ||
1197 | ipoib_warn(priv, "failed to allocate receive buffer %d\n", i); | ||
1198 | ipoib_cm_dev_cleanup(dev); | ||
1199 | return -ENOMEM; | ||
1200 | } | ||
1201 | if (ipoib_cm_post_receive(dev, i)) { | ||
1202 | ipoib_warn(priv, "ipoib_ib_post_receive failed for buf %d\n", i); | ||
1203 | ipoib_cm_dev_cleanup(dev); | ||
1204 | return -EIO; | ||
1205 | } | ||
1206 | } | ||
1207 | |||
1208 | priv->dev->dev_addr[0] = IPOIB_FLAGS_RC; | ||
1209 | return 0; | ||
1210 | } | ||
1211 | |||
1212 | void ipoib_cm_dev_cleanup(struct net_device *dev) | ||
1213 | { | ||
1214 | struct ipoib_dev_priv *priv = netdev_priv(dev); | ||
1215 | int i, ret; | ||
1216 | |||
1217 | if (!priv->cm.srq) | ||
1218 | return; | ||
1219 | |||
1220 | ipoib_dbg(priv, "Cleanup ipoib connected mode.\n"); | ||
1221 | |||
1222 | ret = ib_destroy_srq(priv->cm.srq); | ||
1223 | if (ret) | ||
1224 | ipoib_warn(priv, "ib_destroy_srq failed: %d\n", ret); | ||
1225 | |||
1226 | priv->cm.srq = NULL; | ||
1227 | if (!priv->cm.srq_ring) | ||
1228 | return; | ||
1229 | for (i = 0; i < ipoib_recvq_size; ++i) | ||
1230 | if (priv->cm.srq_ring[i].skb) { | ||
1231 | ipoib_cm_dma_unmap_rx(priv, priv->cm.srq_ring[i].mapping); | ||
1232 | dev_kfree_skb_any(priv->cm.srq_ring[i].skb); | ||
1233 | priv->cm.srq_ring[i].skb = NULL; | ||
1234 | } | ||
1235 | kfree(priv->cm.srq_ring); | ||
1236 | priv->cm.srq_ring = NULL; | ||
1237 | } | ||
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_ib.c b/drivers/infiniband/ulp/ipoib/ipoib_ib.c index 59d9594ed6d9..f2aa923ddbea 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_ib.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_ib.c | |||
@@ -50,8 +50,6 @@ MODULE_PARM_DESC(data_debug_level, | |||
50 | "Enable data path debug tracing if > 0"); | 50 | "Enable data path debug tracing if > 0"); |
51 | #endif | 51 | #endif |
52 | 52 | ||
53 | #define IPOIB_OP_RECV (1ul << 31) | ||
54 | |||
55 | static DEFINE_MUTEX(pkey_mutex); | 53 | static DEFINE_MUTEX(pkey_mutex); |
56 | 54 | ||
57 | struct ipoib_ah *ipoib_create_ah(struct net_device *dev, | 55 | struct ipoib_ah *ipoib_create_ah(struct net_device *dev, |
@@ -268,10 +266,11 @@ static void ipoib_ib_handle_tx_wc(struct net_device *dev, struct ib_wc *wc) | |||
268 | 266 | ||
269 | spin_lock_irqsave(&priv->tx_lock, flags); | 267 | spin_lock_irqsave(&priv->tx_lock, flags); |
270 | ++priv->tx_tail; | 268 | ++priv->tx_tail; |
271 | if (netif_queue_stopped(dev) && | 269 | if (unlikely(test_bit(IPOIB_FLAG_NETIF_STOPPED, &priv->flags)) && |
272 | test_bit(IPOIB_FLAG_ADMIN_UP, &priv->flags) && | 270 | priv->tx_head - priv->tx_tail <= ipoib_sendq_size >> 1) { |
273 | priv->tx_head - priv->tx_tail <= ipoib_sendq_size >> 1) | 271 | clear_bit(IPOIB_FLAG_NETIF_STOPPED, &priv->flags); |
274 | netif_wake_queue(dev); | 272 | netif_wake_queue(dev); |
273 | } | ||
275 | spin_unlock_irqrestore(&priv->tx_lock, flags); | 274 | spin_unlock_irqrestore(&priv->tx_lock, flags); |
276 | 275 | ||
277 | if (wc->status != IB_WC_SUCCESS && | 276 | if (wc->status != IB_WC_SUCCESS && |
@@ -283,7 +282,9 @@ static void ipoib_ib_handle_tx_wc(struct net_device *dev, struct ib_wc *wc) | |||
283 | 282 | ||
284 | static void ipoib_ib_handle_wc(struct net_device *dev, struct ib_wc *wc) | 283 | static void ipoib_ib_handle_wc(struct net_device *dev, struct ib_wc *wc) |
285 | { | 284 | { |
286 | if (wc->wr_id & IPOIB_OP_RECV) | 285 | if (wc->wr_id & IPOIB_CM_OP_SRQ) |
286 | ipoib_cm_handle_rx_wc(dev, wc); | ||
287 | else if (wc->wr_id & IPOIB_OP_RECV) | ||
287 | ipoib_ib_handle_rx_wc(dev, wc); | 288 | ipoib_ib_handle_rx_wc(dev, wc); |
288 | else | 289 | else |
289 | ipoib_ib_handle_tx_wc(dev, wc); | 290 | ipoib_ib_handle_tx_wc(dev, wc); |
@@ -327,12 +328,12 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb, | |||
327 | struct ipoib_tx_buf *tx_req; | 328 | struct ipoib_tx_buf *tx_req; |
328 | u64 addr; | 329 | u64 addr; |
329 | 330 | ||
330 | if (unlikely(skb->len > dev->mtu + INFINIBAND_ALEN)) { | 331 | if (unlikely(skb->len > priv->mcast_mtu + INFINIBAND_ALEN)) { |
331 | ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n", | 332 | ipoib_warn(priv, "packet len %d (> %d) too long to send, dropping\n", |
332 | skb->len, dev->mtu + INFINIBAND_ALEN); | 333 | skb->len, priv->mcast_mtu + INFINIBAND_ALEN); |
333 | ++priv->stats.tx_dropped; | 334 | ++priv->stats.tx_dropped; |
334 | ++priv->stats.tx_errors; | 335 | ++priv->stats.tx_errors; |
335 | dev_kfree_skb_any(skb); | 336 | ipoib_cm_skb_too_long(dev, skb, priv->mcast_mtu); |
336 | return; | 337 | return; |
337 | } | 338 | } |
338 | 339 | ||
@@ -372,6 +373,7 @@ void ipoib_send(struct net_device *dev, struct sk_buff *skb, | |||
372 | if (priv->tx_head - priv->tx_tail == ipoib_sendq_size) { | 373 | if (priv->tx_head - priv->tx_tail == ipoib_sendq_size) { |
373 | ipoib_dbg(priv, "TX ring full, stopping kernel net queue\n"); | 374 | ipoib_dbg(priv, "TX ring full, stopping kernel net queue\n"); |
374 | netif_stop_queue(dev); | 375 | netif_stop_queue(dev); |
376 | set_bit(IPOIB_FLAG_NETIF_STOPPED, &priv->flags); | ||
375 | } | 377 | } |
376 | } | 378 | } |
377 | } | 379 | } |
@@ -424,6 +426,13 @@ int ipoib_ib_dev_open(struct net_device *dev) | |||
424 | return -1; | 426 | return -1; |
425 | } | 427 | } |
426 | 428 | ||
429 | ret = ipoib_cm_dev_open(dev); | ||
430 | if (ret) { | ||
431 | ipoib_warn(priv, "ipoib_ib_post_receives returned %d\n", ret); | ||
432 | ipoib_ib_dev_stop(dev); | ||
433 | return -1; | ||
434 | } | ||
435 | |||
427 | clear_bit(IPOIB_STOP_REAPER, &priv->flags); | 436 | clear_bit(IPOIB_STOP_REAPER, &priv->flags); |
428 | queue_delayed_work(ipoib_workqueue, &priv->ah_reap_task, HZ); | 437 | queue_delayed_work(ipoib_workqueue, &priv->ah_reap_task, HZ); |
429 | 438 | ||
@@ -509,6 +518,8 @@ int ipoib_ib_dev_stop(struct net_device *dev) | |||
509 | 518 | ||
510 | clear_bit(IPOIB_FLAG_INITIALIZED, &priv->flags); | 519 | clear_bit(IPOIB_FLAG_INITIALIZED, &priv->flags); |
511 | 520 | ||
521 | ipoib_cm_dev_stop(dev); | ||
522 | |||
512 | /* | 523 | /* |
513 | * Move our QP to the error state and then reinitialize in | 524 | * Move our QP to the error state and then reinitialize in |
514 | * when all work requests have completed or have been flushed. | 525 | * when all work requests have completed or have been flushed. |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c index af5ee2ec4499..18d27fd352ad 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_main.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c | |||
@@ -49,8 +49,6 @@ | |||
49 | 49 | ||
50 | #include <net/dst.h> | 50 | #include <net/dst.h> |
51 | 51 | ||
52 | #define IPOIB_QPN(ha) (be32_to_cpup((__be32 *) ha) & 0xffffff) | ||
53 | |||
54 | MODULE_AUTHOR("Roland Dreier"); | 52 | MODULE_AUTHOR("Roland Dreier"); |
55 | MODULE_DESCRIPTION("IP-over-InfiniBand net driver"); | 53 | MODULE_DESCRIPTION("IP-over-InfiniBand net driver"); |
56 | MODULE_LICENSE("Dual BSD/GPL"); | 54 | MODULE_LICENSE("Dual BSD/GPL"); |
@@ -145,6 +143,8 @@ static int ipoib_stop(struct net_device *dev) | |||
145 | 143 | ||
146 | netif_stop_queue(dev); | 144 | netif_stop_queue(dev); |
147 | 145 | ||
146 | clear_bit(IPOIB_FLAG_NETIF_STOPPED, &priv->flags); | ||
147 | |||
148 | /* | 148 | /* |
149 | * Now flush workqueue to make sure a scheduled task doesn't | 149 | * Now flush workqueue to make sure a scheduled task doesn't |
150 | * bring our internal state back up. | 150 | * bring our internal state back up. |
@@ -178,8 +178,18 @@ static int ipoib_change_mtu(struct net_device *dev, int new_mtu) | |||
178 | { | 178 | { |
179 | struct ipoib_dev_priv *priv = netdev_priv(dev); | 179 | struct ipoib_dev_priv *priv = netdev_priv(dev); |
180 | 180 | ||
181 | if (new_mtu > IPOIB_PACKET_SIZE - IPOIB_ENCAP_LEN) | 181 | /* dev->mtu > 2K ==> connected mode */ |
182 | if (ipoib_cm_admin_enabled(dev) && new_mtu <= IPOIB_CM_MTU) { | ||
183 | if (new_mtu > priv->mcast_mtu) | ||
184 | ipoib_warn(priv, "mtu > %d will cause multicast packet drops.\n", | ||
185 | priv->mcast_mtu); | ||
186 | dev->mtu = new_mtu; | ||
187 | return 0; | ||
188 | } | ||
189 | |||
190 | if (new_mtu > IPOIB_PACKET_SIZE - IPOIB_ENCAP_LEN) { | ||
182 | return -EINVAL; | 191 | return -EINVAL; |
192 | } | ||
183 | 193 | ||
184 | priv->admin_mtu = new_mtu; | 194 | priv->admin_mtu = new_mtu; |
185 | 195 | ||
@@ -414,6 +424,20 @@ static void path_rec_completion(int status, | |||
414 | memcpy(&neigh->dgid.raw, &path->pathrec.dgid.raw, | 424 | memcpy(&neigh->dgid.raw, &path->pathrec.dgid.raw, |
415 | sizeof(union ib_gid)); | 425 | sizeof(union ib_gid)); |
416 | 426 | ||
427 | if (ipoib_cm_enabled(dev, neigh->neighbour)) { | ||
428 | if (!ipoib_cm_get(neigh)) | ||
429 | ipoib_cm_set(neigh, ipoib_cm_create_tx(dev, | ||
430 | path, | ||
431 | neigh)); | ||
432 | if (!ipoib_cm_get(neigh)) { | ||
433 | list_del(&neigh->list); | ||
434 | if (neigh->ah) | ||
435 | ipoib_put_ah(neigh->ah); | ||
436 | ipoib_neigh_free(dev, neigh); | ||
437 | continue; | ||
438 | } | ||
439 | } | ||
440 | |||
417 | while ((skb = __skb_dequeue(&neigh->queue))) | 441 | while ((skb = __skb_dequeue(&neigh->queue))) |
418 | __skb_queue_tail(&skqueue, skb); | 442 | __skb_queue_tail(&skqueue, skb); |
419 | } | 443 | } |
@@ -520,7 +544,25 @@ static void neigh_add_path(struct sk_buff *skb, struct net_device *dev) | |||
520 | memcpy(&neigh->dgid.raw, &path->pathrec.dgid.raw, | 544 | memcpy(&neigh->dgid.raw, &path->pathrec.dgid.raw, |
521 | sizeof(union ib_gid)); | 545 | sizeof(union ib_gid)); |
522 | 546 | ||
523 | ipoib_send(dev, skb, path->ah, IPOIB_QPN(skb->dst->neighbour->ha)); | 547 | if (ipoib_cm_enabled(dev, neigh->neighbour)) { |
548 | if (!ipoib_cm_get(neigh)) | ||
549 | ipoib_cm_set(neigh, ipoib_cm_create_tx(dev, path, neigh)); | ||
550 | if (!ipoib_cm_get(neigh)) { | ||
551 | list_del(&neigh->list); | ||
552 | if (neigh->ah) | ||
553 | ipoib_put_ah(neigh->ah); | ||
554 | ipoib_neigh_free(dev, neigh); | ||
555 | goto err_drop; | ||
556 | } | ||
557 | if (skb_queue_len(&neigh->queue) < IPOIB_MAX_PATH_REC_QUEUE) | ||
558 | __skb_queue_tail(&neigh->queue, skb); | ||
559 | else { | ||
560 | ipoib_warn(priv, "queue length limit %d. Packet drop.\n", | ||
561 | skb_queue_len(&neigh->queue)); | ||
562 | goto err_drop; | ||
563 | } | ||
564 | } else | ||
565 | ipoib_send(dev, skb, path->ah, IPOIB_QPN(skb->dst->neighbour->ha)); | ||
524 | } else { | 566 | } else { |
525 | neigh->ah = NULL; | 567 | neigh->ah = NULL; |
526 | 568 | ||
@@ -538,6 +580,7 @@ err_list: | |||
538 | 580 | ||
539 | err_path: | 581 | err_path: |
540 | ipoib_neigh_free(dev, neigh); | 582 | ipoib_neigh_free(dev, neigh); |
583 | err_drop: | ||
541 | ++priv->stats.tx_dropped; | 584 | ++priv->stats.tx_dropped; |
542 | dev_kfree_skb_any(skb); | 585 | dev_kfree_skb_any(skb); |
543 | 586 | ||
@@ -640,7 +683,12 @@ static int ipoib_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
640 | 683 | ||
641 | neigh = *to_ipoib_neigh(skb->dst->neighbour); | 684 | neigh = *to_ipoib_neigh(skb->dst->neighbour); |
642 | 685 | ||
643 | if (likely(neigh->ah)) { | 686 | if (ipoib_cm_get(neigh)) { |
687 | if (ipoib_cm_up(neigh)) { | ||
688 | ipoib_cm_send(dev, skb, ipoib_cm_get(neigh)); | ||
689 | goto out; | ||
690 | } | ||
691 | } else if (neigh->ah) { | ||
644 | if (unlikely(memcmp(&neigh->dgid.raw, | 692 | if (unlikely(memcmp(&neigh->dgid.raw, |
645 | skb->dst->neighbour->ha + 4, | 693 | skb->dst->neighbour->ha + 4, |
646 | sizeof(union ib_gid)))) { | 694 | sizeof(union ib_gid)))) { |
@@ -805,6 +853,7 @@ struct ipoib_neigh *ipoib_neigh_alloc(struct neighbour *neighbour) | |||
805 | neigh->neighbour = neighbour; | 853 | neigh->neighbour = neighbour; |
806 | *to_ipoib_neigh(neighbour) = neigh; | 854 | *to_ipoib_neigh(neighbour) = neigh; |
807 | skb_queue_head_init(&neigh->queue); | 855 | skb_queue_head_init(&neigh->queue); |
856 | ipoib_cm_set(neigh, NULL); | ||
808 | 857 | ||
809 | return neigh; | 858 | return neigh; |
810 | } | 859 | } |
@@ -818,6 +867,8 @@ void ipoib_neigh_free(struct net_device *dev, struct ipoib_neigh *neigh) | |||
818 | ++priv->stats.tx_dropped; | 867 | ++priv->stats.tx_dropped; |
819 | dev_kfree_skb_any(skb); | 868 | dev_kfree_skb_any(skb); |
820 | } | 869 | } |
870 | if (ipoib_cm_get(neigh)) | ||
871 | ipoib_cm_destroy_tx(ipoib_cm_get(neigh)); | ||
821 | kfree(neigh); | 872 | kfree(neigh); |
822 | } | 873 | } |
823 | 874 | ||
@@ -1080,6 +1131,8 @@ static struct net_device *ipoib_add_port(const char *format, | |||
1080 | 1131 | ||
1081 | ipoib_create_debug_files(priv->dev); | 1132 | ipoib_create_debug_files(priv->dev); |
1082 | 1133 | ||
1134 | if (ipoib_cm_add_mode_attr(priv->dev)) | ||
1135 | goto sysfs_failed; | ||
1083 | if (ipoib_add_pkey_attr(priv->dev)) | 1136 | if (ipoib_add_pkey_attr(priv->dev)) |
1084 | goto sysfs_failed; | 1137 | goto sysfs_failed; |
1085 | if (device_create_file(&priv->dev->dev, &dev_attr_create_child)) | 1138 | if (device_create_file(&priv->dev->dev, &dev_attr_create_child)) |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_multicast.c b/drivers/infiniband/ulp/ipoib/ipoib_multicast.c index b04b72ca32ed..fea737f520fd 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_multicast.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_multicast.c | |||
@@ -597,7 +597,9 @@ void ipoib_mcast_join_task(struct work_struct *work) | |||
597 | 597 | ||
598 | priv->mcast_mtu = ib_mtu_enum_to_int(priv->broadcast->mcmember.mtu) - | 598 | priv->mcast_mtu = ib_mtu_enum_to_int(priv->broadcast->mcmember.mtu) - |
599 | IPOIB_ENCAP_LEN; | 599 | IPOIB_ENCAP_LEN; |
600 | dev->mtu = min(priv->mcast_mtu, priv->admin_mtu); | 600 | |
601 | if (!ipoib_cm_admin_enabled(dev)) | ||
602 | dev->mtu = min(priv->mcast_mtu, priv->admin_mtu); | ||
601 | 603 | ||
602 | ipoib_dbg_mcast(priv, "successfully joined all multicast groups\n"); | 604 | ipoib_dbg_mcast(priv, "successfully joined all multicast groups\n"); |
603 | 605 | ||
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c index 7b717c648f72..3cb551b88756 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_verbs.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_verbs.c | |||
@@ -168,35 +168,41 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca) | |||
168 | .qp_type = IB_QPT_UD | 168 | .qp_type = IB_QPT_UD |
169 | }; | 169 | }; |
170 | 170 | ||
171 | int ret, size; | ||
172 | |||
171 | priv->pd = ib_alloc_pd(priv->ca); | 173 | priv->pd = ib_alloc_pd(priv->ca); |
172 | if (IS_ERR(priv->pd)) { | 174 | if (IS_ERR(priv->pd)) { |
173 | printk(KERN_WARNING "%s: failed to allocate PD\n", ca->name); | 175 | printk(KERN_WARNING "%s: failed to allocate PD\n", ca->name); |
174 | return -ENODEV; | 176 | return -ENODEV; |
175 | } | 177 | } |
176 | 178 | ||
177 | priv->cq = ib_create_cq(priv->ca, ipoib_ib_completion, NULL, dev, | 179 | priv->mr = ib_get_dma_mr(priv->pd, IB_ACCESS_LOCAL_WRITE); |
178 | ipoib_sendq_size + ipoib_recvq_size + 1); | 180 | if (IS_ERR(priv->mr)) { |
181 | printk(KERN_WARNING "%s: ib_get_dma_mr failed\n", ca->name); | ||
182 | goto out_free_pd; | ||
183 | } | ||
184 | |||
185 | size = ipoib_sendq_size + ipoib_recvq_size + 1; | ||
186 | ret = ipoib_cm_dev_init(dev); | ||
187 | if (!ret) | ||
188 | size += ipoib_recvq_size; | ||
189 | |||
190 | priv->cq = ib_create_cq(priv->ca, ipoib_ib_completion, NULL, dev, size); | ||
179 | if (IS_ERR(priv->cq)) { | 191 | if (IS_ERR(priv->cq)) { |
180 | printk(KERN_WARNING "%s: failed to create CQ\n", ca->name); | 192 | printk(KERN_WARNING "%s: failed to create CQ\n", ca->name); |
181 | goto out_free_pd; | 193 | goto out_free_mr; |
182 | } | 194 | } |
183 | 195 | ||
184 | if (ib_req_notify_cq(priv->cq, IB_CQ_NEXT_COMP)) | 196 | if (ib_req_notify_cq(priv->cq, IB_CQ_NEXT_COMP)) |
185 | goto out_free_cq; | 197 | goto out_free_cq; |
186 | 198 | ||
187 | priv->mr = ib_get_dma_mr(priv->pd, IB_ACCESS_LOCAL_WRITE); | ||
188 | if (IS_ERR(priv->mr)) { | ||
189 | printk(KERN_WARNING "%s: ib_get_dma_mr failed\n", ca->name); | ||
190 | goto out_free_cq; | ||
191 | } | ||
192 | |||
193 | init_attr.send_cq = priv->cq; | 199 | init_attr.send_cq = priv->cq; |
194 | init_attr.recv_cq = priv->cq, | 200 | init_attr.recv_cq = priv->cq, |
195 | 201 | ||
196 | priv->qp = ib_create_qp(priv->pd, &init_attr); | 202 | priv->qp = ib_create_qp(priv->pd, &init_attr); |
197 | if (IS_ERR(priv->qp)) { | 203 | if (IS_ERR(priv->qp)) { |
198 | printk(KERN_WARNING "%s: failed to create QP\n", ca->name); | 204 | printk(KERN_WARNING "%s: failed to create QP\n", ca->name); |
199 | goto out_free_mr; | 205 | goto out_free_cq; |
200 | } | 206 | } |
201 | 207 | ||
202 | priv->dev->dev_addr[1] = (priv->qp->qp_num >> 16) & 0xff; | 208 | priv->dev->dev_addr[1] = (priv->qp->qp_num >> 16) & 0xff; |
@@ -212,12 +218,12 @@ int ipoib_transport_dev_init(struct net_device *dev, struct ib_device *ca) | |||
212 | 218 | ||
213 | return 0; | 219 | return 0; |
214 | 220 | ||
215 | out_free_mr: | ||
216 | ib_dereg_mr(priv->mr); | ||
217 | |||
218 | out_free_cq: | 221 | out_free_cq: |
219 | ib_destroy_cq(priv->cq); | 222 | ib_destroy_cq(priv->cq); |
220 | 223 | ||
224 | out_free_mr: | ||
225 | ib_dereg_mr(priv->mr); | ||
226 | |||
221 | out_free_pd: | 227 | out_free_pd: |
222 | ib_dealloc_pd(priv->pd); | 228 | ib_dealloc_pd(priv->pd); |
223 | return -ENODEV; | 229 | return -ENODEV; |
@@ -235,12 +241,14 @@ void ipoib_transport_dev_cleanup(struct net_device *dev) | |||
235 | clear_bit(IPOIB_PKEY_ASSIGNED, &priv->flags); | 241 | clear_bit(IPOIB_PKEY_ASSIGNED, &priv->flags); |
236 | } | 242 | } |
237 | 243 | ||
238 | if (ib_dereg_mr(priv->mr)) | ||
239 | ipoib_warn(priv, "ib_dereg_mr failed\n"); | ||
240 | |||
241 | if (ib_destroy_cq(priv->cq)) | 244 | if (ib_destroy_cq(priv->cq)) |
242 | ipoib_warn(priv, "ib_cq_destroy failed\n"); | 245 | ipoib_warn(priv, "ib_cq_destroy failed\n"); |
243 | 246 | ||
247 | ipoib_cm_dev_cleanup(dev); | ||
248 | |||
249 | if (ib_dereg_mr(priv->mr)) | ||
250 | ipoib_warn(priv, "ib_dereg_mr failed\n"); | ||
251 | |||
244 | if (ib_dealloc_pd(priv->pd)) | 252 | if (ib_dealloc_pd(priv->pd)) |
245 | ipoib_warn(priv, "ib_dealloc_pd failed\n"); | 253 | ipoib_warn(priv, "ib_dealloc_pd failed\n"); |
246 | } | 254 | } |
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_vlan.c b/drivers/infiniband/ulp/ipoib/ipoib_vlan.c index 085eafe6667c..6762988439d1 100644 --- a/drivers/infiniband/ulp/ipoib/ipoib_vlan.c +++ b/drivers/infiniband/ulp/ipoib/ipoib_vlan.c | |||
@@ -115,6 +115,8 @@ int ipoib_vlan_add(struct net_device *pdev, unsigned short pkey) | |||
115 | 115 | ||
116 | ipoib_create_debug_files(priv->dev); | 116 | ipoib_create_debug_files(priv->dev); |
117 | 117 | ||
118 | if (ipoib_cm_add_mode_attr(priv->dev)) | ||
119 | goto sysfs_failed; | ||
118 | if (ipoib_add_pkey_attr(priv->dev)) | 120 | if (ipoib_add_pkey_attr(priv->dev)) |
119 | goto sysfs_failed; | 121 | goto sysfs_failed; |
120 | 122 | ||
diff --git a/drivers/macintosh/adbhid.c b/drivers/macintosh/adbhid.c index 1c7d6f221b55..b77ef5187d6d 100644 --- a/drivers/macintosh/adbhid.c +++ b/drivers/macintosh/adbhid.c | |||
@@ -574,8 +574,8 @@ static struct adb_request led_request; | |||
574 | static int leds_pending[16]; | 574 | static int leds_pending[16]; |
575 | static int leds_req_pending; | 575 | static int leds_req_pending; |
576 | static int pending_devs[16]; | 576 | static int pending_devs[16]; |
577 | static int pending_led_start=0; | 577 | static int pending_led_start; |
578 | static int pending_led_end=0; | 578 | static int pending_led_end; |
579 | static DEFINE_SPINLOCK(leds_lock); | 579 | static DEFINE_SPINLOCK(leds_lock); |
580 | 580 | ||
581 | static void leds_done(struct adb_request *req) | 581 | static void leds_done(struct adb_request *req) |
diff --git a/drivers/macintosh/apm_emu.c b/drivers/macintosh/apm_emu.c index a6d50f4fabd7..c5e4d43f97fc 100644 --- a/drivers/macintosh/apm_emu.c +++ b/drivers/macintosh/apm_emu.c | |||
@@ -102,7 +102,7 @@ static struct pmu_sleep_notifier apm_sleep_notifier = { | |||
102 | SLEEP_LEVEL_USERLAND, | 102 | SLEEP_LEVEL_USERLAND, |
103 | }; | 103 | }; |
104 | 104 | ||
105 | static char driver_version[] = "0.5"; /* no spaces */ | 105 | static const char driver_version[] = "0.5"; /* no spaces */ |
106 | 106 | ||
107 | #ifdef DEBUG | 107 | #ifdef DEBUG |
108 | static char * apm_event_name[] = { | 108 | static char * apm_event_name[] = { |
diff --git a/drivers/macintosh/mac_hid.c b/drivers/macintosh/mac_hid.c index ee6b4ca69130..f632cec9ce45 100644 --- a/drivers/macintosh/mac_hid.c +++ b/drivers/macintosh/mac_hid.c | |||
@@ -17,10 +17,10 @@ | |||
17 | 17 | ||
18 | static struct input_dev *emumousebtn; | 18 | static struct input_dev *emumousebtn; |
19 | static int emumousebtn_input_register(void); | 19 | static int emumousebtn_input_register(void); |
20 | static int mouse_emulate_buttons = 0; | 20 | static int mouse_emulate_buttons; |
21 | static int mouse_button2_keycode = KEY_RIGHTCTRL; /* right control key */ | 21 | static int mouse_button2_keycode = KEY_RIGHTCTRL; /* right control key */ |
22 | static int mouse_button3_keycode = KEY_RIGHTALT; /* right option key */ | 22 | static int mouse_button3_keycode = KEY_RIGHTALT; /* right option key */ |
23 | static int mouse_last_keycode = 0; | 23 | static int mouse_last_keycode; |
24 | 24 | ||
25 | #if defined(CONFIG_SYSCTL) | 25 | #if defined(CONFIG_SYSCTL) |
26 | /* file(s) in /proc/sys/dev/mac_hid */ | 26 | /* file(s) in /proc/sys/dev/mac_hid */ |
diff --git a/drivers/macintosh/therm_adt746x.c b/drivers/macintosh/therm_adt746x.c index 3d3bf1643e73..a7ce55926638 100644 --- a/drivers/macintosh/therm_adt746x.c +++ b/drivers/macintosh/therm_adt746x.c | |||
@@ -48,11 +48,11 @@ static u8 FAN_SPD_SET[2] = {0x30, 0x31}; | |||
48 | 48 | ||
49 | static u8 default_limits_local[3] = {70, 50, 70}; /* local, sensor1, sensor2 */ | 49 | static u8 default_limits_local[3] = {70, 50, 70}; /* local, sensor1, sensor2 */ |
50 | static u8 default_limits_chip[3] = {80, 65, 80}; /* local, sensor1, sensor2 */ | 50 | static u8 default_limits_chip[3] = {80, 65, 80}; /* local, sensor1, sensor2 */ |
51 | static const char *sensor_location[3] = {NULL, NULL, NULL}; | 51 | static const char *sensor_location[3]; |
52 | 52 | ||
53 | static int limit_adjust = 0; | 53 | static int limit_adjust; |
54 | static int fan_speed = -1; | 54 | static int fan_speed = -1; |
55 | static int verbose = 0; | 55 | static int verbose; |
56 | 56 | ||
57 | MODULE_AUTHOR("Colin Leroy <colin@colino.net>"); | 57 | MODULE_AUTHOR("Colin Leroy <colin@colino.net>"); |
58 | MODULE_DESCRIPTION("Driver for ADT746x thermostat in iBook G4 and " | 58 | MODULE_DESCRIPTION("Driver for ADT746x thermostat in iBook G4 and " |
diff --git a/drivers/macintosh/via-cuda.c b/drivers/macintosh/via-cuda.c index df66291b1322..3797f503cd6c 100644 --- a/drivers/macintosh/via-cuda.c +++ b/drivers/macintosh/via-cuda.c | |||
@@ -86,7 +86,7 @@ static int data_index; | |||
86 | #ifdef CONFIG_PPC | 86 | #ifdef CONFIG_PPC |
87 | static struct device_node *vias; | 87 | static struct device_node *vias; |
88 | #endif | 88 | #endif |
89 | static int cuda_fully_inited = 0; | 89 | static int cuda_fully_inited; |
90 | 90 | ||
91 | #ifdef CONFIG_ADB | 91 | #ifdef CONFIG_ADB |
92 | static int cuda_probe(void); | 92 | static int cuda_probe(void); |
diff --git a/drivers/macintosh/via-macii.c b/drivers/macintosh/via-macii.c index 5d88d5b0ad99..175b3e56e375 100644 --- a/drivers/macintosh/via-macii.c +++ b/drivers/macintosh/via-macii.c | |||
@@ -107,10 +107,10 @@ static enum macii_state { | |||
107 | awaiting_reply | 107 | awaiting_reply |
108 | } macii_state; | 108 | } macii_state; |
109 | 109 | ||
110 | static int need_poll = 0; | 110 | static int need_poll; |
111 | static int command_byte = 0; | 111 | static int command_byte; |
112 | static int last_reply = 0; | 112 | static int last_reply; |
113 | static int last_active = 0; | 113 | static int last_active; |
114 | 114 | ||
115 | static struct adb_request *current_req; | 115 | static struct adb_request *current_req; |
116 | static struct adb_request *last_req; | 116 | static struct adb_request *last_req; |
@@ -124,7 +124,7 @@ static int first_byte; | |||
124 | static int prefix_len; | 124 | static int prefix_len; |
125 | static int status = ST_IDLE|TREQ; | 125 | static int status = ST_IDLE|TREQ; |
126 | static int last_status; | 126 | static int last_status; |
127 | static int driver_running = 0; | 127 | static int driver_running; |
128 | 128 | ||
129 | /* debug level 10 required for ADB logging (should be && debug_adb, ideally) */ | 129 | /* debug level 10 required for ADB logging (should be && debug_adb, ideally) */ |
130 | 130 | ||
diff --git a/drivers/macintosh/via-maciisi.c b/drivers/macintosh/via-maciisi.c index 1f0aa5dc9aa5..10051db48d23 100644 --- a/drivers/macintosh/via-maciisi.c +++ b/drivers/macintosh/via-maciisi.c | |||
@@ -63,10 +63,10 @@ static volatile unsigned char *via; | |||
63 | 63 | ||
64 | #undef DEBUG_MACIISI_ADB | 64 | #undef DEBUG_MACIISI_ADB |
65 | 65 | ||
66 | static struct adb_request* current_req = NULL; | 66 | static struct adb_request* current_req; |
67 | static struct adb_request* last_req = NULL; | 67 | static struct adb_request* last_req; |
68 | static unsigned char maciisi_rbuf[16]; | 68 | static unsigned char maciisi_rbuf[16]; |
69 | static unsigned char *reply_ptr = NULL; | 69 | static unsigned char *reply_ptr; |
70 | static int data_index; | 70 | static int data_index; |
71 | static int reading_reply; | 71 | static int reading_reply; |
72 | static int reply_len; | 72 | static int reply_len; |
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c index 96bea4b62c43..b6073bdb50c3 100644 --- a/drivers/macintosh/via-pmu.c +++ b/drivers/macintosh/via-pmu.c | |||
@@ -141,13 +141,13 @@ static volatile int adb_int_pending; | |||
141 | static volatile int disable_poll; | 141 | static volatile int disable_poll; |
142 | static struct device_node *vias; | 142 | static struct device_node *vias; |
143 | static int pmu_kind = PMU_UNKNOWN; | 143 | static int pmu_kind = PMU_UNKNOWN; |
144 | static int pmu_fully_inited = 0; | 144 | static int pmu_fully_inited; |
145 | static int pmu_has_adb; | 145 | static int pmu_has_adb; |
146 | static struct device_node *gpio_node; | 146 | static struct device_node *gpio_node; |
147 | static unsigned char __iomem *gpio_reg = NULL; | 147 | static unsigned char __iomem *gpio_reg; |
148 | static int gpio_irq = NO_IRQ; | 148 | static int gpio_irq = NO_IRQ; |
149 | static int gpio_irq_enabled = -1; | 149 | static int gpio_irq_enabled = -1; |
150 | static volatile int pmu_suspended = 0; | 150 | static volatile int pmu_suspended; |
151 | static spinlock_t pmu_lock; | 151 | static spinlock_t pmu_lock; |
152 | static u8 pmu_intr_mask; | 152 | static u8 pmu_intr_mask; |
153 | static int pmu_version; | 153 | static int pmu_version; |
@@ -169,7 +169,7 @@ static int option_server_mode; | |||
169 | 169 | ||
170 | int pmu_battery_count; | 170 | int pmu_battery_count; |
171 | int pmu_cur_battery; | 171 | int pmu_cur_battery; |
172 | unsigned int pmu_power_flags; | 172 | unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT; |
173 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; | 173 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; |
174 | static int query_batt_timer = BATTERY_POLLING_COUNT; | 174 | static int query_batt_timer = BATTERY_POLLING_COUNT; |
175 | static struct adb_request batt_req; | 175 | static struct adb_request batt_req; |
@@ -180,7 +180,7 @@ int asleep; | |||
180 | BLOCKING_NOTIFIER_HEAD(sleep_notifier_list); | 180 | BLOCKING_NOTIFIER_HEAD(sleep_notifier_list); |
181 | 181 | ||
182 | #ifdef CONFIG_ADB | 182 | #ifdef CONFIG_ADB |
183 | static int adb_dev_map = 0; | 183 | static int adb_dev_map; |
184 | static int pmu_adb_flags; | 184 | static int pmu_adb_flags; |
185 | 185 | ||
186 | static int pmu_probe(void); | 186 | static int pmu_probe(void); |
@@ -2776,7 +2776,7 @@ pmu_polled_request(struct adb_request *req) | |||
2776 | 2776 | ||
2777 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) | 2777 | #if defined(CONFIG_PM) && defined(CONFIG_PPC32) |
2778 | 2778 | ||
2779 | static int pmu_sys_suspended = 0; | 2779 | static int pmu_sys_suspended; |
2780 | 2780 | ||
2781 | static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state) | 2781 | static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state) |
2782 | { | 2782 | { |
@@ -2816,7 +2816,6 @@ static struct sysdev_class pmu_sysclass = { | |||
2816 | }; | 2816 | }; |
2817 | 2817 | ||
2818 | static struct sys_device device_pmu = { | 2818 | static struct sys_device device_pmu = { |
2819 | .id = 0, | ||
2820 | .cls = &pmu_sysclass, | 2819 | .cls = &pmu_sysclass, |
2821 | }; | 2820 | }; |
2822 | 2821 | ||
diff --git a/drivers/macintosh/via-pmu68k.c b/drivers/macintosh/via-pmu68k.c index 4f5b6fa196c5..54baee57d2f8 100644 --- a/drivers/macintosh/via-pmu68k.c +++ b/drivers/macintosh/via-pmu68k.c | |||
@@ -96,10 +96,10 @@ static int data_index; | |||
96 | static int data_len; | 96 | static int data_len; |
97 | static int adb_int_pending; | 97 | static int adb_int_pending; |
98 | static int pmu_adb_flags; | 98 | static int pmu_adb_flags; |
99 | static int adb_dev_map = 0; | 99 | static int adb_dev_map; |
100 | static struct adb_request bright_req_1, bright_req_2, bright_req_3; | 100 | static struct adb_request bright_req_1, bright_req_2, bright_req_3; |
101 | static int pmu_kind = PMU_UNKNOWN; | 101 | static int pmu_kind = PMU_UNKNOWN; |
102 | static int pmu_fully_inited = 0; | 102 | static int pmu_fully_inited; |
103 | 103 | ||
104 | int asleep; | 104 | int asleep; |
105 | BLOCKING_NOTIFIER_HEAD(sleep_notifier_list); | 105 | BLOCKING_NOTIFIER_HEAD(sleep_notifier_list); |
diff --git a/drivers/media/dvb/b2c2/flexcop-i2c.c b/drivers/media/dvb/b2c2/flexcop-i2c.c index e0bd2d8f0f0c..5347a406fff7 100644 --- a/drivers/media/dvb/b2c2/flexcop-i2c.c +++ b/drivers/media/dvb/b2c2/flexcop-i2c.c | |||
@@ -190,6 +190,7 @@ int flexcop_i2c_init(struct flexcop_device *fc) | |||
190 | fc->i2c_adap.class = I2C_CLASS_TV_DIGITAL; | 190 | fc->i2c_adap.class = I2C_CLASS_TV_DIGITAL; |
191 | fc->i2c_adap.algo = &flexcop_algo; | 191 | fc->i2c_adap.algo = &flexcop_algo; |
192 | fc->i2c_adap.algo_data = NULL; | 192 | fc->i2c_adap.algo_data = NULL; |
193 | fc->i2c_adap.dev.parent = fc->dev; | ||
193 | 194 | ||
194 | if ((ret = i2c_add_adapter(&fc->i2c_adap)) < 0) | 195 | if ((ret = i2c_add_adapter(&fc->i2c_adap)) < 0) |
195 | return ret; | 196 | return ret; |
diff --git a/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c b/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c index 55ba020386c9..70df31b0a8a9 100644 --- a/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c +++ b/drivers/media/dvb/dvb-usb/dvb-usb-i2c.c | |||
@@ -27,6 +27,7 @@ int dvb_usb_i2c_init(struct dvb_usb_device *d) | |||
27 | #endif | 27 | #endif |
28 | d->i2c_adap.algo = d->props.i2c_algo; | 28 | d->i2c_adap.algo = d->props.i2c_algo; |
29 | d->i2c_adap.algo_data = NULL; | 29 | d->i2c_adap.algo_data = NULL; |
30 | d->i2c_adap.dev.parent = &d->udev->dev; | ||
30 | 31 | ||
31 | i2c_set_adapdata(&d->i2c_adap, d); | 32 | i2c_set_adapdata(&d->i2c_adap, d); |
32 | 33 | ||
diff --git a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c index 60820deb900b..b60cdc93d6db 100644 --- a/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c +++ b/drivers/media/dvb/ttusb-budget/dvb-ttusb-budget.c | |||
@@ -1690,6 +1690,7 @@ static int ttusb_probe(struct usb_interface *intf, const struct usb_device_id *i | |||
1690 | #endif | 1690 | #endif |
1691 | ttusb->i2c_adap.algo = &ttusb_dec_algo; | 1691 | ttusb->i2c_adap.algo = &ttusb_dec_algo; |
1692 | ttusb->i2c_adap.algo_data = NULL; | 1692 | ttusb->i2c_adap.algo_data = NULL; |
1693 | ttusb->i2c_adap.dev.parent = &udev->dev; | ||
1693 | 1694 | ||
1694 | result = i2c_add_adapter(&ttusb->i2c_adap); | 1695 | result = i2c_add_adapter(&ttusb->i2c_adap); |
1695 | if (result) { | 1696 | if (result) { |
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c index fb1410c6f864..4dae8925667f 100644 --- a/drivers/media/video/cafe_ccic.c +++ b/drivers/media/video/cafe_ccic.c | |||
@@ -549,6 +549,7 @@ static int cafe_smbus_setup(struct cafe_camera *cam) | |||
549 | adap->client_unregister = cafe_smbus_detach; | 549 | adap->client_unregister = cafe_smbus_detach; |
550 | adap->algo = &cafe_smbus_algo; | 550 | adap->algo = &cafe_smbus_algo; |
551 | strcpy(adap->name, "cafe_ccic"); | 551 | strcpy(adap->name, "cafe_ccic"); |
552 | adap->dev.parent = &cam->pdev->dev; | ||
552 | i2c_set_adapdata(adap, cam); | 553 | i2c_set_adapdata(adap, cam); |
553 | ret = i2c_add_adapter(adap); | 554 | ret = i2c_add_adapter(adap); |
554 | if (ret) | 555 | if (ret) |
diff --git a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c index f9bb41d8f4f3..62a7cfca837d 100644 --- a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c +++ b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c | |||
@@ -977,6 +977,7 @@ void pvr2_i2c_core_init(struct pvr2_hdw *hdw) | |||
977 | memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap)); | 977 | memcpy(&hdw->i2c_adap,&pvr2_i2c_adap_template,sizeof(hdw->i2c_adap)); |
978 | memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo)); | 978 | memcpy(&hdw->i2c_algo,&pvr2_i2c_algo_template,sizeof(hdw->i2c_algo)); |
979 | strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); | 979 | strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); |
980 | hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev; | ||
980 | hdw->i2c_adap.algo = &hdw->i2c_algo; | 981 | hdw->i2c_adap.algo = &hdw->i2c_algo; |
981 | hdw->i2c_adap.algo_data = hdw; | 982 | hdw->i2c_adap.algo_data = hdw; |
982 | hdw->i2c_pend_mask = 0; | 983 | hdw->i2c_pend_mask = 0; |
diff --git a/drivers/media/video/usbvision/usbvision-i2c.c b/drivers/media/video/usbvision/usbvision-i2c.c index 858252c15084..a242b76aea89 100644 --- a/drivers/media/video/usbvision/usbvision-i2c.c +++ b/drivers/media/video/usbvision/usbvision-i2c.c | |||
@@ -258,6 +258,7 @@ int usbvision_init_i2c(struct usb_usbvision *usbvision) | |||
258 | sprintf(usbvision->i2c_adap.name + strlen(usbvision->i2c_adap.name), | 258 | sprintf(usbvision->i2c_adap.name + strlen(usbvision->i2c_adap.name), |
259 | " #%d", usbvision->vdev->minor & 0x1f); | 259 | " #%d", usbvision->vdev->minor & 0x1f); |
260 | PDEBUG(DBG_I2C,"Adaptername: %s", usbvision->i2c_adap.name); | 260 | PDEBUG(DBG_I2C,"Adaptername: %s", usbvision->i2c_adap.name); |
261 | usbvision->i2c_adap.dev.parent = &usbvision->dev->dev; | ||
261 | 262 | ||
262 | i2c_set_adapdata(&usbvision->i2c_adap, usbvision); | 263 | i2c_set_adapdata(&usbvision->i2c_adap, usbvision); |
263 | i2c_set_clientdata(&usbvision->i2c_client, usbvision); | 264 | i2c_set_clientdata(&usbvision->i2c_client, usbvision); |
diff --git a/drivers/media/video/w9968cf.c b/drivers/media/video/w9968cf.c index 6e64af293be5..8f31613b9903 100644 --- a/drivers/media/video/w9968cf.c +++ b/drivers/media/video/w9968cf.c | |||
@@ -1573,6 +1573,7 @@ static int w9968cf_i2c_init(struct w9968cf_device* cam) | |||
1573 | 1573 | ||
1574 | memcpy(&cam->i2c_adapter, &adap, sizeof(struct i2c_adapter)); | 1574 | memcpy(&cam->i2c_adapter, &adap, sizeof(struct i2c_adapter)); |
1575 | strcpy(cam->i2c_adapter.name, "w9968cf"); | 1575 | strcpy(cam->i2c_adapter.name, "w9968cf"); |
1576 | cam->i2c_adapter.dev.parent = &cam->usbdev->dev; | ||
1576 | i2c_set_adapdata(&cam->i2c_adapter, cam); | 1577 | i2c_set_adapdata(&cam->i2c_adapter, cam); |
1577 | 1578 | ||
1578 | DBG(6, "Registering I2C adapter with kernel...") | 1579 | DBG(6, "Registering I2C adapter with kernel...") |
diff --git a/drivers/media/video/zoran_card.c b/drivers/media/video/zoran_card.c index 4d1eb2fba34a..73162a3a61dd 100644 --- a/drivers/media/video/zoran_card.c +++ b/drivers/media/video/zoran_card.c | |||
@@ -843,6 +843,7 @@ zoran_register_i2c (struct zoran *zr) | |||
843 | sizeof(I2C_NAME(&zr->i2c_adapter)) - 1); | 843 | sizeof(I2C_NAME(&zr->i2c_adapter)) - 1); |
844 | i2c_set_adapdata(&zr->i2c_adapter, zr); | 844 | i2c_set_adapdata(&zr->i2c_adapter, zr); |
845 | zr->i2c_adapter.algo_data = &zr->i2c_algo; | 845 | zr->i2c_adapter.algo_data = &zr->i2c_algo; |
846 | zr->i2c_adapter.dev.parent = &zr->pci_dev->dev; | ||
846 | return i2c_bit_add_bus(&zr->i2c_adapter); | 847 | return i2c_bit_add_bus(&zr->i2c_adapter); |
847 | } | 848 | } |
848 | 849 | ||
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index e136bae61970..81a1c2e1a3f5 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) | 4 | * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) |
5 | * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) | 5 | * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) |
6 | * Copyright (C) 2004 Sun Microsystems Inc. | 6 | * Copyright (C) 2004 Sun Microsystems Inc. |
7 | * Copyright (C) 2005 Broadcom Corporation. | 7 | * Copyright (C) 2005-2007 Broadcom Corporation. |
8 | * | 8 | * |
9 | * Firmware is: | 9 | * Firmware is: |
10 | * Derived from proprietary unpublished source code, | 10 | * Derived from proprietary unpublished source code, |
@@ -64,8 +64,8 @@ | |||
64 | 64 | ||
65 | #define DRV_MODULE_NAME "tg3" | 65 | #define DRV_MODULE_NAME "tg3" |
66 | #define PFX DRV_MODULE_NAME ": " | 66 | #define PFX DRV_MODULE_NAME ": " |
67 | #define DRV_MODULE_VERSION "3.72" | 67 | #define DRV_MODULE_VERSION "3.73" |
68 | #define DRV_MODULE_RELDATE "January 8, 2007" | 68 | #define DRV_MODULE_RELDATE "February 12, 2007" |
69 | 69 | ||
70 | #define TG3_DEF_MAC_MODE 0 | 70 | #define TG3_DEF_MAC_MODE 0 |
71 | #define TG3_DEF_RX_MODE 0 | 71 | #define TG3_DEF_RX_MODE 0 |
@@ -1175,8 +1175,18 @@ static void tg3_nvram_unlock(struct tg3 *); | |||
1175 | 1175 | ||
1176 | static void tg3_power_down_phy(struct tg3 *tp) | 1176 | static void tg3_power_down_phy(struct tg3 *tp) |
1177 | { | 1177 | { |
1178 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) | 1178 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { |
1179 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { | ||
1180 | u32 sg_dig_ctrl = tr32(SG_DIG_CTRL); | ||
1181 | u32 serdes_cfg = tr32(MAC_SERDES_CFG); | ||
1182 | |||
1183 | sg_dig_ctrl |= | ||
1184 | SG_DIG_USING_HW_AUTONEG | SG_DIG_SOFT_RESET; | ||
1185 | tw32(SG_DIG_CTRL, sg_dig_ctrl); | ||
1186 | tw32(MAC_SERDES_CFG, serdes_cfg | (1 << 15)); | ||
1187 | } | ||
1179 | return; | 1188 | return; |
1189 | } | ||
1180 | 1190 | ||
1181 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { | 1191 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { |
1182 | u32 val; | 1192 | u32 val; |
@@ -1340,7 +1350,8 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state) | |||
1340 | 1350 | ||
1341 | tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | | 1351 | tw32_wait_f(TG3PCI_CLOCK_CTRL, base_val | CLOCK_CTRL_ALTCLK | |
1342 | CLOCK_CTRL_PWRDOWN_PLL133, 40); | 1352 | CLOCK_CTRL_PWRDOWN_PLL133, 40); |
1343 | } else if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { | 1353 | } else if ((tp->tg3_flags2 & TG3_FLG2_5780_CLASS) || |
1354 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)) { | ||
1344 | /* do nothing */ | 1355 | /* do nothing */ |
1345 | } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && | 1356 | } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && |
1346 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { | 1357 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { |
@@ -3724,13 +3735,23 @@ out: | |||
3724 | tg3_full_unlock(tp); | 3735 | tg3_full_unlock(tp); |
3725 | } | 3736 | } |
3726 | 3737 | ||
3738 | static void tg3_dump_short_state(struct tg3 *tp) | ||
3739 | { | ||
3740 | printk(KERN_ERR PFX "DEBUG: MAC_TX_STATUS[%08x] MAC_RX_STATUS[%08x]\n", | ||
3741 | tr32(MAC_TX_STATUS), tr32(MAC_RX_STATUS)); | ||
3742 | printk(KERN_ERR PFX "DEBUG: RDMAC_STATUS[%08x] WDMAC_STATUS[%08x]\n", | ||
3743 | tr32(RDMAC_STATUS), tr32(WDMAC_STATUS)); | ||
3744 | } | ||
3745 | |||
3727 | static void tg3_tx_timeout(struct net_device *dev) | 3746 | static void tg3_tx_timeout(struct net_device *dev) |
3728 | { | 3747 | { |
3729 | struct tg3 *tp = netdev_priv(dev); | 3748 | struct tg3 *tp = netdev_priv(dev); |
3730 | 3749 | ||
3731 | if (netif_msg_tx_err(tp)) | 3750 | if (netif_msg_tx_err(tp)) { |
3732 | printk(KERN_ERR PFX "%s: transmit timed out, resetting\n", | 3751 | printk(KERN_ERR PFX "%s: transmit timed out, resetting\n", |
3733 | dev->name); | 3752 | dev->name); |
3753 | tg3_dump_short_state(tp); | ||
3754 | } | ||
3734 | 3755 | ||
3735 | schedule_work(&tp->reset_task); | 3756 | schedule_work(&tp->reset_task); |
3736 | } | 3757 | } |
@@ -6583,8 +6604,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6583 | u32 tmp; | 6604 | u32 tmp; |
6584 | 6605 | ||
6585 | /* Clear CRC stats. */ | 6606 | /* Clear CRC stats. */ |
6586 | if (!tg3_readphy(tp, 0x1e, &tmp)) { | 6607 | if (!tg3_readphy(tp, MII_TG3_TEST1, &tmp)) { |
6587 | tg3_writephy(tp, 0x1e, tmp | 0x8000); | 6608 | tg3_writephy(tp, MII_TG3_TEST1, |
6609 | tmp | MII_TG3_TEST1_CRC_EN); | ||
6588 | tg3_readphy(tp, 0x14, &tmp); | 6610 | tg3_readphy(tp, 0x14, &tmp); |
6589 | } | 6611 | } |
6590 | } | 6612 | } |
@@ -7408,8 +7430,9 @@ static unsigned long calc_crc_errors(struct tg3 *tp) | |||
7408 | u32 val; | 7430 | u32 val; |
7409 | 7431 | ||
7410 | spin_lock_bh(&tp->lock); | 7432 | spin_lock_bh(&tp->lock); |
7411 | if (!tg3_readphy(tp, 0x1e, &val)) { | 7433 | if (!tg3_readphy(tp, MII_TG3_TEST1, &val)) { |
7412 | tg3_writephy(tp, 0x1e, val | 0x8000); | 7434 | tg3_writephy(tp, MII_TG3_TEST1, |
7435 | val | MII_TG3_TEST1_CRC_EN); | ||
7413 | tg3_readphy(tp, 0x14, &val); | 7436 | tg3_readphy(tp, 0x14, &val); |
7414 | } else | 7437 | } else |
7415 | val = 0; | 7438 | val = 0; |
@@ -10779,7 +10802,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10779 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { | 10802 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { |
10780 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || | 10803 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || |
10781 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) { | 10804 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) { |
10782 | tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG; | 10805 | if (tp->pdev->device != PCI_DEVICE_ID_TIGON3_5756 && |
10806 | tp->pdev->device != PCI_DEVICE_ID_TIGON3_5722) | ||
10807 | tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG; | ||
10783 | if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M) | 10808 | if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M) |
10784 | tp->tg3_flags2 |= TG3_FLG2_PHY_ADJUST_TRIM; | 10809 | tp->tg3_flags2 |= TG3_FLG2_PHY_ADJUST_TRIM; |
10785 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) | 10810 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) |
@@ -11314,6 +11339,7 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
11314 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 || | 11339 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703 || |
11315 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { | 11340 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { |
11316 | u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); | 11341 | u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); |
11342 | u32 read_water = 0x7; | ||
11317 | 11343 | ||
11318 | /* If the 5704 is behind the EPB bridge, we can | 11344 | /* If the 5704 is behind the EPB bridge, we can |
11319 | * do the less restrictive ONE_DMA workaround for | 11345 | * do the less restrictive ONE_DMA workaround for |
@@ -11325,8 +11351,13 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
11325 | else if (ccval == 0x6 || ccval == 0x7) | 11351 | else if (ccval == 0x6 || ccval == 0x7) |
11326 | tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; | 11352 | tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; |
11327 | 11353 | ||
11354 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5703) | ||
11355 | read_water = 4; | ||
11328 | /* Set bit 23 to enable PCIX hw bug fix */ | 11356 | /* Set bit 23 to enable PCIX hw bug fix */ |
11329 | tp->dma_rwctrl |= 0x009f0000; | 11357 | tp->dma_rwctrl |= |
11358 | (read_water << DMA_RWCTRL_READ_WATER_SHIFT) | | ||
11359 | (0x3 << DMA_RWCTRL_WRITE_WATER_SHIFT) | | ||
11360 | (1 << 23); | ||
11330 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { | 11361 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { |
11331 | /* 5780 always in PCIX mode */ | 11362 | /* 5780 always in PCIX mode */ |
11332 | tp->dma_rwctrl |= 0x00144000; | 11363 | tp->dma_rwctrl |= 0x00144000; |
@@ -12016,6 +12047,9 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) | |||
12016 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | 12047 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; |
12017 | tg3_full_unlock(tp); | 12048 | tg3_full_unlock(tp); |
12018 | 12049 | ||
12050 | /* Save MSI address and data for resume. */ | ||
12051 | pci_save_state(pdev); | ||
12052 | |||
12019 | err = tg3_set_power_state(tp, pci_choose_state(pdev, state)); | 12053 | err = tg3_set_power_state(tp, pci_choose_state(pdev, state)); |
12020 | if (err) { | 12054 | if (err) { |
12021 | tg3_full_lock(tp, 0); | 12055 | tg3_full_lock(tp, 0); |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 80f59ac7ec58..45d477e8f374 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -1660,6 +1660,7 @@ | |||
1660 | 1660 | ||
1661 | #define MII_TG3_TEST1 0x1e | 1661 | #define MII_TG3_TEST1 0x1e |
1662 | #define MII_TG3_TEST1_TRIM_EN 0x0010 | 1662 | #define MII_TG3_TEST1_TRIM_EN 0x0010 |
1663 | #define MII_TG3_TEST1_CRC_EN 0x8000 | ||
1663 | 1664 | ||
1664 | /* There are two ways to manage the TX descriptors on the tigon3. | 1665 | /* There are two ways to manage the TX descriptors on the tigon3. |
1665 | * Either the descriptors are in host DMA'able memory, or they | 1666 | * Either the descriptors are in host DMA'able memory, or they |
diff --git a/drivers/rtc/rtc-ds1672.c b/drivers/rtc/rtc-ds1672.c index 205fa28593b7..dfef1637bfb8 100644 --- a/drivers/rtc/rtc-ds1672.c +++ b/drivers/rtc/rtc-ds1672.c | |||
@@ -199,7 +199,7 @@ static int ds1672_probe(struct i2c_adapter *adapter, int address, int kind) | |||
199 | struct i2c_client *client; | 199 | struct i2c_client *client; |
200 | struct rtc_device *rtc; | 200 | struct rtc_device *rtc; |
201 | 201 | ||
202 | dev_dbg(adapter->class_dev.dev, "%s\n", __FUNCTION__); | 202 | dev_dbg(&adapter->dev, "%s\n", __FUNCTION__); |
203 | 203 | ||
204 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { | 204 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { |
205 | err = -ENODEV; | 205 | err = -ENODEV; |
diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c index 038118bbfaea..0242d803ebe5 100644 --- a/drivers/rtc/rtc-pcf8563.c +++ b/drivers/rtc/rtc-pcf8563.c | |||
@@ -279,7 +279,7 @@ static int pcf8563_probe(struct i2c_adapter *adapter, int address, int kind) | |||
279 | 279 | ||
280 | int err = 0; | 280 | int err = 0; |
281 | 281 | ||
282 | dev_dbg(adapter->class_dev.dev, "%s\n", __FUNCTION__); | 282 | dev_dbg(&adapter->dev, "%s\n", __FUNCTION__); |
283 | 283 | ||
284 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { | 284 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { |
285 | err = -ENODEV; | 285 | err = -ENODEV; |
diff --git a/drivers/rtc/rtc-rs5c372.c b/drivers/rtc/rtc-rs5c372.c index e7851e3739ab..09bbe575647b 100644 --- a/drivers/rtc/rtc-rs5c372.c +++ b/drivers/rtc/rtc-rs5c372.c | |||
@@ -499,7 +499,7 @@ static int rs5c372_probe(struct i2c_adapter *adapter, int address, int kind) | |||
499 | struct rs5c372 *rs5c372; | 499 | struct rs5c372 *rs5c372; |
500 | struct rtc_time tm; | 500 | struct rtc_time tm; |
501 | 501 | ||
502 | dev_dbg(adapter->class_dev.dev, "%s\n", __FUNCTION__); | 502 | dev_dbg(&adapter->dev, "%s\n", __FUNCTION__); |
503 | 503 | ||
504 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { | 504 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { |
505 | err = -ENODEV; | 505 | err = -ENODEV; |
diff --git a/drivers/rtc/rtc-x1205.c b/drivers/rtc/rtc-x1205.c index 019ae255b0c8..513d1a611aab 100644 --- a/drivers/rtc/rtc-x1205.c +++ b/drivers/rtc/rtc-x1205.c | |||
@@ -506,7 +506,7 @@ static int x1205_probe(struct i2c_adapter *adapter, int address, int kind) | |||
506 | struct i2c_client *client; | 506 | struct i2c_client *client; |
507 | struct rtc_device *rtc; | 507 | struct rtc_device *rtc; |
508 | 508 | ||
509 | dev_dbg(adapter->class_dev.dev, "%s\n", __FUNCTION__); | 509 | dev_dbg(&adapter->dev, "%s\n", __FUNCTION__); |
510 | 510 | ||
511 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { | 511 | if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) { |
512 | err = -ENODEV; | 512 | err = -ENODEV; |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 5cc6b91f8408..d0edbaacb1f7 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -999,4 +999,14 @@ config SERIAL_NETX_CONSOLE | |||
999 | If you have enabled the serial port on the Motorola IMX | 999 | If you have enabled the serial port on the Motorola IMX |
1000 | CPU you can make it the console by answering Y to this option. | 1000 | CPU you can make it the console by answering Y to this option. |
1001 | 1001 | ||
1002 | config SERIAL_OF_PLATFORM | ||
1003 | tristate "Serial port on Open Firmware platform bus" | ||
1004 | depends on PPC_OF | ||
1005 | depends on SERIAL_8250 | ||
1006 | help | ||
1007 | If you have a PowerPC based system that has serial ports | ||
1008 | on a platform specific bus, you should enable this option. | ||
1009 | Currently, only 8250 compatible ports are supported, but | ||
1010 | others can easily be added. | ||
1011 | |||
1002 | endmenu | 1012 | endmenu |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index df3632cd7df9..f3f82587b5fa 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -58,3 +58,4 @@ obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o | |||
58 | obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o | 58 | obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o |
59 | obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o | 59 | obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o |
60 | obj-$(CONFIG_SERIAL_NETX) += netx-serial.o | 60 | obj-$(CONFIG_SERIAL_NETX) += netx-serial.o |
61 | obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o | ||
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index 3c4b6c243712..955bbd653e22 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -127,8 +127,7 @@ static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id); | |||
127 | 127 | ||
128 | #if defined(CONFIG_PPC_MERGE) | 128 | #if defined(CONFIG_PPC_MERGE) |
129 | static struct of_device_id mpc52xx_uart_of_match[] = { | 129 | static struct of_device_id mpc52xx_uart_of_match[] = { |
130 | { .type = "serial", .compatible = "mpc52xx-psc-uart", }, | 130 | { .type = "serial", .compatible = "mpc5200-psc-uart", }, |
131 | { .type = "serial", .compatible = "mpc5200-psc", }, /* Efika only! */ | ||
132 | {}, | 131 | {}, |
133 | }; | 132 | }; |
134 | #endif | 133 | #endif |
@@ -1068,7 +1067,7 @@ mpc52xx_uart_of_enumerate(void) | |||
1068 | continue; | 1067 | continue; |
1069 | 1068 | ||
1070 | /* Is a particular device number requested? */ | 1069 | /* Is a particular device number requested? */ |
1071 | devno = get_property(np, "device_no", NULL); | 1070 | devno = get_property(np, "port-number", NULL); |
1072 | mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1); | 1071 | mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1); |
1073 | } | 1072 | } |
1074 | 1073 | ||
diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c new file mode 100644 index 000000000000..09b0b736a751 --- /dev/null +++ b/drivers/serial/of_serial.c | |||
@@ -0,0 +1,143 @@ | |||
1 | /* | ||
2 | * Serial Port driver for Open Firmware platform devices | ||
3 | * | ||
4 | * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | */ | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/module.h> | ||
14 | #include <linux/serial_core.h> | ||
15 | #include <linux/serial_8250.h> | ||
16 | |||
17 | #include <asm/of_platform.h> | ||
18 | #include <asm/prom.h> | ||
19 | |||
20 | /* | ||
21 | * Fill a struct uart_port for a given device node | ||
22 | */ | ||
23 | static int __devinit of_platform_serial_setup(struct of_device *ofdev, | ||
24 | int type, struct uart_port *port) | ||
25 | { | ||
26 | struct resource resource; | ||
27 | struct device_node *np = ofdev->node; | ||
28 | const unsigned int *clk, *spd; | ||
29 | int ret; | ||
30 | |||
31 | memset(port, 0, sizeof *port); | ||
32 | spd = get_property(np, "current-speed", NULL); | ||
33 | clk = get_property(np, "clock-frequency", NULL); | ||
34 | if (!clk) { | ||
35 | dev_warn(&ofdev->dev, "no clock-frequency property set\n"); | ||
36 | return -ENODEV; | ||
37 | } | ||
38 | |||
39 | ret = of_address_to_resource(np, 0, &resource); | ||
40 | if (ret) { | ||
41 | dev_warn(&ofdev->dev, "invalid address\n"); | ||
42 | return ret; | ||
43 | } | ||
44 | |||
45 | spin_lock_init(&port->lock); | ||
46 | port->mapbase = resource.start; | ||
47 | port->irq = irq_of_parse_and_map(np, 0); | ||
48 | port->iotype = UPIO_MEM; | ||
49 | port->type = type; | ||
50 | port->uartclk = *clk; | ||
51 | port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP; | ||
52 | port->dev = &ofdev->dev; | ||
53 | port->custom_divisor = *clk / (16 * (*spd)); | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | /* | ||
59 | * Try to register a serial port | ||
60 | */ | ||
61 | static int __devinit of_platform_serial_probe(struct of_device *ofdev, | ||
62 | const struct of_device_id *id) | ||
63 | { | ||
64 | struct uart_port port; | ||
65 | int port_type; | ||
66 | int ret; | ||
67 | |||
68 | if (of_find_property(ofdev->node, "used-by-rtas", NULL)) | ||
69 | return -EBUSY; | ||
70 | |||
71 | port_type = (unsigned long)id->data; | ||
72 | ret = of_platform_serial_setup(ofdev, port_type, &port); | ||
73 | if (ret) | ||
74 | goto out; | ||
75 | |||
76 | switch (port_type) { | ||
77 | case PORT_UNKNOWN: | ||
78 | dev_info(&ofdev->dev, "Unknown serial port found, " | ||
79 | "attempting to use 8250 driver\n"); | ||
80 | /* fallthrough */ | ||
81 | case PORT_8250 ... PORT_MAX_8250: | ||
82 | ret = serial8250_register_port(&port); | ||
83 | break; | ||
84 | default: | ||
85 | /* need to add code for these */ | ||
86 | ret = -ENODEV; | ||
87 | break; | ||
88 | } | ||
89 | if (ret < 0) | ||
90 | goto out; | ||
91 | |||
92 | ofdev->dev.driver_data = (void *)(unsigned long)ret; | ||
93 | return 0; | ||
94 | out: | ||
95 | irq_dispose_mapping(port.irq); | ||
96 | return ret; | ||
97 | } | ||
98 | |||
99 | /* | ||
100 | * Release a line | ||
101 | */ | ||
102 | static int of_platform_serial_remove(struct of_device *ofdev) | ||
103 | { | ||
104 | int line = (unsigned long)ofdev->dev.driver_data; | ||
105 | serial8250_unregister_port(line); | ||
106 | return 0; | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * A few common types, add more as needed. | ||
111 | */ | ||
112 | static struct of_device_id __devinitdata of_platform_serial_table[] = { | ||
113 | { .type = "serial", .compatible = "ns8250", .data = (void *)PORT_8250, }, | ||
114 | { .type = "serial", .compatible = "ns16450", .data = (void *)PORT_16450, }, | ||
115 | { .type = "serial", .compatible = "ns16550", .data = (void *)PORT_16550, }, | ||
116 | { .type = "serial", .compatible = "ns16750", .data = (void *)PORT_16750, }, | ||
117 | { .type = "serial", .data = (void *)PORT_UNKNOWN, }, | ||
118 | { /* end of list */ }, | ||
119 | }; | ||
120 | |||
121 | static struct of_platform_driver __devinitdata of_platform_serial_driver = { | ||
122 | .owner = THIS_MODULE, | ||
123 | .name = "of_serial", | ||
124 | .probe = of_platform_serial_probe, | ||
125 | .remove = of_platform_serial_remove, | ||
126 | .match_table = of_platform_serial_table, | ||
127 | }; | ||
128 | |||
129 | static int __init of_platform_serial_init(void) | ||
130 | { | ||
131 | return of_register_platform_driver(&of_platform_serial_driver); | ||
132 | } | ||
133 | module_init(of_platform_serial_init); | ||
134 | |||
135 | static void __exit of_platform_serial_exit(void) | ||
136 | { | ||
137 | return of_unregister_platform_driver(&of_platform_serial_driver); | ||
138 | }; | ||
139 | module_exit(of_platform_serial_exit); | ||
140 | |||
141 | MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>"); | ||
142 | MODULE_LICENSE("GPL"); | ||
143 | MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices"); | ||
diff --git a/drivers/video/matrox/i2c-matroxfb.c b/drivers/video/matrox/i2c-matroxfb.c index f64c4a0984cd..5ec718a5fe22 100644 --- a/drivers/video/matrox/i2c-matroxfb.c +++ b/drivers/video/matrox/i2c-matroxfb.c | |||
@@ -115,6 +115,7 @@ static int i2c_bus_reg(struct i2c_bit_adapter* b, struct matrox_fb_info* minfo, | |||
115 | minfo->fbcon.node); | 115 | minfo->fbcon.node); |
116 | i2c_set_adapdata(&b->adapter, b); | 116 | i2c_set_adapdata(&b->adapter, b); |
117 | b->adapter.algo_data = &b->bac; | 117 | b->adapter.algo_data = &b->bac; |
118 | b->adapter.dev.parent = &ACCESS_FBINFO(pcidev)->dev; | ||
118 | b->bac = matrox_i2c_algo_template; | 119 | b->bac = matrox_i2c_algo_template; |
119 | b->bac.data = b; | 120 | b->bac.data = b; |
120 | err = i2c_bit_add_bus(&b->adapter); | 121 | err = i2c_bit_add_bus(&b->adapter); |
diff --git a/fs/Kconfig b/fs/Kconfig index 488521ed9e9b..a722b5a3f752 100644 --- a/fs/Kconfig +++ b/fs/Kconfig | |||
@@ -1864,20 +1864,14 @@ config CIFS | |||
1864 | file servers such as Windows 2000 (including Windows 2003, NT 4 | 1864 | file servers such as Windows 2000 (including Windows 2003, NT 4 |
1865 | and Windows XP) as well by Samba (which provides excellent CIFS | 1865 | and Windows XP) as well by Samba (which provides excellent CIFS |
1866 | server support for Linux and many other operating systems). Limited | 1866 | server support for Linux and many other operating systems). Limited |
1867 | support for Windows ME and similar servers is provided as well. | 1867 | support for OS/2 and Windows ME and similar servers is provided as well. |
1868 | You must use the smbfs client filesystem to access older SMB servers | ||
1869 | such as OS/2 and DOS. | ||
1870 | 1868 | ||
1871 | The intent of the cifs module is to provide an advanced | 1869 | The intent of the cifs module is to provide an advanced |
1872 | network file system client for mounting to CIFS compliant servers, | 1870 | network file system client for mounting to CIFS compliant servers, |
1873 | including support for dfs (hierarchical name space), secure per-user | 1871 | including support for dfs (hierarchical name space), secure per-user |
1874 | session establishment, safe distributed caching (oplock), optional | 1872 | session establishment, safe distributed caching (oplock), optional |
1875 | packet signing, Unicode and other internationalization improvements, | 1873 | packet signing, Unicode and other internationalization improvements. |
1876 | and optional Winbind (nsswitch) integration. You do not need to enable | 1874 | If you need to mount to Samba or Windows from this machine, say Y. |
1877 | cifs if running only a (Samba) server. It is possible to enable both | ||
1878 | smbfs and cifs (e.g. if you are using CIFS for accessing Windows 2003 | ||
1879 | and Samba 3 servers, and smbfs for accessing old servers). If you need | ||
1880 | to mount to Samba or Windows from this machine, say Y. | ||
1881 | 1875 | ||
1882 | config CIFS_STATS | 1876 | config CIFS_STATS |
1883 | bool "CIFS statistics" | 1877 | bool "CIFS statistics" |
@@ -1970,14 +1964,13 @@ config CIFS_EXPERIMENTAL | |||
1970 | depends on CIFS && EXPERIMENTAL | 1964 | depends on CIFS && EXPERIMENTAL |
1971 | help | 1965 | help |
1972 | Enables cifs features under testing. These features are | 1966 | Enables cifs features under testing. These features are |
1973 | experimental and currently include support for writepages | 1967 | experimental and currently include DFS support and directory |
1974 | (multipage writebehind performance improvements) and directory | 1968 | change notification ie fcntl(F_DNOTIFY), as well as the upcall |
1975 | change notification ie fcntl(F_DNOTIFY) as well as some security | 1969 | mechanism which will be used for Kerberos session negotiation |
1976 | improvements. Some also depend on setting at runtime the | 1970 | and uid remapping. Some of these features also may depend on |
1977 | pseudo-file /proc/fs/cifs/Experimental (which is disabled by | 1971 | setting a value of 1 to the pseudo-file /proc/fs/cifs/Experimental |
1978 | default). See the file fs/cifs/README for more details. | 1972 | (which is disabled by default). See the file fs/cifs/README |
1979 | 1973 | for more details. If unsure, say N. | |
1980 | If unsure, say N. | ||
1981 | 1974 | ||
1982 | config CIFS_UPCALL | 1975 | config CIFS_UPCALL |
1983 | bool "Kerberos/SPNEGO advanced session setup (EXPERIMENTAL)" | 1976 | bool "Kerberos/SPNEGO advanced session setup (EXPERIMENTAL)" |
diff --git a/fs/cifs/CHANGES b/fs/cifs/CHANGES index 85e3850bf2c9..5fe13593b57f 100644 --- a/fs/cifs/CHANGES +++ b/fs/cifs/CHANGES | |||
@@ -1,8 +1,15 @@ | |||
1 | Version 1.47 | 1 | Version 1.47 |
2 | ------------ | 2 | ------------ |
3 | Fix oops in list_del during mount caused by unaligned string. | 3 | Fix oops in list_del during mount caused by unaligned string. |
4 | Fix file corruption which could occur on some large file | ||
5 | copies caused by writepages page i/o completion bug. | ||
4 | Seek to SEEK_END forces check for update of file size for non-cached | 6 | Seek to SEEK_END forces check for update of file size for non-cached |
5 | files. | 7 | files. Allow file size to be updated on remote extend of locally open, |
8 | non-cached file. Fix reconnect to newer Samba servers (or other servers | ||
9 | which support the CIFS Unix/POSIX extensions) so that we again tell the | ||
10 | server the Unix/POSIX cifs capabilities which we support (SetFSInfo). | ||
11 | Add experimental support for new POSIX Open/Mkdir (which returns | ||
12 | stat information on the open, and allows setting the mode). | ||
6 | 13 | ||
7 | Version 1.46 | 14 | Version 1.46 |
8 | ------------ | 15 | ------------ |
diff --git a/fs/cifs/TODO b/fs/cifs/TODO index fc34c74ec4be..68372946dc92 100644 --- a/fs/cifs/TODO +++ b/fs/cifs/TODO | |||
@@ -128,3 +128,11 @@ negotiated size) and send larger write sizes to modern servers. | |||
128 | 128 | ||
129 | 4) More exhaustively test against less common servers. More testing | 129 | 4) More exhaustively test against less common servers. More testing |
130 | against Windows 9x, Windows ME servers. | 130 | against Windows 9x, Windows ME servers. |
131 | |||
132 | DOS attrs - returned as pseudo-xattr in Samba format (check VFAT and NTFS for this too) | ||
133 | |||
134 | mount check for unmatched uids - and uid override | ||
135 | |||
136 | Add mount option for Linux extension disable per mount, and partial disable per mount (uid off, symlink/fifo/mknod on but what about posix acls?) | ||
137 | |||
138 | Free threads at umount --force that are stuck on the sesSem | ||
diff --git a/fs/cifs/cifsfs.h b/fs/cifs/cifsfs.h index 01ae24af9cfd..c97c08eb481a 100644 --- a/fs/cifs/cifsfs.h +++ b/fs/cifs/cifsfs.h | |||
@@ -100,5 +100,5 @@ extern ssize_t cifs_getxattr(struct dentry *, const char *, void *, size_t); | |||
100 | extern ssize_t cifs_listxattr(struct dentry *, char *, size_t); | 100 | extern ssize_t cifs_listxattr(struct dentry *, char *, size_t); |
101 | extern int cifs_ioctl (struct inode * inode, struct file * filep, | 101 | extern int cifs_ioctl (struct inode * inode, struct file * filep, |
102 | unsigned int command, unsigned long arg); | 102 | unsigned int command, unsigned long arg); |
103 | #define CIFS_VERSION "1.47" | 103 | #define CIFS_VERSION "1.48" |
104 | #endif /* _CIFSFS_H */ | 104 | #endif /* _CIFSFS_H */ |
diff --git a/fs/cifs/cifspdu.h b/fs/cifs/cifspdu.h index 068ef51edbf7..7d9505491b16 100644 --- a/fs/cifs/cifspdu.h +++ b/fs/cifs/cifspdu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * fs/cifs/cifspdu.h | 2 | * fs/cifs/cifspdu.h |
3 | * | 3 | * |
4 | * Copyright (c) International Business Machines Corp., 2002,2005 | 4 | * Copyright (c) International Business Machines Corp., 2002,2007 |
5 | * Author(s): Steve French (sfrench@us.ibm.com) | 5 | * Author(s): Steve French (sfrench@us.ibm.com) |
6 | * | 6 | * |
7 | * This library is free software; you can redistribute it and/or modify | 7 | * This library is free software; you can redistribute it and/or modify |
@@ -544,7 +544,8 @@ typedef union smb_com_session_setup_andx { | |||
544 | /* unsigned char * NativeOS; */ | 544 | /* unsigned char * NativeOS; */ |
545 | /* unsigned char * NativeLanMan; */ | 545 | /* unsigned char * NativeLanMan; */ |
546 | /* unsigned char * PrimaryDomain; */ | 546 | /* unsigned char * PrimaryDomain; */ |
547 | } __attribute__((packed)) resp; /* NTLM response with or without extended sec*/ | 547 | } __attribute__((packed)) resp; /* NTLM response |
548 | (with or without extended sec) */ | ||
548 | 549 | ||
549 | struct { /* request format */ | 550 | struct { /* request format */ |
550 | struct smb_hdr hdr; /* wct = 10 */ | 551 | struct smb_hdr hdr; /* wct = 10 */ |
@@ -795,6 +796,8 @@ typedef struct smb_com_openx_rsp { | |||
795 | __u16 ByteCount; | 796 | __u16 ByteCount; |
796 | } __attribute__((packed)) OPENX_RSP; | 797 | } __attribute__((packed)) OPENX_RSP; |
797 | 798 | ||
799 | /* For encoding of POSIX Open Request - see trans2 function 0x209 data struct */ | ||
800 | |||
798 | /* Legacy write request for older servers */ | 801 | /* Legacy write request for older servers */ |
799 | typedef struct smb_com_writex_req { | 802 | typedef struct smb_com_writex_req { |
800 | struct smb_hdr hdr; /* wct = 12 */ | 803 | struct smb_hdr hdr; /* wct = 12 */ |
@@ -1352,11 +1355,13 @@ struct smb_t2_rsp { | |||
1352 | #define SMB_QUERY_FILE_UNIX_BASIC 0x200 | 1355 | #define SMB_QUERY_FILE_UNIX_BASIC 0x200 |
1353 | #define SMB_QUERY_FILE_UNIX_LINK 0x201 | 1356 | #define SMB_QUERY_FILE_UNIX_LINK 0x201 |
1354 | #define SMB_QUERY_POSIX_ACL 0x204 | 1357 | #define SMB_QUERY_POSIX_ACL 0x204 |
1355 | #define SMB_QUERY_XATTR 0x205 | 1358 | #define SMB_QUERY_XATTR 0x205 /* e.g. system EA name space */ |
1356 | #define SMB_QUERY_ATTR_FLAGS 0x206 /* append,immutable etc. */ | 1359 | #define SMB_QUERY_ATTR_FLAGS 0x206 /* append,immutable etc. */ |
1357 | #define SMB_QUERY_POSIX_PERMISSION 0x207 | 1360 | #define SMB_QUERY_POSIX_PERMISSION 0x207 |
1358 | #define SMB_QUERY_POSIX_LOCK 0x208 | 1361 | #define SMB_QUERY_POSIX_LOCK 0x208 |
1359 | /* #define SMB_POSIX_OPEN 0x209 */ | 1362 | /* #define SMB_POSIX_OPEN 0x209 */ |
1363 | /* #define SMB_POSIX_UNLINK 0x20a */ | ||
1364 | #define SMB_QUERY_FILE__UNIX_INFO2 0x20b | ||
1360 | #define SMB_QUERY_FILE_INTERNAL_INFO 0x3ee | 1365 | #define SMB_QUERY_FILE_INTERNAL_INFO 0x3ee |
1361 | #define SMB_QUERY_FILE_ACCESS_INFO 0x3f0 | 1366 | #define SMB_QUERY_FILE_ACCESS_INFO 0x3f0 |
1362 | #define SMB_QUERY_FILE_NAME_INFO2 0x3f1 /* 0x30 bytes */ | 1367 | #define SMB_QUERY_FILE_NAME_INFO2 0x3f1 /* 0x30 bytes */ |
@@ -1377,8 +1382,10 @@ struct smb_t2_rsp { | |||
1377 | #define SMB_SET_ATTR_FLAGS 0x206 /* append, immutable etc. */ | 1382 | #define SMB_SET_ATTR_FLAGS 0x206 /* append, immutable etc. */ |
1378 | #define SMB_SET_POSIX_LOCK 0x208 | 1383 | #define SMB_SET_POSIX_LOCK 0x208 |
1379 | #define SMB_POSIX_OPEN 0x209 | 1384 | #define SMB_POSIX_OPEN 0x209 |
1385 | #define SMB_POSIX_UNLINK 0x20a | ||
1386 | #define SMB_SET_FILE_UNIX_INFO2 | ||
1380 | #define SMB_SET_FILE_BASIC_INFO2 0x3ec | 1387 | #define SMB_SET_FILE_BASIC_INFO2 0x3ec |
1381 | #define SMB_SET_FILE_RENAME_INFORMATION 0x3f2 /* BB check if qpathinfo level too */ | 1388 | #define SMB_SET_FILE_RENAME_INFORMATION 0x3f2 /* BB check if qpathinfo too */ |
1382 | #define SMB_FILE_ALL_INFO2 0x3fa | 1389 | #define SMB_FILE_ALL_INFO2 0x3fa |
1383 | #define SMB_SET_FILE_ALLOCATION_INFO2 0x3fb | 1390 | #define SMB_SET_FILE_ALLOCATION_INFO2 0x3fb |
1384 | #define SMB_SET_FILE_END_OF_FILE_INFO2 0x3fc | 1391 | #define SMB_SET_FILE_END_OF_FILE_INFO2 0x3fc |
@@ -1428,7 +1435,7 @@ typedef struct smb_com_transaction2_qpi_rsp { | |||
1428 | struct smb_hdr hdr; /* wct = 10 + SetupCount */ | 1435 | struct smb_hdr hdr; /* wct = 10 + SetupCount */ |
1429 | struct trans2_resp t2; | 1436 | struct trans2_resp t2; |
1430 | __u16 ByteCount; | 1437 | __u16 ByteCount; |
1431 | __u16 Reserved2; /* parameter word reserved - present for infolevels > 100 */ | 1438 | __u16 Reserved2; /* parameter word is present for infolevels > 100 */ |
1432 | } __attribute__((packed)) TRANSACTION2_QPI_RSP; | 1439 | } __attribute__((packed)) TRANSACTION2_QPI_RSP; |
1433 | 1440 | ||
1434 | typedef struct smb_com_transaction2_spi_req { | 1441 | typedef struct smb_com_transaction2_spi_req { |
@@ -1461,7 +1468,7 @@ typedef struct smb_com_transaction2_spi_rsp { | |||
1461 | struct smb_hdr hdr; /* wct = 10 + SetupCount */ | 1468 | struct smb_hdr hdr; /* wct = 10 + SetupCount */ |
1462 | struct trans2_resp t2; | 1469 | struct trans2_resp t2; |
1463 | __u16 ByteCount; | 1470 | __u16 ByteCount; |
1464 | __u16 Reserved2; /* parameter word reserved - present for infolevels > 100 */ | 1471 | __u16 Reserved2; /* parameter word is present for infolevels > 100 */ |
1465 | } __attribute__((packed)) TRANSACTION2_SPI_RSP; | 1472 | } __attribute__((packed)) TRANSACTION2_SPI_RSP; |
1466 | 1473 | ||
1467 | struct set_file_rename { | 1474 | struct set_file_rename { |
@@ -1627,6 +1634,7 @@ typedef struct smb_com_transaction2_fnext_rsp_parms { | |||
1627 | #define SMB_QUERY_FS_ATTRIBUTE_INFO 0x105 | 1634 | #define SMB_QUERY_FS_ATTRIBUTE_INFO 0x105 |
1628 | #define SMB_QUERY_CIFS_UNIX_INFO 0x200 | 1635 | #define SMB_QUERY_CIFS_UNIX_INFO 0x200 |
1629 | #define SMB_QUERY_POSIX_FS_INFO 0x201 | 1636 | #define SMB_QUERY_POSIX_FS_INFO 0x201 |
1637 | #define SMB_QUERY_POSIX_WHO_AM_I 0x202 | ||
1630 | #define SMB_QUERY_LABEL_INFO 0x3ea | 1638 | #define SMB_QUERY_LABEL_INFO 0x3ea |
1631 | #define SMB_QUERY_FS_QUOTA_INFO 0x3ee | 1639 | #define SMB_QUERY_FS_QUOTA_INFO 0x3ee |
1632 | #define SMB_QUERY_FS_FULL_SIZE_INFO 0x3ef | 1640 | #define SMB_QUERY_FS_FULL_SIZE_INFO 0x3ef |
@@ -1659,9 +1667,21 @@ typedef struct smb_com_transaction_qfsi_rsp { | |||
1659 | struct smb_hdr hdr; /* wct = 10 + SetupCount */ | 1667 | struct smb_hdr hdr; /* wct = 10 + SetupCount */ |
1660 | struct trans2_resp t2; | 1668 | struct trans2_resp t2; |
1661 | __u16 ByteCount; | 1669 | __u16 ByteCount; |
1662 | __u8 Pad; /* may be three bytes *//* followed by data area */ | 1670 | __u8 Pad; /* may be three bytes? *//* followed by data area */ |
1663 | } __attribute__((packed)) TRANSACTION2_QFSI_RSP; | 1671 | } __attribute__((packed)) TRANSACTION2_QFSI_RSP; |
1664 | 1672 | ||
1673 | typedef struct whoami_rsp_data { /* Query level 0x202 */ | ||
1674 | __u32 flags; /* 0 = Authenticated user 1 = GUEST */ | ||
1675 | __u32 mask; /* which flags bits server understands ie 0x0001 */ | ||
1676 | __u64 unix_user_id; | ||
1677 | __u64 unix_user_gid; | ||
1678 | __u32 number_of_supplementary_gids; /* may be zero */ | ||
1679 | __u32 number_of_sids; /* may be zero */ | ||
1680 | __u32 length_of_sid_array; /* in bytes - may be zero */ | ||
1681 | __u32 pad; /* reserved - MBZ */ | ||
1682 | /* __u64 gid_array[0]; */ /* may be empty */ | ||
1683 | /* __u8 * psid_list */ /* may be empty */ | ||
1684 | } __attribute__((packed)) WHOAMI_RSP_DATA; | ||
1665 | 1685 | ||
1666 | /* SETFSInfo Levels */ | 1686 | /* SETFSInfo Levels */ |
1667 | #define SMB_SET_CIFS_UNIX_INFO 0x200 | 1687 | #define SMB_SET_CIFS_UNIX_INFO 0x200 |
@@ -1858,8 +1878,11 @@ typedef struct { | |||
1858 | #define CIFS_UNIX_XATTR_CAP 0x00000004 /* support new namespace */ | 1878 | #define CIFS_UNIX_XATTR_CAP 0x00000004 /* support new namespace */ |
1859 | #define CIFS_UNIX_EXTATTR_CAP 0x00000008 /* support chattr/chflag */ | 1879 | #define CIFS_UNIX_EXTATTR_CAP 0x00000008 /* support chattr/chflag */ |
1860 | #define CIFS_UNIX_POSIX_PATHNAMES_CAP 0x00000010 /* Allow POSIX path chars */ | 1880 | #define CIFS_UNIX_POSIX_PATHNAMES_CAP 0x00000010 /* Allow POSIX path chars */ |
1881 | #define CIFS_UNIX_POSIX_PATH_OPS_CAP 0x00000020 /* Allow new POSIX path based | ||
1882 | calls including posix open | ||
1883 | and posix unlink */ | ||
1861 | #ifdef CONFIG_CIFS_POSIX | 1884 | #ifdef CONFIG_CIFS_POSIX |
1862 | #define CIFS_UNIX_CAP_MASK 0x0000001b | 1885 | #define CIFS_UNIX_CAP_MASK 0x0000003b |
1863 | #else | 1886 | #else |
1864 | #define CIFS_UNIX_CAP_MASK 0x00000013 | 1887 | #define CIFS_UNIX_CAP_MASK 0x00000013 |
1865 | #endif /* CONFIG_CIFS_POSIX */ | 1888 | #endif /* CONFIG_CIFS_POSIX */ |
@@ -1946,7 +1969,7 @@ typedef struct { /* data block encoding of response to level 263 QPathInfo */ | |||
1946 | __le32 AlignmentRequirement; | 1969 | __le32 AlignmentRequirement; |
1947 | __le32 FileNameLength; | 1970 | __le32 FileNameLength; |
1948 | char FileName[1]; | 1971 | char FileName[1]; |
1949 | } __attribute__((packed)) FILE_ALL_INFO; /* level 0x107 QPathInfo */ | 1972 | } __attribute__((packed)) FILE_ALL_INFO; /* level 0x107 QPathInfo */ |
1950 | 1973 | ||
1951 | /* defines for enumerating possible values of the Unix type field below */ | 1974 | /* defines for enumerating possible values of the Unix type field below */ |
1952 | #define UNIX_FILE 0 | 1975 | #define UNIX_FILE 0 |
@@ -1970,11 +1993,11 @@ typedef struct { | |||
1970 | __u64 UniqueId; | 1993 | __u64 UniqueId; |
1971 | __le64 Permissions; | 1994 | __le64 Permissions; |
1972 | __le64 Nlinks; | 1995 | __le64 Nlinks; |
1973 | } __attribute__((packed)) FILE_UNIX_BASIC_INFO; /* level 0x200 QPathInfo */ | 1996 | } __attribute__((packed)) FILE_UNIX_BASIC_INFO; /* level 0x200 QPathInfo */ |
1974 | 1997 | ||
1975 | typedef struct { | 1998 | typedef struct { |
1976 | char LinkDest[1]; | 1999 | char LinkDest[1]; |
1977 | } __attribute__((packed)) FILE_UNIX_LINK_INFO; /* level 0x201 QPathInfo */ | 2000 | } __attribute__((packed)) FILE_UNIX_LINK_INFO; /* level 0x201 QPathInfo */ |
1978 | 2001 | ||
1979 | /* The following three structures are needed only for | 2002 | /* The following three structures are needed only for |
1980 | setting time to NT4 and some older servers via | 2003 | setting time to NT4 and some older servers via |
@@ -2011,7 +2034,7 @@ typedef struct { | |||
2011 | __le64 ChangeTime; | 2034 | __le64 ChangeTime; |
2012 | __le32 Attributes; | 2035 | __le32 Attributes; |
2013 | __u32 Pad; | 2036 | __u32 Pad; |
2014 | } __attribute__((packed)) FILE_BASIC_INFO; /* size info, level 0x101 */ | 2037 | } __attribute__((packed)) FILE_BASIC_INFO; /* size info, level 0x101 */ |
2015 | 2038 | ||
2016 | struct file_allocation_info { | 2039 | struct file_allocation_info { |
2017 | __le64 AllocationSize; /* Note old Samba srvr rounds this up too much */ | 2040 | __le64 AllocationSize; /* Note old Samba srvr rounds this up too much */ |
@@ -2020,7 +2043,7 @@ struct file_allocation_info { | |||
2020 | 2043 | ||
2021 | struct file_end_of_file_info { | 2044 | struct file_end_of_file_info { |
2022 | __le64 FileSize; /* offset to end of file */ | 2045 | __le64 FileSize; /* offset to end of file */ |
2023 | } __attribute__((packed)); /* size info, level 0x104 for set, 0x106 for query */ | 2046 | } __attribute__((packed)); /* size info, level 0x104 for set, 0x106 for query */ |
2024 | 2047 | ||
2025 | struct file_alt_name_info { | 2048 | struct file_alt_name_info { |
2026 | __u8 alt_name[1]; | 2049 | __u8 alt_name[1]; |
@@ -2075,6 +2098,19 @@ struct cifs_posix_acl { /* access conrol list (ACL) */ | |||
2075 | 2098 | ||
2076 | /* end of POSIX ACL definitions */ | 2099 | /* end of POSIX ACL definitions */ |
2077 | 2100 | ||
2101 | typedef struct { | ||
2102 | __u32 OpenFlags; /* same as NT CreateX */ | ||
2103 | __u32 PosixOpenFlags; | ||
2104 | __u32 Mode; | ||
2105 | __u16 Level; /* reply level requested (see QPathInfo levels) */ | ||
2106 | __u16 Pad; /* reserved - MBZ */ | ||
2107 | } __attribute__((packed)) OPEN_PSX_REQ; /* level 0x209 SetPathInfo data */ | ||
2108 | |||
2109 | typedef struct { | ||
2110 | /* reply varies based on requested level */ | ||
2111 | } __attribute__((packed)) OPEN_PSX_RSP; /* level 0x209 SetPathInfo data */ | ||
2112 | |||
2113 | |||
2078 | struct file_internal_info { | 2114 | struct file_internal_info { |
2079 | __u64 UniqueId; /* inode number */ | 2115 | __u64 UniqueId; /* inode number */ |
2080 | } __attribute__((packed)); /* level 0x3ee */ | 2116 | } __attribute__((packed)); /* level 0x3ee */ |
@@ -2238,7 +2274,8 @@ struct data_blob { | |||
2238 | 1) PosixCreateX - to set and return the mode, inode#, device info and | 2274 | 1) PosixCreateX - to set and return the mode, inode#, device info and |
2239 | perhaps add a CreateDevice - to create Pipes and other special .inodes | 2275 | perhaps add a CreateDevice - to create Pipes and other special .inodes |
2240 | Also note POSIX open flags | 2276 | Also note POSIX open flags |
2241 | 2) Close - to return the last write time to do cache across close more safely | 2277 | 2) Close - to return the last write time to do cache across close |
2278 | more safely | ||
2242 | 3) FindFirst return unique inode number - what about resume key, two | 2279 | 3) FindFirst return unique inode number - what about resume key, two |
2243 | forms short (matches readdir) and full (enough info to cache inodes) | 2280 | forms short (matches readdir) and full (enough info to cache inodes) |
2244 | 4) Mkdir - set mode | 2281 | 4) Mkdir - set mode |
@@ -2273,7 +2310,8 @@ struct data_blob { | |||
2273 | TRANSACTION2 (18 cases) | 2310 | TRANSACTION2 (18 cases) |
2274 | SMB_SET_FILE_END_OF_FILE_INFO2 SMB_SET_PATH_END_OF_FILE_INFO2 | 2311 | SMB_SET_FILE_END_OF_FILE_INFO2 SMB_SET_PATH_END_OF_FILE_INFO2 |
2275 | (BB verify that never need to set allocation size) | 2312 | (BB verify that never need to set allocation size) |
2276 | SMB_SET_FILE_BASIC_INFO2 (setting times - BB can it be done via Unix ext?) | 2313 | SMB_SET_FILE_BASIC_INFO2 (setting times - BB can it be done via |
2314 | Unix ext?) | ||
2277 | 2315 | ||
2278 | COPY (note support for copy across directories) - FUTURE, OPTIONAL | 2316 | COPY (note support for copy across directories) - FUTURE, OPTIONAL |
2279 | setting/getting OS/2 EAs - FUTURE (BB can this handle | 2317 | setting/getting OS/2 EAs - FUTURE (BB can this handle |
@@ -2293,13 +2331,13 @@ struct data_blob { | |||
2293 | T2 QUERY_PATH_INFO (SMB_QUERY_FILE_UNIX_BASIC) - BB check for missing inode fields | 2331 | T2 QUERY_PATH_INFO (SMB_QUERY_FILE_UNIX_BASIC) - BB check for missing inode fields |
2294 | Actually need QUERY_FILE_UNIX_INFO since has inode num | 2332 | Actually need QUERY_FILE_UNIX_INFO since has inode num |
2295 | BB what about a) blksize/blkbits/blocks | 2333 | BB what about a) blksize/blkbits/blocks |
2296 | b) i_version | 2334 | b) i_version |
2297 | c) i_rdev | 2335 | c) i_rdev |
2298 | d) notify mask? | 2336 | d) notify mask? |
2299 | e) generation | 2337 | e) generation |
2300 | f) size_seqcount | 2338 | f) size_seqcount |
2301 | T2 FIND_FIRST/FIND_NEXT FIND_FILE_UNIX | 2339 | T2 FIND_FIRST/FIND_NEXT FIND_FILE_UNIX |
2302 | TRANS2_GET_DFS_REFERRAL - OPTIONAL but recommended | 2340 | TRANS2_GET_DFS_REFERRAL - OPTIONAL but recommended |
2303 | T2_QFS_INFO QueryDevice/AttributeInfo - OPTIONAL | 2341 | T2_QFS_INFO QueryDevice/AttributeInfo - OPTIONAL |
2304 | 2342 | ||
2305 | 2343 | ||
@@ -2338,7 +2376,7 @@ typedef struct file_xattr_info { | |||
2338 | __u32 xattr_value_len; | 2376 | __u32 xattr_value_len; |
2339 | char xattr_name[0]; | 2377 | char xattr_name[0]; |
2340 | /* followed by xattr_value[xattr_value_len], no pad */ | 2378 | /* followed by xattr_value[xattr_value_len], no pad */ |
2341 | } __attribute__((packed)) FILE_XATTR_INFO; /* extended attribute, info level 0x205 */ | 2379 | } __attribute__((packed)) FILE_XATTR_INFO; /* extended attribute, info level 0x205 */ |
2342 | 2380 | ||
2343 | 2381 | ||
2344 | /* flags for chattr command */ | 2382 | /* flags for chattr command */ |
diff --git a/fs/cifs/cifsproto.h b/fs/cifs/cifsproto.h index f1f8225102f0..6148b82170c4 100644 --- a/fs/cifs/cifsproto.h +++ b/fs/cifs/cifsproto.h | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/nls.h> | 23 | #include <linux/nls.h> |
24 | 24 | ||
25 | struct statfs; | 25 | struct statfs; |
26 | struct smb_vol; | ||
26 | 27 | ||
27 | /* | 28 | /* |
28 | ***************************************************************** | 29 | ***************************************************************** |
@@ -57,7 +58,7 @@ extern int SendReceiveBlockingLock(const unsigned int /* xid */ , | |||
57 | int * /* bytes returned */); | 58 | int * /* bytes returned */); |
58 | extern int checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length); | 59 | extern int checkSMB(struct smb_hdr *smb, __u16 mid, unsigned int length); |
59 | extern int is_valid_oplock_break(struct smb_hdr *smb, struct TCP_Server_Info *); | 60 | extern int is_valid_oplock_break(struct smb_hdr *smb, struct TCP_Server_Info *); |
60 | extern int is_size_safe_to_change(struct cifsInodeInfo *); | 61 | extern int is_size_safe_to_change(struct cifsInodeInfo *, __u64 eof); |
61 | extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *); | 62 | extern struct cifsFileInfo *find_writable_file(struct cifsInodeInfo *); |
62 | extern unsigned int smbCalcSize(struct smb_hdr *ptr); | 63 | extern unsigned int smbCalcSize(struct smb_hdr *ptr); |
63 | extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr); | 64 | extern unsigned int smbCalcSize_LE(struct smb_hdr *ptr); |
@@ -147,6 +148,8 @@ extern int get_dfs_path(int xid, struct cifsSesInfo *pSesInfo, | |||
147 | unsigned int *pnum_referrals, | 148 | unsigned int *pnum_referrals, |
148 | unsigned char ** preferrals, | 149 | unsigned char ** preferrals, |
149 | int remap); | 150 | int remap); |
151 | extern void reset_cifs_unix_caps(int xid, struct cifsTconInfo *tcon, | ||
152 | struct super_block * sb, struct smb_vol * vol); | ||
150 | extern int CIFSSMBQFSInfo(const int xid, struct cifsTconInfo *tcon, | 153 | extern int CIFSSMBQFSInfo(const int xid, struct cifsTconInfo *tcon, |
151 | struct kstatfs *FSData); | 154 | struct kstatfs *FSData); |
152 | extern int SMBOldQFSInfo(const int xid, struct cifsTconInfo *tcon, | 155 | extern int SMBOldQFSInfo(const int xid, struct cifsTconInfo *tcon, |
diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c index 472e33e0f3cf..b8e91470c27f 100644 --- a/fs/cifs/cifssmb.c +++ b/fs/cifs/cifssmb.c | |||
@@ -158,9 +158,15 @@ small_smb_init(int smb_command, int wct, struct cifsTconInfo *tcon, | |||
158 | nls_codepage); | 158 | nls_codepage); |
159 | if(!rc && (tcon->tidStatus == CifsNeedReconnect)) { | 159 | if(!rc && (tcon->tidStatus == CifsNeedReconnect)) { |
160 | mark_open_files_invalid(tcon); | 160 | mark_open_files_invalid(tcon); |
161 | rc = CIFSTCon(0, tcon->ses, tcon->treeName, tcon | 161 | rc = CIFSTCon(0, tcon->ses, tcon->treeName, |
162 | , nls_codepage); | 162 | tcon, nls_codepage); |
163 | up(&tcon->ses->sesSem); | 163 | up(&tcon->ses->sesSem); |
164 | /* tell server which Unix caps we support */ | ||
165 | if (tcon->ses->capabilities & CAP_UNIX) | ||
166 | reset_cifs_unix_caps(0 /* no xid */, | ||
167 | tcon, | ||
168 | NULL /* we do not know sb */, | ||
169 | NULL /* no vol info */); | ||
164 | /* BB FIXME add code to check if wsize needs | 170 | /* BB FIXME add code to check if wsize needs |
165 | update due to negotiated smb buffer size | 171 | update due to negotiated smb buffer size |
166 | shrinking */ | 172 | shrinking */ |
@@ -298,6 +304,12 @@ smb_init(int smb_command, int wct, struct cifsTconInfo *tcon, | |||
298 | rc = CIFSTCon(0, tcon->ses, tcon->treeName, | 304 | rc = CIFSTCon(0, tcon->ses, tcon->treeName, |
299 | tcon, nls_codepage); | 305 | tcon, nls_codepage); |
300 | up(&tcon->ses->sesSem); | 306 | up(&tcon->ses->sesSem); |
307 | /* tell server which Unix caps we support */ | ||
308 | if (tcon->ses->capabilities & CAP_UNIX) | ||
309 | reset_cifs_unix_caps(0 /* no xid */, | ||
310 | tcon, | ||
311 | NULL /* do not know sb */, | ||
312 | NULL /* no vol info */); | ||
301 | /* BB FIXME add code to check if wsize needs | 313 | /* BB FIXME add code to check if wsize needs |
302 | update due to negotiated smb buffer size | 314 | update due to negotiated smb buffer size |
303 | shrinking */ | 315 | shrinking */ |
diff --git a/fs/cifs/connect.c b/fs/cifs/connect.c index 2caca06b4bae..20ba7dcc9959 100644 --- a/fs/cifs/connect.c +++ b/fs/cifs/connect.c | |||
@@ -1613,6 +1613,76 @@ ipv6_connect(struct sockaddr_in6 *psin_server, struct socket **csocket) | |||
1613 | return rc; | 1613 | return rc; |
1614 | } | 1614 | } |
1615 | 1615 | ||
1616 | void reset_cifs_unix_caps(int xid, struct cifsTconInfo * tcon, | ||
1617 | struct super_block * sb, struct smb_vol * vol_info) | ||
1618 | { | ||
1619 | /* if we are reconnecting then should we check to see if | ||
1620 | * any requested capabilities changed locally e.g. via | ||
1621 | * remount but we can not do much about it here | ||
1622 | * if they have (even if we could detect it by the following) | ||
1623 | * Perhaps we could add a backpointer to array of sb from tcon | ||
1624 | * or if we change to make all sb to same share the same | ||
1625 | * sb as NFS - then we only have one backpointer to sb. | ||
1626 | * What if we wanted to mount the server share twice once with | ||
1627 | * and once without posixacls or posix paths? */ | ||
1628 | __u64 saved_cap = le64_to_cpu(tcon->fsUnixInfo.Capability); | ||
1629 | |||
1630 | |||
1631 | if(!CIFSSMBQFSUnixInfo(xid, tcon)) { | ||
1632 | __u64 cap = le64_to_cpu(tcon->fsUnixInfo.Capability); | ||
1633 | |||
1634 | /* check for reconnect case in which we do not | ||
1635 | want to change the mount behavior if we can avoid it */ | ||
1636 | if(vol_info == NULL) { | ||
1637 | /* turn off POSIX ACL and PATHNAMES if not set | ||
1638 | originally at mount time */ | ||
1639 | if ((saved_cap & CIFS_UNIX_POSIX_ACL_CAP) == 0) | ||
1640 | cap &= ~CIFS_UNIX_POSIX_ACL_CAP; | ||
1641 | if ((saved_cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) == 0) | ||
1642 | cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP; | ||
1643 | |||
1644 | |||
1645 | |||
1646 | |||
1647 | } | ||
1648 | |||
1649 | cap &= CIFS_UNIX_CAP_MASK; | ||
1650 | if(vol_info && vol_info->no_psx_acl) | ||
1651 | cap &= ~CIFS_UNIX_POSIX_ACL_CAP; | ||
1652 | else if(CIFS_UNIX_POSIX_ACL_CAP & cap) { | ||
1653 | cFYI(1,("negotiated posix acl support")); | ||
1654 | if(sb) | ||
1655 | sb->s_flags |= MS_POSIXACL; | ||
1656 | } | ||
1657 | |||
1658 | if(vol_info && vol_info->posix_paths == 0) | ||
1659 | cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP; | ||
1660 | else if(cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) { | ||
1661 | cFYI(1,("negotiate posix pathnames")); | ||
1662 | if(sb) | ||
1663 | CIFS_SB(sb)->mnt_cifs_flags |= | ||
1664 | CIFS_MOUNT_POSIX_PATHS; | ||
1665 | } | ||
1666 | |||
1667 | cFYI(1,("Negotiate caps 0x%x",(int)cap)); | ||
1668 | #ifdef CONFIG_CIFS_DEBUG2 | ||
1669 | if(cap & CIFS_UNIX_FCNTL_CAP) | ||
1670 | cFYI(1,("FCNTL cap")); | ||
1671 | if(cap & CIFS_UNIX_EXTATTR_CAP) | ||
1672 | cFYI(1,("EXTATTR cap")); | ||
1673 | if(cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) | ||
1674 | cFYI(1,("POSIX path cap")); | ||
1675 | if(cap & CIFS_UNIX_XATTR_CAP) | ||
1676 | cFYI(1,("XATTR cap")); | ||
1677 | if(cap & CIFS_UNIX_POSIX_ACL_CAP) | ||
1678 | cFYI(1,("POSIX ACL cap")); | ||
1679 | #endif /* CIFS_DEBUG2 */ | ||
1680 | if (CIFSSMBSetFSUnixInfo(xid, tcon, cap)) { | ||
1681 | cFYI(1,("setting capabilities failed")); | ||
1682 | } | ||
1683 | } | ||
1684 | } | ||
1685 | |||
1616 | int | 1686 | int |
1617 | cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, | 1687 | cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, |
1618 | char *mount_data, const char *devname) | 1688 | char *mount_data, const char *devname) |
@@ -1928,20 +1998,25 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, | |||
1928 | if (tcon == NULL) | 1998 | if (tcon == NULL) |
1929 | rc = -ENOMEM; | 1999 | rc = -ENOMEM; |
1930 | else { | 2000 | else { |
1931 | /* check for null share name ie connect to dfs root */ | 2001 | /* check for null share name ie connecting to |
2002 | * dfs root */ | ||
1932 | 2003 | ||
1933 | /* BB check if this works for exactly length three strings */ | 2004 | /* BB check if this works for exactly length |
2005 | * three strings */ | ||
1934 | if ((strchr(volume_info.UNC + 3, '\\') == NULL) | 2006 | if ((strchr(volume_info.UNC + 3, '\\') == NULL) |
1935 | && (strchr(volume_info.UNC + 3, '/') == | 2007 | && (strchr(volume_info.UNC + 3, '/') == |
1936 | NULL)) { | 2008 | NULL)) { |
1937 | rc = connect_to_dfs_path(xid, pSesInfo, | 2009 | rc = connect_to_dfs_path(xid, pSesInfo, |
1938 | "", cifs_sb->local_nls, | 2010 | "", cifs_sb->local_nls, |
1939 | cifs_sb->mnt_cifs_flags & | 2011 | cifs_sb->mnt_cifs_flags & |
1940 | CIFS_MOUNT_MAP_SPECIAL_CHR); | 2012 | CIFS_MOUNT_MAP_SPECIAL_CHR); |
1941 | kfree(volume_info.UNC); | 2013 | kfree(volume_info.UNC); |
1942 | FreeXid(xid); | 2014 | FreeXid(xid); |
1943 | return -ENODEV; | 2015 | return -ENODEV; |
1944 | } else { | 2016 | } else { |
2017 | /* BB Do we need to wrap sesSem around | ||
2018 | * this TCon call and Unix SetFS as | ||
2019 | * we do on SessSetup and reconnect? */ | ||
1945 | rc = CIFSTCon(xid, pSesInfo, | 2020 | rc = CIFSTCon(xid, pSesInfo, |
1946 | volume_info.UNC, | 2021 | volume_info.UNC, |
1947 | tcon, cifs_sb->local_nls); | 2022 | tcon, cifs_sb->local_nls); |
@@ -1962,6 +2037,7 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, | |||
1962 | sb->s_maxbytes = (u64) 1 << 31; /* 2 GB */ | 2037 | sb->s_maxbytes = (u64) 1 << 31; /* 2 GB */ |
1963 | } | 2038 | } |
1964 | 2039 | ||
2040 | /* BB FIXME fix time_gran to be larger for LANMAN sessions */ | ||
1965 | sb->s_time_gran = 100; | 2041 | sb->s_time_gran = 100; |
1966 | 2042 | ||
1967 | /* on error free sesinfo and tcon struct if needed */ | 2043 | /* on error free sesinfo and tcon struct if needed */ |
@@ -2006,45 +2082,11 @@ cifs_mount(struct super_block *sb, struct cifs_sb_info *cifs_sb, | |||
2006 | /* do not care if following two calls succeed - informational */ | 2082 | /* do not care if following two calls succeed - informational */ |
2007 | CIFSSMBQFSDeviceInfo(xid, tcon); | 2083 | CIFSSMBQFSDeviceInfo(xid, tcon); |
2008 | CIFSSMBQFSAttributeInfo(xid, tcon); | 2084 | CIFSSMBQFSAttributeInfo(xid, tcon); |
2009 | 2085 | ||
2010 | if (tcon->ses->capabilities & CAP_UNIX) { | 2086 | /* tell server which Unix caps we support */ |
2011 | if(!CIFSSMBQFSUnixInfo(xid, tcon)) { | 2087 | if (tcon->ses->capabilities & CAP_UNIX) |
2012 | __u64 cap = | 2088 | reset_cifs_unix_caps(xid, tcon, sb, &volume_info); |
2013 | le64_to_cpu(tcon->fsUnixInfo.Capability); | 2089 | |
2014 | cap &= CIFS_UNIX_CAP_MASK; | ||
2015 | if(volume_info.no_psx_acl) | ||
2016 | cap &= ~CIFS_UNIX_POSIX_ACL_CAP; | ||
2017 | else if(CIFS_UNIX_POSIX_ACL_CAP & cap) { | ||
2018 | cFYI(1,("negotiated posix acl support")); | ||
2019 | sb->s_flags |= MS_POSIXACL; | ||
2020 | } | ||
2021 | |||
2022 | if(volume_info.posix_paths == 0) | ||
2023 | cap &= ~CIFS_UNIX_POSIX_PATHNAMES_CAP; | ||
2024 | else if(cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) { | ||
2025 | cFYI(1,("negotiate posix pathnames")); | ||
2026 | cifs_sb->mnt_cifs_flags |= | ||
2027 | CIFS_MOUNT_POSIX_PATHS; | ||
2028 | } | ||
2029 | |||
2030 | cFYI(1,("Negotiate caps 0x%x",(int)cap)); | ||
2031 | #ifdef CONFIG_CIFS_DEBUG2 | ||
2032 | if(cap & CIFS_UNIX_FCNTL_CAP) | ||
2033 | cFYI(1,("FCNTL cap")); | ||
2034 | if(cap & CIFS_UNIX_EXTATTR_CAP) | ||
2035 | cFYI(1,("EXTATTR cap")); | ||
2036 | if(cap & CIFS_UNIX_POSIX_PATHNAMES_CAP) | ||
2037 | cFYI(1,("POSIX path cap")); | ||
2038 | if(cap & CIFS_UNIX_XATTR_CAP) | ||
2039 | cFYI(1,("XATTR cap")); | ||
2040 | if(cap & CIFS_UNIX_POSIX_ACL_CAP) | ||
2041 | cFYI(1,("POSIX ACL cap")); | ||
2042 | #endif /* CIFS_DEBUG2 */ | ||
2043 | if (CIFSSMBSetFSUnixInfo(xid, tcon, cap)) { | ||
2044 | cFYI(1,("setting capabilities failed")); | ||
2045 | } | ||
2046 | } | ||
2047 | } | ||
2048 | if (!(tcon->ses->capabilities & CAP_LARGE_WRITE_X)) | 2090 | if (!(tcon->ses->capabilities & CAP_LARGE_WRITE_X)) |
2049 | cifs_sb->wsize = min(cifs_sb->wsize, | 2091 | cifs_sb->wsize = min(cifs_sb->wsize, |
2050 | (tcon->ses->server->maxBuf - | 2092 | (tcon->ses->server->maxBuf - |
diff --git a/fs/cifs/file.c b/fs/cifs/file.c index e9dcf5ee29a2..07ff9351e9ee 100644 --- a/fs/cifs/file.c +++ b/fs/cifs/file.c | |||
@@ -1954,7 +1954,7 @@ static int cifs_readpage(struct file *file, struct page *page) | |||
1954 | refreshing the inode only on increases in the file size | 1954 | refreshing the inode only on increases in the file size |
1955 | but this is tricky to do without racing with writebehind | 1955 | but this is tricky to do without racing with writebehind |
1956 | page caching in the current Linux kernel design */ | 1956 | page caching in the current Linux kernel design */ |
1957 | int is_size_safe_to_change(struct cifsInodeInfo *cifsInode) | 1957 | int is_size_safe_to_change(struct cifsInodeInfo *cifsInode, __u64 end_of_file) |
1958 | { | 1958 | { |
1959 | struct cifsFileInfo *open_file = NULL; | 1959 | struct cifsFileInfo *open_file = NULL; |
1960 | 1960 | ||
@@ -1976,6 +1976,9 @@ int is_size_safe_to_change(struct cifsInodeInfo *cifsInode) | |||
1976 | return 1; | 1976 | return 1; |
1977 | } | 1977 | } |
1978 | 1978 | ||
1979 | if(i_size_read(&cifsInode->vfs_inode) < end_of_file) | ||
1980 | return 1; | ||
1981 | |||
1979 | return 0; | 1982 | return 0; |
1980 | } else | 1983 | } else |
1981 | return 1; | 1984 | return 1; |
diff --git a/fs/cifs/inode.c b/fs/cifs/inode.c index c4fa91b8b62f..3f5bc83dc3d1 100644 --- a/fs/cifs/inode.c +++ b/fs/cifs/inode.c | |||
@@ -140,7 +140,7 @@ int cifs_get_inode_info_unix(struct inode **pinode, | |||
140 | inode->i_gid = le64_to_cpu(findData.Gid); | 140 | inode->i_gid = le64_to_cpu(findData.Gid); |
141 | inode->i_nlink = le64_to_cpu(findData.Nlinks); | 141 | inode->i_nlink = le64_to_cpu(findData.Nlinks); |
142 | 142 | ||
143 | if (is_size_safe_to_change(cifsInfo)) { | 143 | if (is_size_safe_to_change(cifsInfo, end_of_file)) { |
144 | /* can not safely change the file size here if the | 144 | /* can not safely change the file size here if the |
145 | client is writing to it due to potential races */ | 145 | client is writing to it due to potential races */ |
146 | 146 | ||
@@ -491,8 +491,8 @@ int cifs_get_inode_info(struct inode **pinode, | |||
491 | /* BB add code here - | 491 | /* BB add code here - |
492 | validate if device or weird share or device type? */ | 492 | validate if device or weird share or device type? */ |
493 | } | 493 | } |
494 | if (is_size_safe_to_change(cifsInfo)) { | 494 | if (is_size_safe_to_change(cifsInfo, le64_to_cpu(pfindData->EndOfFile))) { |
495 | /* can not safely change the file size here if the | 495 | /* can not safely shrink the file size here if the |
496 | client is writing to it due to potential races */ | 496 | client is writing to it due to potential races */ |
497 | i_size_write(inode,le64_to_cpu(pfindData->EndOfFile)); | 497 | i_size_write(inode,le64_to_cpu(pfindData->EndOfFile)); |
498 | 498 | ||
diff --git a/fs/cifs/readdir.c b/fs/cifs/readdir.c index 782940be550f..c6220bd27165 100644 --- a/fs/cifs/readdir.c +++ b/fs/cifs/readdir.c | |||
@@ -222,7 +222,7 @@ static void fill_in_inode(struct inode *tmp_inode, int new_buf_type, | |||
222 | atomic_set(&cifsInfo->inUse, 1); | 222 | atomic_set(&cifsInfo->inUse, 1); |
223 | } | 223 | } |
224 | 224 | ||
225 | if (is_size_safe_to_change(cifsInfo)) { | 225 | if (is_size_safe_to_change(cifsInfo, end_of_file)) { |
226 | /* can not safely change the file size here if the | 226 | /* can not safely change the file size here if the |
227 | client is writing to it due to potential races */ | 227 | client is writing to it due to potential races */ |
228 | i_size_write(tmp_inode, end_of_file); | 228 | i_size_write(tmp_inode, end_of_file); |
@@ -351,10 +351,10 @@ static void unix_fill_in_inode(struct inode *tmp_inode, | |||
351 | tmp_inode->i_gid = le64_to_cpu(pfindData->Gid); | 351 | tmp_inode->i_gid = le64_to_cpu(pfindData->Gid); |
352 | tmp_inode->i_nlink = le64_to_cpu(pfindData->Nlinks); | 352 | tmp_inode->i_nlink = le64_to_cpu(pfindData->Nlinks); |
353 | 353 | ||
354 | if (is_size_safe_to_change(cifsInfo)) { | 354 | if (is_size_safe_to_change(cifsInfo, end_of_file)) { |
355 | /* can not safely change the file size here if the | 355 | /* can not safely change the file size here if the |
356 | client is writing to it due to potential races */ | 356 | client is writing to it due to potential races */ |
357 | i_size_write(tmp_inode,end_of_file); | 357 | i_size_write(tmp_inode, end_of_file); |
358 | 358 | ||
359 | /* 512 bytes (2**9) is the fake blocksize that must be used */ | 359 | /* 512 bytes (2**9) is the fake blocksize that must be used */ |
360 | /* for this calculation, not the real blocksize */ | 360 | /* for this calculation, not the real blocksize */ |
diff --git a/fs/dcache.c b/fs/dcache.c index b5f613932912..d68631f18df1 100644 --- a/fs/dcache.c +++ b/fs/dcache.c | |||
@@ -1739,41 +1739,45 @@ shouldnt_be_hashed: | |||
1739 | * @rootmnt: vfsmnt to which the root dentry belongs | 1739 | * @rootmnt: vfsmnt to which the root dentry belongs |
1740 | * @buffer: buffer to return value in | 1740 | * @buffer: buffer to return value in |
1741 | * @buflen: buffer length | 1741 | * @buflen: buffer length |
1742 | * @fail_deleted: what to return for deleted files | ||
1743 | * | 1742 | * |
1744 | * Convert a dentry into an ASCII path name. If the entry has been deleted, | 1743 | * Convert a dentry into an ASCII path name. If the entry has been deleted |
1745 | * then if @fail_deleted is true, ERR_PTR(-ENOENT) is returned. Otherwise, | 1744 | * the string " (deleted)" is appended. Note that this is ambiguous. |
1746 | * the the string " (deleted)" is appended. Note that this is ambiguous. | ||
1747 | * | 1745 | * |
1748 | * Returns the buffer or an error code. | 1746 | * Returns the buffer or an error code if the path was too long. |
1747 | * | ||
1748 | * "buflen" should be positive. Caller holds the dcache_lock. | ||
1749 | */ | 1749 | */ |
1750 | static char *__d_path(struct dentry *dentry, struct vfsmount *vfsmnt, | 1750 | static char * __d_path( struct dentry *dentry, struct vfsmount *vfsmnt, |
1751 | struct dentry *root, struct vfsmount *rootmnt, | 1751 | struct dentry *root, struct vfsmount *rootmnt, |
1752 | char *buffer, int buflen, int fail_deleted) | 1752 | char *buffer, int buflen) |
1753 | { | 1753 | { |
1754 | int namelen, is_slash; | 1754 | char * end = buffer+buflen; |
1755 | 1755 | char * retval; | |
1756 | if (buflen < 2) | 1756 | int namelen; |
1757 | return ERR_PTR(-ENAMETOOLONG); | ||
1758 | buffer += --buflen; | ||
1759 | *buffer = '\0'; | ||
1760 | 1757 | ||
1761 | spin_lock(&dcache_lock); | 1758 | *--end = '\0'; |
1759 | buflen--; | ||
1762 | if (!IS_ROOT(dentry) && d_unhashed(dentry)) { | 1760 | if (!IS_ROOT(dentry) && d_unhashed(dentry)) { |
1763 | if (fail_deleted) { | ||
1764 | buffer = ERR_PTR(-ENOENT); | ||
1765 | goto out; | ||
1766 | } | ||
1767 | if (buflen < 10) | ||
1768 | goto Elong; | ||
1769 | buflen -= 10; | 1761 | buflen -= 10; |
1770 | buffer -= 10; | 1762 | end -= 10; |
1771 | memcpy(buffer, " (deleted)", 10); | 1763 | if (buflen < 0) |
1764 | goto Elong; | ||
1765 | memcpy(end, " (deleted)", 10); | ||
1772 | } | 1766 | } |
1773 | while (dentry != root || vfsmnt != rootmnt) { | 1767 | |
1768 | if (buflen < 1) | ||
1769 | goto Elong; | ||
1770 | /* Get '/' right */ | ||
1771 | retval = end-1; | ||
1772 | *retval = '/'; | ||
1773 | |||
1774 | for (;;) { | ||
1774 | struct dentry * parent; | 1775 | struct dentry * parent; |
1775 | 1776 | ||
1777 | if (dentry == root && vfsmnt == rootmnt) | ||
1778 | break; | ||
1776 | if (dentry == vfsmnt->mnt_root || IS_ROOT(dentry)) { | 1779 | if (dentry == vfsmnt->mnt_root || IS_ROOT(dentry)) { |
1780 | /* Global root? */ | ||
1777 | spin_lock(&vfsmount_lock); | 1781 | spin_lock(&vfsmount_lock); |
1778 | if (vfsmnt->mnt_parent == vfsmnt) { | 1782 | if (vfsmnt->mnt_parent == vfsmnt) { |
1779 | spin_unlock(&vfsmount_lock); | 1783 | spin_unlock(&vfsmount_lock); |
@@ -1787,60 +1791,33 @@ static char *__d_path(struct dentry *dentry, struct vfsmount *vfsmnt, | |||
1787 | parent = dentry->d_parent; | 1791 | parent = dentry->d_parent; |
1788 | prefetch(parent); | 1792 | prefetch(parent); |
1789 | namelen = dentry->d_name.len; | 1793 | namelen = dentry->d_name.len; |
1790 | if (buflen <= namelen) | ||
1791 | goto Elong; | ||
1792 | buflen -= namelen + 1; | 1794 | buflen -= namelen + 1; |
1793 | buffer -= namelen; | 1795 | if (buflen < 0) |
1794 | memcpy(buffer, dentry->d_name.name, namelen); | 1796 | goto Elong; |
1795 | *--buffer = '/'; | 1797 | end -= namelen; |
1798 | memcpy(end, dentry->d_name.name, namelen); | ||
1799 | *--end = '/'; | ||
1800 | retval = end; | ||
1796 | dentry = parent; | 1801 | dentry = parent; |
1797 | } | 1802 | } |
1798 | /* Get '/' right */ | ||
1799 | if (*buffer != '/') | ||
1800 | *--buffer = '/'; | ||
1801 | 1803 | ||
1802 | out: | 1804 | return retval; |
1803 | spin_unlock(&dcache_lock); | ||
1804 | return buffer; | ||
1805 | 1805 | ||
1806 | global_root: | 1806 | global_root: |
1807 | /* | ||
1808 | * We went past the (vfsmount, dentry) we were looking for and have | ||
1809 | * either hit a root dentry, a lazily unmounted dentry, an | ||
1810 | * unconnected dentry, or the file is on a pseudo filesystem. | ||
1811 | */ | ||
1812 | namelen = dentry->d_name.len; | 1807 | namelen = dentry->d_name.len; |
1813 | is_slash = (namelen == 1 && *dentry->d_name.name == '/'); | 1808 | buflen -= namelen; |
1814 | if (is_slash || (dentry->d_sb->s_flags & MS_NOUSER)) { | 1809 | if (buflen < 0) |
1815 | /* | ||
1816 | * Make sure we won't return a pathname starting with '/'. | ||
1817 | * | ||
1818 | * Historically, we also glue together the root dentry and | ||
1819 | * remaining name for pseudo filesystems like pipefs, which | ||
1820 | * have the MS_NOUSER flag set. This results in pathnames | ||
1821 | * like "pipe:[439336]". | ||
1822 | */ | ||
1823 | if (*buffer == '/') { | ||
1824 | buffer++; | ||
1825 | buflen++; | ||
1826 | } | ||
1827 | if (is_slash) | ||
1828 | goto out; | ||
1829 | } | ||
1830 | if (buflen < namelen) | ||
1831 | goto Elong; | 1810 | goto Elong; |
1832 | buffer -= namelen; | 1811 | retval -= namelen-1; /* hit the slash */ |
1833 | memcpy(buffer, dentry->d_name.name, namelen); | 1812 | memcpy(retval, dentry->d_name.name, namelen); |
1834 | goto out; | 1813 | return retval; |
1835 | |||
1836 | Elong: | 1814 | Elong: |
1837 | buffer = ERR_PTR(-ENAMETOOLONG); | 1815 | return ERR_PTR(-ENAMETOOLONG); |
1838 | goto out; | ||
1839 | } | 1816 | } |
1840 | 1817 | ||
1841 | /* write full pathname into buffer and return start of pathname */ | 1818 | /* write full pathname into buffer and return start of pathname */ |
1842 | char *d_path(struct dentry *dentry, struct vfsmount *vfsmnt, char *buf, | 1819 | char * d_path(struct dentry *dentry, struct vfsmount *vfsmnt, |
1843 | int buflen) | 1820 | char *buf, int buflen) |
1844 | { | 1821 | { |
1845 | char *res; | 1822 | char *res; |
1846 | struct vfsmount *rootmnt; | 1823 | struct vfsmount *rootmnt; |
@@ -1850,7 +1827,9 @@ char *d_path(struct dentry *dentry, struct vfsmount *vfsmnt, char *buf, | |||
1850 | rootmnt = mntget(current->fs->rootmnt); | 1827 | rootmnt = mntget(current->fs->rootmnt); |
1851 | root = dget(current->fs->root); | 1828 | root = dget(current->fs->root); |
1852 | read_unlock(¤t->fs->lock); | 1829 | read_unlock(¤t->fs->lock); |
1853 | res = __d_path(dentry, vfsmnt, root, rootmnt, buf, buflen, 0); | 1830 | spin_lock(&dcache_lock); |
1831 | res = __d_path(dentry, vfsmnt, root, rootmnt, buf, buflen); | ||
1832 | spin_unlock(&dcache_lock); | ||
1854 | dput(root); | 1833 | dput(root); |
1855 | mntput(rootmnt); | 1834 | mntput(rootmnt); |
1856 | return res; | 1835 | return res; |
@@ -1876,10 +1855,10 @@ char *d_path(struct dentry *dentry, struct vfsmount *vfsmnt, char *buf, | |||
1876 | */ | 1855 | */ |
1877 | asmlinkage long sys_getcwd(char __user *buf, unsigned long size) | 1856 | asmlinkage long sys_getcwd(char __user *buf, unsigned long size) |
1878 | { | 1857 | { |
1879 | int error, len; | 1858 | int error; |
1880 | struct vfsmount *pwdmnt, *rootmnt; | 1859 | struct vfsmount *pwdmnt, *rootmnt; |
1881 | struct dentry *pwd, *root; | 1860 | struct dentry *pwd, *root; |
1882 | char *page = (char *) __get_free_page(GFP_USER), *cwd; | 1861 | char *page = (char *) __get_free_page(GFP_USER); |
1883 | 1862 | ||
1884 | if (!page) | 1863 | if (!page) |
1885 | return -ENOMEM; | 1864 | return -ENOMEM; |
@@ -1891,18 +1870,29 @@ asmlinkage long sys_getcwd(char __user *buf, unsigned long size) | |||
1891 | root = dget(current->fs->root); | 1870 | root = dget(current->fs->root); |
1892 | read_unlock(¤t->fs->lock); | 1871 | read_unlock(¤t->fs->lock); |
1893 | 1872 | ||
1894 | cwd = __d_path(pwd, pwdmnt, root, rootmnt, page, PAGE_SIZE, 1); | 1873 | error = -ENOENT; |
1895 | error = PTR_ERR(cwd); | 1874 | /* Has the current directory has been unlinked? */ |
1896 | if (IS_ERR(cwd)) | 1875 | spin_lock(&dcache_lock); |
1897 | goto out; | 1876 | if (pwd->d_parent == pwd || !d_unhashed(pwd)) { |
1877 | unsigned long len; | ||
1878 | char * cwd; | ||
1898 | 1879 | ||
1899 | error = -ERANGE; | 1880 | cwd = __d_path(pwd, pwdmnt, root, rootmnt, page, PAGE_SIZE); |
1900 | len = PAGE_SIZE + page - cwd; | 1881 | spin_unlock(&dcache_lock); |
1901 | if (len <= size) { | 1882 | |
1902 | error = len; | 1883 | error = PTR_ERR(cwd); |
1903 | if (copy_to_user(buf, cwd, len)) | 1884 | if (IS_ERR(cwd)) |
1904 | error = -EFAULT; | 1885 | goto out; |
1905 | } | 1886 | |
1887 | error = -ERANGE; | ||
1888 | len = PAGE_SIZE + page - cwd; | ||
1889 | if (len <= size) { | ||
1890 | error = len; | ||
1891 | if (copy_to_user(buf, cwd, len)) | ||
1892 | error = -EFAULT; | ||
1893 | } | ||
1894 | } else | ||
1895 | spin_unlock(&dcache_lock); | ||
1906 | 1896 | ||
1907 | out: | 1897 | out: |
1908 | dput(pwd); | 1898 | dput(pwd); |
diff --git a/include/asm-mips/atomic.h b/include/asm-mips/atomic.h index c1a2409bb52a..8578869a8bcf 100644 --- a/include/asm-mips/atomic.h +++ b/include/asm-mips/atomic.h | |||
@@ -69,7 +69,10 @@ static __inline__ void atomic_add(int i, atomic_t * v) | |||
69 | "1: ll %0, %1 # atomic_add \n" | 69 | "1: ll %0, %1 # atomic_add \n" |
70 | " addu %0, %2 \n" | 70 | " addu %0, %2 \n" |
71 | " sc %0, %1 \n" | 71 | " sc %0, %1 \n" |
72 | " beqz %0, 1b \n" | 72 | " beqz %0, 2f \n" |
73 | " .subsection 2 \n" | ||
74 | "2: b 1b \n" | ||
75 | " .previous \n" | ||
73 | " .set mips0 \n" | 76 | " .set mips0 \n" |
74 | : "=&r" (temp), "=m" (v->counter) | 77 | : "=&r" (temp), "=m" (v->counter) |
75 | : "Ir" (i), "m" (v->counter)); | 78 | : "Ir" (i), "m" (v->counter)); |
@@ -111,7 +114,10 @@ static __inline__ void atomic_sub(int i, atomic_t * v) | |||
111 | "1: ll %0, %1 # atomic_sub \n" | 114 | "1: ll %0, %1 # atomic_sub \n" |
112 | " subu %0, %2 \n" | 115 | " subu %0, %2 \n" |
113 | " sc %0, %1 \n" | 116 | " sc %0, %1 \n" |
114 | " beqz %0, 1b \n" | 117 | " beqz %0, 2f \n" |
118 | " .subsection 2 \n" | ||
119 | "2: b 1b \n" | ||
120 | " .previous \n" | ||
115 | " .set mips0 \n" | 121 | " .set mips0 \n" |
116 | : "=&r" (temp), "=m" (v->counter) | 122 | : "=&r" (temp), "=m" (v->counter) |
117 | : "Ir" (i), "m" (v->counter)); | 123 | : "Ir" (i), "m" (v->counter)); |
@@ -155,8 +161,11 @@ static __inline__ int atomic_add_return(int i, atomic_t * v) | |||
155 | "1: ll %1, %2 # atomic_add_return \n" | 161 | "1: ll %1, %2 # atomic_add_return \n" |
156 | " addu %0, %1, %3 \n" | 162 | " addu %0, %1, %3 \n" |
157 | " sc %0, %2 \n" | 163 | " sc %0, %2 \n" |
158 | " beqz %0, 1b \n" | 164 | " beqz %0, 2f \n" |
159 | " addu %0, %1, %3 \n" | 165 | " addu %0, %1, %3 \n" |
166 | " .subsection 2 \n" | ||
167 | "2: b 1b \n" | ||
168 | " .previous \n" | ||
160 | " .set mips0 \n" | 169 | " .set mips0 \n" |
161 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 170 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
162 | : "Ir" (i), "m" (v->counter) | 171 | : "Ir" (i), "m" (v->counter) |
@@ -204,8 +213,11 @@ static __inline__ int atomic_sub_return(int i, atomic_t * v) | |||
204 | "1: ll %1, %2 # atomic_sub_return \n" | 213 | "1: ll %1, %2 # atomic_sub_return \n" |
205 | " subu %0, %1, %3 \n" | 214 | " subu %0, %1, %3 \n" |
206 | " sc %0, %2 \n" | 215 | " sc %0, %2 \n" |
207 | " beqz %0, 1b \n" | 216 | " beqz %0, 2f \n" |
208 | " subu %0, %1, %3 \n" | 217 | " subu %0, %1, %3 \n" |
218 | " .subsection 2 \n" | ||
219 | "2: b 1b \n" | ||
220 | " .previous \n" | ||
209 | " .set mips0 \n" | 221 | " .set mips0 \n" |
210 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 222 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
211 | : "Ir" (i), "m" (v->counter) | 223 | : "Ir" (i), "m" (v->counter) |
@@ -267,10 +279,13 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v) | |||
267 | " bltz %0, 1f \n" | 279 | " bltz %0, 1f \n" |
268 | " sc %0, %2 \n" | 280 | " sc %0, %2 \n" |
269 | " .set noreorder \n" | 281 | " .set noreorder \n" |
270 | " beqz %0, 1b \n" | 282 | " beqz %0, 2f \n" |
271 | " subu %0, %1, %3 \n" | 283 | " subu %0, %1, %3 \n" |
272 | " .set reorder \n" | 284 | " .set reorder \n" |
273 | "1: \n" | 285 | "1: \n" |
286 | " .subsection 2 \n" | ||
287 | "2: b 1b \n" | ||
288 | " .previous \n" | ||
274 | " .set mips0 \n" | 289 | " .set mips0 \n" |
275 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 290 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
276 | : "Ir" (i), "m" (v->counter) | 291 | : "Ir" (i), "m" (v->counter) |
@@ -429,7 +444,10 @@ static __inline__ void atomic64_add(long i, atomic64_t * v) | |||
429 | "1: lld %0, %1 # atomic64_add \n" | 444 | "1: lld %0, %1 # atomic64_add \n" |
430 | " addu %0, %2 \n" | 445 | " addu %0, %2 \n" |
431 | " scd %0, %1 \n" | 446 | " scd %0, %1 \n" |
432 | " beqz %0, 1b \n" | 447 | " beqz %0, 2f \n" |
448 | " .subsection 2 \n" | ||
449 | "2: b 1b \n" | ||
450 | " .previous \n" | ||
433 | " .set mips0 \n" | 451 | " .set mips0 \n" |
434 | : "=&r" (temp), "=m" (v->counter) | 452 | : "=&r" (temp), "=m" (v->counter) |
435 | : "Ir" (i), "m" (v->counter)); | 453 | : "Ir" (i), "m" (v->counter)); |
@@ -471,7 +489,10 @@ static __inline__ void atomic64_sub(long i, atomic64_t * v) | |||
471 | "1: lld %0, %1 # atomic64_sub \n" | 489 | "1: lld %0, %1 # atomic64_sub \n" |
472 | " subu %0, %2 \n" | 490 | " subu %0, %2 \n" |
473 | " scd %0, %1 \n" | 491 | " scd %0, %1 \n" |
474 | " beqz %0, 1b \n" | 492 | " beqz %0, 2f \n" |
493 | " .subsection 2 \n" | ||
494 | "2: b 1b \n" | ||
495 | " .previous \n" | ||
475 | " .set mips0 \n" | 496 | " .set mips0 \n" |
476 | : "=&r" (temp), "=m" (v->counter) | 497 | : "=&r" (temp), "=m" (v->counter) |
477 | : "Ir" (i), "m" (v->counter)); | 498 | : "Ir" (i), "m" (v->counter)); |
@@ -515,8 +536,11 @@ static __inline__ long atomic64_add_return(long i, atomic64_t * v) | |||
515 | "1: lld %1, %2 # atomic64_add_return \n" | 536 | "1: lld %1, %2 # atomic64_add_return \n" |
516 | " addu %0, %1, %3 \n" | 537 | " addu %0, %1, %3 \n" |
517 | " scd %0, %2 \n" | 538 | " scd %0, %2 \n" |
518 | " beqz %0, 1b \n" | 539 | " beqz %0, 2f \n" |
519 | " addu %0, %1, %3 \n" | 540 | " addu %0, %1, %3 \n" |
541 | " .subsection 2 \n" | ||
542 | "2: b 1b \n" | ||
543 | " .previous \n" | ||
520 | " .set mips0 \n" | 544 | " .set mips0 \n" |
521 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 545 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
522 | : "Ir" (i), "m" (v->counter) | 546 | : "Ir" (i), "m" (v->counter) |
@@ -564,8 +588,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t * v) | |||
564 | "1: lld %1, %2 # atomic64_sub_return \n" | 588 | "1: lld %1, %2 # atomic64_sub_return \n" |
565 | " subu %0, %1, %3 \n" | 589 | " subu %0, %1, %3 \n" |
566 | " scd %0, %2 \n" | 590 | " scd %0, %2 \n" |
567 | " beqz %0, 1b \n" | 591 | " beqz %0, 2f \n" |
568 | " subu %0, %1, %3 \n" | 592 | " subu %0, %1, %3 \n" |
593 | " .subsection 2 \n" | ||
594 | "2: b 1b \n" | ||
595 | " .previous \n" | ||
569 | " .set mips0 \n" | 596 | " .set mips0 \n" |
570 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 597 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
571 | : "Ir" (i), "m" (v->counter) | 598 | : "Ir" (i), "m" (v->counter) |
@@ -627,10 +654,13 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v) | |||
627 | " bltz %0, 1f \n" | 654 | " bltz %0, 1f \n" |
628 | " scd %0, %2 \n" | 655 | " scd %0, %2 \n" |
629 | " .set noreorder \n" | 656 | " .set noreorder \n" |
630 | " beqz %0, 1b \n" | 657 | " beqz %0, 2f \n" |
631 | " dsubu %0, %1, %3 \n" | 658 | " dsubu %0, %1, %3 \n" |
632 | " .set reorder \n" | 659 | " .set reorder \n" |
633 | "1: \n" | 660 | "1: \n" |
661 | " .subsection 2 \n" | ||
662 | "2: b 1b \n" | ||
663 | " .previous \n" | ||
634 | " .set mips0 \n" | 664 | " .set mips0 \n" |
635 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) | 665 | : "=&r" (result), "=&r" (temp), "=m" (v->counter) |
636 | : "Ir" (i), "m" (v->counter) | 666 | : "Ir" (i), "m" (v->counter) |
diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index 06445de1324b..06c08228a525 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h | |||
@@ -68,7 +68,10 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr) | |||
68 | "1: " __LL "%0, %1 # set_bit \n" | 68 | "1: " __LL "%0, %1 # set_bit \n" |
69 | " or %0, %2 \n" | 69 | " or %0, %2 \n" |
70 | " " __SC "%0, %1 \n" | 70 | " " __SC "%0, %1 \n" |
71 | " beqz %0, 1b \n" | 71 | " beqz %0, 2f \n" |
72 | " .subsection 2 \n" | ||
73 | "2: b 1b \n" | ||
74 | " .previous \n" | ||
72 | " .set mips0 \n" | 75 | " .set mips0 \n" |
73 | : "=&r" (temp), "=m" (*m) | 76 | : "=&r" (temp), "=m" (*m) |
74 | : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); | 77 | : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); |
@@ -116,7 +119,10 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) | |||
116 | "1: " __LL "%0, %1 # clear_bit \n" | 119 | "1: " __LL "%0, %1 # clear_bit \n" |
117 | " and %0, %2 \n" | 120 | " and %0, %2 \n" |
118 | " " __SC "%0, %1 \n" | 121 | " " __SC "%0, %1 \n" |
119 | " beqz %0, 1b \n" | 122 | " beqz %0, 2f \n" |
123 | " .subsection 2 \n" | ||
124 | "2: b 1b \n" | ||
125 | " .previous \n" | ||
120 | " .set mips0 \n" | 126 | " .set mips0 \n" |
121 | : "=&r" (temp), "=m" (*m) | 127 | : "=&r" (temp), "=m" (*m) |
122 | : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); | 128 | : "ir" (~(1UL << (nr & SZLONG_MASK))), "m" (*m)); |
@@ -166,7 +172,10 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) | |||
166 | "1: " __LL "%0, %1 # change_bit \n" | 172 | "1: " __LL "%0, %1 # change_bit \n" |
167 | " xor %0, %2 \n" | 173 | " xor %0, %2 \n" |
168 | " " __SC "%0, %1 \n" | 174 | " " __SC "%0, %1 \n" |
169 | " beqz %0, 1b \n" | 175 | " beqz %0, 2f \n" |
176 | " .subsection 2 \n" | ||
177 | "2: b 1b \n" | ||
178 | " .previous \n" | ||
170 | " .set mips0 \n" | 179 | " .set mips0 \n" |
171 | : "=&r" (temp), "=m" (*m) | 180 | : "=&r" (temp), "=m" (*m) |
172 | : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); | 181 | : "ir" (1UL << (nr & SZLONG_MASK)), "m" (*m)); |
@@ -222,8 +231,12 @@ static inline int test_and_set_bit(unsigned long nr, | |||
222 | "1: " __LL "%0, %1 # test_and_set_bit \n" | 231 | "1: " __LL "%0, %1 # test_and_set_bit \n" |
223 | " or %2, %0, %3 \n" | 232 | " or %2, %0, %3 \n" |
224 | " " __SC "%2, %1 \n" | 233 | " " __SC "%2, %1 \n" |
225 | " beqz %2, 1b \n" | 234 | " beqz %2, 2f \n" |
226 | " and %2, %0, %3 \n" | 235 | " and %2, %0, %3 \n" |
236 | " .subsection 2 \n" | ||
237 | "2: b 1b \n" | ||
238 | " nop \n" | ||
239 | " .previous \n" | ||
227 | " .set pop \n" | 240 | " .set pop \n" |
228 | : "=&r" (temp), "=m" (*m), "=&r" (res) | 241 | : "=&r" (temp), "=m" (*m), "=&r" (res) |
229 | : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) | 242 | : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) |
@@ -290,8 +303,12 @@ static inline int test_and_clear_bit(unsigned long nr, | |||
290 | " or %2, %0, %3 \n" | 303 | " or %2, %0, %3 \n" |
291 | " xor %2, %3 \n" | 304 | " xor %2, %3 \n" |
292 | " " __SC "%2, %1 \n" | 305 | " " __SC "%2, %1 \n" |
293 | " beqz %2, 1b \n" | 306 | " beqz %2, 2f \n" |
294 | " and %2, %0, %3 \n" | 307 | " and %2, %0, %3 \n" |
308 | " .subsection 2 \n" | ||
309 | "2: b 1b \n" | ||
310 | " nop \n" | ||
311 | " .previous \n" | ||
295 | " .set pop \n" | 312 | " .set pop \n" |
296 | : "=&r" (temp), "=m" (*m), "=&r" (res) | 313 | : "=&r" (temp), "=m" (*m), "=&r" (res) |
297 | : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) | 314 | : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) |
@@ -356,8 +373,12 @@ static inline int test_and_change_bit(unsigned long nr, | |||
356 | "1: " __LL "%0, %1 # test_and_change_bit \n" | 373 | "1: " __LL "%0, %1 # test_and_change_bit \n" |
357 | " xor %2, %0, %3 \n" | 374 | " xor %2, %0, %3 \n" |
358 | " " __SC "\t%2, %1 \n" | 375 | " " __SC "\t%2, %1 \n" |
359 | " beqz %2, 1b \n" | 376 | " beqz %2, 2f \n" |
360 | " and %2, %0, %3 \n" | 377 | " and %2, %0, %3 \n" |
378 | " .subsection 2 \n" | ||
379 | "2: b 1b \n" | ||
380 | " nop \n" | ||
381 | " .previous \n" | ||
361 | " .set pop \n" | 382 | " .set pop \n" |
362 | : "=&r" (temp), "=m" (*m), "=&r" (res) | 383 | : "=&r" (temp), "=m" (*m), "=&r" (res) |
363 | : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) | 384 | : "r" (1UL << (nr & SZLONG_MASK)), "m" (*m) |
diff --git a/include/asm-mips/compat-signal.h b/include/asm-mips/compat-signal.h new file mode 100644 index 000000000000..672077084aa1 --- /dev/null +++ b/include/asm-mips/compat-signal.h | |||
@@ -0,0 +1,55 @@ | |||
1 | #ifndef __ASM_COMPAT_SIGNAL_H | ||
2 | #define __ASM_COMPAT_SIGNAL_H | ||
3 | |||
4 | #include <linux/bug.h> | ||
5 | #include <linux/compat.h> | ||
6 | #include <linux/compiler.h> | ||
7 | |||
8 | static inline int __copy_conv_sigset_to_user(compat_sigset_t __user *d, | ||
9 | const sigset_t *s) | ||
10 | { | ||
11 | int err; | ||
12 | |||
13 | BUG_ON(sizeof(*d) != sizeof(*s)); | ||
14 | BUG_ON(_NSIG_WORDS != 2); | ||
15 | |||
16 | err = __put_user(s->sig[0], &d->sig[0]); | ||
17 | err |= __put_user(s->sig[0] >> 32, &d->sig[1]); | ||
18 | err |= __put_user(s->sig[1], &d->sig[2]); | ||
19 | err |= __put_user(s->sig[1] >> 32, &d->sig[3]); | ||
20 | |||
21 | return err; | ||
22 | } | ||
23 | |||
24 | static inline int __copy_conv_sigset_from_user(sigset_t *d, | ||
25 | const compat_sigset_t __user *s) | ||
26 | { | ||
27 | int err; | ||
28 | union sigset_u { | ||
29 | sigset_t s; | ||
30 | compat_sigset_t c; | ||
31 | } *u = (union sigset_u *) d; | ||
32 | |||
33 | BUG_ON(sizeof(*d) != sizeof(*s)); | ||
34 | BUG_ON(_NSIG_WORDS != 2); | ||
35 | |||
36 | if (unlikely(!access_ok(VERIFY_READ, d, sizeof(*d)))) | ||
37 | return -EFAULT; | ||
38 | |||
39 | #ifdef CONFIG_CPU_BIG_ENDIAN | ||
40 | err = __get_user(u->c.sig[1], &s->sig[0]); | ||
41 | err |= __get_user(u->c.sig[0], &s->sig[1]); | ||
42 | err |= __get_user(u->c.sig[3], &s->sig[2]); | ||
43 | err |= __get_user(u->c.sig[2], &s->sig[3]); | ||
44 | #endif | ||
45 | #ifdef CONFIG_CPU_LITTLE_ENDIAN | ||
46 | err = __get_user(u->c.sig[0], &s->sig[0]); | ||
47 | err |= __get_user(u->c.sig[1], &s->sig[1]); | ||
48 | err |= __get_user(u->c.sig[2], &s->sig[2]); | ||
49 | err |= __get_user(u->c.sig[3], &s->sig[3]); | ||
50 | #endif | ||
51 | |||
52 | return err; | ||
53 | } | ||
54 | |||
55 | #endif /* __ASM_COMPAT_SIGNAL_H */ | ||
diff --git a/include/asm-mips/dma-mapping.h b/include/asm-mips/dma-mapping.h index 236d1a467cc7..230b3f1b69b1 100644 --- a/include/asm-mips/dma-mapping.h +++ b/include/asm-mips/dma-mapping.h | |||
@@ -68,6 +68,7 @@ extern int dma_is_consistent(struct device *dev, dma_addr_t dma_addr); | |||
68 | extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, | 68 | extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size, |
69 | enum dma_data_direction direction); | 69 | enum dma_data_direction direction); |
70 | 70 | ||
71 | #if 0 | ||
71 | #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY | 72 | #define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY |
72 | 73 | ||
73 | extern int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | 74 | extern int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, |
@@ -75,5 +76,6 @@ extern int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, | |||
75 | extern void dma_release_declared_memory(struct device *dev); | 76 | extern void dma_release_declared_memory(struct device *dev); |
76 | extern void * dma_mark_declared_memory_occupied(struct device *dev, | 77 | extern void * dma_mark_declared_memory_occupied(struct device *dev, |
77 | dma_addr_t device_addr, size_t size); | 78 | dma_addr_t device_addr, size_t size); |
79 | #endif | ||
78 | 80 | ||
79 | #endif /* _ASM_DMA_MAPPING_H */ | 81 | #endif /* _ASM_DMA_MAPPING_H */ |
diff --git a/include/asm-mips/mach-generic/dma-coherence.h b/include/asm-mips/mach-generic/dma-coherence.h new file mode 100644 index 000000000000..df71822fd27b --- /dev/null +++ b/include/asm-mips/mach-generic/dma-coherence.h | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> | ||
7 | * | ||
8 | */ | ||
9 | #ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H | ||
10 | #define __ASM_MACH_GENERIC_DMA_COHERENCE_H | ||
11 | |||
12 | struct device; | ||
13 | |||
14 | static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) | ||
15 | { | ||
16 | return virt_to_phys(addr); | ||
17 | } | ||
18 | |||
19 | static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) | ||
20 | { | ||
21 | return page_to_phys(page); | ||
22 | } | ||
23 | |||
24 | static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) | ||
25 | { | ||
26 | return dma_addr; | ||
27 | } | ||
28 | |||
29 | static void plat_unmap_dma_mem(dma_addr_t dma_addr) | ||
30 | { | ||
31 | } | ||
32 | |||
33 | static inline int plat_device_is_coherent(struct device *dev) | ||
34 | { | ||
35 | #ifdef CONFIG_DMA_COHERENT | ||
36 | return 1; | ||
37 | #endif | ||
38 | #ifdef CONFIG_DMA_NONCOHERENT | ||
39 | return 0; | ||
40 | #endif | ||
41 | } | ||
42 | |||
43 | #endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */ | ||
diff --git a/include/asm-mips/mach-generic/kmalloc.h b/include/asm-mips/mach-generic/kmalloc.h index 410ab5f6c563..b8e6deba352f 100644 --- a/include/asm-mips/mach-generic/kmalloc.h +++ b/include/asm-mips/mach-generic/kmalloc.h | |||
@@ -5,6 +5,7 @@ | |||
5 | #ifndef CONFIG_DMA_COHERENT | 5 | #ifndef CONFIG_DMA_COHERENT |
6 | /* | 6 | /* |
7 | * Total overkill for most systems but need as a safe default. | 7 | * Total overkill for most systems but need as a safe default. |
8 | * Set this one if any device in the system might do non-coherent DMA. | ||
8 | */ | 9 | */ |
9 | #define ARCH_KMALLOC_MINALIGN 128 | 10 | #define ARCH_KMALLOC_MINALIGN 128 |
10 | #endif | 11 | #endif |
diff --git a/include/asm-mips/mach-ip27/dma-coherence.h b/include/asm-mips/mach-ip27/dma-coherence.h new file mode 100644 index 000000000000..659816e200d4 --- /dev/null +++ b/include/asm-mips/mach-ip27/dma-coherence.h | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> | ||
7 | * | ||
8 | */ | ||
9 | #ifndef __ASM_MACH_IP27_DMA_COHERENCE_H | ||
10 | #define __ASM_MACH_IP27_DMA_COHERENCE_H | ||
11 | |||
12 | #include <asm/pci/bridge.h> | ||
13 | |||
14 | #define pdev_to_baddr(pdev, addr) \ | ||
15 | (BRIDGE_CONTROLLER(pdev->bus)->baddr + (addr)) | ||
16 | #define dev_to_baddr(dev, addr) \ | ||
17 | pdev_to_baddr(to_pci_dev(dev), (addr)) | ||
18 | |||
19 | struct device; | ||
20 | |||
21 | static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) | ||
22 | { | ||
23 | dma_addr_t pa = dev_to_baddr(dev, virt_to_phys(addr)); | ||
24 | |||
25 | return pa; | ||
26 | } | ||
27 | |||
28 | static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) | ||
29 | { | ||
30 | dma_addr_t pa = dev_to_baddr(dev, page_to_phys(page)); | ||
31 | |||
32 | return pa; | ||
33 | } | ||
34 | |||
35 | static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) | ||
36 | { | ||
37 | return dma_addr & (0xffUL << 56); | ||
38 | } | ||
39 | |||
40 | static void plat_unmap_dma_mem(dma_addr_t dma_addr) | ||
41 | { | ||
42 | } | ||
43 | |||
44 | static inline int plat_device_is_coherent(struct device *dev) | ||
45 | { | ||
46 | return 1; /* IP27 non-cohernet mode is unsupported */ | ||
47 | } | ||
48 | |||
49 | #endif /* __ASM_MACH_IP27_DMA_COHERENCE_H */ | ||
diff --git a/include/asm-mips/mach-ip32/dma-coherence.h b/include/asm-mips/mach-ip32/dma-coherence.h new file mode 100644 index 000000000000..950be17bbb86 --- /dev/null +++ b/include/asm-mips/mach-ip32/dma-coherence.h | |||
@@ -0,0 +1,71 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> | ||
7 | * | ||
8 | */ | ||
9 | #ifndef __ASM_MACH_IP35_DMA_COHERENCE_H | ||
10 | #define __ASM_MACH_IP35_DMA_COHERENCE_H | ||
11 | |||
12 | #include <asm/ip32/crime.h> | ||
13 | |||
14 | struct device; | ||
15 | |||
16 | /* | ||
17 | * Few notes. | ||
18 | * 1. CPU sees memory as two chunks: 0-256M@0x0, and the rest @0x40000000+256M | ||
19 | * 2. PCI sees memory as one big chunk @0x0 (or we could use 0x40000000 for | ||
20 | * native-endian) | ||
21 | * 3. All other devices see memory as one big chunk at 0x40000000 | ||
22 | * 4. Non-PCI devices will pass NULL as struct device* | ||
23 | * | ||
24 | * Thus we translate differently, depending on device. | ||
25 | */ | ||
26 | |||
27 | #define RAM_OFFSET_MASK 0x3fffffffUL | ||
28 | |||
29 | static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) | ||
30 | { | ||
31 | dma_addr_t pa = virt_to_phys(addr) & RAM_OFFSET_MASK; | ||
32 | |||
33 | if (dev == NULL) | ||
34 | pa += CRIME_HI_MEM_BASE; | ||
35 | |||
36 | return pa; | ||
37 | } | ||
38 | |||
39 | static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) | ||
40 | { | ||
41 | dma_addr_t pa; | ||
42 | |||
43 | pa = page_to_phys(page) & RAM_OFFSET_MASK; | ||
44 | |||
45 | if (dev == NULL) | ||
46 | pa += CRIME_HI_MEM_BASE; | ||
47 | |||
48 | return pa; | ||
49 | } | ||
50 | |||
51 | /* This is almost certainly wrong but it's what dma-ip32.c used to use */ | ||
52 | static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) | ||
53 | { | ||
54 | unsigned long addr = dma_addr & RAM_OFFSET_MASK; | ||
55 | |||
56 | if (dma_addr >= 256*1024*1024) | ||
57 | addr += CRIME_HI_MEM_BASE; | ||
58 | |||
59 | return addr; | ||
60 | } | ||
61 | |||
62 | static void plat_unmap_dma_mem(dma_addr_t dma_addr) | ||
63 | { | ||
64 | } | ||
65 | |||
66 | static inline int plat_device_is_coherent(struct device *dev) | ||
67 | { | ||
68 | return 0; /* IP32 is non-cohernet */ | ||
69 | } | ||
70 | |||
71 | #endif /* __ASM_MACH_IP35_DMA_COHERENCE_H */ | ||
diff --git a/include/asm-mips/mach-jazz/dma-coherence.h b/include/asm-mips/mach-jazz/dma-coherence.h new file mode 100644 index 000000000000..d66979a124a8 --- /dev/null +++ b/include/asm-mips/mach-jazz/dma-coherence.h | |||
@@ -0,0 +1,40 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> | ||
7 | */ | ||
8 | #ifndef __ASM_MACH_JAZZ_DMA_COHERENCE_H | ||
9 | #define __ASM_MACH_JAZZ_DMA_COHERENCE_H | ||
10 | |||
11 | #include <asm/jazzdma.h> | ||
12 | |||
13 | struct device; | ||
14 | |||
15 | static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) | ||
16 | { | ||
17 | return vdma_alloc(virt_to_phys(addr), size); | ||
18 | } | ||
19 | |||
20 | static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) | ||
21 | { | ||
22 | return vdma_alloc(page_to_phys(page), PAGE_SIZE); | ||
23 | } | ||
24 | |||
25 | static unsigned long plat_dma_addr_to_phys(dma_addr_t dma_addr) | ||
26 | { | ||
27 | return vdma_log2phys(dma_addr); | ||
28 | } | ||
29 | |||
30 | static void plat_unmap_dma_mem(dma_addr_t dma_addr) | ||
31 | { | ||
32 | vdma_free(dma_addr); | ||
33 | } | ||
34 | |||
35 | static inline int plat_device_is_coherent(struct device *dev) | ||
36 | { | ||
37 | return 0; | ||
38 | } | ||
39 | |||
40 | #endif /* __ASM_MACH_JAZZ_DMA_COHERENCE_H */ | ||
diff --git a/include/asm-mips/spinlock.h b/include/asm-mips/spinlock.h index fc3217fc1118..f1755d28a36a 100644 --- a/include/asm-mips/spinlock.h +++ b/include/asm-mips/spinlock.h | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 1999, 2000, 06 by Ralf Baechle | 6 | * Copyright (C) 1999, 2000, 06 Ralf Baechle (ralf@linux-mips.org) |
7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. | 7 | * Copyright (C) 1999, 2000 Silicon Graphics, Inc. |
8 | */ | 8 | */ |
9 | #ifndef _ASM_SPINLOCK_H | 9 | #ifndef _ASM_SPINLOCK_H |
@@ -49,11 +49,18 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) | |||
49 | __asm__ __volatile__( | 49 | __asm__ __volatile__( |
50 | " .set noreorder # __raw_spin_lock \n" | 50 | " .set noreorder # __raw_spin_lock \n" |
51 | "1: ll %1, %2 \n" | 51 | "1: ll %1, %2 \n" |
52 | " bnez %1, 1b \n" | 52 | " bnez %1, 2f \n" |
53 | " li %1, 1 \n" | 53 | " li %1, 1 \n" |
54 | " sc %1, %0 \n" | 54 | " sc %1, %0 \n" |
55 | " beqz %1, 1b \n" | 55 | " beqz %1, 2f \n" |
56 | " nop \n" | 56 | " nop \n" |
57 | " .subsection 2 \n" | ||
58 | "2: ll %1, %2 \n" | ||
59 | " bnez %1, 2b \n" | ||
60 | " li %1, 1 \n" | ||
61 | " b 1b \n" | ||
62 | " nop \n" | ||
63 | " .previous \n" | ||
57 | " .set reorder \n" | 64 | " .set reorder \n" |
58 | : "=m" (lock->lock), "=&r" (tmp) | 65 | : "=m" (lock->lock), "=&r" (tmp) |
59 | : "m" (lock->lock) | 66 | : "m" (lock->lock) |
@@ -99,8 +106,12 @@ static inline unsigned int __raw_spin_trylock(raw_spinlock_t *lock) | |||
99 | "1: ll %0, %3 \n" | 106 | "1: ll %0, %3 \n" |
100 | " ori %2, %0, 1 \n" | 107 | " ori %2, %0, 1 \n" |
101 | " sc %2, %1 \n" | 108 | " sc %2, %1 \n" |
102 | " beqz %2, 1b \n" | 109 | " beqz %2, 2f \n" |
103 | " andi %2, %0, 1 \n" | 110 | " andi %2, %0, 1 \n" |
111 | " .subsection 2 \n" | ||
112 | "2: b 1b \n" | ||
113 | " nop \n" | ||
114 | " .previous \n" | ||
104 | " .set reorder" | 115 | " .set reorder" |
105 | : "=&r" (temp), "=m" (lock->lock), "=&r" (res) | 116 | : "=&r" (temp), "=m" (lock->lock), "=&r" (res) |
106 | : "m" (lock->lock) | 117 | : "m" (lock->lock) |
@@ -154,11 +165,18 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) | |||
154 | __asm__ __volatile__( | 165 | __asm__ __volatile__( |
155 | " .set noreorder # __raw_read_lock \n" | 166 | " .set noreorder # __raw_read_lock \n" |
156 | "1: ll %1, %2 \n" | 167 | "1: ll %1, %2 \n" |
157 | " bltz %1, 1b \n" | 168 | " bltz %1, 2f \n" |
158 | " addu %1, 1 \n" | 169 | " addu %1, 1 \n" |
159 | " sc %1, %0 \n" | 170 | " sc %1, %0 \n" |
160 | " beqz %1, 1b \n" | 171 | " beqz %1, 1b \n" |
161 | " nop \n" | 172 | " nop \n" |
173 | " .subsection 2 \n" | ||
174 | "2: ll %1, %2 \n" | ||
175 | " bltz %1, 2b \n" | ||
176 | " addu %1, 1 \n" | ||
177 | " b 1b \n" | ||
178 | " nop \n" | ||
179 | " .previous \n" | ||
162 | " .set reorder \n" | 180 | " .set reorder \n" |
163 | : "=m" (rw->lock), "=&r" (tmp) | 181 | : "=m" (rw->lock), "=&r" (tmp) |
164 | : "m" (rw->lock) | 182 | : "m" (rw->lock) |
@@ -192,8 +210,12 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw) | |||
192 | "1: ll %1, %2 \n" | 210 | "1: ll %1, %2 \n" |
193 | " sub %1, 1 \n" | 211 | " sub %1, 1 \n" |
194 | " sc %1, %0 \n" | 212 | " sc %1, %0 \n" |
195 | " beqz %1, 1b \n" | 213 | " beqz %1, 2f \n" |
214 | " nop \n" | ||
215 | " .subsection 2 \n" | ||
216 | "2: b 1b \n" | ||
196 | " nop \n" | 217 | " nop \n" |
218 | " .previous \n" | ||
197 | " .set reorder \n" | 219 | " .set reorder \n" |
198 | : "=m" (rw->lock), "=&r" (tmp) | 220 | : "=m" (rw->lock), "=&r" (tmp) |
199 | : "m" (rw->lock) | 221 | : "m" (rw->lock) |
@@ -222,11 +244,18 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) | |||
222 | __asm__ __volatile__( | 244 | __asm__ __volatile__( |
223 | " .set noreorder # __raw_write_lock \n" | 245 | " .set noreorder # __raw_write_lock \n" |
224 | "1: ll %1, %2 \n" | 246 | "1: ll %1, %2 \n" |
225 | " bnez %1, 1b \n" | 247 | " bnez %1, 2f \n" |
226 | " lui %1, 0x8000 \n" | 248 | " lui %1, 0x8000 \n" |
227 | " sc %1, %0 \n" | 249 | " sc %1, %0 \n" |
228 | " beqz %1, 1b \n" | 250 | " beqz %1, 2f \n" |
251 | " nop \n" | ||
252 | " .subsection 2 \n" | ||
253 | "2: ll %1, %2 \n" | ||
254 | " bnez %1, 2b \n" | ||
255 | " lui %1, 0x8000 \n" | ||
256 | " b 1b \n" | ||
229 | " nop \n" | 257 | " nop \n" |
258 | " .previous \n" | ||
230 | " .set reorder \n" | 259 | " .set reorder \n" |
231 | : "=m" (rw->lock), "=&r" (tmp) | 260 | : "=m" (rw->lock), "=&r" (tmp) |
232 | : "m" (rw->lock) | 261 | : "m" (rw->lock) |
@@ -322,12 +351,15 @@ static inline int __raw_write_trylock(raw_rwlock_t *rw) | |||
322 | " bnez %1, 2f \n" | 351 | " bnez %1, 2f \n" |
323 | " lui %1, 0x8000 \n" | 352 | " lui %1, 0x8000 \n" |
324 | " sc %1, %0 \n" | 353 | " sc %1, %0 \n" |
325 | " beqz %1, 1b \n" | 354 | " beqz %1, 3f \n" |
326 | " nop \n" | 355 | " li %2, 1 \n" |
356 | "2: \n" | ||
327 | __WEAK_ORDERING_MB | 357 | __WEAK_ORDERING_MB |
328 | " li %2, 1 \n" | 358 | " .subsection 2 \n" |
359 | "3: b 1b \n" | ||
360 | " li %2, 0 \n" | ||
361 | " .previous \n" | ||
329 | " .set reorder \n" | 362 | " .set reorder \n" |
330 | "2: \n" | ||
331 | : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) | 363 | : "=m" (rw->lock), "=&r" (tmp), "=&r" (ret) |
332 | : "m" (rw->lock) | 364 | : "m" (rw->lock) |
333 | : "memory"); | 365 | : "memory"); |
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 5e1289c85ed9..597a3743f6a1 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h | |||
@@ -110,7 +110,10 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val) | |||
110 | " move %2, %z4 \n" | 110 | " move %2, %z4 \n" |
111 | " .set mips3 \n" | 111 | " .set mips3 \n" |
112 | " sc %2, %1 \n" | 112 | " sc %2, %1 \n" |
113 | " beqz %2, 1b \n" | 113 | " beqz %2, 2f \n" |
114 | " .subsection 2 \n" | ||
115 | "2: b 1b \n" | ||
116 | " .previous \n" | ||
114 | " .set mips0 \n" | 117 | " .set mips0 \n" |
115 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) | 118 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) |
116 | : "R" (*m), "Jr" (val) | 119 | : "R" (*m), "Jr" (val) |
@@ -155,7 +158,10 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val) | |||
155 | "1: lld %0, %3 # xchg_u64 \n" | 158 | "1: lld %0, %3 # xchg_u64 \n" |
156 | " move %2, %z4 \n" | 159 | " move %2, %z4 \n" |
157 | " scd %2, %1 \n" | 160 | " scd %2, %1 \n" |
158 | " beqz %2, 1b \n" | 161 | " beqz %2, 2f \n" |
162 | " .subsection 2 \n" | ||
163 | "2: b 1b \n" | ||
164 | " .previous \n" | ||
159 | " .set mips0 \n" | 165 | " .set mips0 \n" |
160 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) | 166 | : "=&r" (retval), "=m" (*m), "=&r" (dummy) |
161 | : "R" (*m), "Jr" (val) | 167 | : "R" (*m), "Jr" (val) |
@@ -232,8 +238,11 @@ static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old, | |||
232 | " move $1, %z4 \n" | 238 | " move $1, %z4 \n" |
233 | " .set mips3 \n" | 239 | " .set mips3 \n" |
234 | " sc $1, %1 \n" | 240 | " sc $1, %1 \n" |
235 | " beqz $1, 1b \n" | 241 | " beqz $1, 3f \n" |
236 | "2: \n" | 242 | "2: \n" |
243 | " .subsection 2 \n" | ||
244 | "3: b 1b \n" | ||
245 | " .previous \n" | ||
237 | " .set pop \n" | 246 | " .set pop \n" |
238 | : "=&r" (retval), "=R" (*m) | 247 | : "=&r" (retval), "=R" (*m) |
239 | : "R" (*m), "Jr" (old), "Jr" (new) | 248 | : "R" (*m), "Jr" (old), "Jr" (new) |
@@ -283,8 +292,11 @@ static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old, | |||
283 | " bne %0, %z3, 2f \n" | 292 | " bne %0, %z3, 2f \n" |
284 | " move $1, %z4 \n" | 293 | " move $1, %z4 \n" |
285 | " scd $1, %1 \n" | 294 | " scd $1, %1 \n" |
286 | " beqz $1, 1b \n" | 295 | " beqz $1, 3f \n" |
287 | "2: \n" | 296 | "2: \n" |
297 | " .subsection 2 \n" | ||
298 | "3: b 1b \n" | ||
299 | " .previous \n" | ||
288 | " .set pop \n" | 300 | " .set pop \n" |
289 | : "=&r" (retval), "=R" (*m) | 301 | : "=&r" (retval), "=R" (*m) |
290 | : "R" (*m), "Jr" (old), "Jr" (new) | 302 | : "R" (*m), "Jr" (old), "Jr" (new) |
diff --git a/include/asm-mips/uaccess.h b/include/asm-mips/uaccess.h index 825fcbd9eabd..3eff8d8fe28a 100644 --- a/include/asm-mips/uaccess.h +++ b/include/asm-mips/uaccess.h | |||
@@ -265,10 +265,14 @@ do { \ | |||
265 | */ | 265 | */ |
266 | #define __get_user_asm_ll32(val, addr) \ | 266 | #define __get_user_asm_ll32(val, addr) \ |
267 | { \ | 267 | { \ |
268 | union { \ | ||
269 | unsigned long long l; \ | ||
270 | __typeof__(*(addr)) t; \ | ||
271 | } __gu_tmp; \ | ||
272 | \ | ||
268 | __asm__ __volatile__( \ | 273 | __asm__ __volatile__( \ |
269 | "1: lw %1, (%3) \n" \ | 274 | "1: lw %1, (%3) \n" \ |
270 | "2: lw %D1, 4(%3) \n" \ | 275 | "2: lw %D1, 4(%3) \n" \ |
271 | " move %0, $0 \n" \ | ||
272 | "3: .section .fixup,\"ax\" \n" \ | 276 | "3: .section .fixup,\"ax\" \n" \ |
273 | "4: li %0, %4 \n" \ | 277 | "4: li %0, %4 \n" \ |
274 | " move %1, $0 \n" \ | 278 | " move %1, $0 \n" \ |
@@ -279,8 +283,10 @@ do { \ | |||
279 | " " __UA_ADDR " 1b, 4b \n" \ | 283 | " " __UA_ADDR " 1b, 4b \n" \ |
280 | " " __UA_ADDR " 2b, 4b \n" \ | 284 | " " __UA_ADDR " 2b, 4b \n" \ |
281 | " .previous \n" \ | 285 | " .previous \n" \ |
282 | : "=r" (__gu_err), "=&r" (val) \ | 286 | : "=r" (__gu_err), "=&r" (__gu_tmp.l) \ |
283 | : "0" (0), "r" (addr), "i" (-EFAULT)); \ | 287 | : "0" (0), "r" (addr), "i" (-EFAULT)); \ |
288 | \ | ||
289 | (val) = __gu_tmp.t; \ | ||
284 | } | 290 | } |
285 | 291 | ||
286 | /* | 292 | /* |
diff --git a/include/asm-powerpc/cell-pmu.h b/include/asm-powerpc/cell-pmu.h index e8c2ebd3ddda..35b95773746c 100644 --- a/include/asm-powerpc/cell-pmu.h +++ b/include/asm-powerpc/cell-pmu.h | |||
@@ -53,6 +53,11 @@ | |||
53 | #define CBE_PM_CTR_POLARITY 0x01000000 | 53 | #define CBE_PM_CTR_POLARITY 0x01000000 |
54 | #define CBE_PM_CTR_COUNT_CYCLES 0x00800000 | 54 | #define CBE_PM_CTR_COUNT_CYCLES 0x00800000 |
55 | #define CBE_PM_CTR_ENABLE 0x00400000 | 55 | #define CBE_PM_CTR_ENABLE 0x00400000 |
56 | #define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) | ||
57 | #define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) | ||
58 | #define PM07_CTR_POLARITY(x) (((x) & 1) << 24) | ||
59 | #define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) | ||
60 | #define PM07_CTR_ENABLE(x) (((x) & 1) << 22) | ||
56 | 61 | ||
57 | /* Macros for the pm_status register. */ | 62 | /* Macros for the pm_status register. */ |
58 | #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) | 63 | #define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7))) |
@@ -89,8 +94,7 @@ extern void cbe_read_trace_buffer(u32 cpu, u64 *buf); | |||
89 | 94 | ||
90 | extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); | 95 | extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask); |
91 | extern void cbe_disable_pm_interrupts(u32 cpu); | 96 | extern void cbe_disable_pm_interrupts(u32 cpu); |
92 | extern u32 cbe_query_pm_interrupts(u32 cpu); | 97 | extern u32 cbe_get_and_clear_pm_interrupts(u32 cpu); |
93 | extern u32 cbe_clear_pm_interrupts(u32 cpu); | ||
94 | extern void cbe_sync_irq(int node); | 98 | extern void cbe_sync_irq(int node); |
95 | 99 | ||
96 | /* Utility functions, macros */ | 100 | /* Utility functions, macros */ |
@@ -103,11 +107,4 @@ extern u32 cbe_get_hw_thread_id(int cpu); | |||
103 | #define CBE_COUNT_PROBLEM_MODE 2 | 107 | #define CBE_COUNT_PROBLEM_MODE 2 |
104 | #define CBE_COUNT_ALL_MODES 3 | 108 | #define CBE_COUNT_ALL_MODES 3 |
105 | 109 | ||
106 | /* Macros for the pm07_control registers. */ | ||
107 | #define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26) | ||
108 | #define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25) | ||
109 | #define PM07_CTR_POLARITY(x) (((x) & 1) << 24) | ||
110 | #define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23) | ||
111 | #define PM07_CTR_ENABLE(x) (((x) & 1) << 22) | ||
112 | |||
113 | #endif /* __ASM_CELL_PMU_H__ */ | 110 | #endif /* __ASM_CELL_PMU_H__ */ |
diff --git a/include/asm-powerpc/floppy.h b/include/asm-powerpc/floppy.h index fd242a22331c..a0f14eea1da5 100644 --- a/include/asm-powerpc/floppy.h +++ b/include/asm-powerpc/floppy.h | |||
@@ -17,28 +17,115 @@ | |||
17 | #define fd_outb(value,port) outb_p(value,port) | 17 | #define fd_outb(value,port) outb_p(value,port) |
18 | 18 | ||
19 | #define fd_enable_dma() enable_dma(FLOPPY_DMA) | 19 | #define fd_enable_dma() enable_dma(FLOPPY_DMA) |
20 | #define fd_disable_dma() disable_dma(FLOPPY_DMA) | 20 | #define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA) |
21 | #define fd_request_dma() request_dma(FLOPPY_DMA, "floppy") | 21 | #define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA) |
22 | #define fd_free_dma() free_dma(FLOPPY_DMA) | ||
23 | #define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) | 22 | #define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA) |
24 | #define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode) | 23 | #define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode) |
25 | #define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count) | 24 | #define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count) |
25 | #define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA) | ||
26 | #define fd_enable_irq() enable_irq(FLOPPY_IRQ) | 26 | #define fd_enable_irq() enable_irq(FLOPPY_IRQ) |
27 | #define fd_disable_irq() disable_irq(FLOPPY_IRQ) | 27 | #define fd_disable_irq() disable_irq(FLOPPY_IRQ) |
28 | #define fd_cacheflush(addr,size) /* nothing */ | 28 | #define fd_cacheflush(addr,size) /* nothing */ |
29 | #define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \ | ||
30 | IRQF_DISABLED, "floppy", NULL) | ||
31 | #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); | 29 | #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); |
32 | 30 | ||
33 | #ifdef CONFIG_PCI | ||
34 | |||
35 | #include <linux/pci.h> | 31 | #include <linux/pci.h> |
36 | #include <asm/ppc-pci.h> /* for ppc64_isabridge_dev */ | 32 | #include <asm/ppc-pci.h> /* for ppc64_isabridge_dev */ |
37 | 33 | ||
38 | #define fd_dma_setup(addr,size,mode,io) powerpc_fd_dma_setup(addr,size,mode,io) | 34 | #define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io) |
35 | |||
36 | static int fd_request_dma(void); | ||
37 | |||
38 | struct fd_dma_ops { | ||
39 | void (*_disable_dma)(unsigned int dmanr); | ||
40 | void (*_free_dma)(unsigned int dmanr); | ||
41 | int (*_get_dma_residue)(unsigned int dummy); | ||
42 | int (*_dma_setup)(char *addr, unsigned long size, int mode, int io); | ||
43 | }; | ||
44 | |||
45 | static int virtual_dma_count; | ||
46 | static int virtual_dma_residue; | ||
47 | static char *virtual_dma_addr; | ||
48 | static int virtual_dma_mode; | ||
49 | static int doing_vdma; | ||
50 | static struct fd_dma_ops *fd_ops; | ||
51 | |||
52 | static irqreturn_t floppy_hardint(int irq, void *dev_id) | ||
53 | { | ||
54 | unsigned char st; | ||
55 | int lcount; | ||
56 | char *lptr; | ||
57 | |||
58 | if (!doing_vdma) | ||
59 | return floppy_interrupt(irq, dev_id); | ||
60 | |||
61 | |||
62 | st = 1; | ||
63 | for (lcount=virtual_dma_count, lptr=virtual_dma_addr; | ||
64 | lcount; lcount--, lptr++) { | ||
65 | st=inb(virtual_dma_port+4) & 0xa0 ; | ||
66 | if (st != 0xa0) | ||
67 | break; | ||
68 | if (virtual_dma_mode) | ||
69 | outb_p(*lptr, virtual_dma_port+5); | ||
70 | else | ||
71 | *lptr = inb_p(virtual_dma_port+5); | ||
72 | } | ||
73 | virtual_dma_count = lcount; | ||
74 | virtual_dma_addr = lptr; | ||
75 | st = inb(virtual_dma_port+4); | ||
76 | |||
77 | if (st == 0x20) | ||
78 | return IRQ_HANDLED; | ||
79 | if (!(st & 0x20)) { | ||
80 | virtual_dma_residue += virtual_dma_count; | ||
81 | virtual_dma_count=0; | ||
82 | doing_vdma = 0; | ||
83 | floppy_interrupt(irq, dev_id); | ||
84 | return IRQ_HANDLED; | ||
85 | } | ||
86 | return IRQ_HANDLED; | ||
87 | } | ||
39 | 88 | ||
40 | static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size, | 89 | static void vdma_disable_dma(unsigned int dummy) |
41 | int mode, int io) | 90 | { |
91 | doing_vdma = 0; | ||
92 | virtual_dma_residue += virtual_dma_count; | ||
93 | virtual_dma_count=0; | ||
94 | } | ||
95 | |||
96 | static void vdma_nop(unsigned int dummy) | ||
97 | { | ||
98 | } | ||
99 | |||
100 | |||
101 | static int vdma_get_dma_residue(unsigned int dummy) | ||
102 | { | ||
103 | return virtual_dma_count + virtual_dma_residue; | ||
104 | } | ||
105 | |||
106 | |||
107 | static int fd_request_irq(void) | ||
108 | { | ||
109 | if (can_use_virtual_dma) | ||
110 | return request_irq(FLOPPY_IRQ, floppy_hardint, | ||
111 | IRQF_DISABLED, "floppy", NULL); | ||
112 | else | ||
113 | return request_irq(FLOPPY_IRQ, floppy_interrupt, | ||
114 | IRQF_DISABLED, "floppy", NULL); | ||
115 | } | ||
116 | |||
117 | static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io) | ||
118 | { | ||
119 | doing_vdma = 1; | ||
120 | virtual_dma_port = io; | ||
121 | virtual_dma_mode = (mode == DMA_MODE_WRITE); | ||
122 | virtual_dma_addr = addr; | ||
123 | virtual_dma_count = size; | ||
124 | virtual_dma_residue = 0; | ||
125 | return 0; | ||
126 | } | ||
127 | |||
128 | static int hard_dma_setup(char *addr, unsigned long size, int mode, int io) | ||
42 | { | 129 | { |
43 | static unsigned long prev_size; | 130 | static unsigned long prev_size; |
44 | static dma_addr_t bus_addr = 0; | 131 | static dma_addr_t bus_addr = 0; |
@@ -46,6 +133,7 @@ static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size, | |||
46 | static int prev_dir; | 133 | static int prev_dir; |
47 | int dir; | 134 | int dir; |
48 | 135 | ||
136 | doing_vdma = 0; | ||
49 | dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE; | 137 | dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE; |
50 | 138 | ||
51 | if (bus_addr | 139 | if (bus_addr |
@@ -74,11 +162,32 @@ static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size, | |||
74 | return 0; | 162 | return 0; |
75 | } | 163 | } |
76 | 164 | ||
77 | #endif /* CONFIG_PCI */ | 165 | static struct fd_dma_ops real_dma_ops = |
166 | { | ||
167 | ._disable_dma = disable_dma, | ||
168 | ._free_dma = free_dma, | ||
169 | ._get_dma_residue = get_dma_residue, | ||
170 | ._dma_setup = hard_dma_setup | ||
171 | }; | ||
172 | |||
173 | static struct fd_dma_ops virt_dma_ops = | ||
174 | { | ||
175 | ._disable_dma = vdma_disable_dma, | ||
176 | ._free_dma = vdma_nop, | ||
177 | ._get_dma_residue = vdma_get_dma_residue, | ||
178 | ._dma_setup = vdma_dma_setup | ||
179 | }; | ||
78 | 180 | ||
79 | __inline__ void virtual_dma_init(void) | 181 | static int fd_request_dma() |
80 | { | 182 | { |
81 | /* Nothing to do on PowerPC */ | 183 | if (can_use_virtual_dma & 1) { |
184 | fd_ops = &virt_dma_ops; | ||
185 | return 0; | ||
186 | } | ||
187 | else { | ||
188 | fd_ops = &real_dma_ops; | ||
189 | return request_dma(FLOPPY_DMA, "floppy"); | ||
190 | } | ||
82 | } | 191 | } |
83 | 192 | ||
84 | static int FDC1 = 0x3f0; | 193 | static int FDC1 = 0x3f0; |
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index b634e16575f2..0f9f2dd24a79 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h | |||
@@ -129,7 +129,6 @@ struct spu { | |||
129 | struct spu_runqueue *rq; | 129 | struct spu_runqueue *rq; |
130 | unsigned long long timestamp; | 130 | unsigned long long timestamp; |
131 | pid_t pid; | 131 | pid_t pid; |
132 | int prio; | ||
133 | int class_0_pending; | 132 | int class_0_pending; |
134 | spinlock_t register_lock; | 133 | spinlock_t register_lock; |
135 | 134 | ||
diff --git a/include/asm-powerpc/systbl.h b/include/asm-powerpc/systbl.h index 97b435484177..418e5c7e972c 100644 --- a/include/asm-powerpc/systbl.h +++ b/include/asm-powerpc/systbl.h | |||
@@ -305,3 +305,4 @@ SYSCALL_SPU(faccessat) | |||
305 | COMPAT_SYS_SPU(get_robust_list) | 305 | COMPAT_SYS_SPU(get_robust_list) |
306 | COMPAT_SYS_SPU(set_robust_list) | 306 | COMPAT_SYS_SPU(set_robust_list) |
307 | COMPAT_SYS(move_pages) | 307 | COMPAT_SYS(move_pages) |
308 | SYSCALL_SPU(getcpu) | ||
diff --git a/include/asm-powerpc/ucc_slow.h b/include/asm-powerpc/ucc_slow.h index ca93bc99237e..1babad99c719 100644 --- a/include/asm-powerpc/ucc_slow.h +++ b/include/asm-powerpc/ucc_slow.h | |||
@@ -150,7 +150,7 @@ struct ucc_slow_info { | |||
150 | int ucc_num; | 150 | int ucc_num; |
151 | enum qe_clock rx_clock; | 151 | enum qe_clock rx_clock; |
152 | enum qe_clock tx_clock; | 152 | enum qe_clock tx_clock; |
153 | struct ucc_slow *us_regs; | 153 | struct ucc_slow *regs; |
154 | int irq; | 154 | int irq; |
155 | u16 uccm_mask; | 155 | u16 uccm_mask; |
156 | int data_mem_part; | 156 | int data_mem_part; |
diff --git a/include/asm-powerpc/udbg.h b/include/asm-powerpc/udbg.h index 4cbc313aa02a..d03d8557f706 100644 --- a/include/asm-powerpc/udbg.h +++ b/include/asm-powerpc/udbg.h | |||
@@ -46,6 +46,7 @@ extern void __init udbg_init_iseries(void); | |||
46 | extern void __init udbg_init_rtas_panel(void); | 46 | extern void __init udbg_init_rtas_panel(void); |
47 | extern void __init udbg_init_rtas_console(void); | 47 | extern void __init udbg_init_rtas_console(void); |
48 | extern void __init udbg_init_debug_beat(void); | 48 | extern void __init udbg_init_debug_beat(void); |
49 | extern void __init udbg_init_btext(void); | ||
49 | 50 | ||
50 | #endif /* __KERNEL__ */ | 51 | #endif /* __KERNEL__ */ |
51 | #endif /* _ASM_POWERPC_UDBG_H */ | 52 | #endif /* _ASM_POWERPC_UDBG_H */ |
diff --git a/include/asm-powerpc/vdso.h b/include/asm-powerpc/vdso.h index b9f9118b1607..26fc449bd989 100644 --- a/include/asm-powerpc/vdso.h +++ b/include/asm-powerpc/vdso.h | |||
@@ -18,16 +18,11 @@ | |||
18 | 18 | ||
19 | #ifndef __ASSEMBLY__ | 19 | #ifndef __ASSEMBLY__ |
20 | 20 | ||
21 | extern unsigned int vdso64_pages; | ||
22 | extern unsigned int vdso32_pages; | ||
23 | |||
24 | /* Offsets relative to thread->vdso_base */ | 21 | /* Offsets relative to thread->vdso_base */ |
25 | extern unsigned long vdso64_rt_sigtramp; | 22 | extern unsigned long vdso64_rt_sigtramp; |
26 | extern unsigned long vdso32_sigtramp; | 23 | extern unsigned long vdso32_sigtramp; |
27 | extern unsigned long vdso32_rt_sigtramp; | 24 | extern unsigned long vdso32_rt_sigtramp; |
28 | 25 | ||
29 | extern void vdso_init(void); | ||
30 | |||
31 | #else /* __ASSEMBLY__ */ | 26 | #else /* __ASSEMBLY__ */ |
32 | 27 | ||
33 | #ifdef __VDSO64__ | 28 | #ifdef __VDSO64__ |
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h index 7a64ede53bb6..92fd02d7b177 100644 --- a/include/asm-ppc/ibm4xx.h +++ b/include/asm-ppc/ibm4xx.h | |||
@@ -109,6 +109,10 @@ void ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5, | |||
109 | #include <platforms/4xx/ocotea.h> | 109 | #include <platforms/4xx/ocotea.h> |
110 | #endif | 110 | #endif |
111 | 111 | ||
112 | #if defined(CONFIG_TAISHAN) | ||
113 | #include <platforms/4xx/taishan.h> | ||
114 | #endif | ||
115 | |||
112 | #ifndef __ASSEMBLY__ | 116 | #ifndef __ASSEMBLY__ |
113 | #ifdef CONFIG_40x | 117 | #ifdef CONFIG_40x |
114 | /* | 118 | /* |
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h index 6e7ec4c76178..9c21dc793d7b 100644 --- a/include/linux/i2c-id.h +++ b/include/linux/i2c-id.h | |||
@@ -232,7 +232,6 @@ | |||
232 | #define I2C_HW_SMBUS_PIIX4 0x040000 | 232 | #define I2C_HW_SMBUS_PIIX4 0x040000 |
233 | #define I2C_HW_SMBUS_ALI15X3 0x040001 | 233 | #define I2C_HW_SMBUS_ALI15X3 0x040001 |
234 | #define I2C_HW_SMBUS_VIA2 0x040002 | 234 | #define I2C_HW_SMBUS_VIA2 0x040002 |
235 | #define I2C_HW_SMBUS_VOODOO3 0x040003 | ||
236 | #define I2C_HW_SMBUS_I801 0x040004 | 235 | #define I2C_HW_SMBUS_I801 0x040004 |
237 | #define I2C_HW_SMBUS_AMD756 0x040005 | 236 | #define I2C_HW_SMBUS_AMD756 0x040005 |
238 | #define I2C_HW_SMBUS_SIS5595 0x040006 | 237 | #define I2C_HW_SMBUS_SIS5595 0x040006 |
@@ -248,13 +247,11 @@ | |||
248 | #define I2C_HW_SMBUS_OV519 0x040010 /* OV519 USB 1.1 webcam IC */ | 247 | #define I2C_HW_SMBUS_OV519 0x040010 /* OV519 USB 1.1 webcam IC */ |
249 | #define I2C_HW_SMBUS_OVFX2 0x040011 /* Cypress/OmniVision FX2 webcam */ | 248 | #define I2C_HW_SMBUS_OVFX2 0x040011 /* Cypress/OmniVision FX2 webcam */ |
250 | #define I2C_HW_SMBUS_CAFE 0x040012 /* Marvell 88ALP01 "CAFE" cam */ | 249 | #define I2C_HW_SMBUS_CAFE 0x040012 /* Marvell 88ALP01 "CAFE" cam */ |
250 | #define I2C_HW_SMBUS_ALI1563 0x040013 | ||
251 | 251 | ||
252 | /* --- ISA pseudo-adapter */ | 252 | /* --- ISA pseudo-adapter */ |
253 | #define I2C_HW_ISA 0x050000 | 253 | #define I2C_HW_ISA 0x050000 |
254 | 254 | ||
255 | /* --- IPMI pseudo-adapter */ | ||
256 | #define I2C_HW_IPMI 0x0b0000 | ||
257 | |||
258 | /* --- IPMB adapter */ | 255 | /* --- IPMB adapter */ |
259 | #define I2C_HW_IPMB 0x0c0000 | 256 | #define I2C_HW_IPMB 0x0c0000 |
260 | 257 | ||
diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 71e50d3e492f..9428092017e3 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h | |||
@@ -125,7 +125,12 @@ struct i2c_driver { | |||
125 | * it must be freed here. | 125 | * it must be freed here. |
126 | */ | 126 | */ |
127 | int (*detach_client)(struct i2c_client *); | 127 | int (*detach_client)(struct i2c_client *); |
128 | 128 | ||
129 | /* driver model interfaces that don't relate to enumeration */ | ||
130 | void (*shutdown)(struct i2c_client *); | ||
131 | int (*suspend)(struct i2c_client *, pm_message_t mesg); | ||
132 | int (*resume)(struct i2c_client *); | ||
133 | |||
129 | /* a ioctl like command that can be used to perform specific functions | 134 | /* a ioctl like command that can be used to perform specific functions |
130 | * with the device. | 135 | * with the device. |
131 | */ | 136 | */ |
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 8fb9c3e06eef..182a96f77c84 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h | |||
@@ -369,6 +369,7 @@ | |||
369 | #define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a | 369 | #define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a |
370 | #define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 | 370 | #define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380 |
371 | #define PCI_DEVICE_ID_ATI_IXP600_SRAID 0x4381 | 371 | #define PCI_DEVICE_ID_ATI_IXP600_SRAID 0x4381 |
372 | #define PCI_DEVICE_ID_ATI_IXP600_SMBUS 0x4385 | ||
372 | #define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c | 373 | #define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c |
373 | 374 | ||
374 | #define PCI_VENDOR_ID_VLSI 0x1004 | 375 | #define PCI_VENDOR_ID_VLSI 0x1004 |
diff --git a/include/net/xfrm.h b/include/net/xfrm.h index 16924cb772c9..92a1fc46ea59 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h | |||
@@ -946,14 +946,14 @@ extern int xfrm_state_mtu(struct xfrm_state *x, int mtu); | |||
946 | extern int xfrm_init_state(struct xfrm_state *x); | 946 | extern int xfrm_init_state(struct xfrm_state *x); |
947 | extern int xfrm4_rcv(struct sk_buff *skb); | 947 | extern int xfrm4_rcv(struct sk_buff *skb); |
948 | extern int xfrm4_output(struct sk_buff *skb); | 948 | extern int xfrm4_output(struct sk_buff *skb); |
949 | extern int xfrm4_tunnel_register(struct xfrm_tunnel *handler); | 949 | extern int xfrm4_tunnel_register(struct xfrm_tunnel *handler, unsigned short family); |
950 | extern int xfrm4_tunnel_deregister(struct xfrm_tunnel *handler); | 950 | extern int xfrm4_tunnel_deregister(struct xfrm_tunnel *handler, unsigned short family); |
951 | extern int xfrm6_rcv_spi(struct sk_buff *skb, __be32 spi); | 951 | extern int xfrm6_rcv_spi(struct sk_buff *skb, __be32 spi); |
952 | extern int xfrm6_rcv(struct sk_buff **pskb); | 952 | extern int xfrm6_rcv(struct sk_buff **pskb); |
953 | extern int xfrm6_input_addr(struct sk_buff *skb, xfrm_address_t *daddr, | 953 | extern int xfrm6_input_addr(struct sk_buff *skb, xfrm_address_t *daddr, |
954 | xfrm_address_t *saddr, u8 proto); | 954 | xfrm_address_t *saddr, u8 proto); |
955 | extern int xfrm6_tunnel_register(struct xfrm6_tunnel *handler); | 955 | extern int xfrm6_tunnel_register(struct xfrm6_tunnel *handler, unsigned short family); |
956 | extern int xfrm6_tunnel_deregister(struct xfrm6_tunnel *handler); | 956 | extern int xfrm6_tunnel_deregister(struct xfrm6_tunnel *handler, unsigned short family); |
957 | extern __be32 xfrm6_tunnel_alloc_spi(xfrm_address_t *saddr); | 957 | extern __be32 xfrm6_tunnel_alloc_spi(xfrm_address_t *saddr); |
958 | extern void xfrm6_tunnel_free_spi(xfrm_address_t *saddr); | 958 | extern void xfrm6_tunnel_free_spi(xfrm_address_t *saddr); |
959 | extern __be32 xfrm6_tunnel_spi_lookup(xfrm_address_t *saddr); | 959 | extern __be32 xfrm6_tunnel_spi_lookup(xfrm_address_t *saddr); |
diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c index f35c1a378d0f..aff6a779c9c8 100644 --- a/net/bridge/br_if.c +++ b/net/bridge/br_if.c | |||
@@ -108,6 +108,7 @@ static void port_carrier_check(struct work_struct *work) | |||
108 | spin_unlock_bh(&br->lock); | 108 | spin_unlock_bh(&br->lock); |
109 | } | 109 | } |
110 | done: | 110 | done: |
111 | dev_put(dev); | ||
111 | rtnl_unlock(); | 112 | rtnl_unlock(); |
112 | } | 113 | } |
113 | 114 | ||
@@ -161,7 +162,8 @@ static void del_nbp(struct net_bridge_port *p) | |||
161 | 162 | ||
162 | dev_set_promiscuity(dev, -1); | 163 | dev_set_promiscuity(dev, -1); |
163 | 164 | ||
164 | cancel_delayed_work(&p->carrier_check); | 165 | if (cancel_delayed_work(&p->carrier_check)) |
166 | dev_put(dev); | ||
165 | 167 | ||
166 | spin_lock_bh(&br->lock); | 168 | spin_lock_bh(&br->lock); |
167 | br_stp_disable_port(p); | 169 | br_stp_disable_port(p); |
@@ -444,7 +446,9 @@ int br_add_if(struct net_bridge *br, struct net_device *dev) | |||
444 | spin_lock_bh(&br->lock); | 446 | spin_lock_bh(&br->lock); |
445 | br_stp_recalculate_bridge_id(br); | 447 | br_stp_recalculate_bridge_id(br); |
446 | br_features_recompute(br); | 448 | br_features_recompute(br); |
447 | schedule_delayed_work(&p->carrier_check, BR_PORT_DEBOUNCE); | 449 | if (schedule_delayed_work(&p->carrier_check, BR_PORT_DEBOUNCE)) |
450 | dev_hold(dev); | ||
451 | |||
448 | spin_unlock_bh(&br->lock); | 452 | spin_unlock_bh(&br->lock); |
449 | 453 | ||
450 | dev_set_mtu(br->dev, br_min_mtu(br)); | 454 | dev_set_mtu(br->dev, br_min_mtu(br)); |
diff --git a/net/bridge/br_notify.c b/net/bridge/br_notify.c index 8cd3e4229070..3311c4e30829 100644 --- a/net/bridge/br_notify.c +++ b/net/bridge/br_notify.c | |||
@@ -56,7 +56,9 @@ static int br_device_event(struct notifier_block *unused, unsigned long event, v | |||
56 | 56 | ||
57 | case NETDEV_CHANGE: | 57 | case NETDEV_CHANGE: |
58 | if (br->dev->flags & IFF_UP) | 58 | if (br->dev->flags & IFF_UP) |
59 | schedule_delayed_work(&p->carrier_check, BR_PORT_DEBOUNCE); | 59 | if (schedule_delayed_work(&p->carrier_check, |
60 | BR_PORT_DEBOUNCE)) | ||
61 | dev_hold(dev); | ||
60 | break; | 62 | break; |
61 | 63 | ||
62 | case NETDEV_FEAT_CHANGE: | 64 | case NETDEV_FEAT_CHANGE: |
diff --git a/net/ipv4/ipip.c b/net/ipv4/ipip.c index 475bcd1e4181..9b561e633b00 100644 --- a/net/ipv4/ipip.c +++ b/net/ipv4/ipip.c | |||
@@ -871,7 +871,7 @@ static int __init ipip_init(void) | |||
871 | 871 | ||
872 | printk(banner); | 872 | printk(banner); |
873 | 873 | ||
874 | if (xfrm4_tunnel_register(&ipip_handler)) { | 874 | if (xfrm4_tunnel_register(&ipip_handler, AF_INET)) { |
875 | printk(KERN_INFO "ipip init: can't register tunnel\n"); | 875 | printk(KERN_INFO "ipip init: can't register tunnel\n"); |
876 | return -EAGAIN; | 876 | return -EAGAIN; |
877 | } | 877 | } |
@@ -893,7 +893,7 @@ static int __init ipip_init(void) | |||
893 | err2: | 893 | err2: |
894 | free_netdev(ipip_fb_tunnel_dev); | 894 | free_netdev(ipip_fb_tunnel_dev); |
895 | err1: | 895 | err1: |
896 | xfrm4_tunnel_deregister(&ipip_handler); | 896 | xfrm4_tunnel_deregister(&ipip_handler, AF_INET); |
897 | goto out; | 897 | goto out; |
898 | } | 898 | } |
899 | 899 | ||
@@ -913,7 +913,7 @@ static void __exit ipip_destroy_tunnels(void) | |||
913 | 913 | ||
914 | static void __exit ipip_fini(void) | 914 | static void __exit ipip_fini(void) |
915 | { | 915 | { |
916 | if (xfrm4_tunnel_deregister(&ipip_handler)) | 916 | if (xfrm4_tunnel_deregister(&ipip_handler, AF_INET)) |
917 | printk(KERN_INFO "ipip close: can't deregister tunnel\n"); | 917 | printk(KERN_INFO "ipip close: can't deregister tunnel\n"); |
918 | 918 | ||
919 | rtnl_lock(); | 919 | rtnl_lock(); |
diff --git a/net/ipv4/netfilter/ipt_REJECT.c b/net/ipv4/netfilter/ipt_REJECT.c index a9eb3635fff2..80f739e21824 100644 --- a/net/ipv4/netfilter/ipt_REJECT.c +++ b/net/ipv4/netfilter/ipt_REJECT.c | |||
@@ -80,6 +80,10 @@ static void send_reset(struct sk_buff *oldskb, int hook) | |||
80 | nskb->mark = 0; | 80 | nskb->mark = 0; |
81 | skb_init_secmark(nskb); | 81 | skb_init_secmark(nskb); |
82 | 82 | ||
83 | skb_shinfo(nskb)->gso_size = 0; | ||
84 | skb_shinfo(nskb)->gso_segs = 0; | ||
85 | skb_shinfo(nskb)->gso_type = 0; | ||
86 | |||
83 | tcph = (struct tcphdr *)((u_int32_t*)nskb->nh.iph + nskb->nh.iph->ihl); | 87 | tcph = (struct tcphdr *)((u_int32_t*)nskb->nh.iph + nskb->nh.iph->ihl); |
84 | 88 | ||
85 | /* Swap source and dest */ | 89 | /* Swap source and dest */ |
diff --git a/net/ipv4/tcp_output.c b/net/ipv4/tcp_output.c index cebe9aa918a3..dc151139b5af 100644 --- a/net/ipv4/tcp_output.c +++ b/net/ipv4/tcp_output.c | |||
@@ -481,7 +481,7 @@ static int tcp_transmit_skb(struct sock *sk, struct sk_buff *skb, int clone_it, | |||
481 | /* RFC1323: The window in SYN & SYN/ACK segments | 481 | /* RFC1323: The window in SYN & SYN/ACK segments |
482 | * is never scaled. | 482 | * is never scaled. |
483 | */ | 483 | */ |
484 | th->window = htons(tp->rcv_wnd); | 484 | th->window = htons(min(tp->rcv_wnd, 65535U)); |
485 | } else { | 485 | } else { |
486 | th->window = htons(tcp_select_window(sk)); | 486 | th->window = htons(tcp_select_window(sk)); |
487 | } | 487 | } |
@@ -2160,7 +2160,7 @@ struct sk_buff * tcp_make_synack(struct sock *sk, struct dst_entry *dst, | |||
2160 | } | 2160 | } |
2161 | 2161 | ||
2162 | /* RFC1323: The window in SYN & SYN/ACK segments is never scaled. */ | 2162 | /* RFC1323: The window in SYN & SYN/ACK segments is never scaled. */ |
2163 | th->window = htons(req->rcv_wnd); | 2163 | th->window = htons(min(req->rcv_wnd, 65535U)); |
2164 | 2164 | ||
2165 | TCP_SKB_CB(skb)->when = tcp_time_stamp; | 2165 | TCP_SKB_CB(skb)->when = tcp_time_stamp; |
2166 | tcp_syn_build_options((__be32 *)(th + 1), dst_metric(dst, RTAX_ADVMSS), ireq->tstamp_ok, | 2166 | tcp_syn_build_options((__be32 *)(th + 1), dst_metric(dst, RTAX_ADVMSS), ireq->tstamp_ok, |
diff --git a/net/ipv4/tunnel4.c b/net/ipv4/tunnel4.c index 8d30c48f090e..a794a8ca8b4f 100644 --- a/net/ipv4/tunnel4.c +++ b/net/ipv4/tunnel4.c | |||
@@ -14,9 +14,10 @@ | |||
14 | #include <net/xfrm.h> | 14 | #include <net/xfrm.h> |
15 | 15 | ||
16 | static struct xfrm_tunnel *tunnel4_handlers; | 16 | static struct xfrm_tunnel *tunnel4_handlers; |
17 | static struct xfrm_tunnel *tunnel64_handlers; | ||
17 | static DEFINE_MUTEX(tunnel4_mutex); | 18 | static DEFINE_MUTEX(tunnel4_mutex); |
18 | 19 | ||
19 | int xfrm4_tunnel_register(struct xfrm_tunnel *handler) | 20 | int xfrm4_tunnel_register(struct xfrm_tunnel *handler, unsigned short family) |
20 | { | 21 | { |
21 | struct xfrm_tunnel **pprev; | 22 | struct xfrm_tunnel **pprev; |
22 | int ret = -EEXIST; | 23 | int ret = -EEXIST; |
@@ -24,7 +25,8 @@ int xfrm4_tunnel_register(struct xfrm_tunnel *handler) | |||
24 | 25 | ||
25 | mutex_lock(&tunnel4_mutex); | 26 | mutex_lock(&tunnel4_mutex); |
26 | 27 | ||
27 | for (pprev = &tunnel4_handlers; *pprev; pprev = &(*pprev)->next) { | 28 | for (pprev = (family == AF_INET) ? &tunnel4_handlers : &tunnel64_handlers; |
29 | *pprev; pprev = &(*pprev)->next) { | ||
28 | if ((*pprev)->priority > priority) | 30 | if ((*pprev)->priority > priority) |
29 | break; | 31 | break; |
30 | if ((*pprev)->priority == priority) | 32 | if ((*pprev)->priority == priority) |
@@ -44,14 +46,15 @@ err: | |||
44 | 46 | ||
45 | EXPORT_SYMBOL(xfrm4_tunnel_register); | 47 | EXPORT_SYMBOL(xfrm4_tunnel_register); |
46 | 48 | ||
47 | int xfrm4_tunnel_deregister(struct xfrm_tunnel *handler) | 49 | int xfrm4_tunnel_deregister(struct xfrm_tunnel *handler, unsigned short family) |
48 | { | 50 | { |
49 | struct xfrm_tunnel **pprev; | 51 | struct xfrm_tunnel **pprev; |
50 | int ret = -ENOENT; | 52 | int ret = -ENOENT; |
51 | 53 | ||
52 | mutex_lock(&tunnel4_mutex); | 54 | mutex_lock(&tunnel4_mutex); |
53 | 55 | ||
54 | for (pprev = &tunnel4_handlers; *pprev; pprev = &(*pprev)->next) { | 56 | for (pprev = (family == AF_INET) ? &tunnel4_handlers : &tunnel64_handlers; |
57 | *pprev; pprev = &(*pprev)->next) { | ||
55 | if (*pprev == handler) { | 58 | if (*pprev == handler) { |
56 | *pprev = handler->next; | 59 | *pprev = handler->next; |
57 | ret = 0; | 60 | ret = 0; |
@@ -86,6 +89,26 @@ drop: | |||
86 | return 0; | 89 | return 0; |
87 | } | 90 | } |
88 | 91 | ||
92 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
93 | static int tunnel64_rcv(struct sk_buff *skb) | ||
94 | { | ||
95 | struct xfrm_tunnel *handler; | ||
96 | |||
97 | if (!pskb_may_pull(skb, sizeof(struct iphdr))) | ||
98 | goto drop; | ||
99 | |||
100 | for (handler = tunnel64_handlers; handler; handler = handler->next) | ||
101 | if (!handler->handler(skb)) | ||
102 | return 0; | ||
103 | |||
104 | icmp_send(skb, ICMP_DEST_UNREACH, ICMP_PORT_UNREACH, 0); | ||
105 | |||
106 | drop: | ||
107 | kfree_skb(skb); | ||
108 | return 0; | ||
109 | } | ||
110 | #endif | ||
111 | |||
89 | static void tunnel4_err(struct sk_buff *skb, u32 info) | 112 | static void tunnel4_err(struct sk_buff *skb, u32 info) |
90 | { | 113 | { |
91 | struct xfrm_tunnel *handler; | 114 | struct xfrm_tunnel *handler; |
@@ -101,17 +124,36 @@ static struct net_protocol tunnel4_protocol = { | |||
101 | .no_policy = 1, | 124 | .no_policy = 1, |
102 | }; | 125 | }; |
103 | 126 | ||
127 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
128 | static struct net_protocol tunnel64_protocol = { | ||
129 | .handler = tunnel64_rcv, | ||
130 | .err_handler = tunnel4_err, | ||
131 | .no_policy = 1, | ||
132 | }; | ||
133 | #endif | ||
134 | |||
104 | static int __init tunnel4_init(void) | 135 | static int __init tunnel4_init(void) |
105 | { | 136 | { |
106 | if (inet_add_protocol(&tunnel4_protocol, IPPROTO_IPIP)) { | 137 | if (inet_add_protocol(&tunnel4_protocol, IPPROTO_IPIP)) { |
107 | printk(KERN_ERR "tunnel4 init: can't add protocol\n"); | 138 | printk(KERN_ERR "tunnel4 init: can't add protocol\n"); |
108 | return -EAGAIN; | 139 | return -EAGAIN; |
109 | } | 140 | } |
141 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
142 | if (inet_add_protocol(&tunnel64_protocol, IPPROTO_IPV6)) { | ||
143 | printk(KERN_ERR "tunnel64 init: can't add protocol\n"); | ||
144 | inet_del_protocol(&tunnel4_protocol, IPPROTO_IPIP); | ||
145 | return -EAGAIN; | ||
146 | } | ||
147 | #endif | ||
110 | return 0; | 148 | return 0; |
111 | } | 149 | } |
112 | 150 | ||
113 | static void __exit tunnel4_fini(void) | 151 | static void __exit tunnel4_fini(void) |
114 | { | 152 | { |
153 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
154 | if (inet_del_protocol(&tunnel64_protocol, IPPROTO_IPV6)) | ||
155 | printk(KERN_ERR "tunnel64 close: can't remove protocol\n"); | ||
156 | #endif | ||
115 | if (inet_del_protocol(&tunnel4_protocol, IPPROTO_IPIP)) | 157 | if (inet_del_protocol(&tunnel4_protocol, IPPROTO_IPIP)) |
116 | printk(KERN_ERR "tunnel4 close: can't remove protocol\n"); | 158 | printk(KERN_ERR "tunnel4 close: can't remove protocol\n"); |
117 | } | 159 | } |
diff --git a/net/ipv4/xfrm4_input.c b/net/ipv4/xfrm4_input.c index 289146bdb8b0..78e80deb7e89 100644 --- a/net/ipv4/xfrm4_input.c +++ b/net/ipv4/xfrm4_input.c | |||
@@ -27,6 +27,7 @@ static int xfrm4_parse_spi(struct sk_buff *skb, u8 nexthdr, __be32 *spi, __be32 | |||
27 | { | 27 | { |
28 | switch (nexthdr) { | 28 | switch (nexthdr) { |
29 | case IPPROTO_IPIP: | 29 | case IPPROTO_IPIP: |
30 | case IPPROTO_IPV6: | ||
30 | *spi = skb->nh.iph->saddr; | 31 | *spi = skb->nh.iph->saddr; |
31 | *seq = 0; | 32 | *seq = 0; |
32 | return 0; | 33 | return 0; |
@@ -70,7 +71,8 @@ int xfrm4_rcv_encap(struct sk_buff *skb, __u16 encap_type) | |||
70 | if (xfrm_nr == XFRM_MAX_DEPTH) | 71 | if (xfrm_nr == XFRM_MAX_DEPTH) |
71 | goto drop; | 72 | goto drop; |
72 | 73 | ||
73 | x = xfrm_state_lookup((xfrm_address_t *)&iph->daddr, spi, iph->protocol, AF_INET); | 74 | x = xfrm_state_lookup((xfrm_address_t *)&iph->daddr, spi, |
75 | iph->protocol != IPPROTO_IPV6 ? iph->protocol : IPPROTO_IPIP, AF_INET); | ||
74 | if (x == NULL) | 76 | if (x == NULL) |
75 | goto drop; | 77 | goto drop; |
76 | 78 | ||
diff --git a/net/ipv4/xfrm4_mode_tunnel.c b/net/ipv4/xfrm4_mode_tunnel.c index e54c5494c88f..e1cab33fdad1 100644 --- a/net/ipv4/xfrm4_mode_tunnel.c +++ b/net/ipv4/xfrm4_mode_tunnel.c | |||
@@ -95,6 +95,7 @@ static int xfrm4_tunnel_input(struct xfrm_state *x, struct sk_buff *skb) | |||
95 | 95 | ||
96 | switch(iph->protocol){ | 96 | switch(iph->protocol){ |
97 | case IPPROTO_IPIP: | 97 | case IPPROTO_IPIP: |
98 | break; | ||
98 | #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) | 99 | #if defined(CONFIG_IPV6) || defined (CONFIG_IPV6_MODULE) |
99 | case IPPROTO_IPV6: | 100 | case IPPROTO_IPV6: |
100 | break; | 101 | break; |
diff --git a/net/ipv4/xfrm4_tunnel.c b/net/ipv4/xfrm4_tunnel.c index 1be6762b2d47..3eef06454da9 100644 --- a/net/ipv4/xfrm4_tunnel.c +++ b/net/ipv4/xfrm4_tunnel.c | |||
@@ -64,24 +64,45 @@ static struct xfrm_tunnel xfrm_tunnel_handler = { | |||
64 | .priority = 2, | 64 | .priority = 2, |
65 | }; | 65 | }; |
66 | 66 | ||
67 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
68 | static struct xfrm_tunnel xfrm64_tunnel_handler = { | ||
69 | .handler = xfrm4_rcv, | ||
70 | .err_handler = xfrm_tunnel_err, | ||
71 | .priority = 2, | ||
72 | }; | ||
73 | #endif | ||
74 | |||
67 | static int __init ipip_init(void) | 75 | static int __init ipip_init(void) |
68 | { | 76 | { |
69 | if (xfrm_register_type(&ipip_type, AF_INET) < 0) { | 77 | if (xfrm_register_type(&ipip_type, AF_INET) < 0) { |
70 | printk(KERN_INFO "ipip init: can't add xfrm type\n"); | 78 | printk(KERN_INFO "ipip init: can't add xfrm type\n"); |
71 | return -EAGAIN; | 79 | return -EAGAIN; |
72 | } | 80 | } |
73 | if (xfrm4_tunnel_register(&xfrm_tunnel_handler)) { | 81 | |
74 | printk(KERN_INFO "ipip init: can't add xfrm handler\n"); | 82 | if (xfrm4_tunnel_register(&xfrm_tunnel_handler, AF_INET)) { |
83 | printk(KERN_INFO "ipip init: can't add xfrm handler for AF_INET\n"); | ||
84 | xfrm_unregister_type(&ipip_type, AF_INET); | ||
85 | return -EAGAIN; | ||
86 | } | ||
87 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) | ||
88 | if (xfrm4_tunnel_register(&xfrm64_tunnel_handler, AF_INET6)) { | ||
89 | printk(KERN_INFO "ipip init: can't add xfrm handler for AF_INET6\n"); | ||
90 | xfrm4_tunnel_deregister(&xfrm_tunnel_handler, AF_INET); | ||
75 | xfrm_unregister_type(&ipip_type, AF_INET); | 91 | xfrm_unregister_type(&ipip_type, AF_INET); |
76 | return -EAGAIN; | 92 | return -EAGAIN; |
77 | } | 93 | } |
94 | #endif | ||
78 | return 0; | 95 | return 0; |
79 | } | 96 | } |
80 | 97 | ||
81 | static void __exit ipip_fini(void) | 98 | static void __exit ipip_fini(void) |
82 | { | 99 | { |
83 | if (xfrm4_tunnel_deregister(&xfrm_tunnel_handler)) | 100 | #if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE) |
84 | printk(KERN_INFO "ipip close: can't remove xfrm handler\n"); | 101 | if (xfrm4_tunnel_deregister(&xfrm64_tunnel_handler, AF_INET6)) |
102 | printk(KERN_INFO "ipip close: can't remove xfrm handler for AF_INET6\n"); | ||
103 | #endif | ||
104 | if (xfrm4_tunnel_deregister(&xfrm_tunnel_handler, AF_INET)) | ||
105 | printk(KERN_INFO "ipip close: can't remove xfrm handler for AF_INET\n"); | ||
85 | if (xfrm_unregister_type(&ipip_type, AF_INET) < 0) | 106 | if (xfrm_unregister_type(&ipip_type, AF_INET) < 0) |
86 | printk(KERN_INFO "ipip close: can't remove xfrm type\n"); | 107 | printk(KERN_INFO "ipip close: can't remove xfrm type\n"); |
87 | } | 108 | } |
diff --git a/net/ipv6/Kconfig b/net/ipv6/Kconfig index deb4101a2a81..79682efb14be 100644 --- a/net/ipv6/Kconfig +++ b/net/ipv6/Kconfig | |||
@@ -156,6 +156,7 @@ config INET6_XFRM_MODE_ROUTEOPTIMIZATION | |||
156 | config IPV6_SIT | 156 | config IPV6_SIT |
157 | tristate "IPv6: IPv6-in-IPv4 tunnel (SIT driver)" | 157 | tristate "IPv6: IPv6-in-IPv4 tunnel (SIT driver)" |
158 | depends on IPV6 | 158 | depends on IPV6 |
159 | select INET_TUNNEL | ||
159 | default y | 160 | default y |
160 | ---help--- | 161 | ---help--- |
161 | Tunneling means encapsulating data of one protocol type within | 162 | Tunneling means encapsulating data of one protocol type within |
diff --git a/net/ipv6/inet6_hashtables.c b/net/ipv6/inet6_hashtables.c index 30b16da739c2..ae6b0e7eb488 100644 --- a/net/ipv6/inet6_hashtables.c +++ b/net/ipv6/inet6_hashtables.c | |||
@@ -172,7 +172,7 @@ static int __inet6_check_established(struct inet_timewait_death_row *death_row, | |||
172 | const struct in6_addr *saddr = &np->daddr; | 172 | const struct in6_addr *saddr = &np->daddr; |
173 | const int dif = sk->sk_bound_dev_if; | 173 | const int dif = sk->sk_bound_dev_if; |
174 | const __portpair ports = INET_COMBINED_PORTS(inet->dport, lport); | 174 | const __portpair ports = INET_COMBINED_PORTS(inet->dport, lport); |
175 | const unsigned int hash = inet6_ehashfn(daddr, inet->num, saddr, | 175 | const unsigned int hash = inet6_ehashfn(daddr, lport, saddr, |
176 | inet->dport); | 176 | inet->dport); |
177 | struct inet_ehash_bucket *head = inet_ehash_bucket(hinfo, hash); | 177 | struct inet_ehash_bucket *head = inet_ehash_bucket(hinfo, hash); |
178 | struct sock *sk2; | 178 | struct sock *sk2; |
diff --git a/net/ipv6/ip6_tunnel.c b/net/ipv6/ip6_tunnel.c index 367b74832986..662edb826899 100644 --- a/net/ipv6/ip6_tunnel.c +++ b/net/ipv6/ip6_tunnel.c | |||
@@ -1128,7 +1128,7 @@ static int __init ip6_tunnel_init(void) | |||
1128 | { | 1128 | { |
1129 | int err; | 1129 | int err; |
1130 | 1130 | ||
1131 | if (xfrm6_tunnel_register(&ip6ip6_handler)) { | 1131 | if (xfrm6_tunnel_register(&ip6ip6_handler, AF_INET6)) { |
1132 | printk(KERN_ERR "ip6ip6 init: can't register tunnel\n"); | 1132 | printk(KERN_ERR "ip6ip6 init: can't register tunnel\n"); |
1133 | return -EAGAIN; | 1133 | return -EAGAIN; |
1134 | } | 1134 | } |
@@ -1147,7 +1147,7 @@ static int __init ip6_tunnel_init(void) | |||
1147 | } | 1147 | } |
1148 | return 0; | 1148 | return 0; |
1149 | fail: | 1149 | fail: |
1150 | xfrm6_tunnel_deregister(&ip6ip6_handler); | 1150 | xfrm6_tunnel_deregister(&ip6ip6_handler, AF_INET6); |
1151 | return err; | 1151 | return err; |
1152 | } | 1152 | } |
1153 | 1153 | ||
@@ -1171,7 +1171,7 @@ static void __exit ip6ip6_destroy_tunnels(void) | |||
1171 | 1171 | ||
1172 | static void __exit ip6_tunnel_cleanup(void) | 1172 | static void __exit ip6_tunnel_cleanup(void) |
1173 | { | 1173 | { |
1174 | if (xfrm6_tunnel_deregister(&ip6ip6_handler)) | 1174 | if (xfrm6_tunnel_deregister(&ip6ip6_handler, AF_INET6)) |
1175 | printk(KERN_INFO "ip6ip6 close: can't deregister tunnel\n"); | 1175 | printk(KERN_INFO "ip6ip6 close: can't deregister tunnel\n"); |
1176 | 1176 | ||
1177 | rtnl_lock(); | 1177 | rtnl_lock(); |
diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c index 4d3cf301e1fc..862ed7c52c38 100644 --- a/net/ipv6/sit.c +++ b/net/ipv6/sit.c | |||
@@ -216,7 +216,7 @@ static void ipip6_tunnel_uninit(struct net_device *dev) | |||
216 | } | 216 | } |
217 | 217 | ||
218 | 218 | ||
219 | static void ipip6_err(struct sk_buff *skb, u32 info) | 219 | static int ipip6_err(struct sk_buff *skb, u32 info) |
220 | { | 220 | { |
221 | #ifndef I_WISH_WORLD_WERE_PERFECT | 221 | #ifndef I_WISH_WORLD_WERE_PERFECT |
222 | 222 | ||
@@ -228,21 +228,22 @@ static void ipip6_err(struct sk_buff *skb, u32 info) | |||
228 | int type = skb->h.icmph->type; | 228 | int type = skb->h.icmph->type; |
229 | int code = skb->h.icmph->code; | 229 | int code = skb->h.icmph->code; |
230 | struct ip_tunnel *t; | 230 | struct ip_tunnel *t; |
231 | int err; | ||
231 | 232 | ||
232 | switch (type) { | 233 | switch (type) { |
233 | default: | 234 | default: |
234 | case ICMP_PARAMETERPROB: | 235 | case ICMP_PARAMETERPROB: |
235 | return; | 236 | return 0; |
236 | 237 | ||
237 | case ICMP_DEST_UNREACH: | 238 | case ICMP_DEST_UNREACH: |
238 | switch (code) { | 239 | switch (code) { |
239 | case ICMP_SR_FAILED: | 240 | case ICMP_SR_FAILED: |
240 | case ICMP_PORT_UNREACH: | 241 | case ICMP_PORT_UNREACH: |
241 | /* Impossible event. */ | 242 | /* Impossible event. */ |
242 | return; | 243 | return 0; |
243 | case ICMP_FRAG_NEEDED: | 244 | case ICMP_FRAG_NEEDED: |
244 | /* Soft state for pmtu is maintained by IP core. */ | 245 | /* Soft state for pmtu is maintained by IP core. */ |
245 | return; | 246 | return 0; |
246 | default: | 247 | default: |
247 | /* All others are translated to HOST_UNREACH. | 248 | /* All others are translated to HOST_UNREACH. |
248 | rfc2003 contains "deep thoughts" about NET_UNREACH, | 249 | rfc2003 contains "deep thoughts" about NET_UNREACH, |
@@ -253,14 +254,18 @@ static void ipip6_err(struct sk_buff *skb, u32 info) | |||
253 | break; | 254 | break; |
254 | case ICMP_TIME_EXCEEDED: | 255 | case ICMP_TIME_EXCEEDED: |
255 | if (code != ICMP_EXC_TTL) | 256 | if (code != ICMP_EXC_TTL) |
256 | return; | 257 | return 0; |
257 | break; | 258 | break; |
258 | } | 259 | } |
259 | 260 | ||
261 | err = -ENOENT; | ||
262 | |||
260 | read_lock(&ipip6_lock); | 263 | read_lock(&ipip6_lock); |
261 | t = ipip6_tunnel_lookup(iph->daddr, iph->saddr); | 264 | t = ipip6_tunnel_lookup(iph->daddr, iph->saddr); |
262 | if (t == NULL || t->parms.iph.daddr == 0) | 265 | if (t == NULL || t->parms.iph.daddr == 0) |
263 | goto out; | 266 | goto out; |
267 | |||
268 | err = 0; | ||
264 | if (t->parms.iph.ttl == 0 && type == ICMP_TIME_EXCEEDED) | 269 | if (t->parms.iph.ttl == 0 && type == ICMP_TIME_EXCEEDED) |
265 | goto out; | 270 | goto out; |
266 | 271 | ||
@@ -271,7 +276,7 @@ static void ipip6_err(struct sk_buff *skb, u32 info) | |||
271 | t->err_time = jiffies; | 276 | t->err_time = jiffies; |
272 | out: | 277 | out: |
273 | read_unlock(&ipip6_lock); | 278 | read_unlock(&ipip6_lock); |
274 | return; | 279 | return err; |
275 | #else | 280 | #else |
276 | struct iphdr *iph = (struct iphdr*)dp; | 281 | struct iphdr *iph = (struct iphdr*)dp; |
277 | int hlen = iph->ihl<<2; | 282 | int hlen = iph->ihl<<2; |
@@ -332,7 +337,7 @@ out: | |||
332 | /* Prepare fake skb to feed it to icmpv6_send */ | 337 | /* Prepare fake skb to feed it to icmpv6_send */ |
333 | skb2 = skb_clone(skb, GFP_ATOMIC); | 338 | skb2 = skb_clone(skb, GFP_ATOMIC); |
334 | if (skb2 == NULL) | 339 | if (skb2 == NULL) |
335 | return; | 340 | return 0; |
336 | dst_release(skb2->dst); | 341 | dst_release(skb2->dst); |
337 | skb2->dst = NULL; | 342 | skb2->dst = NULL; |
338 | skb_pull(skb2, skb->data - (u8*)iph6); | 343 | skb_pull(skb2, skb->data - (u8*)iph6); |
@@ -355,7 +360,7 @@ out: | |||
355 | } | 360 | } |
356 | } | 361 | } |
357 | kfree_skb(skb2); | 362 | kfree_skb(skb2); |
358 | return; | 363 | return 0; |
359 | #endif | 364 | #endif |
360 | } | 365 | } |
361 | 366 | ||
@@ -791,9 +796,10 @@ static int __init ipip6_fb_tunnel_init(struct net_device *dev) | |||
791 | return 0; | 796 | return 0; |
792 | } | 797 | } |
793 | 798 | ||
794 | static struct net_protocol sit_protocol = { | 799 | static struct xfrm_tunnel sit_handler = { |
795 | .handler = ipip6_rcv, | 800 | .handler = ipip6_rcv, |
796 | .err_handler = ipip6_err, | 801 | .err_handler = ipip6_err, |
802 | .priority = 1, | ||
797 | }; | 803 | }; |
798 | 804 | ||
799 | static void __exit sit_destroy_tunnels(void) | 805 | static void __exit sit_destroy_tunnels(void) |
@@ -812,7 +818,7 @@ static void __exit sit_destroy_tunnels(void) | |||
812 | 818 | ||
813 | static void __exit sit_cleanup(void) | 819 | static void __exit sit_cleanup(void) |
814 | { | 820 | { |
815 | inet_del_protocol(&sit_protocol, IPPROTO_IPV6); | 821 | xfrm4_tunnel_deregister(&sit_handler, AF_INET6); |
816 | 822 | ||
817 | rtnl_lock(); | 823 | rtnl_lock(); |
818 | sit_destroy_tunnels(); | 824 | sit_destroy_tunnels(); |
@@ -826,7 +832,7 @@ static int __init sit_init(void) | |||
826 | 832 | ||
827 | printk(KERN_INFO "IPv6 over IPv4 tunneling driver\n"); | 833 | printk(KERN_INFO "IPv6 over IPv4 tunneling driver\n"); |
828 | 834 | ||
829 | if (inet_add_protocol(&sit_protocol, IPPROTO_IPV6) < 0) { | 835 | if (xfrm4_tunnel_register(&sit_handler, AF_INET6) < 0) { |
830 | printk(KERN_INFO "sit init: Can't add protocol\n"); | 836 | printk(KERN_INFO "sit init: Can't add protocol\n"); |
831 | return -EAGAIN; | 837 | return -EAGAIN; |
832 | } | 838 | } |
@@ -848,7 +854,7 @@ static int __init sit_init(void) | |||
848 | err2: | 854 | err2: |
849 | free_netdev(ipip6_fb_tunnel_dev); | 855 | free_netdev(ipip6_fb_tunnel_dev); |
850 | err1: | 856 | err1: |
851 | inet_del_protocol(&sit_protocol, IPPROTO_IPV6); | 857 | xfrm4_tunnel_deregister(&sit_handler, AF_INET6); |
852 | goto out; | 858 | goto out; |
853 | } | 859 | } |
854 | 860 | ||
diff --git a/net/ipv6/tunnel6.c b/net/ipv6/tunnel6.c index 918d07dd1219..23e2809878ae 100644 --- a/net/ipv6/tunnel6.c +++ b/net/ipv6/tunnel6.c | |||
@@ -30,9 +30,10 @@ | |||
30 | #include <net/xfrm.h> | 30 | #include <net/xfrm.h> |
31 | 31 | ||
32 | static struct xfrm6_tunnel *tunnel6_handlers; | 32 | static struct xfrm6_tunnel *tunnel6_handlers; |
33 | static struct xfrm6_tunnel *tunnel46_handlers; | ||
33 | static DEFINE_MUTEX(tunnel6_mutex); | 34 | static DEFINE_MUTEX(tunnel6_mutex); |
34 | 35 | ||
35 | int xfrm6_tunnel_register(struct xfrm6_tunnel *handler) | 36 | int xfrm6_tunnel_register(struct xfrm6_tunnel *handler, unsigned short family) |
36 | { | 37 | { |
37 | struct xfrm6_tunnel **pprev; | 38 | struct xfrm6_tunnel **pprev; |
38 | int ret = -EEXIST; | 39 | int ret = -EEXIST; |
@@ -40,7 +41,8 @@ int xfrm6_tunnel_register(struct xfrm6_tunnel *handler) | |||
40 | 41 | ||
41 | mutex_lock(&tunnel6_mutex); | 42 | mutex_lock(&tunnel6_mutex); |
42 | 43 | ||
43 | for (pprev = &tunnel6_handlers; *pprev; pprev = &(*pprev)->next) { | 44 | for (pprev = (family == AF_INET6) ? &tunnel6_handlers : &tunnel46_handlers; |
45 | *pprev; pprev = &(*pprev)->next) { | ||
44 | if ((*pprev)->priority > priority) | 46 | if ((*pprev)->priority > priority) |
45 | break; | 47 | break; |
46 | if ((*pprev)->priority == priority) | 48 | if ((*pprev)->priority == priority) |
@@ -60,14 +62,15 @@ err: | |||
60 | 62 | ||
61 | EXPORT_SYMBOL(xfrm6_tunnel_register); | 63 | EXPORT_SYMBOL(xfrm6_tunnel_register); |
62 | 64 | ||
63 | int xfrm6_tunnel_deregister(struct xfrm6_tunnel *handler) | 65 | int xfrm6_tunnel_deregister(struct xfrm6_tunnel *handler, unsigned short family) |
64 | { | 66 | { |
65 | struct xfrm6_tunnel **pprev; | 67 | struct xfrm6_tunnel **pprev; |
66 | int ret = -ENOENT; | 68 | int ret = -ENOENT; |
67 | 69 | ||
68 | mutex_lock(&tunnel6_mutex); | 70 | mutex_lock(&tunnel6_mutex); |
69 | 71 | ||
70 | for (pprev = &tunnel6_handlers; *pprev; pprev = &(*pprev)->next) { | 72 | for (pprev = (family == AF_INET6) ? &tunnel6_handlers : &tunnel46_handlers; |
73 | *pprev; pprev = &(*pprev)->next) { | ||
71 | if (*pprev == handler) { | 74 | if (*pprev == handler) { |
72 | *pprev = handler->next; | 75 | *pprev = handler->next; |
73 | ret = 0; | 76 | ret = 0; |
@@ -103,6 +106,25 @@ drop: | |||
103 | return 0; | 106 | return 0; |
104 | } | 107 | } |
105 | 108 | ||
109 | static int tunnel46_rcv(struct sk_buff **pskb) | ||
110 | { | ||
111 | struct sk_buff *skb = *pskb; | ||
112 | struct xfrm6_tunnel *handler; | ||
113 | |||
114 | if (!pskb_may_pull(skb, sizeof(struct ipv6hdr))) | ||
115 | goto drop; | ||
116 | |||
117 | for (handler = tunnel46_handlers; handler; handler = handler->next) | ||
118 | if (!handler->handler(skb)) | ||
119 | return 0; | ||
120 | |||
121 | icmpv6_send(skb, ICMPV6_DEST_UNREACH, ICMPV6_PORT_UNREACH, 0, skb->dev); | ||
122 | |||
123 | drop: | ||
124 | kfree_skb(skb); | ||
125 | return 0; | ||
126 | } | ||
127 | |||
106 | static void tunnel6_err(struct sk_buff *skb, struct inet6_skb_parm *opt, | 128 | static void tunnel6_err(struct sk_buff *skb, struct inet6_skb_parm *opt, |
107 | int type, int code, int offset, __be32 info) | 129 | int type, int code, int offset, __be32 info) |
108 | { | 130 | { |
@@ -119,17 +141,30 @@ static struct inet6_protocol tunnel6_protocol = { | |||
119 | .flags = INET6_PROTO_NOPOLICY|INET6_PROTO_FINAL, | 141 | .flags = INET6_PROTO_NOPOLICY|INET6_PROTO_FINAL, |
120 | }; | 142 | }; |
121 | 143 | ||
144 | static struct inet6_protocol tunnel46_protocol = { | ||
145 | .handler = tunnel46_rcv, | ||
146 | .err_handler = tunnel6_err, | ||
147 | .flags = INET6_PROTO_NOPOLICY|INET6_PROTO_FINAL, | ||
148 | }; | ||
149 | |||
122 | static int __init tunnel6_init(void) | 150 | static int __init tunnel6_init(void) |
123 | { | 151 | { |
124 | if (inet6_add_protocol(&tunnel6_protocol, IPPROTO_IPV6)) { | 152 | if (inet6_add_protocol(&tunnel6_protocol, IPPROTO_IPV6)) { |
125 | printk(KERN_ERR "tunnel6 init(): can't add protocol\n"); | 153 | printk(KERN_ERR "tunnel6 init(): can't add protocol\n"); |
126 | return -EAGAIN; | 154 | return -EAGAIN; |
127 | } | 155 | } |
156 | if (inet6_add_protocol(&tunnel46_protocol, IPPROTO_IPIP)) { | ||
157 | printk(KERN_ERR "tunnel6 init(): can't add protocol\n"); | ||
158 | inet6_del_protocol(&tunnel6_protocol, IPPROTO_IPV6); | ||
159 | return -EAGAIN; | ||
160 | } | ||
128 | return 0; | 161 | return 0; |
129 | } | 162 | } |
130 | 163 | ||
131 | static void __exit tunnel6_fini(void) | 164 | static void __exit tunnel6_fini(void) |
132 | { | 165 | { |
166 | if (inet6_del_protocol(&tunnel46_protocol, IPPROTO_IPIP)) | ||
167 | printk(KERN_ERR "tunnel6 close: can't remove protocol\n"); | ||
133 | if (inet6_del_protocol(&tunnel6_protocol, IPPROTO_IPV6)) | 168 | if (inet6_del_protocol(&tunnel6_protocol, IPPROTO_IPV6)) |
134 | printk(KERN_ERR "tunnel6 close: can't remove protocol\n"); | 169 | printk(KERN_ERR "tunnel6 close: can't remove protocol\n"); |
135 | } | 170 | } |
diff --git a/net/ipv6/xfrm6_input.c b/net/ipv6/xfrm6_input.c index 25250147bdc3..31f651f95096 100644 --- a/net/ipv6/xfrm6_input.c +++ b/net/ipv6/xfrm6_input.c | |||
@@ -40,7 +40,8 @@ int xfrm6_rcv_spi(struct sk_buff *skb, __be32 spi) | |||
40 | if (xfrm_nr == XFRM_MAX_DEPTH) | 40 | if (xfrm_nr == XFRM_MAX_DEPTH) |
41 | goto drop; | 41 | goto drop; |
42 | 42 | ||
43 | x = xfrm_state_lookup((xfrm_address_t *)&iph->daddr, spi, nexthdr, AF_INET6); | 43 | x = xfrm_state_lookup((xfrm_address_t *)&iph->daddr, spi, |
44 | nexthdr != IPPROTO_IPIP ? nexthdr : IPPROTO_IPV6, AF_INET6); | ||
44 | if (x == NULL) | 45 | if (x == NULL) |
45 | goto drop; | 46 | goto drop; |
46 | spin_lock(&x->lock); | 47 | spin_lock(&x->lock); |
diff --git a/net/ipv6/xfrm6_tunnel.c b/net/ipv6/xfrm6_tunnel.c index fb0228772f01..ee4b84a33ff4 100644 --- a/net/ipv6/xfrm6_tunnel.c +++ b/net/ipv6/xfrm6_tunnel.c | |||
@@ -339,17 +339,29 @@ static struct xfrm6_tunnel xfrm6_tunnel_handler = { | |||
339 | .priority = 2, | 339 | .priority = 2, |
340 | }; | 340 | }; |
341 | 341 | ||
342 | static struct xfrm6_tunnel xfrm46_tunnel_handler = { | ||
343 | .handler = xfrm6_tunnel_rcv, | ||
344 | .err_handler = xfrm6_tunnel_err, | ||
345 | .priority = 2, | ||
346 | }; | ||
347 | |||
342 | static int __init xfrm6_tunnel_init(void) | 348 | static int __init xfrm6_tunnel_init(void) |
343 | { | 349 | { |
344 | if (xfrm_register_type(&xfrm6_tunnel_type, AF_INET6) < 0) | 350 | if (xfrm_register_type(&xfrm6_tunnel_type, AF_INET6) < 0) |
345 | return -EAGAIN; | 351 | return -EAGAIN; |
346 | 352 | ||
347 | if (xfrm6_tunnel_register(&xfrm6_tunnel_handler)) { | 353 | if (xfrm6_tunnel_register(&xfrm6_tunnel_handler, AF_INET6)) { |
354 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); | ||
355 | return -EAGAIN; | ||
356 | } | ||
357 | if (xfrm6_tunnel_register(&xfrm46_tunnel_handler, AF_INET)) { | ||
358 | xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6); | ||
348 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); | 359 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); |
349 | return -EAGAIN; | 360 | return -EAGAIN; |
350 | } | 361 | } |
351 | if (xfrm6_tunnel_spi_init() < 0) { | 362 | if (xfrm6_tunnel_spi_init() < 0) { |
352 | xfrm6_tunnel_deregister(&xfrm6_tunnel_handler); | 363 | xfrm6_tunnel_deregister(&xfrm46_tunnel_handler, AF_INET); |
364 | xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6); | ||
353 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); | 365 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); |
354 | return -EAGAIN; | 366 | return -EAGAIN; |
355 | } | 367 | } |
@@ -359,7 +371,8 @@ static int __init xfrm6_tunnel_init(void) | |||
359 | static void __exit xfrm6_tunnel_fini(void) | 371 | static void __exit xfrm6_tunnel_fini(void) |
360 | { | 372 | { |
361 | xfrm6_tunnel_spi_fini(); | 373 | xfrm6_tunnel_spi_fini(); |
362 | xfrm6_tunnel_deregister(&xfrm6_tunnel_handler); | 374 | xfrm6_tunnel_deregister(&xfrm46_tunnel_handler, AF_INET); |
375 | xfrm6_tunnel_deregister(&xfrm6_tunnel_handler, AF_INET6); | ||
363 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); | 376 | xfrm_unregister_type(&xfrm6_tunnel_type, AF_INET6); |
364 | } | 377 | } |
365 | 378 | ||
diff --git a/net/sched/sch_hfsc.c b/net/sched/sch_hfsc.c index 135087d4213a..396deb71480f 100644 --- a/net/sched/sch_hfsc.c +++ b/net/sched/sch_hfsc.c | |||
@@ -71,8 +71,6 @@ | |||
71 | #include <asm/system.h> | 71 | #include <asm/system.h> |
72 | #include <asm/div64.h> | 72 | #include <asm/div64.h> |
73 | 73 | ||
74 | #define HFSC_DEBUG 1 | ||
75 | |||
76 | /* | 74 | /* |
77 | * kernel internal service curve representation: | 75 | * kernel internal service curve representation: |
78 | * coordinates are given by 64 bit unsigned integers. | 76 | * coordinates are given by 64 bit unsigned integers. |
@@ -211,17 +209,6 @@ do { \ | |||
211 | } while (0) | 209 | } while (0) |
212 | #endif | 210 | #endif |
213 | 211 | ||
214 | #if HFSC_DEBUG | ||
215 | #define ASSERT(cond) \ | ||
216 | do { \ | ||
217 | if (unlikely(!(cond))) \ | ||
218 | printk("assertion %s failed at %s:%i (%s)\n", \ | ||
219 | #cond, __FILE__, __LINE__, __FUNCTION__); \ | ||
220 | } while (0) | ||
221 | #else | ||
222 | #define ASSERT(cond) | ||
223 | #endif /* HFSC_DEBUG */ | ||
224 | |||
225 | #define HT_INFINITY 0xffffffffffffffffULL /* infinite time value */ | 212 | #define HT_INFINITY 0xffffffffffffffffULL /* infinite time value */ |
226 | 213 | ||
227 | 214 | ||
@@ -1492,7 +1479,7 @@ hfsc_schedule_watchdog(struct Qdisc *sch, u64 cur_time) | |||
1492 | if (next_time == 0 || next_time > q->root.cl_cfmin) | 1479 | if (next_time == 0 || next_time > q->root.cl_cfmin) |
1493 | next_time = q->root.cl_cfmin; | 1480 | next_time = q->root.cl_cfmin; |
1494 | } | 1481 | } |
1495 | ASSERT(next_time != 0); | 1482 | WARN_ON(next_time == 0); |
1496 | delay = next_time - cur_time; | 1483 | delay = next_time - cur_time; |
1497 | delay = PSCHED_US2JIFFIE(delay); | 1484 | delay = PSCHED_US2JIFFIE(delay); |
1498 | 1485 | ||
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c index c394b413f651..946b715db5ec 100644 --- a/net/xfrm/xfrm_policy.c +++ b/net/xfrm/xfrm_policy.c | |||
@@ -1550,7 +1550,7 @@ xfrm_state_ok(struct xfrm_tmpl *tmpl, struct xfrm_state *x, | |||
1550 | unsigned short family) | 1550 | unsigned short family) |
1551 | { | 1551 | { |
1552 | if (xfrm_state_kern(x)) | 1552 | if (xfrm_state_kern(x)) |
1553 | return tmpl->optional && !xfrm_state_addr_cmp(tmpl, x, family); | 1553 | return tmpl->optional && !xfrm_state_addr_cmp(tmpl, x, tmpl->encap_family); |
1554 | return x->id.proto == tmpl->id.proto && | 1554 | return x->id.proto == tmpl->id.proto && |
1555 | (x->id.spi == tmpl->id.spi || !tmpl->id.spi) && | 1555 | (x->id.spi == tmpl->id.spi || !tmpl->id.spi) && |
1556 | (x->props.reqid == tmpl->reqid || !tmpl->reqid) && | 1556 | (x->props.reqid == tmpl->reqid || !tmpl->reqid) && |