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-rw-r--r--drivers/net/ixgbe/ixgbe_main.c91
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h2
2 files changed, 50 insertions, 43 deletions
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 841ef9827ec6..f8cdc992f24d 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -2616,25 +2616,26 @@ static void ixgbe_setup_mrqc(struct ixgbe_adapter *adapter)
2616 * @adapter: address of board private structure 2616 * @adapter: address of board private structure
2617 * @index: index of ring to set 2617 * @index: index of ring to set
2618 **/ 2618 **/
2619static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, int index) 2619static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
2620 struct ixgbe_ring *ring)
2620{ 2621{
2621 struct ixgbe_ring *rx_ring;
2622 struct ixgbe_hw *hw = &adapter->hw; 2622 struct ixgbe_hw *hw = &adapter->hw;
2623 int j;
2624 u32 rscctrl; 2623 u32 rscctrl;
2625 int rx_buf_len; 2624 int rx_buf_len;
2625 u16 reg_idx = ring->reg_idx;
2626
2627 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))
2628 return;
2626 2629
2627 rx_ring = adapter->rx_ring[index]; 2630 rx_buf_len = ring->rx_buf_len;
2628 j = rx_ring->reg_idx; 2631 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(reg_idx));
2629 rx_buf_len = rx_ring->rx_buf_len;
2630 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(j));
2631 rscctrl |= IXGBE_RSCCTL_RSCEN; 2632 rscctrl |= IXGBE_RSCCTL_RSCEN;
2632 /* 2633 /*
2633 * we must limit the number of descriptors so that the 2634 * we must limit the number of descriptors so that the
2634 * total size of max desc * buf_len is not greater 2635 * total size of max desc * buf_len is not greater
2635 * than 65535 2636 * than 65535
2636 */ 2637 */
2637 if (rx_ring->flags & IXGBE_RING_RX_PS_ENABLED) { 2638 if (ring->flags & IXGBE_RING_RX_PS_ENABLED) {
2638#if (MAX_SKB_FRAGS > 16) 2639#if (MAX_SKB_FRAGS > 16)
2639 rscctrl |= IXGBE_RSCCTL_MAXDESC_16; 2640 rscctrl |= IXGBE_RSCCTL_MAXDESC_16;
2640#elif (MAX_SKB_FRAGS > 8) 2641#elif (MAX_SKB_FRAGS > 8)
@@ -2652,7 +2653,7 @@ static void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter, int index)
2652 else 2653 else
2653 rscctrl |= IXGBE_RSCCTL_MAXDESC_4; 2654 rscctrl |= IXGBE_RSCCTL_MAXDESC_4;
2654 } 2655 }
2655 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(j), rscctrl); 2656 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(reg_idx), rscctrl);
2656} 2657}
2657 2658
2658static void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter, 2659static void ixgbe_configure_rx_ring(struct ixgbe_adapter *adapter,
@@ -2771,6 +2772,42 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter)
2771 2772
2772} 2773}
2773 2774
2775static void ixgbe_setup_rdrxctl(struct ixgbe_adapter *adapter)
2776{
2777 struct ixgbe_hw *hw = &adapter->hw;
2778 u32 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2779
2780 switch (hw->mac.type) {
2781 case ixgbe_mac_82598EB:
2782 /*
2783 * For VMDq support of different descriptor types or
2784 * buffer sizes through the use of multiple SRRCTL
2785 * registers, RDRXCTL.MVMEN must be set to 1
2786 *
2787 * also, the manual doesn't mention it clearly but DCA hints
2788 * will only use queue 0's tags unless this bit is set. Side
2789 * effects of setting this bit are only that SRRCTL must be
2790 * fully programmed [0..15]
2791 */
2792 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
2793 break;
2794 case ixgbe_mac_82599EB:
2795 /* Disable RSC for ACK packets */
2796 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2797 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2798 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
2799 /* hardware requires some bits to be set by default */
2800 rdrxctl |= (IXGBE_RDRXCTL_RSCACKC | IXGBE_RDRXCTL_FCOE_WRFIX);
2801 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
2802 break;
2803 default:
2804 /* We should do nothing since we don't know this hardware */
2805 return;
2806 }
2807
2808 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2809}
2810
2774/** 2811/**
2775 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset 2812 * ixgbe_configure_rx - Configure 8259x Receive Unit after Reset
2776 * @adapter: board private structure 2813 * @adapter: board private structure
@@ -2784,13 +2821,13 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2784 int i; 2821 int i;
2785 u32 rxctrl; 2822 u32 rxctrl;
2786 u32 gcr_ext; 2823 u32 gcr_ext;
2787 u32 rdrxctl;
2788 2824
2789 /* disable receives while setting up the descriptors */ 2825 /* disable receives while setting up the descriptors */
2790 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 2826 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
2791 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN); 2827 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
2792 2828
2793 ixgbe_setup_psrtype(adapter); 2829 ixgbe_setup_psrtype(adapter);
2830 ixgbe_setup_rdrxctl(adapter);
2794 2831
2795 /* set_rx_buffer_len must be called before ring initialization */ 2832 /* set_rx_buffer_len must be called before ring initialization */
2796 ixgbe_set_rx_buffer_len(adapter); 2833 ixgbe_set_rx_buffer_len(adapter);
@@ -2803,22 +2840,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2803 rx_ring = adapter->rx_ring[i]; 2840 rx_ring = adapter->rx_ring[i];
2804 ixgbe_configure_rx_ring(adapter, rx_ring); 2841 ixgbe_configure_rx_ring(adapter, rx_ring);
2805 ixgbe_configure_srrctl(adapter, rx_ring); 2842 ixgbe_configure_srrctl(adapter, rx_ring);
2806 } 2843 ixgbe_configure_rscctl(adapter, rx_ring);
2807
2808 if (hw->mac.type == ixgbe_mac_82598EB) {
2809 /*
2810 * For VMDq support of different descriptor types or
2811 * buffer sizes through the use of multiple SRRCTL
2812 * registers, RDRXCTL.MVMEN must be set to 1
2813 *
2814 * also, the manual doesn't mention it clearly but DCA hints
2815 * will only use queue 0's tags unless this bit is set. Side
2816 * effects of setting this bit are only that SRRCTL must be
2817 * fully programmed [0..15]
2818 */
2819 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2820 rdrxctl |= IXGBE_RDRXCTL_MVMEN;
2821 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2822 } 2844 }
2823 2845
2824 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 2846 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
@@ -2858,23 +2880,6 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2858 gcr_ext |= IXGBE_GCR_EXT_SRIOV; 2880 gcr_ext |= IXGBE_GCR_EXT_SRIOV;
2859 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext); 2881 IXGBE_WRITE_REG(hw, IXGBE_GCR_EXT, gcr_ext);
2860 } 2882 }
2861
2862 if (hw->mac.type == ixgbe_mac_82599EB) {
2863 rdrxctl = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
2864 rdrxctl |= IXGBE_RDRXCTL_CRCSTRIP;
2865 rdrxctl &= ~IXGBE_RDRXCTL_RSCFRSTSIZE;
2866 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2867 }
2868
2869 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2870 /* Enable 82599 HW-RSC */
2871 for (i = 0; i < adapter->num_rx_queues; i++)
2872 ixgbe_configure_rscctl(adapter, i);
2873
2874 /* Disable RSC for ACK packets */
2875 IXGBE_WRITE_REG(hw, IXGBE_RSCDBU,
2876 (IXGBE_RSCDBU_RSCACKDIS | IXGBE_READ_REG(hw, IXGBE_RSCDBU)));
2877 }
2878} 2883}
2879 2884
2880static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 2885static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index 9587d975d66c..d3cc6ce7c973 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -871,6 +871,8 @@
871#define IXGBE_RDRXCTL_MVMEN 0x00000020 871#define IXGBE_RDRXCTL_MVMEN 0x00000020
872#define IXGBE_RDRXCTL_DMAIDONE 0x00000008 /* DMA init cycle done */ 872#define IXGBE_RDRXCTL_DMAIDONE 0x00000008 /* DMA init cycle done */
873#define IXGBE_RDRXCTL_AGGDIS 0x00010000 /* Aggregation disable */ 873#define IXGBE_RDRXCTL_AGGDIS 0x00010000 /* Aggregation disable */
874#define IXGBE_RDRXCTL_RSCACKC 0x02000000 /* must set 1 when RSC enabled */
875#define IXGBE_RDRXCTL_FCOE_WRFIX 0x04000000 /* must set 1 when RSC enabled */
874 876
875/* RQTC Bit Masks and Shifts */ 877/* RQTC Bit Masks and Shifts */
876#define IXGBE_RQTC_SHIFT_TC(_i) ((_i) * 4) 878#define IXGBE_RQTC_SHIFT_TC(_i) ((_i) * 4)