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-rw-r--r--drivers/net/ehea/ehea_phyp.c158
-rw-r--r--drivers/net/ehea/ehea_phyp.h22
2 files changed, 90 insertions, 90 deletions
diff --git a/drivers/net/ehea/ehea_phyp.c b/drivers/net/ehea/ehea_phyp.c
index 95c4a7f9cc88..156eb6320b4e 100644
--- a/drivers/net/ehea/ehea_phyp.c
+++ b/drivers/net/ehea/ehea_phyp.c
@@ -6,9 +6,9 @@
6 * (C) Copyright IBM Corp. 2006 6 * (C) Copyright IBM Corp. 2006
7 * 7 *
8 * Authors: 8 * Authors:
9 * Christoph Raisch <raisch@de.ibm.com> 9 * Christoph Raisch <raisch@de.ibm.com>
10 * Jan-Bernd Themann <themann@de.ibm.com> 10 * Jan-Bernd Themann <themann@de.ibm.com>
11 * Thomas Klein <tklein@de.ibm.com> 11 * Thomas Klein <tklein@de.ibm.com>
12 * 12 *
13 * 13 *
14 * This program is free software; you can redistribute it and/or modify 14 * This program is free software; you can redistribute it and/or modify
@@ -38,11 +38,11 @@ static inline u16 get_order_of_qentries(u16 queue_entries)
38} 38}
39 39
40/* Defines for H_CALL H_ALLOC_RESOURCE */ 40/* Defines for H_CALL H_ALLOC_RESOURCE */
41#define H_ALL_RES_TYPE_QP 1 41#define H_ALL_RES_TYPE_QP 1
42#define H_ALL_RES_TYPE_CQ 2 42#define H_ALL_RES_TYPE_CQ 2
43#define H_ALL_RES_TYPE_EQ 3 43#define H_ALL_RES_TYPE_EQ 3
44#define H_ALL_RES_TYPE_MR 5 44#define H_ALL_RES_TYPE_MR 5
45#define H_ALL_RES_TYPE_MW 6 45#define H_ALL_RES_TYPE_MW 6
46 46
47static long ehea_plpar_hcall_norets(unsigned long opcode, 47static long ehea_plpar_hcall_norets(unsigned long opcode,
48 unsigned long arg1, 48 unsigned long arg1,
@@ -137,77 +137,77 @@ u64 ehea_h_query_ehea_qp(const u64 adapter_handle, const u8 qp_category,
137 const u64 qp_handle, const u64 sel_mask, void *cb_addr) 137 const u64 qp_handle, const u64 sel_mask, void *cb_addr)
138{ 138{
139 return ehea_plpar_hcall_norets(H_QUERY_HEA_QP, 139 return ehea_plpar_hcall_norets(H_QUERY_HEA_QP,
140 adapter_handle, /* R4 */ 140 adapter_handle, /* R4 */
141 qp_category, /* R5 */ 141 qp_category, /* R5 */
142 qp_handle, /* R6 */ 142 qp_handle, /* R6 */
143 sel_mask, /* R7 */ 143 sel_mask, /* R7 */
144 virt_to_abs(cb_addr), /* R8 */ 144 virt_to_abs(cb_addr), /* R8 */
145 0, 0); 145 0, 0);
146} 146}
147 147
148/* input param R5 */ 148/* input param R5 */
149#define H_ALL_RES_QP_EQPO EHEA_BMASK_IBM(9, 11) 149#define H_ALL_RES_QP_EQPO EHEA_BMASK_IBM(9, 11)
150#define H_ALL_RES_QP_QPP EHEA_BMASK_IBM(12, 12) 150#define H_ALL_RES_QP_QPP EHEA_BMASK_IBM(12, 12)
151#define H_ALL_RES_QP_RQR EHEA_BMASK_IBM(13, 15) 151#define H_ALL_RES_QP_RQR EHEA_BMASK_IBM(13, 15)
152#define H_ALL_RES_QP_EQEG EHEA_BMASK_IBM(16, 16) 152#define H_ALL_RES_QP_EQEG EHEA_BMASK_IBM(16, 16)
153#define H_ALL_RES_QP_LL_QP EHEA_BMASK_IBM(17, 17) 153#define H_ALL_RES_QP_LL_QP EHEA_BMASK_IBM(17, 17)
154#define H_ALL_RES_QP_DMA128 EHEA_BMASK_IBM(19, 19) 154#define H_ALL_RES_QP_DMA128 EHEA_BMASK_IBM(19, 19)
155#define H_ALL_RES_QP_HSM EHEA_BMASK_IBM(20, 21) 155#define H_ALL_RES_QP_HSM EHEA_BMASK_IBM(20, 21)
156#define H_ALL_RES_QP_SIGT EHEA_BMASK_IBM(22, 23) 156#define H_ALL_RES_QP_SIGT EHEA_BMASK_IBM(22, 23)
157#define H_ALL_RES_QP_TENURE EHEA_BMASK_IBM(48, 55) 157#define H_ALL_RES_QP_TENURE EHEA_BMASK_IBM(48, 55)
158#define H_ALL_RES_QP_RES_TYP EHEA_BMASK_IBM(56, 63) 158#define H_ALL_RES_QP_RES_TYP EHEA_BMASK_IBM(56, 63)
159 159
160/* input param R9 */ 160/* input param R9 */
161#define H_ALL_RES_QP_TOKEN EHEA_BMASK_IBM(0, 31) 161#define H_ALL_RES_QP_TOKEN EHEA_BMASK_IBM(0, 31)
162#define H_ALL_RES_QP_PD EHEA_BMASK_IBM(32,63) 162#define H_ALL_RES_QP_PD EHEA_BMASK_IBM(32, 63)
163 163
164/* input param R10 */ 164/* input param R10 */
165#define H_ALL_RES_QP_MAX_SWQE EHEA_BMASK_IBM(4, 7) 165#define H_ALL_RES_QP_MAX_SWQE EHEA_BMASK_IBM(4, 7)
166#define H_ALL_RES_QP_MAX_R1WQE EHEA_BMASK_IBM(12, 15) 166#define H_ALL_RES_QP_MAX_R1WQE EHEA_BMASK_IBM(12, 15)
167#define H_ALL_RES_QP_MAX_R2WQE EHEA_BMASK_IBM(20, 23) 167#define H_ALL_RES_QP_MAX_R2WQE EHEA_BMASK_IBM(20, 23)
168#define H_ALL_RES_QP_MAX_R3WQE EHEA_BMASK_IBM(28, 31) 168#define H_ALL_RES_QP_MAX_R3WQE EHEA_BMASK_IBM(28, 31)
169/* Max Send Scatter Gather Elements */ 169/* Max Send Scatter Gather Elements */
170#define H_ALL_RES_QP_MAX_SSGE EHEA_BMASK_IBM(37, 39) 170#define H_ALL_RES_QP_MAX_SSGE EHEA_BMASK_IBM(37, 39)
171#define H_ALL_RES_QP_MAX_R1SGE EHEA_BMASK_IBM(45, 47) 171#define H_ALL_RES_QP_MAX_R1SGE EHEA_BMASK_IBM(45, 47)
172/* Max Receive SG Elements RQ1 */ 172/* Max Receive SG Elements RQ1 */
173#define H_ALL_RES_QP_MAX_R2SGE EHEA_BMASK_IBM(53, 55) 173#define H_ALL_RES_QP_MAX_R2SGE EHEA_BMASK_IBM(53, 55)
174#define H_ALL_RES_QP_MAX_R3SGE EHEA_BMASK_IBM(61, 63) 174#define H_ALL_RES_QP_MAX_R3SGE EHEA_BMASK_IBM(61, 63)
175 175
176/* input param R11 */ 176/* input param R11 */
177#define H_ALL_RES_QP_SWQE_IDL EHEA_BMASK_IBM(0, 7) 177#define H_ALL_RES_QP_SWQE_IDL EHEA_BMASK_IBM(0, 7)
178/* max swqe immediate data length */ 178/* max swqe immediate data length */
179#define H_ALL_RES_QP_PORT_NUM EHEA_BMASK_IBM(48, 63) 179#define H_ALL_RES_QP_PORT_NUM EHEA_BMASK_IBM(48, 63)
180 180
181/* input param R12 */ 181/* input param R12 */
182#define H_ALL_RES_QP_TH_RQ2 EHEA_BMASK_IBM(0, 15) 182#define H_ALL_RES_QP_TH_RQ2 EHEA_BMASK_IBM(0, 15)
183/* Threshold RQ2 */ 183/* Threshold RQ2 */
184#define H_ALL_RES_QP_TH_RQ3 EHEA_BMASK_IBM(16, 31) 184#define H_ALL_RES_QP_TH_RQ3 EHEA_BMASK_IBM(16, 31)
185/* Threshold RQ3 */ 185/* Threshold RQ3 */
186 186
187/* output param R6 */ 187/* output param R6 */
188#define H_ALL_RES_QP_ACT_SWQE EHEA_BMASK_IBM(0, 15) 188#define H_ALL_RES_QP_ACT_SWQE EHEA_BMASK_IBM(0, 15)
189#define H_ALL_RES_QP_ACT_R1WQE EHEA_BMASK_IBM(16, 31) 189#define H_ALL_RES_QP_ACT_R1WQE EHEA_BMASK_IBM(16, 31)
190#define H_ALL_RES_QP_ACT_R2WQE EHEA_BMASK_IBM(32, 47) 190#define H_ALL_RES_QP_ACT_R2WQE EHEA_BMASK_IBM(32, 47)
191#define H_ALL_RES_QP_ACT_R3WQE EHEA_BMASK_IBM(48, 63) 191#define H_ALL_RES_QP_ACT_R3WQE EHEA_BMASK_IBM(48, 63)
192 192
193/* output param, R7 */ 193/* output param, R7 */
194#define H_ALL_RES_QP_ACT_SSGE EHEA_BMASK_IBM(0, 7) 194#define H_ALL_RES_QP_ACT_SSGE EHEA_BMASK_IBM(0, 7)
195#define H_ALL_RES_QP_ACT_R1SGE EHEA_BMASK_IBM(8, 15) 195#define H_ALL_RES_QP_ACT_R1SGE EHEA_BMASK_IBM(8, 15)
196#define H_ALL_RES_QP_ACT_R2SGE EHEA_BMASK_IBM(16, 23) 196#define H_ALL_RES_QP_ACT_R2SGE EHEA_BMASK_IBM(16, 23)
197#define H_ALL_RES_QP_ACT_R3SGE EHEA_BMASK_IBM(24, 31) 197#define H_ALL_RES_QP_ACT_R3SGE EHEA_BMASK_IBM(24, 31)
198#define H_ALL_RES_QP_ACT_SWQE_IDL EHEA_BMASK_IBM(32, 39) 198#define H_ALL_RES_QP_ACT_SWQE_IDL EHEA_BMASK_IBM(32, 39)
199 199
200/* output param R8,R9 */ 200/* output param R8,R9 */
201#define H_ALL_RES_QP_SIZE_SQ EHEA_BMASK_IBM(0, 31) 201#define H_ALL_RES_QP_SIZE_SQ EHEA_BMASK_IBM(0, 31)
202#define H_ALL_RES_QP_SIZE_RQ1 EHEA_BMASK_IBM(32, 63) 202#define H_ALL_RES_QP_SIZE_RQ1 EHEA_BMASK_IBM(32, 63)
203#define H_ALL_RES_QP_SIZE_RQ2 EHEA_BMASK_IBM(0, 31) 203#define H_ALL_RES_QP_SIZE_RQ2 EHEA_BMASK_IBM(0, 31)
204#define H_ALL_RES_QP_SIZE_RQ3 EHEA_BMASK_IBM(32, 63) 204#define H_ALL_RES_QP_SIZE_RQ3 EHEA_BMASK_IBM(32, 63)
205 205
206/* output param R11,R12 */ 206/* output param R11,R12 */
207#define H_ALL_RES_QP_LIOBN_SQ EHEA_BMASK_IBM(0, 31) 207#define H_ALL_RES_QP_LIOBN_SQ EHEA_BMASK_IBM(0, 31)
208#define H_ALL_RES_QP_LIOBN_RQ1 EHEA_BMASK_IBM(32, 63) 208#define H_ALL_RES_QP_LIOBN_RQ1 EHEA_BMASK_IBM(32, 63)
209#define H_ALL_RES_QP_LIOBN_RQ2 EHEA_BMASK_IBM(0, 31) 209#define H_ALL_RES_QP_LIOBN_RQ2 EHEA_BMASK_IBM(0, 31)
210#define H_ALL_RES_QP_LIOBN_RQ3 EHEA_BMASK_IBM(32, 63) 210#define H_ALL_RES_QP_LIOBN_RQ3 EHEA_BMASK_IBM(32, 63)
211 211
212u64 ehea_h_alloc_resource_qp(const u64 adapter_handle, 212u64 ehea_h_alloc_resource_qp(const u64 adapter_handle,
213 struct ehea_qp_init_attr *init_attr, const u32 pd, 213 struct ehea_qp_init_attr *init_attr, const u32 pd,
@@ -334,28 +334,28 @@ u64 ehea_h_alloc_resource_cq(const u64 adapter_handle,
334} 334}
335 335
336/* Defines for H_CALL H_ALLOC_RESOURCE */ 336/* Defines for H_CALL H_ALLOC_RESOURCE */
337#define H_ALL_RES_TYPE_QP 1 337#define H_ALL_RES_TYPE_QP 1
338#define H_ALL_RES_TYPE_CQ 2 338#define H_ALL_RES_TYPE_CQ 2
339#define H_ALL_RES_TYPE_EQ 3 339#define H_ALL_RES_TYPE_EQ 3
340#define H_ALL_RES_TYPE_MR 5 340#define H_ALL_RES_TYPE_MR 5
341#define H_ALL_RES_TYPE_MW 6 341#define H_ALL_RES_TYPE_MW 6
342 342
343/* input param R5 */ 343/* input param R5 */
344#define H_ALL_RES_EQ_NEQ EHEA_BMASK_IBM(0, 0) 344#define H_ALL_RES_EQ_NEQ EHEA_BMASK_IBM(0, 0)
345#define H_ALL_RES_EQ_NON_NEQ_ISN EHEA_BMASK_IBM(6, 7) 345#define H_ALL_RES_EQ_NON_NEQ_ISN EHEA_BMASK_IBM(6, 7)
346#define H_ALL_RES_EQ_INH_EQE_GEN EHEA_BMASK_IBM(16, 16) 346#define H_ALL_RES_EQ_INH_EQE_GEN EHEA_BMASK_IBM(16, 16)
347#define H_ALL_RES_EQ_RES_TYPE EHEA_BMASK_IBM(56, 63) 347#define H_ALL_RES_EQ_RES_TYPE EHEA_BMASK_IBM(56, 63)
348/* input param R6 */ 348/* input param R6 */
349#define H_ALL_RES_EQ_MAX_EQE EHEA_BMASK_IBM(32, 63) 349#define H_ALL_RES_EQ_MAX_EQE EHEA_BMASK_IBM(32, 63)
350 350
351/* output param R6 */ 351/* output param R6 */
352#define H_ALL_RES_EQ_LIOBN EHEA_BMASK_IBM(32, 63) 352#define H_ALL_RES_EQ_LIOBN EHEA_BMASK_IBM(32, 63)
353 353
354/* output param R7 */ 354/* output param R7 */
355#define H_ALL_RES_EQ_ACT_EQE EHEA_BMASK_IBM(32, 63) 355#define H_ALL_RES_EQ_ACT_EQE EHEA_BMASK_IBM(32, 63)
356 356
357/* output param R8 */ 357/* output param R8 */
358#define H_ALL_RES_EQ_ACT_PS EHEA_BMASK_IBM(32, 63) 358#define H_ALL_RES_EQ_ACT_PS EHEA_BMASK_IBM(32, 63)
359 359
360/* output param R9 */ 360/* output param R9 */
361#define H_ALL_RES_EQ_ACT_EQ_IST_C EHEA_BMASK_IBM(30, 31) 361#define H_ALL_RES_EQ_ACT_EQ_IST_C EHEA_BMASK_IBM(30, 31)
@@ -453,12 +453,12 @@ u64 ehea_h_register_smr(const u64 adapter_handle, const u64 orig_mr_handle,
453 453
454 hret = ehea_plpar_hcall9(H_REGISTER_SMR, 454 hret = ehea_plpar_hcall9(H_REGISTER_SMR,
455 outs, 455 outs,
456 adapter_handle , /* R4 */ 456 adapter_handle , /* R4 */
457 orig_mr_handle, /* R5 */ 457 orig_mr_handle, /* R5 */
458 vaddr_in, /* R6 */ 458 vaddr_in, /* R6 */
459 (((u64)access_ctrl) << 32ULL), /* R7 */ 459 (((u64)access_ctrl) << 32ULL), /* R7 */
460 pd, /* R8 */ 460 pd, /* R8 */
461 0, 0, 0, 0); /* R9-R12 */ 461 0, 0, 0, 0); /* R9-R12 */
462 462
463 mr->handle = outs[0]; 463 mr->handle = outs[0];
464 mr->lkey = (u32)outs[2]; 464 mr->lkey = (u32)outs[2];
@@ -471,11 +471,11 @@ u64 ehea_h_disable_and_get_hea(const u64 adapter_handle, const u64 qp_handle)
471 u64 outs[PLPAR_HCALL9_BUFSIZE]; 471 u64 outs[PLPAR_HCALL9_BUFSIZE];
472 472
473 return ehea_plpar_hcall9(H_DISABLE_AND_GET_HEA, 473 return ehea_plpar_hcall9(H_DISABLE_AND_GET_HEA,
474 outs, 474 outs,
475 adapter_handle, /* R4 */ 475 adapter_handle, /* R4 */
476 H_DISABLE_GET_EHEA_WQE_P, /* R5 */ 476 H_DISABLE_GET_EHEA_WQE_P, /* R5 */
477 qp_handle, /* R6 */ 477 qp_handle, /* R6 */
478 0, 0, 0, 0, 0, 0); /* R7-R12 */ 478 0, 0, 0, 0, 0, 0); /* R7-R12 */
479} 479}
480 480
481u64 ehea_h_free_resource(const u64 adapter_handle, const u64 res_handle, 481u64 ehea_h_free_resource(const u64 adapter_handle, const u64 res_handle,
@@ -483,9 +483,9 @@ u64 ehea_h_free_resource(const u64 adapter_handle, const u64 res_handle,
483{ 483{
484 return ehea_plpar_hcall_norets(H_FREE_RESOURCE, 484 return ehea_plpar_hcall_norets(H_FREE_RESOURCE,
485 adapter_handle, /* R4 */ 485 adapter_handle, /* R4 */
486 res_handle, /* R5 */ 486 res_handle, /* R5 */
487 force_bit, 487 force_bit,
488 0, 0, 0, 0); /* R7-R10 */ 488 0, 0, 0, 0); /* R7-R10 */
489} 489}
490 490
491u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr, 491u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr,
@@ -493,13 +493,13 @@ u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr,
493 const u32 pd, u64 *mr_handle, u32 *lkey) 493 const u32 pd, u64 *mr_handle, u32 *lkey)
494{ 494{
495 u64 hret; 495 u64 hret;
496 u64 outs[PLPAR_HCALL9_BUFSIZE]; 496 u64 outs[PLPAR_HCALL9_BUFSIZE];
497 497
498 hret = ehea_plpar_hcall9(H_ALLOC_HEA_RESOURCE, 498 hret = ehea_plpar_hcall9(H_ALLOC_HEA_RESOURCE,
499 outs, 499 outs,
500 adapter_handle, /* R4 */ 500 adapter_handle, /* R4 */
501 5, /* R5 */ 501 5, /* R5 */
502 vaddr, /* R6 */ 502 vaddr, /* R6 */
503 length, /* R7 */ 503 length, /* R7 */
504 (((u64) access_ctrl) << 32ULL), /* R8 */ 504 (((u64) access_ctrl) << 32ULL), /* R8 */
505 pd, /* R9 */ 505 pd, /* R9 */
@@ -619,8 +619,8 @@ u64 ehea_h_error_data(const u64 adapter_handle, const u64 ressource_handle,
619 void *rblock) 619 void *rblock)
620{ 620{
621 return ehea_plpar_hcall_norets(H_ERROR_DATA, 621 return ehea_plpar_hcall_norets(H_ERROR_DATA,
622 adapter_handle, /* R4 */ 622 adapter_handle, /* R4 */
623 ressource_handle, /* R5 */ 623 ressource_handle, /* R5 */
624 virt_to_abs(rblock), /* R6 */ 624 virt_to_abs(rblock), /* R6 */
625 0, 0, 0, 0); /* R7-R12 */ 625 0, 0, 0, 0); /* R7-R12 */
626} 626}
diff --git a/drivers/net/ehea/ehea_phyp.h b/drivers/net/ehea/ehea_phyp.h
index faa191d23b86..f3628c803567 100644
--- a/drivers/net/ehea/ehea_phyp.h
+++ b/drivers/net/ehea/ehea_phyp.h
@@ -93,7 +93,7 @@ static inline void hcp_epas_ctor(struct h_epas *epas, u64 paddr_kernel,
93static inline void hcp_epas_dtor(struct h_epas *epas) 93static inline void hcp_epas_dtor(struct h_epas *epas)
94{ 94{
95 if (epas->kernel.addr) 95 if (epas->kernel.addr)
96 iounmap((void __iomem*)((u64)epas->kernel.addr & PAGE_MASK)); 96 iounmap((void __iomem *)((u64)epas->kernel.addr & PAGE_MASK));
97 97
98 epas->user.addr = 0; 98 epas->user.addr = 0;
99 epas->kernel.addr = 0; 99 epas->kernel.addr = 0;
@@ -388,23 +388,23 @@ u64 ehea_h_modify_ehea_qp(const u64 adapter_handle,
388 const u64 qp_handle, 388 const u64 qp_handle,
389 const u64 sel_mask, 389 const u64 sel_mask,
390 void *cb_addr, 390 void *cb_addr,
391 u64 * inv_attr_id, 391 u64 *inv_attr_id,
392 u64 * proc_mask, u16 * out_swr, u16 * out_rwr); 392 u64 *proc_mask, u16 *out_swr, u16 *out_rwr);
393 393
394u64 ehea_h_alloc_resource_eq(const u64 adapter_handle, 394u64 ehea_h_alloc_resource_eq(const u64 adapter_handle,
395 struct ehea_eq_attr *eq_attr, u64 * eq_handle); 395 struct ehea_eq_attr *eq_attr, u64 *eq_handle);
396 396
397u64 ehea_h_alloc_resource_cq(const u64 adapter_handle, 397u64 ehea_h_alloc_resource_cq(const u64 adapter_handle,
398 struct ehea_cq_attr *cq_attr, 398 struct ehea_cq_attr *cq_attr,
399 u64 * cq_handle, struct h_epas *epas); 399 u64 *cq_handle, struct h_epas *epas);
400 400
401u64 ehea_h_alloc_resource_qp(const u64 adapter_handle, 401u64 ehea_h_alloc_resource_qp(const u64 adapter_handle,
402 struct ehea_qp_init_attr *init_attr, 402 struct ehea_qp_init_attr *init_attr,
403 const u32 pd, 403 const u32 pd,
404 u64 * qp_handle, struct h_epas *h_epas); 404 u64 *qp_handle, struct h_epas *h_epas);
405 405
406#define H_REG_RPAGE_PAGE_SIZE EHEA_BMASK_IBM(48,55) 406#define H_REG_RPAGE_PAGE_SIZE EHEA_BMASK_IBM(48, 55)
407#define H_REG_RPAGE_QT EHEA_BMASK_IBM(62,63) 407#define H_REG_RPAGE_QT EHEA_BMASK_IBM(62, 63)
408 408
409u64 ehea_h_register_rpage(const u64 adapter_handle, 409u64 ehea_h_register_rpage(const u64 adapter_handle,
410 const u8 pagesize, 410 const u8 pagesize,
@@ -426,7 +426,7 @@ u64 ehea_h_free_resource(const u64 adapter_handle, const u64 res_handle,
426 426
427u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr, 427u64 ehea_h_alloc_resource_mr(const u64 adapter_handle, const u64 vaddr,
428 const u64 length, const u32 access_ctrl, 428 const u64 length, const u32 access_ctrl,
429 const u32 pd, u64 * mr_handle, u32 * lkey); 429 const u32 pd, u64 *mr_handle, u32 *lkey);
430 430
431u64 ehea_h_register_rpage_mr(const u64 adapter_handle, const u64 mr_handle, 431u64 ehea_h_register_rpage_mr(const u64 adapter_handle, const u64 mr_handle,
432 const u8 pagesize, const u8 queue_type, 432 const u8 pagesize, const u8 queue_type,
@@ -439,8 +439,8 @@ u64 ehea_h_register_smr(const u64 adapter_handle, const u64 orig_mr_handle,
439u64 ehea_h_query_ehea(const u64 adapter_handle, void *cb_addr); 439u64 ehea_h_query_ehea(const u64 adapter_handle, void *cb_addr);
440 440
441/* output param R5 */ 441/* output param R5 */
442#define H_MEHEAPORT_CAT EHEA_BMASK_IBM(40,47) 442#define H_MEHEAPORT_CAT EHEA_BMASK_IBM(40, 47)
443#define H_MEHEAPORT_PN EHEA_BMASK_IBM(48,63) 443#define H_MEHEAPORT_PN EHEA_BMASK_IBM(48, 63)
444 444
445u64 ehea_h_query_ehea_port(const u64 adapter_handle, const u16 port_num, 445u64 ehea_h_query_ehea_port(const u64 adapter_handle, const u16 port_num,
446 const u8 cb_cat, const u64 select_mask, 446 const u8 cb_cat, const u64 select_mask,
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 15:01:54 -0500