diff options
-rw-r--r-- | arch/m68k/include/asm/m520xsim.h | 2 | ||||
-rw-r--r-- | arch/m68knommu/kernel/irq.c | 4 | ||||
-rw-r--r-- | arch/m68knommu/platform/coldfire/Makefile | 2 | ||||
-rw-r--r-- | arch/m68knommu/platform/coldfire/intc-simr.c | 61 |
4 files changed, 68 insertions, 1 deletions
diff --git a/arch/m68k/include/asm/m520xsim.h b/arch/m68k/include/asm/m520xsim.h index e80b6a54ea9c..e79b9bc76a12 100644 --- a/arch/m68k/include/asm/m520xsim.h +++ b/arch/m68k/include/asm/m520xsim.h | |||
@@ -22,6 +22,8 @@ | |||
22 | #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ | 22 | #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */ |
23 | #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ | 23 | #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */ |
24 | #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ | 24 | #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */ |
25 | #define MCFINTC_SIMR 0x1c /* Set interrupt mask 0-63 */ | ||
26 | #define MCFINTC_CIMR 0x1d /* Clear interrupt mask 0-63 */ | ||
25 | #define MCFINTC_ICR0 0x40 /* Base ICR register */ | 27 | #define MCFINTC_ICR0 0x40 /* Base ICR register */ |
26 | 28 | ||
27 | #define MCFINT_VECBASE 64 | 29 | #define MCFINT_VECBASE 64 |
diff --git a/arch/m68knommu/kernel/irq.c b/arch/m68knommu/kernel/irq.c index 9e0c100447ca..47f6af57e18e 100644 --- a/arch/m68knommu/kernel/irq.c +++ b/arch/m68knommu/kernel/irq.c | |||
@@ -29,6 +29,8 @@ asmlinkage void do_IRQ(int irq, struct pt_regs *regs) | |||
29 | set_irq_regs(oldregs); | 29 | set_irq_regs(oldregs); |
30 | } | 30 | } |
31 | 31 | ||
32 | #if !defined(CONFIG_M520x) | ||
33 | |||
32 | static struct irq_chip m_irq_chip = { | 34 | static struct irq_chip m_irq_chip = { |
33 | .name = "M68K-INTC", | 35 | .name = "M68K-INTC", |
34 | .enable = enable_vector, | 36 | .enable = enable_vector, |
@@ -50,6 +52,8 @@ void __init init_IRQ(void) | |||
50 | } | 52 | } |
51 | } | 53 | } |
52 | 54 | ||
55 | #endif | ||
56 | |||
53 | int show_interrupts(struct seq_file *p, void *v) | 57 | int show_interrupts(struct seq_file *p, void *v) |
54 | { | 58 | { |
55 | struct irqaction *ap; | 59 | struct irqaction *ap; |
diff --git a/arch/m68knommu/platform/coldfire/Makefile b/arch/m68knommu/platform/coldfire/Makefile index 2667323c7fee..dd242db7daa1 100644 --- a/arch/m68knommu/platform/coldfire/Makefile +++ b/arch/m68knommu/platform/coldfire/Makefile | |||
@@ -17,7 +17,7 @@ asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1 | |||
17 | obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o | 17 | obj-$(CONFIG_COLDFIRE) += clk.o dma.o entry.o vectors.o |
18 | obj-$(CONFIG_M5206) += timers.o | 18 | obj-$(CONFIG_M5206) += timers.o |
19 | obj-$(CONFIG_M5206e) += timers.o | 19 | obj-$(CONFIG_M5206e) += timers.o |
20 | obj-$(CONFIG_M520x) += pit.o | 20 | obj-$(CONFIG_M520x) += pit.o intc-simr.o |
21 | obj-$(CONFIG_M523x) += pit.o dma_timer.o | 21 | obj-$(CONFIG_M523x) += pit.o dma_timer.o |
22 | obj-$(CONFIG_M5249) += timers.o | 22 | obj-$(CONFIG_M5249) += timers.o |
23 | obj-$(CONFIG_M527x) += pit.o | 23 | obj-$(CONFIG_M527x) += pit.o |
diff --git a/arch/m68knommu/platform/coldfire/intc-simr.c b/arch/m68knommu/platform/coldfire/intc-simr.c new file mode 100644 index 000000000000..3b614a3508fc --- /dev/null +++ b/arch/m68knommu/platform/coldfire/intc-simr.c | |||
@@ -0,0 +1,61 @@ | |||
1 | /* | ||
2 | * intc-simr.c | ||
3 | * | ||
4 | * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com> | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file COPYING in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <asm/coldfire.h> | ||
18 | #include <asm/mcfsim.h> | ||
19 | #include <asm/traps.h> | ||
20 | |||
21 | static void intc_irq_mask(unsigned int irq) | ||
22 | { | ||
23 | if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63)) | ||
24 | __raw_writeb(irq - MCFINT_VECBASE, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_SIMR); | ||
25 | } | ||
26 | |||
27 | static void intc_irq_unmask(unsigned int irq) | ||
28 | { | ||
29 | if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63)) | ||
30 | __raw_writeb(irq - MCFINT_VECBASE, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_CIMR); | ||
31 | } | ||
32 | |||
33 | static int intc_irq_set_type(unsigned int irq, unsigned int type) | ||
34 | { | ||
35 | if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECBASE + 63)) | ||
36 | __raw_writeb(5, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + irq - MCFINT_VECBASE); | ||
37 | return 0; | ||
38 | } | ||
39 | |||
40 | static struct irq_chip intc_irq_chip = { | ||
41 | .name = "CF-INTC", | ||
42 | .mask = intc_irq_mask, | ||
43 | .unmask = intc_irq_unmask, | ||
44 | .set_type = intc_irq_set_type, | ||
45 | }; | ||
46 | |||
47 | void __init init_IRQ(void) | ||
48 | { | ||
49 | int irq; | ||
50 | |||
51 | init_vectors(); | ||
52 | |||
53 | for (irq = 0; (irq < NR_IRQS); irq++) { | ||
54 | irq_desc[irq].status = IRQ_DISABLED; | ||
55 | irq_desc[irq].action = NULL; | ||
56 | irq_desc[irq].depth = 1; | ||
57 | irq_desc[irq].chip = &intc_irq_chip; | ||
58 | intc_irq_set_type(irq, 0); | ||
59 | } | ||
60 | } | ||
61 | |||