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-rw-r--r--arch/arm/mach-mx2/mach-pcm038.c4
-rw-r--r--arch/arm/mach-mx3/mach-qong.c4
-rw-r--r--arch/arm/plat-mxc/include/mach/mx27.h19
-rw-r--r--arch/arm/plat-mxc/include/mach/mx31.h19
-rw-r--r--arch/arm/plat-mxc/include/mach/mxc.h1
5 files changed, 41 insertions, 6 deletions
diff --git a/arch/arm/mach-mx2/mach-pcm038.c b/arch/arm/mach-mx2/mach-pcm038.c
index a2e2ea16c136..9636bb82f1e9 100644
--- a/arch/arm/mach-mx2/mach-pcm038.c
+++ b/arch/arm/mach-mx2/mach-pcm038.c
@@ -173,9 +173,7 @@ static struct platform_device *platform_devices[] __initdata = {
173 * setup other stuffs to access the sram. */ 173 * setup other stuffs to access the sram. */
174static void __init pcm038_init_sram(void) 174static void __init pcm038_init_sram(void)
175{ 175{
176 __raw_writel(0x0000d843, CSCR_U(1)); 176 mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
177 __raw_writel(0x22252521, CSCR_L(1));
178 __raw_writel(0x22220a00, CSCR_A(1));
179} 177}
180 178
181static struct imxi2c_platform_data pcm038_i2c_1_data = { 179static struct imxi2c_platform_data pcm038_i2c_1_data = {
diff --git a/arch/arm/mach-mx3/mach-qong.c b/arch/arm/mach-mx3/mach-qong.c
index 93991f159211..fdb819ae0e60 100644
--- a/arch/arm/mach-mx3/mach-qong.c
+++ b/arch/arm/mach-mx3/mach-qong.c
@@ -198,9 +198,7 @@ static struct platform_device qong_nand_device = {
198static void __init qong_init_nand_mtd(void) 198static void __init qong_init_nand_mtd(void)
199{ 199{
200 /* init CS */ 200 /* init CS */
201 __raw_writel(0x00004f00, CSCR_U(3)); 201 mx31_setup_weimcs(3, 0x00004f00, 0x20013b31, 0x00020800);
202 __raw_writel(0x20013b31, CSCR_L(3));
203 __raw_writel(0x00020800, CSCR_A(3));
204 mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true); 202 mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true);
205 203
206 /* enable pin */ 204 /* enable pin */
diff --git a/arch/arm/plat-mxc/include/mach/mx27.h b/arch/arm/plat-mxc/include/mach/mx27.h
index 832b5804dcb5..bae9cd75beee 100644
--- a/arch/arm/plat-mxc/include/mach/mx27.h
+++ b/arch/arm/plat-mxc/include/mach/mx27.h
@@ -24,6 +24,10 @@
24#ifndef __MACH_MX27_H__ 24#ifndef __MACH_MX27_H__
25#define __MACH_MX27_H__ 25#define __MACH_MX27_H__
26 26
27#ifndef __ASSEMBLER__
28#include <linux/io.h>
29#endif
30
27#define MX27_AIPI_BASE_ADDR 0x10000000 31#define MX27_AIPI_BASE_ADDR 0x10000000
28#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000 32#define MX27_AIPI_BASE_ADDR_VIRT 0xf4000000
29#define MX27_AIPI_SIZE SZ_1M 33#define MX27_AIPI_SIZE SZ_1M
@@ -109,6 +113,11 @@
109#define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000) 113#define MX27_M3IF_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x3000)
110#define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000) 114#define MX27_PCMCIA_CTL_BASE_ADDR (MX27_X_MEMC_BASE_ADDR + 0x4000)
111 115
116#define MX27_WEIM_CSCRx_BASE_ADDR(cs) (MX27_WEIM_BASE_ADDR + (cs) * 0x10)
117#define MX27_WEIM_CSCRxU(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs))
118#define MX27_WEIM_CSCRxL(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
119#define MX27_WEIM_CSCRxA(cs) (MX27_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
120
112#define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000 121#define MX27_PCMCIA_MEM_BASE_ADDR 0xdc000000
113 122
114/* IRAM */ 123/* IRAM */
@@ -119,6 +128,16 @@
119 IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \ 128 IMX_IO_ADDRESS(x, MX27_SAHB1) ?: \
120 IMX_IO_ADDRESS(x, MX27_X_MEMC)) 129 IMX_IO_ADDRESS(x, MX27_X_MEMC))
121 130
131#ifndef __ASSEMBLER__
132static inline void mx27_setup_weimcs(size_t cs,
133 unsigned upper, unsigned lower, unsigned addional)
134{
135 __raw_writel(upper, MX27_IO_ADDRESS(MX27_WEIM_CSCRxU(cs)));
136 __raw_writel(lower, MX27_IO_ADDRESS(MX27_WEIM_CSCRxL(cs)));
137 __raw_writel(addional, MX27_IO_ADDRESS(MX27_WEIM_CSCRxA(cs)));
138}
139#endif
140
122/* fixed interrupt numbers */ 141/* fixed interrupt numbers */
123#define MX27_INT_I2C2 1 142#define MX27_INT_I2C2 1
124#define MX27_INT_GPT6 2 143#define MX27_INT_GPT6 2
diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index 62d26da10c66..fb90e119c2b5 100644
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -1,6 +1,10 @@
1#ifndef __MACH_MX31_H__ 1#ifndef __MACH_MX31_H__
2#define __MACH_MX31_H__ 2#define __MACH_MX31_H__
3 3
4#ifndef __ASSEMBLER__
5#include <linux/io.h>
6#endif
7
4/* 8/*
5 * IRAM 9 * IRAM
6 */ 10 */
@@ -110,6 +114,11 @@
110#define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000) 114#define MX31_EMI_CTL_BASE_ADDR (MX31_X_MEMC_BASE_ADDR + 0x4000)
111#define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR 115#define MX31_PCMCIA_CTL_BASE_ADDR MX31_EMI_CTL_BASE_ADDR
112 116
117#define MX31_WEIM_CSCRx_BASE_ADDR(cs) (MX31_WEIM_BASE_ADDR + (cs) * 0x10)
118#define MX31_WEIM_CSCRxU(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs))
119#define MX31_WEIM_CSCRxL(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x4)
120#define MX31_WEIM_CSCRxA(cs) (MX31_WEIM_CSCRx_BASE_ADDR(cs) + 0x8)
121
113#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000 122#define MX31_PCMCIA_MEM_BASE_ADDR 0xbc000000
114 123
115#define MX31_IO_ADDRESS(x) ( \ 124#define MX31_IO_ADDRESS(x) ( \
@@ -119,6 +128,16 @@
119 IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \ 128 IMX_IO_ADDRESS(x, MX31_X_MEMC) ?: \
120 IMX_IO_ADDRESS(x, MX31_SPBA0)) 129 IMX_IO_ADDRESS(x, MX31_SPBA0))
121 130
131#ifndef __ASSEMBLER__
132static inline void mx31_setup_weimcs(size_t cs,
133 unsigned upper, unsigned lower, unsigned addional)
134{
135 __raw_writel(upper, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(cs)));
136 __raw_writel(lower, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(cs)));
137 __raw_writel(addional, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(cs)));
138}
139#endif
140
122#define MX31_INT_I2C3 3 141#define MX31_INT_I2C3 3
123#define MX31_INT_I2C2 4 142#define MX31_INT_I2C2 4
124#define MX31_INT_MPEG4_ENCODER 5 143#define MX31_INT_MPEG4_ENCODER 5
diff --git a/arch/arm/plat-mxc/include/mach/mxc.h b/arch/arm/plat-mxc/include/mach/mxc.h
index 2b14126f8b51..800ae2a33b15 100644
--- a/arch/arm/plat-mxc/include/mach/mxc.h
+++ b/arch/arm/plat-mxc/include/mach/mxc.h
@@ -121,6 +121,7 @@ extern unsigned int __mxc_cpu_type;
121#endif 121#endif
122 122
123#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2) 123#if defined(CONFIG_ARCH_MX3) || defined(CONFIG_ARCH_MX2)
124/* These are deprecated, use mx[23][157]_setup_weimcs instead. */
124#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10)) 125#define CSCR_U(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10))
125#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4)) 126#define CSCR_L(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x4))
126#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8)) 127#define CSCR_A(n) (IO_ADDRESS(WEIM_BASE_ADDR + n * 0x10 + 0x8))