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-rw-r--r--sound/pci/pcxhr/pcxhr.c552
-rw-r--r--sound/pci/pcxhr/pcxhr.h76
2 files changed, 433 insertions, 195 deletions
diff --git a/sound/pci/pcxhr/pcxhr.c b/sound/pci/pcxhr/pcxhr.c
index 73de6e989b3d..0327925828d1 100644
--- a/sound/pci/pcxhr/pcxhr.c
+++ b/sound/pci/pcxhr/pcxhr.c
@@ -40,18 +40,20 @@
40#include "pcxhr_mixer.h" 40#include "pcxhr_mixer.h"
41#include "pcxhr_hwdep.h" 41#include "pcxhr_hwdep.h"
42#include "pcxhr_core.h" 42#include "pcxhr_core.h"
43#include "pcxhr_mix22.h"
43 44
44#define DRIVER_NAME "pcxhr" 45#define DRIVER_NAME "pcxhr"
45 46
46MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>"); 47MODULE_AUTHOR("Markus Bollinger <bollinger@digigram.com>, "
48 "Marc Titinger <titinger@digigram.com>");
47MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING); 49MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING);
48MODULE_LICENSE("GPL"); 50MODULE_LICENSE("GPL");
49MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}"); 51MODULE_SUPPORTED_DEVICE("{{Digigram," DRIVER_NAME "}}");
50 52
51static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 53static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
52static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 54static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
53static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 55static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
54static int mono[SNDRV_CARDS]; /* capture in mono only */ 56static int mono[SNDRV_CARDS]; /* capture mono only */
55 57
56module_param_array(index, int, NULL, 0444); 58module_param_array(index, int, NULL, 0444);
57MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard"); 59MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard");
@@ -67,18 +69,58 @@ enum {
67 PCI_ID_PCX882HR, 69 PCI_ID_PCX882HR,
68 PCI_ID_VX881HR, 70 PCI_ID_VX881HR,
69 PCI_ID_PCX881HR, 71 PCI_ID_PCX881HR,
72 PCI_ID_VX882E,
73 PCI_ID_PCX882E,
74 PCI_ID_VX881E,
75 PCI_ID_PCX881E,
76 PCI_ID_VX1222HR,
70 PCI_ID_PCX1222HR, 77 PCI_ID_PCX1222HR,
78 PCI_ID_VX1221HR,
71 PCI_ID_PCX1221HR, 79 PCI_ID_PCX1221HR,
80 PCI_ID_VX1222E,
81 PCI_ID_PCX1222E,
82 PCI_ID_VX1221E,
83 PCI_ID_PCX1221E,
84 PCI_ID_VX222HR,
85 PCI_ID_VX222E,
86 PCI_ID_PCX22HR,
87 PCI_ID_PCX22E,
88 PCI_ID_VX222HRMIC,
89 PCI_ID_VX222E_MIC,
90 PCI_ID_PCX924HR,
91 PCI_ID_PCX924E,
92 PCI_ID_PCX924HRMIC,
93 PCI_ID_PCX924E_MIC,
72 PCI_ID_LAST 94 PCI_ID_LAST
73}; 95};
74 96
75static struct pci_device_id pcxhr_ids[] = { 97static struct pci_device_id pcxhr_ids[] = {
76 { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, }, /* VX882HR */ 98 { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, },
77 { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, }, /* PCX882HR */ 99 { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, },
78 { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, }, /* VX881HR */ 100 { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, },
79 { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, }, /* PCX881HR */ 101 { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, },
80 { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, /* PCX1222HR */ 102 { 0x10b5, 0x9056, 0x1369, 0xb021, 0, 0, PCI_ID_VX882E, },
81 { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, /* PCX1221HR */ 103 { 0x10b5, 0x9056, 0x1369, 0xb121, 0, 0, PCI_ID_PCX882E, },
104 { 0x10b5, 0x9056, 0x1369, 0xb221, 0, 0, PCI_ID_VX881E, },
105 { 0x10b5, 0x9056, 0x1369, 0xb321, 0, 0, PCI_ID_PCX881E, },
106 { 0x10b5, 0x9656, 0x1369, 0xb401, 0, 0, PCI_ID_VX1222HR, },
107 { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, },
108 { 0x10b5, 0x9656, 0x1369, 0xb601, 0, 0, PCI_ID_VX1221HR, },
109 { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, },
110 { 0x10b5, 0x9056, 0x1369, 0xb421, 0, 0, PCI_ID_VX1222E, },
111 { 0x10b5, 0x9056, 0x1369, 0xb521, 0, 0, PCI_ID_PCX1222E, },
112 { 0x10b5, 0x9056, 0x1369, 0xb621, 0, 0, PCI_ID_VX1221E, },
113 { 0x10b5, 0x9056, 0x1369, 0xb721, 0, 0, PCI_ID_PCX1221E, },
114 { 0x10b5, 0x9056, 0x1369, 0xba01, 0, 0, PCI_ID_VX222HR, },
115 { 0x10b5, 0x9056, 0x1369, 0xba21, 0, 0, PCI_ID_VX222E, },
116 { 0x10b5, 0x9056, 0x1369, 0xbd01, 0, 0, PCI_ID_PCX22HR, },
117 { 0x10b5, 0x9056, 0x1369, 0xbd21, 0, 0, PCI_ID_PCX22E, },
118 { 0x10b5, 0x9056, 0x1369, 0xbc01, 0, 0, PCI_ID_VX222HRMIC, },
119 { 0x10b5, 0x9056, 0x1369, 0xbc21, 0, 0, PCI_ID_VX222E_MIC, },
120 { 0x10b5, 0x9056, 0x1369, 0xbb01, 0, 0, PCI_ID_PCX924HR, },
121 { 0x10b5, 0x9056, 0x1369, 0xbb21, 0, 0, PCI_ID_PCX924E, },
122 { 0x10b5, 0x9056, 0x1369, 0xbf01, 0, 0, PCI_ID_PCX924HRMIC, },
123 { 0x10b5, 0x9056, 0x1369, 0xbf21, 0, 0, PCI_ID_PCX924E_MIC, },
82 { 0, } 124 { 0, }
83}; 125};
84 126
@@ -88,27 +130,55 @@ struct board_parameters {
88 char* board_name; 130 char* board_name;
89 short playback_chips; 131 short playback_chips;
90 short capture_chips; 132 short capture_chips;
133 short fw_file_set;
91 short firmware_num; 134 short firmware_num;
92}; 135};
93static struct board_parameters pcxhr_board_params[] = { 136static struct board_parameters pcxhr_board_params[] = {
94[PCI_ID_VX882HR] = { "VX882HR", 4, 4, 41, }, 137[PCI_ID_VX882HR] = { "VX882HR", 4, 4, 0, 41 },
95[PCI_ID_PCX882HR] = { "PCX882HR", 4, 4, 41, }, 138[PCI_ID_PCX882HR] = { "PCX882HR", 4, 4, 0, 41 },
96[PCI_ID_VX881HR] = { "VX881HR", 4, 4, 41, }, 139[PCI_ID_VX881HR] = { "VX881HR", 4, 4, 0, 41 },
97[PCI_ID_PCX881HR] = { "PCX881HR", 4, 4, 41, }, 140[PCI_ID_PCX881HR] = { "PCX881HR", 4, 4, 0, 41 },
98[PCI_ID_PCX1222HR] = { "PCX1222HR", 6, 1, 42, }, 141[PCI_ID_VX882E] = { "VX882e", 4, 4, 1, 41 },
99[PCI_ID_PCX1221HR] = { "PCX1221HR", 6, 1, 42, }, 142[PCI_ID_PCX882E] = { "PCX882e", 4, 4, 1, 41 },
143[PCI_ID_VX881E] = { "VX881e", 4, 4, 1, 41 },
144[PCI_ID_PCX881E] = { "PCX881e", 4, 4, 1, 41 },
145[PCI_ID_VX1222HR] = { "VX1222HR", 6, 1, 2, 42 },
146[PCI_ID_PCX1222HR] = { "PCX1222HR", 6, 1, 2, 42 },
147[PCI_ID_VX1221HR] = { "VX1221HR", 6, 1, 2, 42 },
148[PCI_ID_PCX1221HR] = { "PCX1221HR", 6, 1, 2, 42 },
149[PCI_ID_VX1222E] = { "VX1222e", 6, 1, 3, 42 },
150[PCI_ID_PCX1222E] = { "PCX1222e", 6, 1, 3, 42 },
151[PCI_ID_VX1221E] = { "VX1221e", 6, 1, 3, 42 },
152[PCI_ID_PCX1221E] = { "PCX1221e", 6, 1, 3, 42 },
153[PCI_ID_VX222HR] = { "VX222HR", 1, 1, 4, 44 },
154[PCI_ID_VX222E] = { "VX222e", 1, 1, 4, 44 },
155[PCI_ID_PCX22HR] = { "PCX22HR", 1, 0, 4, 44 },
156[PCI_ID_PCX22E] = { "PCX22e", 1, 0, 4, 44 },
157[PCI_ID_VX222HRMIC] = { "VX222HR-Mic", 1, 1, 5, 44 },
158[PCI_ID_VX222E_MIC] = { "VX222e-Mic", 1, 1, 5, 44 },
159[PCI_ID_PCX924HR] = { "PCX924HR", 1, 1, 5, 44 },
160[PCI_ID_PCX924E] = { "PCX924e", 1, 1, 5, 44 },
161[PCI_ID_PCX924HRMIC] = { "PCX924HR-Mic", 1, 1, 5, 44 },
162[PCI_ID_PCX924E_MIC] = { "PCX924e-Mic", 1, 1, 5, 44 },
100}; 163};
101 164
165/* boards without hw AES1 and SRC onboard are all using fw_file_set==4 */
166/* VX222HR, VX222e, PCX22HR and PCX22e */
167#define PCXHR_BOARD_HAS_AES1(x) (x->fw_file_set != 4)
168/* some boards do not support 192kHz on digital AES input plugs */
169#define PCXHR_BOARD_AESIN_NO_192K(x) ((x->capture_chips == 0) || \
170 (x->fw_file_set == 0) || \
171 (x->fw_file_set == 2))
102 172
103static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg, 173static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
104 unsigned int* realfreq) 174 unsigned int* realfreq)
105{ 175{
106 unsigned int reg; 176 unsigned int reg;
107 177
108 if (freq < 6900 || freq > 110250) 178 if (freq < 6900 || freq > 110000)
109 return -EINVAL; 179 return -EINVAL;
110 reg = (28224000 * 10) / freq; 180 reg = (28224000 * 2) / freq;
111 reg = (reg + 5) / 10; 181 reg = (reg - 1) / 2;
112 if (reg < 0x200) 182 if (reg < 0x200)
113 *pllreg = reg + 0x800; 183 *pllreg = reg + 0x800;
114 else if (reg < 0x400) 184 else if (reg < 0x400)
@@ -121,7 +191,7 @@ static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
121 reg &= ~3; 191 reg &= ~3;
122 } 192 }
123 if (realfreq) 193 if (realfreq)
124 *realfreq = ((28224000 * 10) / reg + 5) / 10; 194 *realfreq = (28224000 / (reg + 1));
125 return 0; 195 return 0;
126} 196}
127 197
@@ -151,11 +221,6 @@ static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg,
151#define PCXHR_FREQ_AES_3 0x03 221#define PCXHR_FREQ_AES_3 0x03
152#define PCXHR_FREQ_AES_4 0x0d 222#define PCXHR_FREQ_AES_4 0x0d
153 223
154#define PCXHR_MODIFY_CLOCK_S_BIT 0x04
155
156#define PCXHR_IRQ_TIMER_FREQ 92000
157#define PCXHR_IRQ_TIMER_PERIOD 48
158
159static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate, 224static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
160 unsigned int *reg, unsigned int *freq) 225 unsigned int *reg, unsigned int *freq)
161{ 226{
@@ -196,19 +261,32 @@ static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
196 err = pcxhr_send_msg(mgr, &rmh); 261 err = pcxhr_send_msg(mgr, &rmh);
197 if (err < 0) { 262 if (err < 0) {
198 snd_printk(KERN_ERR 263 snd_printk(KERN_ERR
199 "error CMD_ACCESS_IO_WRITE for PLL register : %x!\n", 264 "error CMD_ACCESS_IO_WRITE "
200 err ); 265 "for PLL register : %x!\n", err);
201 return err; 266 return err;
202 } 267 }
203 } 268 }
204 break; 269 break;
205 case PCXHR_CLOCK_TYPE_WORD_CLOCK : val = PCXHR_FREQ_WORD_CLOCK; break; 270 case PCXHR_CLOCK_TYPE_WORD_CLOCK:
206 case PCXHR_CLOCK_TYPE_AES_SYNC : val = PCXHR_FREQ_SYNC_AES; break; 271 val = PCXHR_FREQ_WORD_CLOCK;
207 case PCXHR_CLOCK_TYPE_AES_1 : val = PCXHR_FREQ_AES_1; break; 272 break;
208 case PCXHR_CLOCK_TYPE_AES_2 : val = PCXHR_FREQ_AES_2; break; 273 case PCXHR_CLOCK_TYPE_AES_SYNC:
209 case PCXHR_CLOCK_TYPE_AES_3 : val = PCXHR_FREQ_AES_3; break; 274 val = PCXHR_FREQ_SYNC_AES;
210 case PCXHR_CLOCK_TYPE_AES_4 : val = PCXHR_FREQ_AES_4; break; 275 break;
211 default : return -EINVAL; 276 case PCXHR_CLOCK_TYPE_AES_1:
277 val = PCXHR_FREQ_AES_1;
278 break;
279 case PCXHR_CLOCK_TYPE_AES_2:
280 val = PCXHR_FREQ_AES_2;
281 break;
282 case PCXHR_CLOCK_TYPE_AES_3:
283 val = PCXHR_FREQ_AES_3;
284 break;
285 case PCXHR_CLOCK_TYPE_AES_4:
286 val = PCXHR_FREQ_AES_4;
287 break;
288 default:
289 return -EINVAL;
212 } 290 }
213 *reg = val; 291 *reg = val;
214 *freq = realfreq; 292 *freq = realfreq;
@@ -216,14 +294,13 @@ static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate,
216} 294}
217 295
218 296
219int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate) 297static int pcxhr_sub_set_clock(struct pcxhr_mgr *mgr,
298 unsigned int rate,
299 int *changed)
220{ 300{
221 unsigned int val, realfreq, speed; 301 unsigned int val, realfreq, speed;
222 struct pcxhr_rmh rmh; 302 struct pcxhr_rmh rmh;
223 int err, changed; 303 int err;
224
225 if (rate == 0)
226 return 0; /* nothing to do */
227 304
228 err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq); 305 err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq);
229 if (err) 306 if (err)
@@ -237,13 +314,17 @@ int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
237 else 314 else
238 speed = 2; /* quad speed */ 315 speed = 2; /* quad speed */
239 if (mgr->codec_speed != speed) { 316 if (mgr->codec_speed != speed) {
240 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */ 317 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */
241 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; 318 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
319 if (DSP_EXT_CMD_SET(mgr)) {
320 rmh.cmd[1] = 1;
321 rmh.cmd_len = 2;
322 }
242 err = pcxhr_send_msg(mgr, &rmh); 323 err = pcxhr_send_msg(mgr, &rmh);
243 if (err) 324 if (err)
244 return err; 325 return err;
245 326
246 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */ 327 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */
247 rmh.cmd[0] |= IO_NUM_SPEED_RATIO; 328 rmh.cmd[0] |= IO_NUM_SPEED_RATIO;
248 rmh.cmd[1] = speed; 329 rmh.cmd[1] = speed;
249 rmh.cmd_len = 2; 330 rmh.cmd_len = 2;
@@ -253,25 +334,57 @@ int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
253 } 334 }
254 /* set the new frequency */ 335 /* set the new frequency */
255 snd_printdd("clock register : set %x\n", val); 336 snd_printdd("clock register : set %x\n", val);
256 err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, val, &changed); 337 err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK,
338 val, changed);
257 if (err) 339 if (err)
258 return err; 340 return err;
341
259 mgr->sample_rate_real = realfreq; 342 mgr->sample_rate_real = realfreq;
260 mgr->cur_clock_type = mgr->use_clock_type; 343 mgr->cur_clock_type = mgr->use_clock_type;
261 344
262 /* unmute after codec speed modes */ 345 /* unmute after codec speed modes */
263 if (mgr->codec_speed != speed) { 346 if (mgr->codec_speed != speed) {
264 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */ 347 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */
265 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; 348 rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT;
349 if (DSP_EXT_CMD_SET(mgr)) {
350 rmh.cmd[1] = 1;
351 rmh.cmd_len = 2;
352 }
266 err = pcxhr_send_msg(mgr, &rmh); 353 err = pcxhr_send_msg(mgr, &rmh);
267 if (err) 354 if (err)
268 return err; 355 return err;
269 mgr->codec_speed = speed; /* save new codec speed */ 356 mgr->codec_speed = speed; /* save new codec speed */
270 } 357 }
271 358
359 snd_printdd("pcxhr_sub_set_clock to %dHz (realfreq=%d)\n",
360 rate, realfreq);
361 return 0;
362}
363
364#define PCXHR_MODIFY_CLOCK_S_BIT 0x04
365
366#define PCXHR_IRQ_TIMER_FREQ 92000
367#define PCXHR_IRQ_TIMER_PERIOD 48
368
369int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
370{
371 struct pcxhr_rmh rmh;
372 int err, changed;
373
374 if (rate == 0)
375 return 0; /* nothing to do */
376
377 if (mgr->is_hr_stereo)
378 err = hr222_sub_set_clock(mgr, rate, &changed);
379 else
380 err = pcxhr_sub_set_clock(mgr, rate, &changed);
381
382 if (err)
383 return err;
384
272 if (changed) { 385 if (changed) {
273 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK); 386 pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK);
274 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */ 387 rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */
275 if (rate < PCXHR_IRQ_TIMER_FREQ) 388 if (rate < PCXHR_IRQ_TIMER_FREQ)
276 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD; 389 rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD;
277 else 390 else
@@ -282,26 +395,39 @@ int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate)
282 if (err) 395 if (err)
283 return err; 396 return err;
284 } 397 }
285 snd_printdd("pcxhr_set_clock to %dHz (realfreq=%d)\n", rate, realfreq);
286 return 0; 398 return 0;
287} 399}
288 400
289 401
290int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, 402static int pcxhr_sub_get_external_clock(struct pcxhr_mgr *mgr,
291 int *sample_rate) 403 enum pcxhr_clock_type clock_type,
404 int *sample_rate)
292{ 405{
293 struct pcxhr_rmh rmh; 406 struct pcxhr_rmh rmh;
294 unsigned char reg; 407 unsigned char reg;
295 int err, rate; 408 int err, rate;
296 409
297 switch (clock_type) { 410 switch (clock_type) {
298 case PCXHR_CLOCK_TYPE_WORD_CLOCK : reg = REG_STATUS_WORD_CLOCK; break; 411 case PCXHR_CLOCK_TYPE_WORD_CLOCK:
299 case PCXHR_CLOCK_TYPE_AES_SYNC : reg = REG_STATUS_AES_SYNC; break; 412 reg = REG_STATUS_WORD_CLOCK;
300 case PCXHR_CLOCK_TYPE_AES_1 : reg = REG_STATUS_AES_1; break; 413 break;
301 case PCXHR_CLOCK_TYPE_AES_2 : reg = REG_STATUS_AES_2; break; 414 case PCXHR_CLOCK_TYPE_AES_SYNC:
302 case PCXHR_CLOCK_TYPE_AES_3 : reg = REG_STATUS_AES_3; break; 415 reg = REG_STATUS_AES_SYNC;
303 case PCXHR_CLOCK_TYPE_AES_4 : reg = REG_STATUS_AES_4; break; 416 break;
304 default : return -EINVAL; 417 case PCXHR_CLOCK_TYPE_AES_1:
418 reg = REG_STATUS_AES_1;
419 break;
420 case PCXHR_CLOCK_TYPE_AES_2:
421 reg = REG_STATUS_AES_2;
422 break;
423 case PCXHR_CLOCK_TYPE_AES_3:
424 reg = REG_STATUS_AES_3;
425 break;
426 case PCXHR_CLOCK_TYPE_AES_4:
427 reg = REG_STATUS_AES_4;
428 break;
429 default:
430 return -EINVAL;
305 } 431 }
306 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); 432 pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ);
307 rmh.cmd_len = 2; 433 rmh.cmd_len = 2;
@@ -311,7 +437,7 @@ int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_
311 err = pcxhr_send_msg(mgr, &rmh); 437 err = pcxhr_send_msg(mgr, &rmh);
312 if (err) 438 if (err)
313 return err; 439 return err;
314 udelay(100); /* wait minimum 2 sample_frames at 32kHz ! */ 440 udelay(100); /* wait minimum 2 sample_frames at 32kHz ! */
315 mgr->last_reg_stat = reg; 441 mgr->last_reg_stat = reg;
316 } 442 }
317 rmh.cmd[1] = REG_STATUS_CURRENT; 443 rmh.cmd[1] = REG_STATUS_CURRENT;
@@ -336,6 +462,18 @@ int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_
336} 462}
337 463
338 464
465int pcxhr_get_external_clock(struct pcxhr_mgr *mgr,
466 enum pcxhr_clock_type clock_type,
467 int *sample_rate)
468{
469 if (mgr->is_hr_stereo)
470 return hr222_get_external_clock(mgr, clock_type,
471 sample_rate);
472 else
473 return pcxhr_sub_get_external_clock(mgr, clock_type,
474 sample_rate);
475}
476
339/* 477/*
340 * start or stop playback/capture substream 478 * start or stop playback/capture substream
341 */ 479 */
@@ -350,7 +488,8 @@ static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
350 start = 1; 488 start = 1;
351 else { 489 else {
352 if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) { 490 if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) {
353 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state CANNOT be stopped\n"); 491 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state "
492 "CANNOT be stopped\n");
354 return -EINVAL; 493 return -EINVAL;
355 } 494 }
356 start = 0; 495 start = 0;
@@ -359,11 +498,12 @@ static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
359 return -EINVAL; 498 return -EINVAL;
360 499
361 stream->timer_abs_periods = 0; 500 stream->timer_abs_periods = 0;
362 stream->timer_period_frag = 0; /* reset theoretical stream pos */ 501 stream->timer_period_frag = 0; /* reset theoretical stream pos */
363 stream->timer_buf_periods = 0; 502 stream->timer_buf_periods = 0;
364 stream->timer_is_synced = 0; 503 stream->timer_is_synced = 0;
365 504
366 stream_mask = stream->pipe->is_capture ? 1 : 1<<stream->substream->number; 505 stream_mask =
506 stream->pipe->is_capture ? 1 : 1<<stream->substream->number;
367 507
368 pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM); 508 pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM);
369 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 509 pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture,
@@ -373,8 +513,10 @@ static int pcxhr_set_stream_state(struct pcxhr_stream *stream)
373 513
374 err = pcxhr_send_msg(chip->mgr, &rmh); 514 err = pcxhr_send_msg(chip->mgr, &rmh);
375 if (err) 515 if (err)
376 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n", err); 516 snd_printk(KERN_ERR "ERROR pcxhr_set_stream_state err=%x;\n",
377 stream->status = start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED; 517 err);
518 stream->status =
519 start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED;
378 return err; 520 return err;
379} 521}
380 522
@@ -399,13 +541,15 @@ static int pcxhr_set_format(struct pcxhr_stream *stream)
399 header = HEADER_FMT_BASE_LIN; 541 header = HEADER_FMT_BASE_LIN;
400 break; 542 break;
401 case SNDRV_PCM_FORMAT_S16_LE: 543 case SNDRV_PCM_FORMAT_S16_LE:
402 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS | HEADER_FMT_INTEL; 544 header = HEADER_FMT_BASE_LIN |
545 HEADER_FMT_16BITS | HEADER_FMT_INTEL;
403 break; 546 break;
404 case SNDRV_PCM_FORMAT_S16_BE: 547 case SNDRV_PCM_FORMAT_S16_BE:
405 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS; 548 header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS;
406 break; 549 break;
407 case SNDRV_PCM_FORMAT_S24_3LE: 550 case SNDRV_PCM_FORMAT_S24_3LE:
408 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS | HEADER_FMT_INTEL; 551 header = HEADER_FMT_BASE_LIN |
552 HEADER_FMT_24BITS | HEADER_FMT_INTEL;
409 break; 553 break;
410 case SNDRV_PCM_FORMAT_S24_3BE: 554 case SNDRV_PCM_FORMAT_S24_3BE:
411 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS; 555 header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS;
@@ -414,7 +558,8 @@ static int pcxhr_set_format(struct pcxhr_stream *stream)
414 header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL; 558 header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL;
415 break; 559 break;
416 default: 560 default:
417 snd_printk(KERN_ERR "error pcxhr_set_format() : unknown format\n"); 561 snd_printk(KERN_ERR
562 "error pcxhr_set_format() : unknown format\n");
418 return -EINVAL; 563 return -EINVAL;
419 } 564 }
420 chip = snd_pcm_substream_chip(stream->substream); 565 chip = snd_pcm_substream_chip(stream->substream);
@@ -432,14 +577,31 @@ static int pcxhr_set_format(struct pcxhr_stream *stream)
432 is_capture = stream->pipe->is_capture; 577 is_capture = stream->pipe->is_capture;
433 stream_num = is_capture ? 0 : stream->substream->number; 578 stream_num = is_capture ? 0 : stream->substream->number;
434 579
435 pcxhr_init_rmh(&rmh, is_capture ? CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT); 580 pcxhr_init_rmh(&rmh, is_capture ?
436 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0); 581 CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT);
437 if (is_capture) 582 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
438 rmh.cmd[0] |= 1<<12; 583 stream_num, 0);
584 if (is_capture) {
585 /* bug with old dsp versions: */
586 /* bit 12 also sets the format of the playback stream */
587 if (DSP_EXT_CMD_SET(chip->mgr))
588 rmh.cmd[0] |= 1<<10;
589 else
590 rmh.cmd[0] |= 1<<12;
591 }
439 rmh.cmd[1] = 0; 592 rmh.cmd[1] = 0;
440 rmh.cmd[2] = header >> 8; 593 rmh.cmd_len = 2;
441 rmh.cmd[3] = (header & 0xff) << 16; 594 if (DSP_EXT_CMD_SET(chip->mgr)) {
442 rmh.cmd_len = 4; 595 /* add channels and set bit 19 if channels>2 */
596 rmh.cmd[1] = stream->channels;
597 if (!is_capture) {
598 /* playback : add channel mask to command */
599 rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03;
600 rmh.cmd_len = 3;
601 }
602 }
603 rmh.cmd[rmh.cmd_len++] = header >> 8;
604 rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16;
443 err = pcxhr_send_msg(chip->mgr, &rmh); 605 err = pcxhr_send_msg(chip->mgr, &rmh);
444 if (err) 606 if (err)
445 snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err); 607 snd_printk(KERN_ERR "ERROR pcxhr_set_format err=%x;\n", err);
@@ -456,30 +618,38 @@ static int pcxhr_update_r_buffer(struct pcxhr_stream *stream)
456 is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE); 618 is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE);
457 stream_num = is_capture ? 0 : subs->number; 619 stream_num = is_capture ? 0 : subs->number;
458 620
459 snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n", 621 snd_printdd("pcxhr_update_r_buffer(pcm%c%d) : "
622 "addr(%p) bytes(%zx) subs(%d)\n",
460 is_capture ? 'c' : 'p', 623 is_capture ? 'c' : 'p',
461 chip->chip_idx, (void *)(long)subs->runtime->dma_addr, 624 chip->chip_idx, (void *)(long)subs->runtime->dma_addr,
462 subs->runtime->dma_bytes, subs->number); 625 subs->runtime->dma_bytes, subs->number);
463 626
464 pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS); 627 pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS);
465 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, stream_num, 0); 628 pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio,
629 stream_num, 0);
466 630
467 /* max buffer size is 2 MByte */ 631 /* max buffer size is 2 MByte */
468 snd_BUG_ON(subs->runtime->dma_bytes >= 0x200000); 632 snd_BUG_ON(subs->runtime->dma_bytes >= 0x200000);
469 rmh.cmd[1] = subs->runtime->dma_bytes * 8; /* size in bits */ 633 /* size in bits */
470 rmh.cmd[2] = subs->runtime->dma_addr >> 24; /* most significant byte */ 634 rmh.cmd[1] = subs->runtime->dma_bytes * 8;
471 rmh.cmd[2] |= 1<<19; /* this is a circular buffer */ 635 /* most significant byte */
472 rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD; /* least 3 significant bytes */ 636 rmh.cmd[2] = subs->runtime->dma_addr >> 24;
637 /* this is a circular buffer */
638 rmh.cmd[2] |= 1<<19;
639 /* least 3 significant bytes */
640 rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD;
473 rmh.cmd_len = 4; 641 rmh.cmd_len = 4;
474 err = pcxhr_send_msg(chip->mgr, &rmh); 642 err = pcxhr_send_msg(chip->mgr, &rmh);
475 if (err) 643 if (err)
476 snd_printk(KERN_ERR "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err); 644 snd_printk(KERN_ERR
645 "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err);
477 return err; 646 return err;
478} 647}
479 648
480 649
481#if 0 650#if 0
482static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, snd_pcm_uframes_t *sample_count) 651static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream,
652 snd_pcm_uframes_t *sample_count)
483{ 653{
484 struct pcxhr_rmh rmh; 654 struct pcxhr_rmh rmh;
485 int err; 655 int err;
@@ -533,8 +703,8 @@ static void pcxhr_trigger_tasklet(unsigned long arg)
533 for (j = 0; j < chip->nb_streams_play; j++) { 703 for (j = 0; j < chip->nb_streams_play; j++) {
534 if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) { 704 if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) {
535 playback_mask |= (1 << pipe->first_audio); 705 playback_mask |= (1 << pipe->first_audio);
536 break; /* add only once, as all playback streams of 706 break; /* add only once, as all playback
537 * one chip use the same pipe 707 * streams of one chip use the same pipe
538 */ 708 */
539 } 709 }
540 } 710 }
@@ -545,19 +715,21 @@ static void pcxhr_trigger_tasklet(unsigned long arg)
545 return; 715 return;
546 } 716 }
547 717
548 snd_printdd("pcxhr_trigger_tasklet : playback_mask=%x capture_mask=%x\n", 718 snd_printdd("pcxhr_trigger_tasklet : "
719 "playback_mask=%x capture_mask=%x\n",
549 playback_mask, capture_mask); 720 playback_mask, capture_mask);
550 721
551 /* synchronous stop of all the pipes concerned */ 722 /* synchronous stop of all the pipes concerned */
552 err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0); 723 err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0);
553 if (err) { 724 if (err) {
554 mutex_unlock(&mgr->setup_mutex); 725 mutex_unlock(&mgr->setup_mutex);
555 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error stop pipes (P%x C%x)\n", 726 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : "
727 "error stop pipes (P%x C%x)\n",
556 playback_mask, capture_mask); 728 playback_mask, capture_mask);
557 return; 729 return;
558 } 730 }
559 731
560 /* unfortunately the dsp lost format and buffer info with the stop pipe */ 732 /* the dsp lost format and buffer info with the stop pipe */
561 for (i = 0; i < mgr->num_cards; i++) { 733 for (i = 0; i < mgr->num_cards; i++) {
562 struct pcxhr_stream *stream; 734 struct pcxhr_stream *stream;
563 chip = mgr->chip[i]; 735 chip = mgr->chip[i];
@@ -596,12 +768,15 @@ static void pcxhr_trigger_tasklet(unsigned long arg)
596 err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1); 768 err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1);
597 if (err) { 769 if (err) {
598 mutex_unlock(&mgr->setup_mutex); 770 mutex_unlock(&mgr->setup_mutex);
599 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : error start pipes (P%x C%x)\n", 771 snd_printk(KERN_ERR "pcxhr_trigger_tasklet : "
772 "error start pipes (P%x C%x)\n",
600 playback_mask, capture_mask); 773 playback_mask, capture_mask);
601 return; 774 return;
602 } 775 }
603 776
604 /* put the streams into the running state now (increment pointer by interrupt) */ 777 /* put the streams into the running state now
778 * (increment pointer by interrupt)
779 */
605 spin_lock_irqsave(&mgr->lock, flags); 780 spin_lock_irqsave(&mgr->lock, flags);
606 for ( i =0; i < mgr->num_cards; i++) { 781 for ( i =0; i < mgr->num_cards; i++) {
607 struct pcxhr_stream *stream; 782 struct pcxhr_stream *stream;
@@ -615,7 +790,7 @@ static void pcxhr_trigger_tasklet(unsigned long arg)
615 stream = &chip->playback_stream[j]; 790 stream = &chip->playback_stream[j];
616 if (stream->status == PCXHR_STREAM_STATUS_STARTED) { 791 if (stream->status == PCXHR_STREAM_STATUS_STARTED) {
617 /* playback will already have advanced ! */ 792 /* playback will already have advanced ! */
618 stream->timer_period_frag += PCXHR_GRANULARITY; 793 stream->timer_period_frag += mgr->granularity;
619 stream->status = PCXHR_STREAM_STATUS_RUNNING; 794 stream->status = PCXHR_STREAM_STATUS_RUNNING;
620 } 795 }
621 } 796 }
@@ -697,12 +872,14 @@ static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start)
697 872
698 pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT); 873 pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT);
699 if (start) { 874 if (start) {
700 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; /* last dsp time invalid */ 875 /* last dsp time invalid */
701 rmh.cmd[0] |= PCXHR_GRANULARITY; 876 mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID;
877 rmh.cmd[0] |= mgr->granularity;
702 } 878 }
703 err = pcxhr_send_msg(mgr, &rmh); 879 err = pcxhr_send_msg(mgr, &rmh);
704 if (err < 0) 880 if (err < 0)
705 snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n", err); 881 snd_printk(KERN_ERR "error pcxhr_hardware_timer err(%x)\n",
882 err);
706 return err; 883 return err;
707} 884}
708 885
@@ -713,38 +890,16 @@ static int pcxhr_prepare(struct snd_pcm_substream *subs)
713{ 890{
714 struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); 891 struct snd_pcxhr *chip = snd_pcm_substream_chip(subs);
715 struct pcxhr_mgr *mgr = chip->mgr; 892 struct pcxhr_mgr *mgr = chip->mgr;
716 /*
717 struct pcxhr_stream *stream = (pcxhr_stream_t*)subs->runtime->private_data;
718 */
719 int err = 0; 893 int err = 0;
720 894
721 snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n", 895 snd_printdd("pcxhr_prepare : period_size(%lx) periods(%x) buffer_size(%lx)\n",
722 subs->runtime->period_size, subs->runtime->periods, 896 subs->runtime->period_size, subs->runtime->periods,
723 subs->runtime->buffer_size); 897 subs->runtime->buffer_size);
724 898
725 /*
726 if(subs->runtime->period_size <= PCXHR_GRANULARITY) {
727 snd_printk(KERN_ERR "pcxhr_prepare : error period_size too small (%x)\n",
728 (unsigned int)subs->runtime->period_size);
729 return -EINVAL;
730 }
731 */
732
733 mutex_lock(&mgr->setup_mutex); 899 mutex_lock(&mgr->setup_mutex);
734 900
735 do { 901 do {
736 /* if the stream was stopped before, format and buffer were reset */
737 /*
738 if(stream->status == PCXHR_STREAM_STATUS_STOPPED) {
739 err = pcxhr_set_format(stream);
740 if(err) break;
741 err = pcxhr_update_r_buffer(stream);
742 if(err) break;
743 }
744 */
745
746 /* only the first stream can choose the sample rate */ 902 /* only the first stream can choose the sample rate */
747 /* the further opened streams will be limited to its frequency (see open) */
748 /* set the clock only once (first stream) */ 903 /* set the clock only once (first stream) */
749 if (mgr->sample_rate != subs->runtime->rate) { 904 if (mgr->sample_rate != subs->runtime->rate) {
750 err = pcxhr_set_clock(mgr, subs->runtime->rate); 905 err = pcxhr_set_clock(mgr, subs->runtime->rate);
@@ -787,22 +942,9 @@ static int pcxhr_hw_params(struct snd_pcm_substream *subs,
787 stream->channels = channels; 942 stream->channels = channels;
788 stream->format = format; 943 stream->format = format;
789 944
790 /* set the format to the board */
791 /*
792 err = pcxhr_set_format(stream);
793 if(err) {
794 mutex_unlock(&mgr->setup_mutex);
795 return err;
796 }
797 */
798 /* allocate buffer */ 945 /* allocate buffer */
799 err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw)); 946 err = snd_pcm_lib_malloc_pages(subs, params_buffer_bytes(hw));
800 947
801 /*
802 if (err > 0) {
803 err = pcxhr_update_r_buffer(stream);
804 }
805 */
806 mutex_unlock(&mgr->setup_mutex); 948 mutex_unlock(&mgr->setup_mutex);
807 949
808 return err; 950 return err;
@@ -820,14 +962,18 @@ static int pcxhr_hw_free(struct snd_pcm_substream *subs)
820 */ 962 */
821static struct snd_pcm_hardware pcxhr_caps = 963static struct snd_pcm_hardware pcxhr_caps =
822{ 964{
823 .info = ( SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 965 .info = (SNDRV_PCM_INFO_MMAP |
824 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_SYNC_START | 966 SNDRV_PCM_INFO_INTERLEAVED |
825 0 /*SNDRV_PCM_INFO_PAUSE*/), 967 SNDRV_PCM_INFO_MMAP_VALID |
826 .formats = ( SNDRV_PCM_FMTBIT_U8 | 968 SNDRV_PCM_INFO_SYNC_START),
827 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | 969 .formats = (SNDRV_PCM_FMTBIT_U8 |
828 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | 970 SNDRV_PCM_FMTBIT_S16_LE |
829 SNDRV_PCM_FMTBIT_FLOAT_LE ), 971 SNDRV_PCM_FMTBIT_S16_BE |
830 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_192000, 972 SNDRV_PCM_FMTBIT_S24_3LE |
973 SNDRV_PCM_FMTBIT_S24_3BE |
974 SNDRV_PCM_FMTBIT_FLOAT_LE),
975 .rates = (SNDRV_PCM_RATE_CONTINUOUS |
976 SNDRV_PCM_RATE_8000_192000),
831 .rate_min = 8000, 977 .rate_min = 8000,
832 .rate_max = 192000, 978 .rate_max = 192000,
833 .channels_min = 1, 979 .channels_min = 1,
@@ -847,6 +993,7 @@ static int pcxhr_open(struct snd_pcm_substream *subs)
847 struct pcxhr_mgr *mgr = chip->mgr; 993 struct pcxhr_mgr *mgr = chip->mgr;
848 struct snd_pcm_runtime *runtime = subs->runtime; 994 struct snd_pcm_runtime *runtime = subs->runtime;
849 struct pcxhr_stream *stream; 995 struct pcxhr_stream *stream;
996 int err;
850 997
851 mutex_lock(&mgr->setup_mutex); 998 mutex_lock(&mgr->setup_mutex);
852 999
@@ -874,6 +1021,18 @@ static int pcxhr_open(struct snd_pcm_substream *subs)
874 return -EBUSY; 1021 return -EBUSY;
875 } 1022 }
876 1023
1024 /* float format support is in some cases buggy on stereo cards */
1025 if (mgr->is_hr_stereo)
1026 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_FLOAT_LE;
1027
1028 /* buffer-size should better be multiple of period-size */
1029 err = snd_pcm_hw_constraint_integer(runtime,
1030 SNDRV_PCM_HW_PARAM_PERIODS);
1031 if (err < 0) {
1032 mutex_unlock(&mgr->setup_mutex);
1033 return err;
1034 }
1035
877 /* if a sample rate is already used or fixed by external clock, 1036 /* if a sample rate is already used or fixed by external clock,
878 * the stream cannot change 1037 * the stream cannot change
879 */ 1038 */
@@ -889,7 +1048,8 @@ static int pcxhr_open(struct snd_pcm_substream *subs)
889 mutex_unlock(&mgr->setup_mutex); 1048 mutex_unlock(&mgr->setup_mutex);
890 return -EBUSY; 1049 return -EBUSY;
891 } 1050 }
892 runtime->hw.rate_min = runtime->hw.rate_max = external_rate; 1051 runtime->hw.rate_min = external_rate;
1052 runtime->hw.rate_max = external_rate;
893 } 1053 }
894 } 1054 }
895 1055
@@ -899,9 +1059,11 @@ static int pcxhr_open(struct snd_pcm_substream *subs)
899 1059
900 runtime->private_data = stream; 1060 runtime->private_data = stream;
901 1061
902 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 4); 1062 /* better get a divisor of granularity values (96 or 192) */
903 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 4); 1063 snd_pcm_hw_constraint_step(runtime, 0,
904 1064 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32);
1065 snd_pcm_hw_constraint_step(runtime, 0,
1066 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32);
905 snd_pcm_set_sync(subs); 1067 snd_pcm_set_sync(subs);
906 1068
907 mgr->ref_count_rate++; 1069 mgr->ref_count_rate++;
@@ -919,11 +1081,12 @@ static int pcxhr_close(struct snd_pcm_substream *subs)
919 1081
920 mutex_lock(&mgr->setup_mutex); 1082 mutex_lock(&mgr->setup_mutex);
921 1083
922 snd_printdd("pcxhr_close chip%d subs%d\n", chip->chip_idx, subs->number); 1084 snd_printdd("pcxhr_close chip%d subs%d\n",
1085 chip->chip_idx, subs->number);
923 1086
924 /* sample rate released */ 1087 /* sample rate released */
925 if (--mgr->ref_count_rate == 0) { 1088 if (--mgr->ref_count_rate == 0) {
926 mgr->sample_rate = 0; /* the sample rate is no more locked */ 1089 mgr->sample_rate = 0; /* the sample rate is no more locked */
927 pcxhr_hardware_timer(mgr, 0); /* stop the DSP-timer */ 1090 pcxhr_hardware_timer(mgr, 0); /* stop the DSP-timer */
928 } 1091 }
929 1092
@@ -1016,7 +1179,8 @@ static int pcxhr_chip_dev_free(struct snd_device *device)
1016 1179
1017/* 1180/*
1018 */ 1181 */
1019static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card, int idx) 1182static int __devinit pcxhr_create(struct pcxhr_mgr *mgr,
1183 struct snd_card *card, int idx)
1020{ 1184{
1021 int err; 1185 int err;
1022 struct snd_pcxhr *chip; 1186 struct snd_pcxhr *chip;
@@ -1040,7 +1204,7 @@ static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card,
1040 1204
1041 if (idx < mgr->capture_chips) { 1205 if (idx < mgr->capture_chips) {
1042 if (mgr->mono_capture) 1206 if (mgr->mono_capture)
1043 chip->nb_streams_capt = 2; /* 2 mono streams (left+right) */ 1207 chip->nb_streams_capt = 2; /* 2 mono streams */
1044 else 1208 else
1045 chip->nb_streams_capt = 1; /* or 1 stereo stream */ 1209 chip->nb_streams_capt = 1; /* or 1 stereo stream */
1046 } 1210 }
@@ -1056,7 +1220,8 @@ static int __devinit pcxhr_create(struct pcxhr_mgr *mgr, struct snd_card *card,
1056} 1220}
1057 1221
1058/* proc interface */ 1222/* proc interface */
1059static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1223static void pcxhr_proc_info(struct snd_info_entry *entry,
1224 struct snd_info_buffer *buffer)
1060{ 1225{
1061 struct snd_pcxhr *chip = entry->private_data; 1226 struct snd_pcxhr *chip = entry->private_data;
1062 struct pcxhr_mgr *mgr = chip->mgr; 1227 struct pcxhr_mgr *mgr = chip->mgr;
@@ -1069,8 +1234,10 @@ static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer
1069 short ver_maj = (mgr->dsp_version >> 16) & 0xff; 1234 short ver_maj = (mgr->dsp_version >> 16) & 0xff;
1070 short ver_min = (mgr->dsp_version >> 8) & 0xff; 1235 short ver_min = (mgr->dsp_version >> 8) & 0xff;
1071 short ver_build = mgr->dsp_version & 0xff; 1236 short ver_build = mgr->dsp_version & 0xff;
1072 snd_iprintf(buffer, "module version %s\n", PCXHR_DRIVER_VERSION_STRING); 1237 snd_iprintf(buffer, "module version %s\n",
1073 snd_iprintf(buffer, "dsp version %d.%d.%d\n", ver_maj, ver_min, ver_build); 1238 PCXHR_DRIVER_VERSION_STRING);
1239 snd_iprintf(buffer, "dsp version %d.%d.%d\n",
1240 ver_maj, ver_min, ver_build);
1074 if (mgr->board_has_analog) 1241 if (mgr->board_has_analog)
1075 snd_iprintf(buffer, "analog io available\n"); 1242 snd_iprintf(buffer, "analog io available\n");
1076 else 1243 else
@@ -1084,18 +1251,22 @@ static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer
1084 if (ref > 0) { 1251 if (ref > 0) {
1085 if (mgr->sample_rate_real != 0 && 1252 if (mgr->sample_rate_real != 0 &&
1086 mgr->sample_rate_real != 48000) { 1253 mgr->sample_rate_real != 48000) {
1087 ref = (ref * 48000) / mgr->sample_rate_real; 1254 ref = (ref * 48000) /
1088 if (mgr->sample_rate_real >= PCXHR_IRQ_TIMER_FREQ) 1255 mgr->sample_rate_real;
1256 if (mgr->sample_rate_real >=
1257 PCXHR_IRQ_TIMER_FREQ)
1089 ref *= 2; 1258 ref *= 2;
1090 } 1259 }
1091 cur = 100 - (100 * cur) / ref; 1260 cur = 100 - (100 * cur) / ref;
1092 snd_iprintf(buffer, "cpu load %d%%\n", cur); 1261 snd_iprintf(buffer, "cpu load %d%%\n", cur);
1093 snd_iprintf(buffer, "buffer pool %d/%d kWords\n", 1262 snd_iprintf(buffer, "buffer pool %d/%d\n",
1094 rmh.stat[2], rmh.stat[3]); 1263 rmh.stat[2], rmh.stat[3]);
1095 } 1264 }
1096 } 1265 }
1097 snd_iprintf(buffer, "dma granularity : %d\n", PCXHR_GRANULARITY); 1266 snd_iprintf(buffer, "dma granularity : %d\n",
1098 snd_iprintf(buffer, "dsp time errors : %d\n", mgr->dsp_time_err); 1267 mgr->granularity);
1268 snd_iprintf(buffer, "dsp time errors : %d\n",
1269 mgr->dsp_time_err);
1099 snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n", 1270 snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n",
1100 mgr->async_err_pipe_xrun); 1271 mgr->async_err_pipe_xrun);
1101 snd_iprintf(buffer, "dsp async stream xrun errors : %d\n", 1272 snd_iprintf(buffer, "dsp async stream xrun errors : %d\n",
@@ -1110,33 +1281,52 @@ static void pcxhr_proc_info(struct snd_info_entry *entry, struct snd_info_buffer
1110 rmh.cmd_idx = CMD_LAST_INDEX; 1281 rmh.cmd_idx = CMD_LAST_INDEX;
1111 if( ! pcxhr_send_msg(mgr, &rmh) ) { 1282 if( ! pcxhr_send_msg(mgr, &rmh) ) {
1112 int i; 1283 int i;
1284 if (rmh.stat_len > 8)
1285 rmh.stat_len = 8;
1113 for (i = 0; i < rmh.stat_len; i++) 1286 for (i = 0; i < rmh.stat_len; i++)
1114 snd_iprintf(buffer, "debug[%02d] = %06x\n", i, rmh.stat[i]); 1287 snd_iprintf(buffer, "debug[%02d] = %06x\n",
1288 i, rmh.stat[i]);
1115 } 1289 }
1116 } else 1290 } else
1117 snd_iprintf(buffer, "no firmware loaded\n"); 1291 snd_iprintf(buffer, "no firmware loaded\n");
1118 snd_iprintf(buffer, "\n"); 1292 snd_iprintf(buffer, "\n");
1119} 1293}
1120static void pcxhr_proc_sync(struct snd_info_entry *entry, struct snd_info_buffer *buffer) 1294static void pcxhr_proc_sync(struct snd_info_entry *entry,
1295 struct snd_info_buffer *buffer)
1121{ 1296{
1122 struct snd_pcxhr *chip = entry->private_data; 1297 struct snd_pcxhr *chip = entry->private_data;
1123 struct pcxhr_mgr *mgr = chip->mgr; 1298 struct pcxhr_mgr *mgr = chip->mgr;
1124 static char *texts[7] = { 1299 static const char *textsHR22[3] = {
1125 "Internal", "Word", "AES Sync", "AES 1", "AES 2", "AES 3", "AES 4" 1300 "Internal", "AES Sync", "AES 1"
1301 };
1302 static const char *textsPCXHR[7] = {
1303 "Internal", "Word", "AES Sync",
1304 "AES 1", "AES 2", "AES 3", "AES 4"
1126 }; 1305 };
1306 const char **texts;
1307 int max_clock;
1308 if (mgr->is_hr_stereo) {
1309 texts = textsHR22;
1310 max_clock = HR22_CLOCK_TYPE_MAX;
1311 } else {
1312 texts = textsPCXHR;
1313 max_clock = PCXHR_CLOCK_TYPE_MAX;
1314 }
1127 1315
1128 snd_iprintf(buffer, "\n%s\n", mgr->longname); 1316 snd_iprintf(buffer, "\n%s\n", mgr->longname);
1129 snd_iprintf(buffer, "Current Sample Clock\t: %s\n", texts[mgr->cur_clock_type]); 1317 snd_iprintf(buffer, "Current Sample Clock\t: %s\n",
1130 snd_iprintf(buffer, "Current Sample Rate\t= %d\n", mgr->sample_rate_real); 1318 texts[mgr->cur_clock_type]);
1131 1319 snd_iprintf(buffer, "Current Sample Rate\t= %d\n",
1320 mgr->sample_rate_real);
1132 /* commands available when embedded DSP is running */ 1321 /* commands available when embedded DSP is running */
1133 if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { 1322 if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) {
1134 int i, err, sample_rate; 1323 int i, err, sample_rate;
1135 for (i = PCXHR_CLOCK_TYPE_WORD_CLOCK; i< (3 + mgr->capture_chips); i++) { 1324 for (i = 1; i <= max_clock; i++) {
1136 err = pcxhr_get_external_clock(mgr, i, &sample_rate); 1325 err = pcxhr_get_external_clock(mgr, i, &sample_rate);
1137 if (err) 1326 if (err)
1138 break; 1327 break;
1139 snd_iprintf(buffer, "%s Clock\t\t= %d\n", texts[i], sample_rate); 1328 snd_iprintf(buffer, "%s Clock\t\t= %d\n",
1329 texts[i], sample_rate);
1140 } 1330 }
1141 } else 1331 } else
1142 snd_iprintf(buffer, "no firmware loaded\n"); 1332 snd_iprintf(buffer, "no firmware loaded\n");
@@ -1194,7 +1384,8 @@ static int pcxhr_free(struct pcxhr_mgr *mgr)
1194/* 1384/*
1195 * probe function - creates the card manager 1385 * probe function - creates the card manager
1196 */ 1386 */
1197static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) 1387static int __devinit pcxhr_probe(struct pci_dev *pci,
1388 const struct pci_device_id *pci_id)
1198{ 1389{
1199 static int dev; 1390 static int dev;
1200 struct pcxhr_mgr *mgr; 1391 struct pcxhr_mgr *mgr;
@@ -1217,7 +1408,8 @@ static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id
1217 1408
1218 /* check if we can restrict PCI DMA transfers to 32 bits */ 1409 /* check if we can restrict PCI DMA transfers to 32 bits */
1219 if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0) { 1410 if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0) {
1220 snd_printk(KERN_ERR "architecture does not support 32bit PCI busmaster DMA\n"); 1411 snd_printk(KERN_ERR "architecture does not support "
1412 "32bit PCI busmaster DMA\n");
1221 pci_disable_device(pci); 1413 pci_disable_device(pci);
1222 return -ENXIO; 1414 return -ENXIO;
1223 } 1415 }
@@ -1234,11 +1426,25 @@ static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id
1234 pci_disable_device(pci); 1426 pci_disable_device(pci);
1235 return -ENODEV; 1427 return -ENODEV;
1236 } 1428 }
1237 card_name = pcxhr_board_params[pci_id->driver_data].board_name; 1429 card_name =
1238 mgr->playback_chips = pcxhr_board_params[pci_id->driver_data].playback_chips; 1430 pcxhr_board_params[pci_id->driver_data].board_name;
1239 mgr->capture_chips = pcxhr_board_params[pci_id->driver_data].capture_chips; 1431 mgr->playback_chips =
1240 mgr->firmware_num = pcxhr_board_params[pci_id->driver_data].firmware_num; 1432 pcxhr_board_params[pci_id->driver_data].playback_chips;
1433 mgr->capture_chips =
1434 pcxhr_board_params[pci_id->driver_data].capture_chips;
1435 mgr->fw_file_set =
1436 pcxhr_board_params[pci_id->driver_data].fw_file_set;
1437 mgr->firmware_num =
1438 pcxhr_board_params[pci_id->driver_data].firmware_num;
1241 mgr->mono_capture = mono[dev]; 1439 mgr->mono_capture = mono[dev];
1440 mgr->is_hr_stereo = (mgr->playback_chips == 1);
1441 mgr->board_has_aes1 = PCXHR_BOARD_HAS_AES1(mgr);
1442 mgr->board_aes_in_192k = !PCXHR_BOARD_AESIN_NO_192K(mgr);
1443
1444 if (mgr->is_hr_stereo)
1445 mgr->granularity = PCXHR_GRANULARITY_HR22;
1446 else
1447 mgr->granularity = PCXHR_GRANULARITY;
1242 1448
1243 /* resource assignment */ 1449 /* resource assignment */
1244 if ((err = pci_request_regions(pci, card_name)) < 0) { 1450 if ((err = pci_request_regions(pci, card_name)) < 0) {
@@ -1261,7 +1467,8 @@ static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id
1261 mgr->irq = pci->irq; 1467 mgr->irq = pci->irq;
1262 1468
1263 sprintf(mgr->shortname, "Digigram %s", card_name); 1469 sprintf(mgr->shortname, "Digigram %s", card_name);
1264 sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i", mgr->shortname, 1470 sprintf(mgr->longname, "%s at 0x%lx & 0x%lx, 0x%lx irq %i",
1471 mgr->shortname,
1265 mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq); 1472 mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq);
1266 1473
1267 /* ISR spinlock */ 1474 /* ISR spinlock */
@@ -1272,10 +1479,14 @@ static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id
1272 mutex_init(&mgr->setup_mutex); 1479 mutex_init(&mgr->setup_mutex);
1273 1480
1274 /* init taslket */ 1481 /* init taslket */
1275 tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet, (unsigned long) mgr); 1482 tasklet_init(&mgr->msg_taskq, pcxhr_msg_tasklet,
1276 tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet, (unsigned long) mgr); 1483 (unsigned long) mgr);
1484 tasklet_init(&mgr->trigger_taskq, pcxhr_trigger_tasklet,
1485 (unsigned long) mgr);
1486
1277 mgr->prmh = kmalloc(sizeof(*mgr->prmh) + 1487 mgr->prmh = kmalloc(sizeof(*mgr->prmh) +
1278 sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - PCXHR_SIZE_MAX_STATUS), 1488 sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS -
1489 PCXHR_SIZE_MAX_STATUS),
1279 GFP_KERNEL); 1490 GFP_KERNEL);
1280 if (! mgr->prmh) { 1491 if (! mgr->prmh) {
1281 pcxhr_free(mgr); 1492 pcxhr_free(mgr);
@@ -1296,7 +1507,8 @@ static int __devinit pcxhr_probe(struct pci_dev *pci, const struct pci_device_id
1296 else 1507 else
1297 idx = index[dev] + i; 1508 idx = index[dev] + i;
1298 1509
1299 snprintf(tmpid, sizeof(tmpid), "%s-%d", id[dev] ? id[dev] : card_name, i); 1510 snprintf(tmpid, sizeof(tmpid), "%s-%d",
1511 id[dev] ? id[dev] : card_name, i);
1300 card = snd_card_new(idx, tmpid, THIS_MODULE, 0); 1512 card = snd_card_new(idx, tmpid, THIS_MODULE, 0);
1301 1513
1302 if (! card) { 1514 if (! card) {
diff --git a/sound/pci/pcxhr/pcxhr.h b/sound/pci/pcxhr/pcxhr.h
index 652064787a55..84131a916c92 100644
--- a/sound/pci/pcxhr/pcxhr.h
+++ b/sound/pci/pcxhr/pcxhr.h
@@ -27,15 +27,18 @@
27#include <linux/mutex.h> 27#include <linux/mutex.h>
28#include <sound/pcm.h> 28#include <sound/pcm.h>
29 29
30#define PCXHR_DRIVER_VERSION 0x000804 /* 0.8.4 */ 30#define PCXHR_DRIVER_VERSION 0x000905 /* 0.9.5 */
31#define PCXHR_DRIVER_VERSION_STRING "0.8.4" /* 0.8.4 */ 31#define PCXHR_DRIVER_VERSION_STRING "0.9.5" /* 0.9.5 */
32 32
33 33
34#define PCXHR_MAX_CARDS 6 34#define PCXHR_MAX_CARDS 6
35#define PCXHR_PLAYBACK_STREAMS 4 35#define PCXHR_PLAYBACK_STREAMS 4
36 36
37#define PCXHR_GRANULARITY 96 /* transfer granularity (should be min 96 and multiple of 48) */ 37#define PCXHR_GRANULARITY 96 /* min 96 and multiple of 48 */
38#define PCXHR_GRANULARITY_MIN 96 /* transfer granularity of pipes and the dsp time (MBOX4) */ 38/* transfer granularity of pipes and the dsp time (MBOX4) */
39#define PCXHR_GRANULARITY_MIN 96
40/* TODO : granularity could be 64 or 128 */
41#define PCXHR_GRANULARITY_HR22 192 /* granularity for stereo cards */
39 42
40struct snd_pcxhr; 43struct snd_pcxhr;
41struct pcxhr_mgr; 44struct pcxhr_mgr;
@@ -51,6 +54,11 @@ enum pcxhr_clock_type {
51 PCXHR_CLOCK_TYPE_AES_2, 54 PCXHR_CLOCK_TYPE_AES_2,
52 PCXHR_CLOCK_TYPE_AES_3, 55 PCXHR_CLOCK_TYPE_AES_3,
53 PCXHR_CLOCK_TYPE_AES_4, 56 PCXHR_CLOCK_TYPE_AES_4,
57 PCXHR_CLOCK_TYPE_MAX = PCXHR_CLOCK_TYPE_AES_4,
58 HR22_CLOCK_TYPE_INTERNAL = PCXHR_CLOCK_TYPE_INTERNAL,
59 HR22_CLOCK_TYPE_AES_SYNC,
60 HR22_CLOCK_TYPE_AES_1,
61 HR22_CLOCK_TYPE_MAX = HR22_CLOCK_TYPE_AES_1,
54}; 62};
55 63
56struct pcxhr_mgr { 64struct pcxhr_mgr {
@@ -61,6 +69,8 @@ struct pcxhr_mgr {
61 69
62 int irq; 70 int irq;
63 71
72 int granularity;
73
64 /* card access with 1 mem bar and 2 io bar's */ 74 /* card access with 1 mem bar and 2 io bar's */
65 unsigned long port[3]; 75 unsigned long port[3];
66 76
@@ -83,11 +93,16 @@ struct pcxhr_mgr {
83 /* hardware interface */ 93 /* hardware interface */
84 unsigned int dsp_loaded; /* bit flags of loaded dsp indices */ 94 unsigned int dsp_loaded; /* bit flags of loaded dsp indices */
85 unsigned int dsp_version; /* read from embedded once firmware is loaded */ 95 unsigned int dsp_version; /* read from embedded once firmware is loaded */
86 int board_has_analog; /* if 0 the board is digital only */ 96 int playback_chips;
87 int mono_capture; /* if 1 the board does mono capture */ 97 int capture_chips;
88 int playback_chips; /* 4 or 6 */ 98 int fw_file_set;
89 int capture_chips; /* 4 or 1 */ 99 int firmware_num;
90 int firmware_num; /* 41 or 42 */ 100 int is_hr_stereo:1;
101 int board_has_aes1:1; /* if 1 board has AES1 plug and SRC */
102 int board_has_analog:1; /* if 0 the board is digital only */
103 int board_has_mic:1; /* if 1 the board has microphone input */
104 int board_aes_in_192k:1;/* if 1 the aes input plugs do support 192kHz */
105 int mono_capture:1; /* if 1 the board does mono capture */
91 106
92 struct snd_dma_buffer hostport; 107 struct snd_dma_buffer hostport;
93 108
@@ -106,6 +121,9 @@ struct pcxhr_mgr {
106 int async_err_stream_xrun; 121 int async_err_stream_xrun;
107 int async_err_pipe_xrun; 122 int async_err_pipe_xrun;
108 int async_err_other_last; 123 int async_err_other_last;
124
125 unsigned char xlx_cfg; /* copy of PCXHR_XLX_CFG register */
126 unsigned char xlx_selmic; /* copy of PCXHR_XLX_SELMIC register */
109}; 127};
110 128
111 129
@@ -155,24 +173,30 @@ struct snd_pcxhr {
155 173
156 struct snd_pcm *pcm; /* PCM */ 174 struct snd_pcm *pcm; /* PCM */
157 175
158 struct pcxhr_pipe playback_pipe; /* 1 stereo pipe only */ 176 struct pcxhr_pipe playback_pipe; /* 1 stereo pipe only */
159 struct pcxhr_pipe capture_pipe[2]; /* 1 stereo pipe or 2 mono pipes */ 177 struct pcxhr_pipe capture_pipe[2]; /* 1 stereo or 2 mono pipes */
160 178
161 struct pcxhr_stream playback_stream[PCXHR_PLAYBACK_STREAMS]; 179 struct pcxhr_stream playback_stream[PCXHR_PLAYBACK_STREAMS];
162 struct pcxhr_stream capture_stream[2]; /* 1 stereo stream or 2 mono streams */ 180 struct pcxhr_stream capture_stream[2]; /* 1 stereo or 2 mono streams */
163 int nb_streams_play; 181 int nb_streams_play;
164 int nb_streams_capt; 182 int nb_streams_capt;
165 183
166 int analog_playback_active[2]; /* Mixer : Master Playback active (!mute) */ 184 int analog_playback_active[2]; /* Mixer : Master Playback !mute */
167 int analog_playback_volume[2]; /* Mixer : Master Playback Volume */ 185 int analog_playback_volume[2]; /* Mixer : Master Playback Volume */
168 int analog_capture_volume[2]; /* Mixer : Master Capture Volume */ 186 int analog_capture_volume[2]; /* Mixer : Master Capture Volume */
169 int digital_playback_active[PCXHR_PLAYBACK_STREAMS][2]; /* Mixer : Digital Playback Active [streams][stereo]*/ 187 int digital_playback_active[PCXHR_PLAYBACK_STREAMS][2];
170 int digital_playback_volume[PCXHR_PLAYBACK_STREAMS][2]; /* Mixer : Digital Playback Volume [streams][stereo]*/ 188 int digital_playback_volume[PCXHR_PLAYBACK_STREAMS][2];
171 int digital_capture_volume[2]; /* Mixer : Digital Capture Volume [stereo] */ 189 int digital_capture_volume[2]; /* Mixer : Digital Capture Volume */
172 int monitoring_active[2]; /* Mixer : Monitoring Active */ 190 int monitoring_active[2]; /* Mixer : Monitoring Active */
173 int monitoring_volume[2]; /* Mixer : Monitoring Volume */ 191 int monitoring_volume[2]; /* Mixer : Monitoring Volume */
174 int audio_capture_source; /* Mixer : Audio Capture Source */ 192 int audio_capture_source; /* Mixer : Audio Capture Source */
175 unsigned char aes_bits[5]; /* Mixer : IEC958_AES bits */ 193 int mic_volume; /* used by cards with MIC only */
194 int mic_boost; /* used by cards with MIC only */
195 int mic_active; /* used by cards with MIC only */
196 int analog_capture_active; /* used by cards with MIC only */
197 int phantom_power; /* used by cards with MIC only */
198
199 unsigned char aes_bits[5]; /* Mixer : IEC958_AES bits */
176}; 200};
177 201
178struct pcxhr_hostport 202struct pcxhr_hostport
@@ -184,6 +208,8 @@ struct pcxhr_hostport
184/* exported */ 208/* exported */
185int pcxhr_create_pcm(struct snd_pcxhr *chip); 209int pcxhr_create_pcm(struct snd_pcxhr *chip);
186int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate); 210int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate);
187int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, enum pcxhr_clock_type clock_type, int *sample_rate); 211int pcxhr_get_external_clock(struct pcxhr_mgr *mgr,
212 enum pcxhr_clock_type clock_type,
213 int *sample_rate);
188 214
189#endif /* __SOUND_PCXHR_H */ 215#endif /* __SOUND_PCXHR_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-22 21:40:02 -0500