aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--arch/sh/include/cpu-sh4/cpu/mmu_context.h2
-rw-r--r--arch/sh/mm/tlb-urb.c22
2 files changed, 19 insertions, 5 deletions
diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
index 310ec92f2759..5963124c1d4a 100644
--- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h
+++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h
@@ -30,6 +30,8 @@
30#define MMUCR_URB 0x00FC0000 30#define MMUCR_URB 0x00FC0000
31#define MMUCR_URB_SHIFT 18 31#define MMUCR_URB_SHIFT 18
32#define MMUCR_URB_NENTRIES 64 32#define MMUCR_URB_NENTRIES 64
33#define MMUCR_URC 0x0000FC00
34#define MMUCR_URC_SHIFT 10
33 35
34#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) 36#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
35#define MMUCR_SE (1 << 4) 37#define MMUCR_SE (1 << 4)
diff --git a/arch/sh/mm/tlb-urb.c b/arch/sh/mm/tlb-urb.c
index bb5b9098956d..c92ce20db39b 100644
--- a/arch/sh/mm/tlb-urb.c
+++ b/arch/sh/mm/tlb-urb.c
@@ -24,13 +24,9 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
24 24
25 local_irq_save(flags); 25 local_irq_save(flags);
26 26
27 /* Load the entry into the TLB */
28 __update_tlb(vma, addr, pte);
29
30 /* ... and wire it up. */
31 status = __raw_readl(MMUCR); 27 status = __raw_readl(MMUCR);
32 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT; 28 urb = (status & MMUCR_URB) >> MMUCR_URB_SHIFT;
33 status &= ~MMUCR_URB; 29 status &= ~MMUCR_URC;
34 30
35 /* 31 /*
36 * Make sure we're not trying to wire the last TLB entry slot. 32 * Make sure we're not trying to wire the last TLB entry slot.
@@ -39,7 +35,23 @@ void tlb_wire_entry(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
39 35
40 urb = urb % MMUCR_URB_NENTRIES; 36 urb = urb % MMUCR_URB_NENTRIES;
41 37
38 /*
39 * Insert this entry into the highest non-wired TLB slot (via
40 * the URC field).
41 */
42 status |= (urb << MMUCR_URC_SHIFT);
43 __raw_writel(status, MMUCR);
44 ctrl_barrier();
45
46 /* Load the entry into the TLB */
47 __update_tlb(vma, addr, pte);
48
49 /* ... and wire it up. */
50 status = __raw_readl(MMUCR);
51
52 status &= ~MMUCR_URB;
42 status |= (urb << MMUCR_URB_SHIFT); 53 status |= (urb << MMUCR_URB_SHIFT);
54
43 __raw_writel(status, MMUCR); 55 __raw_writel(status, MMUCR);
44 ctrl_barrier(); 56 ctrl_barrier();
45 57