192 files changed, 5534 insertions, 1723 deletions
diff --git a/.gitignore b/.gitignore
index fb2190c61af0..de6344e15706 100644
--- a/.gitignore
+++ b/.gitignore
@@ -37,6 +37,7 @@ modules.builtin
 tags
 TAGS
 vmlinux
+vmlinuz
 System.map
 Module.markers
 Module.symvers
diff --git a/Documentation/filesystems/proc.txt b/Documentation/filesystems/proc.txt
index 220cc6376ef8..0d07513a67a6 100644
--- a/Documentation/filesystems/proc.txt
+++ b/Documentation/filesystems/proc.txt
@@ -177,7 +177,6 @@ read the file /proc/PID/status:
  CapBnd: ffffffffffffffff
  voluntary_ctxt_switches:        0
  nonvoluntary_ctxt_switches:     1
-  Stack usage:    12 kB
 This shows you nearly the same information you would get if you viewed it with
 the ps  command.  In  fact,  ps  uses  the  proc  file  system  to  obtain its
@@ -231,7 +230,6 @@ Table 1-2: Contents of the statm files (as of 2.6.30-rc7)
 Mems_allowed_list           Same as previous, but in "list format"
 voluntary_ctxt_switches     number of voluntary context switches
 nonvoluntary_ctxt_switches  number of non voluntary context switches
- Stack usage:                stack usage high water mark (round up to page size)
 ..............................................................................
 Table 1-3: Contents of the statm files (as of 2.6.8-rc3)
diff --git a/Documentation/hwmon/amc6821 b/Documentation/hwmon/amc6821
new file mode 100644
index 000000000000..ced8359c50f8
--- /dev/null
+++ b/Documentation/hwmon/amc6821
@@ -0,0 +1,102 @@
+Kernel driver amc6821
+=====================
+Supported chips:
+        Texas Instruments AMC6821
+        Prefix: 'amc6821'
+        Addresses scanned: 0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e, 0x4c, 0x4d, 0x4e
+        Datasheet: http://focus.ti.com/docs/prod/folders/print/amc6821.html
+Authors:
+        Tomaz Mertelj <tomaz.mertelj@guest.arnes.si>
+Description
+-----------
+This driver implements support for the Texas Instruments amc6821 chip.
+The chip has one on-chip and one remote temperature sensor and one pwm fan
+regulator.
+The pwm can be controlled either from software or automatically.
+The driver provides the following sensor accesses in sysfs:
+temp1_input             ro      on-chip temperature
+temp1_min               rw      "
+temp1_max               rw      "
+temp1_crit              rw      "
+temp1_min_alarm         ro      "
+temp1_max_alarm         ro      "
+temp1_crit_alarm        ro      "
+temp2_input             ro      remote temperature
+temp2_min               rw      "
+temp2_max               rw      "
+temp2_crit              rw      "
+temp2_min_alarm         ro      "
+temp2_max_alarm         ro      "
+temp2_crit_alarm        ro      "
+temp2_fault             ro      "
+fan1_input              ro      tachometer speed
+fan1_min                rw      "
+fan1_max                rw      "
+fan1_fault              ro      "
+fan1_div                rw      Fan divisor can be either 2 or 4.
+pwm1                    rw      pwm1
+pwm1_enable             rw      regulator mode, 1=open loop, 2=fan controlled
+                                by remote temperature, 3=fan controlled by
+                                combination of the on-chip temperature and
+                                remote-sensor temperature,
+pwm1_auto_channels_temp ro      1 if pwm_enable==2, 3 if pwm_enable==3
+pwm1_auto_point1_pwm    ro      Hardwired to 0, shared for both
+                                temperature channels.
+pwm1_auto_point2_pwm    rw      This value is shared for both temperature
+                                channels.
+pwm1_auto_point3_pwm    rw      Hardwired to 255, shared for both
+                                temperature channels.
+temp1_auto_point1_temp  ro      Hardwired to temp2_auto_point1_temp
+                                which is rw. Below this temperature fan stops.
+temp1_auto_point2_temp  rw      The low-temperature limit of the proportional
+                                range. Below this temperature
+                                pwm1 = pwm1_auto_point2_pwm. It can go from
+                                0 degree C to 124 degree C in steps of
+                                4 degree C. Read it out after writing to get
+                                the actual value.
+temp1_auto_point3_temp  rw      Above this temperature fan runs at maximum
+                                speed. It can go from temp1_auto_point2_temp.
+                                It can only have certain discrete values
+                                which depend on temp1_auto_point2_temp and
+                                pwm1_auto_point2_pwm. Read it out after
+                                writing to get the actual value.
+temp2_auto_point1_temp  rw      Must be between 0 degree C and 63 degree C and
+                                it defines the passive cooling temperature.
+                                Below this temperature the fan stops in
+                                the closed loop mode.
+temp2_auto_point2_temp  rw      The low-temperature limit of the proportional
+                                range. Below this temperature
+                                pwm1 = pwm1_auto_point2_pwm. It can go from
+                                0 degree C to 124 degree C in steps
+                                of 4 degree C.
+temp2_auto_point3_temp  rw      Above this temperature fan runs at maximum
+                                speed. It can only have certain discrete
+                                values which depend on temp2_auto_point2_temp
+                                and pwm1_auto_point2_pwm. Read it out after
+                                writing to get actual value.
+Module parameters
+-----------------
+If your board has a BIOS that initializes the amc6821 correctly, you should
+load the module with: init=0.
+If your board BIOS doesn't initialize the chip, or you want
+different settings, you can set the following parameters:
+init=1,
+pwminv: 0 default pwm output, 1 inverts pwm output.
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp
index a7a18d453a51..6526eee525a6 100644
--- a/Documentation/hwmon/k10temp
+++ b/Documentation/hwmon/k10temp
@@ -3,8 +3,8 @@ Kernel driver k10temp
 Supported chips:
 * AMD Family 10h processors:
-  Socket F: Quad-Core/Six-Core/Embedded Opteron
+  Socket F: Quad-Core/Six-Core/Embedded Opteron (but see below)
-  Socket AM2+: Opteron, Phenom (II) X3/X4
+  Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below)
  Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
  Socket S1G3: Athlon II, Sempron, Turion II
 * AMD Family 11h processors:
@@ -36,10 +36,15 @@ Description
 This driver permits reading of the internal temperature sensor of AMD
 Family 10h and 11h processors.
-All these processors have a sensor, but on older revisions of Family 10h
+All these processors have a sensor, but on those for Socket F or AM2+,
-processors, the sensor may return inconsistent values (erratum 319). The
+the sensor may return inconsistent values (erratum 319).  The driver
-driver will refuse to load on these revisions unless you specify the
+will refuse to load on these revisions unless you specify the "force=1"
-"force=1" module parameter.
+module parameter.
+Due to technical reasons, the driver can detect only the mainboard's
+socket type, not the processor's actual capabilities.  Therefore, if you
+are using an AM3 processor on an AM2+ mainboard, you can safely use the
+"force=1" parameter.
 There is one temperature measurement value, available as temp1_input in
 sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree.
diff --git a/Documentation/ioctl/ioctl-number.txt b/Documentation/ioctl/ioctl-number.txt
index 947374977ca5..35cf64d4436d 100644
--- a/Documentation/ioctl/ioctl-number.txt
+++ b/Documentation/ioctl/ioctl-number.txt
@@ -56,10 +56,11 @@ Following this convention is good because:
 (5) When following the convention, the driver code can use generic
    code to copy the parameters between user and kernel space.
-This table lists ioctls visible from user land for Linux/i386.  It contains
+This table lists ioctls visible from user land for Linux/x86.  It contains
-most drivers up to 2.3.14, but I know I am missing some.
+most drivers up to 2.6.31, but I know I am missing some.  There has been
+no attempt to list non-X86 architectures or ioctls from drivers/staging/.
-Code    Seq#    Include File            Comments
+Code  Seq#(hex) Include File            Comments
 ========================================================
 0x00    00-1F   linux/fs.h              conflict!
 0x00    00-1F   scsi/scsi_ioctl.h       conflict!
@@ -69,119 +70,228 @@ Code	Seq#	Include File		Comments
 0x03    all     linux/hdreg.h
 0x04    D2-DC   linux/umsdos_fs.h       Dead since 2.6.11, but don't reuse these.
 0x06    all     linux/lp.h
-0x09    all     linux/md.h
+0x09    all     linux/raid/md_u.h
+0x10    00-0F   drivers/char/s390/vmcp.h
 0x12    all     linux/fs.h
                linux/blkpg.h
 0x1b    all     InfiniBand Subsystem    <http://www.openib.org/>
 0x20    all     drivers/cdrom/cm206.h
 0x22    all     scsi/sg.h
 '#'     00-3F   IEEE 1394 Subsystem     Block for the entire subsystem
+'$'     00-0F   linux/perf_counter.h, linux/perf_event.h
 '1'     00-1F   <linux/timepps.h>       PPS kit from Ulrich Windl
                                        <ftp://ftp.de.kernel.org/pub/linux/daemons/ntp/PPS/>
+'2'     01-04   linux/i2o.h
+'3'     00-0F   drivers/s390/char/raw3270.h     conflict!
+'3'     00-1F   linux/suspend_ioctls.h  conflict!
+                and kernel/power/user.c
 '8'     all                             SNP8023 advanced NIC card
                                        <mailto:mcr@solidum.com>
-'A'     00-1F   linux/apm_bios.h
+'@'     00-0F   linux/radeonfb.h        conflict!
+'@'     00-0F   drivers/video/aty/aty128fb.c    conflict!
+'A'     00-1F   linux/apm_bios.h        conflict!
+'A'     00-0F   linux/agpgart.h         conflict!
+                and drivers/char/agp/compat_ioctl.h
+'A'     00-7F   sound/asound.h          conflict!
+'B'     00-1F   linux/cciss_ioctl.h     conflict!
+'B'     00-0F   include/linux/pmu.h     conflict!
 'B'     C0-FF                           advanced bbus
                                        <mailto:maassen@uni-freiburg.de>
-'C'     all     linux/soundcard.h
+'C'     all     linux/soundcard.h       conflict!
+'C'     01-2F   linux/capi.h            conflict!
+'C'     F0-FF   drivers/net/wan/cosa.h  conflict!
 'D'     all     arch/s390/include/asm/dasd.h
-'E'     all     linux/input.h
+'D'     40-5F   drivers/scsi/dpt/dtpi_ioctl.h
-'F'     all     linux/fb.h
+'D'     05      drivers/scsi/pmcraid.h
-'H'     all     linux/hiddev.h
+'E'     all     linux/input.h           conflict!
-'I'     all     linux/isdn.h
+'E'     00-0F   xen/evtchn.h            conflict!
+'F'     all     linux/fb.h              conflict!
+'F'     01-02   drivers/scsi/pmcraid.h  conflict!
+'F'     20      drivers/video/fsl-diu-fb.h      conflict!
+'F'     20      drivers/video/intelfb/intelfb.h conflict!
+'F'     20      linux/ivtvfb.h          conflict!
+'F'     20      linux/matroxfb.h        conflict!
+'F'     20      drivers/video/aty/atyfb_base.c  conflict!
+'F'     00-0F   video/da8xx-fb.h        conflict!
+'F'     80-8F   linux/arcfb.h           conflict!
+'F'     DD      video/sstfb.h           conflict!
+'G'     00-3F   drivers/misc/sgi-gru/grulib.h   conflict!
+'G'     00-0F   linux/gigaset_dev.h     conflict!
+'H'     00-7F   linux/hiddev.h          conflict!
+'H'     00-0F   linux/hidraw.h          conflict!
+'H'     00-0F   sound/asound.h          conflict!
+'H'     20-40   sound/asound_fm.h       conflict!
+'H'     80-8F   sound/sfnt_info.h       conflict!
+'H'     10-8F   sound/emu10k1.h         conflict!
+'H'     10-1F   sound/sb16_csp.h        conflict!
+'H'     10-1F   sound/hda_hwdep.h       conflict!
+'H'     40-4F   sound/hdspm.h           conflict!
+'H'     40-4F   sound/hdsp.h            conflict!
+'H'     90      sound/usb/usx2y/usb_stream.h
+'H'     C0-F0   net/bluetooth/hci.h     conflict!
+'H'     C0-DF   net/bluetooth/hidp/hidp.h       conflict!
+'H'     C0-DF   net/bluetooth/cmtp/cmtp.h       conflict!
+'H'     C0-DF   net/bluetooth/bnep/bnep.h       conflict!
+'I'     all     linux/isdn.h            conflict!
+'I'     00-0F   drivers/isdn/divert/isdn_divert.h       conflict!
+'I'     40-4F   linux/mISDNif.h         conflict!
 'J'     00-1F   drivers/scsi/gdth_ioctl.h
 'K'     all     linux/kd.h
-'L'     00-1F   linux/loop.h
+'L'     00-1F   linux/loop.h            conflict!
-'L'     20-2F   driver/usb/misc/vstusb.h
+'L'     10-1F   drivers/scsi/mpt2sas/mpt2sas_ctl.h      conflict!
+'L'     20-2F   linux/usb/vstusb.h
 'L'     E0-FF   linux/ppdd.h            encrypted disk device driver
                                        <http://linux01.gwdg.de/~alatham/ppdd.html>
-'M'     all     linux/soundcard.h
+'M'     all     linux/soundcard.h       conflict!
+'M'     01-16   mtd/mtd-abi.h           conflict!
+                and drivers/mtd/mtdchar.c
+'M'     01-03   drivers/scsi/megaraid/megaraid_sas.h
+'M'     00-0F   drivers/video/fsl-diu-fb.h      conflict!
 'N'     00-1F   drivers/usb/scanner.h
-'O'     00-02   include/mtd/ubi-user.h UBI
+'O'     00-06   mtd/ubi-user.h          UBI
-'P'     all     linux/soundcard.h
+'P'     all     linux/soundcard.h       conflict!
+'P'     60-6F   sound/sscape_ioctl.h    conflict!
+'P'     00-0F   drivers/usb/class/usblp.c       conflict!
 'Q'     all     linux/soundcard.h
-'R'     00-1F   linux/random.h
+'R'     00-1F   linux/random.h          conflict!
+'R'     01      linux/rfkill.h          conflict!
+'R'     01-0F   media/rds.h             conflict!
+'R'     C0-DF   net/bluetooth/rfcomm.h
 'S'     all     linux/cdrom.h           conflict!
 'S'     80-81   scsi/scsi_ioctl.h       conflict!
 'S'     82-FF   scsi/scsi.h             conflict!
+'S'     00-7F   sound/asequencer.h      conflict!
 'T'     all     linux/soundcard.h       conflict!
+'T'     00-AF   sound/asound.h          conflict!
 'T'     all     arch/x86/include/asm/ioctls.h   conflict!
-'U'     00-EF   linux/drivers/usb/usb.h
+'T'     C0-DF   linux/if_tun.h          conflict!
-'V'     all     linux/vt.h
+'U'     all     sound/asound.h          conflict!
+'U'     00-0F   drivers/media/video/uvc/uvcvideo.h      conflict!
+'U'     00-CF   linux/uinput.h          conflict!
+'U'     00-EF   linux/usbdevice_fs.h
+'U'     C0-CF   drivers/bluetooth/hci_uart.h
+'V'     all     linux/vt.h              conflict!
+'V'     all     linux/videodev2.h       conflict!
+'V'     C0      linux/ivtvfb.h          conflict!
+'V'     C0      linux/ivtv.h            conflict!
+'V'     C0      media/davinci/vpfe_capture.h    conflict!
+'V'     C0      media/si4713.h          conflict!
+'V'     C0-CF   drivers/media/video/mxb.h       conflict!
 'W'     00-1F   linux/watchdog.h        conflict!
 'W'     00-1F   linux/wanrouter.h       conflict!
-'X'     all     linux/xfs_fs.h
+'W'     00-3F   sound/asound.h          conflict!
+'X'     all     fs/xfs/xfs_fs.h         conflict!
+                and fs/xfs/linux-2.6/xfs_ioctl32.h
+                and include/linux/falloc.h
+                and linux/fs.h
+'X'     all     fs/ocfs2/ocfs_fs.h      conflict!
+'X'     01      linux/pktcdvd.h         conflict!
 'Y'     all     linux/cyclades.h
-'['     00-07   linux/usb/usbtmc.h      USB Test and Measurement Devices
+'Z'     14-15   drivers/message/fusion/mptctl.h
+'['     00-07   linux/usb/tmc.h         USB Test and Measurement Devices
                                        <mailto:gregkh@suse.de>
-'a'     all                             ATM on linux
+'a'     all     linux/atm*.h, linux/sonet.h     ATM on linux
                                        <http://lrcwww.epfl.ch/linux-atm/magic.html>
-'b'     00-FF                           bit3 vme host bridge
+'b'     00-FF                           conflict! bit3 vme host bridge
                                        <mailto:natalia@nikhefk.nikhef.nl>
+'b'     00-0F   media/bt819.h           conflict!
+'c'     all     linux/cm4000_cs.h       conflict!
 'c'     00-7F   linux/comstats.h        conflict!
 'c'     00-7F   linux/coda.h            conflict!
-'c'     80-9F   arch/s390/include/asm/chsc.h
+'c'     00-1F   linux/chio.h            conflict!
-'c'     A0-AF   arch/x86/include/asm/msr.h
+'c'     80-9F   arch/s390/include/asm/chsc.h    conflict!
+'c'     A0-AF   arch/x86/include/asm/msr.h      conflict!
 'd'     00-FF   linux/char/drm/drm/h    conflict!
+'d'     02-40   pcmcia/ds.h             conflict!
+'d'     10-3F   drivers/media/video/dabusb.h    conflict!
+'d'     C0-CF   drivers/media/video/saa7191.h   conflict!
 'd'     F0-FF   linux/digi1.h
 'e'     all     linux/digi1.h           conflict!
-'e'     00-1F   net/irda/irtty.h        conflict!
+'e'     00-1F   drivers/net/irda/irtty-sir.h    conflict!
-'f'     00-1F   linux/ext2_fs.h
+'f'     00-1F   linux/ext2_fs.h         conflict!
-'h'     00-7F                           Charon filesystem
+'f'     00-1F   linux/ext3_fs.h         conflict!
+'f'     00-0F   fs/jfs/jfs_dinode.h     conflict!
+'f'     00-0F   fs/ext4/ext4.h          conflict!
+'f'     00-0F   linux/fs.h              conflict!
+'f'     00-0F   fs/ocfs2/ocfs2_fs.h     conflict!
+'g'     00-0F   linux/usb/gadgetfs.h
+'g'     20-2F   linux/usb/g_printer.h
+'h'     00-7F                           conflict! Charon filesystem
                                        <mailto:zapman@interlan.net>
-'i'     00-3F   linux/i2o.h
+'h'     00-1F   linux/hpet.h            conflict!
+'i'     00-3F   linux/i2o-dev.h         conflict!
+'i'     0B-1F   linux/ipmi.h            conflict!
+'i'     80-8F   linux/i8k.h
 'j'     00-3F   linux/joystick.h
+'k'     00-0F   linux/spi/spidev.h      conflict!
+'k'     00-05   video/kyro.h            conflict!
 'l'     00-3F   linux/tcfs_fs.h         transparent cryptographic file system
                                        <http://mikonos.dia.unisa.it/tcfs>
 'l'     40-7F   linux/udf_fs_i.h        in development:
                                        <http://sourceforge.net/projects/linux-udf/>
-'m'     00-09   linux/mmtimer.h
+'m'     00-09   linux/mmtimer.h         conflict!
 'm'     all     linux/mtio.h            conflict!
 'm'     all     linux/soundcard.h       conflict!
 'm'     all     linux/synclink.h        conflict!
+'m'     00-19   drivers/message/fusion/mptctl.h conflict!
+'m'     00      drivers/scsi/megaraid/megaraid_ioctl.h  conflict!
 'm'     00-1F   net/irda/irmod.h        conflict!
-'n'     00-7F   linux/ncp_fs.h
+'n'     00-7F   linux/ncp_fs.h and fs/ncpfs/ioctl.c
 'n'     80-8F   linux/nilfs2_fs.h       NILFS2
-'n'     E0-FF   video/matrox.h          matroxfb
+'n'     E0-FF   linux/matroxfb.h        matroxfb
 'o'     00-1F   fs/ocfs2/ocfs2_fs.h     OCFS2
-'o'     00-03   include/mtd/ubi-user.h  conflict! (OCFS2 and UBI overlaps)
+'o'     00-03   mtd/ubi-user.h          conflict! (OCFS2 and UBI overlaps)
-'o'     40-41   include/mtd/ubi-user.h  UBI
+'o'     40-41   mtd/ubi-user.h          UBI
-'o'     01-A1   include/linux/dvb/*.h DVB
+'o'     01-A1   linux/dvb/*.h           DVB
 'p'     00-0F   linux/phantom.h         conflict! (OpenHaptics needs this)
+'p'     00-1F   linux/rtc.h             conflict!
 'p'     00-3F   linux/mc146818rtc.h     conflict!
 'p'     40-7F   linux/nvram.h
-'p'     80-9F                           user-space parport
+'p'     80-9F   linux/ppdev.h           user-space parport
                                        <mailto:tim@cyberelk.net>
-'p'     a1-a4   linux/pps.h             LinuxPPS
+'p'     A1-A4   linux/pps.h             LinuxPPS
                                        <mailto:giometti@linux.it>
 'q'     00-1F   linux/serio.h
-'q'     80-FF                           Internet PhoneJACK, Internet LineJACK
+'q'     80-FF   linux/telephony.h       Internet PhoneJACK, Internet LineJACK
-                                        <http://www.quicknet.net>
+                linux/ixjuser.h         <http://www.quicknet.net>
-'r'     00-1F   linux/msdos_fs.h
+'r'     00-1F   linux/msdos_fs.h and fs/fat/dir.c
 's'     all     linux/cdk.h
 't'     00-7F   linux/if_ppp.h
 't'     80-8F   linux/isdn_ppp.h
+'t'     90      linux/toshiba.h
 'u'     00-1F   linux/smb_fs.h
-'v'     00-1F   linux/ext2_fs.h         conflict!
 'v'     all     linux/videodev.h        conflict!
+'v'     00-1F   linux/ext2_fs.h         conflict!
+'v'     00-1F   linux/fs.h              conflict!
+'v'     00-0F   linux/sonypi.h          conflict!
+'v'     C0-CF   drivers/media/video/ov511.h     conflict!
+'v'     C0-DF   media/pwc-ioctl.h       conflict!
+'v'     C0-FF   linux/meye.h            conflict!
+'v'     C0-CF   drivers/media/video/zoran/zoran.h       conflict!
+'v'     D0-DF   drivers/media/video/cpia2/cpia2dev.h    conflict!
 'w'     all                             CERN SCI driver
 'y'     00-1F                           packet based user level communications
                                        <mailto:zapman@interlan.net>
-'z'     00-3F                           CAN bus card
+'z'     00-3F                           CAN bus card    conflict!
                                        <mailto:hdstich@connectu.ulm.circular.de>
-'z'     40-7F                           CAN bus card
+'z'     40-7F                           CAN bus card    conflict!
                                        <mailto:oe@port.de>
+'z'     10-4F   drivers/s390/crypto/zcrypt_api.h        conflict!
 0x80    00-1F   linux/fb.h
 0x81    00-1F   linux/videotext.h
+0x88    00-3F   media/ovcamchip.h
 0x89    00-06   arch/x86/include/asm/sockios.h
 0x89    0B-DF   linux/sockios.h
 0x89    E0-EF   linux/sockios.h         SIOCPROTOPRIVATE range
+0x89    E0-EF   linux/dn.h              PROTOPRIVATE range
 0x89    F0-FF   linux/sockios.h         SIOCDEVPRIVATE range
 0x8B    all     linux/wireless.h
 0x8C    00-3F                           WiNRADiO driver
                                        <http://www.proximity.com.au/~brian/winradio/>
 0x90    00      drivers/cdrom/sbpcd.h
+0x92    00-0F   drivers/usb/mon/mon_bin.c
 0x93    60-7F   linux/auto_fs.h
+0x94    all     fs/btrfs/ioctl.h
 0x99    00-0F                           537-Addinboard driver
                                        <mailto:buk@buks.ipn.de>
 0xA0    all     linux/sdp/sdp.h         Industrial Device Project
@@ -192,17 +302,22 @@ Code	Seq#	Include File		Comments
 0xAB    00-1F   linux/nbd.h
 0xAC    00-1F   linux/raw.h
 0xAD    00      Netfilter device        in development:
-                                        <mailto:rusty@rustcorp.com.au>  
+                                        <mailto:rusty@rustcorp.com.au>
 0xAE    all     linux/kvm.h             Kernel-based Virtual Machine
                                        <mailto:kvm@vger.kernel.org>
 0xB0    all     RATIO devices           in development:
                                        <mailto:vgo@ratio.de>
 0xB1    00-1F   PPPoX                   <mailto:mostrows@styx.uwaterloo.ca>
+0xC0    00-0F   linux/usb/iowarrior.h
 0xCB    00-1F   CBM serial IEC bus      in development:
                                        <mailto:michael.klein@puffin.lb.shuttle.de>
+0xCD    01      linux/reiserfs_fs.h
+0xCF    02      fs/cifs/ioctl.c
+0xDB    00-0F   drivers/char/mwave/mwavepub.h
 0xDD    00-3F   ZFCP device driver      see drivers/s390/scsi/
                                        <mailto:aherrman@de.ibm.com>
-0xF3    00-3F   video/sisfb.h           sisfb (in development)
+0xF3    00-3F   drivers/usb/misc/sisusbvga/sisusb.h     sisfb (in development)
                                        <mailto:thomas@winischhofer.net>
 0xF4    00-1F   video/mbxfb.h           mbxfb
                                        <mailto:raph@8d.com>
+0xFD    all     linux/dm-ioctl.h
diff --git a/Documentation/kernel-doc-nano-HOWTO.txt b/Documentation/kernel-doc-nano-HOWTO.txt
index 348b9e5e28fc..27a52b35d55b 100644
--- a/Documentation/kernel-doc-nano-HOWTO.txt
+++ b/Documentation/kernel-doc-nano-HOWTO.txt
@@ -214,11 +214,13 @@ The format of the block comment is like this:
 * (section header: (section description)? )*
 (*)?*/
-The short function description ***cannot be multiline***, but the other
+All "description" text can span multiple lines, although the
-descriptions can be (and they can contain blank lines).  If you continue
+function_name & its short description are traditionally on a single line.
-that initial short description onto a second line, that second line will
+Description text may also contain blank lines (i.e., lines that contain
-appear further down at the beginning of the description section, which is
+only a "*").
-almost certainly not what you had in mind.
+"section header:" names must be unique per function (or struct,
+union, typedef, enum).
 Avoid putting a spurious blank line after the function name, or else the
 description will be repeated!
diff --git a/Documentation/trace/ring-buffer-design.txt b/Documentation/trace/ring-buffer-design.txt
index 5b1d23d604c5..d299ff31df57 100644
--- a/Documentation/trace/ring-buffer-design.txt
+++ b/Documentation/trace/ring-buffer-design.txt
@@ -33,9 +33,9 @@ head_page - a pointer to the page that the reader will use next
 tail_page - a pointer to the page that will be written to next
-commit_page - a pointer to the page with the last finished non nested write.
+commit_page - a pointer to the page with the last finished non-nested write.
-cmpxchg - hardware assisted atomic transaction that performs the following:
+cmpxchg - hardware-assisted atomic transaction that performs the following:
   A = B iff previous A == C
@@ -52,15 +52,15 @@ The Generic Ring Buffer
 The ring buffer can be used in either an overwrite mode or in
 producer/consumer mode.
-Producer/consumer mode is where the producer were to fill up the
+Producer/consumer mode is where if the producer were to fill up the
 buffer before the consumer could free up anything, the producer
 will stop writing to the buffer. This will lose most recent events.
-Overwrite mode is where the produce were to fill up the buffer
+Overwrite mode is where if the producer were to fill up the buffer
 before the consumer could free up anything, the producer will
 overwrite the older data. This will lose the oldest events.
-No two writers can write at the same time (on the same per cpu buffer),
+No two writers can write at the same time (on the same per-cpu buffer),
 but a writer may interrupt another writer, but it must finish writing
 before the previous writer may continue. This is very important to the
 algorithm. The writers act like a "stack". The way interrupts works
@@ -79,16 +79,16 @@ the interrupt doing a write as well.
 Readers can happen at any time. But no two readers may run at the
 same time, nor can a reader preempt/interrupt another reader. A reader
-can not preempt/interrupt a writer, but it may read/consume from the
+cannot preempt/interrupt a writer, but it may read/consume from the
 buffer at the same time as a writer is writing, but the reader must be
 on another processor to do so. A reader may read on its own processor
 and can be preempted by a writer.
-A writer can preempt a reader, but a reader can not preempt a writer.
+A writer can preempt a reader, but a reader cannot preempt a writer.
 But a reader can read the buffer at the same time (on another processor)
 as a writer.
-The ring buffer is made up of a list of pages held together by a link list.
+The ring buffer is made up of a list of pages held together by a linked list.
 At initialization a reader page is allocated for the reader that is not
 part of the ring buffer.
@@ -102,7 +102,7 @@ the head page.
 The reader has its own page to use. At start up time, this page is
 allocated but is not attached to the list. When the reader wants
-to read from the buffer, if its page is empty (like it is on start up)
+to read from the buffer, if its page is empty (like it is on start-up),
 it will swap its page with the head_page. The old reader page will
 become part of the ring buffer and the head_page will be removed.
 The page after the inserted page (old reader_page) will become the
@@ -206,7 +206,7 @@ The main pointers:
  commit page - the page that last finished a write.
-The commit page only is updated by the outer most writer in the
+The commit page only is updated by the outermost writer in the
 writer stack. A writer that preempts another writer will not move the
 commit page.
@@ -281,7 +281,7 @@ with the previous write.
 The commit pointer points to the last write location that was
 committed without preempting another write. When a write that
 preempted another write is committed, it only becomes a pending commit
-and will not be a full commit till all writes have been committed.
+and will not be a full commit until all writes have been committed.
 The commit page points to the page that has the last full commit.
 The tail page points to the page with the last write (before
@@ -292,7 +292,7 @@ be several pages ahead. If the tail page catches up to the commit
 page then no more writes may take place (regardless of the mode
 of the ring buffer: overwrite and produce/consumer).
-The order of pages are:
+The order of pages is:
 head page
 commit page
@@ -311,7 +311,7 @@ Possible scenario:
 There is a special case that the head page is after either the commit page
 and possibly the tail page. That is when the commit (and tail) page has been
 swapped with the reader page. This is because the head page is always
-part of the ring buffer, but the reader page is not. When ever there
+part of the ring buffer, but the reader page is not. Whenever there
 has been less than a full page that has been committed inside the ring buffer,
 and a reader swaps out a page, it will be swapping out the commit page.
@@ -338,7 +338,7 @@ and a reader swaps out a page, it will be swapping out the commit page.
 In this case, the head page will not move when the tail and commit
 move back into the ring buffer.
-The reader can not swap a page into the ring buffer if the commit page
+The reader cannot swap a page into the ring buffer if the commit page
 is still on that page. If the read meets the last commit (real commit
 not pending or reserved), then there is nothing more to read.
 The buffer is considered empty until another full commit finishes.
@@ -395,7 +395,7 @@ The main idea behind the lockless algorithm is to combine the moving
 of the head_page pointer with the swapping of pages with the reader.
 State flags are placed inside the pointer to the page. To do this,
 each page must be aligned in memory by 4 bytes. This will allow the 2
-least significant bits of the address to be used as flags. Since
+least significant bits of the address to be used as flags, since
 they will always be zero for the address. To get the address,
 simply mask out the flags.
@@ -460,7 +460,7 @@ When the reader tries to swap the page with the ring buffer, it
 will also use cmpxchg. If the flag bit in the pointer to the
 head page does not have the HEADER flag set, the compare will fail
 and the reader will need to look for the new head page and try again.
-Note, the flag UPDATE and HEADER are never set at the same time.
+Note, the flags UPDATE and HEADER are never set at the same time.
 The reader swaps the reader page as follows:
@@ -539,7 +539,7 @@ updated to the reader page.
    |  +-----------------------------+   |
    +------------------------------------+
-Another important point. The page that the reader page points back to
+Another important point: The page that the reader page points back to
 by its previous pointer (the one that now points to the new head page)
 never points back to the reader page. That is because the reader page is
 not part of the ring buffer. Traversing the ring buffer via the next pointers
@@ -572,7 +572,7 @@ not be able to swap the head page from the buffer, nor will it be able to
 move the head page, until the writer is finished with the move.
 This eliminates any races that the reader can have on the writer. The reader
-must spin, and this is why the reader can not preempt the writer.
+must spin, and this is why the reader cannot preempt the writer.
            tail page
               |
@@ -659,9 +659,9 @@ before pushing the head page. If it is, then it can be assumed that the
 tail page wrapped the buffer, and we must drop new writes.
 This is not a race condition, because the commit page can only be moved
-by the outter most writer (the writer that was preempted).
+by the outermost writer (the writer that was preempted).
 This means that the commit will not move while a writer is moving the
-tail page. The reader can not swap the reader page if it is also being
+tail page. The reader cannot swap the reader page if it is also being
 used as the commit page. The reader can simply check that the commit
 is off the reader page. Once the commit page leaves the reader page
 it will never go back on it unless a reader does another swap with the
@@ -733,7 +733,7 @@ The write converts the head page pointer to UPDATE.
 --->|   |<---|   |<---|   |<---|   |<---
    +---+    +---+    +---+    +---+
-But if a nested writer preempts here. It will see that the next
+But if a nested writer preempts here, it will see that the next
 page is a head page, but it is also nested. It will detect that
 it is nested and will save that information. The detection is the
 fact that it sees the UPDATE flag instead of a HEADER or NORMAL
@@ -761,7 +761,7 @@ to NORMAL.
 --->|   |<---|   |<---|   |<---|   |<---
    +---+    +---+    +---+    +---+
-After the nested writer finishes, the outer most writer will convert
+After the nested writer finishes, the outermost writer will convert
 the UPDATE pointer to NORMAL.
@@ -812,7 +812,7 @@ head page.
    +---+    +---+    +---+    +---+
 The nested writer moves the tail page forward. But does not set the old
-update page to NORMAL because it is not the outer most writer.
+update page to NORMAL because it is not the outermost writer.
                    tail page
                        |
@@ -892,7 +892,7 @@ It will return to the first writer.
 --->|   |<---|   |<---|   |<---|   |<---
    +---+    +---+    +---+    +---+
-The first writer can not know atomically test if the tail page moved
+The first writer cannot know atomically if the tail page moved
 while it updates the HEAD page. It will then update the head page to
 what it thinks is the new head page.
@@ -923,9 +923,9 @@ if the tail page is either where it use to be or on the next page:
 --->|   |<---|   |<---|   |<---|   |<---
    +---+    +---+    +---+    +---+
-If tail page != A and tail page does not equal B, then it must reset the
+If tail page != A and tail page != B, then it must reset the pointer
-pointer back to NORMAL. The fact that it only needs to worry about
+back to NORMAL. The fact that it only needs to worry about nested
-nested writers, it only needs to check this after setting the HEAD page.
+writers means that it only needs to check this after setting the HEAD page.
 (first writer)
@@ -939,7 +939,7 @@ nested writers, it only needs to check this after setting the HEAD page.
    +---+    +---+    +---+    +---+
 Now the writer can update the head page. This is also why the head page must
-remain in UPDATE and only reset by the outer most writer. This prevents
+remain in UPDATE and only reset by the outermost writer. This prevents
 the reader from seeing the incorrect head page.
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 4f8760d7b7a7..c2238cd474c7 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -18,6 +18,8 @@ config ARM
        select HAVE_KRETPROBES if (HAVE_KPROBES)
        select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
        select HAVE_GENERIC_DMA_COHERENT
+        select HAVE_KERNEL_GZIP
+        select HAVE_KERNEL_LZO
        help
          The ARM series is a line of low-power-consumption RISC chip designs
          licensed by ARM Ltd and targeted at embedded applications and
diff --git a/arch/arm/boot/compressed/Makefile b/arch/arm/boot/compressed/Makefile
index ce39dc540085..2d4d88ba73bf 100644
--- a/arch/arm/boot/compressed/Makefile
+++ b/arch/arm/boot/compressed/Makefile
@@ -63,8 +63,12 @@ endif
 SEDFLAGS        = s/TEXT_START/$(ZTEXTADDR)/;s/BSS_START/$(ZBSSADDR)/
-targets       := vmlinux vmlinux.lds piggy.gz piggy.o font.o font.c \
+suffix_$(CONFIG_KERNEL_GZIP) = gzip
-                 head.o misc.o $(OBJS)
+suffix_$(CONFIG_KERNEL_LZO)  = lzo
+targets       := vmlinux vmlinux.lds \
+                 piggy.$(suffix_y) piggy.$(suffix_y).o \
+                 font.o font.c head.o misc.o $(OBJS)
 ifeq ($(CONFIG_FUNCTION_TRACER),y)
 ORIG_CFLAGS := $(KBUILD_CFLAGS)
@@ -87,22 +91,34 @@ endif
 ifneq ($(PARAMS_PHYS),)
 LDFLAGS_vmlinux += --defsym params_phys=$(PARAMS_PHYS)
 endif
-LDFLAGS_vmlinux += -p --no-undefined -X \
+# ?
-        $(shell $(CC) $(KBUILD_CFLAGS) --print-libgcc-file-name) -T
+LDFLAGS_vmlinux += -p
+# Report unresolved symbol references
+LDFLAGS_vmlinux += --no-undefined
+# Delete all temporary local symbols
+LDFLAGS_vmlinux += -X
+# Next argument is a linker script
+LDFLAGS_vmlinux += -T
+# For __aeabi_uidivmod
+lib1funcs = $(obj)/lib1funcs.o
+$(obj)/lib1funcs.S: $(srctree)/arch/$(SRCARCH)/lib/lib1funcs.S FORCE
+        $(call cmd,shipped)
 # Don't allow any static data in misc.o, which
 # would otherwise mess up our GOT table
 CFLAGS_misc.o := -Dstatic=
-$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.o \
+$(obj)/vmlinux: $(obj)/vmlinux.lds $(obj)/$(HEAD) $(obj)/piggy.$(suffix_y).o \
-                $(addprefix $(obj)/, $(OBJS)) FORCE
+                $(addprefix $(obj)/, $(OBJS)) $(lib1funcs) FORCE
        $(call if_changed,ld)
        @:
-$(obj)/piggy.gz: $(obj)/../Image FORCE
+$(obj)/piggy.$(suffix_y): $(obj)/../Image FORCE
-        $(call if_changed,gzip)
+        $(call if_changed,$(suffix_y))
-$(obj)/piggy.o:  $(obj)/piggy.gz FORCE
+$(obj)/piggy.$(suffix_y).o:  $(obj)/piggy.$(suffix_y) FORCE
 CFLAGS_font.o := -Dstatic=
diff --git a/arch/arm/boot/compressed/misc.c b/arch/arm/boot/compressed/misc.c
index 17153b54613b..7e0fe4d42c7b 100644
--- a/arch/arm/boot/compressed/misc.c
+++ b/arch/arm/boot/compressed/misc.c
@@ -18,10 +18,15 @@
 unsigned int __machine_arch_type;
+#define _LINUX_STRING_H_
 #include <linux/compiler.h>     /* for inline */
 #include <linux/types.h>        /* for size_t */
 #include <linux/stddef.h>       /* for NULL */
 #include <asm/string.h>
+#include <linux/linkage.h>
+#include <asm/unaligned.h>
 #ifdef STANDALONE_DEBUG
 #define putstr printf
@@ -188,34 +193,8 @@ static inline __ptr_t memcpy(__ptr_t __dest, __const __ptr_t __src,
 /*
 * gzip delarations
 */
-#define OF(args)  args
 #define STATIC static
-typedef unsigned char  uch;
-typedef unsigned short ush;
-typedef unsigned long  ulg;
-#define WSIZE 0x8000            /* Window size must be at least 32k, */
-                                /* and a power of two */
-static uch *inbuf;              /* input buffer */
-static uch window[WSIZE];       /* Sliding window buffer */
-static unsigned insize;         /* valid bytes in inbuf */
-static unsigned inptr;          /* index of next byte to be processed in inbuf */
-static unsigned outcnt;         /* bytes in output buffer */
-/* gzip flag byte */
-#define ASCII_FLAG   0x01 /* bit 0 set: file probably ascii text */
-#define CONTINUATION 0x02 /* bit 1 set: continuation of multi-part gzip file */
-#define EXTRA_FIELD  0x04 /* bit 2 set: extra field present */
-#define ORIG_NAME    0x08 /* bit 3 set: original file name present */
-#define COMMENT      0x10 /* bit 4 set: file comment present */
-#define ENCRYPTED    0x20 /* bit 5 set: file is encrypted */
-#define RESERVED     0xC0 /* bit 6,7:   reserved */
-#define get_byte()  (inptr < insize ? inbuf[inptr++] : fill_inbuf())
 /* Diagnostic functions */
 #ifdef DEBUG
 #  define Assert(cond,msg) {if(!(cond)) error(msg);}
@@ -233,24 +212,20 @@ static unsigned outcnt;		/* bytes in output buffer */
 #  define Tracecv(c,x)
 #endif
-static int  fill_inbuf(void);
-static void flush_window(void);
 static void error(char *m);
 extern char input_data[];
 extern char input_data_end[];
-static uch *output_data;
+static unsigned char *output_data;
-static ulg output_ptr;
+static unsigned long output_ptr;
-static ulg bytes_out;
 static void error(char *m);
 static void putstr(const char *);
-extern int end;
+static unsigned long free_mem_ptr;
-static ulg free_mem_ptr;
+static unsigned long free_mem_end_ptr;
-static ulg free_mem_end_ptr;
 #ifdef STANDALONE_DEBUG
 #define NO_INFLATE_MALLOC
@@ -258,46 +233,13 @@ static ulg free_mem_end_ptr;
 #define ARCH_HAS_DECOMP_WDOG
-#include "../../../../lib/inflate.c"
+#ifdef CONFIG_KERNEL_GZIP
+#include "../../../../lib/decompress_inflate.c"
-/* ===========================================================================
+#endif
- * Fill the input buffer. This is called only when the buffer is empty
- * and at least one byte is really needed.
- */
-int fill_inbuf(void)
-{
-        if (insize != 0)
-                error("ran out of input data");
-        inbuf = input_data;
-        insize = &input_data_end[0] - &input_data[0];
-        inptr = 1;
-        return inbuf[0];
-}
-/* ===========================================================================
+#ifdef CONFIG_KERNEL_LZO
- * Write the output window window[0..outcnt-1] and update crc and bytes_out.
+#include "../../../../lib/decompress_unlzo.c"
- * (Used for the decompressed data only.)
+#endif
- */
-void flush_window(void)
-{
-        ulg c = crc;
-        unsigned n;
-        uch *in, *out, ch;
-        in = window;
-        out = &output_data[output_ptr];
-        for (n = 0; n < outcnt; n++) {
-                ch = *out++ = *in++;
-                c = crc_32_tab[((int)c ^ ch) & 0xff] ^ (c >> 8);
-        }
-        crc = c;
-        bytes_out += (ulg)outcnt;
-        output_ptr += (ulg)outcnt;
-        outcnt = 0;
-        putstr(".");
-}
 #ifndef arch_error
 #define arch_error(x)
@@ -314,22 +256,33 @@ static void error(char *x)
        while(1);       /* Halt */
 }
+asmlinkage void __div0(void)
+{
+        error("Attempting division by 0!");
+}
 #ifndef STANDALONE_DEBUG
-ulg
+unsigned long
-decompress_kernel(ulg output_start, ulg free_mem_ptr_p, ulg free_mem_ptr_end_p,
+decompress_kernel(unsigned long output_start, unsigned long free_mem_ptr_p,
-                  int arch_id)
+                unsigned long free_mem_ptr_end_p,
+                int arch_id)
 {
-        output_data             = (uch *)output_start;  /* Points to kernel start */
+        unsigned char *tmp;
+        output_data             = (unsigned char *)output_start;
        free_mem_ptr            = free_mem_ptr_p;
        free_mem_end_ptr        = free_mem_ptr_end_p;
        __machine_arch_type     = arch_id;
        arch_decomp_setup();
-        makecrc();
+        tmp = (unsigned char *) (((unsigned long)input_data_end) - 4);
+        output_ptr = get_unaligned_le32(tmp);
        putstr("Uncompressing Linux...");
-        gunzip();
+        decompress(input_data, input_data_end - input_data,
+                        NULL, NULL, output_data, NULL, error);
        putstr(" done, booting the kernel.\n");
        return output_ptr;
 }
@@ -341,11 +294,10 @@ int main()
 {
        output_data = output_buffer;
-        makecrc();
        putstr("Uncompressing Linux...");
-        gunzip();
+        decompress(input_data, input_data_end - input_data,
+                        NULL, NULL, output_data, NULL, error);
        putstr("done.\n");
        return 0;
 }
 #endif
-        
diff --git a/arch/arm/boot/compressed/piggy.gzip.S b/arch/arm/boot/compressed/piggy.gzip.S
new file mode 100644
index 000000000000..a68adf91a165
--- /dev/null
+++ b/arch/arm/boot/compressed/piggy.gzip.S
@@ -0,0 +1,6 @@
+        .section .piggydata,#alloc
+        .globl  input_data
+input_data:
+        .incbin "arch/arm/boot/compressed/piggy.gzip"
+        .globl  input_data_end
+input_data_end:
diff --git a/arch/arm/boot/compressed/piggy.S b/arch/arm/boot/compressed/piggy.lzo.S
index 54c951800ebd..a425ad95959a 100644
--- a/arch/arm/boot/compressed/piggy.S
+++ b/arch/arm/boot/compressed/piggy.lzo.S
@@ -1,6 +1,6 @@
        .section .piggydata,#alloc
        .globl  input_data
 input_data:
-        .incbin "arch/arm/boot/compressed/piggy.gz"
+        .incbin "arch/arm/boot/compressed/piggy.lzo"
        .globl  input_data_end
 input_data_end:
diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c
index ab995a9c606c..65e7b5b85d83 100644
--- a/arch/arm/mach-omap1/clock_data.c
+++ b/arch/arm/mach-omap1/clock_data.c
@@ -599,7 +599,7 @@ static struct clk i2c_ick = {
 static struct omap_clk omap_clks[] = {
        /* non-ULPD clocks */
        CLK(NULL,       "ck_ref",       &ck_ref,        CK_16XX | CK_1510 | CK_310 | CK_7XX),
-        CLK(NULL,       "ck_dpll1",     &ck_dpll1,      CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "ck_dpll1",     &ck_dpll1,      CK_16XX | CK_1510 | CK_310 | CK_7XX),
        /* CK_GEN1 clocks */
        CLK(NULL,       "ck_dpll1out",  &ck_dpll1out.clk, CK_16XX),
        CLK(NULL,       "ck_sossi",     &sossi_ck,      CK_16XX),
@@ -627,7 +627,7 @@ static struct omap_clk omap_clks[] = {
        CLK(NULL,       "tc2_ck",       &tc2_ck,        CK_16XX),
        CLK(NULL,       "dma_ck",       &dma_ck,        CK_16XX | CK_1510 | CK_310),
        CLK(NULL,       "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX),
-        CLK(NULL,       "api_ck",       &api_ck.clk,    CK_16XX | CK_1510 | CK_310),
+        CLK(NULL,       "api_ck",       &api_ck.clk,    CK_16XX | CK_1510 | CK_310 | CK_7XX),
        CLK(NULL,       "lb_ck",        &lb_ck.clk,     CK_1510 | CK_310),
        CLK(NULL,       "rhea1_ck",     &rhea1_ck,      CK_16XX),
        CLK(NULL,       "rhea2_ck",     &rhea2_ck,      CK_16XX),
@@ -658,6 +658,10 @@ static struct omap_clk omap_clks[] = {
        CLK("i2c_omap.1", "fck",        &i2c_fck,       CK_16XX | CK_1510 | CK_310 | CK_7XX),
        CLK("i2c_omap.1", "ick",        &i2c_ick,       CK_16XX),
        CLK("i2c_omap.1", "ick",        &dummy_ck,      CK_1510 | CK_310 | CK_7XX),
+        CLK("omap1_spi100k.1", "fck",   &dummy_ck,      CK_7XX),
+        CLK("omap1_spi100k.1", "ick",   &dummy_ck,      CK_7XX),
+        CLK("omap1_spi100k.2", "fck",   &dummy_ck,      CK_7XX),
+        CLK("omap1_spi100k.2", "ick",   &dummy_ck,      CK_7XX),
        CLK("omap_uwire", "fck",        &armxor_ck.clk, CK_16XX | CK_1510 | CK_310),
        CLK("omap-mcbsp.1", "ick",      &dspper_ck,     CK_16XX),
        CLK("omap-mcbsp.1", "ick",      &dummy_ck,      CK_1510 | CK_310),
@@ -674,7 +678,7 @@ static struct omap_clk omap_clks[] = {
 * init
 */
-static struct clk_functions omap1_clk_functions __initdata = {
+static struct clk_functions omap1_clk_functions = {
        .clk_enable             = omap1_clk_enable,
        .clk_disable            = omap1_clk_disable,
        .clk_round_rate         = omap1_clk_round_rate,
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index 23ded2d49600..a2d07aa75c9e 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -14,6 +14,7 @@
 #include <linux/init.h>
 #include <linux/platform_device.h>
 #include <linux/io.h>
+#include <linux/spi/spi.h>
 #include <mach/hardware.h>
 #include <asm/mach/map.h>
@@ -23,6 +24,7 @@
 #include <plat/mux.h>
 #include <mach/gpio.h>
 #include <plat/mmc.h>
+#include <plat/omap7xx.h>
 /*-------------------------------------------------------------------------*/
@@ -196,6 +198,38 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
 /*-------------------------------------------------------------------------*/
+/* OMAP7xx SPI support */
+#if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE)
+struct platform_device omap_spi1 = {
+        .name           = "omap1_spi100k",
+        .id             = 1,
+};
+struct platform_device omap_spi2 = {
+        .name           = "omap1_spi100k",
+        .id             = 2,
+};
+static void omap_init_spi100k(void)
+{
+        omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
+        if (omap_spi1.dev.platform_data)
+                platform_device_register(&omap_spi1);
+        omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
+        if (omap_spi2.dev.platform_data)
+                platform_device_register(&omap_spi2);
+}
+#else
+static inline void omap_init_spi100k(void)
+{
+}
+#endif
+/*-------------------------------------------------------------------------*/
 #if defined(CONFIG_OMAP_STI)
 #define OMAP1_STI_BASE          0xfffea000
@@ -263,6 +297,7 @@ static int __init omap1_init_devices(void)
        omap_init_mbox();
        omap_init_rtc();
+        omap_init_spi100k();
        omap_init_sti();
        return 0;
diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c
index 07212cc621ae..84341377232d 100644
--- a/arch/arm/mach-omap1/mux.c
+++ b/arch/arm/mach-omap1/mux.c
@@ -62,6 +62,14 @@ MUX_CFG_7XX("MMC_7XX_DAT0",        2,   17,    0,   16,   1, 0)
 /* I2C interface */
 MUX_CFG_7XX("I2C_7XX_SCL",         5,    1,    0,    0,   1, 0)
 MUX_CFG_7XX("I2C_7XX_SDA",         5,    5,    0,    0,   1, 0)
+/* SPI pins */
+MUX_CFG_7XX("SPI_7XX_1",           6,    5,    4,    4,   1, 0)
+MUX_CFG_7XX("SPI_7XX_2",           6,    9,    4,    8,   1, 0)
+MUX_CFG_7XX("SPI_7XX_3",           6,   13,    4,   12,   1, 0)
+MUX_CFG_7XX("SPI_7XX_4",           6,   17,    4,   16,   1, 0)
+MUX_CFG_7XX("SPI_7XX_5",           8,   25,    0,   24,   0, 0)
+MUX_CFG_7XX("SPI_7XX_6",           9,    5,    0,    4,   0, 0)
 };
 #define OMAP7XX_PINS_SZ         ARRAY_SIZE(omap7xx_pins)
 #else
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 10eafa70a909..606bf04f51b6 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -80,6 +80,7 @@ config MACH_OVERO
 config MACH_OMAP3EVM
        bool "OMAP 3530 EVM board"
        depends on ARCH_OMAP3 && ARCH_OMAP34XX
+        select OMAP_PACKAGE_CBB
 config MACH_OMAP3517EVM
        bool "OMAP3517/ AM3517 EVM board"
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c
index 8dd277c36661..1e3dfb652acc 100755
--- a/arch/arm/mach-omap2/board-zoom-peripherals.c
+++ b/arch/arm/mach-omap2/board-zoom-peripherals.c
@@ -63,21 +63,21 @@ static int board_keymap[] = {
        KEY(5, 1, KEY_H),
        KEY(5, 2, KEY_J),
        KEY(5, 3, KEY_F3),
+        KEY(5, 4, KEY_UNKNOWN),
        KEY(5, 5, KEY_VOLUMEDOWN),
        KEY(5, 6, KEY_M),
-        KEY(5, 7, KEY_ENTER),
+        KEY(5, 7, KEY_RIGHT),
        KEY(6, 0, KEY_Q),
        KEY(6, 1, KEY_A),
        KEY(6, 2, KEY_N),
        KEY(6, 3, KEY_BACKSPACE),
        KEY(6, 6, KEY_P),
-        KEY(6, 7, KEY_SELECT),
+        KEY(6, 7, KEY_UP),
        KEY(7, 0, KEY_PROG1),   /*MACRO 1 <User defined> */
        KEY(7, 1, KEY_PROG2),   /*MACRO 2 <User defined> */
        KEY(7, 2, KEY_PROG3),   /*MACRO 3 <User defined> */
        KEY(7, 3, KEY_PROG4),   /*MACRO 4 <User defined> */
-        KEY(7, 5, KEY_RIGHT),
+        KEY(7, 6, KEY_SELECT),
-        KEY(7, 6, KEY_UP),
        KEY(7, 7, KEY_DOWN)
 };
diff --git a/arch/arm/mach-omap2/clock2xxx.c b/arch/arm/mach-omap2/clock2xxx.c
index d0e3fb7f9298..5420356eb407 100644
--- a/arch/arm/mach-omap2/clock2xxx.c
+++ b/arch/arm/mach-omap2/clock2xxx.c
@@ -449,40 +449,78 @@ int omap2_select_table_rate(struct clk *clk, unsigned long rate)
 #ifdef CONFIG_CPU_FREQ
 /*
 * Walk PRCM rate table and fillout cpufreq freq_table
+ * XXX This should be replaced by an OPP layer in the near future
 */
-static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)];
+static struct cpufreq_frequency_table *freq_table;
 void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
 {
-        struct prcm_config *prcm;
+        const struct prcm_config *prcm;
+        long sys_ck_rate;
        int i = 0;
+        int tbl_sz = 0;
+        sys_ck_rate = clk_get_rate(sclk);
        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
                if (!(prcm->flags & cpu_mask))
                        continue;
-                if (prcm->xtal_speed != sys_ck.rate)
+                if (prcm->xtal_speed != sys_ck_rate)
                        continue;
                /* don't put bypass rates in table */
                if (prcm->dpll_speed == prcm->xtal_speed)
                        continue;
-                freq_table[i].index = i;
+                tbl_sz++;
-                freq_table[i].frequency = prcm->mpu_speed / 1000;
-                i++;
        }
-        if (i == 0) {
+        /*
-                printk(KERN_WARNING "%s: failed to initialize frequency "
+         * XXX Ensure that we're doing what CPUFreq expects for this error
-                       "table\n", __func__);
+         * case and the following one
+         */
+        if (tbl_sz == 0) {
+                pr_warning("%s: no matching entries in rate_table\n",
+                           __func__);
+                return;
+        }
+        /* Include the CPUFREQ_TABLE_END terminator entry */
+        tbl_sz++;
+        freq_table = kzalloc(sizeof(struct cpufreq_frequency_table) * tbl_sz,
+                             GFP_ATOMIC);
+        if (!freq_table) {
+                pr_err("%s: could not kzalloc frequency table\n", __func__);
                return;
        }
+        for (prcm = rate_table; prcm->mpu_speed; prcm++) {
+                if (!(prcm->flags & cpu_mask))
+                        continue;
+                if (prcm->xtal_speed != sys_ck_rate)
+                        continue;
+                /* don't put bypass rates in table */
+                if (prcm->dpll_speed == prcm->xtal_speed)
+                        continue;
+                freq_table[i].index = i;
+                freq_table[i].frequency = prcm->mpu_speed / 1000;
+                i++;
+        }
        freq_table[i].index = i;
        freq_table[i].frequency = CPUFREQ_TABLE_END;
        *table = &freq_table[0];
 }
+void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
+{
+        kfree(freq_table);
+}
 #endif
 struct clk_functions omap2_clk_functions = {
@@ -494,6 +532,7 @@ struct clk_functions omap2_clk_functions = {
        .clk_disable_unused     = omap2_clk_disable_unused,
 #ifdef  CONFIG_CPU_FREQ
        .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table,
+        .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table,
 #endif
 };
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index ded32364f32b..d4217b93e10b 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -34,7 +34,6 @@
 #include <asm/div64.h>
 #include <asm/clkdev.h>
-#include <plat/sdrc.h>
 #include "clock.h"
 #include "clock34xx.h"
 #include "sdrc.h"
diff --git a/arch/arm/mach-omap2/clock34xx_data.c b/arch/arm/mach-omap2/clock34xx_data.c
index 8bdcc9cc7f9a..c6031d74d6f6 100644
--- a/arch/arm/mach-omap2/clock34xx_data.c
+++ b/arch/arm/mach-omap2/clock34xx_data.c
@@ -776,6 +776,8 @@ static struct clk dpll4_m5_ck = {
        .clksel_mask    = OMAP3430_CLKSEL_CAM_MASK,
        .clksel         = div16_dpll4_clksel,
        .clkdm_name     = "dpll4_clkdm",
+        .set_rate       = &omap2_clksel_set_rate,
+        .round_rate     = &omap2_clksel_round_rate,
        .recalc         = &omap2_clksel_recalc,
 };
@@ -1500,6 +1502,7 @@ static struct clk uart2_fck = {
        .parent         = &core_48m_fck,
        .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP3430_EN_UART2_SHIFT,
+        .clkdm_name     = "core_l4_clkdm",
        .recalc         = &followparent_recalc,
 };
@@ -1509,6 +1512,7 @@ static struct clk uart1_fck = {
        .parent         = &core_48m_fck,
        .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
        .enable_bit     = OMAP3430_EN_UART1_SHIFT,
+        .clkdm_name     = "core_l4_clkdm",
        .recalc         = &followparent_recalc,
 };
@@ -2745,7 +2749,7 @@ static struct clk mcbsp4_ick = {
 };
 static const struct clksel mcbsp_234_clksel[] = {
-        { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates },
+        { .parent = &per_96m_fck,  .rates = common_mcbsp_96m_rates },
        { .parent = &mcbsp_clks,   .rates = common_mcbsp_mcbsp_rates },
        { .parent = NULL }
 };
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 1a45ed1e8ba1..dd285f001467 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -559,7 +559,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
         * downstream clocks for debugging purposes?
         */
-        if (!clkdm || !clk)
+        if (!clkdm || !clk || !clkdm->clktrctrl_mask)
                return -EINVAL;
        if (atomic_inc_return(&clkdm->usecount) > 1)
@@ -610,7 +610,7 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
         * downstream clocks for debugging purposes?
         */
-        if (!clkdm || !clk)
+        if (!clkdm || !clk || !clkdm->clktrctrl_mask)
                return -EINVAL;
 #ifdef DEBUG
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index a8749e8017b9..5a7996402c53 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -33,7 +33,6 @@
 #include <plat/sdrc.h>
 #include <plat/gpmc.h>
 #include <plat/serial.h>
-#include <plat/mux.h>
 #include <plat/vram.h>
 #include "clock.h"
@@ -73,21 +72,21 @@ static struct map_desc omap24xx_io_desc[] __initdata = {
 #ifdef CONFIG_ARCH_OMAP2420
 static struct map_desc omap242x_io_desc[] __initdata = {
        {
-                .virtual        = DSP_MEM_24XX_VIRT,
+                .virtual        = DSP_MEM_2420_VIRT,
-                .pfn            = __phys_to_pfn(DSP_MEM_24XX_PHYS),
+                .pfn            = __phys_to_pfn(DSP_MEM_2420_PHYS),
-                .length         = DSP_MEM_24XX_SIZE,
+                .length         = DSP_MEM_2420_SIZE,
                .type           = MT_DEVICE
        },
        {
-                .virtual        = DSP_IPI_24XX_VIRT,
+                .virtual        = DSP_IPI_2420_VIRT,
-                .pfn            = __phys_to_pfn(DSP_IPI_24XX_PHYS),
+                .pfn            = __phys_to_pfn(DSP_IPI_2420_PHYS),
-                .length         = DSP_IPI_24XX_SIZE,
+                .length         = DSP_IPI_2420_SIZE,
                .type           = MT_DEVICE
        },
        {
-                .virtual        = DSP_MMU_24XX_VIRT,
+                .virtual        = DSP_MMU_2420_VIRT,
-                .pfn            = __phys_to_pfn(DSP_MMU_24XX_PHYS),
+                .pfn            = __phys_to_pfn(DSP_MMU_2420_PHYS),
-                .length         = DSP_MMU_24XX_SIZE,
+                .length         = DSP_MMU_2420_SIZE,
                .type           = MT_DEVICE
        },
 };
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index e071b3fd1878..459ef23ab8a8 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -994,8 +994,10 @@ int __init omap_mux_init(u32 mux_pbase, u32 mux_size,
        }
 #ifdef CONFIG_OMAP_MUX
-        omap_mux_package_fixup(package_subset, superset);
+        if (package_subset)
-        omap_mux_package_init_balls(package_balls, superset);
+                omap_mux_package_fixup(package_subset, superset);
+        if (package_balls)
+                omap_mux_package_init_balls(package_balls, superset);
        omap_mux_set_cmdline_signals();
        omap_mux_set_board_signals(board_mux);
 #endif
diff --git a/arch/arm/mach-omap2/opp2420_data.c b/arch/arm/mach-omap2/opp2420_data.c
index 126a9396b3a8..e6dda694fd5c 100644
--- a/arch/arm/mach-omap2/opp2420_data.c
+++ b/arch/arm/mach-omap2/opp2420_data.c
@@ -9,45 +9,47 @@
 * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
 * These configurations are characterized by voltage and speed for clocks.
 * The device is only validated for certain combinations. One way to express
- * these combinations is via the 'ratio's' which the clocks operate with
+ * these combinations is via the 'ratios' which the clocks operate with
 * respect to each other. These ratio sets are for a given voltage/DPLL
- * setting. All configurations can be described by a DPLL setting and a ratio
+ * setting. All configurations can be described by a DPLL setting and a ratio.
- * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
- *
- * 2430 differs from 2420 in that there are no more phase synchronizers used.
- * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
- * 2430 (iva2.1, NOdsp, mdm)
 *
 * XXX Missing voltage data.
+ * XXX Missing 19.2MHz sys_clk rate sets (needed for N800/N810)
 *
 * THe format described in this file is deprecated.  Once a reasonable
 * OPP API exists, the data in this file should be converted to use it.
 *
 * This is technically part of the OMAP2xxx clock code.
+ *
+ * Considerable work is still needed to fully support dynamic frequency
+ * changes on OMAP2xxx-series chips.  Readers interested in such a
+ * project are encouraged to review the Maemo Diablo RX-34 and RX-44
+ * kernel source at:
+ *     http://repository.maemo.org/pool/diablo/free/k/kernel-source-diablo/
 */
 #include "opp2xxx.h"
 #include "sdrc.h"
 #include "clock.h"
-/*-------------------------------------------------------------------------
+/*
- * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
+ * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
 *
- * Filling in table based on H4 boards and 2430-SDPs variants available.
+ * Filling in table based on H4 boards available.  There are quite a
- * There are quite a few more rates combinations which could be defined.
+ * few more rate combinations which could be defined.
 *
- * When multiple values are defined the start up will try and choose the
+ * When multiple values are defined the start up will try and choose
- * fastest one. If a 'fast' value is defined, then automatically, the /2
+ * the fastest one. If a 'fast' value is defined, then automatically,
- * one should be included as it can be used.    Generally having more that
+ * the /2 one should be included as it can be used.  Generally having
- * one fast set does not make sense, as static timings need to be changed
+ * more than one fast set does not make sense, as static timings need
- * to change the set.    The exception is the bypass setting which is
+ * to be changed to change the set.  The exception is the bypass
- * availble for low power bypass.
+ * setting which is available for low power bypass.
 *
 * Note: This table needs to be sorted, fastest to slowest.
- *-------------------------------------------------------------------------*/
+ **/
 const struct prcm_config omap2420_rate_table[] = {
        /* PRCM I - FAST */
        {S12M, S660M, S330M, RI_CM_CLKSEL_MPU_VAL,              /* 330MHz ARM */
diff --git a/arch/arm/mach-omap2/opp2430_data.c b/arch/arm/mach-omap2/opp2430_data.c
index edb81672c844..1b9596ae201e 100644
--- a/arch/arm/mach-omap2/opp2430_data.c
+++ b/arch/arm/mach-omap2/opp2430_data.c
@@ -1,5 +1,5 @@
 /*
- * opp2420_data.c - old-style "OPP" table for OMAP2420
+ * opp2430_data.c - old-style "OPP" table for OMAP2430
 *
 * Copyright (C) 2005-2009 Texas Instruments, Inc.
 * Copyright (C) 2004-2009 Nokia Corporation
@@ -9,16 +9,16 @@
 * The OMAP2 processor can be run at several discrete 'PRCM configurations'.
 * These configurations are characterized by voltage and speed for clocks.
 * The device is only validated for certain combinations. One way to express
- * these combinations is via the 'ratio's' which the clocks operate with
+ * these combinations is via the 'ratios' which the clocks operate with
 * respect to each other. These ratio sets are for a given voltage/DPLL
- * setting. All configurations can be described by a DPLL setting and a ratio
+ * setting. All configurations can be described by a DPLL setting and a ratio.
- * There are 3 ratio sets for the 2430 and X ratio sets for 2420.
 *
 * 2430 differs from 2420 in that there are no more phase synchronizers used.
 * They both have a slightly different clock domain setup. 2420(iva1,dsp) vs
 * 2430 (iva2.1, NOdsp, mdm)
 *
 * XXX Missing voltage data.
+ * XXX Missing 19.2MHz sys_clk rate sets.
 *
 * THe format described in this file is deprecated.  Once a reasonable
 * OPP API exists, the data in this file should be converted to use it.
@@ -30,24 +30,24 @@
 #include "sdrc.h"
 #include "clock.h"
-/*-------------------------------------------------------------------------
+/*
- * Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated.
+ * Key dividers which make up a PRCM set. Ratios for a PRCM are mandated.
 * xtal_speed, dpll_speed, mpu_speed, CM_CLKSEL_MPU,
 * CM_CLKSEL_DSP, CM_CLKSEL_GFX, CM_CLKSEL1_CORE, CM_CLKSEL1_PLL,
 * CM_CLKSEL2_PLL, CM_CLKSEL_MDM
 *
- * Filling in table based on H4 boards and 2430-SDPs variants available.
+ * Filling in table based on 2430-SDPs variants available.  There are
- * There are quite a few more rates combinations which could be defined.
+ * quite a few more rate combinations which could be defined.
 *
- * When multiple values are defined the start up will try and choose the
+ * When multiple values are defined the start up will try and choose
- * fastest one. If a 'fast' value is defined, then automatically, the /2
+ * the fastest one. If a 'fast' value is defined, then automatically,
- * one should be included as it can be used.    Generally having more that
+ * the /2 one should be included as it can be used.  Generally having
- * one fast set does not make sense, as static timings need to be changed
+ * more than one fast set does not make sense, as static timings need
- * to change the set.    The exception is the bypass setting which is
+ * to be changed to change the set.  The exception is the bypass
- * availble for low power bypass.
+ * setting which is available for low power bypass.
 *
 * Note: This table needs to be sorted, fastest to slowest.
- *-------------------------------------------------------------------------*/
+ */
 const struct prcm_config omap2430_rate_table[] = {
        /* PRCM #4 - ratio2 (ES2.1) - FAST */
        {S13M, S798M, S399M, R2_CM_CLKSEL_MPU_VAL,              /* 399MHz ARM */
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 81ed252a0f8a..c6cc809afb79 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -124,8 +124,8 @@ static void omap3_core_save_context(void)
        control_padconf_off |= START_PADCONF_SAVE;
        omap_ctrl_writel(control_padconf_off, OMAP343X_CONTROL_PADCONF_OFF);
        /* wait for the save to complete */
-        while (!omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
+        while (!(omap_ctrl_readl(OMAP343X_CONTROL_GENERAL_PURPOSE_STATUS)
-                        & PADCONF_SAVE_DONE)
+                        & PADCONF_SAVE_DONE))
                ;
        /* Save the Interrupt controller context */
        omap_intc_save_context();
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index 19805a7de06c..8c964bec8159 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -125,6 +125,13 @@ static struct plat_serial8250_port serial_platform_data3[] = {
        }
 };
 #endif
+static inline unsigned int __serial_read_reg(struct uart_port *up,
+                                           int offset)
+{
+        offset <<= up->regshift;
+        return (unsigned int)__raw_readb(up->membase + offset);
+}
 static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
                                           int offset)
 {
@@ -583,11 +590,12 @@ static unsigned int serial_in_override(struct uart_port *up, int offset)
 {
        if (UART_RX == offset) {
                unsigned int lsr;
-                lsr = serial_read_reg(omap_uart[up->line].p, UART_LSR);
+                lsr = __serial_read_reg(up, UART_LSR);
                if (!(lsr & UART_LSR_DR))
                        return -EPERM;
        }
-        return serial_read_reg(omap_uart[up->line].p, offset);
+        return __serial_read_reg(up, offset);
 }
 void __init omap_serial_early_init(void)
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 52c40d155672..a04ffbbbe253 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -616,7 +616,7 @@ void __init mem_init(void)
                "%dK data, %dK init, %luK highmem)\n",
                nr_free_pages() << (PAGE_SHIFT-10), codesize >> 10,
                datasize >> 10, initsize >> 10,
-                (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+                totalhigh_pages << (PAGE_SHIFT-10));
        if (PAGE_SIZE >= 16384 && num_physpages <= 128) {
                extern int sysctl_overcommit_memory;
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index 89cafc937249..d9f8c844c385 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -36,10 +36,6 @@ static struct clk_functions *arch_clock;
 * Standard clock functions defined in include/linux/clk.h
 *-------------------------------------------------------------------------*/
-/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
- * clock framework is not up , it is defined here to avoid rework in
- * every driver. Also dummy prcm reset function is added */
 int clk_enable(struct clk *clk)
 {
        unsigned long flags;
@@ -305,7 +301,6 @@ void clk_enable_init_clocks(void)
                        clk_enable(clkp);
        }
 }
-EXPORT_SYMBOL(clk_enable_init_clocks);
 /*
 * Low level helpers
@@ -334,7 +329,16 @@ void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
                arch_clock->clk_init_cpufreq_table(table);
        spin_unlock_irqrestore(&clockfw_lock, flags);
 }
-EXPORT_SYMBOL(clk_init_cpufreq_table);
+void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&clockfw_lock, flags);
+        if (arch_clock->clk_exit_cpufreq_table)
+                arch_clock->clk_exit_cpufreq_table(table);
+        spin_unlock_irqrestore(&clockfw_lock, flags);
+}
 #endif
 /*-------------------------------------------------------------------------*/
diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c
index f8ddbdd8b076..6d3d33360056 100644
--- a/arch/arm/plat-omap/cpu-omap.c
+++ b/arch/arm/plat-omap/cpu-omap.c
@@ -134,6 +134,7 @@ static int __init omap_cpu_init(struct cpufreq_policy *policy)
 static int omap_cpu_exit(struct cpufreq_policy *policy)
 {
+        clk_exit_cpufreq_table(&freq_table);
        clk_put(mpu_clk);
        return 0;
 }
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 04846811d0aa..d17620c50c28 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -192,6 +192,7 @@ struct gpio_bank {
        u32 saved_risingdetect;
 #endif
        u32 level_mask;
+        u32 toggle_mask;
        spinlock_t lock;
        struct gpio_chip chip;
        struct clk *dbck;
@@ -749,6 +750,44 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio,
 }
 #endif
+/*
+ * This only applies to chips that can't do both rising and falling edge
+ * detection at once.  For all other chips, this function is a noop.
+ */
+static void _toggle_gpio_edge_triggering(struct gpio_bank *bank, int gpio)
+{
+        void __iomem *reg = bank->base;
+        u32 l = 0;
+        switch (bank->method) {
+#ifdef CONFIG_ARCH_OMAP1
+        case METHOD_MPUIO:
+                reg += OMAP_MPUIO_GPIO_INT_EDGE;
+                break;
+#endif
+#ifdef CONFIG_ARCH_OMAP15XX
+        case METHOD_GPIO_1510:
+                reg += OMAP1510_GPIO_INT_CONTROL;
+                break;
+#endif
+#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
+        case METHOD_GPIO_7XX:
+                reg += OMAP7XX_GPIO_INT_CONTROL;
+                break;
+#endif
+        default:
+                return;
+        }
+        l = __raw_readl(reg);
+        if ((l >> gpio) & 1)
+                l &= ~(1 << gpio);
+        else
+                l |= 1 << gpio;
+        __raw_writel(l, reg);
+}
 static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
 {
        void __iomem *reg = bank->base;
@@ -759,6 +798,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
        case METHOD_MPUIO:
                reg += OMAP_MPUIO_GPIO_INT_EDGE;
                l = __raw_readl(reg);
+                if (trigger & IRQ_TYPE_EDGE_BOTH)
+                        bank->toggle_mask |= 1 << gpio;
                if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 1 << gpio;
                else if (trigger & IRQ_TYPE_EDGE_FALLING)
@@ -771,6 +812,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
        case METHOD_GPIO_1510:
                reg += OMAP1510_GPIO_INT_CONTROL;
                l = __raw_readl(reg);
+                if (trigger & IRQ_TYPE_EDGE_BOTH)
+                        bank->toggle_mask |= 1 << gpio;
                if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 1 << gpio;
                else if (trigger & IRQ_TYPE_EDGE_FALLING)
@@ -803,6 +846,8 @@ static int _set_gpio_triggering(struct gpio_bank *bank, int gpio, int trigger)
        case METHOD_GPIO_7XX:
                reg += OMAP7XX_GPIO_INT_CONTROL;
                l = __raw_readl(reg);
+                if (trigger & IRQ_TYPE_EDGE_BOTH)
+                        bank->toggle_mask |= 1 << gpio;
                if (trigger & IRQ_TYPE_EDGE_RISING)
                        l |= 1 << gpio;
                else if (trigger & IRQ_TYPE_EDGE_FALLING)
@@ -1072,7 +1117,7 @@ static inline void _set_gpio_irqenable(struct gpio_bank *bank, int gpio, int ena
 */
 static int _set_gpio_wakeup(struct gpio_bank *bank, int gpio, int enable)
 {
-        unsigned long flags;
+        unsigned long uninitialized_var(flags);
        switch (bank->method) {
 #ifdef CONFIG_ARCH_OMAP16XX
@@ -1217,7 +1262,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
        void __iomem *isr_reg = NULL;
        u32 isr;
-        unsigned int gpio_irq;
+        unsigned int gpio_irq, gpio_index;
        struct gpio_bank *bank;
        u32 retrigger = 0;
        int unmasked = 0;
@@ -1284,9 +1329,23 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                gpio_irq = bank->virtual_irq_start;
                for (; isr != 0; isr >>= 1, gpio_irq++) {
+                        gpio_index = get_gpio_index(irq_to_gpio(gpio_irq));
                        if (!(isr & 1))
                                continue;
+#ifdef CONFIG_ARCH_OMAP1
+                        /*
+                         * Some chips can't respond to both rising and falling
+                         * at the same time.  If this irq was requested with
+                         * both flags, we need to flip the ICR data for the IRQ
+                         * to respond to the IRQ for the opposite direction.
+                         * This will be indicated in the bank toggle_mask.
+                         */
+                        if (bank->toggle_mask & (1 << gpio_index))
+                                _toggle_gpio_edge_triggering(bank, gpio_index);
+#endif
                        generic_handle_irq(gpio_irq);
                }
        }
diff --git a/arch/arm/plat-omap/include/plat/board.h b/arch/arm/plat-omap/include/plat/board.h
index 376ce18216ff..5cd622039da0 100644
--- a/arch/arm/plat-omap/include/plat/board.h
+++ b/arch/arm/plat-omap/include/plat/board.h
@@ -99,7 +99,6 @@ struct fb_info;
 struct omap_backlight_config {
        int default_intensity;
        int (*set_power)(struct device *dev, int state);
-        int (*check_fb)(struct fb_info *fb);
 };
 struct omap_fbmem_config {
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index 309b6d1dccdb..94fe2a0ce40a 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -119,6 +119,7 @@ struct clk_functions {
        void            (*clk_disable_unused)(struct clk *clk);
 #ifdef CONFIG_CPU_FREQ
        void            (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
+        void            (*clk_exit_cpufreq_table)(struct cpufreq_frequency_table **);
 #endif
 };
@@ -135,6 +136,7 @@ extern unsigned long followparent_recalc(struct clk *clk);
 extern void clk_enable_init_clocks(void);
 #ifdef CONFIG_CPU_FREQ
 extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
+extern void clk_exit_cpufreq_table(struct cpufreq_frequency_table **table);
 #endif
 extern const struct clkops clkops_null;
diff --git a/arch/arm/plat-omap/include/plat/control.h b/arch/arm/plat-omap/include/plat/control.h
index 2ae884378638..a745d62fad0d 100644
--- a/arch/arm/plat-omap/include/plat/control.h
+++ b/arch/arm/plat-omap/include/plat/control.h
@@ -147,7 +147,7 @@
 #define OMAP343X_CONTROL_IVA2_BOOTADDR  (OMAP2_CONTROL_GENERAL + 0x0190)
 #define OMAP343X_CONTROL_IVA2_BOOTMOD   (OMAP2_CONTROL_GENERAL + 0x0194)
 #define OMAP343X_CONTROL_DEBOBS(i)      (OMAP2_CONTROL_GENERAL + 0x01B0 \
-                                        + ((i) >> 1) * 4 + (!(i) & 1) * 2)
+                                        + ((i) >> 1) * 4 + (!((i) & 1)) * 2)
 #define OMAP343X_CONTROL_PROG_IO0       (OMAP2_CONTROL_GENERAL + 0x01D4)
 #define OMAP343X_CONTROL_PROG_IO1       (OMAP2_CONTROL_GENERAL + 0x01D8)
 #define OMAP343X_CONTROL_DSS_DPLL_SPREADING     (OMAP2_CONTROL_GENERAL + 0x01E0)
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index 7e5319f907d1..a3e7b471bcba 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -122,16 +122,21 @@
 #define OMAP243X_SMS_VIRT       (OMAP243X_SMS_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP243X_SMS_SIZE       SZ_1M
-/* DSP */
+/* 2420 IVA */
-#define DSP_MEM_24XX_PHYS       OMAP2420_DSP_MEM_BASE   /* 0x58000000 */
+#define DSP_MEM_2420_PHYS       OMAP2420_DSP_MEM_BASE
-#define DSP_MEM_24XX_VIRT       0xe0000000
+                                                /* 0x58000000 --> 0xfc100000 */
-#define DSP_MEM_24XX_SIZE       0x28000
+#define DSP_MEM_2420_VIRT       0xfc100000
-#define DSP_IPI_24XX_PHYS       OMAP2420_DSP_IPI_BASE   /* 0x59000000 */
+#define DSP_MEM_2420_SIZE       0x28000
-#define DSP_IPI_24XX_VIRT       0xe1000000
+#define DSP_IPI_2420_PHYS       OMAP2420_DSP_IPI_BASE
-#define DSP_IPI_24XX_SIZE       SZ_4K
+                                                /* 0x59000000 --> 0xfc128000 */
-#define DSP_MMU_24XX_PHYS       OMAP2420_DSP_MMU_BASE   /* 0x5a000000 */
+#define DSP_IPI_2420_VIRT       0xfc128000
-#define DSP_MMU_24XX_VIRT       0xe2000000
+#define DSP_IPI_2420_SIZE       SZ_4K
-#define DSP_MMU_24XX_SIZE       SZ_4K
+#define DSP_MMU_2420_PHYS       OMAP2420_DSP_MMU_BASE
+                                                /* 0x5a000000 --> 0xfc129000 */
+#define DSP_MMU_2420_VIRT       0xfc129000
+#define DSP_MMU_2420_SIZE       SZ_4K
+/* 2430 IVA2.1 - currently unmapped */
 /*
 * ----------------------------------------------------------------------------
@@ -182,16 +187,7 @@
 #define OMAP343X_SDRC_VIRT      (OMAP343X_SDRC_PHYS + OMAP2_L3_IO_OFFSET)
 #define OMAP343X_SDRC_SIZE      SZ_1M
-/* DSP */
+/* 3430 IVA - currently unmapped */
-#define DSP_MEM_34XX_PHYS       OMAP34XX_DSP_MEM_BASE   /* 0x58000000 */
-#define DSP_MEM_34XX_VIRT       0xe0000000
-#define DSP_MEM_34XX_SIZE       0x28000
-#define DSP_IPI_34XX_PHYS       OMAP34XX_DSP_IPI_BASE   /* 0x59000000 */
-#define DSP_IPI_34XX_VIRT       0xe1000000
-#define DSP_IPI_34XX_SIZE       SZ_4K
-#define DSP_MMU_34XX_PHYS       OMAP34XX_DSP_MMU_BASE   /* 0x5a000000 */
-#define DSP_MMU_34XX_VIRT       0xe2000000
-#define DSP_MMU_34XX_SIZE       SZ_4K
 /*
 * ----------------------------------------------------------------------------
diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h
index 8f069cc80350..692c90e89ac3 100644
--- a/arch/arm/plat-omap/include/plat/mux.h
+++ b/arch/arm/plat-omap/include/plat/mux.h
@@ -183,6 +183,14 @@ enum omap7xx_index {
        /* I2C */
        I2C_7XX_SCL,
        I2C_7XX_SDA,
+        /* SPI */
+        SPI_7XX_1,
+        SPI_7XX_2,
+        SPI_7XX_3,
+        SPI_7XX_4,
+        SPI_7XX_5,
+        SPI_7XX_6,
 };
 enum omap1xxx_index {
diff --git a/arch/arm/plat-omap/include/plat/omap7xx.h b/arch/arm/plat-omap/include/plat/omap7xx.h
index 53f52414b0e9..48e4757e1e30 100644
--- a/arch/arm/plat-omap/include/plat/omap7xx.h
+++ b/arch/arm/plat-omap/include/plat/omap7xx.h
@@ -46,6 +46,9 @@
 #define OMAP7XX_DSPREG_SIZE     SZ_128K
 #define OMAP7XX_DSPREG_START    0xE1000000
+#define OMAP7XX_SPI1_BASE       0xfffc0800
+#define OMAP7XX_SPI2_BASE       0xfffc1000
 /*
 * ----------------------------------------------------------------------------
 * OMAP7XX specific configuration registers
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 11f5d7961c73..0cfd54f519c4 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -66,12 +66,12 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
                        return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
        }
        if (cpu_is_omap2420()) {
-                if (BETWEEN(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_SIZE))
+                if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
-                        return XLATE(p, DSP_MEM_24XX_PHYS, DSP_MEM_24XX_VIRT);
+                        return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
-                if (BETWEEN(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE))
+                if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
-                        return XLATE(p, DSP_IPI_24XX_PHYS, DSP_IPI_24XX_SIZE);
+                        return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
-                if (BETWEEN(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_SIZE))
+                if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
-                        return XLATE(p, DSP_MMU_24XX_PHYS, DSP_MMU_24XX_VIRT);
+                        return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
        }
        if (cpu_is_omap2430()) {
                if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index c0ff1e39d893..463d6386aff2 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -827,7 +827,7 @@ EXPORT_SYMBOL_GPL(iommu_get);
 **/
 void iommu_put(struct iommu *obj)
 {
-        if (!obj && IS_ERR(obj))
+        if (!obj || IS_ERR(obj))
                return;
        mutex_lock(&obj->iommu_lock);
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 2cc1cc328bac..f75767278fc3 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -436,7 +436,7 @@ int omap_mcbsp_request(unsigned int id)
                        dev_err(mcbsp->dev, "Unable to request TX IRQ %d "
                                        "for McBSP%d\n", mcbsp->tx_irq,
                                        mcbsp->id);
-                        return err;
+                        goto error;
                }
                init_completion(&mcbsp->rx_irq_completion);
@@ -446,12 +446,26 @@ int omap_mcbsp_request(unsigned int id)
                        dev_err(mcbsp->dev, "Unable to request RX IRQ %d "
                                        "for McBSP%d\n", mcbsp->rx_irq,
                                        mcbsp->id);
-                        free_irq(mcbsp->tx_irq, (void *)mcbsp);
+                        goto tx_irq;
-                        return err;
                }
        }
        return 0;
+tx_irq:
+        free_irq(mcbsp->tx_irq, (void *)mcbsp);
+error:
+        if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
+                        mcbsp->pdata->ops->free(id);
+        /* Do procedure specific to omap34xx arch, if applicable */
+        omap34xx_mcbsp_free(mcbsp);
+        clk_disable(mcbsp->fclk);
+        clk_disable(mcbsp->iclk);
+        mcbsp->free = 1;
+        return err;
 }
 EXPORT_SYMBOL(omap_mcbsp_request);
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c
index 9e8d00389eef..1651942f7feb 100644
--- a/arch/mips/mm/init.c
+++ b/arch/mips/mm/init.c
@@ -424,7 +424,7 @@ void __init mem_init(void)
               reservedpages << (PAGE_SHIFT-10),
               datasize >> 10,
               initsize >> 10,
-               (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+               totalhigh_pages << (PAGE_SHIFT-10));
 }
 #endif /* !CONFIG_NEED_MULTIPLE_NODES */
diff --git a/arch/mips/sgi-ip27/ip27-memory.c b/arch/mips/sgi-ip27/ip27-memory.c
index f61c164d1e67..bc1297109cc5 100644
--- a/arch/mips/sgi-ip27/ip27-memory.c
+++ b/arch/mips/sgi-ip27/ip27-memory.c
@@ -505,5 +505,5 @@ void __init mem_init(void)
               (num_physpages - tmp) << (PAGE_SHIFT-10),
               datasize >> 10,
               initsize >> 10,
-               (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+               totalhigh_pages << (PAGE_SHIFT-10));
 }
diff --git a/arch/mn10300/Makefile b/arch/mn10300/Makefile
index dd0c8ff52a68..ac5c6bdb2f05 100644
--- a/arch/mn10300/Makefile
+++ b/arch/mn10300/Makefile
@@ -19,7 +19,7 @@ CCDIR	:= $(strip $(patsubst %/specs,%,$(CCSPECS)))
 KBUILD_CPPFLAGS += -nostdinc -I$(CCDIR)/include
 LDFLAGS         :=
-OBJCOPYFLAGS    := -O binary -R .note -R .comment -S
+OBJCOPYFLAGS    := -O binary -R .note -R .comment -R .GCC-command-line -R .note.gnu.build-id -S
 #LDFLAGS_vmlinux := -Map linkmap.txt
 CHECKFLAGS      +=
diff --git a/arch/mn10300/configs/asb2303_defconfig b/arch/mn10300/configs/asb2303_defconfig
index 3acce23708b0..441920d8ff58 100644
--- a/arch/mn10300/configs/asb2303_defconfig
+++ b/arch/mn10300/configs/asb2303_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.30-rc2
+# Linux kernel version: 2.6.33-rc1
-# Sat Apr 18 11:13:22 2009
+# Tue Dec 22 19:26:25 2009
 #
 CONFIG_MN10300=y
 CONFIG_AM33=y
@@ -22,6 +22,7 @@ CONFIG_GENERIC_HARDIRQS=y
 # CONFIG_HOTPLUG_CPU is not set
 CONFIG_HZ=1000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
 #
 # General setup
@@ -43,11 +44,10 @@ CONFIG_BSD_PROCESS_ACCT=y
 #
 # RCU Subsystem
 #
-CONFIG_CLASSIC_RCU=y
 # CONFIG_TREE_RCU is not set
-# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_PREEMPT_RCU is not set
+CONFIG_TINY_RCU=y
 # CONFIG_TREE_RCU_TRACE is not set
-# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_GROUP_SCHED is not set
@@ -62,7 +62,6 @@ CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_SYSCTL_SYSCALL=y
 # CONFIG_KALLSYMS is not set
-CONFIG_STRIP_ASM_SYMS=y
 # CONFIG_HOTPLUG is not set
 CONFIG_PRINTK=y
 CONFIG_BUG=y
@@ -75,14 +74,22 @@ CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
 CONFIG_AIO=y
+#
+# Kernel Performance Events And Counters
+#
 # CONFIG_VM_EVENT_COUNTERS is not set
 CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
 CONFIG_PROFILING=y
-# CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+#
+# GCOV-based kernel profiling
+#
 # CONFIG_SLOW_WORK is not set
 # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
 CONFIG_SLABINFO=y
@@ -90,6 +97,35 @@ CONFIG_RT_MUTEXES=y
 CONFIG_BASE_SMALL=0
 # CONFIG_MODULES is not set
 # CONFIG_BLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK is not set
+# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK is not set
+# CONFIG_INLINE_SPIN_LOCK_BH is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_SPIN_UNLOCK is not set
+# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
+# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_READ_TRYLOCK is not set
+# CONFIG_INLINE_READ_LOCK is not set
+# CONFIG_INLINE_READ_LOCK_BH is not set
+# CONFIG_INLINE_READ_LOCK_IRQ is not set
+# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_READ_UNLOCK is not set
+# CONFIG_INLINE_READ_UNLOCK_BH is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
+# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
+# CONFIG_INLINE_WRITE_TRYLOCK is not set
+# CONFIG_INLINE_WRITE_LOCK is not set
+# CONFIG_INLINE_WRITE_LOCK_BH is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
+# CONFIG_INLINE_WRITE_UNLOCK is not set
+# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
+# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
+# CONFIG_MUTEX_SPIN_ON_OWNER is not set
 # CONFIG_FREEZER is not set
 #
@@ -145,9 +181,8 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
 CONFIG_ZONE_DMA_FLAG=0
 CONFIG_NR_QUICK=1
 CONFIG_VIRT_TO_BUS=y
-CONFIG_UNEVICTABLE_LRU=y
+# CONFIG_KSM is not set
-CONFIG_HAVE_MLOCK=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
-CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 #
 # Power management options
@@ -202,6 +237,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_NETFILTER is not set
 # CONFIG_IP_DCCP is not set
 # CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
 # CONFIG_TIPC is not set
 # CONFIG_ATM is not set
 # CONFIG_BRIDGE is not set
@@ -216,6 +252,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
 # CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
 # CONFIG_NET_SCHED is not set
 # CONFIG_DCB is not set
@@ -341,7 +378,6 @@ CONFIG_MISC_DEVICES=y
 # CONFIG_SCSI_DMA is not set
 # CONFIG_SCSI_NETLINK is not set
 CONFIG_NETDEVICES=y
-CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -362,14 +398,11 @@ CONFIG_SMC91X=y
 # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
 # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
 # CONFIG_B44 is not set
+# CONFIG_KS8842 is not set
+# CONFIG_KS8851_MLL is not set
 # CONFIG_NETDEV_1000 is not set
 # CONFIG_NETDEV_10000 is not set
+# CONFIG_WLAN is not set
-#
-# Wireless LAN
-#
-# CONFIG_WLAN_PRE80211 is not set
-# CONFIG_WLAN_80211 is not set
 #
 # Enable WiMAX (Networking options) to see the WiMAX drivers
@@ -430,11 +463,15 @@ CONFIG_RTC=y
 # CONFIG_TCG_TPM is not set
 # CONFIG_I2C is not set
 # CONFIG_SPI is not set
+#
+# PPS support
+#
+# CONFIG_PPS is not set
 # CONFIG_W1 is not set
 # CONFIG_POWER_SUPPLY is not set
 # CONFIG_HWMON is not set
 # CONFIG_THERMAL is not set
-# CONFIG_THERMAL_HWMON is not set
 # CONFIG_WATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
@@ -451,22 +488,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_HTC_PASIC3 is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_REGULATOR is not set
+# CONFIG_MEDIA_SUPPORT is not set
-#
-# Multimedia devices
-#
-#
-# Multimedia core support
-#
-# CONFIG_VIDEO_DEV is not set
-# CONFIG_DVB_CORE is not set
-# CONFIG_VIDEO_MEDIA is not set
-#
-# Multimedia drivers
-#
-# CONFIG_DAB is not set
 #
 # Graphics support
@@ -490,11 +512,17 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_DMADEVICES is not set
 # CONFIG_AUXDISPLAY is not set
 # CONFIG_UIO is not set
+#
+# TI VLYNQ
+#
 # CONFIG_STAGING is not set
 #
 # File systems
 #
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
@@ -539,6 +567,7 @@ CONFIG_NFS_V3=y
 # CONFIG_NFS_V3_ACL is not set
 # CONFIG_NFS_V4 is not set
 CONFIG_ROOT_NFS=y
+# CONFIG_NFSD is not set
 CONFIG_LOCKD=y
 CONFIG_LOCKD_V4=y
 CONFIG_NFS_COMMON=y
@@ -561,13 +590,13 @@ CONFIG_ENABLE_WARN_DEPRECATED=y
 CONFIG_ENABLE_MUST_CHECK=y
 CONFIG_FRAME_WARN=1024
 CONFIG_MAGIC_SYSRQ=y
+CONFIG_STRIP_ASM_SYMS=y
 # CONFIG_UNUSED_SYMBOLS is not set
 # CONFIG_DEBUG_FS is not set
 # CONFIG_HEADERS_CHECK is not set
 # CONFIG_DEBUG_KERNEL is not set
-# CONFIG_DEBUG_BUGVERBOSE is not set
+CONFIG_DEBUG_BUGVERBOSE=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_SYSCTL_SYSCALL_CHECK is not set
 # CONFIG_SAMPLES is not set
@@ -577,7 +606,11 @@ CONFIG_MAGIC_SYSRQ=y
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
 # CONFIG_SECURITYFS is not set
-# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_DEFAULT_SECURITY_SELINUX is not set
+# CONFIG_DEFAULT_SECURITY_SMACK is not set
+# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_DEFAULT_SECURITY=""
 # CONFIG_CRYPTO is not set
 # CONFIG_BINARY_PRINTF is not set
diff --git a/arch/mn10300/include/asm/bitops.h b/arch/mn10300/include/asm/bitops.h
index 0b610f482abb..f49ac49e09ad 100644
--- a/arch/mn10300/include/asm/bitops.h
+++ b/arch/mn10300/include/asm/bitops.h
@@ -165,7 +165,7 @@ static inline __attribute__((const))
 unsigned long __ffs(unsigned long x)
 {
        int bit;
-        asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x));
+        asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(x & -x) : "cc");
        return bit;
 }
@@ -177,7 +177,7 @@ static inline __attribute__((const))
 int __ilog2_u32(u32 n)
 {
        int bit;
-        asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n));
+        asm("bsch %2,%0" : "=r"(bit) : "0"(0), "r"(n) : "cc");
        return bit;
 }
diff --git a/arch/mn10300/include/asm/div64.h b/arch/mn10300/include/asm/div64.h
index 3a8329b3e869..34dcb8e68309 100644
--- a/arch/mn10300/include/asm/div64.h
+++ b/arch/mn10300/include/asm/div64.h
@@ -72,6 +72,7 @@ unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div)
                                         * MDR = MDR:val%div */
            : "=r"(result)
            : "0"(val), "ir"(mult), "r"(div)
+            : "cc"
            );
        return result;
@@ -92,6 +93,7 @@ signed __muldiv64s(signed val, signed mult, signed div)
                                         * MDR = MDR:val%div */
            : "=r"(result)
            : "0"(val), "ir"(mult), "r"(div)
+            : "cc"
            );
        return result;
diff --git a/arch/mn10300/include/asm/system.h b/arch/mn10300/include/asm/system.h
index 8214fb7e7fe4..3636c054dcd5 100644
--- a/arch/mn10300/include/asm/system.h
+++ b/arch/mn10300/include/asm/system.h
@@ -143,6 +143,7 @@ do {									\
                "       mov     %0,epsw         \n"                     \
                : "=&d"(tmp)                                            \
                : "i"(~EPSW_IM), "r"(__mn10300_irq_enabled_epsw)        \
+                : "cc"                                                  \
                );                                                      \
 } while (0)
diff --git a/arch/mn10300/include/asm/tlbflush.h b/arch/mn10300/include/asm/tlbflush.h
index e0239865abcb..1a7e29281c5d 100644
--- a/arch/mn10300/include/asm/tlbflush.h
+++ b/arch/mn10300/include/asm/tlbflush.h
@@ -22,7 +22,7 @@ do {								\
                 "      mov %0,%1               \n"             \
                 : "=d"(w)                                      \
                 : "m"(MMUCTR), "i"(MMUCTR_IIV|MMUCTR_DIV)      \
-                 : "memory"                                     \
+                 : "cc", "memory"                               \
                 );                                             \
 } while (0)
diff --git a/arch/mn10300/include/asm/uaccess.h b/arch/mn10300/include/asm/uaccess.h
index 167e10ff06d9..197a7af3dd8a 100644
--- a/arch/mn10300/include/asm/uaccess.h
+++ b/arch/mn10300/include/asm/uaccess.h
@@ -316,7 +316,7 @@ do {									\
                        "       .previous\n"                            \
                        : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
                        : "0"(__from), "1"(__to), "2"(size)             \
-                        : "memory");                                    \
+                        : "cc", "memory");                              \
        }                                                               \
 } while (0)
@@ -352,7 +352,7 @@ do {									\
                        "       .previous\n"                            \
                        : "=a"(__from), "=a"(__to), "=r"(size), "=&r"(w)\
                        : "0"(__from), "1"(__to), "2"(size)             \
-                        : "memory");                                    \
+                        : "cc", "memory");                              \
        }                                                               \
 } while (0)
diff --git a/arch/mn10300/include/asm/unistd.h b/arch/mn10300/include/asm/unistd.h
index 2a983931c11f..c05acb95c2a9 100644
--- a/arch/mn10300/include/asm/unistd.h
+++ b/arch/mn10300/include/asm/unistd.h
@@ -348,10 +348,11 @@
 #define __NR_pwritev            335
 #define __NR_rt_tgsigqueueinfo  336
 #define __NR_perf_event_open    337
+#define __NR_recvmmsg           338
 #ifdef __KERNEL__
-#define NR_syscalls 338
+#define NR_syscalls 339
 /*
 * specify the deprecated syscalls we want to support on this arch
diff --git a/arch/mn10300/kernel/entry.S b/arch/mn10300/kernel/entry.S
index c9ee6c009d79..88e3e1c3cc21 100644
--- a/arch/mn10300/kernel/entry.S
+++ b/arch/mn10300/kernel/entry.S
@@ -724,6 +724,7 @@ ENTRY(sys_call_table)
        .long sys_pwritev               /* 335 */
        .long sys_rt_tgsigqueueinfo
        .long sys_perf_event_open
+        .long sys_recvmmsg
 nr_syscalls=(.-sys_call_table)/4
diff --git a/arch/mn10300/kernel/mn10300-serial.c b/arch/mn10300/kernel/mn10300-serial.c
index 229b710fc5d5..ef34d5a0f8bd 100644
--- a/arch/mn10300/kernel/mn10300-serial.c
+++ b/arch/mn10300/kernel/mn10300-serial.c
@@ -380,7 +380,8 @@ static int mask_test_and_clear(volatile u8 *ptr, u8 mask)
        u32 epsw;
        asm volatile("  bclr    %1,(%2)         \n"
                     "  mov     epsw,%0         \n"
-                     : "=d"(epsw) : "d"(mask), "a"(ptr));
+                     : "=d"(epsw) : "d"(mask), "a"(ptr)
+                     : "cc", "memory");
        return !(epsw & EPSW_FLAG_Z);
 }
diff --git a/arch/mn10300/kernel/signal.c b/arch/mn10300/kernel/signal.c
index a21f43bc68e2..717db14c2cc3 100644
--- a/arch/mn10300/kernel/signal.c
+++ b/arch/mn10300/kernel/signal.c
@@ -264,7 +264,7 @@ static inline void __user *get_sigframe(struct k_sigaction *ka,
        /* this is the X/Open sanctioned signal stack switching.  */
        if (ka->sa.sa_flags & SA_ONSTACK) {
-                if (!on_sig_stack(sp))
+                if (sas_ss_flags(sp) == 0)
                        sp = current->sas_ss_sp + current->sas_ss_size;
        }
diff --git a/arch/mn10300/lib/checksum.c b/arch/mn10300/lib/checksum.c
index 274f29ec33c1..b6580f5d89ee 100644
--- a/arch/mn10300/lib/checksum.c
+++ b/arch/mn10300/lib/checksum.c
@@ -22,6 +22,7 @@ static inline unsigned short from32to16(__wsum sum)
            "   addc    0xffff,%0       \n"
            : "=r" (sum)
            : "r" (sum << 16), "0" (sum & 0xffff0000)
+            : "cc"
            );
        return sum >> 16;
 }
diff --git a/arch/mn10300/lib/delay.c b/arch/mn10300/lib/delay.c
index cce66bc0822d..fdf6f710f94e 100644
--- a/arch/mn10300/lib/delay.c
+++ b/arch/mn10300/lib/delay.c
@@ -28,7 +28,8 @@ void __delay(unsigned long loops)
                "2:     add     -1,%0   \n"
                "       bne     2b      \n"
                : "=&d" (d0)
-                : "0" (loops));
+                : "0" (loops)
+                : "cc");
 }
 EXPORT_SYMBOL(__delay);
diff --git a/arch/mn10300/lib/usercopy.c b/arch/mn10300/lib/usercopy.c
index a75b203059c1..7826e6c364e7 100644
--- a/arch/mn10300/lib/usercopy.c
+++ b/arch/mn10300/lib/usercopy.c
@@ -62,7 +62,7 @@ do {								\
                "       .previous"                              \
                :"=&r"(res), "=r"(count), "=&r"(w)              \
                :"i"(-EFAULT), "1"(count), "a"(src), "a"(dst)   \
-                :"memory");                                     \
+                : "memory", "cc");                                      \
 } while (0)
 long
@@ -109,7 +109,7 @@ do {						\
                ".previous\n"                   \
                : "+r"(size), "=&r"(w)          \
                : "a"(addr), "d"(0)             \
-                : "memory");                    \
+                : "memory", "cc");              \
 } while (0)
 unsigned long
@@ -161,6 +161,6 @@ long strnlen_user(const char *s, long n)
                ".previous\n"
                :"=d"(res), "=&r"(w)
                :"0"(0), "a"(s), "r"(n)
-                :"memory");
+                : "memory", "cc");
        return res;
 }
diff --git a/arch/mn10300/mm/dma-alloc.c b/arch/mn10300/mm/dma-alloc.c
index f3649d8f50e3..ee82d624b3c6 100644
--- a/arch/mn10300/mm/dma-alloc.c
+++ b/arch/mn10300/mm/dma-alloc.c
@@ -16,12 +16,24 @@
 #include <linux/pci.h>
 #include <asm/io.h>
+static unsigned long pci_sram_allocated = 0xbc000000;
 void *dma_alloc_coherent(struct device *dev, size_t size,
                         dma_addr_t *dma_handle, int gfp)
 {
        unsigned long addr;
        void *ret;
+        printk("dma_alloc_coherent(%s,%zu,,%x)\n", dev_name(dev), size, gfp);
+        if (0xbe000000 - pci_sram_allocated >= size) {
+                size = (size + 255) & ~255;
+                addr = pci_sram_allocated;
+                pci_sram_allocated += size;
+                ret = (void *) addr;
+                goto done;
+        }
        /* ignore region specifiers */
        gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
@@ -41,7 +53,9 @@ void *dma_alloc_coherent(struct device *dev, size_t size,
        /* write back and evict all cache lines covering this region */
        mn10300_dcache_flush_inv_range2(virt_to_phys((void *) addr), PAGE_SIZE);
+done:
        *dma_handle = virt_to_bus((void *) addr);
+        printk("dma_alloc_coherent() = %p [%x]\n", ret, *dma_handle);
        return ret;
 }
 EXPORT_SYMBOL(dma_alloc_coherent);
@@ -51,6 +65,9 @@ void dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 {
        unsigned long addr = (unsigned long) vaddr & ~0x20000000;
+        if (addr >= 0x9c000000)
+                return;
        free_pages(addr, get_order(size));
 }
 EXPORT_SYMBOL(dma_free_coherent);
diff --git a/arch/mn10300/mm/init.c b/arch/mn10300/mm/init.c
index ec1420562dc7..dd27a9a35152 100644
--- a/arch/mn10300/mm/init.c
+++ b/arch/mn10300/mm/init.c
@@ -118,8 +118,7 @@ void __init mem_init(void)
               reservedpages << (PAGE_SHIFT - 10),
               datasize >> 10,
               initsize >> 10,
-               (unsigned long) (totalhigh_pages << (PAGE_SHIFT - 10))
+               totalhigh_pages << (PAGE_SHIFT - 10));
-               );
 }
 /*
diff --git a/arch/mn10300/mm/misalignment.c b/arch/mn10300/mm/misalignment.c
index 30016251f658..6dffbf97ac26 100644
--- a/arch/mn10300/mm/misalignment.c
+++ b/arch/mn10300/mm/misalignment.c
@@ -633,13 +633,13 @@ static int misalignment_addr(unsigned long *registers, unsigned long sp,
                        goto displace_or_inc;
                case SD24:
                        tmp = disp << 8;
-                        asm("asr 8,%0" : "=r"(tmp) : "0"(tmp));
+                        asm("asr 8,%0" : "=r"(tmp) : "0"(tmp) : "cc");
                        disp = (long) tmp;
                        goto displace_or_inc;
                case SIMM4_2:
                        tmp = opcode >> 4 & 0x0f;
                        tmp <<= 28;
-                        asm("asr 28,%0" : "=r"(tmp) : "0"(tmp));
+                        asm("asr 28,%0" : "=r"(tmp) : "0"(tmp) : "cc");
                        disp = (long) tmp;
                        goto displace_or_inc;
                case IMM8:
diff --git a/arch/mn10300/unit-asb2305/include/unit/serial.h b/arch/mn10300/unit-asb2305/include/unit/serial.h
index 3bfc90938787..8086cc092cec 100644
--- a/arch/mn10300/unit-asb2305/include/unit/serial.h
+++ b/arch/mn10300/unit-asb2305/include/unit/serial.h
@@ -11,7 +11,7 @@
 #ifndef _ASM_UNIT_SERIAL_H
 #define _ASM_UNIT_SERIAL_H
-#include <asm/cpu/cpu-regs.h>
+#include <asm/cpu-regs.h>
 #include <proc/irq.h>
 #include <linux/serial_reg.h>
diff --git a/arch/mn10300/unit-asb2305/include/unit/timex.h b/arch/mn10300/unit-asb2305/include/unit/timex.h
index a71c49aa85eb..d1c72d59fa9f 100644
--- a/arch/mn10300/unit-asb2305/include/unit/timex.h
+++ b/arch/mn10300/unit-asb2305/include/unit/timex.h
@@ -15,7 +15,7 @@
 #include <linux/irq.h>
 #endif /* __ASSEMBLY__ */
-#include <asm/cpu/timer-regs.h>
+#include <asm/timer-regs.h>
 #include <unit/clock.h>
 /*
diff --git a/arch/mn10300/unit-asb2305/leds.c b/arch/mn10300/unit-asb2305/leds.c
index d345ff9042d5..6f8de9954026 100644
--- a/arch/mn10300/unit-asb2305/leds.c
+++ b/arch/mn10300/unit-asb2305/leds.c
@@ -13,8 +13,8 @@
 #include <linux/init.h>
 #include <asm/io.h>
 #include <asm/processor.h>
-#include <asm/cpu/intctl-regs.h>
+#include <asm/intctl-regs.h>
-#include <asm/cpu/rtc-regs.h>
+#include <asm/rtc-regs.h>
 #include <unit/leds.h>
 static const u8 asb2305_led_hex_tbl[16] = {
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.c b/arch/mn10300/unit-asb2305/pci-asb2305.c
index d100ca788468..78cd134ddf7d 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.c
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.c
@@ -218,45 +218,6 @@ void __init pcibios_resource_survey(void)
        pcibios_allocate_resources(1);
 }
-int pcibios_enable_resources(struct pci_dev *dev, int mask)
-{
-        u16 cmd, old_cmd;
-        int idx;
-        struct resource *r;
-        pci_read_config_word(dev, PCI_COMMAND, &cmd);
-        old_cmd = cmd;
-        for (idx = 0; idx < 6; idx++) {
-                /* Only set up the requested stuff */
-                if (!(mask & (1 << idx)))
-                        continue;
-                r = &dev->resource[idx];
-                if (!r->start && r->end) {
-                        printk(KERN_ERR
-                               "PCI: Device %s not available because of"
-                               " resource collisions\n",
-                               pci_name(dev));
-                        return -EINVAL;
-                }
-                if (r->flags & IORESOURCE_IO)
-                        cmd |= PCI_COMMAND_IO;
-                if (r->flags & IORESOURCE_MEM)
-                        cmd |= PCI_COMMAND_MEMORY;
-        }
-        if (dev->resource[PCI_ROM_RESOURCE].start)
-                cmd |= PCI_COMMAND_MEMORY;
-        if (cmd != old_cmd)
-                pci_write_config_word(dev, PCI_COMMAND, cmd);
-        return 0;
-}
 /*
 *  If we set up a device for bus mastering, we need to check the latency
 *  timer as certain crappy BIOSes forget to set it properly.
diff --git a/arch/mn10300/unit-asb2305/pci-asb2305.h b/arch/mn10300/unit-asb2305/pci-asb2305.h
index 9763d1ce343a..c3fa294b6e28 100644
--- a/arch/mn10300/unit-asb2305/pci-asb2305.h
+++ b/arch/mn10300/unit-asb2305/pci-asb2305.h
@@ -34,7 +34,6 @@ extern unsigned int pci_probe;
 extern unsigned int pcibios_max_latency;
 extern void pcibios_resource_survey(void);
-extern int pcibios_enable_resources(struct pci_dev *dev, int mask);
 /* pci.c */
diff --git a/arch/mn10300/unit-asb2305/pci.c b/arch/mn10300/unit-asb2305/pci.c
index 07dbbcda3b2e..2cb7e75ba1c0 100644
--- a/arch/mn10300/unit-asb2305/pci.c
+++ b/arch/mn10300/unit-asb2305/pci.c
@@ -27,6 +27,29 @@ struct pci_bus *pci_root_bus;
 struct pci_ops *pci_root_ops;
 /*
+ * The accessible PCI window does not cover the entire CPU address space, but
+ * there are devices we want to access outside of that window, so we need to
+ * insert specific PCI bus resources instead of using the platform-level bus
+ * resources directly for the PCI root bus.
+ *
+ * These are configured and inserted by pcibios_init() and are attached to the
+ * root bus by pcibios_fixup_bus().
+ */
+static struct resource pci_ioport_resource = {
+        .name   = "PCI IO",
+        .start  = 0xbe000000,
+        .end    = 0xbe03ffff,
+        .flags  = IORESOURCE_IO,
+};
+static struct resource pci_iomem_resource = {
+        .name   = "PCI mem",
+        .start  = 0xb8000000,
+        .end    = 0xbbffffff,
+        .flags  = IORESOURCE_MEM,
+};
+/*
 * Functions for accessing PCI configuration space
 */
@@ -279,7 +302,7 @@ static int __init pci_sanity_check(struct pci_ops *o)
             (x == PCI_VENDOR_ID_INTEL || x == PCI_VENDOR_ID_COMPAQ)))
                return 1;
-        printk(KERN_ERROR "PCI: Sanity check failed\n");
+        printk(KERN_ERR "PCI: Sanity check failed\n");
        return 0;
 }
@@ -297,6 +320,7 @@ static int __init pci_check_direct(void)
                printk(KERN_INFO "PCI: Using configuration ampci\n");
                request_mem_region(0xBE040000, 256, "AMPCI bridge");
                request_mem_region(0xBFFFFFF4, 12, "PCI ampci");
+                request_mem_region(0xBC000000, 32 * 1024 * 1024, "PCI SRAM");
                return 0;
        }
@@ -358,6 +382,11 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
 {
        struct pci_dev *dev;
+        if (bus->number == 0) {
+                bus->resource[0] = &pci_ioport_resource;
+                bus->resource[1] = &pci_iomem_resource;
+        }
        if (bus->self) {
                pci_read_bridge_bases(bus);
                pcibios_fixup_device_resources(bus->self);
@@ -380,6 +409,11 @@ static int __init pcibios_init(void)
        iomem_resource.start    = 0xA0000000;
        iomem_resource.end      = 0xDFFFFFFF;
+        if (insert_resource(&iomem_resource, &pci_iomem_resource) < 0)
+                panic("Unable to insert PCI IOMEM resource\n");
+        if (insert_resource(&ioport_resource, &pci_ioport_resource) < 0)
+                panic("Unable to insert PCI IOPORT resource\n");
        if (!pci_probe)
                return 0;
@@ -391,32 +425,11 @@ static int __init pcibios_init(void)
        printk(KERN_INFO "PCI: Probing PCI hardware [mempage %08x]\n",
               MEM_PAGING_REG);
-        {
+        pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL);
-#if 0
-                static struct pci_bus am33_root_bus = {
-                        .children  = LIST_HEAD_INIT(am33_root_bus.children),
-                        .devices   = LIST_HEAD_INIT(am33_root_bus.devices),
-                        .number    = 0,
-                        .secondary = 0,
-                        .resource = { &ioport_resource, &iomem_resource },
-                };
-                am33_root_bus.ops = pci_root_ops;
-                list_add_tail(&am33_root_bus.node, &pci_root_buses);
-                am33_root_bus.subordinate = pci_do_scan_bus(0);
-                pci_root_bus = &am33_root_bus;
-#else
-                pci_root_bus = pci_scan_bus(0, &pci_direct_ampci, NULL);
-#endif
-        }
        pcibios_irq_init();
        pcibios_fixup_irqs();
-#if 0
        pcibios_resource_survey();
-#endif
        return 0;
 }
@@ -440,7 +453,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
 {
        int err;
-        err = pcibios_enable_resources(dev, mask);
+        err = pci_enable_resources(dev, mask);
        if (err == 0)
                pcibios_enable_irq(dev);
        return err;
@@ -455,6 +468,7 @@ static void __init unit_disable_pcnet(struct pci_bus *bus, struct pci_ops *o)
        bus->number = 0;
+        o->read (bus, PCI_DEVFN(2, 0), PCI_VENDOR_ID,           4, &x);
        o->read (bus, PCI_DEVFN(2, 0), PCI_COMMAND,             2, &x);
        x |= PCI_COMMAND_MASTER |
                PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
diff --git a/arch/mn10300/unit-asb2305/unit-init.c b/arch/mn10300/unit-asb2305/unit-init.c
index 1c452cc3f6e9..a76c8e0ab90f 100644
--- a/arch/mn10300/unit-asb2305/unit-init.c
+++ b/arch/mn10300/unit-asb2305/unit-init.c
@@ -15,9 +15,8 @@
 #include <asm/io.h>
 #include <asm/setup.h>
 #include <asm/processor.h>
-#include <asm/cpu/intctl-regs.h>
+#include <asm/intctl-regs.h>
-#include <asm/cpu/rtc-regs.h>
+#include <asm/serial-regs.h>
-#include <asm/cpu/serial-regs.h>
 #include <unit/serial.h>
 /*
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index bb2465bcb327..826a30a00f59 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -20,7 +20,7 @@
 all: $(obj)/zImage
 BOOTCFLAGS    := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
-                 -fno-strict-aliasing -Os -msoft-float -pipe \
+                 -fno-strict-aliasing -Os -msoft-float -pipe -D__KERNEL__\
                 -fomit-frame-pointer -fno-builtin -fPIC -nostdinc \
                 -isystem $(shell $(CROSS32CC) -print-file-name=include)
 BOOTAFLAGS      := -D__ASSEMBLY__ $(BOOTCFLAGS) -traditional -nostdinc
@@ -34,6 +34,8 @@ BOOTCFLAGS	+= -fno-stack-protector
 endif
 BOOTCFLAGS      += -I$(obj) -I$(srctree)/$(obj)
+BOOTCFLAGS      += -include include/linux/autoconf.h -Iarch/powerpc/include
+BOOTCFLAGS      += -Iinclude
 DTS_FLAGS       ?= -p 1024
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c
index 8c15b2c85d5a..dfaf458d6702 100644
--- a/arch/score/mm/init.c
+++ b/arch/score/mm/init.c
@@ -106,7 +106,7 @@ void __init mem_init(void)
                        ram << (PAGE_SHIFT-10), codesize >> 10,
                        reservedpages << (PAGE_SHIFT-10), datasize >> 10,
                        initsize >> 10,
-                        (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
+                        totalhigh_pages << (PAGE_SHIFT-10));
 }
 #endif /* !CONFIG_NEED_MULTIPLE_NODES */
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 55298e891571..cbcbfdee3ee0 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -49,6 +49,7 @@ config X86
        select HAVE_KERNEL_GZIP
        select HAVE_KERNEL_BZIP2
        select HAVE_KERNEL_LZMA
+        select HAVE_KERNEL_LZO
        select HAVE_HW_BREAKPOINT
        select PERF_EVENTS
        select ANON_INODES
@@ -1246,6 +1247,11 @@ config ARCH_MEMORY_PROBE
        def_bool X86_64
        depends on MEMORY_HOTPLUG
+config ILLEGAL_POINTER_VALUE
+       hex
+       default 0 if X86_32
+       default 0xdead000000000000 if X86_64
 source "mm/Kconfig"
 config HIGHPTE
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index f25bbd37765a..fbb47daf2459 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -4,7 +4,7 @@
 # create a compressed vmlinux image from the original vmlinux
 #
-targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma head_$(BITS).o misc.o piggy.o
+targets := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma vmlinux.bin.lzo head_$(BITS).o misc.o piggy.o
 KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
 KBUILD_CFLAGS += -fno-strict-aliasing -fPIC
@@ -49,10 +49,13 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
        $(call if_changed,bzip2)
 $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
        $(call if_changed,lzma)
+$(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y) FORCE
+        $(call if_changed,lzo)
 suffix-$(CONFIG_KERNEL_GZIP)    := gz
 suffix-$(CONFIG_KERNEL_BZIP2)   := bz2
 suffix-$(CONFIG_KERNEL_LZMA)    := lzma
+suffix-$(CONFIG_KERNEL_LZO)     := lzo
 quiet_cmd_mkpiggy = MKPIGGY $@
      cmd_mkpiggy = $(obj)/mkpiggy $< > $@ || ( rm -f $@ ; false )
diff --git a/arch/x86/boot/compressed/misc.c b/arch/x86/boot/compressed/misc.c
index 842b2a36174a..3b22fe8ab91b 100644
--- a/arch/x86/boot/compressed/misc.c
+++ b/arch/x86/boot/compressed/misc.c
@@ -162,6 +162,10 @@ static int lines, cols;
 #include "../../../../lib/decompress_unlzma.c"
 #endif
+#ifdef CONFIG_KERNEL_LZO
+#include "../../../../lib/decompress_unlzo.c"
+#endif
 static void scroll(void)
 {
        int i;
diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index c973f8e2a6cf..9a0c258a86be 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -892,8 +892,7 @@ void __init mem_init(void)
                reservedpages << (PAGE_SHIFT-10),
                datasize >> 10,
                initsize >> 10,
-                (unsigned long) (totalhigh_pages << (PAGE_SHIFT-10))
+                totalhigh_pages << (PAGE_SHIFT-10));
-               );
        printk(KERN_INFO "virtual kernel memory layout:\n"
                "    fixmap  : 0x%08lx - 0x%08lx   (%4ld kB)\n"
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 48adf80926a0..a5142bddef41 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -446,8 +446,8 @@ EXPORT_SYMBOL_GPL(dpm_resume_noirq);
 /**
 * legacy_resume - Execute a legacy (bus or class) resume callback for device.
- * dev: Device to resume.
+ * @dev: Device to resume.
- * cb: Resume callback to execute.
+ * @cb: Resume callback to execute.
 */
 static int legacy_resume(struct device *dev, int (*cb)(struct device *dev))
 {
@@ -711,8 +711,9 @@ EXPORT_SYMBOL_GPL(dpm_suspend_noirq);
 /**
 * legacy_suspend - Execute a legacy (bus or class) suspend callback for device.
- * dev: Device to suspend.
+ * @dev: Device to suspend.
- * cb: Suspend callback to execute.
+ * @state: PM transition of the system being carried out.
+ * @cb: Suspend callback to execute.
 */
 static int legacy_suspend(struct device *dev, pm_message_t state,
                          int (*cb)(struct device *dev, pm_message_t state))
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c
index a56ca080e108..c3ab46da51a3 100644
--- a/drivers/char/agp/backend.c
+++ b/drivers/char/agp/backend.c
@@ -285,18 +285,22 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
 {
        int error;
-        if (agp_off)
+        if (agp_off) {
-                return -ENODEV;
+                error = -ENODEV;
+                goto err_put_bridge;
+        }
        if (!bridge->dev) {
                printk (KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
-                return -EINVAL;
+                error = -EINVAL;
+                goto err_put_bridge;
        }
        /* Grab reference on the chipset driver. */
        if (!try_module_get(bridge->driver->owner)) {
                dev_info(&bridge->dev->dev, "can't lock chipset driver\n");
-                return -EINVAL;
+                error = -EINVAL;
+                goto err_put_bridge;
        }
        error = agp_backend_initialize(bridge);
@@ -326,6 +330,7 @@ frontend_err:
        agp_backend_cleanup(bridge);
 err_out:
        module_put(bridge->driver->owner);
+err_put_bridge:
        agp_put_bridge(bridge);
        return error;
 }
diff --git a/drivers/char/agp/hp-agp.c b/drivers/char/agp/hp-agp.c
index 9047b2714653..58752b70efea 100644
--- a/drivers/char/agp/hp-agp.c
+++ b/drivers/char/agp/hp-agp.c
@@ -488,9 +488,8 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
        handle = obj;
        do {
                status = acpi_get_object_info(handle, &info);
-                if (ACPI_SUCCESS(status)) {
+                if (ACPI_SUCCESS(status) && (info->valid & ACPI_VALID_HID)) {
                        /* TBD check _CID also */
-                        info->hardware_id.string[sizeof(info->hardware_id.length)-1] = '\0';
                        match = (strcmp(info->hardware_id.string, "HWP0001") == 0);
                        kfree(info);
                        if (match) {
@@ -509,6 +508,9 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
                handle = parent;
        } while (ACPI_SUCCESS(status));
+        if (ACPI_FAILURE(status))
+                return AE_OK;   /* found no enclosing IOC */
        if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa))
                return AE_OK;
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 68104434ebb5..73655aeb3a60 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -18,6 +18,7 @@
 #include <linux/hrtimer.h>
 #include <linux/tick.h>
 #include <linux/sched.h>
+#include <linux/math64.h>
 #define BUCKETS 12
 #define RESOLUTION 1024
@@ -169,6 +170,12 @@ static DEFINE_PER_CPU(struct menu_device, menu_devices);
 static void menu_update(struct cpuidle_device *dev);
+/* This implements DIV_ROUND_CLOSEST but avoids 64 bit division */
+static u64 div_round64(u64 dividend, u32 divisor)
+{
+        return div_u64(dividend + (divisor / 2), divisor);
+}
 /**
 * menu_select - selects the next idle state to enter
 * @dev: the CPU
@@ -209,9 +216,8 @@ static int menu_select(struct cpuidle_device *dev)
                data->correction_factor[data->bucket] = RESOLUTION * DECAY;
        /* Make sure to round up for half microseconds */
-        data->predicted_us = DIV_ROUND_CLOSEST(
+        data->predicted_us = div_round64(data->expected_us * data->correction_factor[data->bucket],
-                data->expected_us * data->correction_factor[data->bucket],
+                                         RESOLUTION * DECAY);
-                RESOLUTION * DECAY);
        /*
         * We want to default to C1 (hlt), not to busy polling
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a019b49ecc9b..1f1d88ae68d6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -172,6 +172,15 @@ config GPIO_ADP5520
          To compile this driver as a module, choose M here: the module will
          be called adp5520-gpio.
+config GPIO_ADP5588
+        tristate "ADP5588 I2C GPIO expander"
+        depends on I2C
+        help
+          This option enables support for 18 GPIOs found
+          on Analog Devices ADP5588 GPIO Expanders.
+          To compile this driver as a module, choose M here: the module will be
+          called adp5588-gpio.
 comment "PCI GPIO expanders:"
 config GPIO_CS5535
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 52fe4cf734c7..48687238edb1 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -5,6 +5,7 @@ ccflags-$(CONFIG_DEBUG_GPIO)	+= -DDEBUG
 obj-$(CONFIG_GPIOLIB)           += gpiolib.o
 obj-$(CONFIG_GPIO_ADP5520)      += adp5520-gpio.o
+obj-$(CONFIG_GPIO_ADP5588)      += adp5588-gpio.o
 obj-$(CONFIG_GPIO_LANGWELL)     += langwell_gpio.o
 obj-$(CONFIG_GPIO_MAX7301)      += max7301.o
 obj-$(CONFIG_GPIO_MAX732X)      += max732x.o
diff --git a/drivers/gpio/adp5588-gpio.c b/drivers/gpio/adp5588-gpio.c
new file mode 100644
index 000000000000..afc097a16b33
--- /dev/null
+++ b/drivers/gpio/adp5588-gpio.c
@@ -0,0 +1,266 @@
+/*
+ * GPIO Chip driver for Analog Devices
+ * ADP5588 I/O Expander and QWERTY Keypad Controller
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+#include <linux/i2c/adp5588.h>
+#define DRV_NAME                "adp5588-gpio"
+#define MAXGPIO                 18
+#define ADP_BANK(offs)          ((offs) >> 3)
+#define ADP_BIT(offs)           (1u << ((offs) & 0x7))
+struct adp5588_gpio {
+        struct i2c_client *client;
+        struct gpio_chip gpio_chip;
+        struct mutex lock;      /* protect cached dir, dat_out */
+        unsigned gpio_start;
+        uint8_t dat_out[3];
+        uint8_t dir[3];
+};
+static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
+{
+        int ret = i2c_smbus_read_byte_data(client, reg);
+        if (ret < 0)
+                dev_err(&client->dev, "Read Error\n");
+        return ret;
+}
+static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
+{
+        int ret = i2c_smbus_write_byte_data(client, reg, val);
+        if (ret < 0)
+                dev_err(&client->dev, "Write Error\n");
+        return ret;
+}
+static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
+{
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+        return !!(adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + ADP_BANK(off))
+                  & ADP_BIT(off));
+}
+static void adp5588_gpio_set_value(struct gpio_chip *chip,
+                                   unsigned off, int val)
+{
+        unsigned bank, bit;
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+        bank = ADP_BANK(off);
+        bit = ADP_BIT(off);
+        mutex_lock(&dev->lock);
+        if (val)
+                dev->dat_out[bank] |= bit;
+        else
+                dev->dat_out[bank] &= ~bit;
+        adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
+                           dev->dat_out[bank]);
+        mutex_unlock(&dev->lock);
+}
+static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
+{
+        int ret;
+        unsigned bank;
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+        bank = ADP_BANK(off);
+        mutex_lock(&dev->lock);
+        dev->dir[bank] &= ~ADP_BIT(off);
+        ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
+        mutex_unlock(&dev->lock);
+        return ret;
+}
+static int adp5588_gpio_direction_output(struct gpio_chip *chip,
+                                         unsigned off, int val)
+{
+        int ret;
+        unsigned bank, bit;
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+        bank = ADP_BANK(off);
+        bit = ADP_BIT(off);
+        mutex_lock(&dev->lock);
+        dev->dir[bank] |= bit;
+        if (val)
+                dev->dat_out[bank] |= bit;
+        else
+                dev->dat_out[bank] &= ~bit;
+        ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
+                                 dev->dat_out[bank]);
+        ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
+                                 dev->dir[bank]);
+        mutex_unlock(&dev->lock);
+        return ret;
+}
+static int __devinit adp5588_gpio_probe(struct i2c_client *client,
+                                        const struct i2c_device_id *id)
+{
+        struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
+        struct adp5588_gpio *dev;
+        struct gpio_chip *gc;
+        int ret, i, revid;
+        if (pdata == NULL) {
+                dev_err(&client->dev, "missing platform data\n");
+                return -ENODEV;
+        }
+        if (!i2c_check_functionality(client->adapter,
+                                        I2C_FUNC_SMBUS_BYTE_DATA)) {
+                dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
+                return -EIO;
+        }
+        dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+        if (dev == NULL) {
+                dev_err(&client->dev, "failed to alloc memory\n");
+                return -ENOMEM;
+        }
+        dev->client = client;
+        gc = &dev->gpio_chip;
+        gc->direction_input = adp5588_gpio_direction_input;
+        gc->direction_output = adp5588_gpio_direction_output;
+        gc->get = adp5588_gpio_get_value;
+        gc->set = adp5588_gpio_set_value;
+        gc->can_sleep = 1;
+        gc->base = pdata->gpio_start;
+        gc->ngpio = MAXGPIO;
+        gc->label = client->name;
+        gc->owner = THIS_MODULE;
+        mutex_init(&dev->lock);
+        ret = adp5588_gpio_read(dev->client, DEV_ID);
+        if (ret < 0)
+                goto err;
+        revid = ret & ADP5588_DEVICE_ID_MASK;
+        for (i = 0, ret = 0; i <= ADP_BANK(MAXGPIO); i++) {
+                dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
+                dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
+                ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
+                ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
+                                (pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
+                if (ret)
+                        goto err;
+        }
+        ret = gpiochip_add(&dev->gpio_chip);
+        if (ret)
+                goto err;
+        dev_info(&client->dev, "gpios %d..%d on a %s Rev. %d\n",
+                        gc->base, gc->base + gc->ngpio - 1,
+                        client->name, revid);
+        if (pdata->setup) {
+                ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
+                if (ret < 0)
+                        dev_warn(&client->dev, "setup failed, %d\n", ret);
+        }
+        i2c_set_clientdata(client, dev);
+        return 0;
+err:
+        kfree(dev);
+        return ret;
+}
+static int __devexit adp5588_gpio_remove(struct i2c_client *client)
+{
+        struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
+        struct adp5588_gpio *dev = i2c_get_clientdata(client);
+        int ret;
+        if (pdata->teardown) {
+                ret = pdata->teardown(client,
+                                      dev->gpio_chip.base, dev->gpio_chip.ngpio,
+                                      pdata->context);
+                if (ret < 0) {
+                        dev_err(&client->dev, "teardown failed %d\n", ret);
+                        return ret;
+                }
+        }
+        ret = gpiochip_remove(&dev->gpio_chip);
+        if (ret) {
+                dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
+                return ret;
+        }
+        kfree(dev);
+        return 0;
+}
+static const struct i2c_device_id adp5588_gpio_id[] = {
+        {DRV_NAME, 0},
+        {}
+};
+MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
+static struct i2c_driver adp5588_gpio_driver = {
+        .driver = {
+                   .name = DRV_NAME,
+                   },
+        .probe = adp5588_gpio_probe,
+        .remove = __devexit_p(adp5588_gpio_remove),
+        .id_table = adp5588_gpio_id,
+};
+static int __init adp5588_gpio_init(void)
+{
+        return i2c_add_driver(&adp5588_gpio_driver);
+}
+module_init(adp5588_gpio_init);
+static void __exit adp5588_gpio_exit(void)
+{
+        i2c_del_driver(&adp5588_gpio_driver);
+}
+module_exit(adp5588_gpio_exit);
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("GPIO ADP5588 Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index a25ad284a272..350842ad3632 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -858,8 +858,6 @@ int gpio_sysfs_set_active_low(unsigned gpio, int value)
        desc = &gpio_desc[gpio];
        if (test_bit(FLAG_EXPORT, &desc->flags)) {
-                struct device *dev;
                dev = class_find_device(&gpio_class, NULL, desc, match_export);
                if (dev == NULL) {
                        status = -ENODEV;
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 5124401f266a..d91fb8c0b7b3 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -158,6 +158,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
        { DRM_MODE_CONNECTOR_HDMIA, "HDMI Type A", 0 },
        { DRM_MODE_CONNECTOR_HDMIB, "HDMI Type B", 0 },
        { DRM_MODE_CONNECTOR_TV, "TV", 0 },
+        { DRM_MODE_CONNECTOR_eDP, "Embedded DisplayPort", 0 },
 };
 static struct drm_prop_enum_list drm_encoder_enum_list[] =
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 4231d6db72ec..077313f0d47f 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -216,7 +216,7 @@ bool drm_helper_crtc_in_use(struct drm_crtc *crtc)
 EXPORT_SYMBOL(drm_helper_crtc_in_use);
 /**
- * drm_disable_unused_functions - disable unused objects
+ * drm_helper_disable_unused_functions - disable unused objects
 * @dev: DRM device
 *
 * LOCKING:
@@ -1032,7 +1032,7 @@ bool drm_helper_initial_config(struct drm_device *dev)
        /*
         * we shouldn't end up with no modes here.
         */
-        WARN(!count, "No connectors reported connected with modes\n");
+        printk(KERN_INFO "No connectors reported conncted with modes\n");
        drm_setup_crtcs(dev);
@@ -1162,6 +1162,9 @@ EXPORT_SYMBOL(drm_helper_mode_fill_fb_struct);
 int drm_helper_resume_force_mode(struct drm_device *dev)
 {
        struct drm_crtc *crtc;
+        struct drm_encoder *encoder;
+        struct drm_encoder_helper_funcs *encoder_funcs;
+        struct drm_crtc_helper_funcs *crtc_funcs;
        int ret;
        list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -1174,6 +1177,25 @@ int drm_helper_resume_force_mode(struct drm_device *dev)
                if (ret == false)
                        DRM_ERROR("failed to set mode on crtc %p\n", crtc);
+                /* Turn off outputs that were already powered off */
+                if (drm_helper_choose_crtc_dpms(crtc)) {
+                        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                                if(encoder->crtc != crtc)
+                                        continue;
+                                encoder_funcs = encoder->helper_private;
+                                if (encoder_funcs->dpms)
+                                        (*encoder_funcs->dpms) (encoder,
+                                                                drm_helper_choose_encoder_dpms(encoder));
+                                crtc_funcs = crtc->helper_private;
+                                if (crtc_funcs->dpms)
+                                        (*crtc_funcs->dpms) (crtc,
+                                                             drm_helper_choose_crtc_dpms(crtc));
+                        }
+                }
        }
        /* disable the unused connectors while restoring the modesetting */
        drm_helper_disable_unused_functions(dev);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 100ee48760b7..1c2b7d44ec05 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -606,11 +606,10 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
                return -EINVAL;
        /* Need to resize the fb object !!! */
-        if (var->xres > fb->width || var->yres > fb->height) {
+        if (var->bits_per_pixel > fb->bits_per_pixel || var->xres > fb->width || var->yres > fb->height) {
-                DRM_ERROR("Requested width/height is greater than current fb "
+                DRM_DEBUG("fb userspace requested width/height/bpp is greater than current fb "
-                           "object %dx%d > %dx%d\n", var->xres, var->yres,
+                          "object %dx%d-%d > %dx%d-%d\n", var->xres, var->yres, var->bits_per_pixel,
-                           fb->width, fb->height);
+                          fb->width, fb->height, fb->bits_per_pixel);
-                DRM_ERROR("Need resizing code.\n");
                return -EINVAL;
        }
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index 7998ee66b317..b98384dbd9a7 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -115,6 +115,7 @@ void drm_vblank_cleanup(struct drm_device *dev)
        dev->num_crtcs = 0;
 }
+EXPORT_SYMBOL(drm_vblank_cleanup);
 int drm_vblank_init(struct drm_device *dev, int num_crtcs)
 {
@@ -163,7 +164,6 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
        }
        dev->vblank_disable_allowed = 0;
        return 0;
 err:
@@ -493,6 +493,9 @@ EXPORT_SYMBOL(drm_vblank_off);
 */
 void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
 {
+        /* vblank is not initialized (IRQ not installed ?) */
+        if (!dev->num_crtcs)
+                return;
        /*
         * To avoid all the problems that might happen if interrupts
         * were enabled/disabled around or between these calls, we just
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 2ffffd7ae09a..be631cc3e4dc 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -464,6 +464,8 @@ static struct drm_driver driver = {
        .lastclose = i915_driver_lastclose,
        .preclose = i915_driver_preclose,
        .postclose = i915_driver_postclose,
+        .suspend = i915_suspend,
+        .resume = i915_resume,
        .device_is_agp = i915_driver_device_is_agp,
        .enable_vblank = i915_enable_vblank,
        .disable_vblank = i915_disable_vblank,
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index b1bc1ea182b8..1175429da102 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -30,12 +30,11 @@ config DRM_NOUVEAU_DEBUG
          via debugfs.
 menu "I2C encoder or helper chips"
-     depends on DRM && I2C
+     depends on DRM && DRM_KMS_HELPER && I2C
 config DRM_I2C_CH7006
        tristate "Chrontel ch7006 TV encoder"
-        depends on DRM_NOUVEAU
+        default m if DRM_NOUVEAU
-        default m
        help
          Support for Chrontel ch7006 and similar TV encoders, found
          on some nVidia video cards.
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 0cad6d834eb2..e342a418d434 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -33,10 +33,13 @@
 #include "nouveau_drv.h"
 #include "nouveau_dma.h"
+#include <linux/log2.h>
 static void
 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 {
        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct drm_device *dev = dev_priv->dev;
        struct nouveau_bo *nvbo = nouveau_bo(bo);
        ttm_bo_kunmap(&nvbo->kmap);
@@ -44,12 +47,87 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
        if (unlikely(nvbo->gem))
                DRM_ERROR("bo %p still attached to GEM object\n", bo);
+        if (nvbo->tile)
+                nv10_mem_expire_tiling(dev, nvbo->tile, NULL);
        spin_lock(&dev_priv->ttm.bo_list_lock);
        list_del(&nvbo->head);
        spin_unlock(&dev_priv->ttm.bo_list_lock);
        kfree(nvbo);
 }
+static void
+nouveau_bo_fixup_align(struct drm_device *dev,
+                       uint32_t tile_mode, uint32_t tile_flags,
+                       int *align, int *size)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        /*
+         * Some of the tile_flags have a periodic structure of N*4096 bytes,
+         * align to to that as well as the page size. Overallocate memory to
+         * avoid corruption of other buffer objects.
+         */
+        if (dev_priv->card_type == NV_50) {
+                uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15;
+                int i;
+                switch (tile_flags) {
+                case 0x1800:
+                case 0x2800:
+                case 0x4800:
+                case 0x7a00:
+                        *size = roundup(*size, block_size);
+                        if (is_power_of_2(block_size)) {
+                                *size += 3 * block_size;
+                                for (i = 1; i < 10; i++) {
+                                        *align = 12 * i * block_size;
+                                        if (!(*align % 65536))
+                                                break;
+                                }
+                        } else {
+                                *size += 6 * block_size;
+                                for (i = 1; i < 10; i++) {
+                                        *align = 8 * i * block_size;
+                                        if (!(*align % 65536))
+                                                break;
+                                }
+                        }
+                        break;
+                default:
+                        break;
+                }
+        } else {
+                if (tile_mode) {
+                        if (dev_priv->chipset >= 0x40) {
+                                *align = 65536;
+                                *size = roundup(*size, 64 * tile_mode);
+                        } else if (dev_priv->chipset >= 0x30) {
+                                *align = 32768;
+                                *size = roundup(*size, 64 * tile_mode);
+                        } else if (dev_priv->chipset >= 0x20) {
+                                *align = 16384;
+                                *size = roundup(*size, 64 * tile_mode);
+                        } else if (dev_priv->chipset >= 0x10) {
+                                *align = 16384;
+                                *size = roundup(*size, 32 * tile_mode);
+                        }
+                }
+        }
+        /* ALIGN works only on powers of two. */
+        *size = roundup(*size, PAGE_SIZE);
+        if (dev_priv->card_type == NV_50) {
+                *size = roundup(*size, 65536);
+                *align = max(65536, *align);
+        }
+}
 int
 nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
               int size, int align, uint32_t flags, uint32_t tile_mode,
@@ -58,7 +136,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;
        struct nouveau_bo *nvbo;
-        int ret, n = 0;
+        int ret = 0;
        nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
        if (!nvbo)
@@ -70,59 +148,14 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
        nvbo->tile_mode = tile_mode;
        nvbo->tile_flags = tile_flags;
-        /*
+        nouveau_bo_fixup_align(dev, tile_mode, tile_flags, &align, &size);
-         * Some of the tile_flags have a periodic structure of N*4096 bytes,
-         * align to to that as well as the page size. Overallocate memory to
-         * avoid corruption of other buffer objects.
-         */
-        switch (tile_flags) {
-        case 0x1800:
-        case 0x2800:
-        case 0x4800:
-        case 0x7a00:
-                if (dev_priv->chipset >= 0xA0) {
-                        /* This is based on high end cards with 448 bits
-                         * memory bus, could be different elsewhere.*/
-                        size += 6 * 28672;
-                        /* 8 * 28672 is the actual alignment requirement,
-                         * but we must also align to page size. */
-                        align = 2 * 8 * 28672;
-                } else if (dev_priv->chipset >= 0x90) {
-                        size += 3 * 16384;
-                        align = 12 * 16834;
-                } else {
-                        size += 3 * 8192;
-                        /* 12 * 8192 is the actual alignment requirement,
-                         * but we must also align to page size. */
-                        align = 2 * 12 * 8192;
-                }
-                break;
-        default:
-                break;
-        }
        align >>= PAGE_SHIFT;
-        size = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
-        if (dev_priv->card_type == NV_50) {
-                size = (size + 65535) & ~65535;
-                if (align < (65536 / PAGE_SIZE))
-                        align = (65536 / PAGE_SIZE);
-        }
-        if (flags & TTM_PL_FLAG_VRAM)
-                nvbo->placements[n++] = TTM_PL_FLAG_VRAM | TTM_PL_MASK_CACHING;
-        if (flags & TTM_PL_FLAG_TT)
-                nvbo->placements[n++] = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
        nvbo->placement.fpfn = 0;
        nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0;
-        nvbo->placement.placement = nvbo->placements;
+        nouveau_bo_placement_set(nvbo, flags);
-        nvbo->placement.busy_placement = nvbo->placements;
-        nvbo->placement.num_placement = n;
-        nvbo->placement.num_busy_placement = n;
        nvbo->channel = chan;
-        nouveau_bo_placement_set(nvbo, flags);
        ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
                          ttm_bo_type_device, &nvbo->placement, align, 0,
                          false, NULL, size, nouveau_bo_del_ttm);
@@ -421,6 +454,7 @@ nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 /* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
 * TTM_PL_{VRAM,TT} directly.
 */
 static int
 nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
                              struct nouveau_bo *nvbo, bool evict, bool no_wait,
@@ -455,11 +489,12 @@ nouveau_bo_mem_ctxdma(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
 }
 static int
-nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, int no_wait,
+nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
-                     struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
+                     int no_wait, struct ttm_mem_reg *new_mem)
 {
        struct nouveau_bo *nvbo = nouveau_bo(bo);
        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct ttm_mem_reg *old_mem = &bo->mem;
        struct nouveau_channel *chan;
        uint64_t src_offset, dst_offset;
        uint32_t page_count;
@@ -547,7 +582,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
        placement.fpfn = placement.lpfn = 0;
        placement.num_placement = placement.num_busy_placement = 1;
-        placement.placement = &placement_memtype;
+        placement.placement = placement.busy_placement = &placement_memtype;
        tmp_mem = *new_mem;
        tmp_mem.mm_node = NULL;
@@ -559,7 +594,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
        if (ret)
                goto out;
-        ret = nouveau_bo_move_m2mf(bo, true, no_wait, &bo->mem, &tmp_mem);
+        ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait, &tmp_mem);
        if (ret)
                goto out;
@@ -585,7 +620,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
        placement.fpfn = placement.lpfn = 0;
        placement.num_placement = placement.num_busy_placement = 1;
-        placement.placement = &placement_memtype;
+        placement.placement = placement.busy_placement = &placement_memtype;
        tmp_mem = *new_mem;
        tmp_mem.mm_node = NULL;
@@ -597,7 +632,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
        if (ret)
                goto out;
-        ret = nouveau_bo_move_m2mf(bo, true, no_wait, &bo->mem, new_mem);
+        ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
        if (ret)
                goto out;
@@ -612,52 +647,106 @@ out:
 }
 static int
-nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
+nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
-                bool no_wait, struct ttm_mem_reg *new_mem)
+                   struct nouveau_tile_reg **new_tile)
 {
        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
-        struct nouveau_bo *nvbo = nouveau_bo(bo);
        struct drm_device *dev = dev_priv->dev;
-        struct ttm_mem_reg *old_mem = &bo->mem;
+        struct nouveau_bo *nvbo = nouveau_bo(bo);
+        uint64_t offset;
        int ret;
-        if (dev_priv->card_type == NV_50 && new_mem->mem_type == TTM_PL_VRAM &&
+        if (nvbo->no_vm || new_mem->mem_type != TTM_PL_VRAM) {
-            !nvbo->no_vm) {
+                /* Nothing to do. */
-                uint64_t offset = new_mem->mm_node->start << PAGE_SHIFT;
+                *new_tile = NULL;
+                return 0;
+        }
+        offset = new_mem->mm_node->start << PAGE_SHIFT;
+        if (dev_priv->card_type == NV_50) {
                ret = nv50_mem_vm_bind_linear(dev,
                                              offset + dev_priv->vm_vram_base,
                                              new_mem->size, nvbo->tile_flags,
                                              offset);
                if (ret)
                        return ret;
+        } else if (dev_priv->card_type >= NV_10) {
+                *new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
+                                                nvbo->tile_mode);
        }
+        return 0;
+}
+static void
+nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
+                      struct nouveau_tile_reg *new_tile,
+                      struct nouveau_tile_reg **old_tile)
+{
+        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct drm_device *dev = dev_priv->dev;
+        if (dev_priv->card_type >= NV_10 &&
+            dev_priv->card_type < NV_50) {
+                if (*old_tile)
+                        nv10_mem_expire_tiling(dev, *old_tile, bo->sync_obj);
+                *old_tile = new_tile;
+        }
+}
+static int
+nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
+                bool no_wait, struct ttm_mem_reg *new_mem)
+{
+        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct nouveau_bo *nvbo = nouveau_bo(bo);
+        struct ttm_mem_reg *old_mem = &bo->mem;
+        struct nouveau_tile_reg *new_tile = NULL;
+        int ret = 0;
+        ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
+        if (ret)
+                return ret;
+        /* Software copy if the card isn't up and running yet. */
        if (dev_priv->init_state != NOUVEAU_CARD_INIT_DONE ||
-            !dev_priv->channel)
+            !dev_priv->channel) {
-                return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+                ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+                goto out;
+        }
+        /* Fake bo copy. */
        if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
                BUG_ON(bo->mem.mm_node != NULL);
                bo->mem = *new_mem;
                new_mem->mm_node = NULL;
-                return 0;
+                goto out;
        }
-        if (new_mem->mem_type == TTM_PL_SYSTEM) {
+        /* Hardware assisted copy. */
-                if (old_mem->mem_type == TTM_PL_SYSTEM)
+        if (new_mem->mem_type == TTM_PL_SYSTEM)
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+                ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem);
-                if (nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem))
+        else if (old_mem->mem_type == TTM_PL_SYSTEM)
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+                ret = nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem);
-        } else if (old_mem->mem_type == TTM_PL_SYSTEM) {
+        else
-                if (nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem))
+                ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
-        } else {
-                if (nouveau_bo_move_m2mf(bo, evict, no_wait, old_mem, new_mem))
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
-        }
-        return 0;
+        if (!ret)
+                goto out;
+        /* Fallback to software copy. */
+        ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+out:
+        if (ret)
+                nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
+        else
+                nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
+        return ret;
 }
 static int
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 9aaa972f8822..343d718a9667 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -158,6 +158,8 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
                return ret;
        }
+        nouveau_dma_pre_init(chan);
        /* Locate channel's user control regs */
        if (dev_priv->card_type < NV_40)
                user = NV03_USER(channel);
@@ -235,47 +237,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
        return 0;
 }
-int
-nouveau_channel_idle(struct nouveau_channel *chan)
-{
-        struct drm_device *dev = chan->dev;
-        struct drm_nouveau_private *dev_priv = dev->dev_private;
-        struct nouveau_engine *engine = &dev_priv->engine;
-        uint32_t caches;
-        int idle;
-        if (!chan) {
-                NV_ERROR(dev, "no channel...\n");
-                return 1;
-        }
-        caches = nv_rd32(dev, NV03_PFIFO_CACHES);
-        nv_wr32(dev, NV03_PFIFO_CACHES, caches & ~1);
-        if (engine->fifo.channel_id(dev) != chan->id) {
-                struct nouveau_gpuobj *ramfc =
-                        chan->ramfc ? chan->ramfc->gpuobj : NULL;
-                if (!ramfc) {
-                        NV_ERROR(dev, "No RAMFC for channel %d\n", chan->id);
-                        return 1;
-                }
-                engine->instmem.prepare_access(dev, false);
-                if (nv_ro32(dev, ramfc, 0) != nv_ro32(dev, ramfc, 1))
-                        idle = 0;
-                else
-                        idle = 1;
-                engine->instmem.finish_access(dev);
-        } else {
-                idle = (nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET) ==
-                        nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
-        }
-        nv_wr32(dev, NV03_PFIFO_CACHES, caches);
-        return idle;
-}
 /* stops a fifo */
 void
 nouveau_channel_free(struct nouveau_channel *chan)
@@ -414,7 +375,9 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
                init->subchan[0].grclass = 0x0039;
        else
                init->subchan[0].grclass = 0x5039;
-        init->nr_subchan = 1;
+        init->subchan[1].handle = NvSw;
+        init->subchan[1].grclass = NV_SW;
+        init->nr_subchan = 2;
        /* Named memory object area */
        ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index 703553687b20..7afbe8b40d51 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -29,12 +29,22 @@
 #include "nouveau_drv.h"
 #include "nouveau_dma.h"
+void
+nouveau_dma_pre_init(struct nouveau_channel *chan)
+{
+        chan->dma.max  = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
+        chan->dma.put  = 0;
+        chan->dma.cur  = chan->dma.put;
+        chan->dma.free = chan->dma.max - chan->dma.cur;
+}
 int
 nouveau_dma_init(struct nouveau_channel *chan)
 {
        struct drm_device *dev = chan->dev;
        struct drm_nouveau_private *dev_priv = dev->dev_private;
        struct nouveau_gpuobj *m2mf = NULL;
+        struct nouveau_gpuobj *nvsw = NULL;
        int ret, i;
        /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
@@ -47,6 +57,15 @@ nouveau_dma_init(struct nouveau_channel *chan)
        if (ret)
                return ret;
+        /* Create an NV_SW object for various sync purposes */
+        ret = nouveau_gpuobj_sw_new(chan, NV_SW, &nvsw);
+        if (ret)
+                return ret;
+        ret = nouveau_gpuobj_ref_add(dev, chan, NvSw, nvsw, NULL);
+        if (ret)
+                return ret;
        /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
        ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy);
        if (ret)
@@ -64,12 +83,6 @@ nouveau_dma_init(struct nouveau_channel *chan)
                        return ret;
        }
-        /* Initialise DMA vars */
-        chan->dma.max  = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
-        chan->dma.put  = 0;
-        chan->dma.cur  = chan->dma.put;
-        chan->dma.free = chan->dma.max - chan->dma.cur;
        /* Insert NOPS for NOUVEAU_DMA_SKIPS */
        ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
        if (ret)
@@ -87,6 +100,13 @@ nouveau_dma_init(struct nouveau_channel *chan)
        BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
        OUT_RING(chan, NvNotify0);
+        /* Initialise NV_SW */
+        ret = RING_SPACE(chan, 2);
+        if (ret)
+                return ret;
+        BEGIN_RING(chan, NvSubSw, 0, 1);
+        OUT_RING(chan, NvSw);
        /* Sit back and pray the channel works.. */
        FIRE_RING(chan);
@@ -113,7 +133,7 @@ READ_GET(struct nouveau_channel *chan, uint32_t *get)
        val = nvchan_rd32(chan, chan->user_get);
        if (val < chan->pushbuf_base ||
-            val >= chan->pushbuf_base + chan->pushbuf_bo->bo.mem.size) {
+            val > chan->pushbuf_base + (chan->dma.max << 2)) {
                /* meaningless to dma_wait() except to know whether the
                 * GPU has stalled or not
                 */
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h
index 04e85d8f757e..dabfd655f93e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -46,10 +46,11 @@
 /* Hardcoded object assignments to subchannels (subchannel id). */
 enum {
        NvSubM2MF       = 0,
-        NvSub2D         = 1,
+        NvSubSw         = 1,
-        NvSubCtxSurf2D  = 1,
+        NvSub2D         = 2,
-        NvSubGdiRect    = 2,
+        NvSubCtxSurf2D  = 2,
-        NvSubImageBlit  = 3
+        NvSubGdiRect    = 3,
+        NvSubImageBlit  = 4
 };
 /* Object handles. */
@@ -67,6 +68,7 @@ enum {
        NvClipRect      = 0x8000000b,
        NvGdiRect       = 0x8000000c,
        NvImageBlit     = 0x8000000d,
+        NvSw            = 0x8000000e,
        /* G80+ display objects */
        NvEvoVRAM       = 0x01000000,
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 5f8cbb79c499..026419fe8791 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -59,11 +59,19 @@ struct nouveau_grctx;
 #define MAX_NUM_DCB_ENTRIES 16
 #define NOUVEAU_MAX_CHANNEL_NR 128
+#define NOUVEAU_MAX_TILE_NR 15
 #define NV50_VM_MAX_VRAM (2*1024*1024*1024ULL)
 #define NV50_VM_BLOCK    (512*1024*1024ULL)
 #define NV50_VM_VRAM_NR  (NV50_VM_MAX_VRAM / NV50_VM_BLOCK)
+struct nouveau_tile_reg {
+        struct nouveau_fence *fence;
+        uint32_t addr;
+        uint32_t size;
+        bool used;
+};
 struct nouveau_bo {
        struct ttm_buffer_object bo;
        struct ttm_placement placement;
@@ -83,6 +91,7 @@ struct nouveau_bo {
        uint32_t tile_mode;
        uint32_t tile_flags;
+        struct nouveau_tile_reg *tile;
        struct drm_gem_object *gem;
        struct drm_file *cpu_filp;
@@ -277,8 +286,13 @@ struct nouveau_timer_engine {
 };
 struct nouveau_fb_engine {
+        int num_tiles;
        int  (*init)(struct drm_device *dev);
        void (*takedown)(struct drm_device *dev);
+        void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
+                                 uint32_t size, uint32_t pitch);
 };
 struct nouveau_fifo_engine {
@@ -292,6 +306,8 @@ struct nouveau_fifo_engine {
        void (*disable)(struct drm_device *);
        void (*enable)(struct drm_device *);
        bool (*reassign)(struct drm_device *, bool enable);
+        bool (*cache_flush)(struct drm_device *dev);
+        bool (*cache_pull)(struct drm_device *dev, bool enable);
        int  (*channel_id)(struct drm_device *);
@@ -330,6 +346,9 @@ struct nouveau_pgraph_engine {
        void (*destroy_context)(struct nouveau_channel *);
        int  (*load_context)(struct nouveau_channel *);
        int  (*unload_context)(struct drm_device *);
+        void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
+                                  uint32_t size, uint32_t pitch);
 };
 struct nouveau_engine {
@@ -548,6 +567,12 @@ struct drm_nouveau_private {
                unsigned long sg_handle;
        } gart_info;
+        /* nv10-nv40 tiling regions */
+        struct {
+                struct nouveau_tile_reg reg[NOUVEAU_MAX_TILE_NR];
+                spinlock_t lock;
+        } tile;
        /* G8x/G9x virtual address space */
        uint64_t vm_gart_base;
        uint64_t vm_gart_size;
@@ -685,6 +710,13 @@ extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
 extern int  nouveau_mem_init(struct drm_device *);
 extern int  nouveau_mem_init_agp(struct drm_device *);
 extern void nouveau_mem_close(struct drm_device *);
+extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev,
+                                                    uint32_t addr,
+                                                    uint32_t size,
+                                                    uint32_t pitch);
+extern void nv10_mem_expire_tiling(struct drm_device *dev,
+                                   struct nouveau_tile_reg *tile,
+                                   struct nouveau_fence *fence);
 extern int  nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt,
                                    uint32_t size, uint32_t flags,
                                    uint64_t phys);
@@ -713,7 +745,6 @@ extern int  nouveau_channel_alloc(struct drm_device *dev,
                                  struct drm_file *file_priv,
                                  uint32_t fb_ctxdma, uint32_t tt_ctxdma);
 extern void nouveau_channel_free(struct nouveau_channel *);
-extern int  nouveau_channel_idle(struct nouveau_channel *chan);
 /* nouveau_object.c */
 extern int  nouveau_gpuobj_early_init(struct drm_device *);
@@ -756,6 +787,8 @@ extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
                                       uint32_t *o_ret);
 extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
                                 struct nouveau_gpuobj **);
+extern int nouveau_gpuobj_sw_new(struct nouveau_channel *, int class,
+                                 struct nouveau_gpuobj **);
 extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
                                     struct drm_file *);
 extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
@@ -804,6 +837,7 @@ nouveau_debugfs_channel_fini(struct nouveau_channel *chan)
 #endif
 /* nouveau_dma.c */
+extern void nouveau_dma_pre_init(struct nouveau_channel *);
 extern int  nouveau_dma_init(struct nouveau_channel *);
 extern int  nouveau_dma_wait(struct nouveau_channel *, int size);
@@ -879,16 +913,22 @@ extern void nv04_fb_takedown(struct drm_device *);
 /* nv10_fb.c */
 extern int  nv10_fb_init(struct drm_device *);
 extern void nv10_fb_takedown(struct drm_device *);
+extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t,
+                                      uint32_t, uint32_t);
 /* nv40_fb.c */
 extern int  nv40_fb_init(struct drm_device *);
 extern void nv40_fb_takedown(struct drm_device *);
+extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t,
+                                      uint32_t, uint32_t);
 /* nv04_fifo.c */
 extern int  nv04_fifo_init(struct drm_device *);
 extern void nv04_fifo_disable(struct drm_device *);
 extern void nv04_fifo_enable(struct drm_device *);
 extern bool nv04_fifo_reassign(struct drm_device *, bool);
+extern bool nv04_fifo_cache_flush(struct drm_device *);
+extern bool nv04_fifo_cache_pull(struct drm_device *, bool);
 extern int  nv04_fifo_channel_id(struct drm_device *);
 extern int  nv04_fifo_create_context(struct nouveau_channel *);
 extern void nv04_fifo_destroy_context(struct nouveau_channel *);
@@ -941,6 +981,8 @@ extern void nv10_graph_destroy_context(struct nouveau_channel *);
 extern int  nv10_graph_load_context(struct nouveau_channel *);
 extern int  nv10_graph_unload_context(struct drm_device *);
 extern void nv10_graph_context_switch(struct drm_device *);
+extern void nv10_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+                                         uint32_t, uint32_t);
 /* nv20_graph.c */
 extern struct nouveau_pgraph_object_class nv20_graph_grclass[];
@@ -952,6 +994,8 @@ extern int  nv20_graph_unload_context(struct drm_device *);
 extern int  nv20_graph_init(struct drm_device *);
 extern void nv20_graph_takedown(struct drm_device *);
 extern int  nv30_graph_init(struct drm_device *);
+extern void nv20_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+                                         uint32_t, uint32_t);
 /* nv40_graph.c */
 extern struct nouveau_pgraph_object_class nv40_graph_grclass[];
@@ -963,6 +1007,8 @@ extern void nv40_graph_destroy_context(struct nouveau_channel *);
 extern int  nv40_graph_load_context(struct nouveau_channel *);
 extern int  nv40_graph_unload_context(struct drm_device *);
 extern void nv40_grctx_init(struct nouveau_grctx *);
+extern void nv40_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+                                         uint32_t, uint32_t);
 /* nv50_graph.c */
 extern struct nouveau_pgraph_object_class nv50_graph_grclass[];
@@ -1030,8 +1076,7 @@ extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
 /* nv04_dac.c */
 extern int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry);
-extern enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
+extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
-                                                 struct drm_connector *connector);
 extern int nv04_dac_output_offset(struct drm_encoder *encoder);
 extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
@@ -1049,9 +1094,6 @@ extern int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry);
 /* nv17_tv.c */
 extern int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry);
-extern enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
-                                                struct drm_connector *connector,
-                                                uint32_t pin_mask);
 /* nv04_display.c */
 extern int nv04_display_create(struct drm_device *);
@@ -1290,14 +1332,14 @@ nv_two_reg_pll(struct drm_device *dev)
        return false;
 }
-#define NV50_NVSW                                                    0x0000506e
+#define NV_SW                                                        0x0000506e
-#define NV50_NVSW_DMA_SEMAPHORE                                      0x00000060
+#define NV_SW_DMA_SEMAPHORE                                          0x00000060
-#define NV50_NVSW_SEMAPHORE_OFFSET                                   0x00000064
+#define NV_SW_SEMAPHORE_OFFSET                                       0x00000064
-#define NV50_NVSW_SEMAPHORE_ACQUIRE                                  0x00000068
+#define NV_SW_SEMAPHORE_ACQUIRE                                      0x00000068
-#define NV50_NVSW_SEMAPHORE_RELEASE                                  0x0000006c
+#define NV_SW_SEMAPHORE_RELEASE                                      0x0000006c
-#define NV50_NVSW_DMA_VBLSEM                                         0x0000018c
+#define NV_SW_DMA_VBLSEM                                             0x0000018c
-#define NV50_NVSW_VBLSEM_OFFSET                                      0x00000400
+#define NV_SW_VBLSEM_OFFSET                                          0x00000400
-#define NV50_NVSW_VBLSEM_RELEASE_VALUE                               0x00000404
+#define NV_SW_VBLSEM_RELEASE_VALUE                                   0x00000404
-#define NV50_NVSW_VBLSEM_RELEASE                                     0x00000408
+#define NV_SW_VBLSEM_RELEASE                                         0x00000408
 #endif /* __NOUVEAU_DRV_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 84af25c238b6..0b05c869e0e7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -64,8 +64,7 @@ nouveau_fbcon_sync(struct fb_info *info)
                return 0;
        if (RING_SPACE(chan, 4)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
                return 0;
        }
@@ -86,8 +85,7 @@ nouveau_fbcon_sync(struct fb_info *info)
        }
        if (ret) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
                return 0;
        }
@@ -212,11 +210,11 @@ nouveau_fbcon_create(struct drm_device *dev, uint32_t fb_width,
        mode_cmd.bpp = surface_bpp;
        mode_cmd.pitch = mode_cmd.width * (mode_cmd.bpp >> 3);
-        mode_cmd.pitch = ALIGN(mode_cmd.pitch, 256);
+        mode_cmd.pitch = roundup(mode_cmd.pitch, 256);
        mode_cmd.depth = surface_depth;
        size = mode_cmd.pitch * mode_cmd.height;
-        size = ALIGN(size, PAGE_SIZE);
+        size = roundup(size, PAGE_SIZE);
        ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
                              0, 0x0000, false, true, &nvbo);
@@ -380,3 +378,12 @@ nouveau_fbcon_remove(struct drm_device *dev, struct drm_framebuffer *fb)
        return 0;
 }
+void nouveau_fbcon_gpu_lockup(struct fb_info *info)
+{
+        struct nouveau_fbcon_par *par = info->par;
+        struct drm_device *dev = par->dev;
+        NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+        info->flags |= FBINFO_HWACCEL_DISABLED;
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.h b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
index 8531140fedbc..462e0b87b4bd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -43,5 +43,6 @@ void nouveau_fbcon_zfill(struct drm_device *dev);
 int nv04_fbcon_accel_init(struct fb_info *info);
 int nv50_fbcon_accel_init(struct fb_info *info);
+void nouveau_fbcon_gpu_lockup(struct fb_info *info);
 #endif /* __NV50_FBCON_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index dacac9a0842a..faddf53ff9ed 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -142,7 +142,7 @@ nouveau_fence_emit(struct nouveau_fence *fence)
        list_add_tail(&fence->entry, &chan->fence.pending);
        spin_unlock_irqrestore(&chan->fence.lock, flags);
-        BEGIN_RING(chan, NvSubM2MF, USE_REFCNT ? 0x0050 : 0x0150, 1);
+        BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1);
        OUT_RING(chan, fence->sequence);
        FIRE_RING(chan);
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 18fd8ac9fca7..2009db2426c3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -220,7 +220,6 @@ nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
 }
 struct validate_op {
-        struct nouveau_fence *fence;
        struct list_head vram_list;
        struct list_head gart_list;
        struct list_head both_list;
@@ -252,17 +251,11 @@ validate_fini_list(struct list_head *list, struct nouveau_fence *fence)
 }
 static void
-validate_fini(struct validate_op *op, bool success)
+validate_fini(struct validate_op *op, struct nouveau_fence* fence)
 {
-        struct nouveau_fence *fence = op->fence;
+        validate_fini_list(&op->vram_list, fence);
+        validate_fini_list(&op->gart_list, fence);
-        if (unlikely(!success))
+        validate_fini_list(&op->both_list, fence);
-                op->fence = NULL;
-        validate_fini_list(&op->vram_list, op->fence);
-        validate_fini_list(&op->gart_list, op->fence);
-        validate_fini_list(&op->both_list, op->fence);
-        nouveau_fence_unref((void *)&fence);
 }
 static int
@@ -420,10 +413,6 @@ nouveau_gem_pushbuf_validate(struct nouveau_channel *chan,
        INIT_LIST_HEAD(&op->gart_list);
        INIT_LIST_HEAD(&op->both_list);
-        ret = nouveau_fence_new(chan, &op->fence, false);
-        if (ret)
-                return ret;
        if (nr_buffers == 0)
                return 0;
@@ -541,6 +530,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
        struct drm_nouveau_gem_pushbuf_bo *bo = NULL;
        struct nouveau_channel *chan;
        struct validate_op op;
+        struct nouveau_fence* fence = 0;
        uint32_t *pushbuf = NULL;
        int ret = 0, do_reloc = 0, i;
@@ -597,7 +587,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
        OUT_RINGp(chan, pushbuf, req->nr_dwords);
-        ret = nouveau_fence_emit(op.fence);
+        ret = nouveau_fence_new(chan, &fence, true);
        if (ret) {
                NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
                WIND_RING(chan);
@@ -605,7 +595,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
        }
        if (nouveau_gem_pushbuf_sync(chan)) {
-                ret = nouveau_fence_wait(op.fence, NULL, false, false);
+                ret = nouveau_fence_wait(fence, NULL, false, false);
                if (ret) {
                        for (i = 0; i < req->nr_dwords; i++)
                                NV_ERROR(dev, "0x%08x\n", pushbuf[i]);
@@ -614,7 +604,8 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
        }
 out:
-        validate_fini(&op, ret == 0);
+        validate_fini(&op, fence);
+        nouveau_fence_unref((void**)&fence);
        mutex_unlock(&dev->struct_mutex);
        kfree(pushbuf);
        kfree(bo);
@@ -634,6 +625,7 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
        struct drm_gem_object *gem;
        struct nouveau_bo *pbbo;
        struct validate_op op;
+        struct nouveau_fence* fence = 0;
        int i, ret = 0, do_reloc = 0;
        NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
@@ -772,7 +764,7 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
                        OUT_RING(chan, 0);
        }
-        ret = nouveau_fence_emit(op.fence);
+        ret = nouveau_fence_new(chan, &fence, true);
        if (ret) {
                NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
                WIND_RING(chan);
@@ -780,7 +772,8 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
        }
 out:
-        validate_fini(&op, ret == 0);
+        validate_fini(&op, fence);
+        nouveau_fence_unref((void**)&fence);
        mutex_unlock(&dev->struct_mutex);
        kfree(bo);
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index 370c72c968d1..919a619ca7fa 100644
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -635,6 +635,7 @@ nv50_pgraph_irq_handler(struct drm_device *dev)
                if ((nv_rd32(dev, 0x400500) & isb) != isb)
                        nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) | isb);
+                nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) & ~(1 << 31));
        }
        nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 5158a12f7844..fb9bdd6edf1f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -192,6 +192,92 @@ void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
 }
 /*
+ * NV10-NV40 tiling helpers
+ */
+static void
+nv10_mem_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                           uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+        struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
+        tile->addr = addr;
+        tile->size = size;
+        tile->used = !!pitch;
+        nouveau_fence_unref((void **)&tile->fence);
+        if (!pfifo->cache_flush(dev))
+                return;
+        pfifo->reassign(dev, false);
+        pfifo->cache_flush(dev);
+        pfifo->cache_pull(dev, false);
+        nouveau_wait_for_idle(dev);
+        pgraph->set_region_tiling(dev, i, addr, size, pitch);
+        pfb->set_region_tiling(dev, i, addr, size, pitch);
+        pfifo->cache_pull(dev, true);
+        pfifo->reassign(dev, true);
+}
+struct nouveau_tile_reg *
+nv10_mem_set_tiling(struct drm_device *dev, uint32_t addr, uint32_t size,
+                    uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        struct nouveau_tile_reg *tile = dev_priv->tile.reg, *found = NULL;
+        int i;
+        spin_lock(&dev_priv->tile.lock);
+        for (i = 0; i < pfb->num_tiles; i++) {
+                if (tile[i].used)
+                        /* Tile region in use. */
+                        continue;
+                if (tile[i].fence &&
+                    !nouveau_fence_signalled(tile[i].fence, NULL))
+                        /* Pending tile region. */
+                        continue;
+                if (max(tile[i].addr, addr) <
+                    min(tile[i].addr + tile[i].size, addr + size))
+                        /* Kill an intersecting tile region. */
+                        nv10_mem_set_region_tiling(dev, i, 0, 0, 0);
+                if (pitch && !found) {
+                        /* Free tile region. */
+                        nv10_mem_set_region_tiling(dev, i, addr, size, pitch);
+                        found = &tile[i];
+                }
+        }
+        spin_unlock(&dev_priv->tile.lock);
+        return found;
+}
+void
+nv10_mem_expire_tiling(struct drm_device *dev, struct nouveau_tile_reg *tile,
+                       struct nouveau_fence *fence)
+{
+        if (fence) {
+                /* Mark it as pending. */
+                tile->fence = fence;
+                nouveau_fence_ref(fence);
+        }
+        tile->used = false;
+}
+/*
 * NV50 VM helpers
 */
 int
@@ -513,6 +599,7 @@ nouveau_mem_init(struct drm_device *dev)
        INIT_LIST_HEAD(&dev_priv->ttm.bo_list);
        spin_lock_init(&dev_priv->ttm.bo_list_lock);
+        spin_lock_init(&dev_priv->tile.lock);
        dev_priv->fb_available_size = nouveau_mem_fb_amount(dev);
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index 93379bb81bea..6c2cf81716df 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -881,7 +881,7 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
        return 0;
 }
-static int
+int
 nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,
                      struct nouveau_gpuobj **gpuobj_ret)
 {
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h
index fa1b0e7165b9..251f1b3b38b9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_reg.h
+++ b/drivers/gpu/drm/nouveau/nouveau_reg.h
@@ -349,19 +349,19 @@
 #define NV04_PGRAPH_BLEND                                  0x00400824
 #define NV04_PGRAPH_STORED_FMT                             0x00400830
 #define NV04_PGRAPH_PATT_COLORRAM                          0x00400900
-#define NV40_PGRAPH_TILE0(i)                               (0x00400900 + (i*16))
+#define NV20_PGRAPH_TILE(i)                                (0x00400900 + (i*16))
-#define NV40_PGRAPH_TLIMIT0(i)                             (0x00400904 + (i*16))
+#define NV20_PGRAPH_TLIMIT(i)                              (0x00400904 + (i*16))
-#define NV40_PGRAPH_TSIZE0(i)                              (0x00400908 + (i*16))
+#define NV20_PGRAPH_TSIZE(i)                               (0x00400908 + (i*16))
-#define NV40_PGRAPH_TSTATUS0(i)                            (0x0040090C + (i*16))
+#define NV20_PGRAPH_TSTATUS(i)                             (0x0040090C + (i*16))
 #define NV10_PGRAPH_TILE(i)                                (0x00400B00 + (i*16))
 #define NV10_PGRAPH_TLIMIT(i)                              (0x00400B04 + (i*16))
 #define NV10_PGRAPH_TSIZE(i)                               (0x00400B08 + (i*16))
 #define NV10_PGRAPH_TSTATUS(i)                             (0x00400B0C + (i*16))
 #define NV04_PGRAPH_U_RAM                                  0x00400D00
-#define NV47_PGRAPH_TILE0(i)                               (0x00400D00 + (i*16))
+#define NV47_PGRAPH_TILE(i)                                (0x00400D00 + (i*16))
-#define NV47_PGRAPH_TLIMIT0(i)                             (0x00400D04 + (i*16))
+#define NV47_PGRAPH_TLIMIT(i)                              (0x00400D04 + (i*16))
-#define NV47_PGRAPH_TSIZE0(i)                              (0x00400D08 + (i*16))
+#define NV47_PGRAPH_TSIZE(i)                               (0x00400D08 + (i*16))
-#define NV47_PGRAPH_TSTATUS0(i)                            (0x00400D0C + (i*16))
+#define NV47_PGRAPH_TSTATUS(i)                             (0x00400D0C + (i*16))
 #define NV04_PGRAPH_V_RAM                                  0x00400D40
 #define NV04_PGRAPH_W_RAM                                  0x00400D80
 #define NV10_PGRAPH_COMBINER0_IN_ALPHA                     0x00400E40
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index e76ec2d207a9..09b9a46dfc0e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -76,6 +76,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->fifo.disable            = nv04_fifo_disable;
                engine->fifo.enable             = nv04_fifo_enable;
                engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                engine->fifo.channel_id         = nv04_fifo_channel_id;
                engine->fifo.create_context     = nv04_fifo_create_context;
                engine->fifo.destroy_context    = nv04_fifo_destroy_context;
@@ -100,6 +102,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->timer.takedown          = nv04_timer_takedown;
                engine->fb.init                 = nv10_fb_init;
                engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                engine->graph.grclass           = nv10_graph_grclass;
                engine->graph.init              = nv10_graph_init;
                engine->graph.takedown          = nv10_graph_takedown;
@@ -109,12 +112,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->graph.fifo_access       = nv04_graph_fifo_access;
                engine->graph.load_context      = nv10_graph_load_context;
                engine->graph.unload_context    = nv10_graph_unload_context;
+                engine->graph.set_region_tiling = nv10_graph_set_region_tiling;
                engine->fifo.channels           = 32;
                engine->fifo.init               = nv10_fifo_init;
                engine->fifo.takedown           = nouveau_stub_takedown;
                engine->fifo.disable            = nv04_fifo_disable;
                engine->fifo.enable             = nv04_fifo_enable;
                engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                engine->fifo.channel_id         = nv10_fifo_channel_id;
                engine->fifo.create_context     = nv10_fifo_create_context;
                engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -139,6 +145,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->timer.takedown          = nv04_timer_takedown;
                engine->fb.init                 = nv10_fb_init;
                engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                engine->graph.grclass           = nv20_graph_grclass;
                engine->graph.init              = nv20_graph_init;
                engine->graph.takedown          = nv20_graph_takedown;
@@ -148,12 +155,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->graph.fifo_access       = nv04_graph_fifo_access;
                engine->graph.load_context      = nv20_graph_load_context;
                engine->graph.unload_context    = nv20_graph_unload_context;
+                engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
                engine->fifo.channels           = 32;
                engine->fifo.init               = nv10_fifo_init;
                engine->fifo.takedown           = nouveau_stub_takedown;
                engine->fifo.disable            = nv04_fifo_disable;
                engine->fifo.enable             = nv04_fifo_enable;
                engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                engine->fifo.channel_id         = nv10_fifo_channel_id;
                engine->fifo.create_context     = nv10_fifo_create_context;
                engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -178,6 +188,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->timer.takedown          = nv04_timer_takedown;
                engine->fb.init                 = nv10_fb_init;
                engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                engine->graph.grclass           = nv30_graph_grclass;
                engine->graph.init              = nv30_graph_init;
                engine->graph.takedown          = nv20_graph_takedown;
@@ -187,12 +198,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->graph.destroy_context   = nv20_graph_destroy_context;
                engine->graph.load_context      = nv20_graph_load_context;
                engine->graph.unload_context    = nv20_graph_unload_context;
+                engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
                engine->fifo.channels           = 32;
                engine->fifo.init               = nv10_fifo_init;
                engine->fifo.takedown           = nouveau_stub_takedown;
                engine->fifo.disable            = nv04_fifo_disable;
                engine->fifo.enable             = nv04_fifo_enable;
                engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                engine->fifo.channel_id         = nv10_fifo_channel_id;
                engine->fifo.create_context     = nv10_fifo_create_context;
                engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -218,6 +232,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->timer.takedown          = nv04_timer_takedown;
                engine->fb.init                 = nv40_fb_init;
                engine->fb.takedown             = nv40_fb_takedown;
+                engine->fb.set_region_tiling    = nv40_fb_set_region_tiling;
                engine->graph.grclass           = nv40_graph_grclass;
                engine->graph.init              = nv40_graph_init;
                engine->graph.takedown          = nv40_graph_takedown;
@@ -227,12 +242,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                engine->graph.destroy_context   = nv40_graph_destroy_context;
                engine->graph.load_context      = nv40_graph_load_context;
                engine->graph.unload_context    = nv40_graph_unload_context;
+                engine->graph.set_region_tiling = nv40_graph_set_region_tiling;
                engine->fifo.channels           = 32;
                engine->fifo.init               = nv40_fifo_init;
                engine->fifo.takedown           = nouveau_stub_takedown;
                engine->fifo.disable            = nv04_fifo_disable;
                engine->fifo.enable             = nv04_fifo_enable;
                engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                engine->fifo.channel_id         = nv10_fifo_channel_id;
                engine->fifo.create_context     = nv40_fifo_create_context;
                engine->fifo.destroy_context    = nv40_fifo_destroy_context;
@@ -624,7 +642,10 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
                dev_priv->chipset = (reg0 & 0xff00000) >> 20;
        /* NV04 or NV05 */
        } else if ((reg0 & 0xff00fff0) == 0x20004000) {
-                dev_priv->chipset = 0x04;
+                if (reg0 & 0x00f00000)
+                        dev_priv->chipset = 0x05;
+                else
+                        dev_priv->chipset = 0x04;
        } else
                dev_priv->chipset = 0xff;
@@ -704,8 +725,8 @@ static void nouveau_close(struct drm_device *dev)
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;
-        /* In the case of an error dev_priv may not be be allocated yet */
+        /* In the case of an error dev_priv may not be allocated yet */
-        if (dev_priv && dev_priv->card_type)
+        if (dev_priv)
                nouveau_card_takedown(dev);
 }
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index 187eb84e4da5..c385d50f041b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -28,45 +28,17 @@
 #include "nouveau_drv.h"
-static struct vm_operations_struct nouveau_ttm_vm_ops;
-static const struct vm_operations_struct *ttm_vm_ops;
-static int
-nouveau_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
-        struct ttm_buffer_object *bo = vma->vm_private_data;
-        int ret;
-        if (unlikely(bo == NULL))
-                return VM_FAULT_NOPAGE;
-        ret = ttm_vm_ops->fault(vma, vmf);
-        return ret;
-}
 int
 nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
 {
        struct drm_file *file_priv = filp->private_data;
        struct drm_nouveau_private *dev_priv =
                file_priv->minor->dev->dev_private;
-        int ret;
        if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
                return drm_mmap(filp, vma);
-        ret = ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev);
+        return ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev);
-        if (unlikely(ret != 0))
-                return ret;
-        if (unlikely(ttm_vm_ops == NULL)) {
-                ttm_vm_ops = vma->vm_ops;
-                nouveau_ttm_vm_ops = *ttm_vm_ops;
-                nouveau_ttm_vm_ops.fault = &nouveau_ttm_fault;
-        }
-        vma->vm_ops = &nouveau_ttm_vm_ops;
-        return 0;
 }
 static int
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index d9f32879ba38..d0e038d28948 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -212,16 +212,15 @@ out:
        return connector_status_disconnected;
 }
-enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
+uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
-                                          struct drm_connector *connector)
 {
        struct drm_device *dev = encoder->dev;
        struct drm_nouveau_private *dev_priv = dev->dev_private;
        struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
-        uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
+        uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
        uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
                saved_rtest_ctrl, saved_gpio0, saved_gpio1, temp, routput;
-        int head, present = 0;
+        int head;
 #define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
        if (dcb->type == OUTPUT_TV) {
@@ -287,13 +286,7 @@ enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
                      temp | NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED);
        msleep(5);
-        temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
+        sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
-        if (dcb->type == OUTPUT_TV)
-                present = (nv17_tv_detect(encoder, connector, temp)
-                           == connector_status_connected);
-        else
-                present = temp & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI;
        temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
        NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
@@ -310,15 +303,25 @@ enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
        nv17_gpio_set(dev, DCB_GPIO_TVDAC1, saved_gpio1);
        nv17_gpio_set(dev, DCB_GPIO_TVDAC0, saved_gpio0);
-        if (present) {
+        return sample;
-                NV_INFO(dev, "Load detected on output %c\n", '@' + ffs(dcb->or));
+}
+static enum drm_connector_status
+nv17_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+        uint32_t sample = nv17_dac_sample_load(encoder);
+        if (sample & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) {
+                NV_INFO(dev, "Load detected on output %c\n",
+                        '@' + ffs(dcb->or));
                return connector_status_connected;
+        } else {
+                return connector_status_disconnected;
        }
-        return connector_status_disconnected;
 }
 static bool nv04_dac_mode_fixup(struct drm_encoder *encoder,
                                struct drm_display_mode *mode,
                                struct drm_display_mode *adjusted_mode)
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 09a31071ee58..d910873c1368 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -39,8 +39,7 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
                return;
        if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 4)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
        }
        if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -62,14 +61,12 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
        struct drm_device *dev = par->dev;
        struct drm_nouveau_private *dev_priv = dev->dev_private;
        struct nouveau_channel *chan = dev_priv->channel;
-        uint32_t color = ((uint32_t *) info->pseudo_palette)[rect->color];
        if (info->state != FBINFO_STATE_RUNNING)
                return;
        if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 7)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
        }
        if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -80,7 +77,11 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
        BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);
        OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
        BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1);
-        OUT_RING(chan, color);
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+                OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
+        else
+                OUT_RING(chan, rect->color);
        BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2);
        OUT_RING(chan, (rect->dx << 16) | rect->dy);
        OUT_RING(chan, (rect->width << 16) | rect->height);
@@ -109,8 +110,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
        }
        if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 8)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
        }
        if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -144,8 +144,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
                int iter_len = dsize > 128 ? 128 : dsize;
                if (RING_SPACE(chan, iter_len + 1)) {
-                        NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                        nouveau_fbcon_gpu_lockup(info);
-                        info->flags |= FBINFO_HWACCEL_DISABLED;
                        cfb_imageblit(info, image);
                        return;
                }
@@ -184,6 +183,7 @@ nv04_fbcon_accel_init(struct fb_info *info)
        struct drm_device *dev = par->dev;
        struct drm_nouveau_private *dev_priv = dev->dev_private;
        struct nouveau_channel *chan = dev_priv->channel;
+        const int sub = NvSubCtxSurf2D;
        int surface_fmt, pattern_fmt, rect_fmt;
        int ret;
@@ -242,30 +242,29 @@ nv04_fbcon_accel_init(struct fb_info *info)
                return ret;
        if (RING_SPACE(chan, 49)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
                return 0;
        }
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
        OUT_RING(chan, NvCtxSurf2D);
-        BEGIN_RING(chan, 1, 0x0184, 2);
+        BEGIN_RING(chan, sub, 0x0184, 2);
        OUT_RING(chan, NvDmaFB);
        OUT_RING(chan, NvDmaFB);
-        BEGIN_RING(chan, 1, 0x0300, 4);
+        BEGIN_RING(chan, sub, 0x0300, 4);
        OUT_RING(chan, surface_fmt);
        OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
        OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
        OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
        OUT_RING(chan, NvRop);
-        BEGIN_RING(chan, 1, 0x0300, 1);
+        BEGIN_RING(chan, sub, 0x0300, 1);
        OUT_RING(chan, 0x55);
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
        OUT_RING(chan, NvImagePatt);
-        BEGIN_RING(chan, 1, 0x0300, 8);
+        BEGIN_RING(chan, sub, 0x0300, 8);
        OUT_RING(chan, pattern_fmt);
 #ifdef __BIG_ENDIAN
        OUT_RING(chan, 2);
@@ -279,9 +278,9 @@ nv04_fbcon_accel_init(struct fb_info *info)
        OUT_RING(chan, ~0);
        OUT_RING(chan, ~0);
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
        OUT_RING(chan, NvClipRect);
-        BEGIN_RING(chan, 1, 0x0300, 2);
+        BEGIN_RING(chan, sub, 0x0300, 2);
        OUT_RING(chan, 0);
        OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c
index 0c3cd53c7313..f31347b8c9b0 100644
--- a/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -71,6 +71,40 @@ nv04_fifo_reassign(struct drm_device *dev, bool enable)
        return (reassign == 1);
 }
+bool
+nv04_fifo_cache_flush(struct drm_device *dev)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
+        uint64_t start = ptimer->read(dev);
+        do {
+                if (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) ==
+                    nv_rd32(dev, NV03_PFIFO_CACHE1_PUT))
+                        return true;
+        } while (ptimer->read(dev) - start < 100000000);
+        NV_ERROR(dev, "Timeout flushing the PFIFO cache.\n");
+        return false;
+}
+bool
+nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
+{
+        uint32_t pull = nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0);
+        if (enable) {
+                nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull | 1);
+        } else {
+                nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull & ~1);
+                nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);
+        }
+        return !!(pull & 1);
+}
 int
 nv04_fifo_channel_id(struct drm_device *dev)
 {
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index d561d773c0f4..e260986ea65a 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -28,6 +28,10 @@
 #include "nouveau_drv.h"
 static uint32_t nv04_graph_ctx_regs[] = {
+        0x0040053c,
+        0x00400544,
+        0x00400540,
+        0x00400548,
        NV04_PGRAPH_CTX_SWITCH1,
        NV04_PGRAPH_CTX_SWITCH2,
        NV04_PGRAPH_CTX_SWITCH3,
@@ -102,69 +106,69 @@ static uint32_t nv04_graph_ctx_regs[] = {
        NV04_PGRAPH_PATT_COLOR0,
        NV04_PGRAPH_PATT_COLOR1,
        NV04_PGRAPH_PATT_COLORRAM+0x00,
-        NV04_PGRAPH_PATT_COLORRAM+0x01,
-        NV04_PGRAPH_PATT_COLORRAM+0x02,
-        NV04_PGRAPH_PATT_COLORRAM+0x03,
        NV04_PGRAPH_PATT_COLORRAM+0x04,
-        NV04_PGRAPH_PATT_COLORRAM+0x05,
-        NV04_PGRAPH_PATT_COLORRAM+0x06,
-        NV04_PGRAPH_PATT_COLORRAM+0x07,
        NV04_PGRAPH_PATT_COLORRAM+0x08,
-        NV04_PGRAPH_PATT_COLORRAM+0x09,
+        NV04_PGRAPH_PATT_COLORRAM+0x0c,
-        NV04_PGRAPH_PATT_COLORRAM+0x0A,
-        NV04_PGRAPH_PATT_COLORRAM+0x0B,
-        NV04_PGRAPH_PATT_COLORRAM+0x0C,
-        NV04_PGRAPH_PATT_COLORRAM+0x0D,
-        NV04_PGRAPH_PATT_COLORRAM+0x0E,
-        NV04_PGRAPH_PATT_COLORRAM+0x0F,
        NV04_PGRAPH_PATT_COLORRAM+0x10,
-        NV04_PGRAPH_PATT_COLORRAM+0x11,
-        NV04_PGRAPH_PATT_COLORRAM+0x12,
-        NV04_PGRAPH_PATT_COLORRAM+0x13,
        NV04_PGRAPH_PATT_COLORRAM+0x14,
-        NV04_PGRAPH_PATT_COLORRAM+0x15,
-        NV04_PGRAPH_PATT_COLORRAM+0x16,
-        NV04_PGRAPH_PATT_COLORRAM+0x17,
        NV04_PGRAPH_PATT_COLORRAM+0x18,
-        NV04_PGRAPH_PATT_COLORRAM+0x19,
+        NV04_PGRAPH_PATT_COLORRAM+0x1c,
-        NV04_PGRAPH_PATT_COLORRAM+0x1A,
-        NV04_PGRAPH_PATT_COLORRAM+0x1B,
-        NV04_PGRAPH_PATT_COLORRAM+0x1C,
-        NV04_PGRAPH_PATT_COLORRAM+0x1D,
-        NV04_PGRAPH_PATT_COLORRAM+0x1E,
-        NV04_PGRAPH_PATT_COLORRAM+0x1F,
        NV04_PGRAPH_PATT_COLORRAM+0x20,
-        NV04_PGRAPH_PATT_COLORRAM+0x21,
-        NV04_PGRAPH_PATT_COLORRAM+0x22,
-        NV04_PGRAPH_PATT_COLORRAM+0x23,
        NV04_PGRAPH_PATT_COLORRAM+0x24,
-        NV04_PGRAPH_PATT_COLORRAM+0x25,
-        NV04_PGRAPH_PATT_COLORRAM+0x26,
-        NV04_PGRAPH_PATT_COLORRAM+0x27,
        NV04_PGRAPH_PATT_COLORRAM+0x28,
-        NV04_PGRAPH_PATT_COLORRAM+0x29,
+        NV04_PGRAPH_PATT_COLORRAM+0x2c,
-        NV04_PGRAPH_PATT_COLORRAM+0x2A,
-        NV04_PGRAPH_PATT_COLORRAM+0x2B,
-        NV04_PGRAPH_PATT_COLORRAM+0x2C,
-        NV04_PGRAPH_PATT_COLORRAM+0x2D,
-        NV04_PGRAPH_PATT_COLORRAM+0x2E,
-        NV04_PGRAPH_PATT_COLORRAM+0x2F,
        NV04_PGRAPH_PATT_COLORRAM+0x30,
-        NV04_PGRAPH_PATT_COLORRAM+0x31,
-        NV04_PGRAPH_PATT_COLORRAM+0x32,
-        NV04_PGRAPH_PATT_COLORRAM+0x33,
        NV04_PGRAPH_PATT_COLORRAM+0x34,
-        NV04_PGRAPH_PATT_COLORRAM+0x35,
-        NV04_PGRAPH_PATT_COLORRAM+0x36,
-        NV04_PGRAPH_PATT_COLORRAM+0x37,
        NV04_PGRAPH_PATT_COLORRAM+0x38,
-        NV04_PGRAPH_PATT_COLORRAM+0x39,
+        NV04_PGRAPH_PATT_COLORRAM+0x3c,
-        NV04_PGRAPH_PATT_COLORRAM+0x3A,
+        NV04_PGRAPH_PATT_COLORRAM+0x40,
-        NV04_PGRAPH_PATT_COLORRAM+0x3B,
+        NV04_PGRAPH_PATT_COLORRAM+0x44,
-        NV04_PGRAPH_PATT_COLORRAM+0x3C,
+        NV04_PGRAPH_PATT_COLORRAM+0x48,
-        NV04_PGRAPH_PATT_COLORRAM+0x3D,
+        NV04_PGRAPH_PATT_COLORRAM+0x4c,
-        NV04_PGRAPH_PATT_COLORRAM+0x3E,
+        NV04_PGRAPH_PATT_COLORRAM+0x50,
-        NV04_PGRAPH_PATT_COLORRAM+0x3F,
+        NV04_PGRAPH_PATT_COLORRAM+0x54,
+        NV04_PGRAPH_PATT_COLORRAM+0x58,
+        NV04_PGRAPH_PATT_COLORRAM+0x5c,
+        NV04_PGRAPH_PATT_COLORRAM+0x60,
+        NV04_PGRAPH_PATT_COLORRAM+0x64,
+        NV04_PGRAPH_PATT_COLORRAM+0x68,
+        NV04_PGRAPH_PATT_COLORRAM+0x6c,
+        NV04_PGRAPH_PATT_COLORRAM+0x70,
+        NV04_PGRAPH_PATT_COLORRAM+0x74,
+        NV04_PGRAPH_PATT_COLORRAM+0x78,
+        NV04_PGRAPH_PATT_COLORRAM+0x7c,
+        NV04_PGRAPH_PATT_COLORRAM+0x80,
+        NV04_PGRAPH_PATT_COLORRAM+0x84,
+        NV04_PGRAPH_PATT_COLORRAM+0x88,
+        NV04_PGRAPH_PATT_COLORRAM+0x8c,
+        NV04_PGRAPH_PATT_COLORRAM+0x90,
+        NV04_PGRAPH_PATT_COLORRAM+0x94,
+        NV04_PGRAPH_PATT_COLORRAM+0x98,
+        NV04_PGRAPH_PATT_COLORRAM+0x9c,
+        NV04_PGRAPH_PATT_COLORRAM+0xa0,
+        NV04_PGRAPH_PATT_COLORRAM+0xa4,
+        NV04_PGRAPH_PATT_COLORRAM+0xa8,
+        NV04_PGRAPH_PATT_COLORRAM+0xac,
+        NV04_PGRAPH_PATT_COLORRAM+0xb0,
+        NV04_PGRAPH_PATT_COLORRAM+0xb4,
+        NV04_PGRAPH_PATT_COLORRAM+0xb8,
+        NV04_PGRAPH_PATT_COLORRAM+0xbc,
+        NV04_PGRAPH_PATT_COLORRAM+0xc0,
+        NV04_PGRAPH_PATT_COLORRAM+0xc4,
+        NV04_PGRAPH_PATT_COLORRAM+0xc8,
+        NV04_PGRAPH_PATT_COLORRAM+0xcc,
+        NV04_PGRAPH_PATT_COLORRAM+0xd0,
+        NV04_PGRAPH_PATT_COLORRAM+0xd4,
+        NV04_PGRAPH_PATT_COLORRAM+0xd8,
+        NV04_PGRAPH_PATT_COLORRAM+0xdc,
+        NV04_PGRAPH_PATT_COLORRAM+0xe0,
+        NV04_PGRAPH_PATT_COLORRAM+0xe4,
+        NV04_PGRAPH_PATT_COLORRAM+0xe8,
+        NV04_PGRAPH_PATT_COLORRAM+0xec,
+        NV04_PGRAPH_PATT_COLORRAM+0xf0,
+        NV04_PGRAPH_PATT_COLORRAM+0xf4,
+        NV04_PGRAPH_PATT_COLORRAM+0xf8,
+        NV04_PGRAPH_PATT_COLORRAM+0xfc,
        NV04_PGRAPH_PATTERN,
        0x0040080c,
        NV04_PGRAPH_PATTERN_SHAPE,
@@ -247,14 +251,6 @@ static uint32_t nv04_graph_ctx_regs[] = {
        0x004004f8,
        0x0040047c,
        0x004004fc,
-        0x0040053c,
-        0x00400544,
-        0x00400540,
-        0x00400548,
-        0x00400560,
-        0x00400568,
-        0x00400564,
-        0x0040056c,
        0x00400534,
        0x00400538,
        0x00400514,
@@ -341,9 +337,8 @@ static uint32_t nv04_graph_ctx_regs[] = {
        0x00400500,
        0x00400504,
        NV04_PGRAPH_VALID1,
-        NV04_PGRAPH_VALID2
+        NV04_PGRAPH_VALID2,
+        NV04_PGRAPH_DEBUG_3
 };
 struct graph_state {
@@ -388,6 +383,18 @@ nv04_graph_context_switch(struct drm_device *dev)
        pgraph->fifo_access(dev, true);
 }
+static uint32_t *ctx_reg(struct graph_state *ctx, uint32_t reg)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(nv04_graph_ctx_regs); i++) {
+                if (nv04_graph_ctx_regs[i] == reg)
+                        return &ctx->nv04[i];
+        }
+        return NULL;
+}
 int nv04_graph_create_context(struct nouveau_channel *chan)
 {
        struct graph_state *pgraph_ctx;
@@ -398,15 +405,8 @@ int nv04_graph_create_context(struct nouveau_channel *chan)
        if (pgraph_ctx == NULL)
                return -ENOMEM;
-        /* dev_priv->fifos[channel].pgraph_ctx_user = channel << 24; */
+        *ctx_reg(pgraph_ctx, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31;
-        pgraph_ctx->nv04[0] = 0x0001ffff;
-        /* is it really needed ??? */
-#if 0
-        dev_priv->fifos[channel].pgraph_ctx[1] =
-                                        nv_rd32(dev, NV_PGRAPH_DEBUG_4);
-        dev_priv->fifos[channel].pgraph_ctx[2] =
-                                        nv_rd32(dev, 0x004006b0);
-#endif
        return 0;
 }
@@ -429,9 +429,13 @@ int nv04_graph_load_context(struct nouveau_channel *chan)
                nv_wr32(dev, nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]);
        nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10010100);
-        nv_wr32(dev, NV04_PGRAPH_CTX_USER, chan->id << 24);
+        tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
+        nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp | chan->id << 24);
        tmp = nv_rd32(dev, NV04_PGRAPH_FFINTFC_ST2);
        nv_wr32(dev, NV04_PGRAPH_FFINTFC_ST2, tmp & 0x000fffff);
        return 0;
 }
@@ -494,7 +498,7 @@ int nv04_graph_init(struct drm_device *dev)
        nv_wr32(dev, NV04_PGRAPH_STATE        , 0xFFFFFFFF);
        nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL  , 0x10000100);
        tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
-        tmp |= dev_priv->engine.fifo.channels << 24;
+        tmp |= (dev_priv->engine.fifo.channels - 1) << 24;
        nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);
        /* These don't belong here, they're part of a per-channel context */
@@ -533,7 +537,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
                              int mthd, uint32_t data)
 {
        struct drm_device *dev = chan->dev;
-        uint32_t instance = nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff;
+        uint32_t instance = (nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff) << 4;
        int subc = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7;
        uint32_t tmp;
@@ -547,7 +551,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
        return 0;
 }
-static struct nouveau_pgraph_object_method nv04_graph_mthds_m2mf[] = {
+static struct nouveau_pgraph_object_method nv04_graph_mthds_sw[] = {
        { 0x0150, nv04_graph_mthd_set_ref },
        {}
 };
@@ -558,7 +562,7 @@ static struct nouveau_pgraph_object_method nv04_graph_mthds_set_operation[] = {
 };
 struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
-        { 0x0039, false, nv04_graph_mthds_m2mf },
+        { 0x0039, false, NULL },
        { 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */
        { 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */
        { 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */
@@ -574,6 +578,7 @@ struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
        { 0x0053, false, NULL }, /* surf3d */
        { 0x0054, false, NULL }, /* tex_tri */
        { 0x0055, false, NULL }, /* multitex_tri */
+        { 0x506e, true, nv04_graph_mthds_sw },
        {}
 };
diff --git a/drivers/gpu/drm/nouveau/nv10_fb.c b/drivers/gpu/drm/nouveau/nv10_fb.c
index 79e2d104d70a..cc5cda44e501 100644
--- a/drivers/gpu/drm/nouveau/nv10_fb.c
+++ b/drivers/gpu/drm/nouveau/nv10_fb.c
@@ -3,17 +3,37 @@
 #include "nouveau_drv.h"
 #include "nouveau_drm.h"
+void
+nv10_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                          uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t limit = max(1u, addr + size) - 1;
+        if (pitch) {
+                if (dev_priv->card_type >= NV_20)
+                        addr |= 1;
+                else
+                        addr |= 1 << 31;
+        }
+        nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+        nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+        nv_wr32(dev, NV10_PFB_TILE(i), addr);
+}
 int
 nv10_fb_init(struct drm_device *dev)
 {
-        uint32_t fb_bar_size;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
        int i;
-        fb_bar_size = drm_get_resource_len(dev, 0) - 1;
+        pfb->num_tiles = NV10_PFB_TILE__SIZE;
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                nv_wr32(dev, NV10_PFB_TILE(i), 0);
+        /* Turn all the tiling regions off. */
-                nv_wr32(dev, NV10_PFB_TLIMIT(i), fb_bar_size);
+        for (i = 0; i < pfb->num_tiles; i++)
-        }
+                pfb->set_region_tiling(dev, i, 0, 0, 0);
        return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index 6870e0ee2e7e..fcf2cdd19493 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -807,6 +807,20 @@ void nv10_graph_destroy_context(struct nouveau_channel *chan)
        chan->pgraph_ctx = NULL;
 }
+void
+nv10_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                             uint32_t size, uint32_t pitch)
+{
+        uint32_t limit = max(1u, addr + size) - 1;
+        if (pitch)
+                addr |= 1 << 31;
+        nv_wr32(dev, NV10_PGRAPH_TLIMIT(i), limit);
+        nv_wr32(dev, NV10_PGRAPH_TSIZE(i), pitch);
+        nv_wr32(dev, NV10_PGRAPH_TILE(i), addr);
+}
 int nv10_graph_init(struct drm_device *dev)
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -838,17 +852,9 @@ int nv10_graph_init(struct drm_device *dev)
        } else
                nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00000000);
-        /* copy tile info from PFB */
+        /* Turn all the tiling regions off. */
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
+        for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
-                nv_wr32(dev, NV10_PGRAPH_TILE(i),
+                nv10_graph_set_region_tiling(dev, i, 0, 0, 0);
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-                nv_wr32(dev, NV10_PGRAPH_TLIMIT(i),
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                nv_wr32(dev, NV10_PGRAPH_TSIZE(i),
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                nv_wr32(dev, NV10_PGRAPH_TSTATUS(i),
-                                        nv_rd32(dev, NV10_PFB_TSTATUS(i)));
-        }
        nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH1, 0x00000000);
        nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH2, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c
index 81c01353a9f9..58b917c3341b 100644
--- a/drivers/gpu/drm/nouveau/nv17_tv.c
+++ b/drivers/gpu/drm/nouveau/nv17_tv.c
@@ -33,13 +33,103 @@
 #include "nouveau_hw.h"
 #include "nv17_tv.h"
-enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
+static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
-                                         struct drm_connector *connector,
-                                         uint32_t pin_mask)
 {
+        struct drm_device *dev = encoder->dev;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
+        uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
+                fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
+        uint32_t sample = 0;
+        int head;
+#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
+        testval = RGB_TEST_DATA(0x82, 0xeb, 0x82);
+        if (dev_priv->vbios->tvdactestval)
+                testval = dev_priv->vbios->tvdactestval;
+        dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
+        head = (dacclk & 0x100) >> 8;
+        /* Save the previous state. */
+        gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1);
+        gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0);
+        fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
+        fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
+        fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
+        fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
+        test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
+        ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c);
+        ctv_14 = NVReadRAMDAC(dev, head, 0x680c14);
+        ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
+        /* Prepare the DAC for load detection.  */
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC1, true);
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC0, true);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, 1183);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
+                      NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
+                      NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12 |
+                      NV_PRAMDAC_FP_TG_CONTROL_READ_PROG |
+                      NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS |
+                      NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
+                      (dacclk & ~0xff) | 0x22);
+        msleep(1);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
+                      (dacclk & ~0xff) | 0x21);
+        NVWriteRAMDAC(dev, head, 0x680c1c, 1 << 20);
+        NVWriteRAMDAC(dev, head, 0x680c14, 4 << 16);
+        /* Sample pin 0x4 (usually S-video luma). */
+        NVWriteRAMDAC(dev, head, 0x680c6c, testval >> 10 & 0x3ff);
+        msleep(20);
+        sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
+                & 0x4 << 28;
+        /* Sample the remaining pins. */
+        NVWriteRAMDAC(dev, head, 0x680c6c, testval & 0x3ff);
+        msleep(20);
+        sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
+                & 0xa << 28;
+        /* Restore the previous state. */
+        NVWriteRAMDAC(dev, head, 0x680c1c, ctv_1c);
+        NVWriteRAMDAC(dev, head, 0x680c14, ctv_14);
+        NVWriteRAMDAC(dev, head, 0x680c6c, ctv_6c);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, dacclk);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC1, gpio1);
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC0, gpio0);
+        return sample;
+}
+static enum drm_connector_status
+nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct drm_mode_config *conf = &dev->mode_config;
        struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+        struct dcb_entry *dcb = tv_enc->base.dcb;
-        tv_enc->pin_mask = pin_mask >> 28 & 0xe;
+        if (dev_priv->chipset == 0x42 ||
+            dev_priv->chipset == 0x43)
+                tv_enc->pin_mask = nv42_tv_sample_load(encoder) >> 28 & 0xe;
+        else
+                tv_enc->pin_mask = nv17_dac_sample_load(encoder) >> 28 & 0xe;
        switch (tv_enc->pin_mask) {
        case 0x2:
@@ -50,7 +140,7 @@ enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
                tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
                break;
        case 0xe:
-                if (nouveau_encoder(encoder)->dcb->tvconf.has_component_output)
+                if (dcb->tvconf.has_component_output)
                        tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component;
                else
                        tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
@@ -61,11 +151,16 @@ enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
        }
        drm_connector_property_set_value(connector,
-                        encoder->dev->mode_config.tv_subconnector_property,
+                                         conf->tv_subconnector_property,
-                                                        tv_enc->subconnector);
+                                         tv_enc->subconnector);
-        return tv_enc->subconnector ? connector_status_connected :
+        if (tv_enc->subconnector) {
-                                        connector_status_disconnected;
+                NV_INFO(dev, "Load detected on output %c\n",
+                        '@' + ffs(dcb->or));
+                return connector_status_connected;
+        } else {
+                return connector_status_disconnected;
+        }
 }
 static const struct {
@@ -633,7 +728,7 @@ static struct drm_encoder_helper_funcs nv17_tv_helper_funcs = {
        .prepare = nv17_tv_prepare,
        .commit = nv17_tv_commit,
        .mode_set = nv17_tv_mode_set,
-        .detect = nv17_dac_detect,
+        .detect = nv17_tv_detect,
 };
 static struct drm_encoder_slave_funcs nv17_tv_slave_funcs = {
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index 18ba74f19703..d6fc0a82f03d 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -514,6 +514,27 @@ nv20_graph_rdi(struct drm_device *dev)
        nouveau_wait_for_idle(dev);
 }
+void
+nv20_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                             uint32_t size, uint32_t pitch)
+{
+        uint32_t limit = max(1u, addr + size) - 1;
+        if (pitch)
+                addr |= 1;
+        nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+        nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+        nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + 4 * i);
+        nv_wr32(dev, NV10_PGRAPH_RDI_DATA, limit);
+        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + 4 * i);
+        nv_wr32(dev, NV10_PGRAPH_RDI_DATA, pitch);
+        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + 4 * i);
+        nv_wr32(dev, NV10_PGRAPH_RDI_DATA, addr);
+}
 int
 nv20_graph_init(struct drm_device *dev)
 {
@@ -572,27 +593,10 @@ nv20_graph_init(struct drm_device *dev)
                nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000030);
        }
-        /* copy tile info from PFB */
+        /* Turn all the tiling regions off. */
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
+        for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
-                nv_wr32(dev, 0x00400904 + i * 0x10,
+                nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                        /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
-                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + i * 4);
-                nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                nv_wr32(dev, 0x00400908 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                        /* which is NV40_PGRAPH_TSIZE0(i) ?? */
-                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + i * 4);
-                nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                nv_wr32(dev, 0x00400900 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-                        /* which is NV40_PGRAPH_TILE0(i) ?? */
-                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + i * 4);
-                nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-        }
        for (i = 0; i < 8; i++) {
                nv_wr32(dev, 0x400980 + i * 4, nv_rd32(dev, 0x100300 + i * 4));
                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0090 + i * 4);
@@ -704,18 +708,9 @@ nv30_graph_init(struct drm_device *dev)
        nv_wr32(dev, 0x4000c0, 0x00000016);
-        /* copy tile info from PFB */
+        /* Turn all the tiling regions off. */
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
+        for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
-                nv_wr32(dev, 0x00400904 + i * 0x10,
+                nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                        /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
-                nv_wr32(dev, 0x00400908 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                        /* which is NV40_PGRAPH_TSIZE0(i) ?? */
-                nv_wr32(dev, 0x00400900 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-                        /* which is NV40_PGRAPH_TILE0(i) ?? */
-        }
        nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);
        nv_wr32(dev, NV10_PGRAPH_STATE      , 0xFFFFFFFF);
diff --git a/drivers/gpu/drm/nouveau/nv40_fb.c b/drivers/gpu/drm/nouveau/nv40_fb.c
index ca1d27107a8e..3cd07d8d5bd7 100644
--- a/drivers/gpu/drm/nouveau/nv40_fb.c
+++ b/drivers/gpu/drm/nouveau/nv40_fb.c
@@ -3,12 +3,37 @@
 #include "nouveau_drv.h"
 #include "nouveau_drm.h"
+void
+nv40_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                          uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t limit = max(1u, addr + size) - 1;
+        if (pitch)
+                addr |= 1;
+        switch (dev_priv->chipset) {
+        case 0x40:
+                nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+                nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+                nv_wr32(dev, NV10_PFB_TILE(i), addr);
+                break;
+        default:
+                nv_wr32(dev, NV40_PFB_TLIMIT(i), limit);
+                nv_wr32(dev, NV40_PFB_TSIZE(i), pitch);
+                nv_wr32(dev, NV40_PFB_TILE(i), addr);
+                break;
+        }
+}
 int
 nv40_fb_init(struct drm_device *dev)
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;
-        uint32_t fb_bar_size, tmp;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
-        int num_tiles;
+        uint32_t tmp;
        int i;
        /* This is strictly a NV4x register (don't know about NV5x). */
@@ -23,35 +48,23 @@ nv40_fb_init(struct drm_device *dev)
        case 0x45:
                tmp = nv_rd32(dev, NV10_PFB_CLOSE_PAGE2);
                nv_wr32(dev, NV10_PFB_CLOSE_PAGE2, tmp & ~(1 << 15));
-                num_tiles = NV10_PFB_TILE__SIZE;
+                pfb->num_tiles = NV10_PFB_TILE__SIZE;
                break;
        case 0x46: /* G72 */
        case 0x47: /* G70 */
        case 0x49: /* G71 */
        case 0x4b: /* G73 */
        case 0x4c: /* C51 (G7X version) */
-                num_tiles = NV40_PFB_TILE__SIZE_1;
+                pfb->num_tiles = NV40_PFB_TILE__SIZE_1;
                break;
        default:
-                num_tiles = NV40_PFB_TILE__SIZE_0;
+                pfb->num_tiles = NV40_PFB_TILE__SIZE_0;
                break;
        }
-        fb_bar_size = drm_get_resource_len(dev, 0) - 1;
+        /* Turn all the tiling regions off. */
-        switch (dev_priv->chipset) {
+        for (i = 0; i < pfb->num_tiles; i++)
-        case 0x40:
+                pfb->set_region_tiling(dev, i, 0, 0, 0);
-                for (i = 0; i < num_tiles; i++) {
-                        nv_wr32(dev, NV10_PFB_TILE(i), 0);
-                        nv_wr32(dev, NV10_PFB_TLIMIT(i), fb_bar_size);
-                }
-                break;
-        default:
-                for (i = 0; i < num_tiles; i++) {
-                        nv_wr32(dev, NV40_PFB_TILE(i), 0);
-                        nv_wr32(dev, NV40_PFB_TLIMIT(i), fb_bar_size);
-                }
-                break;
-        }
        return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index 2b332bb55acf..53e8afe1dcd1 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -181,6 +181,48 @@ nv40_graph_unload_context(struct drm_device *dev)
        return ret;
 }
+void
+nv40_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                             uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t limit = max(1u, addr + size) - 1;
+        if (pitch)
+                addr |= 1;
+        switch (dev_priv->chipset) {
+        case 0x44:
+        case 0x4a:
+        case 0x4e:
+                nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+                nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+                nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+                break;
+        case 0x46:
+        case 0x47:
+        case 0x49:
+        case 0x4b:
+                nv_wr32(dev, NV47_PGRAPH_TSIZE(i), pitch);
+                nv_wr32(dev, NV47_PGRAPH_TLIMIT(i), limit);
+                nv_wr32(dev, NV47_PGRAPH_TILE(i), addr);
+                nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
+                nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
+                nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
+                break;
+        default:
+                nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+                nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+                nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+                nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
+                nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
+                nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
+                break;
+        }
+}
 /*
 * G70          0x47
 * G71          0x49
@@ -195,7 +237,8 @@ nv40_graph_init(struct drm_device *dev)
 {
        struct drm_nouveau_private *dev_priv =
                (struct drm_nouveau_private *)dev->dev_private;
-        uint32_t vramsz, tmp;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        uint32_t vramsz;
        int i, j;
        nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
@@ -292,74 +335,9 @@ nv40_graph_init(struct drm_device *dev)
        nv_wr32(dev, 0x400b38, 0x2ffff800);
        nv_wr32(dev, 0x400b3c, 0x00006000);
-        /* copy tile info from PFB */
+        /* Turn all the tiling regions off. */
-        switch (dev_priv->chipset) {
+        for (i = 0; i < pfb->num_tiles; i++)
-        case 0x40: /* vanilla NV40 */
+                nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
-                for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                        tmp = nv_rd32(dev, NV10_PFB_TILE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
-                        tmp = nv_rd32(dev, NV10_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
-                        tmp = nv_rd32(dev, NV10_PFB_TSIZE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
-                        tmp = nv_rd32(dev, NV10_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
-                }
-                break;
-        case 0x44:
-        case 0x4a:
-        case 0x4e: /* NV44-based cores don't have 0x406900? */
-                for (i = 0; i < NV40_PFB_TILE__SIZE_0; i++) {
-                        tmp = nv_rd32(dev, NV40_PFB_TILE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
-                }
-                break;
-        case 0x46:
-        case 0x47:
-        case 0x49:
-        case 0x4b: /* G7X-based cores */
-                for (i = 0; i < NV40_PFB_TILE__SIZE_1; i++) {
-                        tmp = nv_rd32(dev, NV40_PFB_TILE(i));
-                        nv_wr32(dev, NV47_PGRAPH_TILE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV47_PGRAPH_TLIMIT0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
-                        nv_wr32(dev, NV47_PGRAPH_TSIZE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV47_PGRAPH_TSTATUS0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
-                }
-                break;
-        default: /* everything else */
-                for (i = 0; i < NV40_PFB_TILE__SIZE_0; i++) {
-                        tmp = nv_rd32(dev, NV40_PFB_TILE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
-                }
-                break;
-        }
        /* begin RAM config */
        vramsz = drm_get_resource_len(dev, 0) - 1;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index a9263d92a231..90f0bf59fbcd 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -690,9 +690,21 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
                           int pxclk)
 {
        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_connector *nv_connector = NULL;
+        struct drm_encoder *encoder;
        struct nvbios *bios = &dev_priv->VBIOS;
        uint32_t mc, script = 0, or;
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+                if (nv_encoder->dcb != dcbent)
+                        continue;
+                nv_connector = nouveau_encoder_connector_get(nv_encoder);
+                break;
+        }
        or = ffs(dcbent->or) - 1;
        mc = nv50_display_mode_ctrl(dev, dcbent->type != OUTPUT_ANALOG, or);
        switch (dcbent->type) {
@@ -711,6 +723,11 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
                        } else
                        if (bios->fp.strapless_is_24bit & 1)
                                script |= 0x0200;
+                        if (nv_connector && nv_connector->edid &&
+                            (nv_connector->edid->revision >= 4) &&
+                            (nv_connector->edid->input & 0x70) >= 0x20)
+                                script |= 0x0200;
                }
                if (nouveau_uscript_lvds >= 0) {
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 6bcc6d39e9b0..e4f279ee61cf 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -16,9 +16,7 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
        if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
             RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
        }
        if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -31,7 +29,11 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
                OUT_RING(chan, 1);
        }
        BEGIN_RING(chan, NvSub2D, 0x0588, 1);
-        OUT_RING(chan, rect->color);
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+                OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
+        else
+                OUT_RING(chan, rect->color);
        BEGIN_RING(chan, NvSub2D, 0x0600, 4);
        OUT_RING(chan, rect->dx);
        OUT_RING(chan, rect->dy);
@@ -56,9 +58,7 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
                return;
        if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
        }
        if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -101,8 +101,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
        }
        if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
-                info->flags |= FBINFO_HWACCEL_DISABLED;
        }
        if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -135,9 +134,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
                int push = dwords > 2047 ? 2047 : dwords;
                if (RING_SPACE(chan, push + 1)) {
-                        NV_ERROR(dev,
+                        nouveau_fbcon_gpu_lockup(info);
-                                 "GPU lockup - switching to software fbcon\n");
-                        info->flags |= FBINFO_HWACCEL_DISABLED;
                        cfb_imageblit(info, image);
                        return;
                }
@@ -199,7 +196,7 @@ nv50_fbcon_accel_init(struct fb_info *info)
        ret = RING_SPACE(chan, 59);
        if (ret) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
                return ret;
        }
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c
index b7282284f080..39caf167587d 100644
--- a/drivers/gpu/drm/nouveau/nv50_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv50_fifo.c
@@ -384,8 +384,8 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
                nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr),
                        nv_ro32(dev, cache, (ptr * 2) + 1));
        }
-        nv_wr32(dev, 0x3210, cnt << 2);
+        nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, cnt << 2);
-        nv_wr32(dev, 0x3270, 0);
+        nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
        /* guessing that all the 0x34xx regs aren't on NV50 */
        if (!IS_G80) {
@@ -398,8 +398,6 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
        dev_priv->engine.instmem.finish_access(dev);
-        nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
-        nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
        nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
        return 0;
 }
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index b5f5fe75e6af..1cc7b937b1ea 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -24,6 +24,9 @@ $(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
 $(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
        $(call if_changed,mkregtable)
+$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
 $(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
        $(call if_changed,mkregtable)
@@ -35,6 +38,8 @@ $(obj)/rv515.o: $(obj)/rv515_reg_safe.h
 $(obj)/r300.o: $(obj)/r300_reg_safe.h
+$(obj)/r420.o: $(obj)/r420_reg_safe.h
 $(obj)/rs600.o: $(obj)/rs600_reg_safe.h
 radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
diff --git a/drivers/gpu/drm/radeon/ObjectID.h b/drivers/gpu/drm/radeon/ObjectID.h
index 6d0183c61d3b..c714179d1bfa 100644
--- a/drivers/gpu/drm/radeon/ObjectID.h
+++ b/drivers/gpu/drm/radeon/ObjectID.h
@@ -1,5 +1,5 @@
 /*
-* Copyright 2006-2007 Advanced Micro Devices, Inc.
+* Copyright 2006-2007 Advanced Micro Devices, Inc.  
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -41,14 +41,14 @@
 /****************************************************/
 /* Encoder Object ID Definition                     */
 /****************************************************/
-#define ENCODER_OBJECT_ID_NONE                    0x00
+#define ENCODER_OBJECT_ID_NONE                    0x00 
 /* Radeon Class Display Hardware */
 #define ENCODER_OBJECT_ID_INTERNAL_LVDS           0x01
 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1          0x02
 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2          0x03
 #define ENCODER_OBJECT_ID_INTERNAL_DAC1           0x04
-#define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05  /* TV/CV DAC */
+#define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05     /* TV/CV DAC */
 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA          0x06
 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB          0x07
@@ -56,11 +56,11 @@
 #define ENCODER_OBJECT_ID_SI170B                  0x08
 #define ENCODER_OBJECT_ID_CH7303                  0x09
 #define ENCODER_OBJECT_ID_CH7301                  0x0A
-#define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B  /* This belongs to Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B    /* This belongs to Radeon Class Display Hardware */
 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA          0x0C
 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB          0x0D
 #define ENCODER_OBJECT_ID_TITFP513                0x0E
-#define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F  /* not used for Radeon */
+#define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F    /* not used for Radeon */
 #define ENCODER_OBJECT_ID_VT1623                  0x10
 #define ENCODER_OBJECT_ID_HDMI_SI1930             0x11
 #define ENCODER_OBJECT_ID_HDMI_INTERNAL           0x12
@@ -68,9 +68,9 @@
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1   0x13
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1    0x14
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1    0x15
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16  /* Shared with CV/TV and CRT */
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16  /* Shared with CV/TV and CRT */
-#define ENCODER_OBJECT_ID_SI178                   0X17  /* External TMDS (dual link, no HDCP.) */
+#define ENCODER_OBJECT_ID_SI178                   0X17  /* External TMDS (dual link, no HDCP.) */
-#define ENCODER_OBJECT_ID_MVPU_FPGA               0x18  /* MVPU FPGA chip */
+#define ENCODER_OBJECT_ID_MVPU_FPGA               0x18  /* MVPU FPGA chip */
 #define ENCODER_OBJECT_ID_INTERNAL_DDI            0x19
 #define ENCODER_OBJECT_ID_VT1625                  0x1A
 #define ENCODER_OBJECT_ID_HDMI_SI1932             0x1B
@@ -86,7 +86,7 @@
 /****************************************************/
 /* Connector Object ID Definition                   */
 /****************************************************/
-#define CONNECTOR_OBJECT_ID_NONE                  0x00
+#define CONNECTOR_OBJECT_ID_NONE                  0x00 
 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I     0x01
 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I       0x02
 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D     0x03
@@ -96,7 +96,7 @@
 #define CONNECTOR_OBJECT_ID_SVIDEO                0x07
 #define CONNECTOR_OBJECT_ID_YPbPr                 0x08
 #define CONNECTOR_OBJECT_ID_D_CONNECTOR           0x09
-#define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A  /* Supports both CV & TV */
+#define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A  /* Supports both CV & TV */
 #define CONNECTOR_OBJECT_ID_SCART                 0x0B
 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A           0x0C
 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B           0x0D
@@ -106,6 +106,8 @@
 #define CONNECTOR_OBJECT_ID_CROSSFIRE             0x11
 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI          0x12
 #define CONNECTOR_OBJECT_ID_DISPLAYPORT           0x13
+#define CONNECTOR_OBJECT_ID_eDP                   0x14
+#define CONNECTOR_OBJECT_ID_MXM                   0x15
 /* deleted */
@@ -116,6 +118,14 @@
 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL                              0x01
 /****************************************************/
+/* Generic Object ID Definition                     */
+/****************************************************/
+#define GENERIC_OBJECT_ID_NONE                    0x00
+#define GENERIC_OBJECT_ID_GLSYNC                  0x01
+#define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE        0x02
+#define GENERIC_OBJECT_ID_MXM_OPM                 0x03
+/****************************************************/
 /* Graphics Object ENUM ID Definition               */
 /****************************************************/
 #define GRAPH_OBJECT_ENUM_ID1                     0x01
@@ -124,6 +134,7 @@
 #define GRAPH_OBJECT_ENUM_ID4                     0x04
 #define GRAPH_OBJECT_ENUM_ID5                     0x05
 #define GRAPH_OBJECT_ENUM_ID6                     0x06
+#define GRAPH_OBJECT_ENUM_ID7                     0x07
 /****************************************************/
 /* Graphics Object ID Bit definition                */
@@ -133,35 +144,35 @@
 #define RESERVED1_ID_MASK                         0x0800
 #define OBJECT_TYPE_MASK                          0x7000
 #define RESERVED2_ID_MASK                         0x8000
+                                                  
 #define OBJECT_ID_SHIFT                           0x00
 #define ENUM_ID_SHIFT                             0x08
 #define OBJECT_TYPE_SHIFT                         0x0C
 /****************************************************/
 /* Graphics Object family definition                */
 /****************************************************/
-#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) \
+#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
-        (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
+                                                                           GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
-         GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
 /****************************************************/
 /* GPU Object ID definition - Shared with BIOS      */
 /****************************************************/
-#define GPU_ENUM_ID1    (GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
+#define GPU_ENUM_ID1                            ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
-                         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
 /****************************************************/
 /* Encoder Object ID definition - Shared with BIOS  */
 /****************************************************/
 /*
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101      
 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1       0x2102
 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1       0x2103
 #define ENCODER_INTERNAL_DAC1_ENUM_ID1        0x2104
 #define ENCODER_INTERNAL_DAC2_ENUM_ID1        0x2105
 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1       0x2106
 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1       0x2107
-#define ENCODER_SIL170B_ENUM_ID1              0x2108
+#define ENCODER_SIL170B_ENUM_ID1              0x2108  
 #define ENCODER_CH7303_ENUM_ID1               0x2109
 #define ENCODER_CH7301_ENUM_ID1               0x210A
 #define ENCODER_INTERNAL_DVO1_ENUM_ID1        0x210B
@@ -175,8 +186,8 @@
 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   0x2113
 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    0x2114
 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    0x2115
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116  
-#define ENCODER_SI178_ENUM_ID1                   0x2117
+#define ENCODER_SI178_ENUM_ID1                   0x2117 
 #define ENCODER_MVPU_FPGA_ENUM_ID1               0x2118
 #define ENCODER_INTERNAL_DDI_ENUM_ID1            0x2119
 #define ENCODER_VT1625_ENUM_ID1                  0x211A
@@ -185,205 +196,169 @@
 #define ENCODER_DP_DP501_ENUM_ID1                0x211D
 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         0x211E
 */
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1 \
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
-         ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 \
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 \
+                                             ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_DAC1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
+                                             ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_DAC2_ENUM_ID1 \
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
-         ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID2    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 \
+                                             GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 \
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+#define ENCODER_SIL170B_ENUM_ID1           ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_CH7303_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
+                                             ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
-#define ENCODER_SIL170B_ENUM_ID1 \
+#define ENCODER_CH7301_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
-         ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_CH7303_ENUM_ID1 \
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define ENCODER_CH7301_ENUM_ID1 \
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
+                                             GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_DVO1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_TITFP513_ENUM_ID1          ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+                                             ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
-#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 \
+#define ENCODER_VT1623_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
-         ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
+#define ENCODER_HDMI_SI1930_ENUM_ID1       ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_TITFP513_ENUM_ID1 \
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 \
+                                             ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-#define ENCODER_VT1623_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
+                                                   GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-#define ENCODER_HDMI_SI1930_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
-#define ENCODER_HDMI_INTERNAL_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 \
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT)  // Shared with CV/TV and CRT
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+#define ENCODER_SI178_ENUM_ID1                    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 \
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)  
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+#define ENCODER_MVPU_FPGA_ENUM_ID1                ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 \
+                                                   ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_DDI_ENUM_ID1     (  GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT) 
-#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_VT1625_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
+                                             ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 \
+#define ENCODER_HDMI_SI1932_ENUM_ID1       ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) /* Shared with CV/TV and CRT */
+#define ENCODER_DP_DP501_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_SI178_ENUM_ID1  \
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
+#define ENCODER_DP_AN9801_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define ENCODER_MVPU_FPGA_ENUM_ID1 \
+                                             ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_DDI_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-#define ENCODER_VT1625_ENUM_ID1 \
+#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)  
-         ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-#define ENCODER_HDMI_SI1932_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-#define ENCODER_DP_DP501_ENUM_ID1 \
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-#define ENCODER_DP_AN9801_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 \
+#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                  GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                  ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
 /****************************************************/
 /* Connector Object ID definition - Shared with BIOS */
@@ -406,167 +381,253 @@
 #define CONNECTOR_7PIN_DIN_ENUM_ID1                 0x310F
 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1           0x3110
 */
-#define CONNECTOR_LVDS_ENUM_ID1 \
+#define CONNECTOR_LVDS_ENUM_ID1                ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
+#define CONNECTOR_LVDS_ENUM_ID2                ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+#define CONNECTOR_eDP_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 \
+                                                 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+#define CONNECTOR_eDP_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 \
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 \
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-#define CONNECTOR_VGA_ENUM_ID1 \
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_VGA_ENUM_ID2 \
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
-#define CONNECTOR_COMPOSITE_ENUM_ID1 \
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define CONNECTOR_VGA_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
-#define CONNECTOR_SVIDEO_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_VGA_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
-#define CONNECTOR_YPbPr_ENUM_ID1 \
+#define CONNECTOR_COMPOSITE_ENUM_ID1           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
+#define CONNECTOR_COMPOSITE_ENUM_ID2           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_D_CONNECTOR_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
+#define CONNECTOR_SVIDEO_ENUM_ID1              ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define CONNECTOR_9PIN_DIN_ENUM_ID1 \
+                                                 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define CONNECTOR_SVIDEO_ENUM_ID2              ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
-#define CONNECTOR_SCART_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_YPbPr_ENUM_ID1               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
-#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 \
+#define CONNECTOR_YPbPr_ENUM_ID2               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+#define CONNECTOR_D_CONNECTOR_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
+#define CONNECTOR_D_CONNECTOR_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-#define CONNECTOR_7PIN_DIN_ENUM_ID1 \
+                                                 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+#define CONNECTOR_9PIN_DIN_ENUM_ID1            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_9PIN_DIN_ENUM_ID2            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 \
+#define CONNECTOR_SCART_ENUM_ID1               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+#define CONNECTOR_SCART_ENUM_ID2               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_CROSSFIRE_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define CONNECTOR_CROSSFIRE_ENUM_ID2 \
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID3         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 \
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_DISPLAYPORT_ENUM_ID1 \
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_7PIN_DIN_ENUM_ID1            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-#define CONNECTOR_DISPLAYPORT_ENUM_ID2 \
+                                                 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+#define CONNECTOR_7PIN_DIN_ENUM_ID2            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+                                                 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
-#define CONNECTOR_DISPLAYPORT_ENUM_ID3 \
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1      ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2      ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-#define CONNECTOR_DISPLAYPORT_ENUM_ID4 \
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-         GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_CROSSFIRE_ENUM_ID1           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+#define CONNECTOR_CROSSFIRE_ENUM_ID2           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID1        ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID2        ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+#define CONNECTOR_DISPLAYPORT_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_DISPLAYPORT_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_DISPLAYPORT_ENUM_ID3         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_DISPLAYPORT_ENUM_ID4         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_DISPLAYPORT_ENUM_ID5         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_DISPLAYPORT_ENUM_ID6         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_MXM_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_A
+#define CONNECTOR_MXM_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_B
+#define CONNECTOR_MXM_ENUM_ID3                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_C
+#define CONNECTOR_MXM_ENUM_ID4                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_D
+#define CONNECTOR_MXM_ENUM_ID5                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_LVDS_TXxx
+#define CONNECTOR_MXM_ENUM_ID6                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_LVDS_UXxx
+#define CONNECTOR_MXM_ENUM_ID7                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DAC
 /****************************************************/
 /* Router Object ID definition - Shared with BIOS   */
 /****************************************************/
-#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 \
+#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1      ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
-        (GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
+                                                GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
-         ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
 /* deleted */
 /****************************************************/
+/* Generic Object ID definition - Shared with BIOS  */
+/****************************************************/
+#define GENERICOBJECT_GLSYNC_ENUM_ID1           (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
+#define GENERICOBJECT_PX2_NON_DRIVABLE_ID1       (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
+#define GENERICOBJECT_PX2_NON_DRIVABLE_ID2       (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
+#define GENERICOBJECT_MXM_OPM_ENUM_ID1           (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
+/****************************************************/
 /* Object Cap definition - Shared with BIOS         */
 /****************************************************/
 #define GRAPHICS_OBJECT_CAP_I2C                 0x00000001L
 #define GRAPHICS_OBJECT_CAP_TABLE_ID            0x00000002L
 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID                   0x01
 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID     0x02
 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID    0x03
@@ -575,4 +636,8 @@
 #pragma pack()
 #endif
-#endif /*GRAPHICTYPE */
+#endif  /*GRAPHICTYPE */
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 0d63c4436e7c..3eb0ca5b3d73 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -468,7 +468,8 @@ void radeon_dp_set_link_config(struct drm_connector *connector,
        struct radeon_connector *radeon_connector;
        struct radeon_connector_atom_dig *dig_connector;
-        if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+        if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) ||
+            (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
                return;
        radeon_connector = to_radeon_connector(connector);
@@ -582,7 +583,8 @@ void dp_link_train(struct drm_encoder *encoder,
        u8 train_set[4];
        int i;
-        if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+        if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) ||
+            (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
                return;
        if (!radeon_encoder->enc_priv)
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c
index 0d79577c1576..607241c6a8a9 100644
--- a/drivers/gpu/drm/radeon/mkregtable.c
+++ b/drivers/gpu/drm/radeon/mkregtable.c
@@ -661,8 +661,10 @@ static int parser_auth(struct table *t, const char *filename)
        fseek(file, 0, SEEK_SET);
        /* get header */
-        if (fgets(buf, 1024, file) == NULL)
+        if (fgets(buf, 1024, file) == NULL) {
+                fclose(file);
                return -1;
+        }
        /* first line will contain the last register
         * and gpu name */
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 71727460968f..8760d66e058a 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -131,7 +131,8 @@ void r100_hpd_init(struct radeon_device *rdev)
                        break;
                }
        }
-        r100_irq_set(rdev);
+        if (rdev->irq.installed)
+                r100_irq_set(rdev);
 }
 void r100_hpd_fini(struct radeon_device *rdev)
@@ -243,6 +244,11 @@ int r100_irq_set(struct radeon_device *rdev)
 {
        uint32_t tmp = 0;
+        if (!rdev->irq.installed) {
+                WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+                WREG32(R_000040_GEN_INT_CNTL, 0);
+                return -EINVAL;
+        }
        if (rdev->irq.sw_int) {
                tmp |= RADEON_SW_INT_ENABLE;
        }
@@ -356,6 +362,11 @@ void r100_fence_ring_emit(struct radeon_device *rdev,
        /* Wait until IDLE & CLEAN */
        radeon_ring_write(rdev, PACKET0(0x1720, 0));
        radeon_ring_write(rdev, (1 << 16) | (1 << 17));
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r100.hdp_cntl |
+                                RADEON_HDP_READ_BUFFER_INVALIDATE);
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r100.hdp_cntl);
        /* Emit fence sequence & fire IRQ */
        radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
        radeon_ring_write(rdev, fence->seq);
@@ -1713,14 +1724,6 @@ void r100_gpu_init(struct radeon_device *rdev)
        r100_hdp_reset(rdev);
 }
-void r100_hdp_flush(struct radeon_device *rdev)
-{
-        u32 tmp;
-        tmp = RREG32(RADEON_HOST_PATH_CNTL);
-        tmp |= RADEON_HDP_READ_BUFFER_INVALIDATE;
-        WREG32(RADEON_HOST_PATH_CNTL, tmp);
-}
 void r100_hdp_reset(struct radeon_device *rdev)
 {
        uint32_t tmp;
@@ -3313,6 +3316,7 @@ static int r100_startup(struct radeon_device *rdev)
        }
        /* Enable IRQ */
        r100_irq_set(rdev);
+        rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
@@ -3371,6 +3375,7 @@ void r100_fini(struct radeon_device *rdev)
        radeon_gem_fini(rdev);
        if (rdev->flags & RADEON_IS_PCI)
                r100_pci_gart_fini(rdev);
+        radeon_agp_fini(rdev);
        radeon_irq_kms_fini(rdev);
        radeon_fence_driver_fini(rdev);
        radeon_bo_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3f2cc9e2e8d9..0051d11b907c 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -36,7 +36,15 @@
 #include "rv350d.h"
 #include "r300_reg_safe.h"
-/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380 */
+/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380
+ *
+ * GPU Errata:
+ * - HOST_PATH_CNTL: r300 family seems to dislike write to HOST_PATH_CNTL
+ *   using MMIO to flush host path read cache, this lead to HARDLOCKUP.
+ *   However, scheduling such write to the ring seems harmless, i suspect
+ *   the CP read collide with the flush somehow, or maybe the MC, hard to
+ *   tell. (Jerome Glisse)
+ */
 /*
 * rv370,rv380 PCIE GART
@@ -178,6 +186,11 @@ void r300_fence_ring_emit(struct radeon_device *rdev,
        /* Wait until IDLE & CLEAN */
        radeon_ring_write(rdev, PACKET0(0x1720, 0));
        radeon_ring_write(rdev, (1 << 17) | (1 << 16)  | (1 << 9));
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r300.hdp_cntl |
+                                RADEON_HDP_READ_BUFFER_INVALIDATE);
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r300.hdp_cntl);
        /* Emit fence sequence & fire IRQ */
        radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
        radeon_ring_write(rdev, fence->seq);
@@ -1258,6 +1271,7 @@ static int r300_startup(struct radeon_device *rdev)
        }
        /* Enable IRQ */
        r100_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
@@ -1322,6 +1336,7 @@ void r300_fini(struct radeon_device *rdev)
                rv370_pcie_gart_fini(rdev);
        if (rdev->flags & RADEON_IS_PCI)
                r100_pci_gart_fini(rdev);
+        radeon_agp_fini(rdev);
        radeon_irq_kms_fini(rdev);
        radeon_fence_driver_fini(rdev);
        radeon_bo_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index c05a7270cf0c..053404e71a9d 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -30,7 +30,15 @@
 #include "radeon_reg.h"
 #include "radeon.h"
 #include "atom.h"
+#include "r100d.h"
 #include "r420d.h"
+#include "r420_reg_safe.h"
+static void r420_set_reg_safe(struct radeon_device *rdev)
+{
+        rdev->config.r300.reg_safe_bm = r420_reg_safe_bm;
+        rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm);
+}
 int r420_mc_init(struct radeon_device *rdev)
 {
@@ -165,6 +173,34 @@ static void r420_clock_resume(struct radeon_device *rdev)
        WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
 }
+static void r420_cp_errata_init(struct radeon_device *rdev)
+{
+        /* RV410 and R420 can lock up if CP DMA to host memory happens
+         * while the 2D engine is busy.
+         *
+         * The proper workaround is to queue a RESYNC at the beginning
+         * of the CP init, apparently.
+         */
+        radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
+        radeon_ring_lock(rdev, 8);
+        radeon_ring_write(rdev, PACKET0(R300_CP_RESYNC_ADDR, 1));
+        radeon_ring_write(rdev, rdev->config.r300.resync_scratch);
+        radeon_ring_write(rdev, 0xDEADBEEF);
+        radeon_ring_unlock_commit(rdev);
+}
+static void r420_cp_errata_fini(struct radeon_device *rdev)
+{
+        /* Catch the RESYNC we dispatched all the way back,
+         * at the very beginning of the CP init.
+         */
+        radeon_ring_lock(rdev, 8);
+        radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
+        radeon_ring_write(rdev, R300_RB3D_DC_FINISH);
+        radeon_ring_unlock_commit(rdev);
+        radeon_scratch_free(rdev, rdev->config.r300.resync_scratch);
+}
 static int r420_startup(struct radeon_device *rdev)
 {
        int r;
@@ -190,12 +226,14 @@ static int r420_startup(struct radeon_device *rdev)
        r420_pipes_init(rdev);
        /* Enable IRQ */
        r100_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
                dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
                return r;
        }
+        r420_cp_errata_init(rdev);
        r = r100_wb_init(rdev);
        if (r) {
                dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
@@ -238,6 +276,7 @@ int r420_resume(struct radeon_device *rdev)
 int r420_suspend(struct radeon_device *rdev)
 {
+        r420_cp_errata_fini(rdev);
        r100_cp_disable(rdev);
        r100_wb_disable(rdev);
        r100_irq_disable(rdev);
@@ -346,7 +385,7 @@ int r420_init(struct radeon_device *rdev)
                if (r)
                        return r;
        }
-        r300_set_reg_safe(rdev);
+        r420_set_reg_safe(rdev);
        rdev->accel_working = true;
        r = r420_startup(rdev);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 0f3843b6dac7..9a189072f2b9 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -186,6 +186,7 @@ static int r520_startup(struct radeon_device *rdev)
        }
        /* Enable IRQ */
        rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index a0ac3c134b1b..c0651991c3e4 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -285,7 +285,8 @@ void r600_hpd_init(struct radeon_device *rdev)
                        }
                }
        }
-        r600_irq_set(rdev);
+        if (rdev->irq.installed)
+                r600_irq_set(rdev);
 }
 void r600_hpd_fini(struct radeon_device *rdev)
@@ -726,6 +727,10 @@ int r600_mc_init(struct radeon_device *rdev)
        a.full = rfixed_const(100);
        rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
        rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+        if (rdev->flags & RADEON_IS_IGP)
+                rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
        return 0;
 }
@@ -1384,11 +1389,6 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
        (void)RREG32(PCIE_PORT_DATA);
 }
-void r600_hdp_flush(struct radeon_device *rdev)
-{
-        WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
-}
 /*
 * CP & Ring
 */
@@ -1785,6 +1785,8 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
        radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
        radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
        radeon_ring_write(rdev, fence->seq);
+        radeon_ring_write(rdev, PACKET0(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0));
+        radeon_ring_write(rdev, 1);
        /* CP_INTERRUPT packet 3 no longer exists, use packet 0 */
        radeon_ring_write(rdev, PACKET0(CP_INT_STATUS, 0));
        radeon_ring_write(rdev, RB_INT_STAT);
@@ -2089,8 +2091,7 @@ void r600_fini(struct radeon_device *rdev)
        radeon_gem_fini(rdev);
        radeon_fence_driver_fini(rdev);
        radeon_clocks_fini(rdev);
-        if (rdev->flags & RADEON_IS_AGP)
+        radeon_agp_fini(rdev);
-                radeon_agp_fini(rdev);
        radeon_bo_fini(rdev);
        radeon_atombios_fini(rdev);
        kfree(rdev->bios);
@@ -2461,6 +2462,10 @@ int r600_irq_set(struct radeon_device *rdev)
        u32 mode_int = 0;
        u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;
+        if (!rdev->irq.installed) {
+                WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+                return -EINVAL;
+        }
        /* don't enable anything if the ih is disabled */
        if (!rdev->ih.enabled)
                return 0;
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 9aecafb51b66..8787ea89dc6e 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -577,9 +577,9 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
        ring_size = num_loops * dwords_per_loop;
        /* set default  + shaders */
        ring_size += 40; /* shaders + def state */
-        ring_size += 5; /* fence emit for VB IB */
+        ring_size += 7; /* fence emit for VB IB */
        ring_size += 5; /* done copy */
-        ring_size += 5; /* fence emit for done copy */
+        ring_size += 7; /* fence emit for done copy */
        r = radeon_ring_lock(rdev, ring_size);
        WARN_ON(r);
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 53b55608102b..eb5f99b9469d 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -319,10 +319,12 @@ struct radeon_mc {
        u64                     real_vram_size;
        int                     vram_mtrr;
        bool                    vram_is_ddr;
+        bool                    igp_sideport_enabled;
 };
 int radeon_mc_setup(struct radeon_device *rdev);
+bool radeon_combios_sideport_present(struct radeon_device *rdev);
+bool radeon_atombios_sideport_present(struct radeon_device *rdev);
 /*
 * GPU scratch registers structures, functions & helpers
@@ -654,7 +656,6 @@ struct radeon_asic {
                               uint32_t offset, uint32_t obj_size);
        int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
        void (*bandwidth_update)(struct radeon_device *rdev);
-        void (*hdp_flush)(struct radeon_device *rdev);
        void (*hpd_init)(struct radeon_device *rdev);
        void (*hpd_fini)(struct radeon_device *rdev);
        bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -667,11 +668,14 @@ struct radeon_asic {
 struct r100_asic {
        const unsigned  *reg_safe_bm;
        unsigned        reg_safe_bm_size;
+        u32             hdp_cntl;
 };
 struct r300_asic {
        const unsigned  *reg_safe_bm;
        unsigned        reg_safe_bm_size;
+        u32             resync_scratch;
+        u32             hdp_cntl;
 };
 struct r600_asic {
@@ -1007,7 +1011,6 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
 #define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
-#define radeon_hdp_flush(rdev) (rdev)->asic->hdp_flush((rdev))
 #define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev))
 #define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev))
 #define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd))
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c
index 54bf49a6d676..220f454ea9fa 100644
--- a/drivers/gpu/drm/radeon/radeon_agp.c
+++ b/drivers/gpu/drm/radeon/radeon_agp.c
@@ -252,10 +252,8 @@ void radeon_agp_resume(struct radeon_device *rdev)
 void radeon_agp_fini(struct radeon_device *rdev)
 {
 #if __OS_HAS_AGP
-        if (rdev->flags & RADEON_IS_AGP) {
+        if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
-                if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
+                drm_agp_release(rdev->ddev);
-                        drm_agp_release(rdev->ddev);
-                }
        }
 #endif
 }
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index eb29217bbf1d..f2fbd2e4e9df 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -77,7 +77,6 @@ int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
 void r100_bandwidth_update(struct radeon_device *rdev);
 void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
 int r100_ring_test(struct radeon_device *rdev);
-void r100_hdp_flush(struct radeon_device *rdev);
 void r100_hpd_init(struct radeon_device *rdev);
 void r100_hpd_fini(struct radeon_device *rdev);
 bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -114,7 +113,6 @@ static struct radeon_asic r100_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &r100_hpd_init,
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
@@ -174,7 +172,6 @@ static struct radeon_asic r300_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &r100_hpd_init,
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
@@ -218,7 +215,6 @@ static struct radeon_asic r420_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &r100_hpd_init,
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
@@ -267,7 +263,6 @@ static struct radeon_asic rs400_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &r100_hpd_init,
        .hpd_fini = &r100_hpd_fini,
        .hpd_sense = &r100_hpd_sense,
@@ -324,7 +319,6 @@ static struct radeon_asic rs600_asic = {
        .set_pcie_lanes = NULL,
        .set_clock_gating = &radeon_atom_set_clock_gating,
        .bandwidth_update = &rs600_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &rs600_hpd_init,
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
@@ -372,7 +366,6 @@ static struct radeon_asic rs690_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &rs690_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &rs600_hpd_init,
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
@@ -424,7 +417,6 @@ static struct radeon_asic rv515_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &rs600_hpd_init,
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
@@ -467,7 +459,6 @@ static struct radeon_asic r520_asic = {
        .set_surface_reg = r100_set_surface_reg,
        .clear_surface_reg = r100_clear_surface_reg,
        .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
        .hpd_init = &rs600_hpd_init,
        .hpd_fini = &rs600_hpd_fini,
        .hpd_sense = &rs600_hpd_sense,
@@ -508,7 +499,6 @@ int r600_ring_test(struct radeon_device *rdev);
 int r600_copy_blit(struct radeon_device *rdev,
                   uint64_t src_offset, uint64_t dst_offset,
                   unsigned num_pages, struct radeon_fence *fence);
-void r600_hdp_flush(struct radeon_device *rdev);
 void r600_hpd_init(struct radeon_device *rdev);
 void r600_hpd_fini(struct radeon_device *rdev);
 bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -544,7 +534,6 @@ static struct radeon_asic r600_asic = {
        .set_surface_reg = r600_set_surface_reg,
        .clear_surface_reg = r600_clear_surface_reg,
        .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r600_hdp_flush,
        .hpd_init = &r600_hpd_init,
        .hpd_fini = &r600_hpd_fini,
        .hpd_sense = &r600_hpd_sense,
@@ -589,7 +578,6 @@ static struct radeon_asic rv770_asic = {
        .set_surface_reg = r600_set_surface_reg,
        .clear_surface_reg = r600_clear_surface_reg,
        .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r600_hdp_flush,
        .hpd_init = &r600_hpd_init,
        .hpd_fini = &r600_hpd_fini,
        .hpd_sense = &r600_hpd_sense,
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 41dd8ebff219..fa82ca74324e 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -346,7 +346,9 @@ const int object_connector_convert[] = {
        DRM_MODE_CONNECTOR_Unknown,
        DRM_MODE_CONNECTOR_Unknown,
        DRM_MODE_CONNECTOR_Unknown,
-        DRM_MODE_CONNECTOR_DisplayPort
+        DRM_MODE_CONNECTOR_DisplayPort,
+        DRM_MODE_CONNECTOR_eDP,
+        DRM_MODE_CONNECTOR_Unknown
 };
 bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
@@ -936,6 +938,43 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
        return false;
 }
+union igp_info {
+        struct _ATOM_INTEGRATED_SYSTEM_INFO info;
+        struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2;
+};
+bool radeon_atombios_sideport_present(struct radeon_device *rdev)
+{
+        struct radeon_mode_info *mode_info = &rdev->mode_info;
+        int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
+        union igp_info *igp_info;
+        u8 frev, crev;
+        u16 data_offset;
+        atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
+                               &crev, &data_offset);
+        igp_info = (union igp_info *)(mode_info->atom_context->bios +
+                                      data_offset);
+        if (igp_info) {
+                switch (crev) {
+                case 1:
+                        if (igp_info->info.ucMemoryType & 0xf0)
+                                return true;
+                        break;
+                case 2:
+                        if (igp_info->info_2.ucMemoryType & 0x0f)
+                                return true;
+                        break;
+                default:
+                        DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev);
+                        break;
+                }
+        }
+        return false;
+}
 bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
                                   struct radeon_encoder_int_tmds *tmds)
 {
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 58f342659cc7..7914455c96ca 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -595,6 +595,20 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
        return false;
 }
+bool radeon_combios_sideport_present(struct radeon_device *rdev)
+{
+        struct drm_device *dev = rdev->ddev;
+        u16 igp_info;
+        igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
+        if (igp_info) {
+                if (RBIOS16(igp_info + 0x4))
+                        return true;
+        }
+        return false;
+}
 static const uint32_t default_primarydac_adj[CHIP_LAST] = {
        0x00000808,             /* r100  */
        0x00000808,             /* rv100 */
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index b82ae61d4d17..9da10dd5df80 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -49,8 +49,10 @@ void radeon_connector_hotplug(struct drm_connector *connector)
        if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
                radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
-        if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+        if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
-                if (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+            (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
+                if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+                    (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) {
                        if (radeon_dp_needs_link_train(radeon_connector)) {
                                if (connector->encoder)
                                        dp_link_train(connector->encoder, connector);
@@ -967,7 +969,8 @@ static enum drm_connector_status radeon_dp_detect(struct drm_connector *connecto
        }
        sink_type = radeon_dp_getsinktype(radeon_connector);
-        if (sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+        if ((sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+            (sink_type == CONNECTOR_OBJECT_ID_eDP)) {
                if (radeon_dp_getdpcd(radeon_connector)) {
                        radeon_dig_connector->dp_sink_type = sink_type;
                        ret = connector_status_connected;
@@ -992,7 +995,8 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
        /* XXX check mode bandwidth */
-        if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
+        if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+            (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
                return radeon_dp_mode_valid_helper(radeon_connector, mode);
        else
                return MODE_OK;
@@ -1145,6 +1149,7 @@ radeon_add_atom_connector(struct drm_device *dev,
                subpixel_order = SubPixelHorizontalRGB;
                break;
        case DRM_MODE_CONNECTOR_DisplayPort:
+        case DRM_MODE_CONNECTOR_eDP:
                radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
                if (!radeon_dig_connector)
                        goto failed;
@@ -1157,10 +1162,16 @@ radeon_add_atom_connector(struct drm_device *dev,
                        goto failed;
                if (i2c_bus->valid) {
                        /* add DP i2c bus */
-                        radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
+                        if (connector_type == DRM_MODE_CONNECTOR_eDP)
+                                radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
+                        else
+                                radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
                        if (!radeon_dig_connector->dp_i2c_bus)
                                goto failed;
-                        radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
+                        if (connector_type == DRM_MODE_CONNECTOR_eDP)
+                                radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "eDP");
+                        else
+                                radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
                        if (!radeon_connector->ddc_bus)
                                goto failed;
                }
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 1fb2f029d7e8..0ec491ead2ff 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -234,7 +234,7 @@ static const char *encoder_names[34] = {
        "INTERNAL_UNIPHY2",
 };
-static const char *connector_names[13] = {
+static const char *connector_names[15] = {
        "Unknown",
        "VGA",
        "DVI-I",
@@ -248,6 +248,8 @@ static const char *connector_names[13] = {
        "DisplayPort",
        "HDMI-A",
        "HDMI-B",
+        "TV",
+        "eDP",
 };
 static const char *hpd_names[7] = {
@@ -352,7 +354,8 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
 {
        int ret = 0;
-        if (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+        if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
+            (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
                struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
                if (dig->dp_i2c_bus)
                        radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index ccba95f83d11..82eb551970b9 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -596,21 +596,23 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
                return ATOM_ENCODER_MODE_LVDS;
                break;
        case DRM_MODE_CONNECTOR_DisplayPort:
+        case DRM_MODE_CONNECTOR_eDP:
                radeon_dig_connector = radeon_connector->con_priv;
-                if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
+                if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+                    (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
                        return ATOM_ENCODER_MODE_DP;
                else if (drm_detect_hdmi_monitor(radeon_connector->edid))
                        return ATOM_ENCODER_MODE_HDMI;
                else
                        return ATOM_ENCODER_MODE_DVI;
                break;
-        case CONNECTOR_DVI_A:
+        case DRM_MODE_CONNECTOR_DVIA:
-        case CONNECTOR_VGA:
+        case DRM_MODE_CONNECTOR_VGA:
                return ATOM_ENCODER_MODE_CRT;
                break;
-        case CONNECTOR_STV:
+        case DRM_MODE_CONNECTOR_Composite:
-        case CONNECTOR_CTV:
+        case DRM_MODE_CONNECTOR_SVIDEO:
-        case CONNECTOR_DIN:
+        case DRM_MODE_CONNECTOR_9PinDIN:
                /* fix me */
                return ATOM_ENCODER_MODE_TV;
                /*return ATOM_ENCODER_MODE_CV;*/
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index 60df2d7e7e4c..0e1325e18534 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -131,7 +131,6 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj,
                        printk(KERN_ERR "Failed to wait for object !\n");
                        return r;
                }
-                radeon_hdp_flush(robj->rdev);
        }
        return 0;
 }
@@ -312,7 +311,6 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
        mutex_lock(&dev->struct_mutex);
        drm_gem_object_unreference(gobj);
        mutex_unlock(&dev->struct_mutex);
-        radeon_hdp_flush(robj->rdev);
        return r;
 }
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 9223296fe37b..3cfd60fd0083 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -97,6 +97,7 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
        rdev->irq.sw_int = false;
        for (i = 0; i < 2; i++) {
                rdev->irq.crtc_vblank_int[i] = false;
+                rdev->irq.hpd[i] = false;
        }
        radeon_irq_set(rdev);
 }
@@ -128,17 +129,22 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
                        DRM_INFO("radeon: using MSI.\n");
                }
        }
-        drm_irq_install(rdev->ddev);
        rdev->irq.installed = true;
+        r = drm_irq_install(rdev->ddev);
+        if (r) {
+                rdev->irq.installed = false;
+                return r;
+        }
        DRM_INFO("radeon: irq initialized.\n");
        return 0;
 }
 void radeon_irq_kms_fini(struct radeon_device *rdev)
 {
+        drm_vblank_cleanup(rdev->ddev);
        if (rdev->irq.installed) {
-                rdev->irq.installed = false;
                drm_irq_uninstall(rdev->ddev);
+                rdev->irq.installed = false;
                if (rdev->msi_enabled)
                        pci_disable_msi(rdev->pdev);
        }
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
index 3a12bb0c0563..417684daef4c 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -77,7 +77,7 @@ struct radeon_tv_mode_constants {
        unsigned pix_to_tv;
 };
-static const uint16_t hor_timing_NTSC[] = {
+static const uint16_t hor_timing_NTSC[MAX_H_CODE_TIMING_LEN] = {
        0x0007,
        0x003f,
        0x0263,
@@ -98,7 +98,7 @@ static const uint16_t hor_timing_NTSC[] = {
        0
 };
-static const uint16_t vert_timing_NTSC[] = {
+static const uint16_t vert_timing_NTSC[MAX_V_CODE_TIMING_LEN] = {
        0x2001,
        0x200d,
        0x1006,
@@ -115,7 +115,7 @@ static const uint16_t vert_timing_NTSC[] = {
        0
 };
-static const uint16_t hor_timing_PAL[] = {
+static const uint16_t hor_timing_PAL[MAX_H_CODE_TIMING_LEN] = {
        0x0007,
        0x0058,
        0x027c,
@@ -136,7 +136,7 @@ static const uint16_t hor_timing_PAL[] = {
        0
 };
-static const uint16_t vert_timing_PAL[] =       {
+static const uint16_t vert_timing_PAL[MAX_V_CODE_TIMING_LEN] = {
        0x2001,
        0x200c,
        0x1005,
@@ -623,9 +623,9 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
        }
        flicker_removal = (tmp + 500) / 1000;
-        if (flicker_removal < 3)
+        if (flicker_removal < 2)
-                flicker_removal = 3;
+                flicker_removal = 2;
-        for (i = 0; i < 6; ++i) {
+        for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
                if (flicker_removal == SLOPE_limit[i])
                        break;
        }
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 402369db5ba0..91cb041cb40d 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -46,32 +46,6 @@ struct radeon_device;
 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
-enum radeon_connector_type {
-        CONNECTOR_NONE,
-        CONNECTOR_VGA,
-        CONNECTOR_DVI_I,
-        CONNECTOR_DVI_D,
-        CONNECTOR_DVI_A,
-        CONNECTOR_STV,
-        CONNECTOR_CTV,
-        CONNECTOR_LVDS,
-        CONNECTOR_DIGITAL,
-        CONNECTOR_SCART,
-        CONNECTOR_HDMI_TYPE_A,
-        CONNECTOR_HDMI_TYPE_B,
-        CONNECTOR_0XC,
-        CONNECTOR_0XD,
-        CONNECTOR_DIN,
-        CONNECTOR_DISPLAY_PORT,
-        CONNECTOR_UNSUPPORTED
-};
-enum radeon_dvi_type {
-        DVI_AUTO,
-        DVI_DIGITAL,
-        DVI_ANALOG
-};
 enum radeon_rmx_type {
        RMX_OFF,
        RMX_FULL,
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index d9ffe1f56e8f..4e636de877b2 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -221,8 +221,9 @@ int radeon_bo_unpin(struct radeon_bo *bo)
 int radeon_bo_evict_vram(struct radeon_device *rdev)
 {
        if (rdev->flags & RADEON_IS_IGP) {
-                /* Useless to evict on IGP chips */
+                if (rdev->mc.igp_sideport_enabled == false)
-                return 0;
+                        /* Useless to evict on IGP chips */
+                        return 0;
        }
        return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 }
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420
new file mode 100644
index 000000000000..989f7a020832
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/r420
@@ -0,0 +1,795 @@
+r420 0x4f60
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1D98 VAP_VPORT_XSCALE
+0x1D9C VAP_VPORT_XOFFSET
+0x1DA0 VAP_VPORT_YSCALE
+0x1DA4 VAP_VPORT_YOFFSET
+0x1DA8 VAP_VPORT_ZSCALE
+0x1DAC VAP_VPORT_ZOFFSET
+0x2080 VAP_CNTL
+0x2090 VAP_OUT_VTX_FMT_0
+0x2094 VAP_OUT_VTX_FMT_1
+0x20B0 VAP_VTE_CNTL
+0x2138 VAP_VF_MIN_VTX_INDX
+0x2140 VAP_CNTL_STATUS
+0x2150 VAP_PROG_STREAM_CNTL_0
+0x2154 VAP_PROG_STREAM_CNTL_1
+0x2158 VAP_PROG_STREAM_CNTL_2
+0x215C VAP_PROG_STREAM_CNTL_3
+0x2160 VAP_PROG_STREAM_CNTL_4
+0x2164 VAP_PROG_STREAM_CNTL_5
+0x2168 VAP_PROG_STREAM_CNTL_6
+0x216C VAP_PROG_STREAM_CNTL_7
+0x2180 VAP_VTX_STATE_CNTL
+0x2184 VAP_VSM_VTX_ASSM
+0x2188 VAP_VTX_STATE_IND_REG_0
+0x218C VAP_VTX_STATE_IND_REG_1
+0x2190 VAP_VTX_STATE_IND_REG_2
+0x2194 VAP_VTX_STATE_IND_REG_3
+0x2198 VAP_VTX_STATE_IND_REG_4
+0x219C VAP_VTX_STATE_IND_REG_5
+0x21A0 VAP_VTX_STATE_IND_REG_6
+0x21A4 VAP_VTX_STATE_IND_REG_7
+0x21A8 VAP_VTX_STATE_IND_REG_8
+0x21AC VAP_VTX_STATE_IND_REG_9
+0x21B0 VAP_VTX_STATE_IND_REG_10
+0x21B4 VAP_VTX_STATE_IND_REG_11
+0x21B8 VAP_VTX_STATE_IND_REG_12
+0x21BC VAP_VTX_STATE_IND_REG_13
+0x21C0 VAP_VTX_STATE_IND_REG_14
+0x21C4 VAP_VTX_STATE_IND_REG_15
+0x21DC VAP_PSC_SGN_NORM_CNTL
+0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
+0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
+0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
+0x21EC VAP_PROG_STREAM_CNTL_EXT_3
+0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
+0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
+0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
+0x21FC VAP_PROG_STREAM_CNTL_EXT_7
+0x2200 VAP_PVS_VECTOR_INDX_REG
+0x2204 VAP_PVS_VECTOR_DATA_REG
+0x2208 VAP_PVS_VECTOR_DATA_REG_128
+0x221C VAP_CLIP_CNTL
+0x2220 VAP_GB_VERT_CLIP_ADJ
+0x2224 VAP_GB_VERT_DISC_ADJ
+0x2228 VAP_GB_HORZ_CLIP_ADJ
+0x222C VAP_GB_HORZ_DISC_ADJ
+0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
+0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
+0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
+0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
+0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
+0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
+0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
+0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
+0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
+0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
+0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
+0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
+0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
+0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
+0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
+0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x2288 VAP_PVS_VTX_TIMEOUT_REG
+0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
+0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
+0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
+0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
+0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
+0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
+0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
+0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
+0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
+0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
+0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
+0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
+0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
+0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
+0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
+0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
+0x22D0 VAP_PVS_CODE_CNTL_0
+0x22D4 VAP_PVS_CONST_CNTL
+0x22D8 VAP_PVS_CODE_CNTL_1
+0x22DC VAP_PVS_FLOW_CNTL_OPC
+0x342C RB2D_DSTCACHE_CTLSTAT
+0x4000 GB_VAP_RASTER_VTX_FMT_0
+0x4004 GB_VAP_RASTER_VTX_FMT_1
+0x4008 GB_ENABLE
+0x401C GB_SELECT
+0x4020 GB_AA_CONFIG
+0x4024 GB_FIFO_SIZE
+0x4100 TX_INVALTAGS
+0x4200 GA_POINT_S0
+0x4204 GA_POINT_T0
+0x4208 GA_POINT_S1
+0x420C GA_POINT_T1
+0x4214 GA_TRIANGLE_STIPPLE
+0x421C GA_POINT_SIZE
+0x4230 GA_POINT_MINMAX
+0x4234 GA_LINE_CNTL
+0x4238 GA_LINE_STIPPLE_CONFIG
+0x4260 GA_LINE_STIPPLE_VALUE
+0x4264 GA_LINE_S0
+0x4268 GA_LINE_S1
+0x4278 GA_COLOR_CONTROL
+0x427C GA_SOLID_RG
+0x4280 GA_SOLID_BA
+0x4288 GA_POLY_MODE
+0x428C GA_ROUND_MODE
+0x4290 GA_OFFSET
+0x4294 GA_FOG_SCALE
+0x4298 GA_FOG_OFFSET
+0x42A0 SU_TEX_WRAP
+0x42A4 SU_POLY_OFFSET_FRONT_SCALE
+0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
+0x42AC SU_POLY_OFFSET_BACK_SCALE
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
+0x42B4 SU_POLY_OFFSET_ENABLE
+0x42B8 SU_CULL_MODE
+0x42C0 SU_DEPTH_SCALE
+0x42C4 SU_DEPTH_OFFSET
+0x42C8 SU_REG_DEST
+0x4300 RS_COUNT
+0x4304 RS_INST_COUNT
+0x4310 RS_IP_0
+0x4314 RS_IP_1
+0x4318 RS_IP_2
+0x431C RS_IP_3
+0x4320 RS_IP_4
+0x4324 RS_IP_5
+0x4328 RS_IP_6
+0x432C RS_IP_7
+0x4330 RS_INST_0
+0x4334 RS_INST_1
+0x4338 RS_INST_2
+0x433C RS_INST_3
+0x4340 RS_INST_4
+0x4344 RS_INST_5
+0x4348 RS_INST_6
+0x434C RS_INST_7
+0x4350 RS_INST_8
+0x4354 RS_INST_9
+0x4358 RS_INST_10
+0x435C RS_INST_11
+0x4360 RS_INST_12
+0x4364 RS_INST_13
+0x4368 RS_INST_14
+0x436C RS_INST_15
+0x43A4 SC_HYPERZ_EN
+0x43A8 SC_EDGERULE
+0x43B0 SC_CLIP_0_A
+0x43B4 SC_CLIP_0_B
+0x43B8 SC_CLIP_1_A
+0x43BC SC_CLIP_1_B
+0x43C0 SC_CLIP_2_A
+0x43C4 SC_CLIP_2_B
+0x43C8 SC_CLIP_3_A
+0x43CC SC_CLIP_3_B
+0x43D0 SC_CLIP_RULE
+0x43E0 SC_SCISSOR0
+0x43E8 SC_SCREENDOOR
+0x4440 TX_FILTER1_0
+0x4444 TX_FILTER1_1
+0x4448 TX_FILTER1_2
+0x444C TX_FILTER1_3
+0x4450 TX_FILTER1_4
+0x4454 TX_FILTER1_5
+0x4458 TX_FILTER1_6
+0x445C TX_FILTER1_7
+0x4460 TX_FILTER1_8
+0x4464 TX_FILTER1_9
+0x4468 TX_FILTER1_10
+0x446C TX_FILTER1_11
+0x4470 TX_FILTER1_12
+0x4474 TX_FILTER1_13
+0x4478 TX_FILTER1_14
+0x447C TX_FILTER1_15
+0x4580 TX_CHROMA_KEY_0
+0x4584 TX_CHROMA_KEY_1
+0x4588 TX_CHROMA_KEY_2
+0x458C TX_CHROMA_KEY_3
+0x4590 TX_CHROMA_KEY_4
+0x4594 TX_CHROMA_KEY_5
+0x4598 TX_CHROMA_KEY_6
+0x459C TX_CHROMA_KEY_7
+0x45A0 TX_CHROMA_KEY_8
+0x45A4 TX_CHROMA_KEY_9
+0x45A8 TX_CHROMA_KEY_10
+0x45AC TX_CHROMA_KEY_11
+0x45B0 TX_CHROMA_KEY_12
+0x45B4 TX_CHROMA_KEY_13
+0x45B8 TX_CHROMA_KEY_14
+0x45BC TX_CHROMA_KEY_15
+0x45C0 TX_BORDER_COLOR_0
+0x45C4 TX_BORDER_COLOR_1
+0x45C8 TX_BORDER_COLOR_2
+0x45CC TX_BORDER_COLOR_3
+0x45D0 TX_BORDER_COLOR_4
+0x45D4 TX_BORDER_COLOR_5
+0x45D8 TX_BORDER_COLOR_6
+0x45DC TX_BORDER_COLOR_7
+0x45E0 TX_BORDER_COLOR_8
+0x45E4 TX_BORDER_COLOR_9
+0x45E8 TX_BORDER_COLOR_10
+0x45EC TX_BORDER_COLOR_11
+0x45F0 TX_BORDER_COLOR_12
+0x45F4 TX_BORDER_COLOR_13
+0x45F8 TX_BORDER_COLOR_14
+0x45FC TX_BORDER_COLOR_15
+0x4600 US_CONFIG
+0x4604 US_PIXSIZE
+0x4608 US_CODE_OFFSET
+0x460C US_RESET
+0x4610 US_CODE_ADDR_0
+0x4614 US_CODE_ADDR_1
+0x4618 US_CODE_ADDR_2
+0x461C US_CODE_ADDR_3
+0x4620 US_TEX_INST_0
+0x4624 US_TEX_INST_1
+0x4628 US_TEX_INST_2
+0x462C US_TEX_INST_3
+0x4630 US_TEX_INST_4
+0x4634 US_TEX_INST_5
+0x4638 US_TEX_INST_6
+0x463C US_TEX_INST_7
+0x4640 US_TEX_INST_8
+0x4644 US_TEX_INST_9
+0x4648 US_TEX_INST_10
+0x464C US_TEX_INST_11
+0x4650 US_TEX_INST_12
+0x4654 US_TEX_INST_13
+0x4658 US_TEX_INST_14
+0x465C US_TEX_INST_15
+0x4660 US_TEX_INST_16
+0x4664 US_TEX_INST_17
+0x4668 US_TEX_INST_18
+0x466C US_TEX_INST_19
+0x4670 US_TEX_INST_20
+0x4674 US_TEX_INST_21
+0x4678 US_TEX_INST_22
+0x467C US_TEX_INST_23
+0x4680 US_TEX_INST_24
+0x4684 US_TEX_INST_25
+0x4688 US_TEX_INST_26
+0x468C US_TEX_INST_27
+0x4690 US_TEX_INST_28
+0x4694 US_TEX_INST_29
+0x4698 US_TEX_INST_30
+0x469C US_TEX_INST_31
+0x46A4 US_OUT_FMT_0
+0x46A8 US_OUT_FMT_1
+0x46AC US_OUT_FMT_2
+0x46B0 US_OUT_FMT_3
+0x46B4 US_W_FMT
+0x46B8 US_CODE_BANK
+0x46BC US_CODE_EXT
+0x46C0 US_ALU_RGB_ADDR_0
+0x46C4 US_ALU_RGB_ADDR_1
+0x46C8 US_ALU_RGB_ADDR_2
+0x46CC US_ALU_RGB_ADDR_3
+0x46D0 US_ALU_RGB_ADDR_4
+0x46D4 US_ALU_RGB_ADDR_5
+0x46D8 US_ALU_RGB_ADDR_6
+0x46DC US_ALU_RGB_ADDR_7
+0x46E0 US_ALU_RGB_ADDR_8
+0x46E4 US_ALU_RGB_ADDR_9
+0x46E8 US_ALU_RGB_ADDR_10
+0x46EC US_ALU_RGB_ADDR_11
+0x46F0 US_ALU_RGB_ADDR_12
+0x46F4 US_ALU_RGB_ADDR_13
+0x46F8 US_ALU_RGB_ADDR_14
+0x46FC US_ALU_RGB_ADDR_15
+0x4700 US_ALU_RGB_ADDR_16
+0x4704 US_ALU_RGB_ADDR_17
+0x4708 US_ALU_RGB_ADDR_18
+0x470C US_ALU_RGB_ADDR_19
+0x4710 US_ALU_RGB_ADDR_20
+0x4714 US_ALU_RGB_ADDR_21
+0x4718 US_ALU_RGB_ADDR_22
+0x471C US_ALU_RGB_ADDR_23
+0x4720 US_ALU_RGB_ADDR_24
+0x4724 US_ALU_RGB_ADDR_25
+0x4728 US_ALU_RGB_ADDR_26
+0x472C US_ALU_RGB_ADDR_27
+0x4730 US_ALU_RGB_ADDR_28
+0x4734 US_ALU_RGB_ADDR_29
+0x4738 US_ALU_RGB_ADDR_30
+0x473C US_ALU_RGB_ADDR_31
+0x4740 US_ALU_RGB_ADDR_32
+0x4744 US_ALU_RGB_ADDR_33
+0x4748 US_ALU_RGB_ADDR_34
+0x474C US_ALU_RGB_ADDR_35
+0x4750 US_ALU_RGB_ADDR_36
+0x4754 US_ALU_RGB_ADDR_37
+0x4758 US_ALU_RGB_ADDR_38
+0x475C US_ALU_RGB_ADDR_39
+0x4760 US_ALU_RGB_ADDR_40
+0x4764 US_ALU_RGB_ADDR_41
+0x4768 US_ALU_RGB_ADDR_42
+0x476C US_ALU_RGB_ADDR_43
+0x4770 US_ALU_RGB_ADDR_44
+0x4774 US_ALU_RGB_ADDR_45
+0x4778 US_ALU_RGB_ADDR_46
+0x477C US_ALU_RGB_ADDR_47
+0x4780 US_ALU_RGB_ADDR_48
+0x4784 US_ALU_RGB_ADDR_49
+0x4788 US_ALU_RGB_ADDR_50
+0x478C US_ALU_RGB_ADDR_51
+0x4790 US_ALU_RGB_ADDR_52
+0x4794 US_ALU_RGB_ADDR_53
+0x4798 US_ALU_RGB_ADDR_54
+0x479C US_ALU_RGB_ADDR_55
+0x47A0 US_ALU_RGB_ADDR_56
+0x47A4 US_ALU_RGB_ADDR_57
+0x47A8 US_ALU_RGB_ADDR_58
+0x47AC US_ALU_RGB_ADDR_59
+0x47B0 US_ALU_RGB_ADDR_60
+0x47B4 US_ALU_RGB_ADDR_61
+0x47B8 US_ALU_RGB_ADDR_62
+0x47BC US_ALU_RGB_ADDR_63
+0x47C0 US_ALU_ALPHA_ADDR_0
+0x47C4 US_ALU_ALPHA_ADDR_1
+0x47C8 US_ALU_ALPHA_ADDR_2
+0x47CC US_ALU_ALPHA_ADDR_3
+0x47D0 US_ALU_ALPHA_ADDR_4
+0x47D4 US_ALU_ALPHA_ADDR_5
+0x47D8 US_ALU_ALPHA_ADDR_6
+0x47DC US_ALU_ALPHA_ADDR_7
+0x47E0 US_ALU_ALPHA_ADDR_8
+0x47E4 US_ALU_ALPHA_ADDR_9
+0x47E8 US_ALU_ALPHA_ADDR_10
+0x47EC US_ALU_ALPHA_ADDR_11
+0x47F0 US_ALU_ALPHA_ADDR_12
+0x47F4 US_ALU_ALPHA_ADDR_13
+0x47F8 US_ALU_ALPHA_ADDR_14
+0x47FC US_ALU_ALPHA_ADDR_15
+0x4800 US_ALU_ALPHA_ADDR_16
+0x4804 US_ALU_ALPHA_ADDR_17
+0x4808 US_ALU_ALPHA_ADDR_18
+0x480C US_ALU_ALPHA_ADDR_19
+0x4810 US_ALU_ALPHA_ADDR_20
+0x4814 US_ALU_ALPHA_ADDR_21
+0x4818 US_ALU_ALPHA_ADDR_22
+0x481C US_ALU_ALPHA_ADDR_23
+0x4820 US_ALU_ALPHA_ADDR_24
+0x4824 US_ALU_ALPHA_ADDR_25
+0x4828 US_ALU_ALPHA_ADDR_26
+0x482C US_ALU_ALPHA_ADDR_27
+0x4830 US_ALU_ALPHA_ADDR_28
+0x4834 US_ALU_ALPHA_ADDR_29
+0x4838 US_ALU_ALPHA_ADDR_30
+0x483C US_ALU_ALPHA_ADDR_31
+0x4840 US_ALU_ALPHA_ADDR_32
+0x4844 US_ALU_ALPHA_ADDR_33
+0x4848 US_ALU_ALPHA_ADDR_34
+0x484C US_ALU_ALPHA_ADDR_35
+0x4850 US_ALU_ALPHA_ADDR_36
+0x4854 US_ALU_ALPHA_ADDR_37
+0x4858 US_ALU_ALPHA_ADDR_38
+0x485C US_ALU_ALPHA_ADDR_39
+0x4860 US_ALU_ALPHA_ADDR_40
+0x4864 US_ALU_ALPHA_ADDR_41
+0x4868 US_ALU_ALPHA_ADDR_42
+0x486C US_ALU_ALPHA_ADDR_43
+0x4870 US_ALU_ALPHA_ADDR_44
+0x4874 US_ALU_ALPHA_ADDR_45
+0x4878 US_ALU_ALPHA_ADDR_46
+0x487C US_ALU_ALPHA_ADDR_47
+0x4880 US_ALU_ALPHA_ADDR_48
+0x4884 US_ALU_ALPHA_ADDR_49
+0x4888 US_ALU_ALPHA_ADDR_50
+0x488C US_ALU_ALPHA_ADDR_51
+0x4890 US_ALU_ALPHA_ADDR_52
+0x4894 US_ALU_ALPHA_ADDR_53
+0x4898 US_ALU_ALPHA_ADDR_54
+0x489C US_ALU_ALPHA_ADDR_55
+0x48A0 US_ALU_ALPHA_ADDR_56
+0x48A4 US_ALU_ALPHA_ADDR_57
+0x48A8 US_ALU_ALPHA_ADDR_58
+0x48AC US_ALU_ALPHA_ADDR_59
+0x48B0 US_ALU_ALPHA_ADDR_60
+0x48B4 US_ALU_ALPHA_ADDR_61
+0x48B8 US_ALU_ALPHA_ADDR_62
+0x48BC US_ALU_ALPHA_ADDR_63
+0x48C0 US_ALU_RGB_INST_0
+0x48C4 US_ALU_RGB_INST_1
+0x48C8 US_ALU_RGB_INST_2
+0x48CC US_ALU_RGB_INST_3
+0x48D0 US_ALU_RGB_INST_4
+0x48D4 US_ALU_RGB_INST_5
+0x48D8 US_ALU_RGB_INST_6
+0x48DC US_ALU_RGB_INST_7
+0x48E0 US_ALU_RGB_INST_8
+0x48E4 US_ALU_RGB_INST_9
+0x48E8 US_ALU_RGB_INST_10
+0x48EC US_ALU_RGB_INST_11
+0x48F0 US_ALU_RGB_INST_12
+0x48F4 US_ALU_RGB_INST_13
+0x48F8 US_ALU_RGB_INST_14
+0x48FC US_ALU_RGB_INST_15
+0x4900 US_ALU_RGB_INST_16
+0x4904 US_ALU_RGB_INST_17
+0x4908 US_ALU_RGB_INST_18
+0x490C US_ALU_RGB_INST_19
+0x4910 US_ALU_RGB_INST_20
+0x4914 US_ALU_RGB_INST_21
+0x4918 US_ALU_RGB_INST_22
+0x491C US_ALU_RGB_INST_23
+0x4920 US_ALU_RGB_INST_24
+0x4924 US_ALU_RGB_INST_25
+0x4928 US_ALU_RGB_INST_26
+0x492C US_ALU_RGB_INST_27
+0x4930 US_ALU_RGB_INST_28
+0x4934 US_ALU_RGB_INST_29
+0x4938 US_ALU_RGB_INST_30
+0x493C US_ALU_RGB_INST_31
+0x4940 US_ALU_RGB_INST_32
+0x4944 US_ALU_RGB_INST_33
+0x4948 US_ALU_RGB_INST_34
+0x494C US_ALU_RGB_INST_35
+0x4950 US_ALU_RGB_INST_36
+0x4954 US_ALU_RGB_INST_37
+0x4958 US_ALU_RGB_INST_38
+0x495C US_ALU_RGB_INST_39
+0x4960 US_ALU_RGB_INST_40
+0x4964 US_ALU_RGB_INST_41
+0x4968 US_ALU_RGB_INST_42
+0x496C US_ALU_RGB_INST_43
+0x4970 US_ALU_RGB_INST_44
+0x4974 US_ALU_RGB_INST_45
+0x4978 US_ALU_RGB_INST_46
+0x497C US_ALU_RGB_INST_47
+0x4980 US_ALU_RGB_INST_48
+0x4984 US_ALU_RGB_INST_49
+0x4988 US_ALU_RGB_INST_50
+0x498C US_ALU_RGB_INST_51
+0x4990 US_ALU_RGB_INST_52
+0x4994 US_ALU_RGB_INST_53
+0x4998 US_ALU_RGB_INST_54
+0x499C US_ALU_RGB_INST_55
+0x49A0 US_ALU_RGB_INST_56
+0x49A4 US_ALU_RGB_INST_57
+0x49A8 US_ALU_RGB_INST_58
+0x49AC US_ALU_RGB_INST_59
+0x49B0 US_ALU_RGB_INST_60
+0x49B4 US_ALU_RGB_INST_61
+0x49B8 US_ALU_RGB_INST_62
+0x49BC US_ALU_RGB_INST_63
+0x49C0 US_ALU_ALPHA_INST_0
+0x49C4 US_ALU_ALPHA_INST_1
+0x49C8 US_ALU_ALPHA_INST_2
+0x49CC US_ALU_ALPHA_INST_3
+0x49D0 US_ALU_ALPHA_INST_4
+0x49D4 US_ALU_ALPHA_INST_5
+0x49D8 US_ALU_ALPHA_INST_6
+0x49DC US_ALU_ALPHA_INST_7
+0x49E0 US_ALU_ALPHA_INST_8
+0x49E4 US_ALU_ALPHA_INST_9
+0x49E8 US_ALU_ALPHA_INST_10
+0x49EC US_ALU_ALPHA_INST_11
+0x49F0 US_ALU_ALPHA_INST_12
+0x49F4 US_ALU_ALPHA_INST_13
+0x49F8 US_ALU_ALPHA_INST_14
+0x49FC US_ALU_ALPHA_INST_15
+0x4A00 US_ALU_ALPHA_INST_16
+0x4A04 US_ALU_ALPHA_INST_17
+0x4A08 US_ALU_ALPHA_INST_18
+0x4A0C US_ALU_ALPHA_INST_19
+0x4A10 US_ALU_ALPHA_INST_20
+0x4A14 US_ALU_ALPHA_INST_21
+0x4A18 US_ALU_ALPHA_INST_22
+0x4A1C US_ALU_ALPHA_INST_23
+0x4A20 US_ALU_ALPHA_INST_24
+0x4A24 US_ALU_ALPHA_INST_25
+0x4A28 US_ALU_ALPHA_INST_26
+0x4A2C US_ALU_ALPHA_INST_27
+0x4A30 US_ALU_ALPHA_INST_28
+0x4A34 US_ALU_ALPHA_INST_29
+0x4A38 US_ALU_ALPHA_INST_30
+0x4A3C US_ALU_ALPHA_INST_31
+0x4A40 US_ALU_ALPHA_INST_32
+0x4A44 US_ALU_ALPHA_INST_33
+0x4A48 US_ALU_ALPHA_INST_34
+0x4A4C US_ALU_ALPHA_INST_35
+0x4A50 US_ALU_ALPHA_INST_36
+0x4A54 US_ALU_ALPHA_INST_37
+0x4A58 US_ALU_ALPHA_INST_38
+0x4A5C US_ALU_ALPHA_INST_39
+0x4A60 US_ALU_ALPHA_INST_40
+0x4A64 US_ALU_ALPHA_INST_41
+0x4A68 US_ALU_ALPHA_INST_42
+0x4A6C US_ALU_ALPHA_INST_43
+0x4A70 US_ALU_ALPHA_INST_44
+0x4A74 US_ALU_ALPHA_INST_45
+0x4A78 US_ALU_ALPHA_INST_46
+0x4A7C US_ALU_ALPHA_INST_47
+0x4A80 US_ALU_ALPHA_INST_48
+0x4A84 US_ALU_ALPHA_INST_49
+0x4A88 US_ALU_ALPHA_INST_50
+0x4A8C US_ALU_ALPHA_INST_51
+0x4A90 US_ALU_ALPHA_INST_52
+0x4A94 US_ALU_ALPHA_INST_53
+0x4A98 US_ALU_ALPHA_INST_54
+0x4A9C US_ALU_ALPHA_INST_55
+0x4AA0 US_ALU_ALPHA_INST_56
+0x4AA4 US_ALU_ALPHA_INST_57
+0x4AA8 US_ALU_ALPHA_INST_58
+0x4AAC US_ALU_ALPHA_INST_59
+0x4AB0 US_ALU_ALPHA_INST_60
+0x4AB4 US_ALU_ALPHA_INST_61
+0x4AB8 US_ALU_ALPHA_INST_62
+0x4ABC US_ALU_ALPHA_INST_63
+0x4AC0 US_ALU_EXT_ADDR_0
+0x4AC4 US_ALU_EXT_ADDR_1
+0x4AC8 US_ALU_EXT_ADDR_2
+0x4ACC US_ALU_EXT_ADDR_3
+0x4AD0 US_ALU_EXT_ADDR_4
+0x4AD4 US_ALU_EXT_ADDR_5
+0x4AD8 US_ALU_EXT_ADDR_6
+0x4ADC US_ALU_EXT_ADDR_7
+0x4AE0 US_ALU_EXT_ADDR_8
+0x4AE4 US_ALU_EXT_ADDR_9
+0x4AE8 US_ALU_EXT_ADDR_10
+0x4AEC US_ALU_EXT_ADDR_11
+0x4AF0 US_ALU_EXT_ADDR_12
+0x4AF4 US_ALU_EXT_ADDR_13
+0x4AF8 US_ALU_EXT_ADDR_14
+0x4AFC US_ALU_EXT_ADDR_15
+0x4B00 US_ALU_EXT_ADDR_16
+0x4B04 US_ALU_EXT_ADDR_17
+0x4B08 US_ALU_EXT_ADDR_18
+0x4B0C US_ALU_EXT_ADDR_19
+0x4B10 US_ALU_EXT_ADDR_20
+0x4B14 US_ALU_EXT_ADDR_21
+0x4B18 US_ALU_EXT_ADDR_22
+0x4B1C US_ALU_EXT_ADDR_23
+0x4B20 US_ALU_EXT_ADDR_24
+0x4B24 US_ALU_EXT_ADDR_25
+0x4B28 US_ALU_EXT_ADDR_26
+0x4B2C US_ALU_EXT_ADDR_27
+0x4B30 US_ALU_EXT_ADDR_28
+0x4B34 US_ALU_EXT_ADDR_29
+0x4B38 US_ALU_EXT_ADDR_30
+0x4B3C US_ALU_EXT_ADDR_31
+0x4B40 US_ALU_EXT_ADDR_32
+0x4B44 US_ALU_EXT_ADDR_33
+0x4B48 US_ALU_EXT_ADDR_34
+0x4B4C US_ALU_EXT_ADDR_35
+0x4B50 US_ALU_EXT_ADDR_36
+0x4B54 US_ALU_EXT_ADDR_37
+0x4B58 US_ALU_EXT_ADDR_38
+0x4B5C US_ALU_EXT_ADDR_39
+0x4B60 US_ALU_EXT_ADDR_40
+0x4B64 US_ALU_EXT_ADDR_41
+0x4B68 US_ALU_EXT_ADDR_42
+0x4B6C US_ALU_EXT_ADDR_43
+0x4B70 US_ALU_EXT_ADDR_44
+0x4B74 US_ALU_EXT_ADDR_45
+0x4B78 US_ALU_EXT_ADDR_46
+0x4B7C US_ALU_EXT_ADDR_47
+0x4B80 US_ALU_EXT_ADDR_48
+0x4B84 US_ALU_EXT_ADDR_49
+0x4B88 US_ALU_EXT_ADDR_50
+0x4B8C US_ALU_EXT_ADDR_51
+0x4B90 US_ALU_EXT_ADDR_52
+0x4B94 US_ALU_EXT_ADDR_53
+0x4B98 US_ALU_EXT_ADDR_54
+0x4B9C US_ALU_EXT_ADDR_55
+0x4BA0 US_ALU_EXT_ADDR_56
+0x4BA4 US_ALU_EXT_ADDR_57
+0x4BA8 US_ALU_EXT_ADDR_58
+0x4BAC US_ALU_EXT_ADDR_59
+0x4BB0 US_ALU_EXT_ADDR_60
+0x4BB4 US_ALU_EXT_ADDR_61
+0x4BB8 US_ALU_EXT_ADDR_62
+0x4BBC US_ALU_EXT_ADDR_63
+0x4BC0 FG_FOG_BLEND
+0x4BC4 FG_FOG_FACTOR
+0x4BC8 FG_FOG_COLOR_R
+0x4BCC FG_FOG_COLOR_G
+0x4BD0 FG_FOG_COLOR_B
+0x4BD4 FG_ALPHA_FUNC
+0x4BD8 FG_DEPTH_SRC
+0x4C00 US_ALU_CONST_R_0
+0x4C04 US_ALU_CONST_G_0
+0x4C08 US_ALU_CONST_B_0
+0x4C0C US_ALU_CONST_A_0
+0x4C10 US_ALU_CONST_R_1
+0x4C14 US_ALU_CONST_G_1
+0x4C18 US_ALU_CONST_B_1
+0x4C1C US_ALU_CONST_A_1
+0x4C20 US_ALU_CONST_R_2
+0x4C24 US_ALU_CONST_G_2
+0x4C28 US_ALU_CONST_B_2
+0x4C2C US_ALU_CONST_A_2
+0x4C30 US_ALU_CONST_R_3
+0x4C34 US_ALU_CONST_G_3
+0x4C38 US_ALU_CONST_B_3
+0x4C3C US_ALU_CONST_A_3
+0x4C40 US_ALU_CONST_R_4
+0x4C44 US_ALU_CONST_G_4
+0x4C48 US_ALU_CONST_B_4
+0x4C4C US_ALU_CONST_A_4
+0x4C50 US_ALU_CONST_R_5
+0x4C54 US_ALU_CONST_G_5
+0x4C58 US_ALU_CONST_B_5
+0x4C5C US_ALU_CONST_A_5
+0x4C60 US_ALU_CONST_R_6
+0x4C64 US_ALU_CONST_G_6
+0x4C68 US_ALU_CONST_B_6
+0x4C6C US_ALU_CONST_A_6
+0x4C70 US_ALU_CONST_R_7
+0x4C74 US_ALU_CONST_G_7
+0x4C78 US_ALU_CONST_B_7
+0x4C7C US_ALU_CONST_A_7
+0x4C80 US_ALU_CONST_R_8
+0x4C84 US_ALU_CONST_G_8
+0x4C88 US_ALU_CONST_B_8
+0x4C8C US_ALU_CONST_A_8
+0x4C90 US_ALU_CONST_R_9
+0x4C94 US_ALU_CONST_G_9
+0x4C98 US_ALU_CONST_B_9
+0x4C9C US_ALU_CONST_A_9
+0x4CA0 US_ALU_CONST_R_10
+0x4CA4 US_ALU_CONST_G_10
+0x4CA8 US_ALU_CONST_B_10
+0x4CAC US_ALU_CONST_A_10
+0x4CB0 US_ALU_CONST_R_11
+0x4CB4 US_ALU_CONST_G_11
+0x4CB8 US_ALU_CONST_B_11
+0x4CBC US_ALU_CONST_A_11
+0x4CC0 US_ALU_CONST_R_12
+0x4CC4 US_ALU_CONST_G_12
+0x4CC8 US_ALU_CONST_B_12
+0x4CCC US_ALU_CONST_A_12
+0x4CD0 US_ALU_CONST_R_13
+0x4CD4 US_ALU_CONST_G_13
+0x4CD8 US_ALU_CONST_B_13
+0x4CDC US_ALU_CONST_A_13
+0x4CE0 US_ALU_CONST_R_14
+0x4CE4 US_ALU_CONST_G_14
+0x4CE8 US_ALU_CONST_B_14
+0x4CEC US_ALU_CONST_A_14
+0x4CF0 US_ALU_CONST_R_15
+0x4CF4 US_ALU_CONST_G_15
+0x4CF8 US_ALU_CONST_B_15
+0x4CFC US_ALU_CONST_A_15
+0x4D00 US_ALU_CONST_R_16
+0x4D04 US_ALU_CONST_G_16
+0x4D08 US_ALU_CONST_B_16
+0x4D0C US_ALU_CONST_A_16
+0x4D10 US_ALU_CONST_R_17
+0x4D14 US_ALU_CONST_G_17
+0x4D18 US_ALU_CONST_B_17
+0x4D1C US_ALU_CONST_A_17
+0x4D20 US_ALU_CONST_R_18
+0x4D24 US_ALU_CONST_G_18
+0x4D28 US_ALU_CONST_B_18
+0x4D2C US_ALU_CONST_A_18
+0x4D30 US_ALU_CONST_R_19
+0x4D34 US_ALU_CONST_G_19
+0x4D38 US_ALU_CONST_B_19
+0x4D3C US_ALU_CONST_A_19
+0x4D40 US_ALU_CONST_R_20
+0x4D44 US_ALU_CONST_G_20
+0x4D48 US_ALU_CONST_B_20
+0x4D4C US_ALU_CONST_A_20
+0x4D50 US_ALU_CONST_R_21
+0x4D54 US_ALU_CONST_G_21
+0x4D58 US_ALU_CONST_B_21
+0x4D5C US_ALU_CONST_A_21
+0x4D60 US_ALU_CONST_R_22
+0x4D64 US_ALU_CONST_G_22
+0x4D68 US_ALU_CONST_B_22
+0x4D6C US_ALU_CONST_A_22
+0x4D70 US_ALU_CONST_R_23
+0x4D74 US_ALU_CONST_G_23
+0x4D78 US_ALU_CONST_B_23
+0x4D7C US_ALU_CONST_A_23
+0x4D80 US_ALU_CONST_R_24
+0x4D84 US_ALU_CONST_G_24
+0x4D88 US_ALU_CONST_B_24
+0x4D8C US_ALU_CONST_A_24
+0x4D90 US_ALU_CONST_R_25
+0x4D94 US_ALU_CONST_G_25
+0x4D98 US_ALU_CONST_B_25
+0x4D9C US_ALU_CONST_A_25
+0x4DA0 US_ALU_CONST_R_26
+0x4DA4 US_ALU_CONST_G_26
+0x4DA8 US_ALU_CONST_B_26
+0x4DAC US_ALU_CONST_A_26
+0x4DB0 US_ALU_CONST_R_27
+0x4DB4 US_ALU_CONST_G_27
+0x4DB8 US_ALU_CONST_B_27
+0x4DBC US_ALU_CONST_A_27
+0x4DC0 US_ALU_CONST_R_28
+0x4DC4 US_ALU_CONST_G_28
+0x4DC8 US_ALU_CONST_B_28
+0x4DCC US_ALU_CONST_A_28
+0x4DD0 US_ALU_CONST_R_29
+0x4DD4 US_ALU_CONST_G_29
+0x4DD8 US_ALU_CONST_B_29
+0x4DDC US_ALU_CONST_A_29
+0x4DE0 US_ALU_CONST_R_30
+0x4DE4 US_ALU_CONST_G_30
+0x4DE8 US_ALU_CONST_B_30
+0x4DEC US_ALU_CONST_A_30
+0x4DF0 US_ALU_CONST_R_31
+0x4DF4 US_ALU_CONST_G_31
+0x4DF8 US_ALU_CONST_B_31
+0x4DFC US_ALU_CONST_A_31
+0x4E04 RB3D_BLENDCNTL_R3
+0x4E08 RB3D_ABLENDCNTL_R3
+0x4E0C RB3D_COLOR_CHANNEL_MASK
+0x4E10 RB3D_CONSTANT_COLOR
+0x4E14 RB3D_COLOR_CLEAR_VALUE
+0x4E18 RB3D_ROPCNTL_R3
+0x4E1C RB3D_CLRCMP_FLIPE_R3
+0x4E20 RB3D_CLRCMP_CLR_R3
+0x4E24 RB3D_CLRCMP_MSK_R3
+0x4E48 RB3D_DEBUG_CTL
+0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
+0x4E50 RB3D_DITHER_CTL
+0x4E54 RB3D_CMASK_OFFSET0
+0x4E58 RB3D_CMASK_OFFSET1
+0x4E5C RB3D_CMASK_OFFSET2
+0x4E60 RB3D_CMASK_OFFSET3
+0x4E64 RB3D_CMASK_PITCH0
+0x4E68 RB3D_CMASK_PITCH1
+0x4E6C RB3D_CMASK_PITCH2
+0x4E70 RB3D_CMASK_PITCH3
+0x4E74 RB3D_CMASK_WRINDEX
+0x4E78 RB3D_CMASK_DWORD
+0x4E7C RB3D_CMASK_RDINDEX
+0x4E80 RB3D_AARESOLVE_OFFSET
+0x4E84 RB3D_AARESOLVE_PITCH
+0x4E88 RB3D_AARESOLVE_CTL
+0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
+0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
+0x4F04 ZB_ZSTENCILCNTL
+0x4F08 ZB_STENCILREFMASK
+0x4F14 ZB_ZTOP
+0x4F18 ZB_ZCACHE_CTLSTAT
+0x4F1C ZB_BW_CNTL
+0x4F28 ZB_DEPTHCLEARVALUE
+0x4F30 ZB_ZMASK_OFFSET
+0x4F34 ZB_ZMASK_PITCH
+0x4F38 ZB_ZMASK_WRINDEX
+0x4F3C ZB_ZMASK_DWORD
+0x4F40 ZB_ZMASK_RDINDEX
+0x4F44 ZB_HIZ_OFFSET
+0x4F48 ZB_HIZ_WRINDEX
+0x4F4C ZB_HIZ_DWORD
+0x4F50 ZB_HIZ_RDINDEX
+0x4F54 ZB_HIZ_PITCH
+0x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
index 8e3c0b807add..6801b865d1c4 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rs600
+++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -153,7 +153,7 @@ rs600 0x6d40
 0x42A4 SU_POLY_OFFSET_FRONT_SCALE
 0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
 0x42AC SU_POLY_OFFSET_BACK_SCALE
-0x42B0 SU_POLY_OFFSET_BACK_OFFSET 
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
 0x42B4 SU_POLY_OFFSET_ENABLE
 0x42B8 SU_CULL_MODE
 0x42C0 SU_DEPTH_SCALE
@@ -291,6 +291,8 @@ rs600 0x6d40
 0x46AC US_OUT_FMT_2
 0x46B0 US_OUT_FMT_3
 0x46B4 US_W_FMT
+0x46B8 US_CODE_BANK
+0x46BC US_CODE_EXT
 0x46C0 US_ALU_RGB_ADDR_0
 0x46C4 US_ALU_RGB_ADDR_1
 0x46C8 US_ALU_RGB_ADDR_2
@@ -547,6 +549,70 @@ rs600 0x6d40
 0x4AB4 US_ALU_ALPHA_INST_61
 0x4AB8 US_ALU_ALPHA_INST_62
 0x4ABC US_ALU_ALPHA_INST_63
+0x4AC0 US_ALU_EXT_ADDR_0
+0x4AC4 US_ALU_EXT_ADDR_1
+0x4AC8 US_ALU_EXT_ADDR_2
+0x4ACC US_ALU_EXT_ADDR_3
+0x4AD0 US_ALU_EXT_ADDR_4
+0x4AD4 US_ALU_EXT_ADDR_5
+0x4AD8 US_ALU_EXT_ADDR_6
+0x4ADC US_ALU_EXT_ADDR_7
+0x4AE0 US_ALU_EXT_ADDR_8
+0x4AE4 US_ALU_EXT_ADDR_9
+0x4AE8 US_ALU_EXT_ADDR_10
+0x4AEC US_ALU_EXT_ADDR_11
+0x4AF0 US_ALU_EXT_ADDR_12
+0x4AF4 US_ALU_EXT_ADDR_13
+0x4AF8 US_ALU_EXT_ADDR_14
+0x4AFC US_ALU_EXT_ADDR_15
+0x4B00 US_ALU_EXT_ADDR_16
+0x4B04 US_ALU_EXT_ADDR_17
+0x4B08 US_ALU_EXT_ADDR_18
+0x4B0C US_ALU_EXT_ADDR_19
+0x4B10 US_ALU_EXT_ADDR_20
+0x4B14 US_ALU_EXT_ADDR_21
+0x4B18 US_ALU_EXT_ADDR_22
+0x4B1C US_ALU_EXT_ADDR_23
+0x4B20 US_ALU_EXT_ADDR_24
+0x4B24 US_ALU_EXT_ADDR_25
+0x4B28 US_ALU_EXT_ADDR_26
+0x4B2C US_ALU_EXT_ADDR_27
+0x4B30 US_ALU_EXT_ADDR_28
+0x4B34 US_ALU_EXT_ADDR_29
+0x4B38 US_ALU_EXT_ADDR_30
+0x4B3C US_ALU_EXT_ADDR_31
+0x4B40 US_ALU_EXT_ADDR_32
+0x4B44 US_ALU_EXT_ADDR_33
+0x4B48 US_ALU_EXT_ADDR_34
+0x4B4C US_ALU_EXT_ADDR_35
+0x4B50 US_ALU_EXT_ADDR_36
+0x4B54 US_ALU_EXT_ADDR_37
+0x4B58 US_ALU_EXT_ADDR_38
+0x4B5C US_ALU_EXT_ADDR_39
+0x4B60 US_ALU_EXT_ADDR_40
+0x4B64 US_ALU_EXT_ADDR_41
+0x4B68 US_ALU_EXT_ADDR_42
+0x4B6C US_ALU_EXT_ADDR_43
+0x4B70 US_ALU_EXT_ADDR_44
+0x4B74 US_ALU_EXT_ADDR_45
+0x4B78 US_ALU_EXT_ADDR_46
+0x4B7C US_ALU_EXT_ADDR_47
+0x4B80 US_ALU_EXT_ADDR_48
+0x4B84 US_ALU_EXT_ADDR_49
+0x4B88 US_ALU_EXT_ADDR_50
+0x4B8C US_ALU_EXT_ADDR_51
+0x4B90 US_ALU_EXT_ADDR_52
+0x4B94 US_ALU_EXT_ADDR_53
+0x4B98 US_ALU_EXT_ADDR_54
+0x4B9C US_ALU_EXT_ADDR_55
+0x4BA0 US_ALU_EXT_ADDR_56
+0x4BA4 US_ALU_EXT_ADDR_57
+0x4BA8 US_ALU_EXT_ADDR_58
+0x4BAC US_ALU_EXT_ADDR_59
+0x4BB0 US_ALU_EXT_ADDR_60
+0x4BB4 US_ALU_EXT_ADDR_61
+0x4BB8 US_ALU_EXT_ADDR_62
+0x4BBC US_ALU_EXT_ADDR_63
 0x4BC0 FG_FOG_BLEND
 0x4BC4 FG_FOG_FACTOR
 0x4BC8 FG_FOG_COLOR_R
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515
index 0102a0d5735c..38abf63bf2cd 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rv515
+++ b/drivers/gpu/drm/radeon/reg_srcs/rv515
@@ -161,7 +161,12 @@ rv515 0x6d40
 0x401C GB_SELECT
 0x4020 GB_AA_CONFIG
 0x4024 GB_FIFO_SIZE
+0x4028 GB_Z_PEQ_CONFIG
 0x4100 TX_INVALTAGS
+0x4114 SU_TEX_WRAP_PS3
+0x4118 PS3_ENABLE
+0x411c PS3_VTX_FMT
+0x4120 PS3_TEX_SOURCE
 0x4200 GA_POINT_S0
 0x4204 GA_POINT_T0
 0x4208 GA_POINT_S1
@@ -171,6 +176,7 @@ rv515 0x6d40
 0x4230 GA_POINT_MINMAX
 0x4234 GA_LINE_CNTL
 0x4238 GA_LINE_STIPPLE_CONFIG
+0x4258 GA_COLOR_CONTROL_PS3
 0x4260 GA_LINE_STIPPLE_VALUE
 0x4264 GA_LINE_S0
 0x4268 GA_LINE_S1
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 368415df5f3a..9f5418983e2a 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -356,6 +356,7 @@ static int rs400_mc_init(struct radeon_device *rdev)
        rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16;
        rdev->mc.gtt_location = 0xFFFFFFFFUL;
        r = radeon_mc_setup(rdev);
+        rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);
        if (r)
                return r;
        return 0;
@@ -395,6 +396,7 @@ static int rs400_startup(struct radeon_device *rdev)
                return r;
        /* Enable IRQ */
        r100_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4245218e954f..d5255751e7b3 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -56,6 +56,7 @@ int rs600_mc_init(struct radeon_device *rdev)
        rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16;
        rdev->mc.gtt_location = 0xffffffffUL;
        r = radeon_mc_setup(rdev);
+        rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
        if (r)
                return r;
        return 0;
@@ -134,7 +135,8 @@ void rs600_hpd_init(struct radeon_device *rdev)
                        break;
                }
        }
-        rs600_irq_set(rdev);
+        if (rdev->irq.installed)
+                rs600_irq_set(rdev);
 }
 void rs600_hpd_fini(struct radeon_device *rdev)
@@ -315,6 +317,11 @@ int rs600_irq_set(struct radeon_device *rdev)
        u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) &
                ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
+        if (!rdev->irq.installed) {
+                WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+                WREG32(R_000040_GEN_INT_CNTL, 0);
+                return -EINVAL;
+        }
        if (rdev->irq.sw_int) {
                tmp |= S_000040_SW_INT_EN(1);
        }
@@ -553,6 +560,7 @@ static int rs600_startup(struct radeon_device *rdev)
                return r;
        /* Enable IRQ */
        rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 1e22f52d6039..cd31da913771 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -172,6 +172,7 @@ static int rs690_mc_init(struct radeon_device *rdev)
        rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
        rdev->mc.gtt_location = 0xFFFFFFFFUL;
        r = radeon_mc_setup(rdev);
+        rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
        if (r)
                return r;
        return 0;
@@ -625,6 +626,7 @@ static int rs690_startup(struct radeon_device *rdev)
                return r;
        /* Enable IRQ */
        rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 59632a506b46..62756717b044 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -479,6 +479,7 @@ static int rv515_startup(struct radeon_device *rdev)
        }
        /* Enable IRQ */
        rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
        /* 1M ring buffer */
        r = r100_cp_init(rdev, 1024 * 1024);
        if (r) {
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 3bcb66e52786..59c71245fb91 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1096,8 +1096,7 @@ void rv770_fini(struct radeon_device *rdev)
        radeon_gem_fini(rdev);
        radeon_fence_driver_fini(rdev);
        radeon_clocks_fini(rdev);
-        if (rdev->flags & RADEON_IS_AGP)
+        radeon_agp_fini(rdev);
-                radeon_agp_fini(rdev);
        radeon_bo_fini(rdev);
        radeon_atombios_fini(rdev);
        kfree(rdev->bios);
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 46c3c566307e..68cf87749a42 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -392,7 +392,7 @@ config SENSORS_GL520SM
 config SENSORS_CORETEMP
        tristate "Intel Core/Core2/Atom temperature sensor"
-        depends on X86 && EXPERIMENTAL
+        depends on X86 && PCI && EXPERIMENTAL
        help
          If you say yes here you get support for the temperature
          sensor inside your CPU. Most of the family 6 CPUs
@@ -792,6 +792,16 @@ config SENSORS_ADS7828
          This driver can also be built as a module.  If so, the module
          will be called ads7828.
+config SENSORS_AMC6821
+        tristate "Texas Instruments AMC6821"
+        depends on I2C  && EXPERIMENTAL
+        help
+          If you say yes here you get support for the Texas Instruments
+          AMC6821 hardware monitoring chips.
+          This driver can also be build as a module.  If so, the module
+          will be called amc6821.
 config SENSORS_THMC50
        tristate "Texas Instruments THMC50 / Analog Devices ADM1022"
        depends on I2C && EXPERIMENTAL
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 450c8e894277..4bc215c0953f 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_SENSORS_SIS5595)	+= sis5595.o
 obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o
 obj-$(CONFIG_SENSORS_SMSC47M1)  += smsc47m1.o
 obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o
+obj-$(CONFIG_SENSORS_AMC6821)   += amc6821.o
 obj-$(CONFIG_SENSORS_THMC50)    += thmc50.o
 obj-$(CONFIG_SENSORS_TMP401)    += tmp401.o
 obj-$(CONFIG_SENSORS_TMP421)    += tmp421.o
diff --git a/drivers/hwmon/adt7462.c b/drivers/hwmon/adt7462.c
index a1a7ef14b519..a31e77c776ae 100644
--- a/drivers/hwmon/adt7462.c
+++ b/drivers/hwmon/adt7462.c
@@ -94,7 +94,7 @@ static const unsigned short normal_i2c[] = { 0x58, 0x5C, I2C_CLIENT_END };
 #define         ADT7462_PIN24_SHIFT             6
 #define         ADT7462_PIN26_VOLT_INPUT        0x08
 #define         ADT7462_PIN25_VOLT_INPUT        0x20
-#define         ADT7462_PIN28_SHIFT             6       /* cfg3 */
+#define         ADT7462_PIN28_SHIFT             4       /* cfg3 */
 #define         ADT7462_PIN28_VOLT              0x5
 #define ADT7462_REG_ALARM1                      0xB8
diff --git a/drivers/hwmon/amc6821.c b/drivers/hwmon/amc6821.c
new file mode 100644
index 000000000000..1c89d922d619
--- /dev/null
+++ b/drivers/hwmon/amc6821.c
@@ -0,0 +1,1116 @@
+/*
+        amc6821.c - Part of lm_sensors, Linux kernel modules for hardware
+        monitoring
+        Copyright (C) 2009 T. Mertelj <tomaz.mertelj@guest.arnes.si>
+        Based on max6650.c:
+        Copyright (C) 2007 Hans J. Koch <hjk@linutronix.de>
+        This program is free software; you can redistribute it and/or modify
+        it under the terms of the GNU General Public License as published by
+        the Free Software Foundation; either version 2 of the License, or
+        (at your option) any later version.
+        This program is distributed in the hope that it will be useful,
+        but WITHOUT ANY WARRANTY; without even the implied warranty of
+        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+        GNU General Public License for more details.
+        You should have received a copy of the GNU General Public License
+        along with this program; if not, write to the Free Software
+        Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+#include <linux/kernel.h>       /* Needed for KERN_INFO */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+/*
+ * Addresses to scan.
+ */
+static const unsigned short normal_i2c[] = {0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e,
+        0x4c, 0x4d, 0x4e, I2C_CLIENT_END};
+/*
+ * Insmod parameters
+ */
+static int pwminv = 0;  /*Inverted PWM output. */
+module_param(pwminv, int, S_IRUGO);
+static int init = 1; /*Power-on initialization.*/
+module_param(init, int, S_IRUGO);
+enum chips { amc6821 };
+#define AMC6821_REG_DEV_ID 0x3D
+#define AMC6821_REG_COMP_ID 0x3E
+#define AMC6821_REG_CONF1 0x00
+#define AMC6821_REG_CONF2 0x01
+#define AMC6821_REG_CONF3 0x3F
+#define AMC6821_REG_CONF4 0x04
+#define AMC6821_REG_STAT1 0x02
+#define AMC6821_REG_STAT2 0x03
+#define AMC6821_REG_TDATA_LOW 0x08
+#define AMC6821_REG_TDATA_HI 0x09
+#define AMC6821_REG_LTEMP_HI 0x0A
+#define AMC6821_REG_RTEMP_HI 0x0B
+#define AMC6821_REG_LTEMP_LIMIT_MIN 0x15
+#define AMC6821_REG_LTEMP_LIMIT_MAX 0x14
+#define AMC6821_REG_RTEMP_LIMIT_MIN 0x19
+#define AMC6821_REG_RTEMP_LIMIT_MAX 0x18
+#define AMC6821_REG_LTEMP_CRIT 0x1B
+#define AMC6821_REG_RTEMP_CRIT 0x1D
+#define AMC6821_REG_PSV_TEMP 0x1C
+#define AMC6821_REG_DCY 0x22
+#define AMC6821_REG_LTEMP_FAN_CTRL 0x24
+#define AMC6821_REG_RTEMP_FAN_CTRL 0x25
+#define AMC6821_REG_DCY_LOW_TEMP 0x21
+#define AMC6821_REG_TACH_LLIMITL 0x10
+#define AMC6821_REG_TACH_LLIMITH 0x11
+#define AMC6821_REG_TACH_HLIMITL 0x12
+#define AMC6821_REG_TACH_HLIMITH 0x13
+#define AMC6821_CONF1_START 0x01
+#define AMC6821_CONF1_FAN_INT_EN 0x02
+#define AMC6821_CONF1_FANIE 0x04
+#define AMC6821_CONF1_PWMINV 0x08
+#define AMC6821_CONF1_FAN_FAULT_EN 0x10
+#define AMC6821_CONF1_FDRC0 0x20
+#define AMC6821_CONF1_FDRC1 0x40
+#define AMC6821_CONF1_THERMOVIE 0x80
+#define AMC6821_CONF2_PWM_EN 0x01
+#define AMC6821_CONF2_TACH_MODE 0x02
+#define AMC6821_CONF2_TACH_EN 0x04
+#define AMC6821_CONF2_RTFIE 0x08
+#define AMC6821_CONF2_LTOIE 0x10
+#define AMC6821_CONF2_RTOIE 0x20
+#define AMC6821_CONF2_PSVIE 0x40
+#define AMC6821_CONF2_RST 0x80
+#define AMC6821_CONF3_THERM_FAN_EN 0x80
+#define AMC6821_CONF3_REV_MASK 0x0F
+#define AMC6821_CONF4_OVREN 0x10
+#define AMC6821_CONF4_TACH_FAST 0x20
+#define AMC6821_CONF4_PSPR 0x40
+#define AMC6821_CONF4_MODE 0x80
+#define AMC6821_STAT1_RPM_ALARM 0x01
+#define AMC6821_STAT1_FANS 0x02
+#define AMC6821_STAT1_RTH 0x04
+#define AMC6821_STAT1_RTL 0x08
+#define AMC6821_STAT1_R_THERM 0x10
+#define AMC6821_STAT1_RTF 0x20
+#define AMC6821_STAT1_LTH 0x40
+#define AMC6821_STAT1_LTL 0x80
+#define AMC6821_STAT2_RTC 0x08
+#define AMC6821_STAT2_LTC 0x10
+#define AMC6821_STAT2_LPSV 0x20
+#define AMC6821_STAT2_L_THERM 0x40
+#define AMC6821_STAT2_THERM_IN 0x80
+enum {IDX_TEMP1_INPUT = 0, IDX_TEMP1_MIN, IDX_TEMP1_MAX,
+        IDX_TEMP1_CRIT, IDX_TEMP2_INPUT, IDX_TEMP2_MIN,
+        IDX_TEMP2_MAX, IDX_TEMP2_CRIT,
+        TEMP_IDX_LEN, };
+static const u8 temp_reg[] = {AMC6821_REG_LTEMP_HI,
+                        AMC6821_REG_LTEMP_LIMIT_MIN,
+                        AMC6821_REG_LTEMP_LIMIT_MAX,
+                        AMC6821_REG_LTEMP_CRIT,
+                        AMC6821_REG_RTEMP_HI,
+                        AMC6821_REG_RTEMP_LIMIT_MIN,
+                        AMC6821_REG_RTEMP_LIMIT_MAX,
+                        AMC6821_REG_RTEMP_CRIT, };
+enum {IDX_FAN1_INPUT = 0, IDX_FAN1_MIN, IDX_FAN1_MAX,
+        FAN1_IDX_LEN, };
+static const u8 fan_reg_low[] = {AMC6821_REG_TDATA_LOW,
+                        AMC6821_REG_TACH_LLIMITL,
+                        AMC6821_REG_TACH_HLIMITL, };
+static const u8 fan_reg_hi[] = {AMC6821_REG_TDATA_HI,
+                        AMC6821_REG_TACH_LLIMITH,
+                        AMC6821_REG_TACH_HLIMITH, };
+static int amc6821_probe(
+                struct i2c_client *client,
+                const struct i2c_device_id *id);
+static int amc6821_detect(
+                struct i2c_client *client,
+                struct i2c_board_info *info);
+static int amc6821_init_client(struct i2c_client *client);
+static int amc6821_remove(struct i2c_client *client);
+static struct amc6821_data *amc6821_update_device(struct device *dev);
+/*
+ * Driver data (common to all clients)
+ */
+static const struct i2c_device_id amc6821_id[] = {
+        { "amc6821", amc6821 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, amc6821_id);
+static struct i2c_driver amc6821_driver = {
+        .class = I2C_CLASS_HWMON,
+        .driver = {
+                .name   = "amc6821",
+        },
+        .probe = amc6821_probe,
+        .remove = amc6821_remove,
+        .id_table = amc6821_id,
+        .detect = amc6821_detect,
+        .address_list = normal_i2c,
+};
+/*
+ * Client data (each client gets its own)
+  */
+struct amc6821_data {
+        struct device *hwmon_dev;
+        struct mutex update_lock;
+        char valid; /* zero until following fields are valid */
+        unsigned long last_updated; /* in jiffies */
+        /* register values */
+        int temp[TEMP_IDX_LEN];
+        u16 fan[FAN1_IDX_LEN];
+        u8 fan1_div;
+        u8 pwm1;
+        u8 temp1_auto_point_temp[3];
+        u8 temp2_auto_point_temp[3];
+        u8 pwm1_auto_point_pwm[3];
+        u8 pwm1_enable;
+        u8 pwm1_auto_channels_temp;
+        u8 stat1;
+        u8 stat2;
+};
+static ssize_t get_temp(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr(devattr)->index;
+        return sprintf(buf, "%d\n", data->temp[ix] * 1000);
+}
+static ssize_t set_temp(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        int ix = to_sensor_dev_attr(attr)->index;
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        val = SENSORS_LIMIT(val / 1000, -128, 127);
+        mutex_lock(&data->update_lock);
+        data->temp[ix] = val;
+        if (i2c_smbus_write_byte_data(client, temp_reg[ix], data->temp[ix])) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+        }
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static ssize_t get_temp_alarm(
+        struct device *dev,
+        struct device_attribute *devattr,
+        char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr(devattr)->index;
+        u8 flag;
+        switch (ix) {
+        case IDX_TEMP1_MIN:
+                flag = data->stat1 & AMC6821_STAT1_LTL;
+                break;
+        case IDX_TEMP1_MAX:
+                flag = data->stat1 & AMC6821_STAT1_LTH;
+                break;
+        case IDX_TEMP1_CRIT:
+                flag = data->stat2 & AMC6821_STAT2_LTC;
+                break;
+        case IDX_TEMP2_MIN:
+                flag = data->stat1 & AMC6821_STAT1_RTL;
+                break;
+        case IDX_TEMP2_MAX:
+                flag = data->stat1 & AMC6821_STAT1_RTH;
+                break;
+        case IDX_TEMP2_CRIT:
+                flag = data->stat2 & AMC6821_STAT2_RTC;
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
+                return -EINVAL;
+        }
+        if (flag)
+                return sprintf(buf, "1");
+        else
+                return sprintf(buf, "0");
+}
+static ssize_t get_temp2_fault(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        if (data->stat1 & AMC6821_STAT1_RTF)
+                return sprintf(buf, "1");
+        else
+                return sprintf(buf, "0");
+}
+static ssize_t get_pwm1(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1);
+}
+static ssize_t set_pwm1(
+                struct device *dev,
+                struct device_attribute *devattr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        mutex_lock(&data->update_lock);
+        data->pwm1 = SENSORS_LIMIT(val , 0, 255);
+        i2c_smbus_write_byte_data(client, AMC6821_REG_DCY, data->pwm1);
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static ssize_t get_pwm1_enable(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1_enable);
+}
+static ssize_t set_pwm1_enable(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int config = strict_strtol(buf, 10, &val);
+        if (config)
+                return config;
+        config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
+        if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return -EIO;
+        }
+        switch (val) {
+        case 1:
+                config &= ~AMC6821_CONF1_FDRC0;
+                config &= ~AMC6821_CONF1_FDRC1;
+                break;
+        case 2:
+                config &= ~AMC6821_CONF1_FDRC0;
+                config |= AMC6821_CONF1_FDRC1;
+                break;
+        case 3:
+                config |= AMC6821_CONF1_FDRC0;
+                config |= AMC6821_CONF1_FDRC1;
+                break;
+        default:
+                return -EINVAL;
+        }
+        mutex_lock(&data->update_lock);
+        if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF1, config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        count = -EIO;
+        }
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static ssize_t get_pwm1_auto_channels_temp(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1_auto_channels_temp);
+}
+static ssize_t get_temp_auto_point_temp(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        int ix = to_sensor_dev_attr_2(devattr)->index;
+        int nr = to_sensor_dev_attr_2(devattr)->nr;
+        struct amc6821_data *data = amc6821_update_device(dev);
+        switch (nr) {
+        case 1:
+                return sprintf(buf, "%d\n",
+                        data->temp1_auto_point_temp[ix] * 1000);
+                break;
+        case 2:
+                return sprintf(buf, "%d\n",
+                        data->temp2_auto_point_temp[ix] * 1000);
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
+                return -EINVAL;
+        }
+}
+static ssize_t get_pwm1_auto_point_pwm(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        int ix = to_sensor_dev_attr(devattr)->index;
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1_auto_point_pwm[ix]);
+}
+static inline ssize_t set_slope_register(struct i2c_client *client,
+                u8 reg,
+                u8 dpwm,
+                u8 *ptemp)
+{
+        int dt;
+        u8 tmp;
+        dt = ptemp[2]-ptemp[1];
+        for (tmp = 4; tmp > 0; tmp--) {
+                if (dt * (0x20 >> tmp) >= dpwm)
+                        break;
+        }
+        tmp |= (ptemp[1] & 0x7C) << 1;
+        if (i2c_smbus_write_byte_data(client,
+                        reg, tmp)) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                return -EIO;
+        }
+        return 0;
+}
+static ssize_t set_temp_auto_point_temp(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr_2(attr)->index;
+        int nr = to_sensor_dev_attr_2(attr)->nr;
+        u8 *ptemp;
+        u8 reg;
+        int dpwm;
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        switch (nr) {
+        case 1:
+                ptemp = data->temp1_auto_point_temp;
+                reg = AMC6821_REG_LTEMP_FAN_CTRL;
+                break;
+        case 2:
+                ptemp = data->temp2_auto_point_temp;
+                reg = AMC6821_REG_RTEMP_FAN_CTRL;
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
+                return -EINVAL;
+        }
+        data->valid = 0;
+        mutex_lock(&data->update_lock);
+        switch (ix) {
+        case 0:
+                ptemp[0] = SENSORS_LIMIT(val / 1000, 0,
+                                data->temp1_auto_point_temp[1]);
+                ptemp[0] = SENSORS_LIMIT(ptemp[0], 0,
+                                data->temp2_auto_point_temp[1]);
+                ptemp[0] = SENSORS_LIMIT(ptemp[0], 0, 63);
+                if (i2c_smbus_write_byte_data(
+                                        client,
+                                        AMC6821_REG_PSV_TEMP,
+                                        ptemp[0])) {
+                                dev_err(&client->dev,
+                                        "Register write error, aborting.\n");
+                                count = -EIO;
+                }
+                goto EXIT;
+                break;
+        case 1:
+                ptemp[1] = SENSORS_LIMIT(
+                                        val / 1000,
+                                        (ptemp[0] & 0x7C) + 4,
+                                        124);
+                ptemp[1] &= 0x7C;
+                ptemp[2] = SENSORS_LIMIT(
+                                        ptemp[2], ptemp[1] + 1,
+                                        255);
+                break;
+        case 2:
+                ptemp[2] = SENSORS_LIMIT(
+                                        val / 1000,
+                                        ptemp[1]+1,
+                                        255);
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
+                count = -EINVAL;
+                goto EXIT;
+        }
+        dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
+        if (set_slope_register(client, reg, dpwm, ptemp))
+                count = -EIO;
+EXIT:
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static ssize_t set_pwm1_auto_point_pwm(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        int dpwm;
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        mutex_lock(&data->update_lock);
+        data->pwm1_auto_point_pwm[1] = SENSORS_LIMIT(val, 0, 254);
+        if (i2c_smbus_write_byte_data(client, AMC6821_REG_DCY_LOW_TEMP,
+                        data->pwm1_auto_point_pwm[1])) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+                goto EXIT;
+        }
+        dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
+        if (set_slope_register(client, AMC6821_REG_LTEMP_FAN_CTRL, dpwm,
+                        data->temp1_auto_point_temp)) {
+                count = -EIO;
+                goto EXIT;
+        }
+        if (set_slope_register(client, AMC6821_REG_RTEMP_FAN_CTRL, dpwm,
+                        data->temp2_auto_point_temp)) {
+                count = -EIO;
+                goto EXIT;
+        }
+EXIT:
+        data->valid = 0;
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static ssize_t get_fan(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr(devattr)->index;
+        if (0 == data->fan[ix])
+                return sprintf(buf, "0");
+        return sprintf(buf, "%d\n", (int)(6000000 / data->fan[ix]));
+}
+static ssize_t get_fan1_fault(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        if (data->stat1 & AMC6821_STAT1_FANS)
+                return sprintf(buf, "1");
+        else
+                return sprintf(buf, "0");
+}
+static ssize_t set_fan(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int ix = to_sensor_dev_attr(attr)->index;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        val = 1 > val ? 0xFFFF : 6000000/val;
+        mutex_lock(&data->update_lock);
+        data->fan[ix] = (u16) SENSORS_LIMIT(val, 1, 0xFFFF);
+        if (i2c_smbus_write_byte_data(client, fan_reg_low[ix],
+                        data->fan[ix] & 0xFF)) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+                goto EXIT;
+        }
+        if (i2c_smbus_write_byte_data(client,
+                        fan_reg_hi[ix], data->fan[ix] >> 8)) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+        }
+EXIT:
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static ssize_t get_fan1_div(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->fan1_div);
+}
+static ssize_t set_fan1_div(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int config = strict_strtol(buf, 10, &val);
+        if (config)
+                return config;
+        config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
+        if (config < 0) {
+                dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                return -EIO;
+        }
+        mutex_lock(&data->update_lock);
+        switch (val) {
+        case 2:
+                config &= ~AMC6821_CONF4_PSPR;
+                data->fan1_div = 2;
+                break;
+        case 4:
+                config |= AMC6821_CONF4_PSPR;
+                data->fan1_div = 4;
+                break;
+        default:
+                mutex_unlock(&data->update_lock);
+                count = -EINVAL;
+                goto EXIT;
+        }
+        if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4, config)) {
+                dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                count = -EIO;
+        }
+EXIT:
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO,
+        get_temp, NULL, IDX_TEMP1_INPUT);
+static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP1_MIN);
+static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP1_MAX);
+static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP1_CRIT);
+static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP1_MIN);
+static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP1_MAX);
+static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP1_CRIT);
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO | S_IWUSR,
+        get_temp, NULL, IDX_TEMP2_INPUT);
+static SENSOR_DEVICE_ATTR(temp2_min, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP2_MIN);
+static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP2_MAX);
+static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP2_CRIT);
+static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO,
+        get_temp2_fault, NULL, 0);
+static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP2_MIN);
+static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP2_MAX);
+static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP2_CRIT);
+static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, get_fan, NULL, IDX_FAN1_INPUT);
+static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
+        get_fan, set_fan, IDX_FAN1_MIN);
+static SENSOR_DEVICE_ATTR(fan1_max, S_IRUGO | S_IWUSR,
+        get_fan, set_fan, IDX_FAN1_MAX);
+static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, get_fan1_fault, NULL, 0);
+static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
+        get_fan1_div, set_fan1_div, 0);
+static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, get_pwm1, set_pwm1, 0);
+static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
+        get_pwm1_enable, set_pwm1_enable, 0);
+static SENSOR_DEVICE_ATTR(pwm1_auto_point1_pwm, S_IRUGO,
+        get_pwm1_auto_point_pwm, NULL, 0);
+static SENSOR_DEVICE_ATTR(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
+        get_pwm1_auto_point_pwm, set_pwm1_auto_point_pwm, 1);
+static SENSOR_DEVICE_ATTR(pwm1_auto_point3_pwm, S_IRUGO,
+        get_pwm1_auto_point_pwm, NULL, 2);
+static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
+        get_pwm1_auto_channels_temp, NULL, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_auto_point1_temp, S_IRUGO,
+        get_temp_auto_point_temp, NULL, 1, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_auto_point2_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 1, 1);
+static SENSOR_DEVICE_ATTR_2(temp1_auto_point3_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 1, 2);
+static SENSOR_DEVICE_ATTR_2(temp2_auto_point1_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 0);
+static SENSOR_DEVICE_ATTR_2(temp2_auto_point2_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_auto_point3_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 2);
+static struct attribute *amc6821_attrs[] = {
+        &sensor_dev_attr_temp1_input.dev_attr.attr,
+        &sensor_dev_attr_temp1_min.dev_attr.attr,
+        &sensor_dev_attr_temp1_max.dev_attr.attr,
+        &sensor_dev_attr_temp1_crit.dev_attr.attr,
+        &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_input.dev_attr.attr,
+        &sensor_dev_attr_temp2_min.dev_attr.attr,
+        &sensor_dev_attr_temp2_max.dev_attr.attr,
+        &sensor_dev_attr_temp2_crit.dev_attr.attr,
+        &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_fault.dev_attr.attr,
+        &sensor_dev_attr_fan1_input.dev_attr.attr,
+        &sensor_dev_attr_fan1_min.dev_attr.attr,
+        &sensor_dev_attr_fan1_max.dev_attr.attr,
+        &sensor_dev_attr_fan1_fault.dev_attr.attr,
+        &sensor_dev_attr_fan1_div.dev_attr.attr,
+        &sensor_dev_attr_pwm1.dev_attr.attr,
+        &sensor_dev_attr_pwm1_enable.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
+        &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
+        &sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
+        &sensor_dev_attr_temp1_auto_point3_temp.dev_attr.attr,
+        &sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
+        &sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
+        &sensor_dev_attr_temp2_auto_point3_temp.dev_attr.attr,
+        NULL
+};
+static struct attribute_group amc6821_attr_grp = {
+        .attrs = amc6821_attrs,
+};
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int amc6821_detect(
+                struct i2c_client *client,
+                struct i2c_board_info *info)
+{
+        struct i2c_adapter *adapter = client->adapter;
+        int address = client->addr;
+        int dev_id, comp_id;
+        dev_dbg(&adapter->dev, "amc6821_detect called.\n");
+        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+                dev_dbg(&adapter->dev,
+                        "amc6821: I2C bus doesn't support byte mode, "
+                        "skipping.\n");
+                return -ENODEV;
+        }
+        dev_id = i2c_smbus_read_byte_data(client, AMC6821_REG_DEV_ID);
+        comp_id = i2c_smbus_read_byte_data(client, AMC6821_REG_COMP_ID);
+        if (dev_id != 0x21 || comp_id != 0x49) {
+                dev_dbg(&adapter->dev,
+                        "amc6821: detection failed at 0x%02x.\n",
+                        address);
+                return -ENODEV;
+        }
+        /* Bit 7 of the address register is ignored, so we can check the
+           ID registers again */
+        dev_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_DEV_ID);
+        comp_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_COMP_ID);
+        if (dev_id != 0x21 || comp_id != 0x49) {
+                dev_dbg(&adapter->dev,
+                        "amc6821: detection failed at 0x%02x.\n",
+                        address);
+                return -ENODEV;
+        }
+        dev_info(&adapter->dev, "amc6821: chip found at 0x%02x.\n", address);
+        strlcpy(info->type, "amc6821", I2C_NAME_SIZE);
+        return 0;
+}
+static int amc6821_probe(
+        struct i2c_client *client,
+        const struct i2c_device_id *id)
+{
+        struct amc6821_data *data;
+        int err;
+        data = kzalloc(sizeof(struct amc6821_data), GFP_KERNEL);
+        if (!data) {
+                dev_err(&client->dev, "out of memory.\n");
+                return -ENOMEM;
+        }
+        i2c_set_clientdata(client, data);
+        mutex_init(&data->update_lock);
+        /*
+         * Initialize the amc6821 chip
+         */
+        err = amc6821_init_client(client);
+        if (err)
+                goto err_free;
+        err = sysfs_create_group(&client->dev.kobj, &amc6821_attr_grp);
+        if (err)
+                goto err_free;
+        data->hwmon_dev = hwmon_device_register(&client->dev);
+        if (!IS_ERR(data->hwmon_dev))
+                return 0;
+        err = PTR_ERR(data->hwmon_dev);
+        dev_err(&client->dev, "error registering hwmon device.\n");
+        sysfs_remove_group(&client->dev.kobj, &amc6821_attr_grp);
+err_free:
+        kfree(data);
+        return err;
+}
+static int amc6821_remove(struct i2c_client *client)
+{
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        hwmon_device_unregister(data->hwmon_dev);
+        sysfs_remove_group(&client->dev.kobj, &amc6821_attr_grp);
+        kfree(data);
+        return 0;
+}
+static int amc6821_init_client(struct i2c_client *client)
+{
+        int config;
+        int err = -EIO;
+        if (init) {
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
+                if (config < 0) {
+                                dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                                return err;
+                }
+                config |= AMC6821_CONF4_MODE;
+                if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4,
+                                config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF3);
+                if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return err;
+                }
+                dev_info(&client->dev, "Revision %d\n", config & 0x0f);
+                config &= ~AMC6821_CONF3_THERM_FAN_EN;
+                if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF3,
+                                config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF2);
+                if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return err;
+                }
+                config &= ~AMC6821_CONF2_RTFIE;
+                config &= ~AMC6821_CONF2_LTOIE;
+                config &= ~AMC6821_CONF2_RTOIE;
+                if (i2c_smbus_write_byte_data(client,
+                                AMC6821_REG_CONF2, config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
+                if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return err;
+                }
+                config &= ~AMC6821_CONF1_THERMOVIE;
+                config &= ~AMC6821_CONF1_FANIE;
+                config |= AMC6821_CONF1_START;
+                if (pwminv)
+                        config |= AMC6821_CONF1_PWMINV;
+                else
+                        config &= ~AMC6821_CONF1_PWMINV;
+                if (i2c_smbus_write_byte_data(
+                                client, AMC6821_REG_CONF1, config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+        }
+        return 0;
+}
+static struct amc6821_data *amc6821_update_device(struct device *dev)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        int timeout = HZ;
+        u8 reg;
+        int i;
+        mutex_lock(&data->update_lock);
+        if (time_after(jiffies, data->last_updated + timeout) ||
+                        !data->valid) {
+                for (i = 0; i < TEMP_IDX_LEN; i++)
+                        data->temp[i] = i2c_smbus_read_byte_data(client,
+                                temp_reg[i]);
+                data->stat1 = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_STAT1);
+                data->stat2 = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_STAT2);
+                data->pwm1 = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_DCY);
+                for (i = 0; i < FAN1_IDX_LEN; i++) {
+                        data->fan[i] = i2c_smbus_read_byte_data(
+                                        client,
+                                        fan_reg_low[i]);
+                        data->fan[i] += i2c_smbus_read_byte_data(
+                                        client,
+                                        fan_reg_hi[i]) << 8;
+                }
+                data->fan1_div = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_CONF4);
+                data->fan1_div = data->fan1_div & AMC6821_CONF4_PSPR ? 4 : 2;
+                data->pwm1_auto_point_pwm[0] = 0;
+                data->pwm1_auto_point_pwm[2] = 255;
+                data->pwm1_auto_point_pwm[1] = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_DCY_LOW_TEMP);
+                data->temp1_auto_point_temp[0] =
+                        i2c_smbus_read_byte_data(client,
+                                        AMC6821_REG_PSV_TEMP);
+                data->temp2_auto_point_temp[0] =
+                                data->temp1_auto_point_temp[0];
+                reg = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_LTEMP_FAN_CTRL);
+                data->temp1_auto_point_temp[1] = (reg & 0xF8) >> 1;
+                reg &= 0x07;
+                reg = 0x20 >> reg;
+                if (reg > 0)
+                        data->temp1_auto_point_temp[2] =
+                                data->temp1_auto_point_temp[1] +
+                                (data->pwm1_auto_point_pwm[2] -
+                                data->pwm1_auto_point_pwm[1]) / reg;
+                else
+                        data->temp1_auto_point_temp[2] = 255;
+                reg = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_RTEMP_FAN_CTRL);
+                data->temp2_auto_point_temp[1] = (reg & 0xF8) >> 1;
+                reg &= 0x07;
+                reg = 0x20 >> reg;
+                if (reg > 0)
+                        data->temp2_auto_point_temp[2] =
+                                data->temp2_auto_point_temp[1] +
+                                (data->pwm1_auto_point_pwm[2] -
+                                data->pwm1_auto_point_pwm[1]) / reg;
+                else
+                        data->temp2_auto_point_temp[2] = 255;
+                reg = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
+                reg = (reg >> 5) & 0x3;
+                switch (reg) {
+                case 0: /*open loop: software sets pwm1*/
+                        data->pwm1_auto_channels_temp = 0;
+                        data->pwm1_enable = 1;
+                        break;
+                case 2: /*closed loop: remote T (temp2)*/
+                        data->pwm1_auto_channels_temp = 2;
+                        data->pwm1_enable = 2;
+                        break;
+                case 3: /*closed loop: local and remote T (temp2)*/
+                        data->pwm1_auto_channels_temp = 3;
+                        data->pwm1_enable = 3;
+                        break;
+                case 1: /*semi-open loop: software sets rpm, chip controls pwm1,
+                          *currently not implemented
+                          */
+                        data->pwm1_auto_channels_temp = 0;
+                        data->pwm1_enable = 0;
+                        break;
+                }
+                data->last_updated = jiffies;
+                data->valid = 1;
+        }
+        mutex_unlock(&data->update_lock);
+        return data;
+}
+static int __init amc6821_init(void)
+{
+        return i2c_add_driver(&amc6821_driver);
+}
+static void __exit amc6821_exit(void)
+{
+        i2c_del_driver(&amc6821_driver);
+}
+module_init(amc6821_init);
+module_exit(amc6821_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("T. Mertelj <tomaz.mertelj@guest.arnes.si>");
+MODULE_DESCRIPTION("Texas Instruments amc6821 hwmon driver");
diff --git a/drivers/hwmon/asus_atk0110.c b/drivers/hwmon/asus_atk0110.c
index 5a3ee00c0e7d..6811346c1c62 100644
--- a/drivers/hwmon/asus_atk0110.c
+++ b/drivers/hwmon/asus_atk0110.c
@@ -5,6 +5,7 @@
 * See COPYING in the top level directory of the kernel tree.
 */
+#include <linux/debugfs.h>
 #include <linux/kernel.h>
 #include <linux/hwmon.h>
 #include <linux/list.h>
@@ -101,6 +102,11 @@ struct atk_data {
        int temperature_count;
        int fan_count;
        struct list_head sensor_list;
+        struct {
+                struct dentry *root;
+                u32 id;
+        } debugfs;
 };
@@ -624,6 +630,187 @@ static int atk_read_value(struct atk_sensor_data *sensor, u64 *value)
        return err;
 }
+#ifdef CONFIG_DEBUG_FS
+static int atk_debugfs_gitm_get(void *p, u64 *val)
+{
+        struct atk_data *data = p;
+        union acpi_object *ret;
+        struct atk_acpi_ret_buffer *buf;
+        int err = 0;
+        if (!data->read_handle)
+                return -ENODEV;
+        if (!data->debugfs.id)
+                return -EINVAL;
+        ret = atk_gitm(data, data->debugfs.id);
+        if (IS_ERR(ret))
+                return PTR_ERR(ret);
+        buf = (struct atk_acpi_ret_buffer *)ret->buffer.pointer;
+        if (buf->flags)
+                *val = buf->value;
+        else
+                err = -EIO;
+        return err;
+}
+DEFINE_SIMPLE_ATTRIBUTE(atk_debugfs_gitm,
+                        atk_debugfs_gitm_get,
+                        NULL,
+                        "0x%08llx\n")
+static int atk_acpi_print(char *buf, size_t sz, union acpi_object *obj)
+{
+        int ret = 0;
+        switch (obj->type) {
+        case ACPI_TYPE_INTEGER:
+                ret = snprintf(buf, sz, "0x%08llx\n", obj->integer.value);
+                break;
+        case ACPI_TYPE_STRING:
+                ret = snprintf(buf, sz, "%s\n", obj->string.pointer);
+                break;
+        }
+        return ret;
+}
+static void atk_pack_print(char *buf, size_t sz, union acpi_object *pack)
+{
+        int ret;
+        int i;
+        for (i = 0; i < pack->package.count; i++) {
+                union acpi_object *obj = &pack->package.elements[i];
+                ret = atk_acpi_print(buf, sz, obj);
+                if (ret >= sz)
+                        break;
+                buf += ret;
+                sz -= ret;
+        }
+}
+static int atk_debugfs_ggrp_open(struct inode *inode, struct file *file)
+{
+        struct atk_data *data = inode->i_private;
+        char *buf = NULL;
+        union acpi_object *ret;
+        u8 cls;
+        int i;
+        if (!data->enumerate_handle)
+                return -ENODEV;
+        if (!data->debugfs.id)
+                return -EINVAL;
+        cls = (data->debugfs.id & 0xff000000) >> 24;
+        ret = atk_ggrp(data, cls);
+        if (IS_ERR(ret))
+                return PTR_ERR(ret);
+        for (i = 0; i < ret->package.count; i++) {
+                union acpi_object *pack = &ret->package.elements[i];
+                union acpi_object *id;
+                if (pack->type != ACPI_TYPE_PACKAGE)
+                        continue;
+                if (!pack->package.count)
+                        continue;
+                id = &pack->package.elements[0];
+                if (id->integer.value == data->debugfs.id) {
+                        /* Print the package */
+                        buf = kzalloc(512, GFP_KERNEL);
+                        if (!buf) {
+                                ACPI_FREE(ret);
+                                return -ENOMEM;
+                        }
+                        atk_pack_print(buf, 512, pack);
+                        break;
+                }
+        }
+        ACPI_FREE(ret);
+        if (!buf)
+                return -EINVAL;
+        file->private_data = buf;
+        return nonseekable_open(inode, file);
+}
+static ssize_t atk_debugfs_ggrp_read(struct file *file, char __user *buf,
+                size_t count, loff_t *pos)
+{
+        char *str = file->private_data;
+        size_t len = strlen(str);
+        return simple_read_from_buffer(buf, count, pos, str, len);
+}
+static int atk_debugfs_ggrp_release(struct inode *inode, struct file *file)
+{
+        kfree(file->private_data);
+        return 0;
+}
+static const struct file_operations atk_debugfs_ggrp_fops = {
+        .read           = atk_debugfs_ggrp_read,
+        .open           = atk_debugfs_ggrp_open,
+        .release        = atk_debugfs_ggrp_release,
+};
+static void atk_debugfs_init(struct atk_data *data)
+{
+        struct dentry *d;
+        struct dentry *f;
+        data->debugfs.id = 0;
+        d = debugfs_create_dir("asus_atk0110", NULL);
+        if (!d || IS_ERR(d))
+                return;
+        f = debugfs_create_x32("id", S_IRUSR | S_IWUSR, d, &data->debugfs.id);
+        if (!f || IS_ERR(f))
+                goto cleanup;
+        f = debugfs_create_file("gitm", S_IRUSR, d, data,
+                        &atk_debugfs_gitm);
+        if (!f || IS_ERR(f))
+                goto cleanup;
+        f = debugfs_create_file("ggrp", S_IRUSR, d, data,
+                        &atk_debugfs_ggrp_fops);
+        if (!f || IS_ERR(f))
+                goto cleanup;
+        data->debugfs.root = d;
+        return;
+cleanup:
+        debugfs_remove_recursive(d);
+}
+static void atk_debugfs_cleanup(struct atk_data *data)
+{
+        debugfs_remove_recursive(data->debugfs.root);
+}
+#else /* CONFIG_DEBUG_FS */
+static void atk_debugfs_init(struct atk_data *data)
+{
+}
+static void atk_debugfs_cleanup(struct atk_data *data)
+{
+}
+#endif
 static int atk_add_sensor(struct atk_data *data, union acpi_object *obj)
 {
        struct device *dev = &data->acpi_dev->dev;
@@ -1047,76 +1234,75 @@ remove:
        return err;
 }
-static int atk_check_old_if(struct atk_data *data)
+static int atk_probe_if(struct atk_data *data)
 {
        struct device *dev = &data->acpi_dev->dev;
        acpi_handle ret;
        acpi_status status;
+        int err = 0;
        /* RTMP: read temperature */
        status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_TMP, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->rtmp_handle = ret;
+        else
                dev_dbg(dev, "method " METHOD_OLD_READ_TMP " not found: %s\n",
                                acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->rtmp_handle = ret;
        /* RVLT: read voltage */
        status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_VLT, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->rvlt_handle = ret;
+        else
                dev_dbg(dev, "method " METHOD_OLD_READ_VLT " not found: %s\n",
                                acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->rvlt_handle = ret;
        /* RFAN: read fan status */
        status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_FAN, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->rfan_handle = ret;
+        else
                dev_dbg(dev, "method " METHOD_OLD_READ_FAN " not found: %s\n",
                                acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->rfan_handle = ret;
-        return 0;
-}
-static int atk_check_new_if(struct atk_data *data)
-{
-        struct device *dev = &data->acpi_dev->dev;
-        acpi_handle ret;
-        acpi_status status;
        /* Enumeration */
        status = acpi_get_handle(data->atk_handle, METHOD_ENUMERATE, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->enumerate_handle = ret;
+        else
                dev_dbg(dev, "method " METHOD_ENUMERATE " not found: %s\n",
                                acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->enumerate_handle = ret;
        /* De-multiplexer (read) */
        status = acpi_get_handle(data->atk_handle, METHOD_READ, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->read_handle = ret;
+        else
                dev_dbg(dev, "method " METHOD_READ " not found: %s\n",
                                acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->read_handle = ret;
        /* De-multiplexer (write) */
        status = acpi_get_handle(data->atk_handle, METHOD_WRITE, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
-                dev_dbg(dev, "method " METHOD_READ " not found: %s\n",
+                data->write_handle = ret;
+        else
+                dev_dbg(dev, "method " METHOD_WRITE " not found: %s\n",
                                 acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->write_handle = ret;
-        return 0;
+        /* Check for hwmon methods: first check "old" style methods; note that
+         * both may be present: in this case we stick to the old interface;
+         * analysis of multiple DSDTs indicates that when both interfaces
+         * are present the new one (GGRP/GITM) is not functional.
+         */
+        if (data->rtmp_handle && data->rvlt_handle && data->rfan_handle)
+                data->old_interface = true;
+        else if (data->enumerate_handle && data->read_handle &&
+                        data->write_handle)
+                data->old_interface = false;
+        else
+                err = -ENODEV;
+        return err;
 }
 static int atk_add(struct acpi_device *device)
@@ -1155,28 +1341,19 @@ static int atk_add(struct acpi_device *device)
        }
        ACPI_FREE(buf.pointer);
-        /* Check for hwmon methods: first check "old" style methods; note that
+        err = atk_probe_if(data);
-         * both may be present: in this case we stick to the old interface;
+        if (err) {
-         * analysis of multiple DSDTs indicates that when both interfaces
+                dev_err(&device->dev, "No usable hwmon interface detected\n");
-         * are present the new one (GGRP/GITM) is not functional.
+                goto out;
-         */
-        err = atk_check_old_if(data);
-        if (!err) {
-                dev_dbg(&device->dev, "Using old hwmon interface\n");
-                data->old_interface = true;
-        } else {
-                err = atk_check_new_if(data);
-                if (err)
-                        goto out;
-                dev_dbg(&device->dev, "Using new hwmon interface\n");
-                data->old_interface = false;
        }
-        if (data->old_interface)
+        if (data->old_interface) {
+                dev_dbg(&device->dev, "Using old hwmon interface\n");
                err = atk_enumerate_old_hwmon(data);
-        else
+        } else {
+                dev_dbg(&device->dev, "Using new hwmon interface\n");
                err = atk_enumerate_new_hwmon(data);
+        }
        if (err < 0)
                goto out;
        if (err == 0) {
@@ -1190,6 +1367,8 @@ static int atk_add(struct acpi_device *device)
        if (err)
                goto cleanup;
+        atk_debugfs_init(data);
        device->driver_data = data;
        return 0;
 cleanup:
@@ -1208,6 +1387,8 @@ static int atk_remove(struct acpi_device *device, int type)
        device->driver_data = NULL;
+        atk_debugfs_cleanup(data);
        atk_remove_files(data);
        atk_free_sensors(data);
        hwmon_device_unregister(data->hwmon_dev);
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index caef39cda8c8..2d7bceeed0bc 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -33,6 +33,7 @@
 #include <linux/list.h>
 #include <linux/platform_device.h>
 #include <linux/cpu.h>
+#include <linux/pci.h>
 #include <asm/msr.h>
 #include <asm/processor.h>
@@ -161,6 +162,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
        int usemsr_ee = 1;
        int err;
        u32 eax, edx;
+        struct pci_dev *host_bridge;
        /* Early chips have no MSR for TjMax */
@@ -168,11 +170,21 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
                usemsr_ee = 0;
        }
-        /* Atoms seems to have TjMax at 90C */
+        /* Atom CPUs */
        if (c->x86_model == 0x1c) {
                usemsr_ee = 0;
-                tjmax = 90000;
+                host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+                if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
+                    && (host_bridge->device == 0xa000   /* NM10 based nettop */
+                    || host_bridge->device == 0xa010))  /* NM10 based netbook */
+                        tjmax = 100000;
+                else
+                        tjmax = 90000;
+                pci_dev_put(host_bridge);
        }
        if ((c->x86_model > 0xe) && (usemsr_ee)) {
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index d8a26d16d948..099a2138cdf6 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -33,6 +33,16 @@ static bool force;
 module_param(force, bool, 0444);
 MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
+/* CPUID function 0x80000001, ebx */
+#define CPUID_PKGTYPE_MASK      0xf0000000
+#define CPUID_PKGTYPE_F         0x00000000
+#define CPUID_PKGTYPE_AM2R2_AM3 0x10000000
+/* DRAM controller (PCI function 2) */
+#define REG_DCT0_CONFIG_HIGH            0x094
+#define  DDR3_MODE                      0x00000100
+/* miscellaneous (PCI function 3) */
 #define REG_HARDWARE_THERMAL_CONTROL    0x64
 #define  HTC_ENABLE                     0x00000001
@@ -85,13 +95,28 @@ static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
 static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1);
 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
-static bool __devinit has_erratum_319(void)
+static bool __devinit has_erratum_319(struct pci_dev *pdev)
 {
+        u32 pkg_type, reg_dram_cfg;
+        if (boot_cpu_data.x86 != 0x10)
+                return false;
        /*
-         * Erratum 319: The thermal sensor of older Family 10h processors
+         * Erratum 319: The thermal sensor of Socket F/AM2+ processors
-         *              (B steppings) may be unreliable.
+         *              may be unreliable.
         */
-        return boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model <= 2;
+        pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK;
+        if (pkg_type == CPUID_PKGTYPE_F)
+                return true;
+        if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3)
+                return false;
+        /* Differentiate between AM2+ (bad) and AM3 (good) */
+        pci_bus_read_config_dword(pdev->bus,
+                                  PCI_DEVFN(PCI_SLOT(pdev->devfn), 2),
+                                  REG_DCT0_CONFIG_HIGH, &reg_dram_cfg);
+        return !(reg_dram_cfg & DDR3_MODE);
 }
 static int __devinit k10temp_probe(struct pci_dev *pdev,
@@ -99,9 +124,10 @@ static int __devinit k10temp_probe(struct pci_dev *pdev,
 {
        struct device *hwmon_dev;
        u32 reg_caps, reg_htc;
+        int unreliable = has_erratum_319(pdev);
        int err;
-        if (has_erratum_319() && !force) {
+        if (unreliable && !force) {
                dev_err(&pdev->dev,
                        "unreliable CPU thermal sensor; monitoring disabled\n");
                err = -ENODEV;
@@ -139,7 +165,7 @@ static int __devinit k10temp_probe(struct pci_dev *pdev,
        }
        dev_set_drvdata(&pdev->dev, hwmon_dev);
-        if (has_erratum_319() && force)
+        if (unreliable && force)
                dev_warn(&pdev->dev,
                         "unreliable CPU thermal sensor; check erratum 319\n");
        return 0;
@@ -169,7 +195,7 @@ static void __devexit k10temp_remove(struct pci_dev *pdev)
        dev_set_drvdata(&pdev->dev, NULL);
 }
-static struct pci_device_id k10temp_id_table[] = {
+static const struct pci_device_id k10temp_id_table[] = {
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
        { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
        {}
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index 1fe995111841..0ceb6d6200a3 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -136,7 +136,7 @@ static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 1, 0);
 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 1, 1);
 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
-static struct pci_device_id k8temp_ids[] = {
+static const struct pci_device_id k8temp_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
        { 0 },
 };
diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 12f2e7086560..79c2931e3008 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -697,7 +697,7 @@ static struct sis5595_data *sis5595_update_device(struct device *dev)
        return data;
 }
-static struct pci_device_id sis5595_pci_ids[] = {
+static const struct pci_device_id sis5595_pci_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
        { 0, }
 };
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index 39e82a492f26..f397ce7ad598 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -767,7 +767,7 @@ static struct via686a_data *via686a_update_device(struct device *dev)
        return data;
 }
-static struct pci_device_id via686a_pci_ids[] = {
+static const struct pci_device_id via686a_pci_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) },
        { 0, }
 };
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 470a1226ba2b..d47b4c9949c2 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -697,7 +697,7 @@ static struct platform_driver vt8231_driver = {
        .remove = __devexit_p(vt8231_remove),
 };
-static struct pci_device_id vt8231_pci_ids[] = {
+static const struct pci_device_id vt8231_pci_ids[] = {
        { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4) },
        { 0, }
 };
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 85f0e8cd875b..1f552c6e7579 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -85,7 +85,14 @@ static void mmc_blk_put(struct mmc_blk_data *md)
        mutex_lock(&open_lock);
        md->usage--;
        if (md->usage == 0) {
+                int devmaj = MAJOR(disk_devt(md->disk));
                int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT;
+                if (!devmaj)
+                        devidx = md->disk->first_minor >> MMC_SHIFT;
+                blk_cleanup_queue(md->queue.queue);
                __clear_bit(devidx, dev_use);
                put_disk(md->disk);
@@ -613,6 +620,7 @@ static int mmc_blk_probe(struct mmc_card *card)
        return 0;
 out:
+        mmc_cleanup_queue(&md->queue);
        mmc_blk_put(md);
        return err;
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index 49e582356c65..c5a7a855f4b1 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -90,9 +90,10 @@ static void mmc_request(struct request_queue *q)
        struct request *req;
        if (!mq) {
-                printk(KERN_ERR "MMC: killing requests for dead queue\n");
+                while ((req = blk_fetch_request(q)) != NULL) {
-                while ((req = blk_fetch_request(q)) != NULL)
+                        req->cmd_flags |= REQ_QUIET;
                        __blk_end_request_all(req, -EIO);
+                }
                return;
        }
@@ -223,17 +224,18 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
        struct request_queue *q = mq->queue;
        unsigned long flags;
-        /* Mark that we should start throwing out stragglers */
-        spin_lock_irqsave(q->queue_lock, flags);
-        q->queuedata = NULL;
-        spin_unlock_irqrestore(q->queue_lock, flags);
        /* Make sure the queue isn't suspended, as that will deadlock */
        mmc_queue_resume(mq);
        /* Then terminate our worker thread */
        kthread_stop(mq->thread);
+        /* Empty the queue */
+        spin_lock_irqsave(q->queue_lock, flags);
+        q->queuedata = NULL;
+        blk_start_queue(q);
+        spin_unlock_irqrestore(q->queue_lock, flags);
        if (mq->bounce_sg)
                kfree(mq->bounce_sg);
        mq->bounce_sg = NULL;
@@ -245,8 +247,6 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
                kfree(mq->bounce_buf);
        mq->bounce_buf = NULL;
-        blk_cleanup_queue(mq->queue);
        mq->card = NULL;
 }
 EXPORT_SYMBOL(mmc_cleanup_queue);
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index c11189446a1f..0eac6c814904 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -207,7 +207,7 @@ static int mmc_read_ext_csd(struct mmc_card *card)
        }
        card->ext_csd.rev = ext_csd[EXT_CSD_REV];
-        if (card->ext_csd.rev > 3) {
+        if (card->ext_csd.rev > 5) {
                printk(KERN_ERR "%s: unrecognised EXT_CSD structure "
                        "version %d\n", mmc_hostname(card->host),
                        card->ext_csd.rev);
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index c8c12325e69b..e9aa814ddd23 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -1096,9 +1096,9 @@ static int cmos_pnp_resume(struct pnp_dev *pnp)
 #define cmos_pnp_resume         NULL
 #endif
-static void cmos_pnp_shutdown(struct device *pdev)
+static void cmos_pnp_shutdown(struct pnp_dev *pnp)
 {
-        if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(pdev))
+        if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
                return;
        cmos_do_shutdown();
@@ -1117,15 +1117,12 @@ static struct pnp_driver cmos_pnp_driver = {
        .id_table       = rtc_ids,
        .probe          = cmos_pnp_probe,
        .remove         = __exit_p(cmos_pnp_remove),
+        .shutdown       = cmos_pnp_shutdown,
        /* flag ensures resume() gets called, and stops syslog spam */
        .flags          = PNP_DRIVER_RES_DO_NOT_CHANGE,
        .suspend        = cmos_pnp_suspend,
        .resume         = cmos_pnp_resume,
-        .driver         = {
-                .name     = (char *)driver_name,
-                .shutdown = cmos_pnp_shutdown,
-        }
 };
 #endif  /* CONFIG_PNP */
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c
index 409ca9643528..a3a7f8938175 100644
--- a/drivers/video/backlight/omap1_bl.c
+++ b/drivers/video/backlight/omap1_bl.c
@@ -139,8 +139,6 @@ static int omapbl_probe(struct platform_device *pdev)
        if (!pdata)
                return -ENXIO;
-        omapbl_ops.check_fb = pdata->check_fb;
        bl = kzalloc(sizeof(struct omap_backlight), GFP_KERNEL);
        if (unlikely(!bl))
                return -ENOMEM;
diff --git a/fs/gfs2/file.c b/fs/gfs2/file.c
index 4eb308aa3234..a6abbae8a278 100644
--- a/fs/gfs2/file.c
+++ b/fs/gfs2/file.c
@@ -569,6 +569,40 @@ static int gfs2_fsync(struct file *file, struct dentry *dentry, int datasync)
        return ret;
 }
+/**
+ * gfs2_file_aio_write - Perform a write to a file
+ * @iocb: The io context
+ * @iov: The data to write
+ * @nr_segs: Number of @iov segments
+ * @pos: The file position
+ *
+ * We have to do a lock/unlock here to refresh the inode size for
+ * O_APPEND writes, otherwise we can land up writing at the wrong
+ * offset. There is still a race, but provided the app is using its
+ * own file locking, this will make O_APPEND work as expected.
+ *
+ */
+static ssize_t gfs2_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
+                                   unsigned long nr_segs, loff_t pos)
+{
+        struct file *file = iocb->ki_filp;
+        if (file->f_flags & O_APPEND) {
+                struct dentry *dentry = file->f_dentry;
+                struct gfs2_inode *ip = GFS2_I(dentry->d_inode);
+                struct gfs2_holder gh;
+                int ret;
+                ret = gfs2_glock_nq_init(ip->i_gl, LM_ST_SHARED, 0, &gh);
+                if (ret)
+                        return ret;
+                gfs2_glock_dq_uninit(&gh);
+        }
+        return generic_file_aio_write(iocb, iov, nr_segs, pos);
+}
 #ifdef CONFIG_GFS2_FS_LOCKING_DLM
 /**
@@ -711,7 +745,7 @@ const struct file_operations gfs2_file_fops = {
        .read           = do_sync_read,
        .aio_read       = generic_file_aio_read,
        .write          = do_sync_write,
-        .aio_write      = generic_file_aio_write,
+        .aio_write      = gfs2_file_aio_write,
        .unlocked_ioctl = gfs2_ioctl,
        .mmap           = gfs2_mmap,
        .open           = gfs2_open,
@@ -741,7 +775,7 @@ const struct file_operations gfs2_file_fops_nolock = {
        .read           = do_sync_read,
        .aio_read       = generic_file_aio_read,
        .write          = do_sync_write,
-        .aio_write      = generic_file_aio_write,
+        .aio_write      = gfs2_file_aio_write,
        .unlocked_ioctl = gfs2_ioctl,
        .mmap           = gfs2_mmap,
        .open           = gfs2_open,
diff --git a/fs/gfs2/meta_io.c b/fs/gfs2/meta_io.c
index cb8d7a93d5ec..6f68a5f18eb8 100644
--- a/fs/gfs2/meta_io.c
+++ b/fs/gfs2/meta_io.c
@@ -121,7 +121,7 @@ struct inode *gfs2_aspace_get(struct gfs2_sbd *sdp)
        if (aspace) {
                mapping_set_gfp_mask(aspace->i_mapping, GFP_NOFS);
                aspace->i_mapping->a_ops = &aspace_aops;
-                aspace->i_size = ~0ULL;
+                aspace->i_size = MAX_LFS_FILESIZE;
                ip = GFS2_I(aspace);
                clear_bit(GIF_USER, &ip->i_flags);
                insert_inode_hash(aspace);
diff --git a/fs/gfs2/ops_inode.c b/fs/gfs2/ops_inode.c
index 247436c10deb..78f73ca1ef3e 100644
--- a/fs/gfs2/ops_inode.c
+++ b/fs/gfs2/ops_inode.c
@@ -748,7 +748,7 @@ static int gfs2_rename(struct inode *odir, struct dentry *odentry,
        struct gfs2_rgrpd *nrgd;
        unsigned int num_gh;
        int dir_rename = 0;
-        int alloc_required;
+        int alloc_required = 0;
        unsigned int x;
        int error;
@@ -867,7 +867,9 @@ static int gfs2_rename(struct inode *odir, struct dentry *odentry,
                        goto out_gunlock;
        }
-        alloc_required = error = gfs2_diradd_alloc_required(ndir, &ndentry->d_name);
+        if (nip == NULL)
+                alloc_required = gfs2_diradd_alloc_required(ndir, &ndentry->d_name);
+        error = alloc_required;
        if (error < 0)
                goto out_gunlock;
        error = 0;
diff --git a/fs/gfs2/xattr.c b/fs/gfs2/xattr.c
index 8a04108e0c22..c2ebdf2c01d4 100644
--- a/fs/gfs2/xattr.c
+++ b/fs/gfs2/xattr.c
@@ -1296,6 +1296,7 @@ fail:
 int gfs2_xattr_acl_chmod(struct gfs2_inode *ip, struct iattr *attr, char *data)
 {
+        struct gfs2_sbd *sdp = GFS2_SB(&ip->i_inode);
        struct gfs2_ea_location el;
        struct buffer_head *dibh;
        int error;
@@ -1305,16 +1306,17 @@ int gfs2_xattr_acl_chmod(struct gfs2_inode *ip, struct iattr *attr, char *data)
                return error;
        if (GFS2_EA_IS_STUFFED(el.el_ea)) {
-                error = gfs2_trans_begin(GFS2_SB(&ip->i_inode), RES_DINODE + RES_EATTR, 0);
+                error = gfs2_trans_begin(sdp, RES_DINODE + RES_EATTR, 0);
-                if (error)
+                if (error == 0) {
-                        return error;
+                        gfs2_trans_add_bh(ip->i_gl, el.el_bh, 1);
+                        memcpy(GFS2_EA2DATA(el.el_ea), data,
-                gfs2_trans_add_bh(ip->i_gl, el.el_bh, 1);
+                               GFS2_EA_DATA_LEN(el.el_ea));
-                memcpy(GFS2_EA2DATA(el.el_ea), data,
+                }
-                       GFS2_EA_DATA_LEN(el.el_ea));
+        } else {
-        } else
                error = ea_acl_chmod_unstuffed(ip, el.el_ea, data);
+        }
+        brelse(el.el_bh);
        if (error)
                return error;
@@ -1327,8 +1329,7 @@ int gfs2_xattr_acl_chmod(struct gfs2_inode *ip, struct iattr *attr, char *data)
                brelse(dibh);
        }
-        gfs2_trans_end(GFS2_SB(&ip->i_inode));
+        gfs2_trans_end(sdp);
        return error;
 }
diff --git a/fs/proc/array.c b/fs/proc/array.c
index f560325c444f..13b5d0708175 100644
--- a/fs/proc/array.c
+++ b/fs/proc/array.c
@@ -327,94 +327,6 @@ static inline void task_context_switch_counts(struct seq_file *m,
                        p->nivcsw);
 }
-#ifdef CONFIG_MMU
-struct stack_stats {
-        struct vm_area_struct *vma;
-        unsigned long   startpage;
-        unsigned long   usage;
-};
-static int stack_usage_pte_range(pmd_t *pmd, unsigned long addr,
-                                unsigned long end, struct mm_walk *walk)
-{
-        struct stack_stats *ss = walk->private;
-        struct vm_area_struct *vma = ss->vma;
-        pte_t *pte, ptent;
-        spinlock_t *ptl;
-        int ret = 0;
-        pte = pte_offset_map_lock(vma->vm_mm, pmd, addr, &ptl);
-        for (; addr != end; pte++, addr += PAGE_SIZE) {
-                ptent = *pte;
-#ifdef CONFIG_STACK_GROWSUP
-                if (pte_present(ptent) || is_swap_pte(ptent))
-                        ss->usage = addr - ss->startpage + PAGE_SIZE;
-#else
-                if (pte_present(ptent) || is_swap_pte(ptent)) {
-                        ss->usage = ss->startpage - addr + PAGE_SIZE;
-                        pte++;
-                        ret = 1;
-                        break;
-                }
-#endif
-        }
-        pte_unmap_unlock(pte - 1, ptl);
-        cond_resched();
-        return ret;
-}
-static inline unsigned long get_stack_usage_in_bytes(struct vm_area_struct *vma,
-                                struct task_struct *task)
-{
-        struct stack_stats ss;
-        struct mm_walk stack_walk = {
-                .pmd_entry = stack_usage_pte_range,
-                .mm = vma->vm_mm,
-                .private = &ss,
-        };
-        if (!vma->vm_mm || is_vm_hugetlb_page(vma))
-                return 0;
-        ss.vma = vma;
-        ss.startpage = task->stack_start & PAGE_MASK;
-        ss.usage = 0;
-#ifdef CONFIG_STACK_GROWSUP
-        walk_page_range(KSTK_ESP(task) & PAGE_MASK, vma->vm_end,
-                &stack_walk);
-#else
-        walk_page_range(vma->vm_start, (KSTK_ESP(task) & PAGE_MASK) + PAGE_SIZE,
-                &stack_walk);
-#endif
-        return ss.usage;
-}
-static inline void task_show_stack_usage(struct seq_file *m,
-                                                struct task_struct *task)
-{
-        struct vm_area_struct   *vma;
-        struct mm_struct        *mm = get_task_mm(task);
-        if (mm) {
-                down_read(&mm->mmap_sem);
-                vma = find_vma(mm, task->stack_start);
-                if (vma)
-                        seq_printf(m, "Stack usage:\t%lu kB\n",
-                                get_stack_usage_in_bytes(vma, task) >> 10);
-                up_read(&mm->mmap_sem);
-                mmput(mm);
-        }
-}
-#else
-static void task_show_stack_usage(struct seq_file *m, struct task_struct *task)
-{
-}
-#endif          /* CONFIG_MMU */
 static void task_cpus_allowed(struct seq_file *m, struct task_struct *task)
 {
        seq_printf(m, "Cpus_allowed:\t");
@@ -445,7 +357,6 @@ int proc_pid_status(struct seq_file *m, struct pid_namespace *ns,
        task_show_regs(m, task);
 #endif
        task_context_switch_counts(m, task);
-        task_show_stack_usage(m, task);
        return 0;
 }
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index 47c03f4336b8..f277c4a111cb 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -361,12 +361,11 @@ static int smaps_pte_range(pmd_t *pmd, unsigned long addr, unsigned long end,
                if (!pte_present(ptent))
                        continue;
-                mss->resident += PAGE_SIZE;
                page = vm_normal_page(vma, addr, ptent);
                if (!page)
                        continue;
+                mss->resident += PAGE_SIZE;
                /* Accumulate the size in pages that have been accessed. */
                if (pte_young(ptent) || PageReferenced(page))
                        mss->referenced += PAGE_SIZE;
diff --git a/fs/quota/dquot.c b/fs/quota/dquot.c
index dea86abdf2e7..3fc62b097bed 100644
--- a/fs/quota/dquot.c
+++ b/fs/quota/dquot.c
@@ -1377,6 +1377,9 @@ static void inode_sub_rsv_space(struct inode *inode, qsize_t number)
 static qsize_t inode_get_rsv_space(struct inode *inode)
 {
        qsize_t ret;
+        if (!inode->i_sb->dq_op->get_reserved_space)
+                return 0;
        spin_lock(&inode->i_lock);
        ret = *inode_reserved_space(inode);
        spin_unlock(&inode->i_lock);
diff --git a/include/drm/drm_mode.h b/include/drm/drm_mode.h
index 43009bc2e757..bc4fdf27bd2e 100644
--- a/include/drm/drm_mode.h
+++ b/include/drm/drm_mode.h
@@ -160,6 +160,7 @@ struct drm_mode_get_encoder {
 #define DRM_MODE_CONNECTOR_HDMIA        11
 #define DRM_MODE_CONNECTOR_HDMIB        12
 #define DRM_MODE_CONNECTOR_TV           13
+#define DRM_MODE_CONNECTOR_eDP          14
 struct drm_mode_get_connector {
diff --git a/include/linux/decompress/unlzo.h b/include/linux/decompress/unlzo.h
new file mode 100644
index 000000000000..987229752519
--- /dev/null
+++ b/include/linux/decompress/unlzo.h
@@ -0,0 +1,10 @@
+#ifndef DECOMPRESS_UNLZO_H
+#define DECOMPRESS_UNLZO_H
+int unlzo(unsigned char *inbuf, int len,
+        int(*fill)(void*, unsigned int),
+        int(*flush)(void*, unsigned int),
+        unsigned char *output,
+        int *pos,
+        void(*error)(char *x));
+#endif
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index 211ff4497269..ab2cc20e21a5 100644
--- a/include/linux/highmem.h
+++ b/include/linux/highmem.h
@@ -46,7 +46,7 @@ void kmap_flush_unused(void);
 static inline unsigned int nr_free_highpages(void) { return 0; }
-#define totalhigh_pages 0
+#define totalhigh_pages 0UL
 #ifndef ARCH_HAS_KMAP
 static inline void *kmap(struct page *page)
diff --git a/include/linux/i2c/adp5588.h b/include/linux/i2c/adp5588.h
index fc5db826b48e..02c9af374741 100644
--- a/include/linux/i2c/adp5588.h
+++ b/include/linux/i2c/adp5588.h
@@ -89,4 +89,16 @@ struct adp5588_kpad_platform_data {
        unsigned short unlock_key2;     /* Unlock Key 2 */
 };
+struct adp5588_gpio_platform_data {
+        unsigned gpio_start;            /* GPIO Chip base # */
+        unsigned pullup_dis_mask;       /* Pull-Up Disable Mask */
+        int     (*setup)(struct i2c_client *client,
+                                int gpio, unsigned ngpio,
+                                void *context);
+        int     (*teardown)(struct i2c_client *client,
+                                int gpio, unsigned ngpio,
+                                void *context);
+        void    *context;
+};
 #endif
diff --git a/include/linux/kmemcheck.h b/include/linux/kmemcheck.h
index e880d4cf9e22..08d7dc4ddf40 100644
--- a/include/linux/kmemcheck.h
+++ b/include/linux/kmemcheck.h
@@ -36,6 +36,56 @@ int kmemcheck_hide_addr(unsigned long address);
 bool kmemcheck_is_obj_initialized(unsigned long addr, size_t size);
+/*
+ * Bitfield annotations
+ *
+ * How to use: If you have a struct using bitfields, for example
+ *
+ *     struct a {
+ *             int x:8, y:8;
+ *     };
+ *
+ * then this should be rewritten as
+ *
+ *     struct a {
+ *             kmemcheck_bitfield_begin(flags);
+ *             int x:8, y:8;
+ *             kmemcheck_bitfield_end(flags);
+ *     };
+ *
+ * Now the "flags_begin" and "flags_end" members may be used to refer to the
+ * beginning and end, respectively, of the bitfield (and things like
+ * &x.flags_begin is allowed). As soon as the struct is allocated, the bit-
+ * fields should be annotated:
+ *
+ *     struct a *a = kmalloc(sizeof(struct a), GFP_KERNEL);
+ *     kmemcheck_annotate_bitfield(a, flags);
+ */
+#define kmemcheck_bitfield_begin(name)  \
+        int name##_begin[0];
+#define kmemcheck_bitfield_end(name)    \
+        int name##_end[0];
+#define kmemcheck_annotate_bitfield(ptr, name)                          \
+        do {                                                            \
+                int _n;                                                 \
+                                                                        \
+                if (!ptr)                                               \
+                        break;                                          \
+                                                                        \
+                _n = (long) &((ptr)->name##_end)                        \
+                        - (long) &((ptr)->name##_begin);                \
+                MAYBE_BUILD_BUG_ON(_n < 0);                             \
+                                                                        \
+                kmemcheck_mark_initialized(&((ptr)->name##_begin), _n); \
+        } while (0)
+#define kmemcheck_annotate_variable(var)                                \
+        do {                                                            \
+                kmemcheck_mark_initialized(&(var), sizeof(var));        \
+        } while (0)                                                     \
 #else
 #define kmemcheck_enabled 0
@@ -106,60 +156,16 @@ static inline bool kmemcheck_is_obj_initialized(unsigned long addr, size_t size)
        return true;
 }
-#endif /* CONFIG_KMEMCHECK */
+#define kmemcheck_bitfield_begin(name)
+#define kmemcheck_bitfield_end(name)
-/*
+#define kmemcheck_annotate_bitfield(ptr, name)  \
- * Bitfield annotations
+        do {                                    \
- *
+        } while (0)
- * How to use: If you have a struct using bitfields, for example
- *
- *     struct a {
- *             int x:8, y:8;
- *     };
- *
- * then this should be rewritten as
- *
- *     struct a {
- *             kmemcheck_bitfield_begin(flags);
- *             int x:8, y:8;
- *             kmemcheck_bitfield_end(flags);
- *     };
- *
- * Now the "flags_begin" and "flags_end" members may be used to refer to the
- * beginning and end, respectively, of the bitfield (and things like
- * &x.flags_begin is allowed). As soon as the struct is allocated, the bit-
- * fields should be annotated:
- *
- *     struct a *a = kmalloc(sizeof(struct a), GFP_KERNEL);
- *     kmemcheck_annotate_bitfield(a, flags);
- *
- * Note: We provide the same definitions for both kmemcheck and non-
- * kmemcheck kernels. This makes it harder to introduce accidental errors. It
- * is also allowed to pass NULL pointers to kmemcheck_annotate_bitfield().
- */
-#define kmemcheck_bitfield_begin(name)  \
-        int name##_begin[0];
-#define kmemcheck_bitfield_end(name)    \
-        int name##_end[0];
-#define kmemcheck_annotate_bitfield(ptr, name)                          \
+#define kmemcheck_annotate_variable(var)        \
-        do {                                                            \
+        do {                                    \
-                int _n;                                                 \
-                                                                        \
-                if (!ptr)                                               \
-                        break;                                          \
-                                                                        \
-                _n = (long) &((ptr)->name##_end)                        \
-                        - (long) &((ptr)->name##_begin);                \
-                MAYBE_BUILD_BUG_ON(_n < 0);                             \
-                                                                        \
-                kmemcheck_mark_initialized(&((ptr)->name##_begin), _n); \
        } while (0)
-#define kmemcheck_annotate_variable(var)                                \
+#endif /* CONFIG_KMEMCHECK */
-        do {                                                            \
-                kmemcheck_mark_initialized(&(var), sizeof(var));        \
-        } while (0)                                                     \
 #endif /* LINUX_KMEMCHECK_H */
diff --git a/include/linux/poison.h b/include/linux/poison.h
index 7fc194aef8c2..2110a81c5e2a 100644
--- a/include/linux/poison.h
+++ b/include/linux/poison.h
@@ -2,13 +2,25 @@
 #define _LINUX_POISON_H
 /********** include/linux/list.h **********/
+/*
+ * Architectures might want to move the poison pointer offset
+ * into some well-recognized area such as 0xdead000000000000,
+ * that is also not mappable by user-space exploits:
+ */
+#ifdef CONFIG_ILLEGAL_POINTER_VALUE
+# define POISON_POINTER_DELTA _AC(CONFIG_ILLEGAL_POINTER_VALUE, UL)
+#else
+# define POISON_POINTER_DELTA 0
+#endif
 /*
 * These are non-NULL pointers that will result in page faults
 * under normal circumstances, used to verify that nobody uses
 * non-initialized list entries.
 */
-#define LIST_POISON1  ((void *) 0x00100100)
+#define LIST_POISON1  ((void *) 0x00100100 + POISON_POINTER_DELTA)
-#define LIST_POISON2  ((void *) 0x00200200)
+#define LIST_POISON2  ((void *) 0x00200200 + POISON_POINTER_DELTA)
 /********** include/linux/timer.h **********/
 /*
diff --git a/init/Kconfig b/init/Kconfig
index a23da9f01803..d95ca7cd5d45 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -115,10 +115,13 @@ config HAVE_KERNEL_BZIP2
 config HAVE_KERNEL_LZMA
        bool
+config HAVE_KERNEL_LZO
+        bool
 choice
        prompt "Kernel compression mode"
        default KERNEL_GZIP
-        depends on HAVE_KERNEL_GZIP || HAVE_KERNEL_BZIP2 || HAVE_KERNEL_LZMA
+        depends on HAVE_KERNEL_GZIP || HAVE_KERNEL_BZIP2 || HAVE_KERNEL_LZMA || HAVE_KERNEL_LZO
        help
          The linux kernel is a kind of self-extracting executable.
          Several compression algorithms are available, which differ
@@ -141,9 +144,8 @@ config KERNEL_GZIP
        bool "Gzip"
        depends on HAVE_KERNEL_GZIP
        help
-          The old and tried gzip compression. Its compression ratio is
+          The old and tried gzip compression. It provides a good balance
-          the poorest among the 3 choices; however its speed (both
+          between compression ratio and decompression speed.
-          compression and decompression) is the fastest.
 config KERNEL_BZIP2
        bool "Bzip2"
@@ -164,6 +166,14 @@ config KERNEL_LZMA
          two. Compression is slowest.  The kernel size is about 33%
          smaller with LZMA in comparison to gzip.
+config KERNEL_LZO
+        bool "LZO"
+        depends on HAVE_KERNEL_LZO
+        help
+          Its compression ratio is the poorest among the 4. The kernel
+          size is about about 10% bigger than gzip; however its speed
+          (both compression and decompression) is the fastest.
 endchoice
 config SWAP
diff --git a/kernel/cgroup.c b/kernel/cgroup.c
index 0249f4be9b5c..1fbcc748044a 100644
--- a/kernel/cgroup.c
+++ b/kernel/cgroup.c
@@ -2468,7 +2468,6 @@ static struct cgroup_pidlist *cgroup_pidlist_find(struct cgroup *cgrp,
                        /* make sure l doesn't vanish out from under us */
                        down_write(&l->mutex);
                        mutex_unlock(&cgrp->pidlist_mutex);
-                        l->use_count++;
                        return l;
                }
        }
diff --git a/kernel/kmod.c b/kernel/kmod.c
index 25b103190364..bf0e231d9702 100644
--- a/kernel/kmod.c
+++ b/kernel/kmod.c
@@ -520,13 +520,15 @@ int call_usermodehelper_pipe(char *path, char **argv, char **envp,
                return -ENOMEM;
        ret = call_usermodehelper_stdinpipe(sub_info, filp);
-        if (ret < 0)
+        if (ret < 0) {
-                goto out;
+                call_usermodehelper_freeinfo(sub_info);
+                return ret;
+        }
-        return call_usermodehelper_exec(sub_info, UMH_WAIT_EXEC);
+        ret = call_usermodehelper_exec(sub_info, UMH_WAIT_EXEC);
+        if (ret < 0)    /* Failed to execute helper, close pipe */
+                filp_close(*filp, NULL);
-  out:
-        call_usermodehelper_freeinfo(sub_info);
        return ret;
 }
 EXPORT_SYMBOL(call_usermodehelper_pipe);
diff --git a/kernel/signal.c b/kernel/signal.c
index d09692b40376..934ae5e687b9 100644
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -979,7 +979,8 @@ static void print_fatal_signal(struct pt_regs *regs, int signr)
                for (i = 0; i < 16; i++) {
                        unsigned char insn;
-                        __get_user(insn, (unsigned char *)(regs->ip + i));
+                        if (get_user(insn, (unsigned char *)(regs->ip + i)))
+                                break;
                        printk("%02x ", insn);
                }
        }
diff --git a/lib/Kconfig b/lib/Kconfig
index 1cfe51628e1b..97b136ff117e 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
@@ -117,6 +117,10 @@ config DECOMPRESS_BZIP2
 config DECOMPRESS_LZMA
        tristate
+config DECOMPRESS_LZO
+        select LZO_DECOMPRESS
+        tristate
 #
 # Generic allocator support is selected if needed
 #
diff --git a/lib/Makefile b/lib/Makefile
index 347ad8db29d3..911b25aed1e7 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -69,6 +69,7 @@ obj-$(CONFIG_LZO_DECOMPRESS) += lzo/
 lib-$(CONFIG_DECOMPRESS_GZIP) += decompress_inflate.o
 lib-$(CONFIG_DECOMPRESS_BZIP2) += decompress_bunzip2.o
 lib-$(CONFIG_DECOMPRESS_LZMA) += decompress_unlzma.o
+lib-$(CONFIG_DECOMPRESS_LZO) += decompress_unlzo.o
 obj-$(CONFIG_TEXTSEARCH) += textsearch.o
 obj-$(CONFIG_TEXTSEARCH_KMP) += ts_kmp.o
diff --git a/lib/decompress.c b/lib/decompress.c
index d2842f571674..a7606815541f 100644
--- a/lib/decompress.c
+++ b/lib/decompress.c
@@ -9,6 +9,7 @@
 #include <linux/decompress/bunzip2.h>
 #include <linux/decompress/unlzma.h>
 #include <linux/decompress/inflate.h>
+#include <linux/decompress/unlzo.h>
 #include <linux/types.h>
 #include <linux/string.h>
@@ -22,6 +23,9 @@
 #ifndef CONFIG_DECOMPRESS_LZMA
 # define unlzma NULL
 #endif
+#ifndef CONFIG_DECOMPRESS_LZO
+# define unlzo NULL
+#endif
 static const struct compress_format {
        unsigned char magic[2];
@@ -32,6 +36,7 @@ static const struct compress_format {
        { {037, 0236}, "gzip", gunzip },
        { {0x42, 0x5a}, "bzip2", bunzip2 },
        { {0x5d, 0x00}, "lzma", unlzma },
+        { {0x89, 0x4c}, "lzo", unlzo },
        { {0, 0}, NULL, NULL }
 };
diff --git a/lib/decompress_unlzo.c b/lib/decompress_unlzo.c
new file mode 100644
index 000000000000..db521f45626e
--- /dev/null
+++ b/lib/decompress_unlzo.c
@@ -0,0 +1,209 @@
+/*
+ * LZO decompressor for the Linux kernel. Code borrowed from the lzo
+ * implementation by Markus Franz Xaver Johannes Oberhumer.
+ *
+ * Linux kernel adaptation:
+ * Copyright (C) 2009
+ * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
+ *
+ * Original code:
+ * Copyright (C) 1996-2005 Markus Franz Xaver Johannes Oberhumer
+ * All Rights Reserved.
+ *
+ * lzop and the LZO library are free software; you can redistribute them
+ * and/or modify them under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING.
+ * If not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Markus F.X.J. Oberhumer
+ * <markus@oberhumer.com>
+ * http://www.oberhumer.com/opensource/lzop/
+ */
+#ifdef STATIC
+#include "lzo/lzo1x_decompress.c"
+#else
+#include <linux/slab.h>
+#include <linux/decompress/unlzo.h>
+#endif
+#include <linux/types.h>
+#include <linux/lzo.h>
+#include <linux/decompress/mm.h>
+#include <linux/compiler.h>
+#include <asm/unaligned.h>
+static const unsigned char lzop_magic[] = {
+        0x89, 0x4c, 0x5a, 0x4f, 0x00, 0x0d, 0x0a, 0x1a, 0x0a };
+#define LZO_BLOCK_SIZE        (256*1024l)
+#define HEADER_HAS_FILTER      0x00000800L
+STATIC inline int INIT parse_header(u8 *input, u8 *skip)
+{
+        int l;
+        u8 *parse = input;
+        u8 level = 0;
+        u16 version;
+        /* read magic: 9 first bits */
+        for (l = 0; l < 9; l++) {
+                if (*parse++ != lzop_magic[l])
+                        return 0;
+        }
+        /* get version (2bytes), skip library version (2),
+         * 'need to be extracted' version (2) and
+         * method (1) */
+        version = get_unaligned_be16(parse);
+        parse += 7;
+        if (version >= 0x0940)
+                level = *parse++;
+        if (get_unaligned_be32(parse) & HEADER_HAS_FILTER)
+                parse += 8; /* flags + filter info */
+        else
+                parse += 4; /* flags */
+        /* skip mode and mtime_low */
+        parse += 8;
+        if (version >= 0x0940)
+                parse += 4;     /* skip mtime_high */
+        l = *parse++;
+        /* don't care about the file name, and skip checksum */
+        parse += l + 4;
+        *skip = parse - input;
+        return 1;
+}
+STATIC inline int INIT unlzo(u8 *input, int in_len,
+                                int (*fill) (void *, unsigned int),
+                                int (*flush) (void *, unsigned int),
+                                u8 *output, int *posp,
+                                void (*error_fn) (char *x))
+{
+        u8 skip = 0, r = 0;
+        u32 src_len, dst_len;
+        size_t tmp;
+        u8 *in_buf, *in_buf_save, *out_buf;
+        int obytes_processed = 0;
+        set_error_fn(error_fn);
+        if (output) {
+                out_buf = output;
+        } else if (!flush) {
+                error("NULL output pointer and no flush function provided");
+                goto exit;
+        } else {
+                out_buf = malloc(LZO_BLOCK_SIZE);
+                if (!out_buf) {
+                        error("Could not allocate output buffer");
+                        goto exit;
+                }
+        }
+        if (input && fill) {
+                error("Both input pointer and fill function provided, don't know what to do");
+                goto exit_1;
+        } else if (input) {
+                in_buf = input;
+        } else if (!fill || !posp) {
+                error("NULL input pointer and missing position pointer or fill function");
+                goto exit_1;
+        } else {
+                in_buf = malloc(lzo1x_worst_compress(LZO_BLOCK_SIZE));
+                if (!in_buf) {
+                        error("Could not allocate input buffer");
+                        goto exit_1;
+                }
+        }
+        in_buf_save = in_buf;
+        if (posp)
+                *posp = 0;
+        if (fill)
+                fill(in_buf, lzo1x_worst_compress(LZO_BLOCK_SIZE));
+        if (!parse_header(input, &skip)) {
+                error("invalid header");
+                goto exit_2;
+        }
+        in_buf += skip;
+        if (posp)
+                *posp = skip;
+        for (;;) {
+                /* read uncompressed block size */
+                dst_len = get_unaligned_be32(in_buf);
+                in_buf += 4;
+                /* exit if last block */
+                if (dst_len == 0) {
+                        if (posp)
+                                *posp += 4;
+                        break;
+                }
+                if (dst_len > LZO_BLOCK_SIZE) {
+                        error("dest len longer than block size");
+                        goto exit_2;
+                }
+                /* read compressed block size, and skip block checksum info */
+                src_len = get_unaligned_be32(in_buf);
+                in_buf += 8;
+                if (src_len <= 0 || src_len > dst_len) {
+                        error("file corrupted");
+                        goto exit_2;
+                }
+                /* decompress */
+                tmp = dst_len;
+                r = lzo1x_decompress_safe((u8 *) in_buf, src_len,
+                                                out_buf, &tmp);
+                if (r != LZO_E_OK || dst_len != tmp) {
+                        error("Compressed data violation");
+                        goto exit_2;
+                }
+                obytes_processed += dst_len;
+                if (flush)
+                        flush(out_buf, dst_len);
+                if (output)
+                        out_buf += dst_len;
+                if (posp)
+                        *posp += src_len + 12;
+                if (fill) {
+                        in_buf = in_buf_save;
+                        fill(in_buf, lzo1x_worst_compress(LZO_BLOCK_SIZE));
+                } else
+                        in_buf += src_len;
+        }
+exit_2:
+        if (!input)
+                free(in_buf);
+exit_1:
+        if (!output)
+                free(out_buf);
+exit:
+        return obytes_processed;
+}
+#define decompress unlzo
diff --git a/lib/dma-debug.c b/lib/dma-debug.c
index cf906201aecf..7d2f0b33e5a8 100644
--- a/lib/dma-debug.c
+++ b/lib/dma-debug.c
@@ -913,6 +913,9 @@ static void check_sync(struct device *dev,
                                ref->size);
        }
+        if (entry->direction == DMA_BIDIRECTIONAL)
+                goto out;
        if (ref->direction != entry->direction) {
                err_printk(dev, entry, "DMA-API: device driver syncs "
                                "DMA memory with different direction "
@@ -923,9 +926,6 @@ static void check_sync(struct device *dev,
                                dir2name[ref->direction]);
        }
-        if (entry->direction == DMA_BIDIRECTIONAL)
-                goto out;
        if (to_cpu && !(entry->direction == DMA_FROM_DEVICE) &&
                      !(ref->direction == DMA_TO_DEVICE))
                err_printk(dev, entry, "DMA-API: device driver syncs "
@@ -948,7 +948,6 @@ static void check_sync(struct device *dev,
 out:
        put_hash_bucket(bucket, &flags);
 }
 void debug_dma_map_page(struct device *dev, struct page *page, size_t offset,
diff --git a/lib/lzo/lzo1x_decompress.c b/lib/lzo/lzo1x_decompress.c
index 5dc6b29c1575..f2fd09850223 100644
--- a/lib/lzo/lzo1x_decompress.c
+++ b/lib/lzo/lzo1x_decompress.c
@@ -11,11 +11,13 @@
 *  Richard Purdie <rpurdie@openedhand.com>
 */
+#ifndef STATIC
 #include <linux/module.h>
 #include <linux/kernel.h>
-#include <linux/lzo.h>
+#endif
-#include <asm/byteorder.h>
 #include <asm/unaligned.h>
+#include <linux/lzo.h>
 #include "lzodefs.h"
 #define HAVE_IP(x, ip_end, ip) ((size_t)(ip_end - ip) < (x))
@@ -244,9 +246,10 @@ lookbehind_overrun:
        *out_len = op - out;
        return LZO_E_LOOKBEHIND_OVERRUN;
 }
+#ifndef STATIC
 EXPORT_SYMBOL_GPL(lzo1x_decompress_safe);
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("LZO1X Decompressor");
+#endif
diff --git a/lib/rational.c b/lib/rational.c
index b3c099b5478e..3ed247b80662 100644
--- a/lib/rational.c
+++ b/lib/rational.c
@@ -7,6 +7,7 @@
 */
 #include <linux/rational.h>
+#include <linux/module.h>
 /*
 * calculate best rational approximation for a given fraction
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index d4996cf46eb6..3b8aeec4e327 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -903,7 +903,7 @@ static char *uuid_string(char *buf, char *end, const u8 *addr,
 *       IPv6 omits the colons (01020304...0f)
 *       IPv4 uses dot-separated decimal with leading 0's (010.123.045.006)
 * - 'I6c' for IPv6 addresses printed as specified by
- *       http://www.ietf.org/id/draft-kawamura-ipv6-text-representation-03.txt
+ *       http://tools.ietf.org/html/draft-ietf-6man-text-addr-representation-00
 * - 'U' For a 16 byte UUID/GUID, it prints the UUID/GUID in the form
 *       "xxxxxxxx-xxxx-xxxx-xxxx-xxxxxxxxxxxx"
 *       Options for %pU are:
@@ -1188,7 +1188,7 @@ qualifier:
 * %pI6 print an IPv6 address with colons
 * %pi6 print an IPv6 address without colons
 * %pI6c print an IPv6 address as specified by
- *   http://www.ietf.org/id/draft-kawamura-ipv6-text-representation-03.txt
+ *   http://tools.ietf.org/html/draft-ietf-6man-text-addr-representation-00
 * %pU[bBlL] print a UUID/GUID in big or little endian using lower or upper
 *   case.
 * %n is ignored
diff --git a/lib/zlib_inflate/inffast.c b/lib/zlib_inflate/inffast.c
index 8550b0c05d00..05e1559fa156 100644
--- a/lib/zlib_inflate/inffast.c
+++ b/lib/zlib_inflate/inffast.c
@@ -4,6 +4,8 @@
 */
 #include <linux/zutil.h>
+#include <asm/unaligned.h>
+#include <asm/byteorder.h>
 #include "inftrees.h"
 #include "inflate.h"
 #include "inffast.h"
@@ -24,9 +26,11 @@
 #ifdef POSTINC
 #  define OFF 0
 #  define PUP(a) *(a)++
+#  define UP_UNALIGNED(a) get_unaligned((a)++)
 #else
 #  define OFF 1
 #  define PUP(a) *++(a)
+#  define UP_UNALIGNED(a) get_unaligned(++(a))
 #endif
 /*
@@ -239,18 +243,47 @@ void inflate_fast(z_streamp strm, unsigned start)
                    }
                }
                else {
+                    unsigned short *sout;
+                    unsigned long loops;
                    from = out - dist;          /* copy direct from output */
-                    do {                        /* minimum length is three */
+                    /* minimum length is three */
-                        PUP(out) = PUP(from);
+                    /* Align out addr */
-                        PUP(out) = PUP(from);
+                    if (!((long)(out - 1 + OFF) & 1)) {
-                        PUP(out) = PUP(from);
+                        PUP(out) = PUP(from);
-                        len -= 3;
+                        len--;
-                    } while (len > 2);
+                    }
-                    if (len) {
+                    sout = (unsigned short *)(out - OFF);
-                        PUP(out) = PUP(from);
+                    if (dist > 2) {
-                        if (len > 1)
+                        unsigned short *sfrom;
-                            PUP(out) = PUP(from);
-                    }
+                        sfrom = (unsigned short *)(from - OFF);
+                        loops = len >> 1;
+                        do
+                            PUP(sout) = UP_UNALIGNED(sfrom);
+                        while (--loops);
+                        out = (unsigned char *)sout + OFF;
+                        from = (unsigned char *)sfrom + OFF;
+                    } else { /* dist == 1 or dist == 2 */
+                        unsigned short pat16;
+                        pat16 = *(sout-2+2*OFF);
+                        if (dist == 1)
+#if defined(__BIG_ENDIAN)
+                            pat16 = (pat16 & 0xff) | ((pat16 & 0xff) << 8);
+#elif defined(__LITTLE_ENDIAN)
+                            pat16 = (pat16 & 0xff00) | ((pat16 & 0xff00) >> 8);
+#else
+#error __BIG_ENDIAN nor __LITTLE_ENDIAN is defined
+#endif
+                        loops = len >> 1;
+                        do
+                            PUP(sout) = pat16;
+                        while (--loops);
+                        out = (unsigned char *)sout + OFF;
+                    }
+                    if (len & 1)
+                        PUP(out) = PUP(from);
                }
            }
            else if ((op & 64) == 0) {          /* 2nd level distance code */
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 65f38c218207..e91b81b63670 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -402,7 +402,7 @@ static void clear_huge_page(struct page *page,
 {
        int i;
-        if (unlikely(sz > MAX_ORDER_NR_PAGES)) {
+        if (unlikely(sz/PAGE_SIZE > MAX_ORDER_NR_PAGES)) {
                clear_gigantic_page(page, addr, sz);
                return;
        }
diff --git a/mm/percpu.c b/mm/percpu.c
index 442010cc91c6..083e7c91e5f6 100644
--- a/mm/percpu.c
+++ b/mm/percpu.c
@@ -1271,7 +1271,7 @@ static void pcpu_reclaim(struct work_struct *work)
 */
 void free_percpu(void *ptr)
 {
-        void *addr = __pcpu_ptr_to_addr(ptr);
+        void *addr;
        struct pcpu_chunk *chunk;
        unsigned long flags;
        int off;
@@ -1279,6 +1279,8 @@ void free_percpu(void *ptr)
        if (!ptr)
                return;
+        addr = __pcpu_ptr_to_addr(ptr);
        spin_lock_irqsave(&pcpu_lock, flags);
        chunk = pcpu_chunk_addr_search(addr);
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index cd815ac2a50b..0fe48cd91ffa 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -235,3 +235,8 @@ quiet_cmd_lzma = LZMA    $@
 cmd_lzma = (cat $(filter-out FORCE,$^) | \
        lzma -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
        (rm -f $@ ; false)
+quiet_cmd_lzo = LZO    $@
+cmd_lzo = (cat $(filter-out FORCE,$^) | \
+        lzop -9 && $(call size_append, $(filter-out FORCE,$^))) > $@ || \
+        (rm -f $@ ; false)
diff --git a/scripts/get_maintainer.pl b/scripts/get_maintainer.pl
index 445e8845f0a4..090f24839700 100755
--- a/scripts/get_maintainer.pl
+++ b/scripts/get_maintainer.pl
@@ -296,46 +296,56 @@ my @status = ();
 foreach my $file (@files) {
-#Do not match excluded file patterns
+    my %hash;
+    my $tvi = find_first_section();
-    my $exclude = 0;
+    while ($tvi < @typevalue) {
-    foreach my $line (@typevalue) {
+        my $start = find_starting_index($tvi);
-        if ($line =~ m/^(\C):\s*(.*)/) {
+        my $end = find_ending_index($tvi);
-            my $type = $1;
+        my $exclude = 0;
-            my $value = $2;
+        my $i;
-            if ($type eq 'X') {
-                if (file_match_pattern($file, $value)) {
+        #Do not match excluded file patterns
-                    $exclude = 1;
-                    last;
-                }
-            }
-        }
-    }
-    if (!$exclude) {
+        for ($i = $start; $i < $end; $i++) {
-        my $tvi = 0;
+            my $line = $typevalue[$i];
-        my %hash;
-        foreach my $line (@typevalue) {
            if ($line =~ m/^(\C):\s*(.*)/) {
                my $type = $1;
                my $value = $2;
-                if ($type eq 'F') {
+                if ($type eq 'X') {
                    if (file_match_pattern($file, $value)) {
-                        my $value_pd = ($value =~ tr@/@@);
+                        $exclude = 1;
-                        my $file_pd = ($file  =~ tr@/@@);
-                        $value_pd++ if (substr($value,-1,1) ne "/");
-                        if ($pattern_depth == 0 ||
-                            (($file_pd - $value_pd) < $pattern_depth)) {
-                            $hash{$tvi} = $value_pd;
-                        }
                    }
                }
            }
-            $tvi++;
        }
-        foreach my $line (sort {$hash{$b} <=> $hash{$a}} keys %hash) {
-            add_categories($line);
+        if (!$exclude) {
+            for ($i = $start; $i < $end; $i++) {
+                my $line = $typevalue[$i];
+                if ($line =~ m/^(\C):\s*(.*)/) {
+                    my $type = $1;
+                    my $value = $2;
+                    if ($type eq 'F') {
+                        if (file_match_pattern($file, $value)) {
+                            my $value_pd = ($value =~ tr@/@@);
+                            my $file_pd = ($file  =~ tr@/@@);
+                            $value_pd++ if (substr($value,-1,1) ne "/");
+                            if ($pattern_depth == 0 ||
+                                (($file_pd - $value_pd) < $pattern_depth)) {
+                                $hash{$tvi} = $value_pd;
+                            }
+                        }
+                    }
+                }
+            }
        }
+        $tvi += ($end - $start);
+    }
+    foreach my $line (sort {$hash{$b} <=> $hash{$a}} keys %hash) {
+        add_categories($line);
    }
    if ($email && $email_git) {
@@ -570,6 +580,20 @@ sub format_email {
    return $formatted_email;
 }
+sub find_first_section {
+    my $index = 0;
+    while ($index < @typevalue) {
+        my $tv = $typevalue[$index];
+        if (($tv =~ m/^(\C):\s*(.*)/)) {
+            last;
+        }
+        $index++;
+    }
+    return $index;
+}
 sub find_starting_index {
    my ($index) = @_;
diff --git a/usr/Kconfig b/usr/Kconfig
index 1c3039f28909..e2721f5a3504 100644
--- a/usr/Kconfig
+++ b/usr/Kconfig
@@ -72,6 +72,15 @@ config RD_LZMA
          Support loading of a LZMA encoded initial ramdisk or cpio buffer
          If unsure, say N.
+config RD_LZO
+        bool "Support initial ramdisks compressed using LZO" if EMBEDDED
+        default !EMBEDDED
+        depends on BLK_DEV_INITRD
+        select DECOMPRESS_LZO
+        help
+          Support loading of a LZO encoded initial ramdisk or cpio buffer
+          If unsure, say N.
 choice
        prompt "Built-in initramfs compression mode" if INITRAMFS_SOURCE!=""
        help
@@ -108,16 +117,15 @@ config INITRAMFS_COMPRESSION_GZIP
        bool "Gzip"
        depends on RD_GZIP
        help
-          The old and tried gzip compression. Its compression ratio is
+          The old and tried gzip compression. It provides a good balance
-          the poorest among the 3 choices; however its speed (both
+          between compression ratio and decompression speed.
-          compression and decompression) is the fastest.
 config INITRAMFS_COMPRESSION_BZIP2
        bool "Bzip2"
        depends on RD_BZIP2
        help
          Its compression ratio and speed is intermediate.
-          Decompression speed is slowest among the three.  The initramfs
+          Decompression speed is slowest among the four.  The initramfs
          size is about 10% smaller with bzip2, in comparison to gzip.
          Bzip2 uses a large amount of memory. For modern kernels you
          will need at least 8MB RAM or more for booting.
@@ -128,7 +136,15 @@ config INITRAMFS_COMPRESSION_LZMA
        help
          The most recent compression algorithm.
          Its ratio is best, decompression speed is between the other
-          two. Compression is slowest.  The initramfs size is about 33%
+          three. Compression is slowest. The initramfs size is about 33%
          smaller with LZMA in comparison to gzip.
+config INITRAMFS_COMPRESSION_LZO
+        bool "LZO"
+        depends on RD_LZO
+        help
+          Its compression ratio is the poorest among the four. The kernel
+          size is about about 10% bigger than gzip; however its speed
+          (both compression and decompression) is the fastest.
 endchoice