diff options
-rw-r--r-- | arch/arm/mach-s3c64xx/Kconfig | 7 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/clock.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/map.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/regs-clock.h | 5 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/mach-smdk6410.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/s3c6410.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-s3c64xx/setup-ide.c | 46 |
8 files changed, 79 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index f5a59727949f..12f063b12569 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig | |||
@@ -57,6 +57,11 @@ config S3C64XX_SETUP_I2C1 | |||
57 | help | 57 | help |
58 | Common setup code for i2c bus 1. | 58 | Common setup code for i2c bus 1. |
59 | 59 | ||
60 | config S3C64XX_SETUP_IDE | ||
61 | bool | ||
62 | help | ||
63 | Common setup code for S3C64XX IDE. | ||
64 | |||
60 | config S3C64XX_SETUP_FB_24BPP | 65 | config S3C64XX_SETUP_FB_24BPP |
61 | bool | 66 | bool |
62 | help | 67 | help |
@@ -95,6 +100,7 @@ config MACH_SMDK6410 | |||
95 | select S3C_DEV_HSMMC | 100 | select S3C_DEV_HSMMC |
96 | select S3C_DEV_HSMMC1 | 101 | select S3C_DEV_HSMMC1 |
97 | select S3C_DEV_I2C1 | 102 | select S3C_DEV_I2C1 |
103 | select SAMSUNG_DEV_IDE | ||
98 | select S3C_DEV_FB | 104 | select S3C_DEV_FB |
99 | select SAMSUNG_DEV_TS | 105 | select SAMSUNG_DEV_TS |
100 | select S3C_DEV_USB_HOST | 106 | select S3C_DEV_USB_HOST |
@@ -103,6 +109,7 @@ config MACH_SMDK6410 | |||
103 | select HAVE_S3C2410_WATCHDOG | 109 | select HAVE_S3C2410_WATCHDOG |
104 | select S3C64XX_SETUP_SDHCI | 110 | select S3C64XX_SETUP_SDHCI |
105 | select S3C64XX_SETUP_I2C1 | 111 | select S3C64XX_SETUP_I2C1 |
112 | select S3C64XX_SETUP_IDE | ||
106 | select S3C64XX_SETUP_FB_24BPP | 113 | select S3C64XX_SETUP_FB_24BPP |
107 | help | 114 | help |
108 | Machine support for the Samsung SMDK6410 | 115 | Machine support for the Samsung SMDK6410 |
diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 9d1006938f5c..aa5c36772b1a 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile | |||
@@ -35,6 +35,7 @@ obj-$(CONFIG_S3C64XX_DMA) += dma.o | |||
35 | 35 | ||
36 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o | 36 | obj-$(CONFIG_S3C64XX_SETUP_I2C0) += setup-i2c0.o |
37 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o | 37 | obj-$(CONFIG_S3C64XX_SETUP_I2C1) += setup-i2c1.o |
38 | obj-$(CONFIG_S3C64XX_SETUP_IDE) += setup-ide.o | ||
38 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o | 39 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI) += setup-sdhci.o |
39 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o | 40 | obj-$(CONFIG_S3C64XX_SETUP_FB_24BPP) += setup-fb-24bpp.o |
40 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o | 41 | obj-$(CONFIG_S3C64XX_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o |
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c index fbd85a9b7bbf..7772f92d2905 100644 --- a/arch/arm/mach-s3c64xx/clock.c +++ b/arch/arm/mach-s3c64xx/clock.c | |||
@@ -310,6 +310,12 @@ static struct clk init_clocks[] = { | |||
310 | .id = -1, | 310 | .id = -1, |
311 | .parent = &clk_p, | 311 | .parent = &clk_p, |
312 | .ctrlbit = S3C_CLKCON_PCLK_AC97, | 312 | .ctrlbit = S3C_CLKCON_PCLK_AC97, |
313 | }, { | ||
314 | .name = "cfcon", | ||
315 | .id = -1, | ||
316 | .parent = &clk_h, | ||
317 | .enable = s3c64xx_hclk_ctrl, | ||
318 | .ctrlbit = S3C_CLKCON_HCLK_IHOST, | ||
313 | } | 319 | } |
314 | }; | 320 | }; |
315 | 321 | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/map.h b/arch/arm/mach-s3c64xx/include/mach/map.h index e1eab3c94aea..1caaa5f25f8d 100644 --- a/arch/arm/mach-s3c64xx/include/mach/map.h +++ b/arch/arm/mach-s3c64xx/include/mach/map.h | |||
@@ -86,6 +86,9 @@ | |||
86 | #define S3C64XX_SZ_GPIO SZ_4K | 86 | #define S3C64XX_SZ_GPIO SZ_4K |
87 | 87 | ||
88 | #define S3C64XX_PA_SDRAM (0x50000000) | 88 | #define S3C64XX_PA_SDRAM (0x50000000) |
89 | |||
90 | #define S3C64XX_PA_CFCON (0x70300000) | ||
91 | |||
89 | #define S3C64XX_PA_VIC0 (0x71200000) | 92 | #define S3C64XX_PA_VIC0 (0x71200000) |
90 | #define S3C64XX_PA_VIC1 (0x71300000) | 93 | #define S3C64XX_PA_VIC1 (0x71300000) |
91 | 94 | ||
@@ -120,5 +123,6 @@ | |||
120 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG | 123 | #define S3C_PA_WDT S3C64XX_PA_WATCHDOG |
121 | 124 | ||
122 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC | 125 | #define SAMSUNG_PA_ADC S3C64XX_PA_ADC |
126 | #define SAMSUNG_PA_CFCON S3C64XX_PA_CFCON | ||
123 | 127 | ||
124 | #endif /* __ASM_ARCH_6400_MAP_H */ | 128 | #endif /* __ASM_ARCH_6400_MAP_H */ |
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h index 0114eb0c1fe7..05332b998ec0 100644 --- a/arch/arm/mach-s3c64xx/include/mach/regs-clock.h +++ b/arch/arm/mach-s3c64xx/include/mach/regs-clock.h | |||
@@ -34,6 +34,7 @@ | |||
34 | #define S3C_SCLK_GATE S3C_CLKREG(0x38) | 34 | #define S3C_SCLK_GATE S3C_CLKREG(0x38) |
35 | #define S3C_MEM0_GATE S3C_CLKREG(0x3C) | 35 | #define S3C_MEM0_GATE S3C_CLKREG(0x3C) |
36 | #define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) | 36 | #define S3C6410_CLK_SRC2 S3C_CLKREG(0x10C) |
37 | #define S3C_MEM_SYS_CFG S3C_CLKREG(0x120) | ||
37 | 38 | ||
38 | /* CLKDIV0 */ | 39 | /* CLKDIV0 */ |
39 | #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) | 40 | #define S3C6400_CLKDIV0_PCLK_MASK (0xf << 12) |
@@ -154,4 +155,8 @@ | |||
154 | #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) | 155 | #define S3C6400_CLKSRC_EPLL_MOUT_SHIFT (2) |
155 | #define S3C6400_CLKSRC_MFC (1 << 4) | 156 | #define S3C6400_CLKSRC_MFC (1 << 4) |
156 | 157 | ||
158 | /* MEM_SYS_CFG */ | ||
159 | #define MEM_SYS_CFG_INDEP_CF 0x4000 | ||
160 | #define MEM_SYS_CFG_EBI_FIX_PRI_CFCON 0x30 | ||
161 | |||
157 | #endif /* _PLAT_REGS_CLOCK_H */ | 162 | #endif /* _PLAT_REGS_CLOCK_H */ |
diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index d9a03555f88b..0d7d93fbc43b 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c | |||
@@ -56,6 +56,7 @@ | |||
56 | #include <mach/regs-gpio.h> | 56 | #include <mach/regs-gpio.h> |
57 | #include <mach/regs-sys.h> | 57 | #include <mach/regs-sys.h> |
58 | #include <mach/regs-srom.h> | 58 | #include <mach/regs-srom.h> |
59 | #include <plat/ata.h> | ||
59 | #include <plat/iic.h> | 60 | #include <plat/iic.h> |
60 | #include <plat/fb.h> | 61 | #include <plat/fb.h> |
61 | #include <plat/gpio-cfg.h> | 62 | #include <plat/gpio-cfg.h> |
@@ -242,6 +243,10 @@ static struct platform_device smdk6410_b_pwr_5v = { | |||
242 | }; | 243 | }; |
243 | #endif | 244 | #endif |
244 | 245 | ||
246 | static struct s3c_ide_platdata smdk6410_ide_pdata __initdata = { | ||
247 | .setup_gpio = s3c64xx_ide_setup_gpio, | ||
248 | }; | ||
249 | |||
245 | static struct map_desc smdk6410_iodesc[] = {}; | 250 | static struct map_desc smdk6410_iodesc[] = {}; |
246 | 251 | ||
247 | static struct platform_device *smdk6410_devices[] __initdata = { | 252 | static struct platform_device *smdk6410_devices[] __initdata = { |
@@ -265,6 +270,7 @@ static struct platform_device *smdk6410_devices[] __initdata = { | |||
265 | 270 | ||
266 | &smdk6410_smsc911x, | 271 | &smdk6410_smsc911x, |
267 | &s3c_device_adc, | 272 | &s3c_device_adc, |
273 | &s3c_device_cfcon, | ||
268 | &s3c_device_ts, | 274 | &s3c_device_ts, |
269 | &s3c_device_wdt, | 275 | &s3c_device_wdt, |
270 | }; | 276 | }; |
@@ -665,6 +671,8 @@ static void __init smdk6410_machine_init(void) | |||
665 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); | 671 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); |
666 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); | 672 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); |
667 | 673 | ||
674 | s3c_ide_set_platdata(&smdk6410_ide_pdata); | ||
675 | |||
668 | platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); | 676 | platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); |
669 | } | 677 | } |
670 | 678 | ||
diff --git a/arch/arm/mach-s3c64xx/s3c6410.c b/arch/arm/mach-s3c64xx/s3c6410.c index 014401c39f36..3ad25d296880 100644 --- a/arch/arm/mach-s3c64xx/s3c6410.c +++ b/arch/arm/mach-s3c64xx/s3c6410.c | |||
@@ -37,6 +37,7 @@ | |||
37 | #include <plat/devs.h> | 37 | #include <plat/devs.h> |
38 | #include <plat/clock.h> | 38 | #include <plat/clock.h> |
39 | #include <plat/sdhci.h> | 39 | #include <plat/sdhci.h> |
40 | #include <plat/ata-core.h> | ||
40 | #include <plat/iic-core.h> | 41 | #include <plat/iic-core.h> |
41 | #include <plat/adc.h> | 42 | #include <plat/adc.h> |
42 | #include <plat/onenand-core.h> | 43 | #include <plat/onenand-core.h> |
@@ -58,6 +59,7 @@ void __init s3c6410_map_io(void) | |||
58 | s3c_device_nand.name = "s3c6400-nand"; | 59 | s3c_device_nand.name = "s3c6400-nand"; |
59 | s3c_onenand_setname("s3c6410-onenand"); | 60 | s3c_onenand_setname("s3c6410-onenand"); |
60 | s3c64xx_onenand1_setname("s3c6410-onenand"); | 61 | s3c64xx_onenand1_setname("s3c6410-onenand"); |
62 | s3c_cfcon_setname("s3c64xx-pata"); | ||
61 | } | 63 | } |
62 | 64 | ||
63 | void __init s3c6410_init_clocks(int xtal) | 65 | void __init s3c6410_init_clocks(int xtal) |
diff --git a/arch/arm/mach-s3c64xx/setup-ide.c b/arch/arm/mach-s3c64xx/setup-ide.c new file mode 100644 index 000000000000..c12c315f33bc --- /dev/null +++ b/arch/arm/mach-s3c64xx/setup-ide.c | |||
@@ -0,0 +1,46 @@ | |||
1 | /* linux/arch/arm/mach-s3c64xx/setup-ide.c | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S3C64XX setup information for IDE | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/gpio.h> | ||
15 | #include <linux/io.h> | ||
16 | |||
17 | #include <mach/map.h> | ||
18 | #include <mach/regs-clock.h> | ||
19 | #include <plat/gpio-cfg.h> | ||
20 | |||
21 | void s3c64xx_ide_setup_gpio(void) | ||
22 | { | ||
23 | u32 reg; | ||
24 | u32 gpio = 0; | ||
25 | |||
26 | reg = readl(S3C_MEM_SYS_CFG) & (~0x3f); | ||
27 | |||
28 | /* Independent CF interface, CF chip select configuration */ | ||
29 | writel(reg | MEM_SYS_CFG_INDEP_CF | | ||
30 | MEM_SYS_CFG_EBI_FIX_PRI_CFCON, S3C_MEM_SYS_CFG); | ||
31 | |||
32 | s3c_gpio_cfgpin(S3C64XX_GPB(4), S3C_GPIO_SFN(4)); | ||
33 | |||
34 | /* Set XhiDATA[15:0] pins as CF Data[15:0] */ | ||
35 | for (gpio = S3C64XX_GPK(0); gpio <= S3C64XX_GPK(15); gpio++) | ||
36 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(5)); | ||
37 | |||
38 | /* Set XhiADDR[2:0] pins as CF ADDR[2:0] */ | ||
39 | for (gpio = S3C64XX_GPL(0); gpio <= S3C64XX_GPL(2); gpio++) | ||
40 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); | ||
41 | |||
42 | /* Set Xhi ctrl pins as CF ctrl pins(IORDY, IOWR, IORD, CE[0:1]) */ | ||
43 | s3c_gpio_cfgpin(S3C64XX_GPM(5), S3C_GPIO_SFN(1)); | ||
44 | for (gpio = S3C64XX_GPM(0); gpio <= S3C64XX_GPM(4); gpio++) | ||
45 | s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(6)); | ||
46 | } | ||