diff options
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx51.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx51.h b/arch/arm/plat-mxc/include/mach/iomux-mx51.h index 746dcad7020c..fdf705e74d77 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx51.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx51.h | |||
| @@ -40,6 +40,8 @@ typedef enum iomux_config { | |||
| 40 | PAD_CTL_SRE_FAST) | 40 | PAD_CTL_SRE_FAST) |
| 41 | #define MX51_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ | 41 | #define MX51_I2C_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ |
| 42 | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS) | 42 | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS) |
| 43 | #define MX51_ESDHC_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_ODE | \ | ||
| 44 | PAD_CTL_DSE_HIGH | PAD_CTL_PUS_100K_UP | PAD_CTL_HYS) | ||
| 43 | #define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ | 45 | #define MX51_USBH1_PAD_CTRL (PAD_CTL_SRE_FAST | PAD_CTL_DSE_HIGH | \ |
| 44 | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ | 46 | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \ |
| 45 | PAD_CTL_PKE | PAD_CTL_HYS) | 47 | PAD_CTL_PKE | PAD_CTL_HYS) |
| @@ -368,7 +370,9 @@ typedef enum iomux_config { | |||
| 368 | MX51_SDHCI_PAD_CTRL) | 370 | MX51_SDHCI_PAD_CTRL) |
| 369 | #define MX51_PAD_SD2_DATA3__SD2_DATA3 IOMUX_PAD(0x7D0, 0x3C8, IOMUX_CONFIG_SION, 0x0, 0, \ | 371 | #define MX51_PAD_SD2_DATA3__SD2_DATA3 IOMUX_PAD(0x7D0, 0x3C8, IOMUX_CONFIG_SION, 0x0, 0, \ |
| 370 | MX51_SDHCI_PAD_CTRL) | 372 | MX51_SDHCI_PAD_CTRL) |
| 373 | #define MX51_PAD_GPIO_1_0__ESDHC1_CD IOMUX_PAD(0x7B4, 0x3AC, 0, 0x0, 0, MX51_ESDHC_PAD_CTRL) | ||
| 371 | #define MX51_PAD_GPIO_1_0__GPIO_1_0 IOMUX_PAD(0x7B4, 0x3AC, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) | 374 | #define MX51_PAD_GPIO_1_0__GPIO_1_0 IOMUX_PAD(0x7B4, 0x3AC, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 375 | #define MX51_PAD_GPIO_1_1__ESDHC1_WP IOMUX_PAD(0x7B8, 0x3B0, 0, 0x0, 0, MX51_ESDHC_PAD_CTRL) | ||
| 372 | #define MX51_PAD_GPIO_1_1__GPIO_1_1 IOMUX_PAD(0x7B8, 0x3B0, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) | 376 | #define MX51_PAD_GPIO_1_1__GPIO_1_1 IOMUX_PAD(0x7B8, 0x3B0, 1, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 373 | #define MX51_PAD_GPIO_1_2__GPIO_1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) | 377 | #define MX51_PAD_GPIO_1_2__GPIO_1_2 IOMUX_PAD(0x7D4, 0x3CC, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 374 | #define MX51_PAD_GPIO_1_2__I2C2_SCL IOMUX_PAD(0x7D4, 0x3CC, (2 | IOMUX_CONFIG_SION), \ | 378 | #define MX51_PAD_GPIO_1_2__I2C2_SCL IOMUX_PAD(0x7D4, 0x3CC, (2 | IOMUX_CONFIG_SION), \ |
| @@ -381,7 +385,9 @@ typedef enum iomux_config { | |||
| 381 | #define MX51_PAD_GPIO_1_5__GPIO_1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) | 385 | #define MX51_PAD_GPIO_1_5__GPIO_1_5 IOMUX_PAD(0x808, 0x3DC, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 382 | #define MX51_PAD_GPIO_1_6__GPIO_1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) | 386 | #define MX51_PAD_GPIO_1_6__GPIO_1_6 IOMUX_PAD(0x80C, 0x3E0, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 383 | #define MX51_PAD_GPIO_1_7__GPIO_1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) | 387 | #define MX51_PAD_GPIO_1_7__GPIO_1_7 IOMUX_PAD(0x810, 0x3E4, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 388 | #define MX51_PAD_GPIO_1_7__ESDHC2_WP IOMUX_PAD(0x810, 0x3E4, 6, 0x0, 0, MX51_ESDHC_PAD_CTRL) | ||
| 384 | #define MX51_PAD_GPIO_1_8__GPIO_1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) | 389 | #define MX51_PAD_GPIO_1_8__GPIO_1_8 IOMUX_PAD(0x814, 0x3E8, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 390 | #define MX51_PAD_GPIO_1_8__ESDHC2_CD IOMUX_PAD(0x814, 0x3E8, 6, 0x0, 0, MX51_ESDHC_PAD_CTRL) | ||
| 385 | #define MX51_PAD_GPIO_1_9__GPIO_1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) | 391 | #define MX51_PAD_GPIO_1_9__GPIO_1_9 IOMUX_PAD(0x818, 0x3EC, 0, 0x0, 0, MX51_GPIO_PAD_CTRL) |
| 386 | 392 | ||
| 387 | #endif /* __MACH_IOMUX_MX51_H__ */ | 393 | #endif /* __MACH_IOMUX_MX51_H__ */ |