134 files changed, 4010 insertions, 2088 deletions

diff --git a/Documentation/DocBook/kgdb.tmpl b/Documentation/DocBook/kgdb.tmpl
index 028a8444d95e..e8acd1f03456 100644
--- a/Documentation/DocBook/kgdb.tmpl
+++ b/Documentation/DocBook/kgdb.tmpl
@@ -84,10 +84,9 @@
     runs an instance of gdb against the vmlinux file which contains
     the symbols (not boot image such as bzImage, zImage, uImage...).
     In gdb the developer specifies the connection parameters and
-    connects to kgdb.  Depending on which kgdb I/O modules exist in
-    the kernel for a given architecture, it may be possible to debug
-    the test machine's kernel with the development machine using a
-    rs232 or ethernet connection.
+    connects to kgdb.  The type of connection a developer makes with
+    gdb depends on the availability of kgdb I/O modules compiled as
+    builtin's or kernel modules in the test machine's kernel.
     </para>
   </chapter>
   <chapter id="CompilingAKernel">
@@ -223,7 +222,7 @@
   </para>
   <para>
   IMPORTANT NOTE: Using this option with kgdb over the console
-  (kgdboc) or kgdb over ethernet (kgdboe) is not supported.
+  (kgdboc) is not supported.
   </para>
   </sect1>
   </chapter>
@@ -249,18 +248,11 @@
     (gdb) target remote /dev/ttyS0
     </programlisting>
     <para>
-    Example (kgdb to a terminal server):
+    Example (kgdb to a terminal server on tcp port 2012):
     </para>
     <programlisting>
     % gdb ./vmlinux
-    (gdb) target remote udp:192.168.2.2:6443
-    </programlisting>
-    <para>
-    Example (kgdb over ethernet):
-    </para>
-    <programlisting>
-    % gdb ./vmlinux
-    (gdb) target remote udp:192.168.2.2:6443
+    (gdb) target remote 192.168.2.2:2012
     </programlisting>
     <para>
     Once connected, you can debug a kernel the way you would debug an
diff --git a/Documentation/cpusets.txt b/Documentation/cpusets.txt
index d803c5c68ab5..353504de3084 100644
--- a/Documentation/cpusets.txt
+++ b/Documentation/cpusets.txt
@@ -542,7 +542,7 @@ otherwise initial value -1 that indicates the cpuset has no request.
    2  : search cores in a package.
    3  : search cpus in a node [= system wide on non-NUMA system]
  ( 4  : search nodes in a chunk of node [on NUMA system] )
- ( 5~ : search system wide [on NUMA system])
+ ( 5  : search system wide [on NUMA system] )
 
 This file is per-cpuset and affect the sched domain where the cpuset
 belongs to.  Therefore if the flag 'sched_load_balance' of a cpuset
diff --git a/Documentation/hwmon/sysfs-interface b/Documentation/hwmon/sysfs-interface
index f4a8ebc1ef1a..2d845730d4e0 100644
--- a/Documentation/hwmon/sysfs-interface
+++ b/Documentation/hwmon/sysfs-interface
@@ -2,17 +2,12 @@ Naming and data format standards for sysfs files
 ------------------------------------------------
 
 The libsensors library offers an interface to the raw sensors data
-through the sysfs interface. See libsensors documentation and source for
-further information. As of writing this document, libsensors
-(from lm_sensors 2.8.3) is heavily chip-dependent. Adding or updating
-support for any given chip requires modifying the library's code.
-This is because libsensors was written for the procfs interface
-older kernel modules were using, which wasn't standardized enough.
-Recent versions of libsensors (from lm_sensors 2.8.2 and later) have
-support for the sysfs interface, though.
-
-The new sysfs interface was designed to be as chip-independent as
-possible.
+through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
+completely chip-independent. It assumes that all the kernel drivers
+implement the standard sysfs interface described in this document.
+This makes adding or updating support for any given chip very easy, as
+libsensors, and applications using it, do not need to be modified.
+This is a major improvement compared to lm-sensors 2.
 
 Note that motherboards vary widely in the connections to sensor chips.
 There is no standard that ensures, for example, that the second
@@ -35,19 +30,17 @@ access this data in a simple and consistent way. That said, such programs
 will have to implement conversion, labeling and hiding of inputs. For
 this reason, it is still not recommended to bypass the library.
 
-If you are developing a userspace application please send us feedback on
-this standard.
-
-Note that this standard isn't completely established yet, so it is subject
-to changes. If you are writing a new hardware monitoring driver those
-features can't seem to fit in this interface, please contact us with your
-extension proposal. Keep in mind that backward compatibility must be
-preserved.
-
 Each chip gets its own directory in the sysfs /sys/devices tree.  To
 find all sensor chips, it is easier to follow the device symlinks from
 /sys/class/hwmon/hwmon*.
 
+Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
+in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
+in the hwmon "class" device directory are also supported. Complex drivers
+(e.g. drivers for multifunction chips) may want to use this possibility to
+avoid namespace pollution. The only drawback will be that older versions of
+libsensors won't support the driver in question.
+
 All sysfs values are fixed point numbers.
 
 There is only one value per file, unlike the older /proc specification.
diff --git a/MAINTAINERS b/MAINTAINERS
index cd587eec9fa7..8f0ec46a7096 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -4431,10 +4431,10 @@ M:	johnpol@2ka.mipt.ru
 S:      Maintained
 
 W83791D HARDWARE MONITORING DRIVER
-P:      Charles Spirakis
-M:      bezaur@gmail.com
+P:      Marc Hulsman
+M:      m.hulsman@tudelft.nl
 L:      lm-sensors@lm-sensors.org
-S:      Odd Fixes
+S:      Maintained
 
 W83793 HARDWARE MONITORING DRIVER
 P:      Rudolf Marek
diff --git a/Makefile b/Makefile
index 6923d669a4f6..6aff5f47c21d 100644
--- a/Makefile
+++ b/Makefile
@@ -1,7 +1,7 @@
 VERSION = 2
 PATCHLEVEL = 6
 SUBLEVEL = 26
-EXTRAVERSION = -rc6
+EXTRAVERSION = -rc8
 NAME = Rotary Wombat
 
 # *DOCUMENTATION*
diff --git a/arch/alpha/Makefile b/arch/alpha/Makefile
index 4e1a8e2c4541..4759fe751aa1 100644
--- a/arch/alpha/Makefile
+++ b/arch/alpha/Makefile
@@ -13,6 +13,7 @@ NM := $(NM) -B
 LDFLAGS_vmlinux := -static -N #-relax
 CHECKFLAGS      += -D__alpha__ -m64
 cflags-y        := -pipe -mno-fp-regs -ffixed-8 -msmall-data
+cflags-y        += $(call cc-option, -fno-jump-tables)
 
 cpuflags-$(CONFIG_ALPHA_EV4)            := -mcpu=ev4
 cpuflags-$(CONFIG_ALPHA_EV5)            := -mcpu=ev5
diff --git a/arch/alpha/kernel/core_t2.c b/arch/alpha/kernel/core_t2.c
index c0750291b44a..d9980d47ab81 100644
--- a/arch/alpha/kernel/core_t2.c
+++ b/arch/alpha/kernel/core_t2.c
@@ -74,6 +74,8 @@
 # define DBG(args)
 #endif
 
+DEFINE_SPINLOCK(t2_hae_lock);
+
 static volatile unsigned int t2_mcheck_any_expected;
 static volatile unsigned int t2_mcheck_last_taken;
 
diff --git a/arch/alpha/kernel/pci.c b/arch/alpha/kernel/pci.c
index 36ab22a7ea12..5cf45fc51343 100644
--- a/arch/alpha/kernel/pci.c
+++ b/arch/alpha/kernel/pci.c
@@ -71,6 +71,23 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_i
 static void __init
 quirk_cypress(struct pci_dev *dev)
 {
+        /* The Notorious Cy82C693 chip.  */
+
+        /* The generic legacy mode IDE fixup in drivers/pci/probe.c
+           doesn't work correctly with the Cypress IDE controller as
+           it has non-standard register layout.  Fix that.  */
+        if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE) {
+                dev->resource[2].start = dev->resource[3].start = 0;
+                dev->resource[2].end = dev->resource[3].end = 0;
+                dev->resource[2].flags = dev->resource[3].flags = 0;
+                if (PCI_FUNC(dev->devfn) == 2) {
+                        dev->resource[0].start = 0x170;
+                        dev->resource[0].end = 0x177;
+                        dev->resource[1].start = 0x376;
+                        dev->resource[1].end = 0x376;
+                }
+        }
+
         /* The Cypress bridge responds on the PCI bus in the address range
            0xffff0000-0xffffffff (conventional x86 BIOS ROM).  There is no
            way to turn this off.  The bridge also supports several extended
diff --git a/arch/alpha/kernel/traps.c b/arch/alpha/kernel/traps.c
index dc57790250d2..c778779007fc 100644
--- a/arch/alpha/kernel/traps.c
+++ b/arch/alpha/kernel/traps.c
@@ -447,7 +447,7 @@ struct unaligned_stat {
 
 
 /* Macro for exception fixup code to access integer registers.  */
-#define una_reg(r)  (regs->regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
+#define una_reg(r)  (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)])
 
 
 asmlinkage void
@@ -456,6 +456,7 @@ do_entUna(void * va, unsigned long opcode, unsigned long reg,
 {
         long error, tmp1, tmp2, tmp3, tmp4;
         unsigned long pc = regs->pc - 4;
+        unsigned long *_regs = regs->regs;
         const struct exception_table_entry *fixup;
 
         unaligned[0].count++;
diff --git a/arch/ia64/kernel/iosapic.c b/arch/ia64/kernel/iosapic.c
index 082c31dcfd99..39752cdef6ff 100644
--- a/arch/ia64/kernel/iosapic.c
+++ b/arch/ia64/kernel/iosapic.c
@@ -558,8 +558,6 @@ static struct iosapic_rte_info * __init_refok iosapic_alloc_rte (void)
         if (!iosapic_kmalloc_ok && list_empty(&free_rte_list)) {
                 rte = alloc_bootmem(sizeof(struct iosapic_rte_info) *
                                     NR_PREALLOCATE_RTE_ENTRIES);
-                if (!rte)
-                        return NULL;
                 for (i = 0; i < NR_PREALLOCATE_RTE_ENTRIES; i++, rte++)
                         list_add(&rte->rte_list, &free_rte_list);
         }
diff --git a/arch/ia64/kernel/setup.c b/arch/ia64/kernel/setup.c
index f48a809c686d..4ae15c8c2488 100644
--- a/arch/ia64/kernel/setup.c
+++ b/arch/ia64/kernel/setup.c
@@ -578,8 +578,6 @@ setup_arch (char **cmdline_p)
         cpu_init();     /* initialize the bootstrap CPU */
         mmu_context_init();     /* initialize context_id bitmap */
 
-        check_sal_cache_flush();
-
 #ifdef CONFIG_ACPI
         acpi_boot_init();
 #endif
@@ -607,6 +605,7 @@ setup_arch (char **cmdline_p)
                 ia64_mca_init();
 
         platform_setup(cmdline_p);
+        check_sal_cache_flush();
         paging_init();
 }
 
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c
index 49d3120415eb..e585f9a2afb9 100644
--- a/arch/ia64/sn/kernel/sn2/sn2_smp.c
+++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c
@@ -512,6 +512,8 @@ static ssize_t sn2_ptc_proc_write(struct file *file, const char __user *user, si
         int cpu;
         char optstr[64];
 
+        if (count == 0 || count > sizeof(optstr))
+                return -EINVAL;
         if (copy_from_user(optstr, user, count))
                 return -EFAULT;
         optstr[count - 1] = '\0';
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index c21a626af676..ce245a850db2 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -142,7 +142,7 @@ static void dump_one_vdso_page(struct page *pg, struct page *upg)
         printk("kpg: %p (c:%d,f:%08lx)", __va(page_to_pfn(pg) << PAGE_SHIFT),
                page_count(pg),
                pg->flags);
-        if (upg/* && pg != upg*/) {
+        if (upg && !IS_ERR(upg) /* && pg != upg*/) {
                 printk(" upg: %p (c:%d,f:%08lx)", __va(page_to_pfn(upg)
                                                        << PAGE_SHIFT),
                        page_count(upg),
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 52e18e6d2ba0..e0edaaa6920a 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -383,6 +383,7 @@ config VMI
 config KVM_CLOCK
         bool "KVM paravirtualized clock"
         select PARAVIRT
+        select PARAVIRT_CLOCK
         depends on !(X86_VISWS || X86_VOYAGER)
         help
           Turning on this option will allow you to run a paravirtualized clock
@@ -410,6 +411,10 @@ config PARAVIRT
           over full virtualization.  However, when run without a hypervisor
           the kernel is theoretically slower and slightly larger.
 
+config PARAVIRT_CLOCK
+        bool
+        default n
+
 endif
 
 config MEMTEST_BOOTPARAM
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 5e618c3b4720..77807d4769c9 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -82,6 +82,7 @@ obj-$(CONFIG_VMI)		+= vmi_32.o vmiclock_32.o
 obj-$(CONFIG_KVM_GUEST)         += kvm.o
 obj-$(CONFIG_KVM_CLOCK)         += kvmclock.o
 obj-$(CONFIG_PARAVIRT)          += paravirt.o paravirt_patch_$(BITS).o
+obj-$(CONFIG_PARAVIRT_CLOCK)    += pvclock.o
 
 obj-$(CONFIG_PCSPKR_PLATFORM)   += pcspeaker.o
 
diff --git a/arch/x86/kernel/geode_32.c b/arch/x86/kernel/geode_32.c
index e8edd63ab000..9b08e852fd1a 100644
--- a/arch/x86/kernel/geode_32.c
+++ b/arch/x86/kernel/geode_32.c
@@ -166,6 +166,8 @@ int geode_has_vsa2(void)
         static int has_vsa2 = -1;
 
         if (has_vsa2 == -1) {
+                u16 val;
+
                 /*
                  * The VSA has virtual registers that we can query for a
                  * signature.
@@ -173,7 +175,8 @@ int geode_has_vsa2(void)
                 outw(VSA_VR_UNLOCK, VSA_VRC_INDEX);
                 outw(VSA_VR_SIGNATURE, VSA_VRC_INDEX);
 
-                has_vsa2 = (inw(VSA_VRC_DATA) == VSA_SIG);
+                val = inw(VSA_VRC_DATA);
+                has_vsa2 = (val == AMD_VSA_SIG || val == GSW_VSA_SIG);
         }
 
         return has_vsa2;
diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c
index 08a30986d472..87edf1ceb1df 100644
--- a/arch/x86/kernel/kvmclock.c
+++ b/arch/x86/kernel/kvmclock.c
@@ -18,6 +18,7 @@
 
 #include <linux/clocksource.h>
 #include <linux/kvm_para.h>
+#include <asm/pvclock.h>
 #include <asm/arch_hooks.h>
 #include <asm/msr.h>
 #include <asm/apic.h>
@@ -36,18 +37,9 @@ static int parse_no_kvmclock(char *arg)
 early_param("no-kvmclock", parse_no_kvmclock);
 
 /* The hypervisor will put information about time periodically here */
-static DEFINE_PER_CPU_SHARED_ALIGNED(struct kvm_vcpu_time_info, hv_clock);
-#define get_clock(cpu, field) per_cpu(hv_clock, cpu).field
+static DEFINE_PER_CPU_SHARED_ALIGNED(struct pvclock_vcpu_time_info, hv_clock);
+static struct pvclock_wall_clock wall_clock;
 
-static inline u64 kvm_get_delta(u64 last_tsc)
-{
-        int cpu = smp_processor_id();
-        u64 delta = native_read_tsc() - last_tsc;
-        return (delta * get_clock(cpu, tsc_to_system_mul)) >> KVM_SCALE;
-}
-
-static struct kvm_wall_clock wall_clock;
-static cycle_t kvm_clock_read(void);
 /*
  * The wallclock is the time of day when we booted. Since then, some time may
  * have elapsed since the hypervisor wrote the data. So we try to account for
@@ -55,64 +47,37 @@ static cycle_t kvm_clock_read(void);
  */
 static unsigned long kvm_get_wallclock(void)
 {
-        u32 wc_sec, wc_nsec;
-        u64 delta;
+        struct pvclock_vcpu_time_info *vcpu_time;
         struct timespec ts;
-        int version, nsec;
         int low, high;
 
         low = (int)__pa(&wall_clock);
         high = ((u64)__pa(&wall_clock) >> 32);
+        native_write_msr(MSR_KVM_WALL_CLOCK, low, high);
 
-        delta = kvm_clock_read();
+        vcpu_time = &get_cpu_var(hv_clock);
+        pvclock_read_wallclock(&wall_clock, vcpu_time, &ts);
+        put_cpu_var(hv_clock);
 
-        native_write_msr(MSR_KVM_WALL_CLOCK, low, high);
-        do {
-                version = wall_clock.wc_version;
-                rmb();
-                wc_sec = wall_clock.wc_sec;
-                wc_nsec = wall_clock.wc_nsec;
-                rmb();
-        } while ((wall_clock.wc_version != version) || (version & 1));
-
-        delta = kvm_clock_read() - delta;
-        delta += wc_nsec;
-        nsec = do_div(delta, NSEC_PER_SEC);
-        set_normalized_timespec(&ts, wc_sec + delta, nsec);
-        /*
-         * Of all mechanisms of time adjustment I've tested, this one
-         * was the champion!
-         */
-        return ts.tv_sec + 1;
+        return ts.tv_sec;
 }
 
 static int kvm_set_wallclock(unsigned long now)
 {
-        return 0;
+        return -1;
 }
 
-/*
- * This is our read_clock function. The host puts an tsc timestamp each time
- * it updates a new time. Without the tsc adjustment, we can have a situation
- * in which a vcpu starts to run earlier (smaller system_time), but probes
- * time later (compared to another vcpu), leading to backwards time
- */
 static cycle_t kvm_clock_read(void)
 {
-        u64 last_tsc, now;
-        int cpu;
+        struct pvclock_vcpu_time_info *src;
+        cycle_t ret;
 
-        preempt_disable();
-        cpu = smp_processor_id();
-
-        last_tsc = get_clock(cpu, tsc_timestamp);
-        now = get_clock(cpu, system_time);
-
-        now += kvm_get_delta(last_tsc);
-        preempt_enable();
-
-        return now;
+        src = &get_cpu_var(hv_clock);
+        ret = pvclock_clocksource_read(src);
+        put_cpu_var(hv_clock);
+        return ret;
 }
+
 static struct clocksource kvm_clock = {
         .name = "kvm-clock",
         .read = kvm_clock_read,
@@ -123,13 +88,14 @@ static struct clocksource kvm_clock = {
         .flags = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static int kvm_register_clock(void)
+static int kvm_register_clock(char *txt)
 {
         int cpu = smp_processor_id();
         int low, high;
         low = (int)__pa(&per_cpu(hv_clock, cpu)) | 1;
         high = ((u64)__pa(&per_cpu(hv_clock, cpu)) >> 32);
-
+        printk(KERN_INFO "kvm-clock: cpu %d, msr %x:%x, %s\n",
+               cpu, high, low, txt);
         return native_write_msr_safe(MSR_KVM_SYSTEM_TIME, low, high);
 }
 
@@ -140,12 +106,20 @@ static void kvm_setup_secondary_clock(void)
          * Now that the first cpu already had this clocksource initialized,
          * we shouldn't fail.
          */
-        WARN_ON(kvm_register_clock());
+        WARN_ON(kvm_register_clock("secondary cpu clock"));
         /* ok, done with our trickery, call native */
         setup_secondary_APIC_clock();
 }
 #endif
 
+#ifdef CONFIG_SMP
+void __init kvm_smp_prepare_boot_cpu(void)
+{
+        WARN_ON(kvm_register_clock("primary cpu clock"));
+        native_smp_prepare_boot_cpu();
+}
+#endif
+
 /*
  * After the clock is registered, the host will keep writing to the
  * registered memory location. If the guest happens to shutdown, this memory
@@ -174,7 +148,7 @@ void __init kvmclock_init(void)
                 return;
 
         if (kvmclock && kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE)) {
-                if (kvm_register_clock())
+                if (kvm_register_clock("boot clock"))
                         return;
                 pv_time_ops.get_wallclock = kvm_get_wallclock;
                 pv_time_ops.set_wallclock = kvm_set_wallclock;
@@ -182,6 +156,9 @@ void __init kvmclock_init(void)
 #ifdef CONFIG_X86_LOCAL_APIC
                 pv_apic_ops.setup_secondary_clock = kvm_setup_secondary_clock;
 #endif
+#ifdef CONFIG_SMP
+                smp_ops.smp_prepare_boot_cpu = kvm_smp_prepare_boot_cpu;
+#endif
                 machine_ops.shutdown  = kvm_shutdown;
 #ifdef CONFIG_KEXEC
                 machine_ops.crash_shutdown  = kvm_crash_shutdown;
diff --git a/arch/x86/kernel/process_32.c b/arch/x86/kernel/process_32.c
index 6d5483356e74..e2db9ac5c61c 100644
--- a/arch/x86/kernel/process_32.c
+++ b/arch/x86/kernel/process_32.c
@@ -333,6 +333,7 @@ void flush_thread(void)
         /*
          * Forget coprocessor state..
          */
+        tsk->fpu_counter = 0;
         clear_fpu(tsk);
         clear_used_math();
 }
diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c
index ac54ff56df80..c6eb5c91e5f6 100644
--- a/arch/x86/kernel/process_64.c
+++ b/arch/x86/kernel/process_64.c
@@ -294,6 +294,7 @@ void flush_thread(void)
         /*
          * Forget coprocessor state..
          */
+        tsk->fpu_counter = 0;
         clear_fpu(tsk);
         clear_used_math();
 }
diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c
new file mode 100644
index 000000000000..05fbe9a0325a
--- /dev/null
+++ b/arch/x86/kernel/pvclock.c
@@ -0,0 +1,141 @@
+/*  paravirtual clock -- common code used by kvm/xen
+
+    This program is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 2 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; if not, write to the Free Software
+    Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+*/
+
+#include <linux/kernel.h>
+#include <linux/percpu.h>
+#include <asm/pvclock.h>
+
+/*
+ * These are perodically updated
+ *    xen: magic shared_info page
+ *    kvm: gpa registered via msr
+ * and then copied here.
+ */
+struct pvclock_shadow_time {
+        u64 tsc_timestamp;     /* TSC at last update of time vals.  */
+        u64 system_timestamp;  /* Time, in nanosecs, since boot.    */
+        u32 tsc_to_nsec_mul;
+        int tsc_shift;
+        u32 version;
+};
+
+/*
+ * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction,
+ * yielding a 64-bit result.
+ */
+static inline u64 scale_delta(u64 delta, u32 mul_frac, int shift)
+{
+        u64 product;
+#ifdef __i386__
+        u32 tmp1, tmp2;
+#endif
+
+        if (shift < 0)
+                delta >>= -shift;
+        else
+                delta <<= shift;
+
+#ifdef __i386__
+        __asm__ (
+                "mul  %5       ; "
+                "mov  %4,%%eax ; "
+                "mov  %%edx,%4 ; "
+                "mul  %5       ; "
+                "xor  %5,%5    ; "
+                "add  %4,%%eax ; "
+                "adc  %5,%%edx ; "
+                : "=A" (product), "=r" (tmp1), "=r" (tmp2)
+                : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) );
+#elif __x86_64__
+        __asm__ (
+                "mul %%rdx ; shrd $32,%%rdx,%%rax"
+                : "=a" (product) : "0" (delta), "d" ((u64)mul_frac) );
+#else
+#error implement me!
+#endif
+
+        return product;
+}
+
+static u64 pvclock_get_nsec_offset(struct pvclock_shadow_time *shadow)
+{
+        u64 delta = native_read_tsc() - shadow->tsc_timestamp;
+        return scale_delta(delta, shadow->tsc_to_nsec_mul, shadow->tsc_shift);
+}
+
+/*
+ * Reads a consistent set of time-base values from hypervisor,
+ * into a shadow data area.
+ */
+static unsigned pvclock_get_time_values(struct pvclock_shadow_time *dst,
+                                        struct pvclock_vcpu_time_info *src)
+{
+        do {
+                dst->version = src->version;
+                rmb();          /* fetch version before data */
+                dst->tsc_timestamp     = src->tsc_timestamp;
+                dst->system_timestamp  = src->system_time;
+                dst->tsc_to_nsec_mul   = src->tsc_to_system_mul;
+                dst->tsc_shift         = src->tsc_shift;
+                rmb();          /* test version after fetching data */
+        } while ((src->version & 1) || (dst->version != src->version));
+
+        return dst->version;
+}
+
+cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src)
+{
+        struct pvclock_shadow_time shadow;
+        unsigned version;
+        cycle_t ret, offset;
+
+        do {
+                version = pvclock_get_time_values(&shadow, src);
+                barrier();
+                offset = pvclock_get_nsec_offset(&shadow);
+                ret = shadow.system_timestamp + offset;
+                barrier();
+        } while (version != src->version);
+
+        return ret;
+}
+
+void pvclock_read_wallclock(struct pvclock_wall_clock *wall_clock,
+                            struct pvclock_vcpu_time_info *vcpu_time,
+                            struct timespec *ts)
+{
+        u32 version;
+        u64 delta;
+        struct timespec now;
+
+        /* get wallclock at system boot */
+        do {
+                version = wall_clock->version;
+                rmb();          /* fetch version before time */
+                now.tv_sec  = wall_clock->sec;
+                now.tv_nsec = wall_clock->nsec;
+                rmb();          /* fetch time before checking version */
+        } while ((wall_clock->version & 1) || (version != wall_clock->version));
+
+        delta = pvclock_clocksource_read(vcpu_time);    /* time since system boot */
+        delta += now.tv_sec * (u64)NSEC_PER_SEC + now.tv_nsec;
+
+        now.tv_nsec = do_div(delta, NSEC_PER_SEC);
+        now.tv_sec = delta;
+
+        set_normalized_timespec(ts, now.tv_sec, now.tv_nsec);
+}
diff --git a/arch/x86/kernel/setup_32.c b/arch/x86/kernel/setup_32.c
index 2c5f8b213e86..5a2f8e063887 100644
--- a/arch/x86/kernel/setup_32.c
+++ b/arch/x86/kernel/setup_32.c
@@ -532,10 +532,16 @@ static void __init reserve_crashkernel(void)
                                         (unsigned long)(crash_size >> 20),
                                         (unsigned long)(crash_base >> 20),
                                         (unsigned long)(total_mem >> 20));
+
+                        if (reserve_bootmem(crash_base, crash_size,
+                                        BOOTMEM_EXCLUSIVE) < 0) {
+                                printk(KERN_INFO "crashkernel reservation "
+                                        "failed - memory is in use\n");
+                                return;
+                        }
+
                         crashk_res.start = crash_base;
                         crashk_res.end   = crash_base + crash_size - 1;
-                        reserve_bootmem(crash_base, crash_size,
-                                        BOOTMEM_DEFAULT);
                 } else
                         printk(KERN_INFO "crashkernel reservation failed - "
                                         "you have to specify a base address\n");
diff --git a/arch/x86/kernel/tsc_32.c b/arch/x86/kernel/tsc_32.c
index 068759db63dd..65b70637ad97 100644
--- a/arch/x86/kernel/tsc_32.c
+++ b/arch/x86/kernel/tsc_32.c
@@ -14,7 +14,10 @@
 
 #include "mach_timer.h"
 
-static int tsc_disabled;
+/* native_sched_clock() is called before tsc_init(), so
+   we must start with the TSC soft disabled to prevent
+   erroneous rdtsc usage on !cpu_has_tsc processors */
+static int tsc_disabled = -1;
 
 /*
  * On some systems the TSC frequency does not
@@ -402,25 +405,20 @@ void __init tsc_init(void)
 {
         int cpu;
 
-        if (!cpu_has_tsc || tsc_disabled) {
-                /* Disable the TSC in case of !cpu_has_tsc */
-                tsc_disabled = 1;
+        if (!cpu_has_tsc || tsc_disabled > 0)
                 return;
-        }
 
         cpu_khz = calculate_cpu_khz();
         tsc_khz = cpu_khz;
 
         if (!cpu_khz) {
                 mark_tsc_unstable("could not calculate TSC khz");
-                /*
-                 * We need to disable the TSC completely in this case
-                 * to prevent sched_clock() from using it.
-                 */
-                tsc_disabled = 1;
                 return;
         }
 
+        /* now allow native_sched_clock() to use rdtsc */
+        tsc_disabled = 0;
+
         printk("Detected %lu.%03lu MHz processor.\n",
                                 (unsigned long)cpu_khz / 1000,
                                 (unsigned long)cpu_khz % 1000);
diff --git a/arch/x86/kvm/i8254.c b/arch/x86/kvm/i8254.c
index f2f5d260874e..3829aa7b663f 100644
--- a/arch/x86/kvm/i8254.c
+++ b/arch/x86/kvm/i8254.c
@@ -200,9 +200,12 @@ int __pit_timer_fn(struct kvm_kpit_state *ps)
 
         atomic_inc(&pt->pending);
         smp_mb__after_atomic_inc();
-        if (vcpu0 && waitqueue_active(&vcpu0->wq)) {
-                vcpu0->arch.mp_state = KVM_MP_STATE_RUNNABLE;
-                wake_up_interruptible(&vcpu0->wq);
+        if (vcpu0) {
+                set_bit(KVM_REQ_PENDING_TIMER, &vcpu0->requests);
+                if (waitqueue_active(&vcpu0->wq)) {
+                        vcpu0->arch.mp_state = KVM_MP_STATE_RUNNABLE;
+                        wake_up_interruptible(&vcpu0->wq);
+                }
         }
 
         pt->timer.expires = ktime_add_ns(pt->timer.expires, pt->period);
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index c297c50eba63..ebc03f5ae162 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -940,6 +940,7 @@ static int __apic_timer_fn(struct kvm_lapic *apic)
         wait_queue_head_t *q = &apic->vcpu->wq;
 
         atomic_inc(&apic->timer.pending);
+        set_bit(KVM_REQ_PENDING_TIMER, &apic->vcpu->requests);
         if (waitqueue_active(q)) {
                 apic->vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
                 wake_up_interruptible(q);
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index ee3f53098f0c..7e7c3969f7a2 100644
--- a/arch/x86/kvm/mmu.c
+++ b/arch/x86/kvm/mmu.c
@@ -640,6 +640,7 @@ static void rmap_write_protect(struct kvm *kvm, u64 gfn)
                         rmap_remove(kvm, spte);
                         --kvm->stat.lpages;
                         set_shadow_pte(spte, shadow_trap_nonpresent_pte);
+                        spte = NULL;
                         write_protected = 1;
                 }
                 spte = rmap_next(kvm, rmapp, spte);
@@ -1082,10 +1083,6 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                 struct kvm_mmu_page *shadow;
 
                 spte |= PT_WRITABLE_MASK;
-                if (user_fault) {
-                        mmu_unshadow(vcpu->kvm, gfn);
-                        goto unshadowed;
-                }
 
                 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
                 if (shadow ||
@@ -1102,8 +1099,6 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
                 }
         }
 
-unshadowed:
-
         if (pte_access & ACC_WRITE_MASK)
                 mark_page_dirty(vcpu->kvm, gfn);
 
@@ -1580,11 +1575,13 @@ static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
                                   u64 *spte,
                                   const void *new)
 {
-        if ((sp->role.level != PT_PAGE_TABLE_LEVEL)
-            && !vcpu->arch.update_pte.largepage) {
-                ++vcpu->kvm->stat.mmu_pde_zapped;
-                return;
-        }
+        if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
+                if (!vcpu->arch.update_pte.largepage ||
+                    sp->role.glevels == PT32_ROOT_LEVEL) {
+                        ++vcpu->kvm->stat.mmu_pde_zapped;
+                        return;
+                }
+        }
 
         ++vcpu->kvm->stat.mmu_pte_updated;
         if (sp->role.glevels == PT32_ROOT_LEVEL)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 02efbe75f317..540e95179074 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -566,7 +566,7 @@ static void vmx_save_host_state(struct kvm_vcpu *vcpu)
         load_transition_efer(vmx);
 }
 
-static void vmx_load_host_state(struct vcpu_vmx *vmx)
+static void __vmx_load_host_state(struct vcpu_vmx *vmx)
 {
         unsigned long flags;
 
@@ -596,6 +596,13 @@ static void vmx_load_host_state(struct vcpu_vmx *vmx)
         reload_host_efer(vmx);
 }
 
+static void vmx_load_host_state(struct vcpu_vmx *vmx)
+{
+        preempt_disable();
+        __vmx_load_host_state(vmx);
+        preempt_enable();
+}
+
 /*
  * Switches to specified vcpu, until a matching vcpu_put(), but assumes
  * vcpu mutex is already taken.
@@ -654,7 +661,7 @@ static void vmx_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 
 static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
 {
-        vmx_load_host_state(to_vmx(vcpu));
+        __vmx_load_host_state(to_vmx(vcpu));
 }
 
 static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
@@ -884,11 +891,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
         switch (msr_index) {
 #ifdef CONFIG_X86_64
         case MSR_EFER:
+                vmx_load_host_state(vmx);
                 ret = kvm_set_msr_common(vcpu, msr_index, data);
-                if (vmx->host_state.loaded) {
-                        reload_host_efer(vmx);
-                        load_transition_efer(vmx);
-                }
                 break;
         case MSR_FS_BASE:
                 vmcs_writel(GUEST_FS_BASE, data);
@@ -910,11 +914,10 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
                 guest_write_tsc(data);
                 break;
         default:
+                vmx_load_host_state(vmx);
                 msr = find_msr_entry(vmx, msr_index);
                 if (msr) {
                         msr->data = data;
-                        if (vmx->host_state.loaded)
-                                load_msrs(vmx->guest_msrs, vmx->save_nmsrs);
                         break;
                 }
                 ret = kvm_set_msr_common(vcpu, msr_index, data);
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 00acf1301a15..63a77caa59f1 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -492,8 +492,8 @@ static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 {
         static int version;
-        struct kvm_wall_clock wc;
-        struct timespec wc_ts;
+        struct pvclock_wall_clock wc;
+        struct timespec now, sys, boot;
 
         if (!wall_clock)
                 return;
@@ -502,10 +502,19 @@ static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 
         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 
-        wc_ts = current_kernel_time();
-        wc.wc_sec = wc_ts.tv_sec;
-        wc.wc_nsec = wc_ts.tv_nsec;
-        wc.wc_version = version;
+        /*
+         * The guest calculates current wall clock time by adding
+         * system time (updated by kvm_write_guest_time below) to the
+         * wall clock specified here.  guest system time equals host
+         * system time for us, thus we must fill in host boot time here.
+         */
+        now = current_kernel_time();
+        ktime_get_ts(&sys);
+        boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
+
+        wc.sec = boot.tv_sec;
+        wc.nsec = boot.tv_nsec;
+        wc.version = version;
 
         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 
@@ -513,6 +522,45 @@ static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 }
 
+static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
+{
+        uint32_t quotient, remainder;
+
+        /* Don't try to replace with do_div(), this one calculates
+         * "(dividend << 32) / divisor" */
+        __asm__ ( "divl %4"
+                  : "=a" (quotient), "=d" (remainder)
+                  : "0" (0), "1" (dividend), "r" (divisor) );
+        return quotient;
+}
+
+static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
+{
+        uint64_t nsecs = 1000000000LL;
+        int32_t  shift = 0;
+        uint64_t tps64;
+        uint32_t tps32;
+
+        tps64 = tsc_khz * 1000LL;
+        while (tps64 > nsecs*2) {
+                tps64 >>= 1;
+                shift--;
+        }
+
+        tps32 = (uint32_t)tps64;
+        while (tps32 <= (uint32_t)nsecs) {
+                tps32 <<= 1;
+                shift++;
+        }
+
+        hv_clock->tsc_shift = shift;
+        hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
+
+        pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
+                 __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
+                 hv_clock->tsc_to_system_mul);
+}
+
 static void kvm_write_guest_time(struct kvm_vcpu *v)
 {
         struct timespec ts;
@@ -523,6 +571,11 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         if ((!vcpu->time_page))
                 return;
 
+        if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
+                kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
+                vcpu->hv_clock_tsc_khz = tsc_khz;
+        }
+
         /* Keep irq disabled to prevent changes to the clock */
         local_irq_save(flags);
         kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
@@ -537,14 +590,14 @@ static void kvm_write_guest_time(struct kvm_vcpu *v)
         /*
          * The interface expects us to write an even number signaling that the
          * update is finished. Since the guest won't see the intermediate
-         * state, we just write "2" at the end
+         * state, we just increase by 2 at the end.
          */
-        vcpu->hv_clock.version = 2;
+        vcpu->hv_clock.version += 2;
 
         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
 
         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
-                sizeof(vcpu->hv_clock));
+               sizeof(vcpu->hv_clock));
 
         kunmap_atomic(shared_kaddr, KM_USER0);
 
@@ -599,10 +652,6 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
                 /* ...but clean it before doing the actual write */
                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
 
-                vcpu->arch.hv_clock.tsc_to_system_mul =
-                                        clocksource_khz2mult(tsc_khz, 22);
-                vcpu->arch.hv_clock.tsc_shift = 22;
-
                 down_read(&current->mm->mmap_sem);
                 vcpu->arch.time_page =
                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
@@ -2759,6 +2808,8 @@ again:
         if (vcpu->requests) {
                 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
                         __kvm_migrate_timers(vcpu);
+                if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
+                        kvm_x86_ops->tlb_flush(vcpu);
                 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
                                        &vcpu->requests)) {
                         kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
@@ -2772,6 +2823,7 @@ again:
                 }
         }
 
+        clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
         kvm_inject_pending_timer_irqs(vcpu);
 
         preempt_disable();
@@ -2781,21 +2833,13 @@ again:
 
         local_irq_disable();
 
-        if (need_resched()) {
+        if (vcpu->requests || need_resched()) {
                 local_irq_enable();
                 preempt_enable();
                 r = 1;
                 goto out;
         }
 
-        if (vcpu->requests)
-                if (test_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests)) {
-                        local_irq_enable();
-                        preempt_enable();
-                        r = 1;
-                        goto out;
-                }
-
         if (signal_pending(current)) {
                 local_irq_enable();
                 preempt_enable();
@@ -2825,9 +2869,6 @@ again:
 
         kvm_guest_enter();
 
-        if (vcpu->requests)
-                if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
-                        kvm_x86_ops->tlb_flush(vcpu);
 
         KVMTRACE_0D(VMENTRY, vcpu, entryexit);
         kvm_x86_ops->run(vcpu, kvm_run);
diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig
index 2e641be2737e..6c388e593bc8 100644
--- a/arch/x86/xen/Kconfig
+++ b/arch/x86/xen/Kconfig
@@ -5,8 +5,9 @@
 config XEN
         bool "Xen guest support"
         select PARAVIRT
+        select PARAVIRT_CLOCK
         depends on X86_32
-        depends on X86_CMPXCHG && X86_TSC && !(X86_VISWS || X86_VOYAGER)
+        depends on X86_CMPXCHG && X86_TSC && X86_PAE && !(X86_VISWS || X86_VOYAGER)
         help
           This is the Linux Xen port.  Enabling this will allow the
           kernel to boot in a paravirtualized environment under the
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index 0ad8a64a2e05..2d19382e6555 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -785,38 +785,35 @@ static __init void xen_set_pte_init(pte_t *ptep, pte_t pte)
 static __init void xen_pagetable_setup_start(pgd_t *base)
 {
         pgd_t *xen_pgd = (pgd_t *)xen_start_info->pt_base;
+        int i;
 
         /* special set_pte for pagetable initialization */
         pv_mmu_ops.set_pte = xen_set_pte_init;
 
         init_mm.pgd = base;
         /*
-         * copy top-level of Xen-supplied pagetable into place.  For
-         * !PAE we can use this as-is, but for PAE it is a stand-in
-         * while we copy the pmd pages.
+         * copy top-level of Xen-supplied pagetable into place.  This
+         * is a stand-in while we copy the pmd pages.
          */
         memcpy(base, xen_pgd, PTRS_PER_PGD * sizeof(pgd_t));
 
-        if (PTRS_PER_PMD > 1) {
-                int i;
-                /*
-                 * For PAE, need to allocate new pmds, rather than
-                 * share Xen's, since Xen doesn't like pmd's being
-                 * shared between address spaces.
-                 */
-                for (i = 0; i < PTRS_PER_PGD; i++) {
-                        if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
-                                pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
+        /*
+         * For PAE, need to allocate new pmds, rather than
+         * share Xen's, since Xen doesn't like pmd's being
+         * shared between address spaces.
+         */
+        for (i = 0; i < PTRS_PER_PGD; i++) {
+                if (pgd_val_ma(xen_pgd[i]) & _PAGE_PRESENT) {
+                        pmd_t *pmd = (pmd_t *)alloc_bootmem_low_pages(PAGE_SIZE);
 
-                                memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
-                                       PAGE_SIZE);
+                        memcpy(pmd, (void *)pgd_page_vaddr(xen_pgd[i]),
+                               PAGE_SIZE);
 
-                                make_lowmem_page_readonly(pmd);
+                        make_lowmem_page_readonly(pmd);
 
-                                set_pgd(&base[i], __pgd(1 + __pa(pmd)));
-                        } else
-                                pgd_clear(&base[i]);
-                }
+                        set_pgd(&base[i], __pgd(1 + __pa(pmd)));
+                } else
+                        pgd_clear(&base[i]);
         }
 
         /* make sure zero_page is mapped RO so we can use it in pagetables */
@@ -873,17 +870,7 @@ static __init void xen_pagetable_setup_done(pgd_t *base)
 
         /* Actually pin the pagetable down, but we can't set PG_pinned
            yet because the page structures don't exist yet. */
-        {
-                unsigned level;
-
-#ifdef CONFIG_X86_PAE
-                level = MMUEXT_PIN_L3_TABLE;
-#else
-                level = MMUEXT_PIN_L2_TABLE;
-#endif
-
-                pin_pagetable_pfn(level, PFN_DOWN(__pa(base)));
-        }
+        pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(base)));
 }
 
 /* This is called once we have the cpu_possible_map */
@@ -1120,7 +1107,6 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
         .make_pte = xen_make_pte,
         .make_pgd = xen_make_pgd,
 
-#ifdef CONFIG_X86_PAE
         .set_pte_atomic = xen_set_pte_atomic,
         .set_pte_present = xen_set_pte_at,
         .set_pud = xen_set_pud,
@@ -1129,7 +1115,6 @@ static const struct pv_mmu_ops xen_mmu_ops __initdata = {
 
         .make_pmd = xen_make_pmd,
         .pmd_val = xen_pmd_val,
-#endif  /* PAE */
 
         .activate_mm = xen_activate_mm,
         .dup_mmap = xen_dup_mmap,
@@ -1257,6 +1242,11 @@ asmlinkage void __init xen_start_kernel(void)
         if (xen_feature(XENFEAT_supervisor_mode_kernel))
                 pv_info.kernel_rpl = 0;
 
+        /* Prevent unwanted bits from being set in PTEs. */
+        __supported_pte_mask &= ~_PAGE_GLOBAL;
+        if (!is_initial_xendomain())
+                __supported_pte_mask &= ~(_PAGE_PWT | _PAGE_PCD);
+
         /* set the limit of our address space */
         xen_reserve_top();
 
diff --git a/arch/x86/xen/mmu.c b/arch/x86/xen/mmu.c
index 3525ef523a74..df40bf74ea75 100644
--- a/arch/x86/xen/mmu.c
+++ b/arch/x86/xen/mmu.c
@@ -179,50 +179,56 @@ out:
                 preempt_enable();
 }
 
-pteval_t xen_pte_val(pte_t pte)
+/* Assume pteval_t is equivalent to all the other *val_t types. */
+static pteval_t pte_mfn_to_pfn(pteval_t val)
+{
+        if (val & _PAGE_PRESENT) {
+                unsigned long mfn = (val & PTE_MASK) >> PAGE_SHIFT;
+                pteval_t flags = val & ~PTE_MASK;
+                val = (mfn_to_pfn(mfn) << PAGE_SHIFT) | flags;
+        }
+
+        return val;
+}
+
+static pteval_t pte_pfn_to_mfn(pteval_t val)
 {
-        pteval_t ret = pte.pte;
+        if (val & _PAGE_PRESENT) {
+                unsigned long pfn = (val & PTE_MASK) >> PAGE_SHIFT;
+                pteval_t flags = val & ~PTE_MASK;
+                val = (pfn_to_mfn(pfn) << PAGE_SHIFT) | flags;
+        }
 
-        if (ret & _PAGE_PRESENT)
-                ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
+        return val;
+}
 
-        return ret;
+pteval_t xen_pte_val(pte_t pte)
+{
+        return pte_mfn_to_pfn(pte.pte);
 }
 
 pgdval_t xen_pgd_val(pgd_t pgd)
 {
-        pgdval_t ret = pgd.pgd;
-        if (ret & _PAGE_PRESENT)
-                ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
-        return ret;
+        return pte_mfn_to_pfn(pgd.pgd);
 }
 
 pte_t xen_make_pte(pteval_t pte)
 {
-        if (pte & _PAGE_PRESENT) {
-                pte = phys_to_machine(XPADDR(pte)).maddr;
-                pte &= ~(_PAGE_PCD | _PAGE_PWT);
-        }
-
-        return (pte_t){ .pte = pte };
+        pte = pte_pfn_to_mfn(pte);
+        return native_make_pte(pte);
 }
 
 pgd_t xen_make_pgd(pgdval_t pgd)
 {
-        if (pgd & _PAGE_PRESENT)
-                pgd = phys_to_machine(XPADDR(pgd)).maddr;
-
-        return (pgd_t){ pgd };
+        pgd = pte_pfn_to_mfn(pgd);
+        return native_make_pgd(pgd);
 }
 
 pmdval_t xen_pmd_val(pmd_t pmd)
 {
-        pmdval_t ret = native_pmd_val(pmd);
-        if (ret & _PAGE_PRESENT)
-                ret = machine_to_phys(XMADDR(ret)).paddr | _PAGE_PRESENT;
-        return ret;
+        return pte_mfn_to_pfn(pmd.pmd);
 }
-#ifdef CONFIG_X86_PAE
+
 void xen_set_pud(pud_t *ptr, pud_t val)
 {
         struct multicall_space mcs;
@@ -267,17 +273,9 @@ void xen_pmd_clear(pmd_t *pmdp)
 
 pmd_t xen_make_pmd(pmdval_t pmd)
 {
-        if (pmd & _PAGE_PRESENT)
-                pmd = phys_to_machine(XPADDR(pmd)).maddr;
-
+        pmd = pte_pfn_to_mfn(pmd);
         return native_make_pmd(pmd);
 }
-#else  /* !PAE */
-void xen_set_pte(pte_t *ptep, pte_t pte)
-{
-        *ptep = pte;
-}
-#endif  /* CONFIG_X86_PAE */
 
 /*
   (Yet another) pagetable walker.  This one is intended for pinning a
@@ -430,8 +428,6 @@ static int pin_page(struct page *page, enum pt_level level)
    read-only, and can be pinned. */
 void xen_pgd_pin(pgd_t *pgd)
 {
-        unsigned level;
-
         xen_mc_batch();
 
         if (pgd_walk(pgd, pin_page, TASK_SIZE)) {
@@ -441,14 +437,7 @@ void xen_pgd_pin(pgd_t *pgd)
                 xen_mc_batch();
         }
 
-#ifdef CONFIG_X86_PAE
-        level = MMUEXT_PIN_L3_TABLE;
-#else
-        level = MMUEXT_PIN_L2_TABLE;
-#endif
-
-        xen_do_pin(level, PFN_DOWN(__pa(pgd)));
-
+        xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
         xen_mc_issue(0);
 }
 
diff --git a/arch/x86/xen/mmu.h b/arch/x86/xen/mmu.h
index b5e189b1519d..5fe961caffd4 100644
--- a/arch/x86/xen/mmu.h
+++ b/arch/x86/xen/mmu.h
@@ -37,14 +37,13 @@ void xen_exit_mmap(struct mm_struct *mm);
 void xen_pgd_pin(pgd_t *pgd);
 //void xen_pgd_unpin(pgd_t *pgd);
 
-#ifdef CONFIG_X86_PAE
-unsigned long long xen_pte_val(pte_t);
-unsigned long long xen_pmd_val(pmd_t);
-unsigned long long xen_pgd_val(pgd_t);
+pteval_t xen_pte_val(pte_t);
+pmdval_t xen_pmd_val(pmd_t);
+pgdval_t xen_pgd_val(pgd_t);
 
-pte_t xen_make_pte(unsigned long long);
-pmd_t xen_make_pmd(unsigned long long);
-pgd_t xen_make_pgd(unsigned long long);
+pte_t xen_make_pte(pteval_t);
+pmd_t xen_make_pmd(pmdval_t);
+pgd_t xen_make_pgd(pgdval_t);
 
 void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
                     pte_t *ptep, pte_t pteval);
@@ -53,15 +52,4 @@ void xen_set_pud(pud_t *ptr, pud_t val);
 void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
 void xen_pmd_clear(pmd_t *pmdp);
 
-
-#else
-unsigned long xen_pte_val(pte_t);
-unsigned long xen_pmd_val(pmd_t);
-unsigned long xen_pgd_val(pgd_t);
-
-pte_t xen_make_pte(unsigned long);
-pmd_t xen_make_pmd(unsigned long);
-pgd_t xen_make_pgd(unsigned long);
-#endif
-
 #endif  /* _XEN_MMU_H */
diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c
index 52b2e3856980..41e217503c96 100644
--- a/arch/x86/xen/time.c
+++ b/arch/x86/xen/time.c
@@ -14,6 +14,7 @@
 #include <linux/kernel_stat.h>
 #include <linux/math64.h>
 
+#include <asm/pvclock.h>
 #include <asm/xen/hypervisor.h>
 #include <asm/xen/hypercall.h>
 
@@ -31,17 +32,6 @@
 
 static cycle_t xen_clocksource_read(void);
 
-/* These are perodically updated in shared_info, and then copied here. */
-struct shadow_time_info {
-        u64 tsc_timestamp;     /* TSC at last update of time vals.  */
-        u64 system_timestamp;  /* Time, in nanosecs, since boot.    */
-        u32 tsc_to_nsec_mul;
-        int tsc_shift;
-        u32 version;
-};
-
-static DEFINE_PER_CPU(struct shadow_time_info, shadow_time);
-
 /* runstate info updated by Xen */
 static DEFINE_PER_CPU(struct vcpu_runstate_info, runstate);
 
@@ -211,7 +201,7 @@ unsigned long long xen_sched_clock(void)
 unsigned long xen_cpu_khz(void)
 {
         u64 xen_khz = 1000000ULL << 32;
-        const struct vcpu_time_info *info =
+        const struct pvclock_vcpu_time_info *info =
                 &HYPERVISOR_shared_info->vcpu_info[0].time;
 
         do_div(xen_khz, info->tsc_to_system_mul);
@@ -223,121 +213,26 @@ unsigned long xen_cpu_khz(void)
         return xen_khz;
 }
 
-/*
- * Reads a consistent set of time-base values from Xen, into a shadow data
- * area.
- */
-static unsigned get_time_values_from_xen(void)
-{
-        struct vcpu_time_info   *src;
-        struct shadow_time_info *dst;
-
-        /* src is shared memory with the hypervisor, so we need to
-           make sure we get a consistent snapshot, even in the face of
-           being preempted. */
-        src = &__get_cpu_var(xen_vcpu)->time;
-        dst = &__get_cpu_var(shadow_time);
-
-        do {
-                dst->version = src->version;
-                rmb();          /* fetch version before data */
-                dst->tsc_timestamp     = src->tsc_timestamp;
-                dst->system_timestamp  = src->system_time;
-                dst->tsc_to_nsec_mul   = src->tsc_to_system_mul;
-                dst->tsc_shift         = src->tsc_shift;
-                rmb();          /* test version after fetching data */
-        } while ((src->version & 1) | (dst->version ^ src->version));
-
-        return dst->version;
-}
-
-/*
- * Scale a 64-bit delta by scaling and multiplying by a 32-bit fraction,
- * yielding a 64-bit result.
- */
-static inline u64 scale_delta(u64 delta, u32 mul_frac, int shift)
-{
-        u64 product;
-#ifdef __i386__
-        u32 tmp1, tmp2;
-#endif
-
-        if (shift < 0)
-                delta >>= -shift;
-        else
-                delta <<= shift;
-
-#ifdef __i386__
-        __asm__ (
-                "mul  %5       ; "
-                "mov  %4,%%eax ; "
-                "mov  %%edx,%4 ; "
-                "mul  %5       ; "
-                "xor  %5,%5    ; "
-                "add  %4,%%eax ; "
-                "adc  %5,%%edx ; "
-                : "=A" (product), "=r" (tmp1), "=r" (tmp2)
-                : "a" ((u32)delta), "1" ((u32)(delta >> 32)), "2" (mul_frac) );
-#elif __x86_64__
-        __asm__ (
-                "mul %%rdx ; shrd $32,%%rdx,%%rax"
-                : "=a" (product) : "0" (delta), "d" ((u64)mul_frac) );
-#else
-#error implement me!
-#endif
-
-        return product;
-}
-
-static u64 get_nsec_offset(struct shadow_time_info *shadow)
-{
-        u64 now, delta;
-        now = native_read_tsc();
-        delta = now - shadow->tsc_timestamp;
-        return scale_delta(delta, shadow->tsc_to_nsec_mul, shadow->tsc_shift);
-}
-
 static cycle_t xen_clocksource_read(void)
 {
-        struct shadow_time_info *shadow = &get_cpu_var(shadow_time);
+        struct pvclock_vcpu_time_info *src;
         cycle_t ret;
-        unsigned version;
-
-        do {
-                version = get_time_values_from_xen();
-                barrier();
-                ret = shadow->system_timestamp + get_nsec_offset(shadow);
-                barrier();
-        } while (version != __get_cpu_var(xen_vcpu)->time.version);
-
-        put_cpu_var(shadow_time);
 
+        src = &get_cpu_var(xen_vcpu)->time;
+        ret = pvclock_clocksource_read(src);
+        put_cpu_var(xen_vcpu);
         return ret;
 }
 
 static void xen_read_wallclock(struct timespec *ts)
 {
-        const struct shared_info *s = HYPERVISOR_shared_info;
-        u32 version;
-        u64 delta;
-        struct timespec now;
-
-        /* get wallclock at system boot */
-        do {
-                version = s->wc_version;
-                rmb();          /* fetch version before time */
-                now.tv_sec  = s->wc_sec;
-                now.tv_nsec = s->wc_nsec;
-                rmb();          /* fetch time before checking version */
-        } while ((s->wc_version & 1) | (version ^ s->wc_version));
+        struct shared_info *s = HYPERVISOR_shared_info;
+        struct pvclock_wall_clock *wall_clock = &(s->wc);
+        struct pvclock_vcpu_time_info *vcpu_time;
 
-        delta = xen_clocksource_read(); /* time since system boot */
-        delta += now.tv_sec * (u64)NSEC_PER_SEC + now.tv_nsec;
-
-        now.tv_nsec = do_div(delta, NSEC_PER_SEC);
-        now.tv_sec = delta;
-
-        set_normalized_timespec(ts, now.tv_sec, now.tv_nsec);
+        vcpu_time = &get_cpu_var(xen_vcpu)->time;
+        pvclock_read_wallclock(wall_clock, vcpu_time, ts);
+        put_cpu_var(xen_vcpu);
 }
 
 unsigned long xen_get_wallclock(void)
@@ -345,7 +240,6 @@ unsigned long xen_get_wallclock(void)
         struct timespec ts;
 
         xen_read_wallclock(&ts);
-
         return ts.tv_sec;
 }
 
@@ -569,8 +463,6 @@ __init void xen_time_init(void)
 {
         int cpu = smp_processor_id();
 
-        get_time_values_from_xen();
-
         clocksource_register(&xen_clocksource);
 
         if (HYPERVISOR_vcpu_op(VCPUOP_stop_periodic_timer, cpu, NULL) == 0) {
diff --git a/arch/x86/xen/xen-head.S b/arch/x86/xen/xen-head.S
index 288d587ce73c..6ec3b4f7719b 100644
--- a/arch/x86/xen/xen-head.S
+++ b/arch/x86/xen/xen-head.S
@@ -17,7 +17,7 @@ ENTRY(startup_xen)
 
         __FINIT
 
-.pushsection .bss.page_aligned
+.pushsection .text
         .align PAGE_SIZE_asm
 ENTRY(hypercall_page)
         .skip 0x1000
@@ -30,11 +30,7 @@ ENTRY(hypercall_page)
         ELFNOTE(Xen, XEN_ELFNOTE_ENTRY,          .long  startup_xen)
         ELFNOTE(Xen, XEN_ELFNOTE_HYPERCALL_PAGE, .long  hypercall_page)
         ELFNOTE(Xen, XEN_ELFNOTE_FEATURES,       .asciz "!writable_page_tables|pae_pgdir_above_4gb")
-#ifdef CONFIG_X86_PAE
         ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE,       .asciz "yes")
-#else
-        ELFNOTE(Xen, XEN_ELFNOTE_PAE_MODE,       .asciz "no")
-#endif
         ELFNOTE(Xen, XEN_ELFNOTE_LOADER,         .asciz "generic")
 
 #endif /*CONFIG_XEN */
diff --git a/drivers/acpi/ac.c b/drivers/acpi/ac.c
index 5b73f6a2cd86..831883b7d6c9 100644
--- a/drivers/acpi/ac.c
+++ b/drivers/acpi/ac.c
@@ -233,6 +233,9 @@ static void acpi_ac_notify(acpi_handle handle, u32 event, void *data)
 
         device = ac->device;
         switch (event) {
+        default:
+                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+                                  "Unsupported event [0x%x]\n", event));
         case ACPI_AC_NOTIFY_STATUS:
         case ACPI_NOTIFY_BUS_CHECK:
         case ACPI_NOTIFY_DEVICE_CHECK:
@@ -244,11 +247,6 @@ static void acpi_ac_notify(acpi_handle handle, u32 event, void *data)
 #ifdef CONFIG_ACPI_SYSFS_POWER
                 kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE);
 #endif
-                break;
-        default:
-                ACPI_DEBUG_PRINT((ACPI_DB_INFO,
-                                  "Unsupported event [0x%x]\n", event));
-                break;
         }
 
         return;
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 5e5dda3a3027..d089c4519d45 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -1713,7 +1713,8 @@ acpi_video_bus_get_devices(struct acpi_video_bus *video,
 
                 status = acpi_video_bus_get_one_device(dev, video);
                 if (ACPI_FAILURE(status)) {
-                        ACPI_EXCEPTION((AE_INFO, status, "Cant attach device"));
+                        ACPI_DEBUG_PRINT((ACPI_DB_WARN,
+                                        "Cant attach device"));
                         continue;
                 }
         }
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 9bf2986a2788..ae8494944c45 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -651,9 +651,17 @@ config PATA_WINBOND_VLB
           Support for the Winbond W83759A controller on Vesa Local Bus
           systems.
 
+config HAVE_PATA_PLATFORM
+        bool
+        help
+          This is an internal configuration node for any machine that
+          uses pata-platform driver to enable the relevant driver in the
+          configuration structure without having to submit endless patches
+          to update the PATA_PLATFORM entry.
+
 config PATA_PLATFORM
         tristate "Generic platform device PATA support"
-        depends on EMBEDDED || ARCH_RPC || PPC
+        depends on EMBEDDED || ARCH_RPC || PPC || HAVE_PATA_PLATFORM
         help
           This option enables support for generic directly connected ATA
           devices commonly found on embedded systems.
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 966ab401e523..6a4a2a25d97a 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -90,6 +90,7 @@ enum {
         board_ahci_mv           = 4,
         board_ahci_sb700        = 5,
         board_ahci_mcp65        = 6,
+        board_ahci_nopmp        = 7,
 
         /* global controller registers */
         HOST_CAP                = 0x00, /* host capabilities */
@@ -401,6 +402,14 @@ static const struct ata_port_info ahci_port_info[] = {
                 .udma_mask      = ATA_UDMA6,
                 .port_ops       = &ahci_ops,
         },
+        /* board_ahci_nopmp */
+        {
+                AHCI_HFLAGS     (AHCI_HFLAG_NO_PMP),
+                .flags          = AHCI_FLAG_COMMON,
+                .pio_mask       = 0x1f, /* pio0-4 */
+                .udma_mask      = ATA_UDMA6,
+                .port_ops       = &ahci_ops,
+        },
 };
 
 static const struct pci_device_id ahci_pci_tbl[] = {
@@ -525,9 +534,9 @@ static const struct pci_device_id ahci_pci_tbl[] = {
         { PCI_VDEVICE(NVIDIA, 0x0bc7), board_ahci },            /* MCP7B */
 
         /* SiS */
-        { PCI_VDEVICE(SI, 0x1184), board_ahci }, /* SiS 966 */
-        { PCI_VDEVICE(SI, 0x1185), board_ahci }, /* SiS 966 */
-        { PCI_VDEVICE(SI, 0x0186), board_ahci }, /* SiS 968 */
+        { PCI_VDEVICE(SI, 0x1184), board_ahci_nopmp },          /* SiS 966 */
+        { PCI_VDEVICE(SI, 0x1185), board_ahci_nopmp },          /* SiS 968 */
+        { PCI_VDEVICE(SI, 0x0186), board_ahci_nopmp },          /* SiS 968 */
 
         /* Marvell */
         { PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv },        /* 6145 */
@@ -653,6 +662,14 @@ static void ahci_save_initial_config(struct pci_dev *pdev,
                 cap &= ~HOST_CAP_PMP;
         }
 
+        if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361 &&
+            port_map != 1) {
+                dev_printk(KERN_INFO, &pdev->dev,
+                           "JMB361 has only one port, port_map 0x%x -> 0x%x\n",
+                           port_map, 1);
+                port_map = 1;
+        }
+
         /*
          * Temporary Marvell 6145 hack: PATA port presence
          * is asserted through the standard AHCI port
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 81b7ae376951..a90ae03f56b2 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -1043,6 +1043,13 @@ static int piix_broken_suspend(void)
                         },
                 },
                 {
+                        .ident = "TECRA M4",
+                        .matches = {
+                                DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+                                DMI_MATCH(DMI_PRODUCT_NAME, "TECRA M4"),
+                        },
+                },
+                {
                         .ident = "TECRA M5",
                         .matches = {
                                 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index cc816ca623d3..303fc0d2b978 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4297,7 +4297,7 @@ void ata_sg_clean(struct ata_queued_cmd *qc)
 }
 
 /**
- *      ata_check_atapi_dma - Check whether ATAPI DMA can be supported
+ *      atapi_check_dma - Check whether ATAPI DMA can be supported
  *      @qc: Metadata associated with taskfile to check
  *
  *      Allow low-level driver to filter ATA PACKET commands, returning
@@ -4310,7 +4310,7 @@ void ata_sg_clean(struct ata_queued_cmd *qc)
  *      RETURNS: 0 when ATAPI DMA can be used
  *               nonzero otherwise
  */
-int ata_check_atapi_dma(struct ata_queued_cmd *qc)
+int atapi_check_dma(struct ata_queued_cmd *qc)
 {
         struct ata_port *ap = qc->ap;
 
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c
index 2e6e1622dc6d..57a43649a461 100644
--- a/drivers/ata/libata-scsi.c
+++ b/drivers/ata/libata-scsi.c
@@ -2343,8 +2343,8 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
 {
         struct scsi_cmnd *scmd = qc->scsicmd;
         struct ata_device *dev = qc->dev;
-        int using_pio = (dev->flags & ATA_DFLAG_PIO);
         int nodata = (scmd->sc_data_direction == DMA_NONE);
+        int using_pio = !nodata && (dev->flags & ATA_DFLAG_PIO);
         unsigned int nbytes;
 
         memset(qc->cdb, 0, dev->cdb_len);
@@ -2362,7 +2362,7 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
         ata_qc_set_pc_nbytes(qc);
 
         /* check whether ATAPI DMA is safe */
-        if (!using_pio && ata_check_atapi_dma(qc))
+        if (!nodata && !using_pio && atapi_check_dma(qc))
                 using_pio = 1;
 
         /* Some controller variants snoop this value for Packet
@@ -2402,13 +2402,11 @@ static unsigned int atapi_xlat(struct ata_queued_cmd *qc)
         qc->tf.lbam = (nbytes & 0xFF);
         qc->tf.lbah = (nbytes >> 8);
 
-        if (using_pio || nodata) {
-                /* no data, or PIO data xfer */
-                if (nodata)
-                        qc->tf.protocol = ATAPI_PROT_NODATA;
-                else
-                        qc->tf.protocol = ATAPI_PROT_PIO;
-        } else {
+        if (nodata)
+                qc->tf.protocol = ATAPI_PROT_NODATA;
+        else if (using_pio)
+                qc->tf.protocol = ATAPI_PROT_PIO;
+        else {
                 /* DMA data xfer */
                 qc->tf.protocol = ATAPI_PROT_DMA;
                 qc->tf.feature |= ATAPI_PKT_DMA;
diff --git a/drivers/ata/libata.h b/drivers/ata/libata.h
index 4514283937ea..1cf803adbc95 100644
--- a/drivers/ata/libata.h
+++ b/drivers/ata/libata.h
@@ -106,7 +106,7 @@ extern void ata_sg_clean(struct ata_queued_cmd *qc);
 extern void ata_qc_free(struct ata_queued_cmd *qc);
 extern void ata_qc_issue(struct ata_queued_cmd *qc);
 extern void __ata_qc_complete(struct ata_queued_cmd *qc);
-extern int ata_check_atapi_dma(struct ata_queued_cmd *qc);
+extern int atapi_check_dma(struct ata_queued_cmd *qc);
 extern void swap_buf_le16(u16 *buf, unsigned int buf_words);
 extern void ata_dev_init(struct ata_device *dev);
 extern void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp);
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index 3d39f9dfec5a..41b4361bbf6e 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -414,6 +414,7 @@ static struct pcmcia_device_id pcmcia_devices[] = {
         PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
         PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDEII", 0x547e66dc, 0xb3662674),
         PCMCIA_DEVICE_PROD_ID12("LOOKMEET", "CBIDE2      ", 0xe37be2b5, 0x8671043b),
+        PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF300", 0x7ed2ad87, 0x7e9e78ee),
         PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF500", 0x7ed2ad87, 0x7a13045c),
         PCMCIA_DEVICE_PROD_ID2("NinjaATA-", 0xebe0bd79),
         PCMCIA_DEVICE_PROD_ID12("PCMCIA", "CD-ROM", 0x281f1c5d, 0x66536591),
@@ -424,6 +425,7 @@ static struct pcmcia_device_id pcmcia_devices[] = {
         PCMCIA_DEVICE_PROD_ID12("SMI VENDOR", "SMI PRODUCT", 0x30896c92, 0x703cc5f6),
         PCMCIA_DEVICE_PROD_ID12("TOSHIBA", "MK2001MPL", 0xb4585a1a, 0x3489e003),
         PCMCIA_DEVICE_PROD_ID1("TRANSCEND    512M   ", 0xd0909443),
+        PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF45", 0x709b1bf1, 0xf68b6f32),
         PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
         PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
         PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 60391e9a84db..28092bc50146 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -1322,6 +1322,9 @@ static int mv_port_start(struct ata_port *ap)
                 goto out_port_free_dma_mem;
         memset(pp->crpb, 0, MV_CRPB_Q_SZ);
 
+        /* 6041/6081 Rev. "C0" (and newer) are okay with async notify */
+        if (hpriv->hp_flags & MV_HP_ERRATA_60X1C0)
+                ap->flags |= ATA_FLAG_AN;
         /*
          * For GEN_I, there's no NCQ, so we only allocate a single sg_tbl.
          * For later hardware, we need one unique sg_tbl per NCQ tag.
@@ -1592,6 +1595,24 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc)
 
         if ((qc->tf.protocol != ATA_PROT_DMA) &&
             (qc->tf.protocol != ATA_PROT_NCQ)) {
+                static int limit_warnings = 10;
+                /*
+                 * Errata SATA#16, SATA#24: warn if multiple DRQs expected.
+                 *
+                 * Someday, we might implement special polling workarounds
+                 * for these, but it all seems rather unnecessary since we
+                 * normally use only DMA for commands which transfer more
+                 * than a single block of data.
+                 *
+                 * Much of the time, this could just work regardless.
+                 * So for now, just log the incident, and allow the attempt.
+                 */
+                if (limit_warnings && (qc->nbytes / qc->sect_size) > 1) {
+                        --limit_warnings;
+                        ata_link_printk(qc->dev->link, KERN_WARNING, DRV_NAME
+                                        ": attempting PIO w/multiple DRQ: "
+                                        "this may fail due to h/w errata\n");
+                }
                 /*
                  * We're about to send a non-EDMA capable command to the
                  * port.  Turn off EDMA so there won't be problems accessing
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 1ae64bb36771..df702642ab8f 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -948,7 +948,7 @@ static void intel_i9xx_setup_flush(void)
         intel_private.ifp_resource.flags = IORESOURCE_MEM;
 
         /* Setup chipset flush for 915 */
-        if (IS_I965 || IS_G33) {
+        if (IS_I965 || IS_G33 || IS_G4X) {
                 intel_i965_g33_setup_chipset_flush();
         } else {
                 intel_i915_setup_chipset_flush();
diff --git a/drivers/char/drm/ati_pcigart.c b/drivers/char/drm/ati_pcigart.c
index b710426bab3e..c533d0c9ec61 100644
--- a/drivers/char/drm/ati_pcigart.c
+++ b/drivers/char/drm/ati_pcigart.c
@@ -76,7 +76,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
                 for (i = 0; i < pages; i++) {
                         if (!entry->busaddr[i])
                                 break;
-                        pci_unmap_single(dev->pdev, entry->busaddr[i],
+                        pci_unmap_page(dev->pdev, entry->busaddr[i],
                                          PAGE_SIZE, PCI_DMA_TODEVICE);
                 }
 
@@ -137,10 +137,8 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
 
         for (i = 0; i < pages; i++) {
                 /* we need to support large memory configurations */
-                entry->busaddr[i] = pci_map_single(dev->pdev,
-                                                   page_address(entry->
-                                                                pagelist[i]),
-                                                   PAGE_SIZE, PCI_DMA_TODEVICE);
+                entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
+                                                 0, PAGE_SIZE, PCI_DMA_TODEVICE);
                 if (entry->busaddr[i] == 0) {
                         DRM_ERROR("unable to map PCIGART pages!\n");
                         drm_ati_pcigart_cleanup(dev, gart_info);
diff --git a/drivers/char/drm/drm.h b/drivers/char/drm/drm.h
index 3a05c6d5ebe1..38d3c6b8276a 100644
--- a/drivers/char/drm/drm.h
+++ b/drivers/char/drm/drm.h
@@ -628,7 +628,7 @@ struct drm_set_version {
 #define DRM_IOCTL_AGP_BIND              DRM_IOW( 0x36, struct drm_agp_binding)
 #define DRM_IOCTL_AGP_UNBIND            DRM_IOW( 0x37, struct drm_agp_binding)
 
-#define DRM_IOCTL_SG_ALLOC              DRM_IOW( 0x38, struct drm_scatter_gather)
+#define DRM_IOCTL_SG_ALLOC              DRM_IOWR(0x38, struct drm_scatter_gather)
 #define DRM_IOCTL_SG_FREE               DRM_IOW( 0x39, struct drm_scatter_gather)
 
 #define DRM_IOCTL_WAIT_VBLANK           DRM_IOWR(0x3a, union drm_wait_vblank)
diff --git a/drivers/char/drm/drm_drv.c b/drivers/char/drm/drm_drv.c
index fc54140551a7..564138714bb5 100644
--- a/drivers/char/drm/drm_drv.c
+++ b/drivers/char/drm/drm_drv.c
@@ -470,17 +470,18 @@ int drm_ioctl(struct inode *inode, struct file *filp,
         if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END) &&
             (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls))
                 ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE];
-        else if ((nr >= DRM_COMMAND_END) || (nr < DRM_COMMAND_BASE))
+        else if ((nr >= DRM_COMMAND_END) || (nr < DRM_COMMAND_BASE)) {
                 ioctl = &drm_ioctls[nr];
-        else
+                cmd = ioctl->cmd;
+        } else
                 goto err_i1;
 
+        /* Do not trust userspace, use our own definition */
         func = ioctl->func;
         /* is there a local override? */
         if ((nr == DRM_IOCTL_NR(DRM_IOCTL_DMA)) && dev->driver->dma_ioctl)
                 func = dev->driver->dma_ioctl;
 
-
         if (!func) {
                 DRM_DEBUG("no function\n");
                 retcode = -EINVAL;
diff --git a/drivers/char/drm/drm_pciids.h b/drivers/char/drm/drm_pciids.h
index a6a499f97e22..135bd19499fc 100644
--- a/drivers/char/drm/drm_pciids.h
+++ b/drivers/char/drm/drm_pciids.h
@@ -103,20 +103,18 @@
         {0x1002, 0x5653, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP}, \
         {0x1002, 0x5834, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP}, \
         {0x1002, 0x5835, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY}, \
-        {0x1002, 0x5954, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
-        {0x1002, 0x5955, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
-        {0x1002, 0x5974, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
-        {0x1002, 0x5975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
+        {0x1002, 0x5954, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
+        {0x1002, 0x5955, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
+        {0x1002, 0x5974, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
+        {0x1002, 0x5975, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
         {0x1002, 0x5960, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
         {0x1002, 0x5961, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
         {0x1002, 0x5962, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
         {0x1002, 0x5964, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
         {0x1002, 0x5965, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV280}, \
         {0x1002, 0x5969, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV100}, \
-        {0x1002, 0x5a41, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
-        {0x1002, 0x5a42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
-        {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
-        {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
+        {0x1002, 0x5a61, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
+        {0x1002, 0x5a62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART}, \
         {0x1002, 0x5b60, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
         {0x1002, 0x5b62, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
         {0x1002, 0x5b63, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_RV380|RADEON_NEW_MEMMAP}, \
@@ -411,4 +409,7 @@
         {0x8086, 0x2a02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
         {0x8086, 0x2a12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
         {0x8086, 0x2a42, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0x8086, 0x2e02, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0x8086, 0x2e12, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
+        {0x8086, 0x2e22, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, \
         {0, 0, 0}
diff --git a/drivers/char/drm/i915_drv.c b/drivers/char/drm/i915_drv.c
index e8f3d682e3b1..93aed1c38bd2 100644
--- a/drivers/char/drm/i915_drv.c
+++ b/drivers/char/drm/i915_drv.c
@@ -389,6 +389,7 @@ static int i915_resume(struct drm_device *dev)
         pci_restore_state(dev->pdev);
         if (pci_enable_device(dev->pdev))
                 return -1;
+        pci_set_master(dev->pdev);
 
         pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
 
diff --git a/drivers/char/drm/i915_drv.h b/drivers/char/drm/i915_drv.h
index 1b20f7c0639c..d7326d92a237 100644
--- a/drivers/char/drm/i915_drv.h
+++ b/drivers/char/drm/i915_drv.h
@@ -1112,12 +1112,19 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
                        (dev)->pci_device == 0x29A2 || \
                        (dev)->pci_device == 0x2A02 || \
                        (dev)->pci_device == 0x2A12 || \
-                       (dev)->pci_device == 0x2A42)
+                       (dev)->pci_device == 0x2A42 || \
+                       (dev)->pci_device == 0x2E02 || \
+                       (dev)->pci_device == 0x2E12 || \
+                       (dev)->pci_device == 0x2E22)
 
 #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
 
 #define IS_IGD_GM(dev) ((dev)->pci_device == 0x2A42)
 
+#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
+                     (dev)->pci_device == 0x2E12 || \
+                     (dev)->pci_device == 0x2E22)
+
 #define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||  \
                         (dev)->pci_device == 0x29B2 ||  \
                         (dev)->pci_device == 0x29D2)
@@ -1128,7 +1135,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
                         IS_I945GM(dev) || IS_I965GM(dev) || IS_IGD_GM(dev))
 
-#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev))
+#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_IGD_GM(dev) || IS_G4X(dev))
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
diff --git a/drivers/char/drm/r300_cmdbuf.c b/drivers/char/drm/r300_cmdbuf.c
index f535812e4057..702df45320f7 100644
--- a/drivers/char/drm/r300_cmdbuf.c
+++ b/drivers/char/drm/r300_cmdbuf.c
@@ -189,18 +189,12 @@ void r300_init_reg_flags(struct drm_device *dev)
         ADD_RANGE(R300_RE_CULL_CNTL, 1);
         ADD_RANGE(0x42C0, 2);
         ADD_RANGE(R300_RS_CNTL_0, 2);
-        ADD_RANGE(R300_RS_INTERP_0, 8);
-        ADD_RANGE(R300_RS_ROUTE_0, 8);
-        ADD_RANGE(0x43A4, 2);
+
+        ADD_RANGE(R300_SC_HYPERZ, 2);
         ADD_RANGE(0x43E8, 1);
-        ADD_RANGE(R300_PFS_CNTL_0, 3);
-        ADD_RANGE(R300_PFS_NODE_0, 4);
-        ADD_RANGE(R300_PFS_TEXI_0, 64);
+
         ADD_RANGE(0x46A4, 5);
-        ADD_RANGE(R300_PFS_INSTR0_0, 64);
-        ADD_RANGE(R300_PFS_INSTR1_0, 64);
-        ADD_RANGE(R300_PFS_INSTR2_0, 64);
-        ADD_RANGE(R300_PFS_INSTR3_0, 64);
+
         ADD_RANGE(R300_RE_FOG_STATE, 1);
         ADD_RANGE(R300_FOG_COLOR_R, 3);
         ADD_RANGE(R300_PP_ALPHA_TEST, 2);
@@ -215,14 +209,12 @@ void r300_init_reg_flags(struct drm_device *dev)
         ADD_RANGE(0x4E50, 9);
         ADD_RANGE(0x4E88, 1);
         ADD_RANGE(0x4EA0, 2);
-        ADD_RANGE(R300_RB3D_ZSTENCIL_CNTL_0, 3);
-        ADD_RANGE(R300_RB3D_ZSTENCIL_FORMAT, 4);
-        ADD_RANGE_MARK(R300_RB3D_DEPTHOFFSET, 1, MARK_CHECK_OFFSET);    /* check offset */
-        ADD_RANGE(R300_RB3D_DEPTHPITCH, 1);
-        ADD_RANGE(0x4F28, 1);
-        ADD_RANGE(0x4F30, 2);
-        ADD_RANGE(0x4F44, 1);
-        ADD_RANGE(0x4F54, 1);
+        ADD_RANGE(R300_ZB_CNTL, 3);
+        ADD_RANGE(R300_ZB_FORMAT, 4);
+        ADD_RANGE_MARK(R300_ZB_DEPTHOFFSET, 1, MARK_CHECK_OFFSET);      /* check offset */
+        ADD_RANGE(R300_ZB_DEPTHPITCH, 1);
+        ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1);
+        ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13);
 
         ADD_RANGE(R300_TX_FILTER_0, 16);
         ADD_RANGE(R300_TX_FILTER1_0, 16);
@@ -235,13 +227,32 @@ void r300_init_reg_flags(struct drm_device *dev)
         ADD_RANGE(R300_TX_BORDER_COLOR_0, 16);
 
         /* Sporadic registers used as primitives are emitted */
-        ADD_RANGE(R300_RB3D_ZCACHE_CTLSTAT, 1);
+        ADD_RANGE(R300_ZB_ZCACHE_CTLSTAT, 1);
         ADD_RANGE(R300_RB3D_DSTCACHE_CTLSTAT, 1);
         ADD_RANGE(R300_VAP_INPUT_ROUTE_0_0, 8);
         ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8);
 
         if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
-                ADD_RANGE(0x4074, 16);
+                ADD_RANGE(R500_VAP_INDEX_OFFSET, 1);
+                ADD_RANGE(R500_US_CONFIG, 2);
+                ADD_RANGE(R500_US_CODE_ADDR, 3);
+                ADD_RANGE(R500_US_FC_CTRL, 1);
+                ADD_RANGE(R500_RS_IP_0, 16);
+                ADD_RANGE(R500_RS_INST_0, 16);
+                ADD_RANGE(R500_RB3D_COLOR_CLEAR_VALUE_AR, 2);
+                ADD_RANGE(R500_RB3D_CONSTANT_COLOR_AR, 2);
+                ADD_RANGE(R500_ZB_FIFO_SIZE, 2);
+        } else {
+                ADD_RANGE(R300_PFS_CNTL_0, 3);
+                ADD_RANGE(R300_PFS_NODE_0, 4);
+                ADD_RANGE(R300_PFS_TEXI_0, 64);
+                ADD_RANGE(R300_PFS_INSTR0_0, 64);
+                ADD_RANGE(R300_PFS_INSTR1_0, 64);
+                ADD_RANGE(R300_PFS_INSTR2_0, 64);
+                ADD_RANGE(R300_PFS_INSTR3_0, 64);
+                ADD_RANGE(R300_RS_INTERP_0, 8);
+                ADD_RANGE(R300_RS_ROUTE_0, 8);
+
         }
 }
 
@@ -707,8 +718,9 @@ static __inline__ void r300_pacify(drm_radeon_private_t *dev_priv)
         BEGIN_RING(6);
         OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
         OUT_RING(R300_RB3D_DSTCACHE_UNKNOWN_0A);
-        OUT_RING(CP_PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
-        OUT_RING(R300_RB3D_ZCACHE_UNKNOWN_03);
+        OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0));
+        OUT_RING(R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE|
+                 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
         OUT_RING(CP_PACKET3(RADEON_CP_NOP, 0));
         OUT_RING(0x0);
         ADVANCE_RING();
@@ -829,6 +841,54 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
 }
 
 /**
+ * Uploads user-supplied vertex program instructions or parameters onto
+ * the graphics card.
+ * Called by r300_do_cp_cmdbuf.
+ */
+static inline int r300_emit_r500fp(drm_radeon_private_t *dev_priv,
+                                       drm_radeon_kcmd_buffer_t *cmdbuf,
+                                       drm_r300_cmd_header_t header)
+{
+        int sz;
+        int addr;
+        int type;
+        int clamp;
+        int stride;
+        RING_LOCALS;
+
+        sz = header.r500fp.count;
+        /* address is 9 bits 0 - 8, bit 1 of flags is part of address */
+        addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo;
+
+        type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE);
+        clamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP);
+
+        addr |= (type << 16);
+        addr |= (clamp << 17);
+
+        stride = type ? 4 : 6;
+
+        DRM_DEBUG("r500fp %d %d type: %d\n", sz, addr, type);
+        if (!sz)
+                return 0;
+        if (sz * stride * 4 > cmdbuf->bufsz)
+                return -EINVAL;
+
+        BEGIN_RING(3 + sz * stride);
+        OUT_RING_REG(R500_GA_US_VECTOR_INDEX, addr);
+        OUT_RING(CP_PACKET0_TABLE(R500_GA_US_VECTOR_DATA, sz * stride - 1));
+        OUT_RING_TABLE((int *)cmdbuf->buf, sz * stride);
+
+        ADVANCE_RING();
+
+        cmdbuf->buf += sz * stride * 4;
+        cmdbuf->bufsz -= sz * stride * 4;
+
+        return 0;
+}
+
+
+/**
  * Parses and validates a user-supplied command buffer and emits appropriate
  * commands on the DMA ring buffer.
  * Called by the ioctl handler function radeon_cp_cmdbuf.
@@ -963,6 +1023,19 @@ int r300_do_cp_cmdbuf(struct drm_device *dev,
                         }
                         break;
 
+                case R300_CMD_R500FP:
+                        if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV515) {
+                                DRM_ERROR("Calling r500 command on r300 card\n");
+                                ret = -EINVAL;
+                                goto cleanup;
+                        }
+                        DRM_DEBUG("R300_CMD_R500FP\n");
+                        ret = r300_emit_r500fp(dev_priv, cmdbuf, header);
+                        if (ret) {
+                                DRM_ERROR("r300_emit_r500fp failed\n");
+                                goto cleanup;
+                        }
+                        break;
                 default:
                         DRM_ERROR("bad cmd_type %i at %p\n",
                                   header.header.cmd_type,
diff --git a/drivers/char/drm/r300_reg.h b/drivers/char/drm/r300_reg.h
index 8f664af9c4a4..a6802f26afc4 100644
--- a/drivers/char/drm/r300_reg.h
+++ b/drivers/char/drm/r300_reg.h
@@ -702,6 +702,27 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #               define R300_RS_ROUTE_1_UNKNOWN11         (1 << 11)
 /* END: Rasterization / Interpolators - many guesses */
 
+/* Hierarchical Z Enable */
+#define R300_SC_HYPERZ                   0x43a4
+#       define R300_SC_HYPERZ_DISABLE     (0 << 0)
+#       define R300_SC_HYPERZ_ENABLE      (1 << 0)
+#       define R300_SC_HYPERZ_MIN         (0 << 1)
+#       define R300_SC_HYPERZ_MAX         (1 << 1)
+#       define R300_SC_HYPERZ_ADJ_256     (0 << 2)
+#       define R300_SC_HYPERZ_ADJ_128     (1 << 2)
+#       define R300_SC_HYPERZ_ADJ_64      (2 << 2)
+#       define R300_SC_HYPERZ_ADJ_32      (3 << 2)
+#       define R300_SC_HYPERZ_ADJ_16      (4 << 2)
+#       define R300_SC_HYPERZ_ADJ_8       (5 << 2)
+#       define R300_SC_HYPERZ_ADJ_4       (6 << 2)
+#       define R300_SC_HYPERZ_ADJ_2       (7 << 2)
+#       define R300_SC_HYPERZ_HZ_Z0MIN_NO (0 << 5)
+#       define R300_SC_HYPERZ_HZ_Z0MIN    (1 << 5)
+#       define R300_SC_HYPERZ_HZ_Z0MAX_NO (0 << 6)
+#       define R300_SC_HYPERZ_HZ_Z0MAX    (1 << 6)
+
+#define R300_SC_EDGERULE                 0x43a8
+
 /* BEGIN: Scissors and cliprects */
 
 /* There are four clipping rectangles. Their corner coordinates are inclusive.
@@ -1346,7 +1367,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 /* Guess by Vladimir.
  * Set to 0A before 3D operations, set to 02 afterwards.
  */
-#define R300_RB3D_DSTCACHE_CTLSTAT          0x4E4C
+/*#define R300_RB3D_DSTCACHE_CTLSTAT          0x4E4C*/
 #       define R300_RB3D_DSTCACHE_UNKNOWN_02             0x00000002
 #       define R300_RB3D_DSTCACHE_UNKNOWN_0A             0x0000000A
 
@@ -1355,19 +1376,14 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  * for this.
  * Bit (1<<8) is the "test" bit. so plain write is 6  - vd
  */
-#define R300_RB3D_ZSTENCIL_CNTL_0                   0x4F00
-#       define R300_RB3D_Z_DISABLED_1            0x00000010
-#       define R300_RB3D_Z_DISABLED_2            0x00000014
-#       define R300_RB3D_Z_TEST                  0x00000012
-#       define R300_RB3D_Z_TEST_AND_WRITE        0x00000016
-#       define R300_RB3D_Z_WRITE_ONLY            0x00000006
-
-#       define R300_RB3D_Z_TEST                  0x00000012
-#       define R300_RB3D_Z_TEST_AND_WRITE        0x00000016
-#       define R300_RB3D_Z_WRITE_ONLY            0x00000006
-#       define R300_RB3D_STENCIL_ENABLE          0x00000001
-
-#define R300_RB3D_ZSTENCIL_CNTL_1                   0x4F04
+#define R300_ZB_CNTL                             0x4F00
+#       define R300_STENCIL_ENABLE               (1 << 0)
+#       define R300_Z_ENABLE                     (1 << 1)
+#       define R300_Z_WRITE_ENABLE               (1 << 2)
+#       define R300_Z_SIGNED_COMPARE             (1 << 3)
+#       define R300_STENCIL_FRONT_BACK           (1 << 4)
+
+#define R300_ZB_ZSTENCILCNTL                   0x4f04
         /* functions */
 #       define R300_ZS_NEVER                    0
 #       define R300_ZS_LESS                     1
@@ -1387,52 +1403,166 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #       define R300_ZS_INVERT                   5
 #       define R300_ZS_INCR_WRAP                6
 #       define R300_ZS_DECR_WRAP                7
+#       define R300_Z_FUNC_SHIFT                0
         /* front and back refer to operations done for front
            and back faces, i.e. separate stencil function support */
-#       define R300_RB3D_ZS1_DEPTH_FUNC_SHIFT           0
-#       define R300_RB3D_ZS1_FRONT_FUNC_SHIFT           3
-#       define R300_RB3D_ZS1_FRONT_FAIL_OP_SHIFT        6
-#       define R300_RB3D_ZS1_FRONT_ZPASS_OP_SHIFT       9
-#       define R300_RB3D_ZS1_FRONT_ZFAIL_OP_SHIFT      12
-#       define R300_RB3D_ZS1_BACK_FUNC_SHIFT           15
-#       define R300_RB3D_ZS1_BACK_FAIL_OP_SHIFT        18
-#       define R300_RB3D_ZS1_BACK_ZPASS_OP_SHIFT       21
-#       define R300_RB3D_ZS1_BACK_ZFAIL_OP_SHIFT       24
-
-#define R300_RB3D_ZSTENCIL_CNTL_2                   0x4F08
-#       define R300_RB3D_ZS2_STENCIL_REF_SHIFT          0
-#       define R300_RB3D_ZS2_STENCIL_MASK               0xFF
-#       define R300_RB3D_ZS2_STENCIL_MASK_SHIFT         8
-#       define R300_RB3D_ZS2_STENCIL_WRITE_MASK_SHIFT   16
+#       define R300_S_FRONT_FUNC_SHIFT          3
+#       define R300_S_FRONT_SFAIL_OP_SHIFT      6
+#       define R300_S_FRONT_ZPASS_OP_SHIFT      9
+#       define R300_S_FRONT_ZFAIL_OP_SHIFT      12
+#       define R300_S_BACK_FUNC_SHIFT           15
+#       define R300_S_BACK_SFAIL_OP_SHIFT       18
+#       define R300_S_BACK_ZPASS_OP_SHIFT       21
+#       define R300_S_BACK_ZFAIL_OP_SHIFT       24
+
+#define R300_ZB_STENCILREFMASK                        0x4f08
+#       define R300_STENCILREF_SHIFT       0
+#       define R300_STENCILREF_MASK        0x000000ff
+#       define R300_STENCILMASK_SHIFT      8
+#       define R300_STENCILMASK_MASK       0x0000ff00
+#       define R300_STENCILWRITEMASK_SHIFT 16
+#       define R300_STENCILWRITEMASK_MASK  0x00ff0000
 
 /* gap */
 
-#define R300_RB3D_ZSTENCIL_FORMAT                   0x4F10
-#       define R300_DEPTH_FORMAT_16BIT_INT_Z     (0 << 0)
-#       define R300_DEPTH_FORMAT_24BIT_INT_Z     (2 << 0)
-        /* 16 bit format or some aditional bit ? */
-#       define R300_DEPTH_FORMAT_UNK32          (32 << 0)
+#define R300_ZB_FORMAT                             0x4f10
+#       define R300_DEPTHFORMAT_16BIT_INT_Z   (0 << 0)
+#       define R300_DEPTHFORMAT_16BIT_13E3    (1 << 0)
+#       define R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL   (2 << 0)
+/* reserved up to (15 << 0) */
+#       define R300_INVERT_13E3_LEADING_ONES  (0 << 4)
+#       define R300_INVERT_13E3_LEADING_ZEROS (1 << 4)
 
-#define R300_RB3D_EARLY_Z                           0x4F14
-#       define R300_EARLY_Z_DISABLE              (0 << 0)
-#       define R300_EARLY_Z_ENABLE               (1 << 0)
+#define R300_ZB_ZTOP                             0x4F14
+#       define R300_ZTOP_DISABLE                 (0 << 0)
+#       define R300_ZTOP_ENABLE                  (1 << 0)
 
 /* gap */
 
-#define R300_RB3D_ZCACHE_CTLSTAT            0x4F18 /* GUESS */
-#       define R300_RB3D_ZCACHE_UNKNOWN_01  0x1
-#       define R300_RB3D_ZCACHE_UNKNOWN_03  0x3
+#define R300_ZB_ZCACHE_CTLSTAT            0x4f18
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_NO_EFFECT      (0 << 0)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE (1 << 0)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_NO_EFFECT       (0 << 1)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE            (1 << 1)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_IDLE            (0 << 31)
+#       define R300_ZB_ZCACHE_CTLSTAT_ZC_BUSY_BUSY            (1 << 31)
+
+#define R300_ZB_BW_CNTL                     0x4f1c
+#       define R300_HIZ_DISABLE                              (0 << 0)
+#       define R300_HIZ_ENABLE                               (1 << 0)
+#       define R300_HIZ_MIN                                  (0 << 1)
+#       define R300_HIZ_MAX                                  (1 << 1)
+#       define R300_FAST_FILL_DISABLE                        (0 << 2)
+#       define R300_FAST_FILL_ENABLE                         (1 << 2)
+#       define R300_RD_COMP_DISABLE                          (0 << 3)
+#       define R300_RD_COMP_ENABLE                           (1 << 3)
+#       define R300_WR_COMP_DISABLE                          (0 << 4)
+#       define R300_WR_COMP_ENABLE                           (1 << 4)
+#       define R300_ZB_CB_CLEAR_RMW                          (0 << 5)
+#       define R300_ZB_CB_CLEAR_CACHE_LINEAR                 (1 << 5)
+#       define R300_FORCE_COMPRESSED_STENCIL_VALUE_DISABLE   (0 << 6)
+#       define R300_FORCE_COMPRESSED_STENCIL_VALUE_ENABLE    (1 << 6)
+
+#       define R500_ZEQUAL_OPTIMIZE_ENABLE                   (0 << 7)
+#       define R500_ZEQUAL_OPTIMIZE_DISABLE                  (1 << 7)
+#       define R500_SEQUAL_OPTIMIZE_ENABLE                   (0 << 8)
+#       define R500_SEQUAL_OPTIMIZE_DISABLE                  (1 << 8)
+
+#       define R500_BMASK_ENABLE                             (0 << 10)
+#       define R500_BMASK_DISABLE                            (1 << 10)
+#       define R500_HIZ_EQUAL_REJECT_DISABLE                 (0 << 11)
+#       define R500_HIZ_EQUAL_REJECT_ENABLE                  (1 << 11)
+#       define R500_HIZ_FP_EXP_BITS_DISABLE                  (0 << 12)
+#       define R500_HIZ_FP_EXP_BITS_1                        (1 << 12)
+#       define R500_HIZ_FP_EXP_BITS_2                        (2 << 12)
+#       define R500_HIZ_FP_EXP_BITS_3                        (3 << 12)
+#       define R500_HIZ_FP_EXP_BITS_4                        (4 << 12)
+#       define R500_HIZ_FP_EXP_BITS_5                        (5 << 12)
+#       define R500_HIZ_FP_INVERT_LEADING_ONES               (0 << 15)
+#       define R500_HIZ_FP_INVERT_LEADING_ZEROS              (1 << 15)
+#       define R500_TILE_OVERWRITE_RECOMPRESSION_ENABLE      (0 << 16)
+#       define R500_TILE_OVERWRITE_RECOMPRESSION_DISABLE     (1 << 16)
+#       define R500_CONTIGUOUS_6XAA_SAMPLES_ENABLE           (0 << 17)
+#       define R500_CONTIGUOUS_6XAA_SAMPLES_DISABLE          (1 << 17)
+#       define R500_PEQ_PACKING_DISABLE                      (0 << 18)
+#       define R500_PEQ_PACKING_ENABLE                       (1 << 18)
+#       define R500_COVERED_PTR_MASKING_DISABLE              (0 << 18)
+#       define R500_COVERED_PTR_MASKING_ENABLE               (1 << 18)
+
 
 /* gap */
 
-#define R300_RB3D_DEPTHOFFSET               0x4F20
-#define R300_RB3D_DEPTHPITCH                0x4F24
-#       define R300_DEPTHPITCH_MASK              0x00001FF8 /* GUESS */
-#       define R300_DEPTH_TILE_ENABLE            (1 << 16) /* GUESS */
-#       define R300_DEPTH_MICROTILE_ENABLE       (1 << 17) /* GUESS */
-#       define R300_DEPTH_ENDIAN_NO_SWAP         (0 << 18) /* GUESS */
-#       define R300_DEPTH_ENDIAN_WORD_SWAP       (1 << 18) /* GUESS */
-#       define R300_DEPTH_ENDIAN_DWORD_SWAP      (2 << 18) /* GUESS */
+/* Z Buffer Address Offset.
+ * Bits 31 to 5 are used for aligned Z buffer address offset for macro tiles.
+ */
+#define R300_ZB_DEPTHOFFSET               0x4f20
+
+/* Z Buffer Pitch and Endian Control */
+#define R300_ZB_DEPTHPITCH                0x4f24
+#       define R300_DEPTHPITCH_MASK              0x00003FFC
+#       define R300_DEPTHMACROTILE_DISABLE      (0 << 16)
+#       define R300_DEPTHMACROTILE_ENABLE       (1 << 16)
+#       define R300_DEPTHMICROTILE_LINEAR       (0 << 17)
+#       define R300_DEPTHMICROTILE_TILED        (1 << 17)
+#       define R300_DEPTHMICROTILE_TILED_SQUARE (2 << 17)
+#       define R300_DEPTHENDIAN_NO_SWAP         (0 << 18)
+#       define R300_DEPTHENDIAN_WORD_SWAP       (1 << 18)
+#       define R300_DEPTHENDIAN_DWORD_SWAP      (2 << 18)
+#       define R300_DEPTHENDIAN_HALF_DWORD_SWAP (3 << 18)
+
+/* Z Buffer Clear Value */
+#define R300_ZB_DEPTHCLEARVALUE                  0x4f28
+
+#define R300_ZB_ZMASK_OFFSET                     0x4f30
+#define R300_ZB_ZMASK_PITCH                      0x4f34
+#define R300_ZB_ZMASK_WRINDEX                    0x4f38
+#define R300_ZB_ZMASK_DWORD                      0x4f3c
+#define R300_ZB_ZMASK_RDINDEX                    0x4f40
+
+/* Hierarchical Z Memory Offset */
+#define R300_ZB_HIZ_OFFSET                       0x4f44
+
+/* Hierarchical Z Write Index */
+#define R300_ZB_HIZ_WRINDEX                      0x4f48
+
+/* Hierarchical Z Data */
+#define R300_ZB_HIZ_DWORD                        0x4f4c
+
+/* Hierarchical Z Read Index */
+#define R300_ZB_HIZ_RDINDEX                      0x4f50
+
+/* Hierarchical Z Pitch */
+#define R300_ZB_HIZ_PITCH                        0x4f54
+
+/* Z Buffer Z Pass Counter Data */
+#define R300_ZB_ZPASS_DATA                       0x4f58
+
+/* Z Buffer Z Pass Counter Address */
+#define R300_ZB_ZPASS_ADDR                       0x4f5c
+
+/* Depth buffer X and Y coordinate offset */
+#define R300_ZB_DEPTHXY_OFFSET                   0x4f60
+#       define R300_DEPTHX_OFFSET_SHIFT  1
+#       define R300_DEPTHX_OFFSET_MASK   0x000007FE
+#       define R300_DEPTHY_OFFSET_SHIFT  17
+#       define R300_DEPTHY_OFFSET_MASK   0x07FE0000
+
+/* Sets the fifo sizes */
+#define R500_ZB_FIFO_SIZE                        0x4fd0
+#       define R500_OP_FIFO_SIZE_FULL   (0 << 0)
+#       define R500_OP_FIFO_SIZE_HALF   (1 << 0)
+#       define R500_OP_FIFO_SIZE_QUATER (2 << 0)
+#       define R500_OP_FIFO_SIZE_EIGTHS (4 << 0)
+
+/* Stencil Reference Value and Mask for backfacing quads */
+/* R300_ZB_STENCILREFMASK handles front face */
+#define R500_ZB_STENCILREFMASK_BF                0x4fd4
+#       define R500_STENCILREF_SHIFT       0
+#       define R500_STENCILREF_MASK        0x000000ff
+#       define R500_STENCILMASK_SHIFT      8
+#       define R500_STENCILMASK_MASK       0x0000ff00
+#       define R500_STENCILWRITEMASK_SHIFT 16
+#       define R500_STENCILWRITEMASK_MASK  0x00ff0000
 
 /* BEGIN: Vertex program instruction set */
 
@@ -1623,4 +1753,20 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 #define R300_CP_CMD_BITBLT_MULTI        0xC0009B00
 
+#define R500_VAP_INDEX_OFFSET           0x208c
+
+#define R500_GA_US_VECTOR_INDEX         0x4250
+#define R500_GA_US_VECTOR_DATA          0x4254
+
+#define R500_RS_IP_0                    0x4074
+#define R500_RS_INST_0                  0x4320
+
+#define R500_US_CONFIG                  0x4600
+
+#define R500_US_FC_CTRL                 0x4624
+#define R500_US_CODE_ADDR               0x4630
+
+#define R500_RB3D_COLOR_CLEAR_VALUE_AR  0x46c0
+#define R500_RB3D_CONSTANT_COLOR_AR     0x4ef8
+
 #endif /* _R300_REG_H */
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index f6f6c92bf771..e53158f0ecb5 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -2,6 +2,7 @@
 /*
  * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * Copyright 2007 Advanced Micro Devices, Inc.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -34,789 +35,13 @@
 #include "radeon_drv.h"
 #include "r300_reg.h"
 
+#include "radeon_microcode.h"
+
 #define RADEON_FIFO_DEBUG       0
 
 static int radeon_do_cleanup_cp(struct drm_device * dev);
 
-/* CP microcode (from ATI) */
-static const u32 R200_cp_microcode[][2] = {
-        {0x21007000, 0000000000},
-        {0x20007000, 0000000000},
-        {0x000000ab, 0x00000004},
-        {0x000000af, 0x00000004},
-        {0x66544a49, 0000000000},
-        {0x49494174, 0000000000},
-        {0x54517d83, 0000000000},
-        {0x498d8b64, 0000000000},
-        {0x49494949, 0000000000},
-        {0x49da493c, 0000000000},
-        {0x49989898, 0000000000},
-        {0xd34949d5, 0000000000},
-        {0x9dc90e11, 0000000000},
-        {0xce9b9b9b, 0000000000},
-        {0x000f0000, 0x00000016},
-        {0x352e232c, 0000000000},
-        {0x00000013, 0x00000004},
-        {0x000f0000, 0x00000016},
-        {0x352e272c, 0000000000},
-        {0x000f0001, 0x00000016},
-        {0x3239362f, 0000000000},
-        {0x000077ef, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x00000020, 0x0000001a},
-        {0x00004000, 0x0000001e},
-        {0x00061000, 0x00000002},
-        {0x00000020, 0x0000001a},
-        {0x00004000, 0x0000001e},
-        {0x00061000, 0x00000002},
-        {0x00000020, 0x0000001a},
-        {0x00004000, 0x0000001e},
-        {0x00000016, 0x00000004},
-        {0x0003802a, 0x00000002},
-        {0x040067e0, 0x00000002},
-        {0x00000016, 0x00000004},
-        {0x000077e0, 0x00000002},
-        {0x00065000, 0x00000002},
-        {0x000037e1, 0x00000002},
-        {0x040067e1, 0x00000006},
-        {0x000077e0, 0x00000002},
-        {0x000077e1, 0x00000002},
-        {0x000077e1, 0x00000006},
-        {0xffffffff, 0000000000},
-        {0x10000000, 0000000000},
-        {0x0003802a, 0x00000002},
-        {0x040067e0, 0x00000006},
-        {0x00007675, 0x00000002},
-        {0x00007676, 0x00000002},
-        {0x00007677, 0x00000002},
-        {0x00007678, 0x00000006},
-        {0x0003802b, 0x00000002},
-        {0x04002676, 0x00000002},
-        {0x00007677, 0x00000002},
-        {0x00007678, 0x00000006},
-        {0x0000002e, 0x00000018},
-        {0x0000002e, 0x00000018},
-        {0000000000, 0x00000006},
-        {0x0000002f, 0x00000018},
-        {0x0000002f, 0x00000018},
-        {0000000000, 0x00000006},
-        {0x01605000, 0x00000002},
-        {0x00065000, 0x00000002},
-        {0x00098000, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x64c0603d, 0x00000004},
-        {0x00080000, 0x00000016},
-        {0000000000, 0000000000},
-        {0x0400251d, 0x00000002},
-        {0x00007580, 0x00000002},
-        {0x00067581, 0x00000002},
-        {0x04002580, 0x00000002},
-        {0x00067581, 0x00000002},
-        {0x00000046, 0x00000004},
-        {0x00005000, 0000000000},
-        {0x00061000, 0x00000002},
-        {0x0000750e, 0x00000002},
-        {0x00019000, 0x00000002},
-        {0x00011055, 0x00000014},
-        {0x00000055, 0x00000012},
-        {0x0400250f, 0x00000002},
-        {0x0000504a, 0x00000004},
-        {0x00007565, 0x00000002},
-        {0x00007566, 0x00000002},
-        {0x00000051, 0x00000004},
-        {0x01e655b4, 0x00000002},
-        {0x4401b0dc, 0x00000002},
-        {0x01c110dc, 0x00000002},
-        {0x2666705d, 0x00000018},
-        {0x040c2565, 0x00000002},
-        {0x0000005d, 0x00000018},
-        {0x04002564, 0x00000002},
-        {0x00007566, 0x00000002},
-        {0x00000054, 0x00000004},
-        {0x00401060, 0x00000008},
-        {0x00101000, 0x00000002},
-        {0x000d80ff, 0x00000002},
-        {0x00800063, 0x00000008},
-        {0x000f9000, 0x00000002},
-        {0x000e00ff, 0x00000002},
-        {0000000000, 0x00000006},
-        {0x00000080, 0x00000018},
-        {0x00000054, 0x00000004},
-        {0x00007576, 0x00000002},
-        {0x00065000, 0x00000002},
-        {0x00009000, 0x00000002},
-        {0x00041000, 0x00000002},
-        {0x0c00350e, 0x00000002},
-        {0x00049000, 0x00000002},
-        {0x00051000, 0x00000002},
-        {0x01e785f8, 0x00000002},
-        {0x00200000, 0x00000002},
-        {0x00600073, 0x0000000c},
-        {0x00007563, 0x00000002},
-        {0x006075f0, 0x00000021},
-        {0x20007068, 0x00000004},
-        {0x00005068, 0x00000004},
-        {0x00007576, 0x00000002},
-        {0x00007577, 0x00000002},
-        {0x0000750e, 0x00000002},
-        {0x0000750f, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00600076, 0x0000000c},
-        {0x006075f0, 0x00000021},
-        {0x000075f8, 0x00000002},
-        {0x00000076, 0x00000004},
-        {0x000a750e, 0x00000002},
-        {0x0020750f, 0x00000002},
-        {0x00600079, 0x00000004},
-        {0x00007570, 0x00000002},
-        {0x00007571, 0x00000002},
-        {0x00007572, 0x00000006},
-        {0x00005000, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00007568, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x00000084, 0x0000000c},
-        {0x00058000, 0x00000002},
-        {0x0c607562, 0x00000002},
-        {0x00000086, 0x00000004},
-        {0x00600085, 0x00000004},
-        {0x400070dd, 0000000000},
-        {0x000380dd, 0x00000002},
-        {0x00000093, 0x0000001c},
-        {0x00065095, 0x00000018},
-        {0x040025bb, 0x00000002},
-        {0x00061096, 0x00000018},
-        {0x040075bc, 0000000000},
-        {0x000075bb, 0x00000002},
-        {0x000075bc, 0000000000},
-        {0x00090000, 0x00000006},
-        {0x00090000, 0x00000002},
-        {0x000d8002, 0x00000006},
-        {0x00005000, 0x00000002},
-        {0x00007821, 0x00000002},
-        {0x00007800, 0000000000},
-        {0x00007821, 0x00000002},
-        {0x00007800, 0000000000},
-        {0x01665000, 0x00000002},
-        {0x000a0000, 0x00000002},
-        {0x000671cc, 0x00000002},
-        {0x0286f1cd, 0x00000002},
-        {0x000000a3, 0x00000010},
-        {0x21007000, 0000000000},
-        {0x000000aa, 0x0000001c},
-        {0x00065000, 0x00000002},
-        {0x000a0000, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x000b0000, 0x00000002},
-        {0x38067000, 0x00000002},
-        {0x000a00a6, 0x00000004},
-        {0x20007000, 0000000000},
-        {0x01200000, 0x00000002},
-        {0x20077000, 0x00000002},
-        {0x01200000, 0x00000002},
-        {0x20007000, 0000000000},
-        {0x00061000, 0x00000002},
-        {0x0120751b, 0x00000002},
-        {0x8040750a, 0x00000002},
-        {0x8040750b, 0x00000002},
-        {0x00110000, 0x00000002},
-        {0x000380dd, 0x00000002},
-        {0x000000bd, 0x0000001c},
-        {0x00061096, 0x00000018},
-        {0x844075bd, 0x00000002},
-        {0x00061095, 0x00000018},
-        {0x840075bb, 0x00000002},
-        {0x00061096, 0x00000018},
-        {0x844075bc, 0x00000002},
-        {0x000000c0, 0x00000004},
-        {0x804075bd, 0x00000002},
-        {0x800075bb, 0x00000002},
-        {0x804075bc, 0x00000002},
-        {0x00108000, 0x00000002},
-        {0x01400000, 0x00000002},
-        {0x006000c4, 0x0000000c},
-        {0x20c07000, 0x00000020},
-        {0x000000c6, 0x00000012},
-        {0x00800000, 0x00000006},
-        {0x0080751d, 0x00000006},
-        {0x000025bb, 0x00000002},
-        {0x000040c0, 0x00000004},
-        {0x0000775c, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00661000, 0x00000002},
-        {0x0460275d, 0x00000020},
-        {0x00004000, 0000000000},
-        {0x00007999, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00661000, 0x00000002},
-        {0x0460299b, 0x00000020},
-        {0x00004000, 0000000000},
-        {0x01e00830, 0x00000002},
-        {0x21007000, 0000000000},
-        {0x00005000, 0x00000002},
-        {0x00038042, 0x00000002},
-        {0x040025e0, 0x00000002},
-        {0x000075e1, 0000000000},
-        {0x00000001, 0000000000},
-        {0x000380d9, 0x00000002},
-        {0x04007394, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-};
-
-static const u32 radeon_cp_microcode[][2] = {
-        {0x21007000, 0000000000},
-        {0x20007000, 0000000000},
-        {0x000000b4, 0x00000004},
-        {0x000000b8, 0x00000004},
-        {0x6f5b4d4c, 0000000000},
-        {0x4c4c427f, 0000000000},
-        {0x5b568a92, 0000000000},
-        {0x4ca09c6d, 0000000000},
-        {0xad4c4c4c, 0000000000},
-        {0x4ce1af3d, 0000000000},
-        {0xd8afafaf, 0000000000},
-        {0xd64c4cdc, 0000000000},
-        {0x4cd10d10, 0000000000},
-        {0x000f0000, 0x00000016},
-        {0x362f242d, 0000000000},
-        {0x00000012, 0x00000004},
-        {0x000f0000, 0x00000016},
-        {0x362f282d, 0000000000},
-        {0x000380e7, 0x00000002},
-        {0x04002c97, 0x00000002},
-        {0x000f0001, 0x00000016},
-        {0x333a3730, 0000000000},
-        {0x000077ef, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x00000021, 0x0000001a},
-        {0x00004000, 0x0000001e},
-        {0x00061000, 0x00000002},
-        {0x00000021, 0x0000001a},
-        {0x00004000, 0x0000001e},
-        {0x00061000, 0x00000002},
-        {0x00000021, 0x0000001a},
-        {0x00004000, 0x0000001e},
-        {0x00000017, 0x00000004},
-        {0x0003802b, 0x00000002},
-        {0x040067e0, 0x00000002},
-        {0x00000017, 0x00000004},
-        {0x000077e0, 0x00000002},
-        {0x00065000, 0x00000002},
-        {0x000037e1, 0x00000002},
-        {0x040067e1, 0x00000006},
-        {0x000077e0, 0x00000002},
-        {0x000077e1, 0x00000002},
-        {0x000077e1, 0x00000006},
-        {0xffffffff, 0000000000},
-        {0x10000000, 0000000000},
-        {0x0003802b, 0x00000002},
-        {0x040067e0, 0x00000006},
-        {0x00007675, 0x00000002},
-        {0x00007676, 0x00000002},
-        {0x00007677, 0x00000002},
-        {0x00007678, 0x00000006},
-        {0x0003802c, 0x00000002},
-        {0x04002676, 0x00000002},
-        {0x00007677, 0x00000002},
-        {0x00007678, 0x00000006},
-        {0x0000002f, 0x00000018},
-        {0x0000002f, 0x00000018},
-        {0000000000, 0x00000006},
-        {0x00000030, 0x00000018},
-        {0x00000030, 0x00000018},
-        {0000000000, 0x00000006},
-        {0x01605000, 0x00000002},
-        {0x00065000, 0x00000002},
-        {0x00098000, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x64c0603e, 0x00000004},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00080000, 0x00000016},
-        {0000000000, 0000000000},
-        {0x0400251d, 0x00000002},
-        {0x00007580, 0x00000002},
-        {0x00067581, 0x00000002},
-        {0x04002580, 0x00000002},
-        {0x00067581, 0x00000002},
-        {0x00000049, 0x00000004},
-        {0x00005000, 0000000000},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x0000750e, 0x00000002},
-        {0x00019000, 0x00000002},
-        {0x00011055, 0x00000014},
-        {0x00000055, 0x00000012},
-        {0x0400250f, 0x00000002},
-        {0x0000504f, 0x00000004},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00007565, 0x00000002},
-        {0x00007566, 0x00000002},
-        {0x00000058, 0x00000004},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x01e655b4, 0x00000002},
-        {0x4401b0e4, 0x00000002},
-        {0x01c110e4, 0x00000002},
-        {0x26667066, 0x00000018},
-        {0x040c2565, 0x00000002},
-        {0x00000066, 0x00000018},
-        {0x04002564, 0x00000002},
-        {0x00007566, 0x00000002},
-        {0x0000005d, 0x00000004},
-        {0x00401069, 0x00000008},
-        {0x00101000, 0x00000002},
-        {0x000d80ff, 0x00000002},
-        {0x0080006c, 0x00000008},
-        {0x000f9000, 0x00000002},
-        {0x000e00ff, 0x00000002},
-        {0000000000, 0x00000006},
-        {0x0000008f, 0x00000018},
-        {0x0000005b, 0x00000004},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00007576, 0x00000002},
-        {0x00065000, 0x00000002},
-        {0x00009000, 0x00000002},
-        {0x00041000, 0x00000002},
-        {0x0c00350e, 0x00000002},
-        {0x00049000, 0x00000002},
-        {0x00051000, 0x00000002},
-        {0x01e785f8, 0x00000002},
-        {0x00200000, 0x00000002},
-        {0x0060007e, 0x0000000c},
-        {0x00007563, 0x00000002},
-        {0x006075f0, 0x00000021},
-        {0x20007073, 0x00000004},
-        {0x00005073, 0x00000004},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00007576, 0x00000002},
-        {0x00007577, 0x00000002},
-        {0x0000750e, 0x00000002},
-        {0x0000750f, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00600083, 0x0000000c},
-        {0x006075f0, 0x00000021},
-        {0x000075f8, 0x00000002},
-        {0x00000083, 0x00000004},
-        {0x000a750e, 0x00000002},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x0020750f, 0x00000002},
-        {0x00600086, 0x00000004},
-        {0x00007570, 0x00000002},
-        {0x00007571, 0x00000002},
-        {0x00007572, 0x00000006},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00005000, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00007568, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x00000095, 0x0000000c},
-        {0x00058000, 0x00000002},
-        {0x0c607562, 0x00000002},
-        {0x00000097, 0x00000004},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x00600096, 0x00000004},
-        {0x400070e5, 0000000000},
-        {0x000380e6, 0x00000002},
-        {0x040025c5, 0x00000002},
-        {0x000380e5, 0x00000002},
-        {0x000000a8, 0x0000001c},
-        {0x000650aa, 0x00000018},
-        {0x040025bb, 0x00000002},
-        {0x000610ab, 0x00000018},
-        {0x040075bc, 0000000000},
-        {0x000075bb, 0x00000002},
-        {0x000075bc, 0000000000},
-        {0x00090000, 0x00000006},
-        {0x00090000, 0x00000002},
-        {0x000d8002, 0x00000006},
-        {0x00007832, 0x00000002},
-        {0x00005000, 0x00000002},
-        {0x000380e7, 0x00000002},
-        {0x04002c97, 0x00000002},
-        {0x00007820, 0x00000002},
-        {0x00007821, 0x00000002},
-        {0x00007800, 0000000000},
-        {0x01200000, 0x00000002},
-        {0x20077000, 0x00000002},
-        {0x01200000, 0x00000002},
-        {0x20007000, 0x00000002},
-        {0x00061000, 0x00000002},
-        {0x0120751b, 0x00000002},
-        {0x8040750a, 0x00000002},
-        {0x8040750b, 0x00000002},
-        {0x00110000, 0x00000002},
-        {0x000380e5, 0x00000002},
-        {0x000000c6, 0x0000001c},
-        {0x000610ab, 0x00000018},
-        {0x844075bd, 0x00000002},
-        {0x000610aa, 0x00000018},
-        {0x840075bb, 0x00000002},
-        {0x000610ab, 0x00000018},
-        {0x844075bc, 0x00000002},
-        {0x000000c9, 0x00000004},
-        {0x804075bd, 0x00000002},
-        {0x800075bb, 0x00000002},
-        {0x804075bc, 0x00000002},
-        {0x00108000, 0x00000002},
-        {0x01400000, 0x00000002},
-        {0x006000cd, 0x0000000c},
-        {0x20c07000, 0x00000020},
-        {0x000000cf, 0x00000012},
-        {0x00800000, 0x00000006},
-        {0x0080751d, 0x00000006},
-        {0000000000, 0000000000},
-        {0x0000775c, 0x00000002},
-        {0x00a05000, 0x00000002},
-        {0x00661000, 0x00000002},
-        {0x0460275d, 0x00000020},
-        {0x00004000, 0000000000},
-        {0x01e00830, 0x00000002},
-        {0x21007000, 0000000000},
-        {0x6464614d, 0000000000},
-        {0x69687420, 0000000000},
-        {0x00000073, 0000000000},
-        {0000000000, 0000000000},
-        {0x00005000, 0x00000002},
-        {0x000380d0, 0x00000002},
-        {0x040025e0, 0x00000002},
-        {0x000075e1, 0000000000},
-        {0x00000001, 0000000000},
-        {0x000380e0, 0x00000002},
-        {0x04002394, 0x00000002},
-        {0x00005000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0x00000008, 0000000000},
-        {0x00000004, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-};
-
-static const u32 R300_cp_microcode[][2] = {
-        {0x4200e000, 0000000000},
-        {0x4000e000, 0000000000},
-        {0x000000af, 0x00000008},
-        {0x000000b3, 0x00000008},
-        {0x6c5a504f, 0000000000},
-        {0x4f4f497a, 0000000000},
-        {0x5a578288, 0000000000},
-        {0x4f91906a, 0000000000},
-        {0x4f4f4f4f, 0000000000},
-        {0x4fe24f44, 0000000000},
-        {0x4f9c9c9c, 0000000000},
-        {0xdc4f4fde, 0000000000},
-        {0xa1cd4f4f, 0000000000},
-        {0xd29d9d9d, 0000000000},
-        {0x4f0f9fd7, 0000000000},
-        {0x000ca000, 0x00000004},
-        {0x000d0012, 0x00000038},
-        {0x0000e8b4, 0x00000004},
-        {0x000d0014, 0x00000038},
-        {0x0000e8b6, 0x00000004},
-        {0x000d0016, 0x00000038},
-        {0x0000e854, 0x00000004},
-        {0x000d0018, 0x00000038},
-        {0x0000e855, 0x00000004},
-        {0x000d001a, 0x00000038},
-        {0x0000e856, 0x00000004},
-        {0x000d001c, 0x00000038},
-        {0x0000e857, 0x00000004},
-        {0x000d001e, 0x00000038},
-        {0x0000e824, 0x00000004},
-        {0x000d0020, 0x00000038},
-        {0x0000e825, 0x00000004},
-        {0x000d0022, 0x00000038},
-        {0x0000e830, 0x00000004},
-        {0x000d0024, 0x00000038},
-        {0x0000f0c0, 0x00000004},
-        {0x000d0026, 0x00000038},
-        {0x0000f0c1, 0x00000004},
-        {0x000d0028, 0x00000038},
-        {0x0000f041, 0x00000004},
-        {0x000d002a, 0x00000038},
-        {0x0000f184, 0x00000004},
-        {0x000d002c, 0x00000038},
-        {0x0000f185, 0x00000004},
-        {0x000d002e, 0x00000038},
-        {0x0000f186, 0x00000004},
-        {0x000d0030, 0x00000038},
-        {0x0000f187, 0x00000004},
-        {0x000d0032, 0x00000038},
-        {0x0000f180, 0x00000004},
-        {0x000d0034, 0x00000038},
-        {0x0000f393, 0x00000004},
-        {0x000d0036, 0x00000038},
-        {0x0000f38a, 0x00000004},
-        {0x000d0038, 0x00000038},
-        {0x0000f38e, 0x00000004},
-        {0x0000e821, 0x00000004},
-        {0x0140a000, 0x00000004},
-        {0x00000043, 0x00000018},
-        {0x00cce800, 0x00000004},
-        {0x001b0001, 0x00000004},
-        {0x08004800, 0x00000004},
-        {0x001b0001, 0x00000004},
-        {0x08004800, 0x00000004},
-        {0x001b0001, 0x00000004},
-        {0x08004800, 0x00000004},
-        {0x0000003a, 0x00000008},
-        {0x0000a000, 0000000000},
-        {0x02c0a000, 0x00000004},
-        {0x000ca000, 0x00000004},
-        {0x00130000, 0x00000004},
-        {0x000c2000, 0x00000004},
-        {0xc980c045, 0x00000008},
-        {0x2000451d, 0x00000004},
-        {0x0000e580, 0x00000004},
-        {0x000ce581, 0x00000004},
-        {0x08004580, 0x00000004},
-        {0x000ce581, 0x00000004},
-        {0x0000004c, 0x00000008},
-        {0x0000a000, 0000000000},
-        {0x000c2000, 0x00000004},
-        {0x0000e50e, 0x00000004},
-        {0x00032000, 0x00000004},
-        {0x00022056, 0x00000028},
-        {0x00000056, 0x00000024},
-        {0x0800450f, 0x00000004},
-        {0x0000a050, 0x00000008},
-        {0x0000e565, 0x00000004},
-        {0x0000e566, 0x00000004},
-        {0x00000057, 0x00000008},
-        {0x03cca5b4, 0x00000004},
-        {0x05432000, 0x00000004},
-        {0x00022000, 0x00000004},
-        {0x4ccce063, 0x00000030},
-        {0x08274565, 0x00000004},
-        {0x00000063, 0x00000030},
-        {0x08004564, 0x00000004},
-        {0x0000e566, 0x00000004},
-        {0x0000005a, 0x00000008},
-        {0x00802066, 0x00000010},
-        {0x00202000, 0x00000004},
-        {0x001b00ff, 0x00000004},
-        {0x01000069, 0x00000010},
-        {0x001f2000, 0x00000004},
-        {0x001c00ff, 0x00000004},
-        {0000000000, 0x0000000c},
-        {0x00000085, 0x00000030},
-        {0x0000005a, 0x00000008},
-        {0x0000e576, 0x00000004},
-        {0x000ca000, 0x00000004},
-        {0x00012000, 0x00000004},
-        {0x00082000, 0x00000004},
-        {0x1800650e, 0x00000004},
-        {0x00092000, 0x00000004},
-        {0x000a2000, 0x00000004},
-        {0x000f0000, 0x00000004},
-        {0x00400000, 0x00000004},
-        {0x00000079, 0x00000018},
-        {0x0000e563, 0x00000004},
-        {0x00c0e5f9, 0x000000c2},
-        {0x0000006e, 0x00000008},
-        {0x0000a06e, 0x00000008},
-        {0x0000e576, 0x00000004},
-        {0x0000e577, 0x00000004},
-        {0x0000e50e, 0x00000004},
-        {0x0000e50f, 0x00000004},
-        {0x0140a000, 0x00000004},
-        {0x0000007c, 0x00000018},
-        {0x00c0e5f9, 0x000000c2},
-        {0x0000007c, 0x00000008},
-        {0x0014e50e, 0x00000004},
-        {0x0040e50f, 0x00000004},
-        {0x00c0007f, 0x00000008},
-        {0x0000e570, 0x00000004},
-        {0x0000e571, 0x00000004},
-        {0x0000e572, 0x0000000c},
-        {0x0000a000, 0x00000004},
-        {0x0140a000, 0x00000004},
-        {0x0000e568, 0x00000004},
-        {0x000c2000, 0x00000004},
-        {0x00000089, 0x00000018},
-        {0x000b0000, 0x00000004},
-        {0x18c0e562, 0x00000004},
-        {0x0000008b, 0x00000008},
-        {0x00c0008a, 0x00000008},
-        {0x000700e4, 0x00000004},
-        {0x00000097, 0x00000038},
-        {0x000ca099, 0x00000030},
-        {0x080045bb, 0x00000004},
-        {0x000c209a, 0x00000030},
-        {0x0800e5bc, 0000000000},
-        {0x0000e5bb, 0x00000004},
-        {0x0000e5bc, 0000000000},
-        {0x00120000, 0x0000000c},
-        {0x00120000, 0x00000004},
-        {0x001b0002, 0x0000000c},
-        {0x0000a000, 0x00000004},
-        {0x0000e821, 0x00000004},
-        {0x0000e800, 0000000000},
-        {0x0000e821, 0x00000004},
-        {0x0000e82e, 0000000000},
-        {0x02cca000, 0x00000004},
-        {0x00140000, 0x00000004},
-        {0x000ce1cc, 0x00000004},
-        {0x050de1cd, 0x00000004},
-        {0x000000a7, 0x00000020},
-        {0x4200e000, 0000000000},
-        {0x000000ae, 0x00000038},
-        {0x000ca000, 0x00000004},
-        {0x00140000, 0x00000004},
-        {0x000c2000, 0x00000004},
-        {0x00160000, 0x00000004},
-        {0x700ce000, 0x00000004},
-        {0x001400aa, 0x00000008},
-        {0x4000e000, 0000000000},
-        {0x02400000, 0x00000004},
-        {0x400ee000, 0x00000004},
-        {0x02400000, 0x00000004},
-        {0x4000e000, 0000000000},
-        {0x000c2000, 0x00000004},
-        {0x0240e51b, 0x00000004},
-        {0x0080e50a, 0x00000005},
-        {0x0080e50b, 0x00000005},
-        {0x00220000, 0x00000004},
-        {0x000700e4, 0x00000004},
-        {0x000000c1, 0x00000038},
-        {0x000c209a, 0x00000030},
-        {0x0880e5bd, 0x00000005},
-        {0x000c2099, 0x00000030},
-        {0x0800e5bb, 0x00000005},
-        {0x000c209a, 0x00000030},
-        {0x0880e5bc, 0x00000005},
-        {0x000000c4, 0x00000008},
-        {0x0080e5bd, 0x00000005},
-        {0x0000e5bb, 0x00000005},
-        {0x0080e5bc, 0x00000005},
-        {0x00210000, 0x00000004},
-        {0x02800000, 0x00000004},
-        {0x00c000c8, 0x00000018},
-        {0x4180e000, 0x00000040},
-        {0x000000ca, 0x00000024},
-        {0x01000000, 0x0000000c},
-        {0x0100e51d, 0x0000000c},
-        {0x000045bb, 0x00000004},
-        {0x000080c4, 0x00000008},
-        {0x0000f3ce, 0x00000004},
-        {0x0140a000, 0x00000004},
-        {0x00cc2000, 0x00000004},
-        {0x08c053cf, 0x00000040},
-        {0x00008000, 0000000000},
-        {0x0000f3d2, 0x00000004},
-        {0x0140a000, 0x00000004},
-        {0x00cc2000, 0x00000004},
-        {0x08c053d3, 0x00000040},
-        {0x00008000, 0000000000},
-        {0x0000f39d, 0x00000004},
-        {0x0140a000, 0x00000004},
-        {0x00cc2000, 0x00000004},
-        {0x08c0539e, 0x00000040},
-        {0x00008000, 0000000000},
-        {0x03c00830, 0x00000004},
-        {0x4200e000, 0000000000},
-        {0x0000a000, 0x00000004},
-        {0x200045e0, 0x00000004},
-        {0x0000e5e1, 0000000000},
-        {0x00000001, 0000000000},
-        {0x000700e1, 0x00000004},
-        {0x0800e394, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-        {0000000000, 0000000000},
-};
-
-static u32 RADEON_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 {
         u32 ret;
         RADEON_WRITE(R520_MC_IND_INDEX, 0x7f0000 | (addr & 0xff));
@@ -825,21 +50,41 @@ static u32 RADEON_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
         return ret;
 }
 
+static u32 RS480_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+{
+        u32 ret;
+        RADEON_WRITE(RS480_NB_MC_INDEX, addr & 0xff);
+        ret = RADEON_READ(RS480_NB_MC_DATA);
+        RADEON_WRITE(RS480_NB_MC_INDEX, 0xff);
+        return ret;
+}
+
 static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
 {
+        u32 ret;
         RADEON_WRITE(RS690_MC_INDEX, (addr & RS690_MC_INDEX_MASK));
-        return RADEON_READ(RS690_MC_DATA);
+        ret = RADEON_READ(RS690_MC_DATA);
+        RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_MASK);
+        return ret;
+}
+
+static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
+{
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+                return RS690_READ_MCIND(dev_priv, addr);
+        else
+                return RS480_READ_MCIND(dev_priv, addr);
 }
 
 u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
 {
 
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
-                return RADEON_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
+                return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
                 return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
-                return RADEON_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
+                return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
         else
                 return RADEON_READ(RADEON_MC_FB_LOCATION);
 }
@@ -847,11 +92,11 @@ u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
 static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
 {
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
-                RADEON_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
+                R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
                 RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
-                RADEON_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
+                R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
         else
                 RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc);
 }
@@ -859,15 +104,39 @@ static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
 static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
 {
         if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
-                RADEON_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
+                R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
                 RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
         else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
-                RADEON_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
+                R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
         else
                 RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);
 }
 
+static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
+{
+        u32 agp_base_hi = upper_32_bits(agp_base);
+        u32 agp_base_lo = agp_base & 0xffffffff;
+
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
+                R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
+                R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
+        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
+                RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
+                RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
+        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
+                R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);
+                R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);
+        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480) {
+                RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);
+                RADEON_WRITE(RS480_AGP_BASE_2, 0);
+        } else {
+                RADEON_WRITE(RADEON_AGP_BASE, agp_base_lo);
+                if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R200)
+                        RADEON_WRITE(RADEON_AGP_BASE_2, agp_base_hi);
+        }
+}
+
 static int RADEON_READ_PLL(struct drm_device * dev, int addr)
 {
         drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -882,15 +151,6 @@ static u32 RADEON_READ_PCIE(drm_radeon_private_t *dev_priv, int addr)
         return RADEON_READ(RADEON_PCIE_DATA);
 }
 
-static u32 RADEON_READ_IGPGART(drm_radeon_private_t *dev_priv, int addr)
-{
-        u32 ret;
-        RADEON_WRITE(RADEON_IGPGART_INDEX, addr & 0x7f);
-        ret = RADEON_READ(RADEON_IGPGART_DATA);
-        RADEON_WRITE(RADEON_IGPGART_INDEX, 0x7f);
-        return ret;
-}
-
 #if RADEON_FIFO_DEBUG
 static void radeon_status(drm_radeon_private_t * dev_priv)
 {
@@ -925,16 +185,36 @@ static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv)
 
         dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
-        tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT);
-        tmp |= RADEON_RB3D_DC_FLUSH_ALL;
-        RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp);
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) {
+                tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT);
+                tmp |= RADEON_RB3D_DC_FLUSH_ALL;
+                RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp);
 
-        for (i = 0; i < dev_priv->usec_timeout; i++) {
-                if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT)
-                      & RADEON_RB3D_DC_BUSY)) {
-                        return 0;
+                for (i = 0; i < dev_priv->usec_timeout; i++) {
+                        if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT)
+                              & RADEON_RB3D_DC_BUSY)) {
+                                return 0;
+                        }
+                        DRM_UDELAY(1);
+                }
+        } else {
+                /* 3D */
+                tmp = RADEON_READ(R300_RB3D_DSTCACHE_CTLSTAT);
+                tmp |= RADEON_RB3D_DC_FLUSH_ALL;
+                RADEON_WRITE(R300_RB3D_DSTCACHE_CTLSTAT, tmp);
+
+                /* 2D */
+                tmp = RADEON_READ(R300_DSTCACHE_CTLSTAT);
+                tmp |= RADEON_RB3D_DC_FLUSH_ALL;
+                RADEON_WRITE(R300_DSTCACHE_CTLSTAT, tmp);
+
+                for (i = 0; i < dev_priv->usec_timeout; i++) {
+                        if (!(RADEON_READ(R300_DSTCACHE_CTLSTAT)
+                          & RADEON_RB3D_DC_BUSY)) {
+                                return 0;
+                        }
+                        DRM_UDELAY(1);
                 }
-                DRM_UDELAY(1);
         }
 
 #if RADEON_FIFO_DEBUG
@@ -991,6 +271,50 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv)
         return -EBUSY;
 }
 
+static void radeon_init_pipes(drm_radeon_private_t *dev_priv)
+{
+        uint32_t gb_tile_config, gb_pipe_sel = 0;
+
+        /* RS4xx/RS6xx/R4xx/R5xx */
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R420) {
+                gb_pipe_sel = RADEON_READ(R400_GB_PIPE_SELECT);
+                dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1;
+        } else {
+                /* R3xx */
+                if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
+                    ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) {
+                        dev_priv->num_gb_pipes = 2;
+                } else {
+                        /* R3Vxx */
+                        dev_priv->num_gb_pipes = 1;
+                }
+        }
+        DRM_INFO("Num pipes: %d\n", dev_priv->num_gb_pipes);
+
+        gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 /*| R300_SUBPIXEL_1_16*/);
+
+        switch (dev_priv->num_gb_pipes) {
+        case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break;
+        case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break;
+        case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break;
+        default:
+        case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
+        }
+
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
+                RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4));
+                RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1));
+        }
+        RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config);
+        radeon_do_wait_for_idle(dev_priv);
+        RADEON_WRITE(R300_DST_PIPE_CONFIG, RADEON_READ(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
+        RADEON_WRITE(R300_RB2D_DSTCACHE_MODE, (RADEON_READ(R300_RB2D_DSTCACHE_MODE) |
+                                               R300_DC_AUTOFLUSH_ENABLE |
+                                               R300_DC_DC_DISABLE_IGNORE_PE));
+
+
+}
+
 /* ================================================================
  * CP control, initialization
  */
@@ -1004,8 +328,22 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
         radeon_do_wait_for_idle(dev_priv);
 
         RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
-
-        if (dev_priv->microcode_version == UCODE_R200) {
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) ||
+            ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) {
+                DRM_INFO("Loading R100 Microcode\n");
+                for (i = 0; i < 256; i++) {
+                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+                                     R100_cp_microcode[i][1]);
+                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+                                     R100_cp_microcode[i][0]);
+                }
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) {
                 DRM_INFO("Loading R200 Microcode\n");
                 for (i = 0; i < 256; i++) {
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
@@ -1013,7 +351,11 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
                                      R200_cp_microcode[i][0]);
                 }
-        } else if (dev_priv->microcode_version == UCODE_R300) {
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
                 DRM_INFO("Loading R300 Microcode\n");
                 for (i = 0; i < 256; i++) {
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
@@ -1021,12 +363,35 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
                                      R300_cp_microcode[i][0]);
                 }
-        } else {
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) {
+                DRM_INFO("Loading R400 Microcode\n");
                 for (i = 0; i < 256; i++) {
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
-                                     radeon_cp_microcode[i][1]);
+                                     R420_cp_microcode[i][1]);
                         RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
-                                     radeon_cp_microcode[i][0]);
+                                     R420_cp_microcode[i][0]);
+                }
+        } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
+                DRM_INFO("Loading RS690 Microcode\n");
+                for (i = 0; i < 256; i++) {
+                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+                                     RS690_cp_microcode[i][1]);
+                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+                                     RS690_cp_microcode[i][0]);
+                }
+        } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R580) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) ||
+                   ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) {
+                DRM_INFO("Loading R500 Microcode\n");
+                for (i = 0; i < 256; i++) {
+                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+                                     R520_cp_microcode[i][1]);
+                        RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+                                     R520_cp_microcode[i][0]);
                 }
         }
 }
@@ -1121,12 +486,13 @@ static void radeon_do_cp_stop(drm_radeon_private_t * dev_priv)
 static int radeon_do_engine_reset(struct drm_device * dev)
 {
         drm_radeon_private_t *dev_priv = dev->dev_private;
-        u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset;
+        u32 clock_cntl_index = 0, mclk_cntl = 0, rbbm_soft_reset;
         DRM_DEBUG("\n");
 
         radeon_do_pixcache_flush(dev_priv);
 
-        if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV515) {
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) {
+                /* may need something similar for newer chips */
                 clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX);
                 mclk_cntl = RADEON_READ_PLL(dev, RADEON_MCLK_CNTL);
 
@@ -1137,33 +503,39 @@ static int radeon_do_engine_reset(struct drm_device * dev)
                                                     RADEON_FORCEON_YCLKB |
                                                     RADEON_FORCEON_MC |
                                                     RADEON_FORCEON_AIC));
+        }
 
-                rbbm_soft_reset = RADEON_READ(RADEON_RBBM_SOFT_RESET);
-
-                RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
-                                                      RADEON_SOFT_RESET_CP |
-                                                      RADEON_SOFT_RESET_HI |
-                                                      RADEON_SOFT_RESET_SE |
-                                                      RADEON_SOFT_RESET_RE |
-                                                      RADEON_SOFT_RESET_PP |
-                                                      RADEON_SOFT_RESET_E2 |
-                                                      RADEON_SOFT_RESET_RB));
-                RADEON_READ(RADEON_RBBM_SOFT_RESET);
-                RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset &
-                                                      ~(RADEON_SOFT_RESET_CP |
-                                                        RADEON_SOFT_RESET_HI |
-                                                        RADEON_SOFT_RESET_SE |
-                                                        RADEON_SOFT_RESET_RE |
-                                                        RADEON_SOFT_RESET_PP |
-                                                        RADEON_SOFT_RESET_E2 |
-                                                        RADEON_SOFT_RESET_RB)));
-                RADEON_READ(RADEON_RBBM_SOFT_RESET);
-
+        rbbm_soft_reset = RADEON_READ(RADEON_RBBM_SOFT_RESET);
+
+        RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
+                                              RADEON_SOFT_RESET_CP |
+                                              RADEON_SOFT_RESET_HI |
+                                              RADEON_SOFT_RESET_SE |
+                                              RADEON_SOFT_RESET_RE |
+                                              RADEON_SOFT_RESET_PP |
+                                              RADEON_SOFT_RESET_E2 |
+                                              RADEON_SOFT_RESET_RB));
+        RADEON_READ(RADEON_RBBM_SOFT_RESET);
+        RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset &
+                                              ~(RADEON_SOFT_RESET_CP |
+                                                RADEON_SOFT_RESET_HI |
+                                                RADEON_SOFT_RESET_SE |
+                                                RADEON_SOFT_RESET_RE |
+                                                RADEON_SOFT_RESET_PP |
+                                                RADEON_SOFT_RESET_E2 |
+                                                RADEON_SOFT_RESET_RB)));
+        RADEON_READ(RADEON_RBBM_SOFT_RESET);
+
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV410) {
                 RADEON_WRITE_PLL(RADEON_MCLK_CNTL, mclk_cntl);
                 RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
                 RADEON_WRITE(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset);
         }
 
+        /* setup the raster pipes */
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300)
+            radeon_init_pipes(dev_priv);
+
         /* Reset the CP ring */
         radeon_do_cp_reset(dev_priv);
 
@@ -1194,7 +566,8 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
 
 #if __OS_HAS_AGP
         if (dev_priv->flags & RADEON_IS_AGP) {
-                RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);
+                radeon_write_agp_base(dev_priv, dev->agp->base);
+
                 radeon_write_agp_location(dev_priv,
                              (((dev_priv->gart_vm_start - 1 +
                                 dev_priv->gart_size) & 0xffff0000) |
@@ -1339,102 +712,70 @@ static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
 /* Enable or disable IGP GART on the chip */
 static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
 {
-        u32 temp, tmp;
-
-        tmp = RADEON_READ(RADEON_AIC_CNTL);
-        if (on) {
-                DRM_DEBUG("programming igpgart %08X %08lX %08X\n",
-                         dev_priv->gart_vm_start,
-                         (long)dev_priv->gart_info.bus_addr,
-                         dev_priv->gart_size);
-
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_UNK_18, 0x1000);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_ENABLE, 0x1);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_CTRL, 0x42040800);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_BASE_ADDR,
-                                     dev_priv->gart_info.bus_addr);
-
-                temp = RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_UNK_39);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_UNK_39, temp);
-
-                RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev_priv->gart_vm_start);
-                dev_priv->gart_size = 32*1024*1024;
-                radeon_write_agp_location(dev_priv,
-                             (((dev_priv->gart_vm_start - 1 +
-                               dev_priv->gart_size) & 0xffff0000) |
-                             (dev_priv->gart_vm_start >> 16)));
-
-                temp = RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_ENABLE);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_ENABLE, temp);
-
-                RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x1);
-                RADEON_READ_IGPGART(dev_priv, RADEON_IGPGART_FLUSH);
-                RADEON_WRITE_IGPGART(RADEON_IGPGART_FLUSH, 0x0);
-       }
-}
-
-/* Enable or disable RS690 GART on the chip */
-static void radeon_set_rs690gart(drm_radeon_private_t *dev_priv, int on)
-{
         u32 temp;
 
         if (on) {
-                DRM_DEBUG("programming rs690 gart %08X %08lX %08X\n",
+                DRM_DEBUG("programming igp gart %08X %08lX %08X\n",
                           dev_priv->gart_vm_start,
                           (long)dev_priv->gart_info.bus_addr,
                           dev_priv->gart_size);
 
-                temp = RS690_READ_MCIND(dev_priv, RS690_MC_MISC_CNTL);
-                RS690_WRITE_MCIND(RS690_MC_MISC_CNTL, 0x5000);
+                temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL);
+                if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
+                        IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN |
+                                                             RS690_BLOCK_GFX_D3_EN));
+                else
+                        IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, RS480_GART_INDEX_REG_EN);
 
-                RS690_WRITE_MCIND(RS690_MC_AGP_SIZE,
-                                  RS690_MC_GART_EN | RS690_MC_AGP_SIZE_32MB);
+                IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN |
+                                                               RS480_VA_SIZE_32MB));
 
-                temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_FEATURE_ID);
-                RS690_WRITE_MCIND(RS690_MC_GART_FEATURE_ID, 0x42040800);
+                temp = IGP_READ_MCIND(dev_priv, RS480_GART_FEATURE_ID);
+                IGP_WRITE_MCIND(RS480_GART_FEATURE_ID, (RS480_HANG_EN |
+                                                        RS480_TLB_ENABLE |
+                                                        RS480_GTW_LAC_EN |
+                                                        RS480_1LEVEL_GART));
 
-                RS690_WRITE_MCIND(RS690_MC_GART_BASE,
-                                  dev_priv->gart_info.bus_addr);
+                temp = dev_priv->gart_info.bus_addr & 0xfffff000;
+                temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4;
+                IGP_WRITE_MCIND(RS480_GART_BASE, temp);
 
-                temp = RS690_READ_MCIND(dev_priv, RS690_MC_AGP_MODE_CONTROL);
-                RS690_WRITE_MCIND(RS690_MC_AGP_MODE_CONTROL, 0x01400000);
+                temp = IGP_READ_MCIND(dev_priv, RS480_AGP_MODE_CNTL);
+                IGP_WRITE_MCIND(RS480_AGP_MODE_CNTL, ((1 << RS480_REQ_TYPE_SNOOP_SHIFT) |
+                                                      RS480_REQ_TYPE_SNOOP_DIS));
 
-                RS690_WRITE_MCIND(RS690_MC_AGP_BASE,
-                                  (unsigned int)dev_priv->gart_vm_start);
+                radeon_write_agp_base(dev_priv, dev_priv->gart_vm_start);
 
                 dev_priv->gart_size = 32*1024*1024;
                 temp = (((dev_priv->gart_vm_start - 1 + dev_priv->gart_size) &
                          0xffff0000) | (dev_priv->gart_vm_start >> 16));
 
-                RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, temp);
+                radeon_write_agp_location(dev_priv, temp);
 
-                temp = RS690_READ_MCIND(dev_priv, RS690_MC_AGP_SIZE);
-                RS690_WRITE_MCIND(RS690_MC_AGP_SIZE,
-                                  RS690_MC_GART_EN | RS690_MC_AGP_SIZE_32MB);
+                temp = IGP_READ_MCIND(dev_priv, RS480_AGP_ADDRESS_SPACE_SIZE);
+                IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, (RS480_GART_EN |
+                                                               RS480_VA_SIZE_32MB));
 
                 do {
-                        temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_CACHE_CNTL);
-                        if ((temp & RS690_MC_GART_CLEAR_STATUS) ==
-                            RS690_MC_GART_CLEAR_DONE)
+                        temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL);
+                        if ((temp & RS480_GART_CACHE_INVALIDATE) == 0)
                                 break;
                         DRM_UDELAY(1);
                 } while (1);
 
-                RS690_WRITE_MCIND(RS690_MC_GART_CACHE_CNTL,
-                                  RS690_MC_GART_CC_CLEAR);
+                IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL,
+                                RS480_GART_CACHE_INVALIDATE);
+
                 do {
-                        temp = RS690_READ_MCIND(dev_priv, RS690_MC_GART_CACHE_CNTL);
-                        if ((temp & RS690_MC_GART_CLEAR_STATUS) ==
-                                   RS690_MC_GART_CLEAR_DONE)
+                        temp = IGP_READ_MCIND(dev_priv, RS480_GART_CACHE_CNTRL);
+                        if ((temp & RS480_GART_CACHE_INVALIDATE) == 0)
                                 break;
                         DRM_UDELAY(1);
                 } while (1);
 
-                RS690_WRITE_MCIND(RS690_MC_GART_CACHE_CNTL,
-                                  RS690_MC_GART_CC_NO_CHANGE);
+                IGP_WRITE_MCIND(RS480_GART_CACHE_CNTRL, 0);
         } else {
-                RS690_WRITE_MCIND(RS690_MC_AGP_SIZE, RS690_MC_GART_DIS);
+                IGP_WRITE_MCIND(RS480_AGP_ADDRESS_SPACE_SIZE, 0);
         }
 }
 
@@ -1472,12 +813,8 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
 {
         u32 tmp;
 
-        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
-                radeon_set_rs690gart(dev_priv, on);
-                return;
-        }
-
-        if (dev_priv->flags & RADEON_IS_IGPGART) {
+        if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
+            (dev_priv->flags & RADEON_IS_IGPGART)) {
                 radeon_set_igpgart(dev_priv, on);
                 return;
         }
@@ -1951,6 +1288,7 @@ static int radeon_do_resume_cp(struct drm_device * dev)
         radeon_cp_init_ring_buffer(dev, dev_priv);
 
         radeon_do_engine_reset(dev);
+        radeon_enable_interrupt(dev);
 
         DRM_DEBUG("radeon_do_resume_cp() complete\n");
 
diff --git a/drivers/char/drm/radeon_drm.h b/drivers/char/drm/radeon_drm.h
index aab82e121e07..73ff51f12311 100644
--- a/drivers/char/drm/radeon_drm.h
+++ b/drivers/char/drm/radeon_drm.h
@@ -240,6 +240,7 @@ typedef union {
 #       define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN    0x8
 
 #define R300_CMD_SCRATCH                8
+#define R300_CMD_R500FP                 9
 
 typedef union {
         unsigned int u;
@@ -268,6 +269,9 @@ typedef union {
         struct {
                 unsigned char cmd_type, reg, n_bufs, flags;
         } scratch;
+        struct {
+                unsigned char cmd_type, count, adrlo, adrhi_flags;
+        } r500fp;
 } drm_r300_cmd_header_t;
 
 #define RADEON_FRONT                    0x1
@@ -278,6 +282,9 @@ typedef union {
 #define RADEON_USE_HIERZ                0x40000000
 #define RADEON_USE_COMP_ZBUF            0x20000000
 
+#define R500FP_CONSTANT_TYPE  (1 << 1)
+#define R500FP_CONSTANT_CLAMP (1 << 2)
+
 /* Primitive types
  */
 #define RADEON_POINTS                   0x1
@@ -669,6 +676,7 @@ typedef struct drm_radeon_indirect {
 #define RADEON_PARAM_CARD_TYPE             12
 #define RADEON_PARAM_VBLANK_CRTC           13   /* VBLANK CRTC */
 #define RADEON_PARAM_FB_LOCATION           14   /* FB location */
+#define RADEON_PARAM_NUM_GB_PIPES          15   /* num GB pipes */
 
 typedef struct drm_radeon_getparam {
         int param;
diff --git a/drivers/char/drm/radeon_drv.h b/drivers/char/drm/radeon_drv.h
index 173ae620223a..3f0eca957aa7 100644
--- a/drivers/char/drm/radeon_drv.h
+++ b/drivers/char/drm/radeon_drv.h
@@ -38,7 +38,7 @@
 
 #define DRIVER_NAME             "radeon"
 #define DRIVER_DESC             "ATI Radeon"
-#define DRIVER_DATE             "20060524"
+#define DRIVER_DATE             "20080528"
 
 /* Interface history:
  *
@@ -98,9 +98,10 @@
  * 1.26- Add support for variable size PCI(E) gart aperture
  * 1.27- Add support for IGP GART
  * 1.28- Add support for VBL on CRTC2
+ * 1.29- R500 3D cmd buffer support
  */
 #define DRIVER_MAJOR            1
-#define DRIVER_MINOR            28
+#define DRIVER_MINOR            29
 #define DRIVER_PATCHLEVEL       0
 
 /*
@@ -122,7 +123,7 @@ enum radeon_family {
         CHIP_RV380,
         CHIP_R420,
         CHIP_RV410,
-        CHIP_RS400,
+        CHIP_RS480,
         CHIP_RS690,
         CHIP_RV515,
         CHIP_R520,
@@ -294,6 +295,7 @@ typedef struct drm_radeon_private {
         int vblank_crtc;
         uint32_t irq_enable_reg;
         int irq_enabled;
+        uint32_t r500_disp_irq_reg;
 
         struct radeon_surface surfaces[RADEON_MAX_SURFACES];
         struct radeon_virt_surface virt_surfaces[2 * RADEON_MAX_SURFACES];
@@ -307,6 +309,8 @@ typedef struct drm_radeon_private {
         /* starting from here on, data is preserved accross an open */
         uint32_t flags;         /* see radeon_chip_flags */
         unsigned long fb_aper_offset;
+
+        int num_gb_pipes;
 } drm_radeon_private_t;
 
 typedef struct drm_radeon_buf_priv {
@@ -382,6 +386,7 @@ extern irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS);
 extern void radeon_driver_irq_preinstall(struct drm_device * dev);
 extern void radeon_driver_irq_postinstall(struct drm_device * dev);
 extern void radeon_driver_irq_uninstall(struct drm_device * dev);
+extern void radeon_enable_interrupt(struct drm_device *dev);
 extern int radeon_vblank_crtc_get(struct drm_device *dev);
 extern int radeon_vblank_crtc_set(struct drm_device *dev, int64_t value);
 
@@ -444,13 +449,13 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 #define RADEON_PCIE_DATA                0x0034
 #define RADEON_PCIE_TX_GART_CNTL        0x10
 #       define RADEON_PCIE_TX_GART_EN           (1 << 0)
-#       define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_PASS_THRU (0<<1)
-#       define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_CLAMP_LO  (1<<1)
-#       define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD   (3<<1)
-#       define RADEON_PCIE_TX_GART_MODE_32_128_CACHE    (0<<3)
-#       define RADEON_PCIE_TX_GART_MODE_8_4_128_CACHE   (1<<3)
-#       define RADEON_PCIE_TX_GART_CHK_RW_VALID_EN      (1<<5)
-#       define RADEON_PCIE_TX_GART_INVALIDATE_TLB       (1<<8)
+#       define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_PASS_THRU (0 << 1)
+#       define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_CLAMP_LO  (1 << 1)
+#       define RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD   (3 << 1)
+#       define RADEON_PCIE_TX_GART_MODE_32_128_CACHE    (0 << 3)
+#       define RADEON_PCIE_TX_GART_MODE_8_4_128_CACHE   (1 << 3)
+#       define RADEON_PCIE_TX_GART_CHK_RW_VALID_EN      (1 << 5)
+#       define RADEON_PCIE_TX_GART_INVALIDATE_TLB       (1 << 8)
 #define RADEON_PCIE_TX_DISCARD_RD_ADDR_LO 0x11
 #define RADEON_PCIE_TX_DISCARD_RD_ADDR_HI 0x12
 #define RADEON_PCIE_TX_GART_BASE        0x13
@@ -459,14 +464,9 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 #define RADEON_PCIE_TX_GART_END_LO      0x16
 #define RADEON_PCIE_TX_GART_END_HI      0x17
 
-#define RADEON_IGPGART_INDEX            0x168
-#define RADEON_IGPGART_DATA             0x16c
-#define RADEON_IGPGART_UNK_18           0x18
-#define RADEON_IGPGART_CTRL             0x2b
-#define RADEON_IGPGART_BASE_ADDR        0x2c
-#define RADEON_IGPGART_FLUSH            0x2e
-#define RADEON_IGPGART_ENABLE           0x38
-#define RADEON_IGPGART_UNK_39           0x39
+#define RS480_NB_MC_INDEX               0x168
+#       define RS480_NB_MC_IND_WR_EN    (1 << 8)
+#define RS480_NB_MC_DATA                0x16c
 
 #define RS690_MC_INDEX                  0x78
 #   define RS690_MC_INDEX_MASK          0x1ff
@@ -474,45 +474,91 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 #   define RS690_MC_INDEX_WR_ACK        0x7f
 #define RS690_MC_DATA                   0x7c
 
-#define RS690_MC_MISC_CNTL              0x18
-#define RS690_MC_GART_FEATURE_ID        0x2b
-#define RS690_MC_GART_BASE              0x2c
-#define RS690_MC_GART_CACHE_CNTL        0x2e
-#   define RS690_MC_GART_CC_NO_CHANGE   0x0
-#   define RS690_MC_GART_CC_CLEAR       0x1
-#   define RS690_MC_GART_CLEAR_STATUS   (1 << 1)
-#       define RS690_MC_GART_CLEAR_DONE     (0 << 1)
-#       define RS690_MC_GART_CLEAR_PENDING  (1 << 1)
-#define RS690_MC_AGP_SIZE               0x38
-#   define RS690_MC_GART_DIS            0x0
-#   define RS690_MC_GART_EN             0x1
-#   define RS690_MC_AGP_SIZE_32MB       (0 << 1)
-#   define RS690_MC_AGP_SIZE_64MB       (1 << 1)
-#   define RS690_MC_AGP_SIZE_128MB      (2 << 1)
-#   define RS690_MC_AGP_SIZE_256MB      (3 << 1)
-#   define RS690_MC_AGP_SIZE_512MB      (4 << 1)
-#   define RS690_MC_AGP_SIZE_1GB        (5 << 1)
-#   define RS690_MC_AGP_SIZE_2GB        (6 << 1)
-#define RS690_MC_AGP_MODE_CONTROL       0x39
+/* MC indirect registers */
+#define RS480_MC_MISC_CNTL              0x18
+#       define RS480_DISABLE_GTW        (1 << 1)
+/* switch between MCIND GART and MM GART registers. 0 = mmgart, 1 = mcind gart */
+#       define RS480_GART_INDEX_REG_EN  (1 << 12)
+#       define RS690_BLOCK_GFX_D3_EN    (1 << 14)
+#define RS480_K8_FB_LOCATION            0x1e
+#define RS480_GART_FEATURE_ID           0x2b
+#       define RS480_HANG_EN            (1 << 11)
+#       define RS480_TLB_ENABLE         (1 << 18)
+#       define RS480_P2P_ENABLE         (1 << 19)
+#       define RS480_GTW_LAC_EN         (1 << 25)
+#       define RS480_2LEVEL_GART        (0 << 30)
+#       define RS480_1LEVEL_GART        (1 << 30)
+#       define RS480_PDC_EN             (1 << 31)
+#define RS480_GART_BASE                 0x2c
+#define RS480_GART_CACHE_CNTRL          0x2e
+#       define RS480_GART_CACHE_INVALIDATE (1 << 0) /* wait for it to clear */
+#define RS480_AGP_ADDRESS_SPACE_SIZE    0x38
+#       define RS480_GART_EN            (1 << 0)
+#       define RS480_VA_SIZE_32MB       (0 << 1)
+#       define RS480_VA_SIZE_64MB       (1 << 1)
+#       define RS480_VA_SIZE_128MB      (2 << 1)
+#       define RS480_VA_SIZE_256MB      (3 << 1)
+#       define RS480_VA_SIZE_512MB      (4 << 1)
+#       define RS480_VA_SIZE_1GB        (5 << 1)
+#       define RS480_VA_SIZE_2GB        (6 << 1)
+#define RS480_AGP_MODE_CNTL             0x39
+#       define RS480_POST_GART_Q_SIZE   (1 << 18)
+#       define RS480_NONGART_SNOOP      (1 << 19)
+#       define RS480_AGP_RD_BUF_SIZE    (1 << 20)
+#       define RS480_REQ_TYPE_SNOOP_SHIFT 22
+#       define RS480_REQ_TYPE_SNOOP_MASK  0x3
+#       define RS480_REQ_TYPE_SNOOP_DIS (1 << 24)
+#define RS480_MC_MISC_UMA_CNTL          0x5f
+#define RS480_MC_MCLK_CNTL              0x7a
+#define RS480_MC_UMA_DUALCH_CNTL        0x86
+
 #define RS690_MC_FB_LOCATION            0x100
 #define RS690_MC_AGP_LOCATION           0x101
 #define RS690_MC_AGP_BASE               0x102
+#define RS690_MC_AGP_BASE_2             0x103
 
 #define R520_MC_IND_INDEX 0x70
-#define R520_MC_IND_WR_EN (1<<24)
+#define R520_MC_IND_WR_EN (1 << 24)
 #define R520_MC_IND_DATA  0x74
 
 #define RV515_MC_FB_LOCATION 0x01
 #define RV515_MC_AGP_LOCATION 0x02
+#define RV515_MC_AGP_BASE     0x03
+#define RV515_MC_AGP_BASE_2   0x04
 
 #define R520_MC_FB_LOCATION 0x04
 #define R520_MC_AGP_LOCATION 0x05
+#define R520_MC_AGP_BASE     0x06
+#define R520_MC_AGP_BASE_2   0x07
 
 #define RADEON_MPP_TB_CONFIG            0x01c0
 #define RADEON_MEM_CNTL                 0x0140
 #define RADEON_MEM_SDRAM_MODE_REG       0x0158
+#define RADEON_AGP_BASE_2               0x015c /* r200+ only */
+#define RS480_AGP_BASE_2                0x0164
 #define RADEON_AGP_BASE                 0x0170
 
+/* pipe config regs */
+#define R400_GB_PIPE_SELECT             0x402c
+#define R500_DYN_SCLK_PWMEM_PIPE        0x000d /* PLL */
+#define R500_SU_REG_DEST                0x42c8
+#define R300_GB_TILE_CONFIG             0x4018
+#       define R300_ENABLE_TILING       (1 << 0)
+#       define R300_PIPE_COUNT_RV350    (0 << 1)
+#       define R300_PIPE_COUNT_R300     (3 << 1)
+#       define R300_PIPE_COUNT_R420_3P  (6 << 1)
+#       define R300_PIPE_COUNT_R420     (7 << 1)
+#       define R300_TILE_SIZE_8         (0 << 4)
+#       define R300_TILE_SIZE_16        (1 << 4)
+#       define R300_TILE_SIZE_32        (2 << 4)
+#       define R300_SUBPIXEL_1_12       (0 << 16)
+#       define R300_SUBPIXEL_1_16       (1 << 16)
+#define R300_DST_PIPE_CONFIG            0x170c
+#       define R300_PIPE_AUTO_CONFIG    (1 << 31)
+#define R300_RB2D_DSTCACHE_MODE         0x3428
+#       define R300_DC_AUTOFLUSH_ENABLE (1 << 8)
+#       define R300_DC_DC_DISABLE_IGNORE_PE (1 << 17)
+
 #define RADEON_RB3D_COLOROFFSET         0x1c40
 #define RADEON_RB3D_COLORPITCH          0x1c48
 
@@ -616,11 +662,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 #define RADEON_PP_TXFILTER_1            0x1c6c
 #define RADEON_PP_TXFILTER_2            0x1c84
 
-#define RADEON_RB2D_DSTCACHE_CTLSTAT    0x342c
-#       define RADEON_RB2D_DC_FLUSH             (3 << 0)
-#       define RADEON_RB2D_DC_FREE              (3 << 2)
-#       define RADEON_RB2D_DC_FLUSH_ALL         0xf
-#       define RADEON_RB2D_DC_BUSY              (1 << 31)
+#define R300_RB2D_DSTCACHE_CTLSTAT      0x342c /* use R300_DSTCACHE_CTLSTAT */
+#define R300_DSTCACHE_CTLSTAT           0x1714
+#       define R300_RB2D_DC_FLUSH               (3 << 0)
+#       define R300_RB2D_DC_FREE                (3 << 2)
+#       define R300_RB2D_DC_FLUSH_ALL           0xf
+#       define R300_RB2D_DC_BUSY                (1 << 31)
 #define RADEON_RB3D_CNTL                0x1c3c
 #       define RADEON_ALPHA_BLEND_ENABLE        (1 << 0)
 #       define RADEON_PLANE_MASK_ENABLE         (1 << 1)
@@ -643,11 +690,18 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 #       define RADEON_RB3D_ZC_FREE              (1 << 2)
 #       define RADEON_RB3D_ZC_FLUSH_ALL         0x5
 #       define RADEON_RB3D_ZC_BUSY              (1 << 31)
+#define R300_ZB_ZCACHE_CTLSTAT                  0x4f18
+#       define R300_ZC_FLUSH                    (1 << 0)
+#       define R300_ZC_FREE                     (1 << 1)
+#       define R300_ZC_FLUSH_ALL                0x3
+#       define R300_ZC_BUSY                     (1 << 31)
 #define RADEON_RB3D_DSTCACHE_CTLSTAT    0x325c
 #       define RADEON_RB3D_DC_FLUSH             (3 << 0)
 #       define RADEON_RB3D_DC_FREE              (3 << 2)
 #       define RADEON_RB3D_DC_FLUSH_ALL         0xf
 #       define RADEON_RB3D_DC_BUSY              (1 << 31)
+#define R300_RB3D_DSTCACHE_CTLSTAT              0x4e4c
+#       define R300_RB3D_DC_FINISH              (1 << 4)
 #define RADEON_RB3D_ZSTENCILCNTL        0x1c2c
 #       define RADEON_Z_TEST_MASK               (7 << 4)
 #       define RADEON_Z_TEST_ALWAYS             (7 << 4)
@@ -1057,6 +1111,31 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 
 #define R200_VAP_PVS_CNTL_1               0x22D0
 
+#define R500_D1CRTC_STATUS 0x609c
+#define R500_D2CRTC_STATUS 0x689c
+#define R500_CRTC_V_BLANK (1<<0)
+
+#define R500_D1CRTC_FRAME_COUNT 0x60a4
+#define R500_D2CRTC_FRAME_COUNT 0x68a4
+
+#define R500_D1MODE_V_COUNTER 0x6530
+#define R500_D2MODE_V_COUNTER 0x6d30
+
+#define R500_D1MODE_VBLANK_STATUS 0x6534
+#define R500_D2MODE_VBLANK_STATUS 0x6d34
+#define R500_VBLANK_OCCURED (1<<0)
+#define R500_VBLANK_ACK     (1<<4)
+#define R500_VBLANK_STAT    (1<<12)
+#define R500_VBLANK_INT     (1<<16)
+
+#define R500_DxMODE_INT_MASK 0x6540
+#define R500_D1MODE_INT_MASK (1<<0)
+#define R500_D2MODE_INT_MASK (1<<8)
+
+#define R500_DISP_INTERRUPT_STATUS 0x7edc
+#define R500_D1_VBLANK_INTERRUPT (1 << 4)
+#define R500_D2_VBLANK_INTERRUPT (1 << 5)
+
 /* Constants */
 #define RADEON_MAX_USEC_TIMEOUT         100000  /* 100 ms */
 
@@ -1078,42 +1157,50 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
 #define RADEON_READ8(reg)       DRM_READ8(  dev_priv->mmio, (reg) )
 #define RADEON_WRITE8(reg,val)  DRM_WRITE8( dev_priv->mmio, (reg), (val) )
 
-#define RADEON_WRITE_PLL( addr, val )                                   \
+#define RADEON_WRITE_PLL(addr, val)                                     \
 do {                                                                    \
-        RADEON_WRITE8( RADEON_CLOCK_CNTL_INDEX,                         \
+        RADEON_WRITE8(RADEON_CLOCK_CNTL_INDEX,                          \
                        ((addr) & 0x1f) | RADEON_PLL_WR_EN );            \
-        RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) );                  \
+        RADEON_WRITE(RADEON_CLOCK_CNTL_DATA, (val));                    \
 } while (0)
 
-#define RADEON_WRITE_IGPGART( addr, val )                               \
+#define RADEON_WRITE_PCIE(addr, val)                                    \
 do {                                                                    \
-        RADEON_WRITE( RADEON_IGPGART_INDEX,                             \
-                        ((addr) & 0x7f) | (1 << 8));                    \
-        RADEON_WRITE( RADEON_IGPGART_DATA, (val) );                     \
-        RADEON_WRITE( RADEON_IGPGART_INDEX, 0x7f );                     \
+        RADEON_WRITE8(RADEON_PCIE_INDEX,                                \
+                        ((addr) & 0xff));                               \
+        RADEON_WRITE(RADEON_PCIE_DATA, (val));                  \
 } while (0)
 
-#define RADEON_WRITE_PCIE( addr, val )                                  \
-do {                                                                    \
-        RADEON_WRITE8( RADEON_PCIE_INDEX,                               \
-                        ((addr) & 0xff));                               \
-        RADEON_WRITE( RADEON_PCIE_DATA, (val) );                        \
+#define R500_WRITE_MCIND(addr, val)                                     \
+do {                                                            \
+        RADEON_WRITE(R520_MC_IND_INDEX, 0xff0000 | ((addr) & 0xff));    \
+        RADEON_WRITE(R520_MC_IND_DATA, (val));                  \
+        RADEON_WRITE(R520_MC_IND_INDEX, 0);     \
 } while (0)
 
-#define RADEON_WRITE_MCIND( addr, val )                                 \
-        do {                                                            \
-                RADEON_WRITE(R520_MC_IND_INDEX, 0xff0000 | ((addr) & 0xff));    \
-                RADEON_WRITE(R520_MC_IND_DATA, (val));                  \
-                RADEON_WRITE(R520_MC_IND_INDEX, 0);     \
-        } while (0)
+#define RS480_WRITE_MCIND(addr, val)                            \
+do {                                                                    \
+        RADEON_WRITE(RS480_NB_MC_INDEX,                         \
+                        ((addr) & 0xff) | RS480_NB_MC_IND_WR_EN);       \
+        RADEON_WRITE(RS480_NB_MC_DATA, (val));                  \
+        RADEON_WRITE(RS480_NB_MC_INDEX, 0xff);                  \
+} while (0)
 
-#define RS690_WRITE_MCIND( addr, val )                                  \
+#define RS690_WRITE_MCIND(addr, val)                                    \
 do {                                                            \
         RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_EN | ((addr) & RS690_MC_INDEX_MASK));    \
         RADEON_WRITE(RS690_MC_DATA, val);                       \
         RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK);    \
 } while (0)
 
+#define IGP_WRITE_MCIND(addr, val)                              \
+do {                                                                    \
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)       \
+                RS690_WRITE_MCIND(addr, val);                           \
+        else                                                            \
+                RS480_WRITE_MCIND(addr, val);                           \
+} while (0)
+
 #define CP_PACKET0( reg, n )                                            \
         (RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
 #define CP_PACKET0_TABLE( reg, n )                                      \
@@ -1154,23 +1241,43 @@ do {								\
 } while (0)
 
 #define RADEON_FLUSH_CACHE() do {                                       \
-        OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) );      \
-        OUT_RING( RADEON_RB3D_DC_FLUSH );                               \
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) {     \
+                OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));  \
+                OUT_RING(RADEON_RB3D_DC_FLUSH);                         \
+        } else {                                                        \
+                OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));    \
+                OUT_RING(RADEON_RB3D_DC_FLUSH);                         \
+        }                                                               \
 } while (0)
 
 #define RADEON_PURGE_CACHE() do {                                       \
-        OUT_RING( CP_PACKET0( RADEON_RB3D_DSTCACHE_CTLSTAT, 0 ) );      \
-        OUT_RING( RADEON_RB3D_DC_FLUSH_ALL );                           \
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) {     \
+                OUT_RING(CP_PACKET0(RADEON_RB3D_DSTCACHE_CTLSTAT, 0));  \
+                OUT_RING(RADEON_RB3D_DC_FLUSH_ALL);                     \
+        } else {                                                        \
+                OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));    \
+                OUT_RING(RADEON_RB3D_DC_FLUSH_ALL);                     \
+        }                                                               \
 } while (0)
 
 #define RADEON_FLUSH_ZCACHE() do {                                      \
-        OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) );        \
-        OUT_RING( RADEON_RB3D_ZC_FLUSH );                               \
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) {     \
+                OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));    \
+                OUT_RING(RADEON_RB3D_ZC_FLUSH);                         \
+        } else {                                                        \
+                OUT_RING(CP_PACKET0(R300_ZB_ZCACHE_CTLSTAT, 0));        \
+                OUT_RING(R300_ZC_FLUSH);                                \
+        }                                                               \
 } while (0)
 
 #define RADEON_PURGE_ZCACHE() do {                                      \
-        OUT_RING( CP_PACKET0( RADEON_RB3D_ZCACHE_CTLSTAT, 0 ) );        \
-        OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL );                           \
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV280) {     \
+                OUT_RING(CP_PACKET0(RADEON_RB3D_ZCACHE_CTLSTAT, 0));    \
+                OUT_RING(RADEON_RB3D_ZC_FLUSH_ALL);                     \
+        } else {                                                        \
+                OUT_RING(CP_PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));    \
+                OUT_RING(R300_ZC_FLUSH_ALL);                            \
+        }                                                               \
 } while (0)
 
 /* ================================================================
diff --git a/drivers/char/drm/radeon_irq.c b/drivers/char/drm/radeon_irq.c
index 009af3814b6f..ee40d197deb7 100644
--- a/drivers/char/drm/radeon_irq.c
+++ b/drivers/char/drm/radeon_irq.c
@@ -234,7 +234,7 @@ int radeon_irq_wait(struct drm_device *dev, void *data, struct drm_file *file_pr
         return radeon_wait_irq(dev, irqwait->irq_seq);
 }
 
-static void radeon_enable_interrupt(struct drm_device *dev)
+void radeon_enable_interrupt(struct drm_device *dev)
 {
         drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private;
 
diff --git a/drivers/char/drm/radeon_microcode.h b/drivers/char/drm/radeon_microcode.h
new file mode 100644
index 000000000000..a348c9e7db1c
--- /dev/null
+++ b/drivers/char/drm/radeon_microcode.h
@@ -0,0 +1,1844 @@
+/*
+ * Copyright 2007 Advanced Micro Devices, Inc.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
+ * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
+ * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef RADEON_MICROCODE_H
+#define RADEON_MICROCODE_H
+
+/* production radeon ucode r1xx-r6xx */
+static const u32 R100_cp_microcode[][2] = {
+    { 0x21007000, 0000000000 },
+    { 0x20007000, 0000000000 },
+    { 0x000000b4, 0x00000004 },
+    { 0x000000b8, 0x00000004 },
+    { 0x6f5b4d4c, 0000000000 },
+    { 0x4c4c427f, 0000000000 },
+    { 0x5b568a92, 0000000000 },
+    { 0x4ca09c6d, 0000000000 },
+    { 0xad4c4c4c, 0000000000 },
+    { 0x4ce1af3d, 0000000000 },
+    { 0xd8afafaf, 0000000000 },
+    { 0xd64c4cdc, 0000000000 },
+    { 0x4cd10d10, 0000000000 },
+    { 0x000f0000, 0x00000016 },
+    { 0x362f242d, 0000000000 },
+    { 0x00000012, 0x00000004 },
+    { 0x000f0000, 0x00000016 },
+    { 0x362f282d, 0000000000 },
+    { 0x000380e7, 0x00000002 },
+    { 0x04002c97, 0x00000002 },
+    { 0x000f0001, 0x00000016 },
+    { 0x333a3730, 0000000000 },
+    { 0x000077ef, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x00000021, 0x0000001a },
+    { 0x00004000, 0x0000001e },
+    { 0x00061000, 0x00000002 },
+    { 0x00000021, 0x0000001a },
+    { 0x00004000, 0x0000001e },
+    { 0x00061000, 0x00000002 },
+    { 0x00000021, 0x0000001a },
+    { 0x00004000, 0x0000001e },
+    { 0x00000017, 0x00000004 },
+    { 0x0003802b, 0x00000002 },
+    { 0x040067e0, 0x00000002 },
+    { 0x00000017, 0x00000004 },
+    { 0x000077e0, 0x00000002 },
+    { 0x00065000, 0x00000002 },
+    { 0x000037e1, 0x00000002 },
+    { 0x040067e1, 0x00000006 },
+    { 0x000077e0, 0x00000002 },
+    { 0x000077e1, 0x00000002 },
+    { 0x000077e1, 0x00000006 },
+    { 0xffffffff, 0000000000 },
+    { 0x10000000, 0000000000 },
+    { 0x0003802b, 0x00000002 },
+    { 0x040067e0, 0x00000006 },
+    { 0x00007675, 0x00000002 },
+    { 0x00007676, 0x00000002 },
+    { 0x00007677, 0x00000002 },
+    { 0x00007678, 0x00000006 },
+    { 0x0003802c, 0x00000002 },
+    { 0x04002676, 0x00000002 },
+    { 0x00007677, 0x00000002 },
+    { 0x00007678, 0x00000006 },
+    { 0x0000002f, 0x00000018 },
+    { 0x0000002f, 0x00000018 },
+    { 0000000000, 0x00000006 },
+    { 0x00000030, 0x00000018 },
+    { 0x00000030, 0x00000018 },
+    { 0000000000, 0x00000006 },
+    { 0x01605000, 0x00000002 },
+    { 0x00065000, 0x00000002 },
+    { 0x00098000, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x64c0603e, 0x00000004 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00080000, 0x00000016 },
+    { 0000000000, 0000000000 },
+    { 0x0400251d, 0x00000002 },
+    { 0x00007580, 0x00000002 },
+    { 0x00067581, 0x00000002 },
+    { 0x04002580, 0x00000002 },
+    { 0x00067581, 0x00000002 },
+    { 0x00000049, 0x00000004 },
+    { 0x00005000, 0000000000 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x0000750e, 0x00000002 },
+    { 0x00019000, 0x00000002 },
+    { 0x00011055, 0x00000014 },
+    { 0x00000055, 0x00000012 },
+    { 0x0400250f, 0x00000002 },
+    { 0x0000504f, 0x00000004 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00007565, 0x00000002 },
+    { 0x00007566, 0x00000002 },
+    { 0x00000058, 0x00000004 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x01e655b4, 0x00000002 },
+    { 0x4401b0e4, 0x00000002 },
+    { 0x01c110e4, 0x00000002 },
+    { 0x26667066, 0x00000018 },
+    { 0x040c2565, 0x00000002 },
+    { 0x00000066, 0x00000018 },
+    { 0x04002564, 0x00000002 },
+    { 0x00007566, 0x00000002 },
+    { 0x0000005d, 0x00000004 },
+    { 0x00401069, 0x00000008 },
+    { 0x00101000, 0x00000002 },
+    { 0x000d80ff, 0x00000002 },
+    { 0x0080006c, 0x00000008 },
+    { 0x000f9000, 0x00000002 },
+    { 0x000e00ff, 0x00000002 },
+    { 0000000000, 0x00000006 },
+    { 0x0000008f, 0x00000018 },
+    { 0x0000005b, 0x00000004 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00007576, 0x00000002 },
+    { 0x00065000, 0x00000002 },
+    { 0x00009000, 0x00000002 },
+    { 0x00041000, 0x00000002 },
+    { 0x0c00350e, 0x00000002 },
+    { 0x00049000, 0x00000002 },
+    { 0x00051000, 0x00000002 },
+    { 0x01e785f8, 0x00000002 },
+    { 0x00200000, 0x00000002 },
+    { 0x0060007e, 0x0000000c },
+    { 0x00007563, 0x00000002 },
+    { 0x006075f0, 0x00000021 },
+    { 0x20007073, 0x00000004 },
+    { 0x00005073, 0x00000004 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00007576, 0x00000002 },
+    { 0x00007577, 0x00000002 },
+    { 0x0000750e, 0x00000002 },
+    { 0x0000750f, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x00600083, 0x0000000c },
+    { 0x006075f0, 0x00000021 },
+    { 0x000075f8, 0x00000002 },
+    { 0x00000083, 0x00000004 },
+    { 0x000a750e, 0x00000002 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x0020750f, 0x00000002 },
+    { 0x00600086, 0x00000004 },
+    { 0x00007570, 0x00000002 },
+    { 0x00007571, 0x00000002 },
+    { 0x00007572, 0x00000006 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00005000, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x00007568, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x00000095, 0x0000000c },
+    { 0x00058000, 0x00000002 },
+    { 0x0c607562, 0x00000002 },
+    { 0x00000097, 0x00000004 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x00600096, 0x00000004 },
+    { 0x400070e5, 0000000000 },
+    { 0x000380e6, 0x00000002 },
+    { 0x040025c5, 0x00000002 },
+    { 0x000380e5, 0x00000002 },
+    { 0x000000a8, 0x0000001c },
+    { 0x000650aa, 0x00000018 },
+    { 0x040025bb, 0x00000002 },
+    { 0x000610ab, 0x00000018 },
+    { 0x040075bc, 0000000000 },
+    { 0x000075bb, 0x00000002 },
+    { 0x000075bc, 0000000000 },
+    { 0x00090000, 0x00000006 },
+    { 0x00090000, 0x00000002 },
+    { 0x000d8002, 0x00000006 },
+    { 0x00007832, 0x00000002 },
+    { 0x00005000, 0x00000002 },
+    { 0x000380e7, 0x00000002 },
+    { 0x04002c97, 0x00000002 },
+    { 0x00007820, 0x00000002 },
+    { 0x00007821, 0x00000002 },
+    { 0x00007800, 0000000000 },
+    { 0x01200000, 0x00000002 },
+    { 0x20077000, 0x00000002 },
+    { 0x01200000, 0x00000002 },
+    { 0x20007000, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x0120751b, 0x00000002 },
+    { 0x8040750a, 0x00000002 },
+    { 0x8040750b, 0x00000002 },
+    { 0x00110000, 0x00000002 },
+    { 0x000380e5, 0x00000002 },
+    { 0x000000c6, 0x0000001c },
+    { 0x000610ab, 0x00000018 },
+    { 0x844075bd, 0x00000002 },
+    { 0x000610aa, 0x00000018 },
+    { 0x840075bb, 0x00000002 },
+    { 0x000610ab, 0x00000018 },
+    { 0x844075bc, 0x00000002 },
+    { 0x000000c9, 0x00000004 },
+    { 0x804075bd, 0x00000002 },
+    { 0x800075bb, 0x00000002 },
+    { 0x804075bc, 0x00000002 },
+    { 0x00108000, 0x00000002 },
+    { 0x01400000, 0x00000002 },
+    { 0x006000cd, 0x0000000c },
+    { 0x20c07000, 0x00000020 },
+    { 0x000000cf, 0x00000012 },
+    { 0x00800000, 0x00000006 },
+    { 0x0080751d, 0x00000006 },
+    { 0000000000, 0000000000 },
+    { 0x0000775c, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x00661000, 0x00000002 },
+    { 0x0460275d, 0x00000020 },
+    { 0x00004000, 0000000000 },
+    { 0x01e00830, 0x00000002 },
+    { 0x21007000, 0000000000 },
+    { 0x6464614d, 0000000000 },
+    { 0x69687420, 0000000000 },
+    { 0x00000073, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x00005000, 0x00000002 },
+    { 0x000380d0, 0x00000002 },
+    { 0x040025e0, 0x00000002 },
+    { 0x000075e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000380e0, 0x00000002 },
+    { 0x04002394, 0x00000002 },
+    { 0x00005000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x00000008, 0000000000 },
+    { 0x00000004, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+static const u32 R200_cp_microcode[][2] = {
+    { 0x21007000, 0000000000 },
+    { 0x20007000, 0000000000 },
+    { 0x000000bf, 0x00000004 },
+    { 0x000000c3, 0x00000004 },
+    { 0x7a685e5d, 0000000000 },
+    { 0x5d5d5588, 0000000000 },
+    { 0x68659197, 0000000000 },
+    { 0x5da19f78, 0000000000 },
+    { 0x5d5d5d5d, 0000000000 },
+    { 0x5dee5d50, 0000000000 },
+    { 0xf2acacac, 0000000000 },
+    { 0xe75df9e9, 0000000000 },
+    { 0xb1dd0e11, 0000000000 },
+    { 0xe2afafaf, 0000000000 },
+    { 0x000f0000, 0x00000016 },
+    { 0x452f232d, 0000000000 },
+    { 0x00000013, 0x00000004 },
+    { 0x000f0000, 0x00000016 },
+    { 0x452f272d, 0000000000 },
+    { 0x000f0001, 0x00000016 },
+    { 0x3e4d4a37, 0000000000 },
+    { 0x000077ef, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x00000020, 0x0000001a },
+    { 0x00004000, 0x0000001e },
+    { 0x00061000, 0x00000002 },
+    { 0x00000020, 0x0000001a },
+    { 0x00004000, 0x0000001e },
+    { 0x00061000, 0x00000002 },
+    { 0x00000020, 0x0000001a },
+    { 0x00004000, 0x0000001e },
+    { 0x00000016, 0x00000004 },
+    { 0x0003802a, 0x00000002 },
+    { 0x040067e0, 0x00000002 },
+    { 0x00000016, 0x00000004 },
+    { 0x000077e0, 0x00000002 },
+    { 0x00065000, 0x00000002 },
+    { 0x000037e1, 0x00000002 },
+    { 0x040067e1, 0x00000006 },
+    { 0x000077e0, 0x00000002 },
+    { 0x000077e1, 0x00000002 },
+    { 0x000077e1, 0x00000006 },
+    { 0xffffffff, 0000000000 },
+    { 0x10000000, 0000000000 },
+    { 0x07f007f0, 0000000000 },
+    { 0x0003802a, 0x00000002 },
+    { 0x040067e0, 0x00000006 },
+    { 0x0003802c, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002743, 0x00000002 },
+    { 0x00007675, 0x00000002 },
+    { 0x00007676, 0x00000002 },
+    { 0x00007677, 0x00000002 },
+    { 0x00007678, 0x00000006 },
+    { 0x0003802c, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002743, 0x00000002 },
+    { 0x00007676, 0x00000002 },
+    { 0x00007677, 0x00000002 },
+    { 0x00007678, 0x00000006 },
+    { 0x0003802b, 0x00000002 },
+    { 0x04002676, 0x00000002 },
+    { 0x00007677, 0x00000002 },
+    { 0x0003802c, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002743, 0x00000002 },
+    { 0x00007678, 0x00000006 },
+    { 0x0003802c, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002741, 0x00000002 },
+    { 0x04002743, 0x00000002 },
+    { 0x00007678, 0x00000006 },
+    { 0x0000002f, 0x00000018 },
+    { 0x0000002f, 0x00000018 },
+    { 0000000000, 0x00000006 },
+    { 0x00000037, 0x00000018 },
+    { 0x00000037, 0x00000018 },
+    { 0000000000, 0x00000006 },
+    { 0x01605000, 0x00000002 },
+    { 0x00065000, 0x00000002 },
+    { 0x00098000, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x64c06051, 0x00000004 },
+    { 0x00080000, 0x00000016 },
+    { 0000000000, 0000000000 },
+    { 0x0400251d, 0x00000002 },
+    { 0x00007580, 0x00000002 },
+    { 0x00067581, 0x00000002 },
+    { 0x04002580, 0x00000002 },
+    { 0x00067581, 0x00000002 },
+    { 0x0000005a, 0x00000004 },
+    { 0x00005000, 0000000000 },
+    { 0x00061000, 0x00000002 },
+    { 0x0000750e, 0x00000002 },
+    { 0x00019000, 0x00000002 },
+    { 0x00011064, 0x00000014 },
+    { 0x00000064, 0x00000012 },
+    { 0x0400250f, 0x00000002 },
+    { 0x0000505e, 0x00000004 },
+    { 0x00007565, 0x00000002 },
+    { 0x00007566, 0x00000002 },
+    { 0x00000065, 0x00000004 },
+    { 0x01e655b4, 0x00000002 },
+    { 0x4401b0f0, 0x00000002 },
+    { 0x01c110f0, 0x00000002 },
+    { 0x26667071, 0x00000018 },
+    { 0x040c2565, 0x00000002 },
+    { 0x00000071, 0x00000018 },
+    { 0x04002564, 0x00000002 },
+    { 0x00007566, 0x00000002 },
+    { 0x00000068, 0x00000004 },
+    { 0x00401074, 0x00000008 },
+    { 0x00101000, 0x00000002 },
+    { 0x000d80ff, 0x00000002 },
+    { 0x00800077, 0x00000008 },
+    { 0x000f9000, 0x00000002 },
+    { 0x000e00ff, 0x00000002 },
+    { 0000000000, 0x00000006 },
+    { 0x00000094, 0x00000018 },
+    { 0x00000068, 0x00000004 },
+    { 0x00007576, 0x00000002 },
+    { 0x00065000, 0x00000002 },
+    { 0x00009000, 0x00000002 },
+    { 0x00041000, 0x00000002 },
+    { 0x0c00350e, 0x00000002 },
+    { 0x00049000, 0x00000002 },
+    { 0x00051000, 0x00000002 },
+    { 0x01e785f8, 0x00000002 },
+    { 0x00200000, 0x00000002 },
+    { 0x00600087, 0x0000000c },
+    { 0x00007563, 0x00000002 },
+    { 0x006075f0, 0x00000021 },
+    { 0x2000707c, 0x00000004 },
+    { 0x0000507c, 0x00000004 },
+    { 0x00007576, 0x00000002 },
+    { 0x00007577, 0x00000002 },
+    { 0x0000750e, 0x00000002 },
+    { 0x0000750f, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x0060008a, 0x0000000c },
+    { 0x006075f0, 0x00000021 },
+    { 0x000075f8, 0x00000002 },
+    { 0x0000008a, 0x00000004 },
+    { 0x000a750e, 0x00000002 },
+    { 0x0020750f, 0x00000002 },
+    { 0x0060008d, 0x00000004 },
+    { 0x00007570, 0x00000002 },
+    { 0x00007571, 0x00000002 },
+    { 0x00007572, 0x00000006 },
+    { 0x00005000, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x00007568, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x00000098, 0x0000000c },
+    { 0x00058000, 0x00000002 },
+    { 0x0c607562, 0x00000002 },
+    { 0x0000009a, 0x00000004 },
+    { 0x00600099, 0x00000004 },
+    { 0x400070f1, 0000000000 },
+    { 0x000380f1, 0x00000002 },
+    { 0x000000a7, 0x0000001c },
+    { 0x000650a9, 0x00000018 },
+    { 0x040025bb, 0x00000002 },
+    { 0x000610aa, 0x00000018 },
+    { 0x040075bc, 0000000000 },
+    { 0x000075bb, 0x00000002 },
+    { 0x000075bc, 0000000000 },
+    { 0x00090000, 0x00000006 },
+    { 0x00090000, 0x00000002 },
+    { 0x000d8002, 0x00000006 },
+    { 0x00005000, 0x00000002 },
+    { 0x00007821, 0x00000002 },
+    { 0x00007800, 0000000000 },
+    { 0x00007821, 0x00000002 },
+    { 0x00007800, 0000000000 },
+    { 0x01665000, 0x00000002 },
+    { 0x000a0000, 0x00000002 },
+    { 0x000671cc, 0x00000002 },
+    { 0x0286f1cd, 0x00000002 },
+    { 0x000000b7, 0x00000010 },
+    { 0x21007000, 0000000000 },
+    { 0x000000be, 0x0000001c },
+    { 0x00065000, 0x00000002 },
+    { 0x000a0000, 0x00000002 },
+    { 0x00061000, 0x00000002 },
+    { 0x000b0000, 0x00000002 },
+    { 0x38067000, 0x00000002 },
+    { 0x000a00ba, 0x00000004 },
+    { 0x20007000, 0000000000 },
+    { 0x01200000, 0x00000002 },
+    { 0x20077000, 0x00000002 },
+    { 0x01200000, 0x00000002 },
+    { 0x20007000, 0000000000 },
+    { 0x00061000, 0x00000002 },
+    { 0x0120751b, 0x00000002 },
+    { 0x8040750a, 0x00000002 },
+    { 0x8040750b, 0x00000002 },
+    { 0x00110000, 0x00000002 },
+    { 0x000380f1, 0x00000002 },
+    { 0x000000d1, 0x0000001c },
+    { 0x000610aa, 0x00000018 },
+    { 0x844075bd, 0x00000002 },
+    { 0x000610a9, 0x00000018 },
+    { 0x840075bb, 0x00000002 },
+    { 0x000610aa, 0x00000018 },
+    { 0x844075bc, 0x00000002 },
+    { 0x000000d4, 0x00000004 },
+    { 0x804075bd, 0x00000002 },
+    { 0x800075bb, 0x00000002 },
+    { 0x804075bc, 0x00000002 },
+    { 0x00108000, 0x00000002 },
+    { 0x01400000, 0x00000002 },
+    { 0x006000d8, 0x0000000c },
+    { 0x20c07000, 0x00000020 },
+    { 0x000000da, 0x00000012 },
+    { 0x00800000, 0x00000006 },
+    { 0x0080751d, 0x00000006 },
+    { 0x000025bb, 0x00000002 },
+    { 0x000040d4, 0x00000004 },
+    { 0x0000775c, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x00661000, 0x00000002 },
+    { 0x0460275d, 0x00000020 },
+    { 0x00004000, 0000000000 },
+    { 0x00007999, 0x00000002 },
+    { 0x00a05000, 0x00000002 },
+    { 0x00661000, 0x00000002 },
+    { 0x0460299b, 0x00000020 },
+    { 0x00004000, 0000000000 },
+    { 0x01e00830, 0x00000002 },
+    { 0x21007000, 0000000000 },
+    { 0x00005000, 0x00000002 },
+    { 0x00038056, 0x00000002 },
+    { 0x040025e0, 0x00000002 },
+    { 0x000075e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000380ed, 0x00000002 },
+    { 0x04007394, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x000078c4, 0x00000002 },
+    { 0x000078c5, 0x00000002 },
+    { 0x000078c6, 0x00000002 },
+    { 0x00007924, 0x00000002 },
+    { 0x00007925, 0x00000002 },
+    { 0x00007926, 0x00000002 },
+    { 0x000000f2, 0x00000004 },
+    { 0x00007924, 0x00000002 },
+    { 0x00007925, 0x00000002 },
+    { 0x00007926, 0x00000002 },
+    { 0x000000f9, 0x00000004 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+static const u32 R300_cp_microcode[][2] = {
+    { 0x4200e000, 0000000000 },
+    { 0x4000e000, 0000000000 },
+    { 0x000000ae, 0x00000008 },
+    { 0x000000b2, 0x00000008 },
+    { 0x67554b4a, 0000000000 },
+    { 0x4a4a4475, 0000000000 },
+    { 0x55527d83, 0000000000 },
+    { 0x4a8c8b65, 0000000000 },
+    { 0x4aef4af6, 0000000000 },
+    { 0x4ae14a4a, 0000000000 },
+    { 0xe4979797, 0000000000 },
+    { 0xdb4aebdd, 0000000000 },
+    { 0x9ccc4a4a, 0000000000 },
+    { 0xd1989898, 0000000000 },
+    { 0x4a0f9ad6, 0000000000 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000d0012, 0x00000038 },
+    { 0x0000e8b4, 0x00000004 },
+    { 0x000d0014, 0x00000038 },
+    { 0x0000e8b6, 0x00000004 },
+    { 0x000d0016, 0x00000038 },
+    { 0x0000e854, 0x00000004 },
+    { 0x000d0018, 0x00000038 },
+    { 0x0000e855, 0x00000004 },
+    { 0x000d001a, 0x00000038 },
+    { 0x0000e856, 0x00000004 },
+    { 0x000d001c, 0x00000038 },
+    { 0x0000e857, 0x00000004 },
+    { 0x000d001e, 0x00000038 },
+    { 0x0000e824, 0x00000004 },
+    { 0x000d0020, 0x00000038 },
+    { 0x0000e825, 0x00000004 },
+    { 0x000d0022, 0x00000038 },
+    { 0x0000e830, 0x00000004 },
+    { 0x000d0024, 0x00000038 },
+    { 0x0000f0c0, 0x00000004 },
+    { 0x000d0026, 0x00000038 },
+    { 0x0000f0c1, 0x00000004 },
+    { 0x000d0028, 0x00000038 },
+    { 0x0000f041, 0x00000004 },
+    { 0x000d002a, 0x00000038 },
+    { 0x0000f184, 0x00000004 },
+    { 0x000d002c, 0x00000038 },
+    { 0x0000f185, 0x00000004 },
+    { 0x000d002e, 0x00000038 },
+    { 0x0000f186, 0x00000004 },
+    { 0x000d0030, 0x00000038 },
+    { 0x0000f187, 0x00000004 },
+    { 0x000d0032, 0x00000038 },
+    { 0x0000f180, 0x00000004 },
+    { 0x000d0034, 0x00000038 },
+    { 0x0000f393, 0x00000004 },
+    { 0x000d0036, 0x00000038 },
+    { 0x0000f38a, 0x00000004 },
+    { 0x000d0038, 0x00000038 },
+    { 0x0000f38e, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000043, 0x00000018 },
+    { 0x00cce800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x0000003a, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x2000451d, 0x00000004 },
+    { 0x0000e580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x08004580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x00000047, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x00032000, 0x00000004 },
+    { 0x00022051, 0x00000028 },
+    { 0x00000051, 0x00000024 },
+    { 0x0800450f, 0x00000004 },
+    { 0x0000a04b, 0x00000008 },
+    { 0x0000e565, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000052, 0x00000008 },
+    { 0x03cca5b4, 0x00000004 },
+    { 0x05432000, 0x00000004 },
+    { 0x00022000, 0x00000004 },
+    { 0x4ccce05e, 0x00000030 },
+    { 0x08274565, 0x00000004 },
+    { 0x0000005e, 0x00000030 },
+    { 0x08004564, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000055, 0x00000008 },
+    { 0x00802061, 0x00000010 },
+    { 0x00202000, 0x00000004 },
+    { 0x001b00ff, 0x00000004 },
+    { 0x01000064, 0x00000010 },
+    { 0x001f2000, 0x00000004 },
+    { 0x001c00ff, 0x00000004 },
+    { 0000000000, 0x0000000c },
+    { 0x00000080, 0x00000030 },
+    { 0x00000055, 0x00000008 },
+    { 0x0000e576, 0x00000004 },
+    { 0x000ca000, 0x00000004 },
+    { 0x00012000, 0x00000004 },
+    { 0x00082000, 0x00000004 },
+    { 0x1800650e, 0x00000004 },
+    { 0x00092000, 0x00000004 },
+    { 0x000a2000, 0x00000004 },
+    { 0x000f0000, 0x00000004 },
+    { 0x00400000, 0x00000004 },
+    { 0x00000074, 0x00000018 },
+    { 0x0000e563, 0x00000004 },
+    { 0x00c0e5f9, 0x000000c2 },
+    { 0x00000069, 0x00000008 },
+    { 0x0000a069, 0x00000008 },
+    { 0x0000e576, 0x00000004 },
+    { 0x0000e577, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x0000e50f, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000077, 0x00000018 },
+    { 0x00c0e5f9, 0x000000c2 },
+    { 0x00000077, 0x00000008 },
+    { 0x0014e50e, 0x00000004 },
+    { 0x0040e50f, 0x00000004 },
+    { 0x00c0007a, 0x00000008 },
+    { 0x0000e570, 0x00000004 },
+    { 0x0000e571, 0x00000004 },
+    { 0x0000e572, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x0000e568, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00000084, 0x00000018 },
+    { 0x000b0000, 0x00000004 },
+    { 0x18c0e562, 0x00000004 },
+    { 0x00000086, 0x00000008 },
+    { 0x00c00085, 0x00000008 },
+    { 0x000700e3, 0x00000004 },
+    { 0x00000092, 0x00000038 },
+    { 0x000ca094, 0x00000030 },
+    { 0x080045bb, 0x00000004 },
+    { 0x000c2095, 0x00000030 },
+    { 0x0800e5bc, 0000000000 },
+    { 0x0000e5bb, 0x00000004 },
+    { 0x0000e5bc, 0000000000 },
+    { 0x00120000, 0x0000000c },
+    { 0x00120000, 0x00000004 },
+    { 0x001b0002, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e800, 0000000000 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e82e, 0000000000 },
+    { 0x02cca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000ce1cc, 0x00000004 },
+    { 0x050de1cd, 0x00000004 },
+    { 0x00400000, 0x00000004 },
+    { 0x000000a4, 0x00000018 },
+    { 0x00c0a000, 0x00000004 },
+    { 0x000000a1, 0x00000008 },
+    { 0x000000a6, 0x00000020 },
+    { 0x4200e000, 0000000000 },
+    { 0x000000ad, 0x00000038 },
+    { 0x000ca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00160000, 0x00000004 },
+    { 0x700ce000, 0x00000004 },
+    { 0x001400a9, 0x00000008 },
+    { 0x4000e000, 0000000000 },
+    { 0x02400000, 0x00000004 },
+    { 0x400ee000, 0x00000004 },
+    { 0x02400000, 0x00000004 },
+    { 0x4000e000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0240e51b, 0x00000004 },
+    { 0x0080e50a, 0x00000005 },
+    { 0x0080e50b, 0x00000005 },
+    { 0x00220000, 0x00000004 },
+    { 0x000700e3, 0x00000004 },
+    { 0x000000c0, 0x00000038 },
+    { 0x000c2095, 0x00000030 },
+    { 0x0880e5bd, 0x00000005 },
+    { 0x000c2094, 0x00000030 },
+    { 0x0800e5bb, 0x00000005 },
+    { 0x000c2095, 0x00000030 },
+    { 0x0880e5bc, 0x00000005 },
+    { 0x000000c3, 0x00000008 },
+    { 0x0080e5bd, 0x00000005 },
+    { 0x0000e5bb, 0x00000005 },
+    { 0x0080e5bc, 0x00000005 },
+    { 0x00210000, 0x00000004 },
+    { 0x02800000, 0x00000004 },
+    { 0x00c000c7, 0x00000018 },
+    { 0x4180e000, 0x00000040 },
+    { 0x000000c9, 0x00000024 },
+    { 0x01000000, 0x0000000c },
+    { 0x0100e51d, 0x0000000c },
+    { 0x000045bb, 0x00000004 },
+    { 0x000080c3, 0x00000008 },
+    { 0x0000f3ce, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053cf, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f3d2, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053d3, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f39d, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c0539e, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x03c00830, 0x00000004 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x200045e0, 0x00000004 },
+    { 0x0000e5e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000700e0, 0x00000004 },
+    { 0x0800e394, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x0000e8c4, 0x00000004 },
+    { 0x0000e8c5, 0x00000004 },
+    { 0x0000e8c6, 0x00000004 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000e4, 0x00000008 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000eb, 0x00000008 },
+    { 0x02c02000, 0x00000004 },
+    { 0x00060000, 0x00000004 },
+    { 0x000000f3, 0x00000034 },
+    { 0x000000f0, 0x00000008 },
+    { 0x00008000, 0x00000004 },
+    { 0xc000e000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x001d0018, 0x00000004 },
+    { 0x001a0001, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0x0500a04a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+static const u32 R420_cp_microcode[][2] = {
+    { 0x4200e000, 0000000000 },
+    { 0x4000e000, 0000000000 },
+    { 0x00000099, 0x00000008 },
+    { 0x0000009d, 0x00000008 },
+    { 0x4a554b4a, 0000000000 },
+    { 0x4a4a4467, 0000000000 },
+    { 0x55526f75, 0000000000 },
+    { 0x4a7e7d65, 0000000000 },
+    { 0xd9d3dff6, 0000000000 },
+    { 0x4ac54a4a, 0000000000 },
+    { 0xc8828282, 0000000000 },
+    { 0xbf4acfc1, 0000000000 },
+    { 0x87b04a4a, 0000000000 },
+    { 0xb5838383, 0000000000 },
+    { 0x4a0f85ba, 0000000000 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000d0012, 0x00000038 },
+    { 0x0000e8b4, 0x00000004 },
+    { 0x000d0014, 0x00000038 },
+    { 0x0000e8b6, 0x00000004 },
+    { 0x000d0016, 0x00000038 },
+    { 0x0000e854, 0x00000004 },
+    { 0x000d0018, 0x00000038 },
+    { 0x0000e855, 0x00000004 },
+    { 0x000d001a, 0x00000038 },
+    { 0x0000e856, 0x00000004 },
+    { 0x000d001c, 0x00000038 },
+    { 0x0000e857, 0x00000004 },
+    { 0x000d001e, 0x00000038 },
+    { 0x0000e824, 0x00000004 },
+    { 0x000d0020, 0x00000038 },
+    { 0x0000e825, 0x00000004 },
+    { 0x000d0022, 0x00000038 },
+    { 0x0000e830, 0x00000004 },
+    { 0x000d0024, 0x00000038 },
+    { 0x0000f0c0, 0x00000004 },
+    { 0x000d0026, 0x00000038 },
+    { 0x0000f0c1, 0x00000004 },
+    { 0x000d0028, 0x00000038 },
+    { 0x0000f041, 0x00000004 },
+    { 0x000d002a, 0x00000038 },
+    { 0x0000f184, 0x00000004 },
+    { 0x000d002c, 0x00000038 },
+    { 0x0000f185, 0x00000004 },
+    { 0x000d002e, 0x00000038 },
+    { 0x0000f186, 0x00000004 },
+    { 0x000d0030, 0x00000038 },
+    { 0x0000f187, 0x00000004 },
+    { 0x000d0032, 0x00000038 },
+    { 0x0000f180, 0x00000004 },
+    { 0x000d0034, 0x00000038 },
+    { 0x0000f393, 0x00000004 },
+    { 0x000d0036, 0x00000038 },
+    { 0x0000f38a, 0x00000004 },
+    { 0x000d0038, 0x00000038 },
+    { 0x0000f38e, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000043, 0x00000018 },
+    { 0x00cce800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x0000003a, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x2000451d, 0x00000004 },
+    { 0x0000e580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x08004580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x00000047, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x00032000, 0x00000004 },
+    { 0x00022051, 0x00000028 },
+    { 0x00000051, 0x00000024 },
+    { 0x0800450f, 0x00000004 },
+    { 0x0000a04b, 0x00000008 },
+    { 0x0000e565, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000052, 0x00000008 },
+    { 0x03cca5b4, 0x00000004 },
+    { 0x05432000, 0x00000004 },
+    { 0x00022000, 0x00000004 },
+    { 0x4ccce05e, 0x00000030 },
+    { 0x08274565, 0x00000004 },
+    { 0x0000005e, 0x00000030 },
+    { 0x08004564, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000055, 0x00000008 },
+    { 0x00802061, 0x00000010 },
+    { 0x00202000, 0x00000004 },
+    { 0x001b00ff, 0x00000004 },
+    { 0x01000064, 0x00000010 },
+    { 0x001f2000, 0x00000004 },
+    { 0x001c00ff, 0x00000004 },
+    { 0000000000, 0x0000000c },
+    { 0x00000072, 0x00000030 },
+    { 0x00000055, 0x00000008 },
+    { 0x0000e576, 0x00000004 },
+    { 0x0000e577, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x0000e50f, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000069, 0x00000018 },
+    { 0x00c0e5f9, 0x000000c2 },
+    { 0x00000069, 0x00000008 },
+    { 0x0014e50e, 0x00000004 },
+    { 0x0040e50f, 0x00000004 },
+    { 0x00c0006c, 0x00000008 },
+    { 0x0000e570, 0x00000004 },
+    { 0x0000e571, 0x00000004 },
+    { 0x0000e572, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x0000e568, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00000076, 0x00000018 },
+    { 0x000b0000, 0x00000004 },
+    { 0x18c0e562, 0x00000004 },
+    { 0x00000078, 0x00000008 },
+    { 0x00c00077, 0x00000008 },
+    { 0x000700c7, 0x00000004 },
+    { 0x00000080, 0x00000038 },
+    { 0x0000e5bb, 0x00000004 },
+    { 0x0000e5bc, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e800, 0000000000 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e82e, 0000000000 },
+    { 0x02cca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000ce1cc, 0x00000004 },
+    { 0x050de1cd, 0x00000004 },
+    { 0x00400000, 0x00000004 },
+    { 0x0000008f, 0x00000018 },
+    { 0x00c0a000, 0x00000004 },
+    { 0x0000008c, 0x00000008 },
+    { 0x00000091, 0x00000020 },
+    { 0x4200e000, 0000000000 },
+    { 0x00000098, 0x00000038 },
+    { 0x000ca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00160000, 0x00000004 },
+    { 0x700ce000, 0x00000004 },
+    { 0x00140094, 0x00000008 },
+    { 0x4000e000, 0000000000 },
+    { 0x02400000, 0x00000004 },
+    { 0x400ee000, 0x00000004 },
+    { 0x02400000, 0x00000004 },
+    { 0x4000e000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0240e51b, 0x00000004 },
+    { 0x0080e50a, 0x00000005 },
+    { 0x0080e50b, 0x00000005 },
+    { 0x00220000, 0x00000004 },
+    { 0x000700c7, 0x00000004 },
+    { 0x000000a4, 0x00000038 },
+    { 0x0080e5bd, 0x00000005 },
+    { 0x0000e5bb, 0x00000005 },
+    { 0x0080e5bc, 0x00000005 },
+    { 0x00210000, 0x00000004 },
+    { 0x02800000, 0x00000004 },
+    { 0x00c000ab, 0x00000018 },
+    { 0x4180e000, 0x00000040 },
+    { 0x000000ad, 0x00000024 },
+    { 0x01000000, 0x0000000c },
+    { 0x0100e51d, 0x0000000c },
+    { 0x000045bb, 0x00000004 },
+    { 0x000080a7, 0x00000008 },
+    { 0x0000f3ce, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053cf, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f3d2, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053d3, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f39d, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c0539e, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x03c00830, 0x00000004 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x200045e0, 0x00000004 },
+    { 0x0000e5e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000700c4, 0x00000004 },
+    { 0x0800e394, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x0000e8c4, 0x00000004 },
+    { 0x0000e8c5, 0x00000004 },
+    { 0x0000e8c6, 0x00000004 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000c8, 0x00000008 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000cf, 0x00000008 },
+    { 0x02c02000, 0x00000004 },
+    { 0x00060000, 0x00000004 },
+    { 0x000000d7, 0x00000034 },
+    { 0x000000d4, 0x00000008 },
+    { 0x00008000, 0x00000004 },
+    { 0xc000e000, 0000000000 },
+    { 0x0000e1cc, 0x00000004 },
+    { 0x0500e1cd, 0x00000004 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000000de, 0x00000034 },
+    { 0x000000da, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x0019e1cc, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x0500a000, 0x00000004 },
+    { 0x080041cd, 0x00000004 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x001d0018, 0x00000004 },
+    { 0x001a0001, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0x0500a04a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+static const u32 RS600_cp_microcode[][2] = {
+    { 0x4200e000, 0000000000 },
+    { 0x4000e000, 0000000000 },
+    { 0x000000a0, 0x00000008 },
+    { 0x000000a4, 0x00000008 },
+    { 0x4a554b4a, 0000000000 },
+    { 0x4a4a4467, 0000000000 },
+    { 0x55526f75, 0000000000 },
+    { 0x4a7e7d65, 0000000000 },
+    { 0x4ae74af6, 0000000000 },
+    { 0x4ad34a4a, 0000000000 },
+    { 0xd6898989, 0000000000 },
+    { 0xcd4addcf, 0000000000 },
+    { 0x8ebe4ae2, 0000000000 },
+    { 0xc38a8a8a, 0000000000 },
+    { 0x4a0f8cc8, 0000000000 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000d0012, 0x00000038 },
+    { 0x0000e8b4, 0x00000004 },
+    { 0x000d0014, 0x00000038 },
+    { 0x0000e8b6, 0x00000004 },
+    { 0x000d0016, 0x00000038 },
+    { 0x0000e854, 0x00000004 },
+    { 0x000d0018, 0x00000038 },
+    { 0x0000e855, 0x00000004 },
+    { 0x000d001a, 0x00000038 },
+    { 0x0000e856, 0x00000004 },
+    { 0x000d001c, 0x00000038 },
+    { 0x0000e857, 0x00000004 },
+    { 0x000d001e, 0x00000038 },
+    { 0x0000e824, 0x00000004 },
+    { 0x000d0020, 0x00000038 },
+    { 0x0000e825, 0x00000004 },
+    { 0x000d0022, 0x00000038 },
+    { 0x0000e830, 0x00000004 },
+    { 0x000d0024, 0x00000038 },
+    { 0x0000f0c0, 0x00000004 },
+    { 0x000d0026, 0x00000038 },
+    { 0x0000f0c1, 0x00000004 },
+    { 0x000d0028, 0x00000038 },
+    { 0x0000f041, 0x00000004 },
+    { 0x000d002a, 0x00000038 },
+    { 0x0000f184, 0x00000004 },
+    { 0x000d002c, 0x00000038 },
+    { 0x0000f185, 0x00000004 },
+    { 0x000d002e, 0x00000038 },
+    { 0x0000f186, 0x00000004 },
+    { 0x000d0030, 0x00000038 },
+    { 0x0000f187, 0x00000004 },
+    { 0x000d0032, 0x00000038 },
+    { 0x0000f180, 0x00000004 },
+    { 0x000d0034, 0x00000038 },
+    { 0x0000f393, 0x00000004 },
+    { 0x000d0036, 0x00000038 },
+    { 0x0000f38a, 0x00000004 },
+    { 0x000d0038, 0x00000038 },
+    { 0x0000f38e, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000043, 0x00000018 },
+    { 0x00cce800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x0000003a, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x2000451d, 0x00000004 },
+    { 0x0000e580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x08004580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x00000047, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x00032000, 0x00000004 },
+    { 0x00022051, 0x00000028 },
+    { 0x00000051, 0x00000024 },
+    { 0x0800450f, 0x00000004 },
+    { 0x0000a04b, 0x00000008 },
+    { 0x0000e565, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000052, 0x00000008 },
+    { 0x03cca5b4, 0x00000004 },
+    { 0x05432000, 0x00000004 },
+    { 0x00022000, 0x00000004 },
+    { 0x4ccce05e, 0x00000030 },
+    { 0x08274565, 0x00000004 },
+    { 0x0000005e, 0x00000030 },
+    { 0x08004564, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000055, 0x00000008 },
+    { 0x00802061, 0x00000010 },
+    { 0x00202000, 0x00000004 },
+    { 0x001b00ff, 0x00000004 },
+    { 0x01000064, 0x00000010 },
+    { 0x001f2000, 0x00000004 },
+    { 0x001c00ff, 0x00000004 },
+    { 0000000000, 0x0000000c },
+    { 0x00000072, 0x00000030 },
+    { 0x00000055, 0x00000008 },
+    { 0x0000e576, 0x00000004 },
+    { 0x0000e577, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x0000e50f, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000069, 0x00000018 },
+    { 0x00c0e5f9, 0x000000c2 },
+    { 0x00000069, 0x00000008 },
+    { 0x0014e50e, 0x00000004 },
+    { 0x0040e50f, 0x00000004 },
+    { 0x00c0006c, 0x00000008 },
+    { 0x0000e570, 0x00000004 },
+    { 0x0000e571, 0x00000004 },
+    { 0x0000e572, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x0000e568, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00000076, 0x00000018 },
+    { 0x000b0000, 0x00000004 },
+    { 0x18c0e562, 0x00000004 },
+    { 0x00000078, 0x00000008 },
+    { 0x00c00077, 0x00000008 },
+    { 0x000700d5, 0x00000004 },
+    { 0x00000084, 0x00000038 },
+    { 0x000ca086, 0x00000030 },
+    { 0x080045bb, 0x00000004 },
+    { 0x000c2087, 0x00000030 },
+    { 0x0800e5bc, 0000000000 },
+    { 0x0000e5bb, 0x00000004 },
+    { 0x0000e5bc, 0000000000 },
+    { 0x00120000, 0x0000000c },
+    { 0x00120000, 0x00000004 },
+    { 0x001b0002, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e800, 0000000000 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e82e, 0000000000 },
+    { 0x02cca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000ce1cc, 0x00000004 },
+    { 0x050de1cd, 0x00000004 },
+    { 0x00400000, 0x00000004 },
+    { 0x00000096, 0x00000018 },
+    { 0x00c0a000, 0x00000004 },
+    { 0x00000093, 0x00000008 },
+    { 0x00000098, 0x00000020 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000009f, 0x00000038 },
+    { 0x000ca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00160000, 0x00000004 },
+    { 0x700ce000, 0x00000004 },
+    { 0x0014009b, 0x00000008 },
+    { 0x4000e000, 0000000000 },
+    { 0x02400000, 0x00000004 },
+    { 0x400ee000, 0x00000004 },
+    { 0x02400000, 0x00000004 },
+    { 0x4000e000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0240e51b, 0x00000004 },
+    { 0x0080e50a, 0x00000005 },
+    { 0x0080e50b, 0x00000005 },
+    { 0x00220000, 0x00000004 },
+    { 0x000700d5, 0x00000004 },
+    { 0x000000b2, 0x00000038 },
+    { 0x000c2087, 0x00000030 },
+    { 0x0880e5bd, 0x00000005 },
+    { 0x000c2086, 0x00000030 },
+    { 0x0800e5bb, 0x00000005 },
+    { 0x000c2087, 0x00000030 },
+    { 0x0880e5bc, 0x00000005 },
+    { 0x000000b5, 0x00000008 },
+    { 0x0080e5bd, 0x00000005 },
+    { 0x0000e5bb, 0x00000005 },
+    { 0x0080e5bc, 0x00000005 },
+    { 0x00210000, 0x00000004 },
+    { 0x02800000, 0x00000004 },
+    { 0x00c000b9, 0x00000018 },
+    { 0x4180e000, 0x00000040 },
+    { 0x000000bb, 0x00000024 },
+    { 0x01000000, 0x0000000c },
+    { 0x0100e51d, 0x0000000c },
+    { 0x000045bb, 0x00000004 },
+    { 0x000080b5, 0x00000008 },
+    { 0x0000f3ce, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053cf, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f3d2, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053d3, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f39d, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c0539e, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x03c00830, 0x00000004 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x200045e0, 0x00000004 },
+    { 0x0000e5e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000700d2, 0x00000004 },
+    { 0x0800e394, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x0000e8c4, 0x00000004 },
+    { 0x0000e8c5, 0x00000004 },
+    { 0x0000e8c6, 0x00000004 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000d6, 0x00000008 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000dd, 0x00000008 },
+    { 0x00e00116, 0000000000 },
+    { 0x000700e1, 0x00000004 },
+    { 0x0800401c, 0x00000004 },
+    { 0x200050e7, 0x00000004 },
+    { 0x0000e01d, 0x00000004 },
+    { 0x000000e4, 0x00000008 },
+    { 0x02c02000, 0x00000004 },
+    { 0x00060000, 0x00000004 },
+    { 0x000000eb, 0x00000034 },
+    { 0x000000e8, 0x00000008 },
+    { 0x00008000, 0x00000004 },
+    { 0xc000e000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x001d0018, 0x00000004 },
+    { 0x001a0001, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0x0500a04a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+static const u32 RS690_cp_microcode[][2] = {
+    { 0x000000dd, 0x00000008 },
+    { 0x000000df, 0x00000008 },
+    { 0x000000a0, 0x00000008 },
+    { 0x000000a4, 0x00000008 },
+    { 0x4a554b4a, 0000000000 },
+    { 0x4a4a4467, 0000000000 },
+    { 0x55526f75, 0000000000 },
+    { 0x4a7e7d65, 0000000000 },
+    { 0x4ad74af6, 0000000000 },
+    { 0x4ac94a4a, 0000000000 },
+    { 0xcc898989, 0000000000 },
+    { 0xc34ad3c5, 0000000000 },
+    { 0x8e4a4a4a, 0000000000 },
+    { 0x4a8a8a8a, 0000000000 },
+    { 0x4a0f8c4a, 0000000000 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000d0012, 0x00000038 },
+    { 0x0000e8b4, 0x00000004 },
+    { 0x000d0014, 0x00000038 },
+    { 0x0000e8b6, 0x00000004 },
+    { 0x000d0016, 0x00000038 },
+    { 0x0000e854, 0x00000004 },
+    { 0x000d0018, 0x00000038 },
+    { 0x0000e855, 0x00000004 },
+    { 0x000d001a, 0x00000038 },
+    { 0x0000e856, 0x00000004 },
+    { 0x000d001c, 0x00000038 },
+    { 0x0000e857, 0x00000004 },
+    { 0x000d001e, 0x00000038 },
+    { 0x0000e824, 0x00000004 },
+    { 0x000d0020, 0x00000038 },
+    { 0x0000e825, 0x00000004 },
+    { 0x000d0022, 0x00000038 },
+    { 0x0000e830, 0x00000004 },
+    { 0x000d0024, 0x00000038 },
+    { 0x0000f0c0, 0x00000004 },
+    { 0x000d0026, 0x00000038 },
+    { 0x0000f0c1, 0x00000004 },
+    { 0x000d0028, 0x00000038 },
+    { 0x0000f041, 0x00000004 },
+    { 0x000d002a, 0x00000038 },
+    { 0x0000f184, 0x00000004 },
+    { 0x000d002c, 0x00000038 },
+    { 0x0000f185, 0x00000004 },
+    { 0x000d002e, 0x00000038 },
+    { 0x0000f186, 0x00000004 },
+    { 0x000d0030, 0x00000038 },
+    { 0x0000f187, 0x00000004 },
+    { 0x000d0032, 0x00000038 },
+    { 0x0000f180, 0x00000004 },
+    { 0x000d0034, 0x00000038 },
+    { 0x0000f393, 0x00000004 },
+    { 0x000d0036, 0x00000038 },
+    { 0x0000f38a, 0x00000004 },
+    { 0x000d0038, 0x00000038 },
+    { 0x0000f38e, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000043, 0x00000018 },
+    { 0x00cce800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x0000003a, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x2000451d, 0x00000004 },
+    { 0x0000e580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x08004580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x00000047, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x00032000, 0x00000004 },
+    { 0x00022051, 0x00000028 },
+    { 0x00000051, 0x00000024 },
+    { 0x0800450f, 0x00000004 },
+    { 0x0000a04b, 0x00000008 },
+    { 0x0000e565, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000052, 0x00000008 },
+    { 0x03cca5b4, 0x00000004 },
+    { 0x05432000, 0x00000004 },
+    { 0x00022000, 0x00000004 },
+    { 0x4ccce05e, 0x00000030 },
+    { 0x08274565, 0x00000004 },
+    { 0x0000005e, 0x00000030 },
+    { 0x08004564, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000055, 0x00000008 },
+    { 0x00802061, 0x00000010 },
+    { 0x00202000, 0x00000004 },
+    { 0x001b00ff, 0x00000004 },
+    { 0x01000064, 0x00000010 },
+    { 0x001f2000, 0x00000004 },
+    { 0x001c00ff, 0x00000004 },
+    { 0000000000, 0x0000000c },
+    { 0x00000072, 0x00000030 },
+    { 0x00000055, 0x00000008 },
+    { 0x0000e576, 0x00000004 },
+    { 0x0000e577, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x0000e50f, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000069, 0x00000018 },
+    { 0x00c0e5f9, 0x000000c2 },
+    { 0x00000069, 0x00000008 },
+    { 0x0014e50e, 0x00000004 },
+    { 0x0040e50f, 0x00000004 },
+    { 0x00c0006c, 0x00000008 },
+    { 0x0000e570, 0x00000004 },
+    { 0x0000e571, 0x00000004 },
+    { 0x0000e572, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x0000e568, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00000076, 0x00000018 },
+    { 0x000b0000, 0x00000004 },
+    { 0x18c0e562, 0x00000004 },
+    { 0x00000078, 0x00000008 },
+    { 0x00c00077, 0x00000008 },
+    { 0x000700cb, 0x00000004 },
+    { 0x00000084, 0x00000038 },
+    { 0x000ca086, 0x00000030 },
+    { 0x080045bb, 0x00000004 },
+    { 0x000c2087, 0x00000030 },
+    { 0x0800e5bc, 0000000000 },
+    { 0x0000e5bb, 0x00000004 },
+    { 0x0000e5bc, 0000000000 },
+    { 0x00120000, 0x0000000c },
+    { 0x00120000, 0x00000004 },
+    { 0x001b0002, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e800, 0000000000 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e82e, 0000000000 },
+    { 0x02cca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000ce1cc, 0x00000004 },
+    { 0x050de1cd, 0x00000004 },
+    { 0x00400000, 0x00000004 },
+    { 0x00000096, 0x00000018 },
+    { 0x00c0a000, 0x00000004 },
+    { 0x00000093, 0x00000008 },
+    { 0x00000098, 0x00000020 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000009f, 0x00000038 },
+    { 0x000ca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00160000, 0x00000004 },
+    { 0x700ce000, 0x00000004 },
+    { 0x0014009b, 0x00000008 },
+    { 0x4000e000, 0000000000 },
+    { 0x02400000, 0x00000004 },
+    { 0x400ee000, 0x00000004 },
+    { 0x02400000, 0x00000004 },
+    { 0x4000e000, 0000000000 },
+    { 0x00100000, 0x0000002c },
+    { 0x00004000, 0000000000 },
+    { 0x080045c8, 0x00000004 },
+    { 0x00240005, 0x00000004 },
+    { 0x08004d0b, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0240e51b, 0x00000004 },
+    { 0x0080e50a, 0x00000005 },
+    { 0x0080e50b, 0x00000005 },
+    { 0x00220000, 0x00000004 },
+    { 0x000700cb, 0x00000004 },
+    { 0x000000b7, 0x00000038 },
+    { 0x000c2087, 0x00000030 },
+    { 0x0880e5bd, 0x00000005 },
+    { 0x000c2086, 0x00000030 },
+    { 0x0800e5bb, 0x00000005 },
+    { 0x000c2087, 0x00000030 },
+    { 0x0880e5bc, 0x00000005 },
+    { 0x000000ba, 0x00000008 },
+    { 0x0080e5bd, 0x00000005 },
+    { 0x0000e5bb, 0x00000005 },
+    { 0x0080e5bc, 0x00000005 },
+    { 0x00210000, 0x00000004 },
+    { 0x02800000, 0x00000004 },
+    { 0x00c000be, 0x00000018 },
+    { 0x4180e000, 0x00000040 },
+    { 0x000000c0, 0x00000024 },
+    { 0x01000000, 0x0000000c },
+    { 0x0100e51d, 0x0000000c },
+    { 0x000045bb, 0x00000004 },
+    { 0x000080ba, 0x00000008 },
+    { 0x03c00830, 0x00000004 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x200045e0, 0x00000004 },
+    { 0x0000e5e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000700c8, 0x00000004 },
+    { 0x0800e394, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x0000e8c4, 0x00000004 },
+    { 0x0000e8c5, 0x00000004 },
+    { 0x0000e8c6, 0x00000004 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000cc, 0x00000008 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000d3, 0x00000008 },
+    { 0x02c02000, 0x00000004 },
+    { 0x00060000, 0x00000004 },
+    { 0x000000db, 0x00000034 },
+    { 0x000000d8, 0x00000008 },
+    { 0x00008000, 0x00000004 },
+    { 0xc000e000, 0000000000 },
+    { 0x000000e1, 0x00000030 },
+    { 0x4200e000, 0000000000 },
+    { 0x000000e1, 0x00000030 },
+    { 0x4000e000, 0000000000 },
+    { 0x0025001b, 0x00000004 },
+    { 0x00230000, 0x00000004 },
+    { 0x00250005, 0x00000004 },
+    { 0x000000e6, 0x00000034 },
+    { 0000000000, 0x0000000c },
+    { 0x00244000, 0x00000004 },
+    { 0x080045c8, 0x00000004 },
+    { 0x00240005, 0x00000004 },
+    { 0x08004d0b, 0x0000000c },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x001d0018, 0x00000004 },
+    { 0x001a0001, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0x0500a04a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+static const u32 R520_cp_microcode[][2] = {
+    { 0x4200e000, 0000000000 },
+    { 0x4000e000, 0000000000 },
+    { 0x00000099, 0x00000008 },
+    { 0x0000009d, 0x00000008 },
+    { 0x4a554b4a, 0000000000 },
+    { 0x4a4a4467, 0000000000 },
+    { 0x55526f75, 0000000000 },
+    { 0x4a7e7d65, 0000000000 },
+    { 0xe0dae6f6, 0000000000 },
+    { 0x4ac54a4a, 0000000000 },
+    { 0xc8828282, 0000000000 },
+    { 0xbf4acfc1, 0000000000 },
+    { 0x87b04ad5, 0000000000 },
+    { 0xb5838383, 0000000000 },
+    { 0x4a0f85ba, 0000000000 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000d0012, 0x00000038 },
+    { 0x0000e8b4, 0x00000004 },
+    { 0x000d0014, 0x00000038 },
+    { 0x0000e8b6, 0x00000004 },
+    { 0x000d0016, 0x00000038 },
+    { 0x0000e854, 0x00000004 },
+    { 0x000d0018, 0x00000038 },
+    { 0x0000e855, 0x00000004 },
+    { 0x000d001a, 0x00000038 },
+    { 0x0000e856, 0x00000004 },
+    { 0x000d001c, 0x00000038 },
+    { 0x0000e857, 0x00000004 },
+    { 0x000d001e, 0x00000038 },
+    { 0x0000e824, 0x00000004 },
+    { 0x000d0020, 0x00000038 },
+    { 0x0000e825, 0x00000004 },
+    { 0x000d0022, 0x00000038 },
+    { 0x0000e830, 0x00000004 },
+    { 0x000d0024, 0x00000038 },
+    { 0x0000f0c0, 0x00000004 },
+    { 0x000d0026, 0x00000038 },
+    { 0x0000f0c1, 0x00000004 },
+    { 0x000d0028, 0x00000038 },
+    { 0x0000e000, 0x00000004 },
+    { 0x000d002a, 0x00000038 },
+    { 0x0000e000, 0x00000004 },
+    { 0x000d002c, 0x00000038 },
+    { 0x0000e000, 0x00000004 },
+    { 0x000d002e, 0x00000038 },
+    { 0x0000e000, 0x00000004 },
+    { 0x000d0030, 0x00000038 },
+    { 0x0000e000, 0x00000004 },
+    { 0x000d0032, 0x00000038 },
+    { 0x0000f180, 0x00000004 },
+    { 0x000d0034, 0x00000038 },
+    { 0x0000f393, 0x00000004 },
+    { 0x000d0036, 0x00000038 },
+    { 0x0000f38a, 0x00000004 },
+    { 0x000d0038, 0x00000038 },
+    { 0x0000f38e, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000043, 0x00000018 },
+    { 0x00cce800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x08004800, 0x00000004 },
+    { 0x0000003a, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x2000451d, 0x00000004 },
+    { 0x0000e580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x08004580, 0x00000004 },
+    { 0x000ce581, 0x00000004 },
+    { 0x00000047, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x00032000, 0x00000004 },
+    { 0x00022051, 0x00000028 },
+    { 0x00000051, 0x00000024 },
+    { 0x0800450f, 0x00000004 },
+    { 0x0000a04b, 0x00000008 },
+    { 0x0000e565, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000052, 0x00000008 },
+    { 0x03cca5b4, 0x00000004 },
+    { 0x05432000, 0x00000004 },
+    { 0x00022000, 0x00000004 },
+    { 0x4ccce05e, 0x00000030 },
+    { 0x08274565, 0x00000004 },
+    { 0x0000005e, 0x00000030 },
+    { 0x08004564, 0x00000004 },
+    { 0x0000e566, 0x00000004 },
+    { 0x00000055, 0x00000008 },
+    { 0x00802061, 0x00000010 },
+    { 0x00202000, 0x00000004 },
+    { 0x001b00ff, 0x00000004 },
+    { 0x01000064, 0x00000010 },
+    { 0x001f2000, 0x00000004 },
+    { 0x001c00ff, 0x00000004 },
+    { 0000000000, 0x0000000c },
+    { 0x00000072, 0x00000030 },
+    { 0x00000055, 0x00000008 },
+    { 0x0000e576, 0x00000004 },
+    { 0x0000e577, 0x00000004 },
+    { 0x0000e50e, 0x00000004 },
+    { 0x0000e50f, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00000069, 0x00000018 },
+    { 0x00c0e5f9, 0x000000c2 },
+    { 0x00000069, 0x00000008 },
+    { 0x0014e50e, 0x00000004 },
+    { 0x0040e50f, 0x00000004 },
+    { 0x00c0006c, 0x00000008 },
+    { 0x0000e570, 0x00000004 },
+    { 0x0000e571, 0x00000004 },
+    { 0x0000e572, 0x0000000c },
+    { 0x0000a000, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x0000e568, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00000076, 0x00000018 },
+    { 0x000b0000, 0x00000004 },
+    { 0x18c0e562, 0x00000004 },
+    { 0x00000078, 0x00000008 },
+    { 0x00c00077, 0x00000008 },
+    { 0x000700c7, 0x00000004 },
+    { 0x00000080, 0x00000038 },
+    { 0x0000e5bb, 0x00000004 },
+    { 0x0000e5bc, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e800, 0000000000 },
+    { 0x0000e821, 0x00000004 },
+    { 0x0000e82e, 0000000000 },
+    { 0x02cca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000ce1cc, 0x00000004 },
+    { 0x050de1cd, 0x00000004 },
+    { 0x00400000, 0x00000004 },
+    { 0x0000008f, 0x00000018 },
+    { 0x00c0a000, 0x00000004 },
+    { 0x0000008c, 0x00000008 },
+    { 0x00000091, 0x00000020 },
+    { 0x4200e000, 0000000000 },
+    { 0x00000098, 0x00000038 },
+    { 0x000ca000, 0x00000004 },
+    { 0x00140000, 0x00000004 },
+    { 0x000c2000, 0x00000004 },
+    { 0x00160000, 0x00000004 },
+    { 0x700ce000, 0x00000004 },
+    { 0x00140094, 0x00000008 },
+    { 0x4000e000, 0000000000 },
+    { 0x02400000, 0x00000004 },
+    { 0x400ee000, 0x00000004 },
+    { 0x02400000, 0x00000004 },
+    { 0x4000e000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x0240e51b, 0x00000004 },
+    { 0x0080e50a, 0x00000005 },
+    { 0x0080e50b, 0x00000005 },
+    { 0x00220000, 0x00000004 },
+    { 0x000700c7, 0x00000004 },
+    { 0x000000a4, 0x00000038 },
+    { 0x0080e5bd, 0x00000005 },
+    { 0x0000e5bb, 0x00000005 },
+    { 0x0080e5bc, 0x00000005 },
+    { 0x00210000, 0x00000004 },
+    { 0x02800000, 0x00000004 },
+    { 0x00c000ab, 0x00000018 },
+    { 0x4180e000, 0x00000040 },
+    { 0x000000ad, 0x00000024 },
+    { 0x01000000, 0x0000000c },
+    { 0x0100e51d, 0x0000000c },
+    { 0x000045bb, 0x00000004 },
+    { 0x000080a7, 0x00000008 },
+    { 0x0000f3ce, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053cf, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f3d2, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c053d3, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x0000f39d, 0x00000004 },
+    { 0x0140a000, 0x00000004 },
+    { 0x00cc2000, 0x00000004 },
+    { 0x08c0539e, 0x00000040 },
+    { 0x00008000, 0000000000 },
+    { 0x03c00830, 0x00000004 },
+    { 0x4200e000, 0000000000 },
+    { 0x0000a000, 0x00000004 },
+    { 0x200045e0, 0x00000004 },
+    { 0x0000e5e1, 0000000000 },
+    { 0x00000001, 0000000000 },
+    { 0x000700c4, 0x00000004 },
+    { 0x0800e394, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x0000e8c4, 0x00000004 },
+    { 0x0000e8c5, 0x00000004 },
+    { 0x0000e8c6, 0x00000004 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000c8, 0x00000008 },
+    { 0x0000e928, 0x00000004 },
+    { 0x0000e929, 0x00000004 },
+    { 0x0000e92a, 0x00000004 },
+    { 0x000000cf, 0x00000008 },
+    { 0xdeadbeef, 0000000000 },
+    { 0x00000116, 0000000000 },
+    { 0x000700d3, 0x00000004 },
+    { 0x080050e7, 0x00000004 },
+    { 0x000700d4, 0x00000004 },
+    { 0x0800401c, 0x00000004 },
+    { 0x0000e01d, 0000000000 },
+    { 0x02c02000, 0x00000004 },
+    { 0x00060000, 0x00000004 },
+    { 0x000000de, 0x00000034 },
+    { 0x000000db, 0x00000008 },
+    { 0x00008000, 0x00000004 },
+    { 0xc000e000, 0000000000 },
+    { 0x0000e1cc, 0x00000004 },
+    { 0x0500e1cd, 0x00000004 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000000e5, 0x00000034 },
+    { 0x000000e1, 0x00000008 },
+    { 0x0000a000, 0000000000 },
+    { 0x0019e1cc, 0x00000004 },
+    { 0x001b0001, 0x00000004 },
+    { 0x0500a000, 0x00000004 },
+    { 0x080041cd, 0x00000004 },
+    { 0x000ca000, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0x000c2000, 0x00000004 },
+    { 0x001d0018, 0x00000004 },
+    { 0x001a0001, 0x00000004 },
+    { 0x000000fb, 0x00000034 },
+    { 0x0000004a, 0x00000008 },
+    { 0x0500a04a, 0x00000008 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+    { 0000000000, 0000000000 },
+};
+
+
+#endif
diff --git a/drivers/char/drm/radeon_state.c b/drivers/char/drm/radeon_state.c
index 6f75512f591e..11c146b49211 100644
--- a/drivers/char/drm/radeon_state.c
+++ b/drivers/char/drm/radeon_state.c
@@ -1662,7 +1662,7 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
         u32 height;
         int i;
         u32 texpitch, microtile;
-        u32 offset;
+        u32 offset, byte_offset;
         RING_LOCALS;
 
         if (radeon_check_and_fixup_offset(dev_priv, file_priv, &tex->offset)) {
@@ -1727,6 +1727,13 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
         } else
                 microtile = 0;
 
+        /* this might fail for zero-sized uploads - are those illegal? */
+        if (!radeon_check_offset(dev_priv, tex->offset + image->height *
+                                blit_width - 1)) {
+                DRM_ERROR("Invalid final destination offset\n");
+                return -EINVAL;
+        }
+
         DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width);
 
         do {
@@ -1840,6 +1847,7 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
                 }
 
 #undef RADEON_COPY_MT
+                byte_offset = (image->y & ~2047) * blit_width;
                 buf->file_priv = file_priv;
                 buf->used = size;
                 offset = dev_priv->gart_buffers_offset + buf->offset;
@@ -1854,9 +1862,9 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
                          RADEON_DP_SRC_SOURCE_MEMORY |
                          RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
                 OUT_RING((spitch << 22) | (offset >> 10));
-                OUT_RING((texpitch << 22) | (tex->offset >> 10));
+                OUT_RING((texpitch << 22) | ((tex->offset >> 10) + (byte_offset >> 10)));
                 OUT_RING(0);
-                OUT_RING((image->x << 16) | image->y);
+                OUT_RING((image->x << 16) | (image->y % 2048));
                 OUT_RING((image->width << 16) | height);
                 RADEON_WAIT_UNTIL_2D_IDLE();
                 ADVANCE_RING();
@@ -3037,6 +3045,9 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
         case RADEON_PARAM_FB_LOCATION:
                 value = radeon_read_fb_location(dev_priv);
                 break;
+        case RADEON_PARAM_NUM_GB_PIPES:
+                value = dev_priv->num_gb_pipes;
+                break;
         default:
                 DRM_DEBUG("Invalid parameter %d\n", param->param);
                 return -EINVAL;
diff --git a/drivers/char/tty_ioctl.c b/drivers/char/tty_ioctl.c
index b1a757a5ee27..8f81139d6194 100644
--- a/drivers/char/tty_ioctl.c
+++ b/drivers/char/tty_ioctl.c
@@ -981,16 +981,9 @@ EXPORT_SYMBOL_GPL(tty_perform_flush);
 int n_tty_ioctl(struct tty_struct *tty, struct file *file,
                        unsigned int cmd, unsigned long arg)
 {
-        struct tty_struct *real_tty;
         unsigned long flags;
         int retval;
 
-        if (tty->driver->type == TTY_DRIVER_TYPE_PTY &&
-            tty->driver->subtype == PTY_TYPE_MASTER)
-                real_tty = tty->link;
-        else
-                real_tty = tty;
-
         switch (cmd) {
         case TCXONC:
                 retval = tty_check_change(tty);
diff --git a/drivers/firewire/Kconfig b/drivers/firewire/Kconfig
index fb4d391810b6..76f26710fc16 100644
--- a/drivers/firewire/Kconfig
+++ b/drivers/firewire/Kconfig
@@ -1,28 +1,26 @@
-comment "An alternative FireWire stack is available with EXPERIMENTAL=y"
+comment "A new alternative FireWire stack is available with EXPERIMENTAL=y"
         depends on EXPERIMENTAL=n
 
+comment "Enable only one of the two stacks, unless you know what you are doing"
+        depends on EXPERIMENTAL
+
 config FIREWIRE
-        tristate "IEEE 1394 (FireWire) support - alternative stack, EXPERIMENTAL"
+        tristate "New FireWire stack, EXPERIMENTAL"
         depends on EXPERIMENTAL
         select CRC_ITU_T
         help
           This is the "Juju" FireWire stack, a new alternative implementation
           designed for robustness and simplicity.  You can build either this
-          stack, or the classic stack (the ieee1394 driver, ohci1394 etc.)
-          or both.  Please read http://wiki.linux1394.org/JujuMigration before
-          you enable the new stack.
+          stack, or the old stack (the ieee1394 driver, ohci1394 etc.) or both.
+          Please read http://wiki.linux1394.org/JujuMigration before you
+          enable the new stack.
 
           To compile this driver as a module, say M here: the module will be
           called firewire-core.  It functionally replaces ieee1394, raw1394,
           and video1394.
 
-          NOTE:
-
-          You should only build ONE of the stacks, unless you REALLY know what
-          you are doing.
-
 config FIREWIRE_OHCI
-        tristate "Support for OHCI FireWire host controllers"
+        tristate "OHCI-1394 controllers"
         depends on PCI && FIREWIRE
         help
           Enable this driver if you have a FireWire controller based
@@ -33,12 +31,12 @@ config FIREWIRE_OHCI
           called firewire-ohci.  It replaces ohci1394 of the classic IEEE 1394
           stack.
 
-          NOTE:
+          NOTE:
 
-          You should only build ohci1394 or firewire-ohci, but not both.
-          If you nevertheless want to install both, you should configure them
-          only as modules and blacklist the driver(s) which you don't want to
-          have auto-loaded.  Add either
+          You should only build either firewire-ohci or the old ohci1394 driver,
+          but not both.  If you nevertheless want to install both, you should
+          configure them only as modules and blacklist the driver(s) which you
+          don't want to have auto-loaded.  Add either
 
               blacklist firewire-ohci
           or
@@ -60,7 +58,7 @@ config FIREWIRE_OHCI_DEBUG
         default y
 
 config FIREWIRE_SBP2
-        tristate "Support for storage devices (SBP-2 protocol driver)"
+        tristate "Storage devices (SBP-2 protocol)"
         depends on FIREWIRE && SCSI
         help
           This option enables you to use SBP-2 devices connected to a
diff --git a/drivers/firewire/fw-cdev.c b/drivers/firewire/fw-cdev.c
index dda14015e873..c639915fc3cb 100644
--- a/drivers/firewire/fw-cdev.c
+++ b/drivers/firewire/fw-cdev.c
@@ -205,6 +205,7 @@ fw_device_op_read(struct file *file,
         return dequeue_event(client, buffer, count);
 }
 
+/* caller must hold card->lock so that node pointers can be dereferenced here */
 static void
 fill_bus_reset_event(struct fw_cdev_event_bus_reset *event,
                      struct client *client)
@@ -214,7 +215,6 @@ fill_bus_reset_event(struct fw_cdev_event_bus_reset *event,
         event->closure       = client->bus_reset_closure;
         event->type          = FW_CDEV_EVENT_BUS_RESET;
         event->generation    = client->device->generation;
-        smp_rmb();           /* node_id must not be older than generation */
         event->node_id       = client->device->node_id;
         event->local_node_id = card->local_node->node_id;
         event->bm_node_id    = 0; /* FIXME: We don't track the BM. */
@@ -274,6 +274,7 @@ static int ioctl_get_info(struct client *client, void *buffer)
 {
         struct fw_cdev_get_info *get_info = buffer;
         struct fw_cdev_event_bus_reset bus_reset;
+        struct fw_card *card = client->device->card;
         unsigned long ret = 0;
 
         client->version = get_info->version;
@@ -299,13 +300,17 @@ static int ioctl_get_info(struct client *client, void *buffer)
         client->bus_reset_closure = get_info->bus_reset_closure;
         if (get_info->bus_reset != 0) {
                 void __user *uptr = u64_to_uptr(get_info->bus_reset);
+                unsigned long flags;
 
+                spin_lock_irqsave(&card->lock, flags);
                 fill_bus_reset_event(&bus_reset, client);
+                spin_unlock_irqrestore(&card->lock, flags);
+
                 if (copy_to_user(uptr, &bus_reset, sizeof(bus_reset)))
                         return -EFAULT;
         }
 
-        get_info->card = client->device->card->index;
+        get_info->card = card->index;
 
         return 0;
 }
diff --git a/drivers/firewire/fw-ohci.c b/drivers/firewire/fw-ohci.c
index 4f02c55f13e1..0b66306af479 100644
--- a/drivers/firewire/fw-ohci.c
+++ b/drivers/firewire/fw-ohci.c
@@ -265,27 +265,25 @@ static void log_irqs(u32 evt)
             !(evt & OHCI1394_busReset))
                 return;
 
-        printk(KERN_DEBUG KBUILD_MODNAME ": IRQ "
-               "%08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
-               evt,
-               evt & OHCI1394_selfIDComplete    ? " selfID"             : "",
-               evt & OHCI1394_RQPkt             ? " AR_req"             : "",
-               evt & OHCI1394_RSPkt             ? " AR_resp"            : "",
-               evt & OHCI1394_reqTxComplete     ? " AT_req"             : "",
-               evt & OHCI1394_respTxComplete    ? " AT_resp"            : "",
-               evt & OHCI1394_isochRx           ? " IR"                 : "",
-               evt & OHCI1394_isochTx           ? " IT"                 : "",
-               evt & OHCI1394_postedWriteErr    ? " postedWriteErr"     : "",
-               evt & OHCI1394_cycleTooLong      ? " cycleTooLong"       : "",
-               evt & OHCI1394_cycle64Seconds    ? " cycle64Seconds"     : "",
-               evt & OHCI1394_regAccessFail     ? " regAccessFail"      : "",
-               evt & OHCI1394_busReset          ? " busReset"           : "",
-               evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt |
-                       OHCI1394_RSPkt | OHCI1394_reqTxComplete |
-                       OHCI1394_respTxComplete | OHCI1394_isochRx |
-                       OHCI1394_isochTx | OHCI1394_postedWriteErr |
-                       OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds |
-                       OHCI1394_regAccessFail | OHCI1394_busReset)
+        fw_notify("IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt,
+            evt & OHCI1394_selfIDComplete       ? " selfID"             : "",
+            evt & OHCI1394_RQPkt                ? " AR_req"             : "",
+            evt & OHCI1394_RSPkt                ? " AR_resp"            : "",
+            evt & OHCI1394_reqTxComplete        ? " AT_req"             : "",
+            evt & OHCI1394_respTxComplete       ? " AT_resp"            : "",
+            evt & OHCI1394_isochRx              ? " IR"                 : "",
+            evt & OHCI1394_isochTx              ? " IT"                 : "",
+            evt & OHCI1394_postedWriteErr       ? " postedWriteErr"     : "",
+            evt & OHCI1394_cycleTooLong         ? " cycleTooLong"       : "",
+            evt & OHCI1394_cycle64Seconds       ? " cycle64Seconds"     : "",
+            evt & OHCI1394_regAccessFail        ? " regAccessFail"      : "",
+            evt & OHCI1394_busReset             ? " busReset"           : "",
+            evt & ~(OHCI1394_selfIDComplete | OHCI1394_RQPkt |
+                    OHCI1394_RSPkt | OHCI1394_reqTxComplete |
+                    OHCI1394_respTxComplete | OHCI1394_isochRx |
+                    OHCI1394_isochTx | OHCI1394_postedWriteErr |
+                    OHCI1394_cycleTooLong | OHCI1394_cycle64Seconds |
+                    OHCI1394_regAccessFail | OHCI1394_busReset)
                                                 ? " ?"                  : "");
 }
 
@@ -308,23 +306,22 @@ static void log_selfids(int node_id, int generation, int self_id_count, u32 *s)
         if (likely(!(param_debug & OHCI_PARAM_DEBUG_SELFIDS)))
                 return;
 
-        printk(KERN_DEBUG KBUILD_MODNAME ": %d selfIDs, generation %d, "
-               "local node ID %04x\n", self_id_count, generation, node_id);
+        fw_notify("%d selfIDs, generation %d, local node ID %04x\n",
+                  self_id_count, generation, node_id);
 
         for (; self_id_count--; ++s)
                 if ((*s & 1 << 23) == 0)
-                        printk(KERN_DEBUG "selfID 0: %08x, phy %d [%c%c%c] "
-                               "%s gc=%d %s %s%s%s\n",
-                               *s, *s >> 24 & 63, _p(s, 6), _p(s, 4), _p(s, 2),
-                               speed[*s >> 14 & 3], *s >> 16 & 63,
-                               power[*s >> 8 & 7], *s >> 22 & 1 ? "L" : "",
-                               *s >> 11 & 1 ? "c" : "", *s & 2 ? "i" : "");
+                        fw_notify("selfID 0: %08x, phy %d [%c%c%c] "
+                            "%s gc=%d %s %s%s%s\n",
+                            *s, *s >> 24 & 63, _p(s, 6), _p(s, 4), _p(s, 2),
+                            speed[*s >> 14 & 3], *s >> 16 & 63,
+                            power[*s >> 8 & 7], *s >> 22 & 1 ? "L" : "",
+                            *s >> 11 & 1 ? "c" : "", *s & 2 ? "i" : "");
                 else
-                        printk(KERN_DEBUG "selfID n: %08x, phy %d "
-                               "[%c%c%c%c%c%c%c%c]\n",
-                               *s, *s >> 24 & 63,
-                               _p(s, 16), _p(s, 14), _p(s, 12), _p(s, 10),
-                               _p(s,  8), _p(s,  6), _p(s,  4), _p(s,  2));
+                        fw_notify("selfID n: %08x, phy %d [%c%c%c%c%c%c%c%c]\n",
+                            *s, *s >> 24 & 63,
+                            _p(s, 16), _p(s, 14), _p(s, 12), _p(s, 10),
+                            _p(s,  8), _p(s,  6), _p(s,  4), _p(s,  2));
 }
 
 static const char *evts[] = {
@@ -373,15 +370,14 @@ static void log_ar_at_event(char dir, int speed, u32 *header, int evt)
                         evt = 0x1f;
 
         if (evt == OHCI1394_evt_bus_reset) {
-                printk(KERN_DEBUG "A%c evt_bus_reset, generation %d\n",
-                       dir, (header[2] >> 16) & 0xff);
+                fw_notify("A%c evt_bus_reset, generation %d\n",
+                    dir, (header[2] >> 16) & 0xff);
                 return;
         }
 
         if (header[0] == ~header[1]) {
-                printk(KERN_DEBUG "A%c %s, %s, %08x\n",
-                       dir, evts[evt], phys[header[0] >> 30 & 0x3],
-                       header[0]);
+                fw_notify("A%c %s, %s, %08x\n",
+                    dir, evts[evt], phys[header[0] >> 30 & 0x3], header[0]);
                 return;
         }
 
@@ -400,24 +396,23 @@ static void log_ar_at_event(char dir, int speed, u32 *header, int evt)
 
         switch (tcode) {
         case 0xe: case 0xa:
-                printk(KERN_DEBUG "A%c %s, %s\n",
-                       dir, evts[evt], tcodes[tcode]);
+                fw_notify("A%c %s, %s\n", dir, evts[evt], tcodes[tcode]);
                 break;
         case 0x0: case 0x1: case 0x4: case 0x5: case 0x9:
-                printk(KERN_DEBUG "A%c spd %x tl %02x, "
-                       "%04x -> %04x, %s, "
-                       "%s, %04x%08x%s\n",
-                       dir, speed, header[0] >> 10 & 0x3f,
-                       header[1] >> 16, header[0] >> 16, evts[evt],
-                       tcodes[tcode], header[1] & 0xffff, header[2], specific);
+                fw_notify("A%c spd %x tl %02x, "
+                    "%04x -> %04x, %s, "
+                    "%s, %04x%08x%s\n",
+                    dir, speed, header[0] >> 10 & 0x3f,
+                    header[1] >> 16, header[0] >> 16, evts[evt],
+                    tcodes[tcode], header[1] & 0xffff, header[2], specific);
                 break;
         default:
-                printk(KERN_DEBUG "A%c spd %x tl %02x, "
-                       "%04x -> %04x, %s, "
-                       "%s%s\n",
-                       dir, speed, header[0] >> 10 & 0x3f,
-                       header[1] >> 16, header[0] >> 16, evts[evt],
-                       tcodes[tcode], specific);
+                fw_notify("A%c spd %x tl %02x, "
+                    "%04x -> %04x, %s, "
+                    "%s%s\n",
+                    dir, speed, header[0] >> 10 & 0x3f,
+                    header[1] >> 16, header[0] >> 16, evts[evt],
+                    tcodes[tcode], specific);
         }
 }
 
@@ -548,6 +543,11 @@ static __le32 *handle_ar_packet(struct ar_context *ctx, __le32 *buffer)
                 p.header_length = 12;
                 p.payload_length = 0;
                 break;
+
+        default:
+                /* FIXME: Stop context, discard everything, and restart? */
+                p.header_length = 0;
+                p.payload_length = 0;
         }
 
         p.payload = (void *) buffer + p.header_length;
@@ -1468,6 +1468,9 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
         reg_write(ohci, OHCI1394_HCControlClear,
                   OHCI1394_HCControl_noByteSwapData);
 
+        reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus);
+        reg_write(ohci, OHCI1394_LinkControlClear,
+                  OHCI1394_LinkControl_rcvPhyPkt);
         reg_write(ohci, OHCI1394_LinkControlSet,
                   OHCI1394_LinkControl_rcvSelfID |
                   OHCI1394_LinkControl_cycleTimerEnable |
@@ -1481,7 +1484,6 @@ static int ohci_enable(struct fw_card *card, u32 *config_rom, size_t length)
         ar_context_run(&ohci->ar_request_ctx);
         ar_context_run(&ohci->ar_response_ctx);
 
-        reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus);
         reg_write(ohci, OHCI1394_PhyUpperBound, 0x00010000);
         reg_write(ohci, OHCI1394_IntEventClear, ~0);
         reg_write(ohci, OHCI1394_IntMaskClear, ~0);
diff --git a/drivers/firewire/fw-transaction.c b/drivers/firewire/fw-transaction.c
index ccf0e4cf108f..03ae8a77c479 100644
--- a/drivers/firewire/fw-transaction.c
+++ b/drivers/firewire/fw-transaction.c
@@ -20,6 +20,7 @@
 
 #include <linux/completion.h>
 #include <linux/kernel.h>
+#include <linux/kref.h>
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -297,37 +298,55 @@ EXPORT_SYMBOL(fw_send_request);
 struct fw_phy_packet {
         struct fw_packet packet;
         struct completion done;
+        struct kref kref;
 };
 
-static void
-transmit_phy_packet_callback(struct fw_packet *packet,
-                             struct fw_card *card, int status)
+static void phy_packet_release(struct kref *kref)
+{
+        struct fw_phy_packet *p =
+                        container_of(kref, struct fw_phy_packet, kref);
+        kfree(p);
+}
+
+static void transmit_phy_packet_callback(struct fw_packet *packet,
+                                         struct fw_card *card, int status)
 {
         struct fw_phy_packet *p =
                         container_of(packet, struct fw_phy_packet, packet);
 
         complete(&p->done);
+        kref_put(&p->kref, phy_packet_release);
 }
 
 void fw_send_phy_config(struct fw_card *card,
                         int node_id, int generation, int gap_count)
 {
-        struct fw_phy_packet p;
+        struct fw_phy_packet *p;
+        long timeout = DIV_ROUND_UP(HZ, 10);
         u32 data = PHY_IDENTIFIER(PHY_PACKET_CONFIG) |
                    PHY_CONFIG_ROOT_ID(node_id) |
                    PHY_CONFIG_GAP_COUNT(gap_count);
 
-        p.packet.header[0] = data;
-        p.packet.header[1] = ~data;
-        p.packet.header_length = 8;
-        p.packet.payload_length = 0;
-        p.packet.speed = SCODE_100;
-        p.packet.generation = generation;
-        p.packet.callback = transmit_phy_packet_callback;
-        init_completion(&p.done);
-
-        card->driver->send_request(card, &p.packet);
-        wait_for_completion(&p.done);
+        p = kmalloc(sizeof(*p), GFP_KERNEL);
+        if (p == NULL)
+                return;
+
+        p->packet.header[0] = data;
+        p->packet.header[1] = ~data;
+        p->packet.header_length = 8;
+        p->packet.payload_length = 0;
+        p->packet.speed = SCODE_100;
+        p->packet.generation = generation;
+        p->packet.callback = transmit_phy_packet_callback;
+        init_completion(&p->done);
+        kref_set(&p->kref, 2);
+
+        card->driver->send_request(card, &p->packet);
+        timeout = wait_for_completion_timeout(&p->done, timeout);
+        kref_put(&p->kref, phy_packet_release);
+
+        /* will leak p if the callback is never executed */
+        WARN_ON(timeout == 0);
 }
 
 void fw_flush_transactions(struct fw_card *card)
@@ -572,7 +591,8 @@ allocate_request(struct fw_packet *p)
                 break;
 
         default:
-                BUG();
+                fw_error("ERROR - corrupt request received - %08x %08x %08x\n",
+                         p->header[0], p->header[1], p->header[2]);
                 return NULL;
         }
 
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c
index ed33fddc4dee..f00f497b9ca9 100644
--- a/drivers/hwmon/abituguru3.c
+++ b/drivers/hwmon/abituguru3.c
@@ -30,6 +30,7 @@
 #include <linux/platform_device.h>
 #include <linux/hwmon.h>
 #include <linux/hwmon-sysfs.h>
+#include <linux/dmi.h>
 #include <asm/io.h>
 
 /* uGuru3 bank addresses */
@@ -323,7 +324,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX1 Fan",           36, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
-        { 0x0013, "unknown", {
+        { 0x0013, "Abit AW8D", {
                 { "CPU Core",            0, 0, 10, 1, 0 },
                 { "DDR",                 1, 0, 10, 1, 0 },
                 { "DDR VTT",             2, 0, 10, 1, 0 },
@@ -349,6 +350,7 @@ static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
                 { "AUX2 Fan",           36, 2, 60, 1, 0 },
                 { "AUX3 Fan",           37, 2, 60, 1, 0 },
                 { "AUX4 Fan",           38, 2, 60, 1, 0 },
+                { "AUX5 Fan",           39, 2, 60, 1, 0 },
                 { NULL, 0, 0, 0, 0, 0 } }
         },
         { 0x0014, "Abit AB9 Pro", {
@@ -1111,11 +1113,12 @@ static int __init abituguru3_detect(void)
 {
         /* See if there is an uguru3 there. An idle uGuru3 will hold 0x00 or
            0x08 at DATA and 0xAC at CMD. Sometimes the uGuru3 will hold 0x05
-           at CMD instead, why is unknown. So we test for 0x05 too. */
+           or 0x55 at CMD instead, why is unknown. */
         u8 data_val = inb_p(ABIT_UGURU3_BASE + ABIT_UGURU3_DATA);
         u8 cmd_val = inb_p(ABIT_UGURU3_BASE + ABIT_UGURU3_CMD);
         if (((data_val == 0x00) || (data_val == 0x08)) &&
-                        ((cmd_val == 0xAC) || (cmd_val == 0x05)))
+                        ((cmd_val == 0xAC) || (cmd_val == 0x05) ||
+                         (cmd_val == 0x55)))
                 return ABIT_UGURU3_BASE;
 
         ABIT_UGURU3_DEBUG("no Abit uGuru3 found, data = 0x%02X, cmd = "
@@ -1138,6 +1141,15 @@ static int __init abituguru3_init(void)
         int address, err;
         struct resource res = { .flags = IORESOURCE_IO };
 
+#ifdef CONFIG_DMI
+        const char *board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
+
+        /* safety check, refuse to load on non Abit motherboards */
+        if (!force && (!board_vendor ||
+                        strcmp(board_vendor, "http://www.abit.com.tw/")))
+                return -ENODEV;
+#endif
+
         address = abituguru3_detect();
         if (address < 0)
                 return address;
diff --git a/drivers/hwmon/adt7473.c b/drivers/hwmon/adt7473.c
index c1009d6f9796..93dbf5e7ff8a 100644
--- a/drivers/hwmon/adt7473.c
+++ b/drivers/hwmon/adt7473.c
@@ -309,6 +309,9 @@ no_sensor_update:
                                                 ADT7473_REG_PWM_BHVR(i));
         }
 
+        i = i2c_smbus_read_byte_data(client, ADT7473_REG_CFG4);
+        data->max_duty_at_overheat = !!(i & ADT7473_CFG4_MAX_DUTY_AT_OVT);
+
         data->limits_last_updated = local_jiffies;
         data->limits_valid = 1;
 
diff --git a/drivers/hwmon/lm75.c b/drivers/hwmon/lm75.c
index fa7696905154..de698dc73020 100644
--- a/drivers/hwmon/lm75.c
+++ b/drivers/hwmon/lm75.c
@@ -251,10 +251,13 @@ static int lm75_detach_client(struct i2c_client *client)
    the SMBus standard. */
 static int lm75_read_value(struct i2c_client *client, u8 reg)
 {
+        int value;
+
         if (reg == LM75_REG_CONF)
                 return i2c_smbus_read_byte_data(client, reg);
-        else
-                return swab16(i2c_smbus_read_word_data(client, reg));
+
+        value = i2c_smbus_read_word_data(client, reg);
+        return (value < 0) ? value : swab16(value);
 }
 
 static int lm75_write_value(struct i2c_client *client, u8 reg, u16 value)
@@ -287,9 +290,16 @@ static struct lm75_data *lm75_update_device(struct device *dev)
                 int i;
                 dev_dbg(&client->dev, "Starting lm75 update\n");
 
-                for (i = 0; i < ARRAY_SIZE(data->temp); i++)
-                        data->temp[i] = lm75_read_value(client,
-                                                        LM75_REG_TEMP[i]);
+                for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
+                        int status;
+
+                        status = lm75_read_value(client, LM75_REG_TEMP[i]);
+                        if (status < 0)
+                                dev_dbg(&client->dev, "reg %d, err %d\n",
+                                                LM75_REG_TEMP[i], status);
+                        else
+                                data->temp[i] = status;
+                }
                 data->last_updated = jiffies;
                 data->valid = 1;
         }
diff --git a/drivers/hwmon/lm85.c b/drivers/hwmon/lm85.c
index 182fe6a5605f..ee5eca1c1921 100644
--- a/drivers/hwmon/lm85.c
+++ b/drivers/hwmon/lm85.c
@@ -192,23 +192,20 @@ static int RANGE_TO_REG( int range )
 {
         int i;
 
-        if ( range < lm85_range_map[0] ) { 
-                return 0 ;
-        } else if ( range > lm85_range_map[15] ) {
+        if (range >= lm85_range_map[15])
                 return 15 ;
-        } else {  /* find closest match */
-                for ( i = 14 ; i >= 0 ; --i ) {
-                        if ( range > lm85_range_map[i] ) { /* range bracketed */
-                                if ((lm85_range_map[i+1] - range) < 
-                                        (range - lm85_range_map[i])) {
-                                        i++;
-                                        break;
-                                }
-                                break;
-                        }
+
+        /* Find the closest match */
+        for (i = 14; i >= 0; --i) {
+                if (range >= lm85_range_map[i]) {
+                        if ((lm85_range_map[i + 1] - range) <
+                                        (range - lm85_range_map[i]))
+                                return i + 1;
+                        return i;
                 }
         }
-        return( i & 0x0f );
+
+        return 0;
 }
 #define RANGE_FROM_REG(val) (lm85_range_map[(val)&0x0f])
 
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 1607536ff5fb..8e07de23d220 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -823,13 +823,6 @@ config BLK_DEV_IDE_RAPIDE
           Say Y here if you want to support the Yellowstone RapIDE controller
           manufactured for use with Acorn computers.
 
-config BLK_DEV_IDE_BAST
-        tristate "Simtec BAST / Thorcom VR1000 IDE support"
-        depends on ARM && (ARCH_BAST || MACH_VR1000)
-        help
-          Say Y here if you want to support the onboard IDE channels on the
-          Simtec BAST or the Thorcom VR1000
-
 config IDE_H8300
         tristate "H8300 IDE support"
         depends on H8300
diff --git a/drivers/ide/arm/Makefile b/drivers/ide/arm/Makefile
index 936e7b0237f5..5bc26053afa6 100644
--- a/drivers/ide/arm/Makefile
+++ b/drivers/ide/arm/Makefile
@@ -1,7 +1,6 @@
 
 obj-$(CONFIG_BLK_DEV_IDE_ICSIDE)        += icside.o
 obj-$(CONFIG_BLK_DEV_IDE_RAPIDE)        += rapide.o
-obj-$(CONFIG_BLK_DEV_IDE_BAST)          += bast-ide.o
 obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710)   += palm_bk3710.o
 
 ifeq ($(CONFIG_IDE_ARM), m)
diff --git a/drivers/ide/arm/bast-ide.c b/drivers/ide/arm/bast-ide.c
deleted file mode 100644
index 8e8c28104b45..000000000000
--- a/drivers/ide/arm/bast-ide.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * Copyright (c) 2003-2004 Simtec Electronics
- *  Ben Dooks <ben@simtec.co.uk>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
-*/
-
-#include <linux/module.h>
-#include <linux/errno.h>
-#include <linux/ide.h>
-#include <linux/init.h>
-
-#include <asm/mach-types.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/arch/map.h>
-#include <asm/arch/bast-map.h>
-#include <asm/arch/bast-irq.h>
-
-#define DRV_NAME "bast-ide"
-
-static int __init bastide_register(unsigned int base, unsigned int aux, int irq)
-{
-        ide_hwif_t *hwif;
-        hw_regs_t hw;
-        int i;
-        u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
-
-        memset(&hw, 0, sizeof(hw));
-
-        base += BAST_IDE_CS;
-        aux  += BAST_IDE_CS;
-
-        for (i = 0; i <= 7; i++) {
-                hw.io_ports_array[i] = (unsigned long)base;
-                base += 0x20;
-        }
-
-        hw.io_ports.ctl_addr = aux + (6 * 0x20);
-        hw.irq = irq;
-        hw.chipset = ide_generic;
-
-        hwif = ide_find_port();
-        if (hwif == NULL)
-                goto out;
-
-        i = hwif->index;
-
-        ide_init_port_data(hwif, i);
-        ide_init_port_hw(hwif, &hw);
-        hwif->port_ops = NULL;
-
-        idx[0] = i;
-
-        ide_device_add(idx, NULL);
-out:
-        return 0;
-}
-
-static int __init bastide_init(void)
-{
-        unsigned long base = BAST_VA_IDEPRI + BAST_IDE_CS;
-
-        /* we can treat the VR1000 and the BAST the same */
-
-        if (!(machine_is_bast() || machine_is_vr1000()))
-                return 0;
-
-        printk("BAST: IDE driver, (c) 2003-2004 Simtec Electronics\n");
-
-        if (!request_mem_region(base, 0x400000, DRV_NAME)) {
-                printk(KERN_ERR "%s: resources busy\n", DRV_NAME);
-                return -EBUSY;
-        }
-
-        bastide_register(BAST_VA_IDEPRI, BAST_VA_IDEPRIAUX, IRQ_IDE0);
-        bastide_register(BAST_VA_IDESEC, BAST_VA_IDESECAUX, IRQ_IDE1);
-
-        return 0;
-}
-
-module_init(bastide_init);
-
-MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
-MODULE_LICENSE("GPL");
-MODULE_DESCRIPTION("Simtec BAST / Thorcom VR1000 IDE driver");
diff --git a/drivers/ide/arm/palm_bk3710.c b/drivers/ide/arm/palm_bk3710.c
index d024ac8fad14..cc24803fadff 100644
--- a/drivers/ide/arm/palm_bk3710.c
+++ b/drivers/ide/arm/palm_bk3710.c
@@ -353,8 +353,8 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev)
         struct clk *clkp;
         struct resource *mem, *irq;
         ide_hwif_t *hwif;
-        void __iomem *base;
-        int pribase, i;
+        unsigned long base;
+        int i;
         hw_regs_t hw;
         u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
 
@@ -374,22 +374,27 @@ static int __devinit palm_bk3710_probe(struct platform_device *pdev)
                 printk(KERN_ERR "failed to get memory region resource\n");
                 return -ENODEV;
         }
+
         irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
         if (irq == NULL) {
                 printk(KERN_ERR "failed to get IRQ resource\n");
                 return -ENODEV;
         }
 
-        base = (void *)mem->start;
+        if (request_mem_region(mem->start, mem->end - mem->start + 1,
+                               "palm_bk3710") == NULL) {
+                printk(KERN_ERR "failed to request memory region\n");
+                return -EBUSY;
+        }
+
+        base = IO_ADDRESS(mem->start);
 
         /* Configure the Palm Chip controller */
-        palm_bk3710_chipinit(base);
+        palm_bk3710_chipinit((void __iomem *)base);
 
-        pribase = mem->start + IDE_PALM_ATA_PRI_REG_OFFSET;
         for (i = 0; i < IDE_NR_PORTS - 2; i++)
-                hw.io_ports_array[i] = pribase + i;
-        hw.io_ports.ctl_addr = mem->start +
-                        IDE_PALM_ATA_PRI_CTL_OFFSET;
+                hw.io_ports_array[i] = base + IDE_PALM_ATA_PRI_REG_OFFSET + i;
+        hw.io_ports.ctl_addr = base + IDE_PALM_ATA_PRI_CTL_OFFSET;
         hw.irq = irq->start;
         hw.chipset = ide_palm3710;
 
@@ -434,4 +439,3 @@ static int __init palm_bk3710_init(void)
 
 module_init(palm_bk3710_init);
 MODULE_LICENSE("GPL");
-
diff --git a/drivers/ide/ide-taskfile.c b/drivers/ide/ide-taskfile.c
index 0c908ca3ff79..ab545ffa1549 100644
--- a/drivers/ide/ide-taskfile.c
+++ b/drivers/ide/ide-taskfile.c
@@ -225,10 +225,10 @@ static u8 wait_drive_not_busy(ide_drive_t *drive)
         u8 stat;
 
         /*
-         * Last sector was transfered, wait until drive is ready.
-         * This can take up to 10 usec, but we will wait max 1 ms.
+         * Last sector was transfered, wait until device is ready.  This can
+         * take up to 6 ms on some ATAPI devices, so we will wait max 10 ms.
          */
-        for (retries = 0; retries < 100; retries++) {
+        for (retries = 0; retries < 1000; retries++) {
                 stat = ide_read_status(drive);
 
                 if (stat & BUSY_STAT)
diff --git a/drivers/ide/legacy/ide-cs.c b/drivers/ide/legacy/ide-cs.c
index f633b6b3c7f3..3381424d70a1 100644
--- a/drivers/ide/legacy/ide-cs.c
+++ b/drivers/ide/legacy/ide-cs.c
@@ -410,6 +410,7 @@ static struct pcmcia_device_id ide_ids[] = {
         PCMCIA_DEVICE_MANF_CARD(0x001c, 0x0001),        /* Mitsubishi CFA */
         PCMCIA_DEVICE_MANF_CARD(0x0032, 0x0704),
         PCMCIA_DEVICE_MANF_CARD(0x0045, 0x0401),        /* SanDisk CFA */
+        PCMCIA_DEVICE_MANF_CARD(0x004f, 0x0000),        /* Kingston */
         PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000),        /* Toshiba */
         PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
         PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000),        /* Samsung */
@@ -439,6 +440,7 @@ static struct pcmcia_device_id ide_ids[] = {
         PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
         PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDEII", 0x547e66dc, 0xb3662674),
         PCMCIA_DEVICE_PROD_ID12("LOOKMEET", "CBIDE2      ", 0xe37be2b5, 0x8671043b),
+        PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF300", 0x7ed2ad87, 0x7e9e78ee),
         PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF500", 0x7ed2ad87, 0x7a13045c),
         PCMCIA_DEVICE_PROD_ID2("NinjaATA-", 0xebe0bd79),
         PCMCIA_DEVICE_PROD_ID12("PCMCIA", "CD-ROM", 0x281f1c5d, 0x66536591),
@@ -449,6 +451,7 @@ static struct pcmcia_device_id ide_ids[] = {
         PCMCIA_DEVICE_PROD_ID12("SMI VENDOR", "SMI PRODUCT", 0x30896c92, 0x703cc5f6),
         PCMCIA_DEVICE_PROD_ID12("TOSHIBA", "MK2001MPL", 0xb4585a1a, 0x3489e003),
         PCMCIA_DEVICE_PROD_ID1("TRANSCEND    512M   ", 0xd0909443),
+        PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF45", 0x709b1bf1, 0xf68b6f32),
         PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
         PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
         PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
diff --git a/drivers/ieee1394/Kconfig b/drivers/ieee1394/Kconfig
index 545663ef820b..95f45f9b8e5e 100644
--- a/drivers/ieee1394/Kconfig
+++ b/drivers/ieee1394/Kconfig
@@ -4,7 +4,7 @@ menu "IEEE 1394 (FireWire) support"
 source "drivers/firewire/Kconfig"
 
 config IEEE1394
-        tristate "IEEE 1394 (FireWire) support"
+        tristate "Stable FireWire stack"
         depends on PCI || BROKEN
         help
           IEEE 1394 describes a high performance serial bus, which is also
@@ -19,30 +19,45 @@ config IEEE1394
           To compile this driver as a module, say M here: the
           module will be called ieee1394.
 
-comment "Subsystem Options"
-        depends on IEEE1394
-
-config IEEE1394_VERBOSEDEBUG
-        bool "Excessive debugging output"
-        depends on IEEE1394
+config IEEE1394_OHCI1394
+        tristate "OHCI-1394 controllers"
+        depends on PCI && IEEE1394
         help
-          If you say Y here, you will get very verbose debugging logs from
-          the subsystem which includes a dump of the header of every sent
-          and received packet.  This can amount to a high amount of data
-          collected in a very short time which is usually also saved to
-          disk by the system logging daemons.
+          Enable this driver if you have an IEEE 1394 controller based on the
+          OHCI-1394 specification. The current driver is only tested with OHCI
+          chipsets made by Texas Instruments and NEC. Most third-party vendors
+          use one of these chipsets.  It should work with any OHCI-1394
+          compliant card, however.
 
-          Say Y if you really want or need the debugging output, everyone
-          else says N.
+          To compile this driver as a module, say M here: the
+          module will be called ohci1394.
 
-comment "Controllers"
-        depends on IEEE1394
+          NOTE:
 
-comment "Texas Instruments PCILynx requires I2C"
+          You should only build either ohci1394 or the new firewire-ohci driver,
+          but not both.  If you nevertheless want to install both, you should
+          configure them only as modules and blacklist the driver(s) which you
+          don't want to have auto-loaded.  Add either
+
+              blacklist firewire-ohci
+          or
+              blacklist ohci1394
+              blacklist video1394
+              blacklist dv1394
+
+          to /etc/modprobe.conf or /etc/modprobe.d/* and update modprobe.conf
+          depending on your distribution.  The latter two modules should be
+          blacklisted together with ohci1394 because they depend on ohci1394.
+
+          If you have an old modprobe which doesn't implement the blacklist
+          directive, use "install modulename /bin/true" for the modules to be
+          blacklisted.
+
+comment "PCILynx controller requires I2C"
         depends on IEEE1394 && I2C=n
 
 config IEEE1394_PCILYNX
-        tristate "Texas Instruments PCILynx support"
+        tristate "PCILynx controller"
         depends on PCI && IEEE1394 && I2C
         select I2C_ALGOBIT
         help
@@ -57,35 +72,11 @@ config IEEE1394_PCILYNX
           PowerMacs G3 B&W contain the PCILynx controller.  Therefore
           almost everybody can say N here.
 
-config IEEE1394_OHCI1394
-        tristate "OHCI-1394 support"
-        depends on PCI && IEEE1394
-        help
-          Enable this driver if you have an IEEE 1394 controller based on the
-          OHCI-1394 specification. The current driver is only tested with OHCI
-          chipsets made by Texas Instruments and NEC. Most third-party vendors
-          use one of these chipsets.  It should work with any OHCI-1394
-          compliant card, however.
-
-          To compile this driver as a module, say M here: the
-          module will be called ohci1394.
-
-comment "Protocols"
-        depends on IEEE1394
-
-config IEEE1394_VIDEO1394
-        tristate "OHCI-1394 Video support"
-        depends on IEEE1394 && IEEE1394_OHCI1394
-        help
-          This option enables video device usage for OHCI-1394 cards.  Enable
-          this option only if you have an IEEE 1394 video device connected to
-          an OHCI-1394 card.
-
 comment "SBP-2 support (for storage devices) requires SCSI"
         depends on IEEE1394 && SCSI=n
 
 config IEEE1394_SBP2
-        tristate "SBP-2 support (Harddisks etc.)"
+        tristate "Storage devices (SBP-2 protocol)"
         depends on IEEE1394 && SCSI
         help
           This option enables you to use SBP-2 devices connected to an IEEE
@@ -127,24 +118,47 @@ config IEEE1394_ETH1394
 
           The module is called eth1394 although it does not emulate Ethernet.
 
+config IEEE1394_RAWIO
+        tristate "raw1394 userspace interface"
+        depends on IEEE1394
+        help
+          This option adds support for the raw1394 device file which enables
+          direct communication of user programs with IEEE 1394 devices
+          (isochronous and asynchronous).  Almost all application programs
+          which access FireWire require this option.
+
+          To compile this driver as a module, say M here: the module will be
+          called raw1394.
+
+config IEEE1394_VIDEO1394
+        tristate "video1394 userspace interface"
+        depends on IEEE1394 && IEEE1394_OHCI1394
+        help
+          This option adds support for the video1394 device files which enable
+          isochronous communication of user programs with IEEE 1394 devices,
+          especially video capture or export.  This interface is used by all
+          libdc1394 based programs and by several other programs, in addition to
+          the raw1394 interface.  It is generally not required for DV capture.
+
+          To compile this driver as a module, say M here: the module will be
+          called video1394.
+
 config IEEE1394_DV1394
-        tristate "OHCI-DV I/O support (deprecated)"
+        tristate "dv1394 userspace interface (deprecated)"
         depends on IEEE1394 && IEEE1394_OHCI1394
         help
           The dv1394 driver is unsupported and may be removed from Linux in a
           future release.  Its functionality is now provided by raw1394 together
           with libraries such as libiec61883.
 
-config IEEE1394_RAWIO
-        tristate "Raw IEEE1394 I/O support"
+config IEEE1394_VERBOSEDEBUG
+        bool "Excessive debugging output"
         depends on IEEE1394
         help
-          This option adds support for the raw1394 device file which enables
-          direct communication of user programs with the IEEE 1394 bus and thus
-          with the attached peripherals.  Almost all application programs which
-          access FireWire require this option.
+          If you say Y here, you will get very verbose debugging logs from the
+          ieee1394 drivers, including sent and received packet headers.  This
+          will quickly result in large amounts of data sent to the system log.
 
-          To compile this driver as a module, say M here: the module will be
-          called raw1394.
+          Say Y if you really need the debugging output.  Everyone else says N.
 
 endmenu
diff --git a/drivers/infiniband/hw/mthca/mthca_memfree.c b/drivers/infiniband/hw/mthca/mthca_memfree.c
index b224079d4e1f..d5862e5d99a0 100644
--- a/drivers/infiniband/hw/mthca/mthca_memfree.c
+++ b/drivers/infiniband/hw/mthca/mthca_memfree.c
@@ -109,7 +109,11 @@ static int mthca_alloc_icm_pages(struct scatterlist *mem, int order, gfp_t gfp_m
 {
         struct page *page;
 
-        page = alloc_pages(gfp_mask, order);
+        /*
+         * Use __GFP_ZERO because buggy firmware assumes ICM pages are
+         * cleared, and subtle failures are seen if they aren't.
+         */
+        page = alloc_pages(gfp_mask | __GFP_ZERO, order);
         if (!page)
                 return -ENOMEM;
 
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c
index 5126d5d9ea0e..2e554a4ab337 100644
--- a/drivers/lguest/x86/core.c
+++ b/drivers/lguest/x86/core.c
@@ -176,7 +176,7 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
          * we set it now, so we can trap and pass that trap to the Guest if it
          * uses the FPU. */
         if (cpu->ts)
-                lguest_set_ts();
+                unlazy_fpu(current);
 
         /* SYSENTER is an optimized way of doing system calls.  We can't allow
          * it because it always jumps to privilege level 0.  A normal Guest
@@ -196,6 +196,10 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
          * trap made the switcher code come back, and an error code which some
          * traps set.  */
 
+         /* Restore SYSENTER if it's supposed to be on. */
+         if (boot_cpu_has(X86_FEATURE_SEP))
+                wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
+
         /* If the Guest page faulted, then the cr2 register will tell us the
          * bad virtual address.  We have to grab this now, because once we
          * re-enable interrupts an interrupt could fault and thus overwrite
@@ -203,13 +207,12 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
         if (cpu->regs->trapnum == 14)
                 cpu->arch.last_pagefault = read_cr2();
         /* Similarly, if we took a trap because the Guest used the FPU,
-         * we have to restore the FPU it expects to see. */
+         * we have to restore the FPU it expects to see.
+         * math_state_restore() may sleep and we may even move off to
+         * a different CPU. So all the critical stuff should be done
+         * before this.  */
         else if (cpu->regs->trapnum == 7)
                 math_state_restore();
-
-        /* Restore SYSENTER if it's supposed to be on. */
-        if (boot_cpu_has(X86_FEATURE_SEP))
-                wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
 }
 
 /*H:130 Now we've examined the hypercall code; our Guest can make requests.
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index bafb69b6f7cb..fc6f4b8c64b3 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -942,7 +942,7 @@ static int pppoe_recvmsg(struct kiocb *iocb, struct socket *sock,
         m->msg_namelen = 0;
 
         if (skb) {
-                total_len = min(total_len, skb->len);
+                total_len = min_t(size_t, total_len, skb->len);
                 error = skb_copy_datagram_iovec(skb, 0, m->msg_iov, total_len);
                 if (error == 0)
                         error = total_len;
diff --git a/drivers/serial/bfin_5xx.c b/drivers/serial/bfin_5xx.c
index f20952c43cb8..fd9bb777df28 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/serial/bfin_5xx.c
@@ -49,6 +49,7 @@
 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
 
 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
+#define CTS_CHECK_JIFFIES       (HZ / 50)
 
 #ifdef CONFIG_SERIAL_BFIN_DMA
 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
@@ -290,11 +291,6 @@ static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 {
         struct circ_buf *xmit = &uart->port.info->xmit;
 
-        if (uart->port.x_char) {
-                UART_PUT_CHAR(uart, uart->port.x_char);
-                uart->port.icount.tx++;
-                uart->port.x_char = 0;
-        }
         /*
          * Check the modem control lines before
          * transmitting anything.
@@ -306,6 +302,12 @@ static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
                 return;
         }
 
+        if (uart->port.x_char) {
+                UART_PUT_CHAR(uart, uart->port.x_char);
+                uart->port.icount.tx++;
+                uart->port.x_char = 0;
+        }
+
         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
@@ -345,15 +347,6 @@ static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 }
 #endif
 
-#ifdef CONFIG_SERIAL_BFIN_CTSRTS
-static void bfin_serial_do_work(struct work_struct *work)
-{
-        struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
-
-        bfin_serial_mctrl_check(uart);
-}
-#endif
-
 #ifdef CONFIG_SERIAL_BFIN_DMA
 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 {
@@ -361,6 +354,12 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 
         uart->tx_done = 0;
 
+        /*
+         * Check the modem control lines before
+         * transmitting anything.
+         */
+        bfin_serial_mctrl_check(uart);
+
         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
                 uart->tx_count = 0;
                 uart->tx_done = 1;
@@ -373,12 +372,6 @@ static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
                 uart->port.x_char = 0;
         }
 
-        /*
-         * Check the modem control lines before
-         * transmitting anything.
-         */
-        bfin_serial_mctrl_check(uart);
-
         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
@@ -565,7 +558,10 @@ static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
         if (!(status & TIOCM_CTS)) {
                 tty->hw_stopped = 1;
-                schedule_work(&uart->cts_workqueue);
+                uart->cts_timer.data = (unsigned long)(uart);
+                uart->cts_timer.function = (void *)bfin_serial_mctrl_check;
+                uart->cts_timer.expires = jiffies + CTS_CHECK_JIFFIES;
+                add_timer(&(uart->cts_timer));
         } else {
                 tty->hw_stopped = 0;
         }
@@ -885,7 +881,7 @@ static void __init bfin_serial_init_ports(void)
                 init_timer(&(bfin_serial_ports[i].rx_dma_timer));
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-                INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
+                init_timer(&(bfin_serial_ports[i].cts_timer));
                 bfin_serial_ports[i].cts_pin        =
                         bfin_serial_resource[i].uart_cts_pin;
                 bfin_serial_ports[i].rts_pin        =
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 8662a6b7a30b..25b352b664d9 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -68,7 +68,6 @@ obj-$(CONFIG_WAFER_WDT) += wafer5823wdt.o
 obj-$(CONFIG_I6300ESB_WDT) += i6300esb.o
 obj-$(CONFIG_ITCO_WDT) += iTCO_wdt.o iTCO_vendor_support.o
 obj-$(CONFIG_IT8712F_WDT) += it8712f_wdt.o
-CFLAGS_hpwdt.o += -O
 obj-$(CONFIG_HP_WATCHDOG) += hpwdt.o
 obj-$(CONFIG_SC1200_WDT) += sc1200wdt.o
 obj-$(CONFIG_SCx200_WDT) += scx200_wdt.o
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index 2686f3eaeedf..eaa3f2a79ff5 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -140,49 +140,53 @@ static struct pci_device_id hpwdt_devices[] = {
 };
 MODULE_DEVICE_TABLE(pci, hpwdt_devices);
 
+extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs, unsigned long *pRomEntry);
+
 #ifndef CONFIG_X86_64
 /* --32 Bit Bios------------------------------------------------------------ */
 
 #define HPWDT_ARCH      32
 
-asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
-                               unsigned long *pRomEntry)
-{
-        asm("pushl       %ebp               \n\t"
-            "movl        %esp, %ebp         \n\t"
-            "pusha                          \n\t"
-            "pushf                          \n\t"
-            "push        %es                \n\t"
-            "push        %ds                \n\t"
-            "pop         %es                \n\t"
-            "movl        8(%ebp),%eax       \n\t"
-            "movl        4(%eax),%ebx       \n\t"
-            "movl        8(%eax),%ecx       \n\t"
-            "movl        12(%eax),%edx      \n\t"
-            "movl        16(%eax),%esi      \n\t"
-            "movl        20(%eax),%edi      \n\t"
-            "movl        (%eax),%eax        \n\t"
-            "push        %cs                \n\t"
-            "call        *12(%ebp)          \n\t"
-            "pushf                          \n\t"
-            "pushl       %eax               \n\t"
-            "movl        8(%ebp),%eax       \n\t"
-            "movl        %ebx,4(%eax)       \n\t"
-            "movl        %ecx,8(%eax)       \n\t"
-            "movl        %edx,12(%eax)      \n\t"
-            "movl        %esi,16(%eax)      \n\t"
-            "movl        %edi,20(%eax)      \n\t"
-            "movw        %ds,24(%eax)       \n\t"
-            "movw        %es,26(%eax)       \n\t"
-            "popl        %ebx               \n\t"
-            "movl        %ebx,(%eax)        \n\t"
-            "popl        %ebx               \n\t"
-            "movl        %ebx,28(%eax)      \n\t"
-            "pop         %es                \n\t"
-            "popf                           \n\t"
-            "popa                           \n\t"
-            "leave                          \n\t" "ret");
-}
+asm(".text                          \n\t"
+    ".align 4                       \n"
+    "asminline_call:                \n\t"
+    "pushl       %ebp               \n\t"
+    "movl        %esp, %ebp         \n\t"
+    "pusha                          \n\t"
+    "pushf                          \n\t"
+    "push        %es                \n\t"
+    "push        %ds                \n\t"
+    "pop         %es                \n\t"
+    "movl        8(%ebp),%eax       \n\t"
+    "movl        4(%eax),%ebx       \n\t"
+    "movl        8(%eax),%ecx       \n\t"
+    "movl        12(%eax),%edx      \n\t"
+    "movl        16(%eax),%esi      \n\t"
+    "movl        20(%eax),%edi      \n\t"
+    "movl        (%eax),%eax        \n\t"
+    "push        %cs                \n\t"
+    "call        *12(%ebp)          \n\t"
+    "pushf                          \n\t"
+    "pushl       %eax               \n\t"
+    "movl        8(%ebp),%eax       \n\t"
+    "movl        %ebx,4(%eax)       \n\t"
+    "movl        %ecx,8(%eax)       \n\t"
+    "movl        %edx,12(%eax)      \n\t"
+    "movl        %esi,16(%eax)      \n\t"
+    "movl        %edi,20(%eax)      \n\t"
+    "movw        %ds,24(%eax)       \n\t"
+    "movw        %es,26(%eax)       \n\t"
+    "popl        %ebx               \n\t"
+    "movl        %ebx,(%eax)        \n\t"
+    "popl        %ebx               \n\t"
+    "movl        %ebx,28(%eax)      \n\t"
+    "pop         %es                \n\t"
+    "popf                           \n\t"
+    "popa                           \n\t"
+    "leave                          \n\t"
+    "ret                            \n\t"
+    ".previous");
+
 
 /*
  *      cru_detect
@@ -333,43 +337,44 @@ static int __devinit detect_cru_service(void)
 
 #define HPWDT_ARCH      64
 
-asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
-                               unsigned long *pRomEntry)
-{
-        asm("pushq      %rbp            \n\t"
-            "movq       %rsp, %rbp      \n\t"
-            "pushq      %rax            \n\t"
-            "pushq      %rbx            \n\t"
-            "pushq      %rdx            \n\t"
-            "pushq      %r12            \n\t"
-            "pushq      %r9             \n\t"
-            "movq       %rsi, %r12      \n\t"
-            "movq       %rdi, %r9       \n\t"
-            "movl       4(%r9),%ebx     \n\t"
-            "movl       8(%r9),%ecx     \n\t"
-            "movl       12(%r9),%edx    \n\t"
-            "movl       16(%r9),%esi    \n\t"
-            "movl       20(%r9),%edi    \n\t"
-            "movl       (%r9),%eax      \n\t"
-            "call       *%r12           \n\t"
-            "pushfq                     \n\t"
-            "popq        %r12           \n\t"
-            "popfq                      \n\t"
-            "movl       %eax, (%r9)     \n\t"
-            "movl       %ebx, 4(%r9)    \n\t"
-            "movl       %ecx, 8(%r9)    \n\t"
-            "movl       %edx, 12(%r9)   \n\t"
-            "movl       %esi, 16(%r9)   \n\t"
-            "movl       %edi, 20(%r9)   \n\t"
-            "movq       %r12, %rax      \n\t"
-            "movl       %eax, 28(%r9)   \n\t"
-            "popq       %r9             \n\t"
-            "popq       %r12            \n\t"
-            "popq       %rdx            \n\t"
-            "popq       %rbx            \n\t"
-            "popq       %rax            \n\t"
-            "leave                      \n\t" "ret");
-}
+asm(".text                      \n\t"
+    ".align 4                   \n"
+    "asminline_call:            \n\t"
+    "pushq      %rbp            \n\t"
+    "movq       %rsp, %rbp      \n\t"
+    "pushq      %rax            \n\t"
+    "pushq      %rbx            \n\t"
+    "pushq      %rdx            \n\t"
+    "pushq      %r12            \n\t"
+    "pushq      %r9             \n\t"
+    "movq       %rsi, %r12      \n\t"
+    "movq       %rdi, %r9       \n\t"
+    "movl       4(%r9),%ebx     \n\t"
+    "movl       8(%r9),%ecx     \n\t"
+    "movl       12(%r9),%edx    \n\t"
+    "movl       16(%r9),%esi    \n\t"
+    "movl       20(%r9),%edi    \n\t"
+    "movl       (%r9),%eax      \n\t"
+    "call       *%r12           \n\t"
+    "pushfq                     \n\t"
+    "popq        %r12           \n\t"
+    "popfq                      \n\t"
+    "movl       %eax, (%r9)     \n\t"
+    "movl       %ebx, 4(%r9)    \n\t"
+    "movl       %ecx, 8(%r9)    \n\t"
+    "movl       %edx, 12(%r9)   \n\t"
+    "movl       %esi, 16(%r9)   \n\t"
+    "movl       %edi, 20(%r9)   \n\t"
+    "movq       %r12, %rax      \n\t"
+    "movl       %eax, 28(%r9)   \n\t"
+    "popq       %r9             \n\t"
+    "popq       %r12            \n\t"
+    "popq       %rdx            \n\t"
+    "popq       %rbx            \n\t"
+    "popq       %rax            \n\t"
+    "leave                      \n\t"
+    "ret                        \n\t"
+    ".previous");
 
 /*
  *      dmi_find_cru
diff --git a/drivers/xen/events.c b/drivers/xen/events.c
index 4f0f22b020ea..76e5b7386af9 100644
--- a/drivers/xen/events.c
+++ b/drivers/xen/events.c
@@ -529,7 +529,7 @@ void xen_evtchn_do_upcall(struct pt_regs *regs)
 
 #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
                 /* Clear master flag /before/ clearing selector flag. */
-                rmb();
+                wmb();
 #endif
                 pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
                 while (pending_words != 0) {
diff --git a/fs/ext4/resize.c b/fs/ext4/resize.c
index 9ecb92f68543..9ff7b1c04239 100644
--- a/fs/ext4/resize.c
+++ b/fs/ext4/resize.c
@@ -855,7 +855,8 @@ int ext4_group_add(struct super_block *sb, struct ext4_new_group_data *input)
          */
 
         /* Update group descriptor block for new group */
-        gdp = (struct ext4_group_desc *)primary->b_data + gdb_off;
+        gdp = (struct ext4_group_desc *)((char *)primary->b_data +
+                                         gdb_off * EXT4_DESC_SIZE(sb));
 
         ext4_block_bitmap_set(sb, gdp, input->block_bitmap); /* LV FIXME */
         ext4_inode_bitmap_set(sb, gdp, input->inode_bitmap); /* LV FIXME */
diff --git a/fs/gfs2/bmap.c b/fs/gfs2/bmap.c
index c19184f2e70e..bec76b1c2bb0 100644
--- a/fs/gfs2/bmap.c
+++ b/fs/gfs2/bmap.c
@@ -246,15 +246,11 @@ static void find_metapath(const struct gfs2_sbd *sdp, u64 block,
 
 }
 
-static inline unsigned int zero_metapath_length(const struct metapath *mp,
-                                                unsigned height)
+static inline unsigned int metapath_branch_start(const struct metapath *mp)
 {
-        unsigned int i;
-        for (i = 0; i < height - 1; i++) {
-                if (mp->mp_list[i] != 0)
-                        return i;
-        }
-        return height;
+        if (mp->mp_list[0] == 0)
+                return 2;
+        return 1;
 }
 
 /**
@@ -436,7 +432,7 @@ static int gfs2_bmap_alloc(struct inode *inode, const sector_t lblock,
         struct gfs2_sbd *sdp = GFS2_SB(inode);
         struct buffer_head *dibh = mp->mp_bh[0];
         u64 bn, dblock = 0;
-        unsigned n, i, blks, alloced = 0, iblks = 0, zmpl = 0;
+        unsigned n, i, blks, alloced = 0, iblks = 0, branch_start = 0;
         unsigned dblks = 0;
         unsigned ptrs_per_blk;
         const unsigned end_of_metadata = height - 1;
@@ -471,9 +467,8 @@ static int gfs2_bmap_alloc(struct inode *inode, const sector_t lblock,
                         /* Building up tree height */
                         state = ALLOC_GROW_HEIGHT;
                         iblks = height - ip->i_height;
-                        zmpl = zero_metapath_length(mp, height);
-                        iblks -= zmpl;
-                        iblks += height;
+                        branch_start = metapath_branch_start(mp);
+                        iblks += (height - branch_start);
                 }
         }
 
@@ -509,13 +504,13 @@ static int gfs2_bmap_alloc(struct inode *inode, const sector_t lblock,
                                         sizeof(struct gfs2_meta_header));
                                 *ptr = zero_bn;
                                 state = ALLOC_GROW_DEPTH;
-                                for(i = zmpl; i < height; i++) {
+                                for(i = branch_start; i < height; i++) {
                                         if (mp->mp_bh[i] == NULL)
                                                 break;
                                         brelse(mp->mp_bh[i]);
                                         mp->mp_bh[i] = NULL;
                                 }
-                                i = zmpl;
+                                i = branch_start;
                         }
                         if (n == 0)
                                 break;
diff --git a/fs/gfs2/rgrp.c b/fs/gfs2/rgrp.c
index 6387523a3153..3401628d742b 100644
--- a/fs/gfs2/rgrp.c
+++ b/fs/gfs2/rgrp.c
@@ -195,7 +195,7 @@ ulong_aligned:
            depending on architecture.  I've experimented with several ways
            of writing this section such as using an else before the goto
            but this one seems to be the fastest. */
-        while ((unsigned char *)plong < end - 1) {
+        while ((unsigned char *)plong < end - sizeof(unsigned long)) {
                 prefetch(plong + 1);
                 if (((*plong) & LBITMASK) != lskipval)
                         break;
diff --git a/fs/nfs/mount_clnt.c b/fs/nfs/mount_clnt.c
index 49c7cd0502cc..779d2eb649c5 100644
--- a/fs/nfs/mount_clnt.c
+++ b/fs/nfs/mount_clnt.c
@@ -130,10 +130,11 @@ static int xdr_decode_fhstatus3(struct rpc_rqst *req, __be32 *p,
                                 struct mnt_fhstatus *res)
 {
         struct nfs_fh *fh = res->fh;
+        unsigned size;
 
         if ((res->status = ntohl(*p++)) == 0) {
-                int size = ntohl(*p++);
-                if (size <= NFS3_FHSIZE) {
+                size = ntohl(*p++);
+                if (size <= NFS3_FHSIZE && size != 0) {
                         fh->size = size;
                         memcpy(fh->data, p, size);
                 } else
diff --git a/fs/nfs/super.c b/fs/nfs/super.c
index 2a4a024a4e7b..614efeed5437 100644
--- a/fs/nfs/super.c
+++ b/fs/nfs/super.c
@@ -1216,8 +1216,6 @@ static int nfs_validate_mount_data(void *options,
 {
         struct nfs_mount_data *data = (struct nfs_mount_data *)options;
 
-        memset(args, 0, sizeof(*args));
-
         if (data == NULL)
                 goto out_no_data;
 
@@ -1251,13 +1249,13 @@ static int nfs_validate_mount_data(void *options,
         case 5:
                 memset(data->context, 0, sizeof(data->context));
         case 6:
-                if (data->flags & NFS_MOUNT_VER3)
+                if (data->flags & NFS_MOUNT_VER3) {
+                        if (data->root.size > NFS3_FHSIZE || data->root.size == 0)
+                                goto out_invalid_fh;
                         mntfh->size = data->root.size;
-                else
+                } else
                         mntfh->size = NFS2_FHSIZE;
 
-                if (mntfh->size > sizeof(mntfh->data))
-                        goto out_invalid_fh;
 
                 memcpy(mntfh->data, data->root.data, mntfh->size);
                 if (mntfh->size < sizeof(mntfh->data))
@@ -1585,24 +1583,29 @@ static int nfs_get_sb(struct file_system_type *fs_type,
 {
         struct nfs_server *server = NULL;
         struct super_block *s;
-        struct nfs_fh mntfh;
-        struct nfs_parsed_mount_data data;
+        struct nfs_parsed_mount_data *data;
+        struct nfs_fh *mntfh;
         struct dentry *mntroot;
         int (*compare_super)(struct super_block *, void *) = nfs_compare_super;
         struct nfs_sb_mountdata sb_mntdata = {
                 .mntflags = flags,
         };
-        int error;
+        int error = -ENOMEM;
+
+        data = kzalloc(sizeof(*data), GFP_KERNEL);
+        mntfh = kzalloc(sizeof(*mntfh), GFP_KERNEL);
+        if (data == NULL || mntfh == NULL)
+                goto out_free_fh;
 
-        security_init_mnt_opts(&data.lsm_opts);
+        security_init_mnt_opts(&data->lsm_opts);
 
         /* Validate the mount data */
-        error = nfs_validate_mount_data(raw_data, &data, &mntfh, dev_name);
+        error = nfs_validate_mount_data(raw_data, data, mntfh, dev_name);
         if (error < 0)
                 goto out;
 
         /* Get a volume representation */
-        server = nfs_create_server(&data, &mntfh);
+        server = nfs_create_server(data, mntfh);
         if (IS_ERR(server)) {
                 error = PTR_ERR(server);
                 goto out;
@@ -1630,16 +1633,16 @@ static int nfs_get_sb(struct file_system_type *fs_type,
 
         if (!s->s_root) {
                 /* initial superblock/root creation */
-                nfs_fill_super(s, &data);
+                nfs_fill_super(s, data);
         }
 
-        mntroot = nfs_get_root(s, &mntfh);
+        mntroot = nfs_get_root(s, mntfh);
         if (IS_ERR(mntroot)) {
                 error = PTR_ERR(mntroot);
                 goto error_splat_super;
         }
 
-        error = security_sb_set_mnt_opts(s, &data.lsm_opts);
+        error = security_sb_set_mnt_opts(s, &data->lsm_opts);
         if (error)
                 goto error_splat_root;
 
@@ -1649,9 +1652,12 @@ static int nfs_get_sb(struct file_system_type *fs_type,
         error = 0;
 
 out:
-        kfree(data.nfs_server.hostname);
-        kfree(data.mount_server.hostname);
-        security_free_mnt_opts(&data.lsm_opts);
+        kfree(data->nfs_server.hostname);
+        kfree(data->mount_server.hostname);
+        security_free_mnt_opts(&data->lsm_opts);
+out_free_fh:
+        kfree(mntfh);
+        kfree(data);
         return error;
 
 out_err_nosb:
@@ -1800,8 +1806,6 @@ static int nfs4_validate_mount_data(void *options,
         struct nfs4_mount_data *data = (struct nfs4_mount_data *)options;
         char *c;
 
-        memset(args, 0, sizeof(*args));
-
         if (data == NULL)
                 goto out_no_data;
 
@@ -1959,26 +1963,31 @@ out_no_client_address:
 static int nfs4_get_sb(struct file_system_type *fs_type,
         int flags, const char *dev_name, void *raw_data, struct vfsmount *mnt)
 {
-        struct nfs_parsed_mount_data data;
+        struct nfs_parsed_mount_data *data;
         struct super_block *s;
         struct nfs_server *server;
-        struct nfs_fh mntfh;
+        struct nfs_fh *mntfh;
         struct dentry *mntroot;
         int (*compare_super)(struct super_block *, void *) = nfs_compare_super;
         struct nfs_sb_mountdata sb_mntdata = {
                 .mntflags = flags,
         };
-        int error;
+        int error = -ENOMEM;
 
-        security_init_mnt_opts(&data.lsm_opts);
+        data = kzalloc(sizeof(*data), GFP_KERNEL);
+        mntfh = kzalloc(sizeof(*mntfh), GFP_KERNEL);
+        if (data == NULL || mntfh == NULL)
+                goto out_free_fh;
+
+        security_init_mnt_opts(&data->lsm_opts);
 
         /* Validate the mount data */
-        error = nfs4_validate_mount_data(raw_data, &data, dev_name);
+        error = nfs4_validate_mount_data(raw_data, data, dev_name);
         if (error < 0)
                 goto out;
 
         /* Get a volume representation */
-        server = nfs4_create_server(&data, &mntfh);
+        server = nfs4_create_server(data, mntfh);
         if (IS_ERR(server)) {
                 error = PTR_ERR(server);
                 goto out;
@@ -2009,13 +2018,13 @@ static int nfs4_get_sb(struct file_system_type *fs_type,
                 nfs4_fill_super(s);
         }
 
-        mntroot = nfs4_get_root(s, &mntfh);
+        mntroot = nfs4_get_root(s, mntfh);
         if (IS_ERR(mntroot)) {
                 error = PTR_ERR(mntroot);
                 goto error_splat_super;
         }
 
-        error = security_sb_set_mnt_opts(s, &data.lsm_opts);
+        error = security_sb_set_mnt_opts(s, &data->lsm_opts);
         if (error)
                 goto error_splat_root;
 
@@ -2025,10 +2034,13 @@ static int nfs4_get_sb(struct file_system_type *fs_type,
         error = 0;
 
 out:
-        kfree(data.client_address);
-        kfree(data.nfs_server.export_path);
-        kfree(data.nfs_server.hostname);
-        security_free_mnt_opts(&data.lsm_opts);
+        kfree(data->client_address);
+        kfree(data->nfs_server.export_path);
+        kfree(data->nfs_server.hostname);
+        security_free_mnt_opts(&data->lsm_opts);
+out_free_fh:
+        kfree(mntfh);
+        kfree(data);
         return error;
 
 out_free:
diff --git a/fs/nfs/write.c b/fs/nfs/write.c
index 6d8ace3e3259..f333848fd3be 100644
--- a/fs/nfs/write.c
+++ b/fs/nfs/write.c
@@ -739,12 +739,13 @@ int nfs_updatepage(struct file *file, struct page *page,
         }
 
         status = nfs_writepage_setup(ctx, page, offset, count);
-        __set_page_dirty_nobuffers(page);
+        if (status < 0)
+                nfs_set_pageerror(page);
+        else
+                __set_page_dirty_nobuffers(page);
 
         dprintk("NFS:      nfs_updatepage returns %d (isize %Ld)\n",
                         status, (long long)i_size_read(inode));
-        if (status < 0)
-                nfs_set_pageerror(page);
         return status;
 }
 
diff --git a/fs/select.c b/fs/select.c
index 8dda969614a9..da0e88201c3a 100644
--- a/fs/select.c
+++ b/fs/select.c
@@ -249,7 +249,6 @@ int do_select(int n, fd_set_bits *fds, s64 *timeout)
                                                 retval++;
                                         }
                                 }
-                                cond_resched();
                         }
                         if (res_in)
                                 *rinp = res_in;
@@ -257,6 +256,7 @@ int do_select(int n, fd_set_bits *fds, s64 *timeout)
                                 *routp = res_out;
                         if (res_ex)
                                 *rexp = res_ex;
+                        cond_resched();
                 }
                 wait = NULL;
                 if (retval || !*timeout || signal_pending(current))
diff --git a/include/asm-alpha/core_mcpcia.h b/include/asm-alpha/core_mcpcia.h
index 525b4f6a7ace..acf55b483472 100644
--- a/include/asm-alpha/core_mcpcia.h
+++ b/include/asm-alpha/core_mcpcia.h
@@ -261,7 +261,7 @@ struct el_MCPCIA_uncorrected_frame_mcheck {
         }
 #endif
 
-static inline int __mcpcia_is_mmio(unsigned long addr)
+extern inline int __mcpcia_is_mmio(unsigned long addr)
 {
         return (addr & 0x80000000UL) == 0;
 }
diff --git a/include/asm-alpha/core_t2.h b/include/asm-alpha/core_t2.h
index 90e6b5d6c214..46bfff58f670 100644
--- a/include/asm-alpha/core_t2.h
+++ b/include/asm-alpha/core_t2.h
@@ -356,13 +356,13 @@ struct el_t2_frame_corrected {
 #define vip     volatile int *
 #define vuip    volatile unsigned int *
 
-static inline u8 t2_inb(unsigned long addr)
+extern inline u8 t2_inb(unsigned long addr)
 {
         long result = *(vip) ((addr << 5) + T2_IO + 0x00);
         return __kernel_extbl(result, addr & 3);
 }
 
-static inline void t2_outb(u8 b, unsigned long addr)
+extern inline void t2_outb(u8 b, unsigned long addr)
 {
         unsigned long w;
 
@@ -371,13 +371,13 @@ static inline void t2_outb(u8 b, unsigned long addr)
         mb();
 }
 
-static inline u16 t2_inw(unsigned long addr)
+extern inline u16 t2_inw(unsigned long addr)
 {
         long result = *(vip) ((addr << 5) + T2_IO + 0x08);
         return __kernel_extwl(result, addr & 3);
 }
 
-static inline void t2_outw(u16 b, unsigned long addr)
+extern inline void t2_outw(u16 b, unsigned long addr)
 {
         unsigned long w;
 
@@ -386,12 +386,12 @@ static inline void t2_outw(u16 b, unsigned long addr)
         mb();
 }
 
-static inline u32 t2_inl(unsigned long addr)
+extern inline u32 t2_inl(unsigned long addr)
 {
         return *(vuip) ((addr << 5) + T2_IO + 0x18);
 }
 
-static inline void t2_outl(u32 b, unsigned long addr)
+extern inline void t2_outl(u32 b, unsigned long addr)
 {
         *(vuip) ((addr << 5) + T2_IO + 0x18) = b;
         mb();
@@ -435,7 +435,7 @@ static inline void t2_outl(u32 b, unsigned long addr)
         set_hae(msb); \
 }
 
-static DEFINE_SPINLOCK(t2_hae_lock);
+extern spinlock_t t2_hae_lock;
 
 /*
  * NOTE: take T2_DENSE_MEM off in each readX/writeX routine, since
diff --git a/include/asm-alpha/io.h b/include/asm-alpha/io.h
index 38f18cf18c9d..e971ab000f95 100644
--- a/include/asm-alpha/io.h
+++ b/include/asm-alpha/io.h
@@ -35,7 +35,7 @@
  * register not being up-to-date with respect to the hardware
  * value.
  */
-static inline void __set_hae(unsigned long new_hae)
+extern inline void __set_hae(unsigned long new_hae)
 {
         unsigned long flags;
         local_irq_save(flags);
@@ -49,7 +49,7 @@ static inline void __set_hae(unsigned long new_hae)
         local_irq_restore(flags);
 }
 
-static inline void set_hae(unsigned long new_hae)
+extern inline void set_hae(unsigned long new_hae)
 {
         if (new_hae != alpha_mv.hae_cache)
                 __set_hae(new_hae);
@@ -176,7 +176,7 @@ REMAP2(u64, writeq, volatile)
 #undef REMAP1
 #undef REMAP2
 
-static inline void __iomem *generic_ioportmap(unsigned long a)
+extern inline void __iomem *generic_ioportmap(unsigned long a)
 {
         return alpha_mv.mv_ioportmap(a);
 }
diff --git a/include/asm-alpha/mmu_context.h b/include/asm-alpha/mmu_context.h
index 6a5be1f7debf..86c08a02d239 100644
--- a/include/asm-alpha/mmu_context.h
+++ b/include/asm-alpha/mmu_context.h
@@ -23,7 +23,7 @@
 #endif
 
 
-extern inline unsigned long
+static inline unsigned long
 __reload_thread(struct pcb_struct *pcb)
 {
         register unsigned long a0 __asm__("$16");
@@ -114,7 +114,7 @@ extern unsigned long last_asn;
 #define __MMU_EXTERN_INLINE
 #endif
 
-static inline unsigned long
+extern inline unsigned long
 __get_new_mm_context(struct mm_struct *mm, long cpu)
 {
         unsigned long asn = cpu_last_asn(cpu);
@@ -226,7 +226,7 @@ ev4_activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)
 # endif
 #endif
 
-extern inline int
+static inline int
 init_new_context(struct task_struct *tsk, struct mm_struct *mm)
 {
         int i;
diff --git a/include/asm-alpha/percpu.h b/include/asm-alpha/percpu.h
index 48348fe34c19..3495e8e00d70 100644
--- a/include/asm-alpha/percpu.h
+++ b/include/asm-alpha/percpu.h
@@ -1,6 +1,78 @@
 #ifndef __ALPHA_PERCPU_H
 #define __ALPHA_PERCPU_H
+#include <linux/compiler.h>
+#include <linux/threads.h>
 
-#include <asm-generic/percpu.h>
+/*
+ * Determine the real variable name from the name visible in the
+ * kernel sources.
+ */
+#define per_cpu_var(var) per_cpu__##var
+
+#ifdef CONFIG_SMP
+
+/*
+ * per_cpu_offset() is the offset that has to be added to a
+ * percpu variable to get to the instance for a certain processor.
+ */
+extern unsigned long __per_cpu_offset[NR_CPUS];
+
+#define per_cpu_offset(x) (__per_cpu_offset[x])
+
+#define __my_cpu_offset per_cpu_offset(raw_smp_processor_id())
+#ifdef CONFIG_DEBUG_PREEMPT
+#define my_cpu_offset per_cpu_offset(smp_processor_id())
+#else
+#define my_cpu_offset __my_cpu_offset
+#endif
+
+#ifndef MODULE
+#define SHIFT_PERCPU_PTR(var, offset) RELOC_HIDE(&per_cpu_var(var), (offset))
+#define PER_CPU_ATTRIBUTES
+#else
+/*
+ * To calculate addresses of locally defined variables, GCC uses 32-bit
+ * displacement from the GP. Which doesn't work for per cpu variables in
+ * modules, as an offset to the kernel per cpu area is way above 4G.
+ *
+ * This forces allocation of a GOT entry for per cpu variable using
+ * ldq instruction with a 'literal' relocation.
+ */
+#define SHIFT_PERCPU_PTR(var, offset) ({                \
+        extern int simple_identifier_##var(void);       \
+        unsigned long __ptr, tmp_gp;                    \
+        asm (  "br      %1, 1f                        \n\
+        1:      ldgp    %1, 0(%1)                     \n\
+                ldq %0, per_cpu__" #var"(%1)\t!literal"         \
+                : "=&r"(__ptr), "=&r"(tmp_gp));         \
+        (typeof(&per_cpu_var(var)))(__ptr + (offset)); })
+
+#define PER_CPU_ATTRIBUTES      __used
+
+#endif /* MODULE */
+
+/*
+ * A percpu variable may point to a discarded regions. The following are
+ * established ways to produce a usable pointer from the percpu variable
+ * offset.
+ */
+#define per_cpu(var, cpu) \
+        (*SHIFT_PERCPU_PTR(var, per_cpu_offset(cpu)))
+#define __get_cpu_var(var) \
+        (*SHIFT_PERCPU_PTR(var, my_cpu_offset))
+#define __raw_get_cpu_var(var) \
+        (*SHIFT_PERCPU_PTR(var, __my_cpu_offset))
+
+#else /* ! SMP */
+
+#define per_cpu(var, cpu)               (*((void)(cpu), &per_cpu_var(var)))
+#define __get_cpu_var(var)              per_cpu_var(var)
+#define __raw_get_cpu_var(var)          per_cpu_var(var)
+
+#define PER_CPU_ATTRIBUTES
+
+#endif /* SMP */
+
+#define DECLARE_PER_CPU(type, name) extern __typeof__(type) per_cpu_var(name)
 
 #endif /* __ALPHA_PERCPU_H */
diff --git a/include/asm-alpha/system.h b/include/asm-alpha/system.h
index ed221d6408fc..afe20fa58c99 100644
--- a/include/asm-alpha/system.h
+++ b/include/asm-alpha/system.h
@@ -184,7 +184,7 @@ enum amask_enum {
    __amask; })
 
 #define __CALL_PAL_R0(NAME, TYPE)                               \
-static inline TYPE NAME(void)                                   \
+extern inline TYPE NAME(void)                                   \
 {                                                               \
         register TYPE __r0 __asm__("$0");                       \
         __asm__ __volatile__(                                   \
@@ -196,7 +196,7 @@ static inline TYPE NAME(void)					\
 }
 
 #define __CALL_PAL_W1(NAME, TYPE0)                              \
-static inline void NAME(TYPE0 arg0)                             \
+extern inline void NAME(TYPE0 arg0)                             \
 {                                                               \
         register TYPE0 __r16 __asm__("$16") = arg0;             \
         __asm__ __volatile__(                                   \
@@ -207,7 +207,7 @@ static inline void NAME(TYPE0 arg0)				\
 }
 
 #define __CALL_PAL_W2(NAME, TYPE0, TYPE1)                       \
-static inline void NAME(TYPE0 arg0, TYPE1 arg1)                 \
+extern inline void NAME(TYPE0 arg0, TYPE1 arg1)                 \
 {                                                               \
         register TYPE0 __r16 __asm__("$16") = arg0;             \
         register TYPE1 __r17 __asm__("$17") = arg1;             \
@@ -219,7 +219,7 @@ static inline void NAME(TYPE0 arg0, TYPE1 arg1)			\
 }
 
 #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0)                      \
-static inline RTYPE NAME(TYPE0 arg0)                            \
+extern inline RTYPE NAME(TYPE0 arg0)                            \
 {                                                               \
         register RTYPE __r0 __asm__("$0");                      \
         register TYPE0 __r16 __asm__("$16") = arg0;             \
@@ -232,7 +232,7 @@ static inline RTYPE NAME(TYPE0 arg0)				\
 }
 
 #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1)               \
-static inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1)                \
+extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1)                \
 {                                                               \
         register RTYPE __r0 __asm__("$0");                      \
         register TYPE0 __r16 __asm__("$16") = arg0;             \
diff --git a/include/asm-alpha/vga.h b/include/asm-alpha/vga.h
index e8df1e7aae6b..c00106bac521 100644
--- a/include/asm-alpha/vga.h
+++ b/include/asm-alpha/vga.h
@@ -13,7 +13,7 @@
 #define VT_BUF_HAVE_MEMSETW
 #define VT_BUF_HAVE_MEMCPYW
 
-extern inline void scr_writew(u16 val, volatile u16 *addr)
+static inline void scr_writew(u16 val, volatile u16 *addr)
 {
         if (__is_ioaddr(addr))
                 __raw_writew(val, (volatile u16 __iomem *) addr);
@@ -21,7 +21,7 @@ extern inline void scr_writew(u16 val, volatile u16 *addr)
                 *addr = val;
 }
 
-extern inline u16 scr_readw(volatile const u16 *addr)
+static inline u16 scr_readw(volatile const u16 *addr)
 {
         if (__is_ioaddr(addr))
                 return __raw_readw((volatile const u16 __iomem *) addr);
@@ -29,7 +29,7 @@ extern inline u16 scr_readw(volatile const u16 *addr)
                 return *addr;
 }
 
-extern inline void scr_memsetw(u16 *s, u16 c, unsigned int count)
+static inline void scr_memsetw(u16 *s, u16 c, unsigned int count)
 {
         if (__is_ioaddr(s))
                 memsetw_io((u16 __iomem *) s, c, count);
diff --git a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
index 96bd09e31e36..2526b6ed6faa 100644
--- a/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf527/bfin_serial_5xx.h
@@ -96,7 +96,7 @@ struct bfin_serial_port {
         struct work_struct tx_dma_workqueue;
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-        struct work_struct cts_workqueue;
+        struct timer_list cts_timer;
         int cts_pin;
         int rts_pin;
 #endif
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index e924569ad1d8..ebf592b59aab 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -88,7 +88,7 @@ struct bfin_serial_port {
 # endif
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-        struct work_struct      cts_workqueue;
+        struct timer_list       cts_timer;
         int                     cts_pin;
         int                     rts_pin;
 #endif
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index 41d7b6490bb1..1bf56ffa22f9 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -96,7 +96,7 @@ struct bfin_serial_port {
         struct work_struct      tx_dma_workqueue;
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-        struct work_struct      cts_workqueue;
+        struct timer_list       cts_timer;
         int             cts_pin;
         int             rts_pin;
 #endif
diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
index 59b4ad4e5b4a..5e29446a8e03 100644
--- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h
@@ -99,7 +99,7 @@ struct bfin_serial_port {
         struct work_struct      tx_dma_workqueue;
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-        struct work_struct      cts_workqueue;
+        struct timer_list       cts_timer;
         int             cts_pin;
         int             rts_pin;
 #endif
@@ -187,7 +187,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 
 #ifdef CONFIG_BFIN_UART1_CTSRTS
         peripheral_request(P_UART1_RTS, DRIVER_NAME);
-        peripheral_request(P_UART1_CTS DRIVER_NAME);
+        peripheral_request(P_UART1_CTS, DRIVER_NAME);
 #endif
 #endif
 
@@ -202,7 +202,7 @@ static void bfin_serial_hw_init(struct bfin_serial_port *uart)
 
 #ifdef CONFIG_BFIN_UART3_CTSRTS
         peripheral_request(P_UART3_RTS, DRIVER_NAME);
-        peripheral_request(P_UART3_CTS DRIVER_NAME);
+        peripheral_request(P_UART3_CTS, DRIVER_NAME);
 #endif
 #endif
         SSYNC();
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index 30d90b580f18..8aa02780e642 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -88,7 +88,7 @@ struct bfin_serial_port {
 # endif
 #endif
 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
-        struct work_struct      cts_workqueue;
+        struct timer_list       cts_timer;
         int                     cts_pin;
         int                     rts_pin;
 #endif
diff --git a/include/asm-x86/geode.h b/include/asm-x86/geode.h
index 6e6458853a36..bb06027fc83e 100644
--- a/include/asm-x86/geode.h
+++ b/include/asm-x86/geode.h
@@ -112,8 +112,8 @@ extern int geode_get_dev_base(unsigned int dev);
 #define VSA_VR_UNLOCK           0xFC53  /* unlock virtual register */
 #define VSA_VR_SIGNATURE        0x0003
 #define VSA_VR_MEM_SIZE         0x0200
-#define VSA_SIG                 0x4132  /* signature is ascii 'VSA2' */
-
+#define AMD_VSA_SIG             0x4132  /* signature is ascii 'VSA2' */
+#define GSW_VSA_SIG             0x534d  /* General Software signature */
 /* GPIO */
 
 #define GPIO_OUTPUT_VAL         0x00
diff --git a/include/asm-x86/kvm_host.h b/include/asm-x86/kvm_host.h
index 1d8cd01fa514..844f2a89afbc 100644
--- a/include/asm-x86/kvm_host.h
+++ b/include/asm-x86/kvm_host.h
@@ -18,6 +18,7 @@
 #include <linux/kvm_para.h>
 #include <linux/kvm_types.h>
 
+#include <asm/pvclock-abi.h>
 #include <asm/desc.h>
 
 #define KVM_MAX_VCPUS 16
@@ -282,7 +283,8 @@ struct kvm_vcpu_arch {
         struct x86_emulate_ctxt emulate_ctxt;
 
         gpa_t time;
-        struct kvm_vcpu_time_info hv_clock;
+        struct pvclock_vcpu_time_info hv_clock;
+        unsigned int hv_clock_tsc_khz;
         unsigned int time_offset;
         struct page *time_page;
 };
diff --git a/include/asm-x86/kvm_para.h b/include/asm-x86/kvm_para.h
index 509845942070..bfd9900742bf 100644
--- a/include/asm-x86/kvm_para.h
+++ b/include/asm-x86/kvm_para.h
@@ -48,24 +48,6 @@ struct kvm_mmu_op_release_pt {
 #ifdef __KERNEL__
 #include <asm/processor.h>
 
-/* xen binary-compatible interface. See xen headers for details */
-struct kvm_vcpu_time_info {
-        uint32_t version;
-        uint32_t pad0;
-        uint64_t tsc_timestamp;
-        uint64_t system_time;
-        uint32_t tsc_to_system_mul;
-        int8_t   tsc_shift;
-        int8_t   pad[3];
-} __attribute__((__packed__)); /* 32 bytes */
-
-struct kvm_wall_clock {
-        uint32_t wc_version;
-        uint32_t wc_sec;
-        uint32_t wc_nsec;
-} __attribute__((__packed__));
-
-
 extern void kvmclock_init(void);
 
 
diff --git a/include/asm-x86/page_32.h b/include/asm-x86/page_32.h
index 424e82f8ae27..ccf0ba3c3aba 100644
--- a/include/asm-x86/page_32.h
+++ b/include/asm-x86/page_32.h
@@ -14,7 +14,8 @@
 #define __PAGE_OFFSET           _AC(CONFIG_PAGE_OFFSET, UL)
 
 #ifdef CONFIG_X86_PAE
-#define __PHYSICAL_MASK_SHIFT   36
+/* 44=32+12, the limit we can fit into an unsigned long pfn */
+#define __PHYSICAL_MASK_SHIFT   44
 #define __VIRTUAL_MASK_SHIFT    32
 #define PAGETABLE_LEVELS        3
 
diff --git a/include/asm-x86/pvclock-abi.h b/include/asm-x86/pvclock-abi.h
new file mode 100644
index 000000000000..6857f840b243
--- /dev/null
+++ b/include/asm-x86/pvclock-abi.h
@@ -0,0 +1,42 @@
+#ifndef _ASM_X86_PVCLOCK_ABI_H_
+#define _ASM_X86_PVCLOCK_ABI_H_
+#ifndef __ASSEMBLY__
+
+/*
+ * These structs MUST NOT be changed.
+ * They are the ABI between hypervisor and guest OS.
+ * Both Xen and KVM are using this.
+ *
+ * pvclock_vcpu_time_info holds the system time and the tsc timestamp
+ * of the last update. So the guest can use the tsc delta to get a
+ * more precise system time.  There is one per virtual cpu.
+ *
+ * pvclock_wall_clock references the point in time when the system
+ * time was zero (usually boot time), thus the guest calculates the
+ * current wall clock by adding the system time.
+ *
+ * Protocol for the "version" fields is: hypervisor raises it (making
+ * it uneven) before it starts updating the fields and raises it again
+ * (making it even) when it is done.  Thus the guest can make sure the
+ * time values it got are consistent by checking the version before
+ * and after reading them.
+ */
+
+struct pvclock_vcpu_time_info {
+        u32   version;
+        u32   pad0;
+        u64   tsc_timestamp;
+        u64   system_time;
+        u32   tsc_to_system_mul;
+        s8    tsc_shift;
+        u8    pad[3];
+} __attribute__((__packed__)); /* 32 bytes */
+
+struct pvclock_wall_clock {
+        u32   version;
+        u32   sec;
+        u32   nsec;
+} __attribute__((__packed__));
+
+#endif /* __ASSEMBLY__ */
+#endif /* _ASM_X86_PVCLOCK_ABI_H_ */
diff --git a/include/asm-x86/pvclock.h b/include/asm-x86/pvclock.h
new file mode 100644
index 000000000000..85b1bba8e0a3
--- /dev/null
+++ b/include/asm-x86/pvclock.h
@@ -0,0 +1,13 @@
+#ifndef _ASM_X86_PVCLOCK_H_
+#define _ASM_X86_PVCLOCK_H_
+
+#include <linux/clocksource.h>
+#include <asm/pvclock-abi.h>
+
+/* some helper functions for xen and kvm pv clock sources */
+cycle_t pvclock_clocksource_read(struct pvclock_vcpu_time_info *src);
+void pvclock_read_wallclock(struct pvclock_wall_clock *wall,
+                            struct pvclock_vcpu_time_info *vcpu,
+                            struct timespec *ts);
+
+#endif /* _ASM_X86_PVCLOCK_H_ */
diff --git a/include/asm-x86/xen/page.h b/include/asm-x86/xen/page.h
index baf3a4dce28c..e11f24038b1d 100644
--- a/include/asm-x86/xen/page.h
+++ b/include/asm-x86/xen/page.h
@@ -150,13 +150,9 @@ static inline pte_t __pte_ma(pteval_t x)
         return (pte_t) { .pte = x };
 }
 
-#ifdef CONFIG_X86_PAE
 #define pmd_val_ma(v) ((v).pmd)
 #define pud_val_ma(v) ((v).pgd.pgd)
 #define __pmd_ma(x)     ((pmd_t) { (x) } )
-#else  /* !X86_PAE */
-#define pmd_val_ma(v)   ((v).pud.pgd.pgd)
-#endif  /* CONFIG_X86_PAE */
 
 #define pgd_val_ma(x)   ((x).pgd)
 
diff --git a/include/linux/bootmem.h b/include/linux/bootmem.h
index 6a5dbdc8a7dc..686895bacd9d 100644
--- a/include/linux/bootmem.h
+++ b/include/linux/bootmem.h
@@ -94,7 +94,7 @@ extern unsigned long init_bootmem_node(pg_data_t *pgdat,
                                        unsigned long freepfn,
                                        unsigned long startpfn,
                                        unsigned long endpfn);
-extern void reserve_bootmem_node(pg_data_t *pgdat,
+extern int reserve_bootmem_node(pg_data_t *pgdat,
                                  unsigned long physaddr,
                                  unsigned long size,
                                  int flags);
diff --git a/include/linux/kvm_host.h b/include/linux/kvm_host.h
index 092b1b25291d..de9d1df4bba2 100644
--- a/include/linux/kvm_host.h
+++ b/include/linux/kvm_host.h
@@ -33,6 +33,7 @@
 #define KVM_REQ_REPORT_TPR_ACCESS  2
 #define KVM_REQ_MMU_RELOAD         3
 #define KVM_REQ_TRIPLE_FAULT       4
+#define KVM_REQ_PENDING_TIMER      5
 
 struct kvm_vcpu;
 extern struct kmem_cache *kvm_vcpu_cache;
diff --git a/include/linux/tty_driver.h b/include/linux/tty_driver.h
index 59f1c0bd8f9c..d2a003586761 100644
--- a/include/linux/tty_driver.h
+++ b/include/linux/tty_driver.h
@@ -27,8 +27,7 @@
  *      This routine is called by the kernel to write a series of
  *      characters to the tty device.  The characters may come from
  *      user space or kernel space.  This routine will return the
- *      number of characters actually accepted for writing.  This
- *      routine is mandatory.
+ *      number of characters actually accepted for writing.
  *
  *      Optional: Required for writable devices.
  *
@@ -134,7 +133,7 @@
  *      This routine notifies the tty driver that it should hangup the
  *      tty device.
  *
- *      Required:
+ *      Optional:
  *
  * void (*break_ctl)(struct tty_stuct *tty, int state);
  *
diff --git a/include/net/ipv6.h b/include/net/ipv6.h
index e0a612bc9c4e..f422f7218e1c 100644
--- a/include/net/ipv6.h
+++ b/include/net/ipv6.h
@@ -367,6 +367,12 @@ static inline int ipv6_addr_any(const struct in6_addr *a)
                  a->s6_addr32[2] | a->s6_addr32[3] ) == 0); 
 }
 
+static inline int ipv6_addr_loopback(const struct in6_addr *a)
+{
+        return ((a->s6_addr32[0] | a->s6_addr32[1] |
+                 a->s6_addr32[2] | (a->s6_addr32[3] ^ htonl(1))) == 0);
+}
+
 static inline int ipv6_addr_v4mapped(const struct in6_addr *a)
 {
         return ((a->s6_addr32[0] | a->s6_addr32[1] |
diff --git a/include/net/net_namespace.h b/include/net/net_namespace.h
index aa540e6be502..d9dd0f707296 100644
--- a/include/net/net_namespace.h
+++ b/include/net/net_namespace.h
@@ -95,6 +95,11 @@ extern struct list_head net_namespace_list;
 #ifdef CONFIG_NET_NS
 extern void __put_net(struct net *net);
 
+static inline int net_alive(struct net *net)
+{
+        return net && atomic_read(&net->count);
+}
+
 static inline struct net *get_net(struct net *net)
 {
         atomic_inc(&net->count);
@@ -125,6 +130,12 @@ int net_eq(const struct net *net1, const struct net *net2)
         return net1 == net2;
 }
 #else
+
+static inline int net_alive(struct net *net)
+{
+        return 1;
+}
+
 static inline struct net *get_net(struct net *net)
 {
         return net;
diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h
index 9b018da48cf3..819a0331cda9 100644
--- a/include/xen/interface/xen.h
+++ b/include/xen/interface/xen.h
@@ -10,6 +10,7 @@
 #define __XEN_PUBLIC_XEN_H__
 
 #include <asm/xen/interface.h>
+#include <asm/pvclock-abi.h>
 
 /*
  * XEN "SYSTEM CALLS" (a.k.a. HYPERCALLS).
@@ -336,7 +337,7 @@ struct vcpu_info {
         uint8_t evtchn_upcall_mask;
         unsigned long evtchn_pending_sel;
         struct arch_vcpu_info arch;
-        struct vcpu_time_info time;
+        struct pvclock_vcpu_time_info time;
 }; /* 64 bytes (x86) */
 
 /*
@@ -384,9 +385,7 @@ struct shared_info {
          * Wallclock time: updated only by control software. Guests should base
          * their gettimeofday() syscall on this wallclock-base value.
          */
-        uint32_t wc_version;      /* Version counter: see vcpu_time_info_t. */
-        uint32_t wc_sec;          /* Secs  00:00:00 UTC, Jan 1, 1970.  */
-        uint32_t wc_nsec;         /* Nsecs 00:00:00 UTC, Jan 1, 1970.  */
+        struct pvclock_wall_clock wc;
 
         struct arch_shared_info arch;
 
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 039baa4cd90c..9fceb97e989c 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -1037,8 +1037,8 @@ int current_cpuset_is_being_rebound(void)
 
 static int update_relax_domain_level(struct cpuset *cs, s64 val)
 {
-        if ((int)val < 0)
-                val = -1;
+        if (val < -1 || val >= SD_LV_MAX)
+                return -EINVAL;
 
         if (val != cs->relax_domain_level) {
                 cs->relax_domain_level = val;
@@ -1890,6 +1890,12 @@ static void common_cpu_mem_hotplug_unplug(void)
         top_cpuset.mems_allowed = node_states[N_HIGH_MEMORY];
         scan_for_empty_cpusets(&top_cpuset);
 
+        /*
+         * Scheduler destroys domains on hotplug events.
+         * Rebuild them based on the current settings.
+         */
+        rebuild_sched_domains();
+
         cgroup_unlock();
 }
 
diff --git a/kernel/futex.c b/kernel/futex.c
index 449def8074fe..7d1136e97c14 100644
--- a/kernel/futex.c
+++ b/kernel/futex.c
@@ -1096,21 +1096,64 @@ static void unqueue_me_pi(struct futex_q *q)
  * private futexes.
  */
 static int fixup_pi_state_owner(u32 __user *uaddr, struct futex_q *q,
-                                struct task_struct *newowner)
+                                struct task_struct *newowner,
+                                struct rw_semaphore *fshared)
 {
         u32 newtid = task_pid_vnr(newowner) | FUTEX_WAITERS;
         struct futex_pi_state *pi_state = q->pi_state;
+        struct task_struct *oldowner = pi_state->owner;
         u32 uval, curval, newval;
-        int ret;
+        int ret, attempt = 0;
 
         /* Owner died? */
+        if (!pi_state->owner)
+                newtid |= FUTEX_OWNER_DIED;
+
+        /*
+         * We are here either because we stole the rtmutex from the
+         * pending owner or we are the pending owner which failed to
+         * get the rtmutex. We have to replace the pending owner TID
+         * in the user space variable. This must be atomic as we have
+         * to preserve the owner died bit here.
+         *
+         * Note: We write the user space value _before_ changing the
+         * pi_state because we can fault here. Imagine swapped out
+         * pages or a fork, which was running right before we acquired
+         * mmap_sem, that marked all the anonymous memory readonly for
+         * cow.
+         *
+         * Modifying pi_state _before_ the user space value would
+         * leave the pi_state in an inconsistent state when we fault
+         * here, because we need to drop the hash bucket lock to
+         * handle the fault. This might be observed in the PID check
+         * in lookup_pi_state.
+         */
+retry:
+        if (get_futex_value_locked(&uval, uaddr))
+                goto handle_fault;
+
+        while (1) {
+                newval = (uval & FUTEX_OWNER_DIED) | newtid;
+
+                curval = cmpxchg_futex_value_locked(uaddr, uval, newval);
+
+                if (curval == -EFAULT)
+                        goto handle_fault;
+                if (curval == uval)
+                        break;
+                uval = curval;
+        }
+
+        /*
+         * We fixed up user space. Now we need to fix the pi_state
+         * itself.
+         */
         if (pi_state->owner != NULL) {
                 spin_lock_irq(&pi_state->owner->pi_lock);
                 WARN_ON(list_empty(&pi_state->list));
                 list_del_init(&pi_state->list);
                 spin_unlock_irq(&pi_state->owner->pi_lock);
-        } else
-                newtid |= FUTEX_OWNER_DIED;
+        }
 
         pi_state->owner = newowner;
 
@@ -1118,26 +1161,35 @@ static int fixup_pi_state_owner(u32 __user *uaddr, struct futex_q *q,
         WARN_ON(!list_empty(&pi_state->list));
         list_add(&pi_state->list, &newowner->pi_state_list);
         spin_unlock_irq(&newowner->pi_lock);
+        return 0;
 
         /*
-         * We own it, so we have to replace the pending owner
-         * TID. This must be atomic as we have preserve the
-         * owner died bit here.
+         * To handle the page fault we need to drop the hash bucket
+         * lock here. That gives the other task (either the pending
+         * owner itself or the task which stole the rtmutex) the
+         * chance to try the fixup of the pi_state. So once we are
+         * back from handling the fault we need to check the pi_state
+         * after reacquiring the hash bucket lock and before trying to
+         * do another fixup. When the fixup has been done already we
+         * simply return.
          */
-        ret = get_futex_value_locked(&uval, uaddr);
+handle_fault:
+        spin_unlock(q->lock_ptr);
 
-        while (!ret) {
-                newval = (uval & FUTEX_OWNER_DIED) | newtid;
+        ret = futex_handle_fault((unsigned long)uaddr, fshared, attempt++);
 
-                curval = cmpxchg_futex_value_locked(uaddr, uval, newval);
+        spin_lock(q->lock_ptr);
 
-                if (curval == -EFAULT)
-                        ret = -EFAULT;
-                if (curval == uval)
-                        break;
-                uval = curval;
-        }
-        return ret;
+        /*
+         * Check if someone else fixed it for us:
+         */
+        if (pi_state->owner != oldowner)
+                return 0;
+
+        if (ret)
+                return ret;
+
+        goto retry;
 }
 
 /*
@@ -1507,7 +1559,7 @@ static int futex_lock_pi(u32 __user *uaddr, struct rw_semaphore *fshared,
                  * that case:
                  */
                 if (q.pi_state->owner != curr)
-                        ret = fixup_pi_state_owner(uaddr, &q, curr);
+                        ret = fixup_pi_state_owner(uaddr, &q, curr, fshared);
         } else {
                 /*
                  * Catch the rare case, where the lock was released
@@ -1539,7 +1591,8 @@ static int futex_lock_pi(u32 __user *uaddr, struct rw_semaphore *fshared,
                                 int res;
 
                                 owner = rt_mutex_owner(&q.pi_state->pi_mutex);
-                                res = fixup_pi_state_owner(uaddr, &q, owner);
+                                res = fixup_pi_state_owner(uaddr, &q, owner,
+                                                           fshared);
 
                                 /* propagate -EFAULT, if the fixup failed */
                                 if (res)
diff --git a/kernel/kgdb.c b/kernel/kgdb.c
index 79e3c90113c2..3ec23c3ec97f 100644
--- a/kernel/kgdb.c
+++ b/kernel/kgdb.c
@@ -1499,7 +1499,8 @@ int kgdb_nmicallback(int cpu, void *regs)
         return 1;
 }
 
-void kgdb_console_write(struct console *co, const char *s, unsigned count)
+static void kgdb_console_write(struct console *co, const char *s,
+   unsigned count)
 {
         unsigned long flags;
 
diff --git a/kernel/rcupreempt.c b/kernel/rcupreempt.c
index e1cdf196a515..5e02b7740702 100644
--- a/kernel/rcupreempt.c
+++ b/kernel/rcupreempt.c
@@ -217,8 +217,6 @@ long rcu_batches_completed(void)
 }
 EXPORT_SYMBOL_GPL(rcu_batches_completed);
 
-EXPORT_SYMBOL_GPL(rcu_batches_completed_bh);
-
 void __rcu_read_lock(void)
 {
         int idx;
diff --git a/kernel/sched.c b/kernel/sched.c
index eaf6751e7612..3aaa5c8cb421 100644
--- a/kernel/sched.c
+++ b/kernel/sched.c
@@ -1127,6 +1127,7 @@ static enum hrtimer_restart hrtick(struct hrtimer *timer)
         return HRTIMER_NORESTART;
 }
 
+#ifdef CONFIG_SMP
 static void hotplug_hrtick_disable(int cpu)
 {
         struct rq *rq = cpu_rq(cpu);
@@ -1182,6 +1183,7 @@ static void init_hrtick(void)
 {
         hotcpu_notifier(hotplug_hrtick, 0);
 }
+#endif /* CONFIG_SMP */
 
 static void init_rq_hrtick(struct rq *rq)
 {
@@ -4396,22 +4398,20 @@ do_wait_for_common(struct completion *x, long timeout, int state)
                              signal_pending(current)) ||
                             (state == TASK_KILLABLE &&
                              fatal_signal_pending(current))) {
-                                __remove_wait_queue(&x->wait, &wait);
-                                return -ERESTARTSYS;
+                                timeout = -ERESTARTSYS;
+                                break;
                         }
                         __set_current_state(state);
                         spin_unlock_irq(&x->wait.lock);
                         timeout = schedule_timeout(timeout);
                         spin_lock_irq(&x->wait.lock);
-                        if (!timeout) {
-                                __remove_wait_queue(&x->wait, &wait);
-                                return timeout;
-                        }
-                } while (!x->done);
+                } while (!x->done && timeout);
                 __remove_wait_queue(&x->wait, &wait);
+                if (!x->done)
+                        return timeout;
         }
         x->done--;
-        return timeout;
+        return timeout ?: 1;
 }
 
 static long __sched
@@ -6877,7 +6877,12 @@ static int default_relax_domain_level = -1;
 
 static int __init setup_relax_domain_level(char *str)
 {
-        default_relax_domain_level = simple_strtoul(str, NULL, 0);
+        unsigned long val;
+
+        val = simple_strtoul(str, NULL, 0);
+        if (val < SD_LV_MAX)
+                default_relax_domain_level = val;
+
         return 1;
 }
 __setup("relax_domain_level=", setup_relax_domain_level);
@@ -7236,6 +7241,18 @@ void __attribute__((weak)) arch_update_cpu_topology(void)
 }
 
 /*
+ * Free current domain masks.
+ * Called after all cpus are attached to NULL domain.
+ */
+static void free_sched_domains(void)
+{
+        ndoms_cur = 0;
+        if (doms_cur != &fallback_doms)
+                kfree(doms_cur);
+        doms_cur = &fallback_doms;
+}
+
+/*
  * Set up scheduler domains and groups. Callers must hold the hotplug lock.
  * For now this just excludes isolated cpus, but could be used to
  * exclude other special cases in the future.
@@ -7382,6 +7399,7 @@ int arch_reinit_sched_domains(void)
         get_online_cpus();
         mutex_lock(&sched_domains_mutex);
         detach_destroy_domains(&cpu_online_map);
+        free_sched_domains();
         err = arch_init_sched_domains(&cpu_online_map);
         mutex_unlock(&sched_domains_mutex);
         put_online_cpus();
@@ -7467,6 +7485,7 @@ static int update_sched_domains(struct notifier_block *nfb,
         case CPU_DOWN_PREPARE:
         case CPU_DOWN_PREPARE_FROZEN:
                 detach_destroy_domains(&cpu_online_map);
+                free_sched_domains();
                 return NOTIFY_OK;
 
         case CPU_UP_CANCELED:
@@ -7485,8 +7504,16 @@ static int update_sched_domains(struct notifier_block *nfb,
                 return NOTIFY_DONE;
         }
 
+#ifndef CONFIG_CPUSETS
+        /*
+         * Create default domain partitioning if cpusets are disabled.
+         * Otherwise we let cpusets rebuild the domains based on the
+         * current setup.
+         */
+
         /* The hotplug lock is already held by cpu_up/cpu_down */
         arch_init_sched_domains(&cpu_online_map);
+#endif
 
         return NOTIFY_OK;
 }
@@ -7626,7 +7653,6 @@ static void init_tg_rt_entry(struct task_group *tg, struct rt_rq *rt_rq,
         else
                 rt_se->rt_rq = parent->my_q;
 
-        rt_se->rt_rq = &rq->rt;
         rt_se->my_q = rt_rq;
         rt_se->parent = parent;
         INIT_LIST_HEAD(&rt_se->run_list);
@@ -8348,7 +8374,7 @@ static unsigned long to_ratio(u64 period, u64 runtime)
 #ifdef CONFIG_CGROUP_SCHED
 static int __rt_schedulable(struct task_group *tg, u64 period, u64 runtime)
 {
-        struct task_group *tgi, *parent = tg->parent;
+        struct task_group *tgi, *parent = tg ? tg->parent : NULL;
         unsigned long total = 0;
 
         if (!parent) {
diff --git a/kernel/sched_rt.c b/kernel/sched_rt.c
index 3432d573205d..0f3c19197fa4 100644
--- a/kernel/sched_rt.c
+++ b/kernel/sched_rt.c
@@ -250,7 +250,8 @@ static int do_sched_rt_period_timer(struct rt_bandwidth *rt_b, int overrun)
                         if (rt_rq->rt_time || rt_rq->rt_nr_running)
                                 idle = 0;
                         spin_unlock(&rt_rq->rt_runtime_lock);
-                }
+                } else if (rt_rq->rt_nr_running)
+                        idle = 0;
 
                 if (enqueue)
                         sched_rt_rq_enqueue(rt_rq);
@@ -449,13 +450,19 @@ void dec_rt_tasks(struct sched_rt_entity *rt_se, struct rt_rq *rt_rq)
 #endif
 }
 
-static void enqueue_rt_entity(struct sched_rt_entity *rt_se)
+static void __enqueue_rt_entity(struct sched_rt_entity *rt_se)
 {
         struct rt_rq *rt_rq = rt_rq_of_se(rt_se);
         struct rt_prio_array *array = &rt_rq->active;
         struct rt_rq *group_rq = group_rt_rq(rt_se);
 
-        if (group_rq && rt_rq_throttled(group_rq))
+        /*
+         * Don't enqueue the group if its throttled, or when empty.
+         * The latter is a consequence of the former when a child group
+         * get throttled and the current group doesn't have any other
+         * active members.
+         */
+        if (group_rq && (rt_rq_throttled(group_rq) || !group_rq->rt_nr_running))
                 return;
 
         list_add_tail(&rt_se->run_list, array->queue + rt_se_prio(rt_se));
@@ -464,7 +471,7 @@ static void enqueue_rt_entity(struct sched_rt_entity *rt_se)
         inc_rt_tasks(rt_se, rt_rq);
 }
 
-static void dequeue_rt_entity(struct sched_rt_entity *rt_se)
+static void __dequeue_rt_entity(struct sched_rt_entity *rt_se)
 {
         struct rt_rq *rt_rq = rt_rq_of_se(rt_se);
         struct rt_prio_array *array = &rt_rq->active;
@@ -480,11 +487,10 @@ static void dequeue_rt_entity(struct sched_rt_entity *rt_se)
  * Because the prio of an upper entry depends on the lower
  * entries, we must remove entries top - down.
  */
-static void dequeue_rt_stack(struct task_struct *p)
+static void dequeue_rt_stack(struct sched_rt_entity *rt_se)
 {
-        struct sched_rt_entity *rt_se, *back = NULL;
+        struct sched_rt_entity *back = NULL;
 
-        rt_se = &p->rt;
         for_each_sched_rt_entity(rt_se) {
                 rt_se->back = back;
                 back = rt_se;
@@ -492,7 +498,26 @@ static void dequeue_rt_stack(struct task_struct *p)
 
         for (rt_se = back; rt_se; rt_se = rt_se->back) {
                 if (on_rt_rq(rt_se))
-                        dequeue_rt_entity(rt_se);
+                        __dequeue_rt_entity(rt_se);
+        }
+}
+
+static void enqueue_rt_entity(struct sched_rt_entity *rt_se)
+{
+        dequeue_rt_stack(rt_se);
+        for_each_sched_rt_entity(rt_se)
+                __enqueue_rt_entity(rt_se);
+}
+
+static void dequeue_rt_entity(struct sched_rt_entity *rt_se)
+{
+        dequeue_rt_stack(rt_se);
+
+        for_each_sched_rt_entity(rt_se) {
+                struct rt_rq *rt_rq = group_rt_rq(rt_se);
+
+                if (rt_rq && rt_rq->rt_nr_running)
+                        __enqueue_rt_entity(rt_se);
         }
 }
 
@@ -506,32 +531,15 @@ static void enqueue_task_rt(struct rq *rq, struct task_struct *p, int wakeup)
         if (wakeup)
                 rt_se->timeout = 0;
 
-        dequeue_rt_stack(p);
-
-        /*
-         * enqueue everybody, bottom - up.
-         */
-        for_each_sched_rt_entity(rt_se)
-                enqueue_rt_entity(rt_se);
+        enqueue_rt_entity(rt_se);
 }
 
 static void dequeue_task_rt(struct rq *rq, struct task_struct *p, int sleep)
 {
         struct sched_rt_entity *rt_se = &p->rt;
-        struct rt_rq *rt_rq;
 
         update_curr_rt(rq);
-
-        dequeue_rt_stack(p);
-
-        /*
-         * re-enqueue all non-empty rt_rq entities.
-         */
-        for_each_sched_rt_entity(rt_se) {
-                rt_rq = group_rt_rq(rt_se);
-                if (rt_rq && rt_rq->rt_nr_running)
-                        enqueue_rt_entity(rt_se);
-        }
+        dequeue_rt_entity(rt_se);
 }
 
 /*
@@ -542,8 +550,10 @@ static
 void requeue_rt_entity(struct rt_rq *rt_rq, struct sched_rt_entity *rt_se)
 {
         struct rt_prio_array *array = &rt_rq->active;
+        struct list_head *queue = array->queue + rt_se_prio(rt_se);
 
-        list_move_tail(&rt_se->run_list, array->queue + rt_se_prio(rt_se));
+        if (on_rt_rq(rt_se))
+                list_move_tail(&rt_se->run_list, queue);
 }
 
 static void requeue_task_rt(struct rq *rq, struct task_struct *p)
diff --git a/kernel/sched_stats.h b/kernel/sched_stats.h
index a38878e0e49d..80179ef7450e 100644
--- a/kernel/sched_stats.h
+++ b/kernel/sched_stats.h
@@ -198,6 +198,9 @@ static inline void sched_info_queued(struct task_struct *t)
 /*
  * Called when a process ceases being the active-running process, either
  * voluntarily or involuntarily.  Now we can calculate how long we ran.
+ * Also, if the process is still in the TASK_RUNNING state, call
+ * sched_info_queued() to mark that it has now again started waiting on
+ * the runqueue.
  */
 static inline void sched_info_depart(struct task_struct *t)
 {
@@ -206,6 +209,9 @@ static inline void sched_info_depart(struct task_struct *t)
 
         t->sched_info.cpu_time += delta;
         rq_sched_info_depart(task_rq(t), delta);
+
+        if (t->state == TASK_RUNNING)
+                sched_info_queued(t);
 }
 
 /*
diff --git a/kernel/softlockup.c b/kernel/softlockup.c
index 01b6522fd92b..c828c2339cc9 100644
--- a/kernel/softlockup.c
+++ b/kernel/softlockup.c
@@ -49,12 +49,17 @@ static unsigned long get_timestamp(int this_cpu)
         return cpu_clock(this_cpu) >> 30LL;  /* 2^30 ~= 10^9 */
 }
 
-void touch_softlockup_watchdog(void)
+static void __touch_softlockup_watchdog(void)
 {
         int this_cpu = raw_smp_processor_id();
 
         __raw_get_cpu_var(touch_timestamp) = get_timestamp(this_cpu);
 }
+
+void touch_softlockup_watchdog(void)
+{
+        __raw_get_cpu_var(touch_timestamp) = 0;
+}
 EXPORT_SYMBOL(touch_softlockup_watchdog);
 
 void touch_all_softlockup_watchdogs(void)
@@ -80,7 +85,7 @@ void softlockup_tick(void)
         unsigned long now;
 
         if (touch_timestamp == 0) {
-                touch_softlockup_watchdog();
+                __touch_softlockup_watchdog();
                 return;
         }
 
@@ -95,7 +100,7 @@ void softlockup_tick(void)
 
         /* do not print during early bootup: */
         if (unlikely(system_state != SYSTEM_RUNNING)) {
-                touch_softlockup_watchdog();
+                __touch_softlockup_watchdog();
                 return;
         }
 
@@ -214,7 +219,7 @@ static int watchdog(void *__bind_cpu)
         sched_setscheduler(current, SCHED_FIFO, &param);
 
         /* initialize timestamp */
-        touch_softlockup_watchdog();
+        __touch_softlockup_watchdog();
 
         set_current_state(TASK_INTERRUPTIBLE);
         /*
@@ -223,7 +228,7 @@ static int watchdog(void *__bind_cpu)
          * debug-printout triggers in softlockup_tick().
          */
         while (!kthread_should_stop()) {
-                touch_softlockup_watchdog();
+                __touch_softlockup_watchdog();
                 schedule();
 
                 if (kthread_should_stop())
diff --git a/mm/bootmem.c b/mm/bootmem.c
index e8fb927392b9..8d9f60e06f62 100644
--- a/mm/bootmem.c
+++ b/mm/bootmem.c
@@ -442,15 +442,17 @@ unsigned long __init init_bootmem_node(pg_data_t *pgdat, unsigned long freepfn,
         return init_bootmem_core(pgdat, freepfn, startpfn, endpfn);
 }
 
-void __init reserve_bootmem_node(pg_data_t *pgdat, unsigned long physaddr,
+int __init reserve_bootmem_node(pg_data_t *pgdat, unsigned long physaddr,
                                  unsigned long size, int flags)
 {
         int ret;
 
         ret = can_reserve_bootmem_core(pgdat->bdata, physaddr, size, flags);
         if (ret < 0)
-                return;
+                return -ENOMEM;
         reserve_bootmem_core(pgdat->bdata, physaddr, size, flags);
+
+        return 0;
 }
 
 void __init free_bootmem_node(pg_data_t *pgdat, unsigned long physaddr,
diff --git a/mm/memory.c b/mm/memory.c
index 19e0ae9beecb..d14b251a25a6 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -999,17 +999,15 @@ struct page *follow_page(struct vm_area_struct *vma, unsigned long address,
                 goto no_page_table;
 
         ptep = pte_offset_map_lock(mm, pmd, address, &ptl);
-        if (!ptep)
-                goto out;
 
         pte = *ptep;
         if (!pte_present(pte))
-                goto unlock;
+                goto no_page;
         if ((flags & FOLL_WRITE) && !pte_write(pte))
                 goto unlock;
         page = vm_normal_page(vma, address, pte);
         if (unlikely(!page))
-                goto unlock;
+                goto bad_page;
 
         if (flags & FOLL_GET)
                 get_page(page);
@@ -1024,6 +1022,15 @@ unlock:
 out:
         return page;
 
+bad_page:
+        pte_unmap_unlock(ptep, ptl);
+        return ERR_PTR(-EFAULT);
+
+no_page:
+        pte_unmap_unlock(ptep, ptl);
+        if (!pte_none(pte))
+                return page;
+        /* Fall through to ZERO_PAGE handling */
 no_page_table:
         /*
          * When core dumping an enormous anonymous area that nobody
@@ -1038,6 +1045,26 @@ no_page_table:
         return page;
 }
 
+/* Can we do the FOLL_ANON optimization? */
+static inline int use_zero_page(struct vm_area_struct *vma)
+{
+        /*
+         * We don't want to optimize FOLL_ANON for make_pages_present()
+         * when it tries to page in a VM_LOCKED region. As to VM_SHARED,
+         * we want to get the page from the page tables to make sure
+         * that we serialize and update with any other user of that
+         * mapping.
+         */
+        if (vma->vm_flags & (VM_LOCKED | VM_SHARED))
+                return 0;
+        /*
+         * And if we have a fault or a nopfn routine, it's not an
+         * anonymous region.
+         */
+        return !vma->vm_ops ||
+                (!vma->vm_ops->fault && !vma->vm_ops->nopfn);
+}
+
 int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
                 unsigned long start, int len, int write, int force,
                 struct page **pages, struct vm_area_struct **vmas)
@@ -1112,8 +1139,7 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
                 foll_flags = FOLL_TOUCH;
                 if (pages)
                         foll_flags |= FOLL_GET;
-                if (!write && !(vma->vm_flags & VM_LOCKED) &&
-                    (!vma->vm_ops || !vma->vm_ops->fault))
+                if (!write && use_zero_page(vma))
                         foll_flags |= FOLL_ANON;
 
                 do {
@@ -1159,6 +1185,8 @@ int get_user_pages(struct task_struct *tsk, struct mm_struct *mm,
 
                                 cond_resched();
                         }
+                        if (IS_ERR(page))
+                                return i ? i : PTR_ERR(page);
                         if (pages) {
                                 pages[i] = page;
 
@@ -1757,7 +1785,6 @@ gotten:
         page_table = pte_offset_map_lock(mm, pmd, address, &ptl);
         if (likely(pte_same(*page_table, orig_pte))) {
                 if (old_page) {
-                        page_remove_rmap(old_page, vma);
                         if (!PageAnon(old_page)) {
                                 dec_mm_counter(mm, file_rss);
                                 inc_mm_counter(mm, anon_rss);
@@ -1779,6 +1806,32 @@ gotten:
                 lru_cache_add_active(new_page);
                 page_add_new_anon_rmap(new_page, vma, address);
 
+                if (old_page) {
+                        /*
+                         * Only after switching the pte to the new page may
+                         * we remove the mapcount here. Otherwise another
+                         * process may come and find the rmap count decremented
+                         * before the pte is switched to the new page, and
+                         * "reuse" the old page writing into it while our pte
+                         * here still points into it and can be read by other
+                         * threads.
+                         *
+                         * The critical issue is to order this
+                         * page_remove_rmap with the ptp_clear_flush above.
+                         * Those stores are ordered by (if nothing else,)
+                         * the barrier present in the atomic_add_negative
+                         * in page_remove_rmap.
+                         *
+                         * Then the TLB flush in ptep_clear_flush ensures that
+                         * no process can access the old page before the
+                         * decremented mapcount is visible. And the old page
+                         * cannot be reused until after the decremented
+                         * mapcount is visible. So transitively, TLBs to
+                         * old page will be flushed before it can be reused.
+                         */
+                        page_remove_rmap(old_page, vma);
+                }
+
                 /* Free the old page.. */
                 new_page = old_page;
                 ret |= VM_FAULT_WRITE;
diff --git a/mm/migrate.c b/mm/migrate.c
index 449d77d409f5..112bcaeaa104 100644
--- a/mm/migrate.c
+++ b/mm/migrate.c
@@ -865,6 +865,11 @@ static int do_move_pages(struct mm_struct *mm, struct page_to_node *pm,
                         goto set_status;
 
                 page = follow_page(vma, pp->addr, FOLL_GET);
+
+                err = PTR_ERR(page);
+                if (IS_ERR(page))
+                        goto set_status;
+
                 err = -ENOENT;
                 if (!page)
                         goto set_status;
@@ -928,6 +933,11 @@ static int do_pages_stat(struct mm_struct *mm, struct page_to_node *pm)
                         goto set_status;
 
                 page = follow_page(vma, pm->addr, 0);
+
+                err = PTR_ERR(page);
+                if (IS_ERR(page))
+                        goto set_status;
+
                 err = -ENOENT;
                 /* Use PageReserved to check for zero page */
                 if (!page || PageReserved(page))
diff --git a/mm/slab.c b/mm/slab.c
index 06236e4ddc1b..046607f05f3e 100644
--- a/mm/slab.c
+++ b/mm/slab.c
@@ -3263,9 +3263,12 @@ retry:
 
                 if (cpuset_zone_allowed_hardwall(zone, flags) &&
                         cache->nodelists[nid] &&
-                        cache->nodelists[nid]->free_objects)
+                        cache->nodelists[nid]->free_objects) {
                                 obj = ____cache_alloc_node(cache,
                                         flags | GFP_THISNODE, nid);
+                                if (obj)
+                                        break;
+                }
         }
 
         if (!obj) {
diff --git a/net/core/dev.c b/net/core/dev.c
index 68d8df0992ab..c421a1f8f0b9 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -2077,6 +2077,10 @@ int netif_receive_skb(struct sk_buff *skb)
 
         rcu_read_lock();
 
+        /* Don't receive packets in an exiting network namespace */
+        if (!net_alive(dev_net(skb->dev)))
+                goto out;
+
 #ifdef CONFIG_NET_CLS_ACT
         if (skb->tc_verd & TC_NCLS) {
                 skb->tc_verd = CLR_TC_NCLS(skb->tc_verd);
diff --git a/net/core/net_namespace.c b/net/core/net_namespace.c
index 72b4c184dd84..7c52fe277b62 100644
--- a/net/core/net_namespace.c
+++ b/net/core/net_namespace.c
@@ -140,6 +140,9 @@ static void cleanup_net(struct work_struct *work)
         struct pernet_operations *ops;
         struct net *net;
 
+        /* Be very certain incoming network packets will not find us */
+        rcu_barrier();
+
         net = container_of(work, struct net, work);
 
         mutex_lock(&net_mutex);
diff --git a/net/ipv6/ip6_input.c b/net/ipv6/ip6_input.c
index 4e5c8615832c..17eb48b8e329 100644
--- a/net/ipv6/ip6_input.c
+++ b/net/ipv6/ip6_input.c
@@ -102,6 +102,15 @@ int ipv6_rcv(struct sk_buff *skb, struct net_device *dev, struct packet_type *pt
         if (hdr->version != 6)
                 goto err;
 
+        /*
+         * RFC4291 2.5.3
+         * A packet received on an interface with a destination address
+         * of loopback must be dropped.
+         */
+        if (!(dev->flags & IFF_LOOPBACK) &&
+            ipv6_addr_loopback(&hdr->daddr))
+                goto err;
+
         skb->transport_header = skb->network_header + sizeof(*hdr);
         IP6CB(skb)->nhoff = offsetof(struct ipv6hdr, nexthdr);
 
diff --git a/net/ipv6/ipv6_sockglue.c b/net/ipv6/ipv6_sockglue.c
index c042ce19bd14..86e28a75267f 100644
--- a/net/ipv6/ipv6_sockglue.c
+++ b/net/ipv6/ipv6_sockglue.c
@@ -345,18 +345,21 @@ static int do_ipv6_setsockopt(struct sock *sk, int level, int optname,
         case IPV6_DSTOPTS:
         {
                 struct ipv6_txoptions *opt;
+
+                /* remove any sticky options header with a zero option
+                 * length, per RFC3542.
+                 */
                 if (optlen == 0)
                         optval = NULL;
+                else if (optlen < sizeof(struct ipv6_opt_hdr) ||
+                         optlen & 0x7 || optlen > 8 * 255)
+                        goto e_inval;
 
                 /* hop-by-hop / destination options are privileged option */
                 retv = -EPERM;
                 if (optname != IPV6_RTHDR && !capable(CAP_NET_RAW))
                         break;
 
-                if (optlen < sizeof(struct ipv6_opt_hdr) ||
-                    optlen & 0x7 || optlen > 8 * 255)
-                        goto e_inval;
-
                 opt = ipv6_renew_options(sk, np->opt, optname,
                                          (struct ipv6_opt_hdr __user *)optval,
                                          optlen);
diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c
index 28d8bd53bd3a..c80d5899f279 100644
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
@@ -1132,7 +1132,7 @@ static int ieee80211_tx(struct net_device *dev, struct sk_buff *skb,
         ieee80211_tx_handler *handler;
         struct ieee80211_tx_data tx;
         ieee80211_tx_result res = TX_DROP, res_prepare;
-        int ret, i;
+        int ret, i, retries = 0;
 
         WARN_ON(__ieee80211_queue_pending(local, control->queue));
 
@@ -1216,6 +1216,13 @@ retry:
                 if (!__ieee80211_queue_stopped(local, control->queue)) {
                         clear_bit(IEEE80211_LINK_STATE_PENDING,
                                   &local->state[control->queue]);
+                        retries++;
+                        /*
+                         * Driver bug, it's rejecting packets but
+                         * not stopping queues.
+                         */
+                        if (WARN_ON_ONCE(retries > 5))
+                                goto drop;
                         goto retry;
                 }
                 memcpy(&store->control, control,
diff --git a/net/sctp/socket.c b/net/sctp/socket.c
index e7e3baf7009e..0dbcde6758ea 100644
--- a/net/sctp/socket.c
+++ b/net/sctp/socket.c
@@ -4401,7 +4401,9 @@ static int sctp_getsockopt_local_addrs_old(struct sock *sk, int len,
         if (copy_from_user(&getaddrs, optval, len))
                 return -EFAULT;
 
-        if (getaddrs.addr_num <= 0) return -EINVAL;
+        if (getaddrs.addr_num <= 0 ||
+            getaddrs.addr_num >= (INT_MAX / sizeof(union sctp_addr)))
+                return -EINVAL;
         /*
          *  For UDP-style sockets, id specifies the association to query.
          *  If the id field is set to the value '0' then the locally bound
diff --git a/sound/isa/sb/sb_mixer.c b/sound/isa/sb/sb_mixer.c
index 91d14224f6b3..73d4572d136b 100644
--- a/sound/isa/sb/sb_mixer.c
+++ b/sound/isa/sb/sb_mixer.c
@@ -925,7 +925,7 @@ static unsigned char als4000_saved_regs[] = {
 static void save_mixer(struct snd_sb *chip, unsigned char *regs, int num_regs)
 {
         unsigned char *val = chip->saved_regs;
-        snd_assert(num_regs > ARRAY_SIZE(chip->saved_regs), return);
+        snd_assert(num_regs <= ARRAY_SIZE(chip->saved_regs), return);
         for (; num_regs; num_regs--)
                 *val++ = snd_sbmixer_read(chip, *regs++);
 }
@@ -933,7 +933,7 @@ static void save_mixer(struct snd_sb *chip, unsigned char *regs, int num_regs)
 static void restore_mixer(struct snd_sb *chip, unsigned char *regs, int num_regs)
 {
         unsigned char *val = chip->saved_regs;
-        snd_assert(num_regs > ARRAY_SIZE(chip->saved_regs), return);
+        snd_assert(num_regs <= ARRAY_SIZE(chip->saved_regs), return);
         for (; num_regs; num_regs--)
                 snd_sbmixer_write(chip, *regs++, *val++);
 }
diff --git a/sound/pci/aw2/aw2-alsa.c b/sound/pci/aw2/aw2-alsa.c
index 56f87cd33c19..3f00ddf450f8 100644
--- a/sound/pci/aw2/aw2-alsa.c
+++ b/sound/pci/aw2/aw2-alsa.c
@@ -316,6 +316,8 @@ static int __devinit snd_aw2_create(struct snd_card *card,
                 return -ENOMEM;
         }
 
+        /* (2) initialization of the chip hardware */
+        snd_aw2_saa7146_setup(&chip->saa7146, chip->iobase_virt);
 
         if (request_irq(pci->irq, snd_aw2_saa7146_interrupt,
                         IRQF_SHARED, "Audiowerk2", chip)) {
@@ -329,8 +331,6 @@ static int __devinit snd_aw2_create(struct snd_card *card,
         }
         chip->irq = pci->irq;
 
-        /* (2) initialization of the chip hardware */
-        snd_aw2_saa7146_setup(&chip->saa7146, chip->iobase_virt);
         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
         if (err < 0) {
                 free_irq(chip->irq, (void *)chip);
diff --git a/virt/kvm/ioapic.c b/virt/kvm/ioapic.c
index 98778cb69c6e..1dcf9f3d1107 100644
--- a/virt/kvm/ioapic.c
+++ b/virt/kvm/ioapic.c
@@ -269,28 +269,9 @@ void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level)
         }
 }
 
-static int get_eoi_gsi(struct kvm_ioapic *ioapic, int vector)
+static void __kvm_ioapic_update_eoi(struct kvm_ioapic *ioapic, int gsi)
 {
-        int i;
-
-        for (i = 0; i < IOAPIC_NUM_PINS; i++)
-                if (ioapic->redirtbl[i].fields.vector == vector)
-                        return i;
-        return -1;
-}
-
-void kvm_ioapic_update_eoi(struct kvm *kvm, int vector)
-{
-        struct kvm_ioapic *ioapic = kvm->arch.vioapic;
         union ioapic_redir_entry *ent;
-        int gsi;
-
-        gsi = get_eoi_gsi(ioapic, vector);
-        if (gsi == -1) {
-                printk(KERN_WARNING "Can't find redir item for %d EOI\n",
-                       vector);
-                return;
-        }
 
         ent = &ioapic->redirtbl[gsi];
         ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG);
@@ -300,6 +281,16 @@ void kvm_ioapic_update_eoi(struct kvm *kvm, int vector)
                 ioapic_deliver(ioapic, gsi);
 }
 
+void kvm_ioapic_update_eoi(struct kvm *kvm, int vector)
+{
+        struct kvm_ioapic *ioapic = kvm->arch.vioapic;
+        int i;
+
+        for (i = 0; i < IOAPIC_NUM_PINS; i++)
+                if (ioapic->redirtbl[i].fields.vector == vector)
+                        __kvm_ioapic_update_eoi(ioapic, i);
+}
+
 static int ioapic_in_range(struct kvm_io_device *this, gpa_t addr)
 {
         struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private;