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-rw-r--r--arch/x86/kernel/cpu/amd.c4
-rw-r--r--arch/x86/kernel/cpu/amd_64.c3
-rw-r--r--arch/x86/kernel/setup.c13
-rw-r--r--arch/x86/kernel/setup.h26
-rw-r--r--arch/x86/kernel/setup_64.c2
-rw-r--r--arch/x86/pci/direct.c21
-rw-r--r--include/asm-x86/cpufeature.h2
7 files changed, 65 insertions, 6 deletions
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 245866828294..99221f9834e4 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -6,6 +6,7 @@
6#include <asm/apic.h> 6#include <asm/apic.h>
7 7
8#include <mach_apic.h> 8#include <mach_apic.h>
9#include "../setup.h"
9#include "cpu.h" 10#include "cpu.h"
10 11
11/* 12/*
@@ -308,6 +309,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
308 309
309 if (cpu_has_xmm2) 310 if (cpu_has_xmm2)
310 set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC); 311 set_cpu_cap(c, X86_FEATURE_MFENCE_RDTSC);
312
313 if (c->x86 == 0x10)
314 amd_enable_pci_ext_cfg(c);
311} 315}
312 316
313static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c, unsigned int size) 317static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 *c, unsigned int size)
diff --git a/arch/x86/kernel/cpu/amd_64.c b/arch/x86/kernel/cpu/amd_64.c
index c815c2c0484b..180097e99219 100644
--- a/arch/x86/kernel/cpu/amd_64.c
+++ b/arch/x86/kernel/cpu/amd_64.c
@@ -217,6 +217,9 @@ void __cpuinit init_amd(struct cpuinfo_x86 *c)
217 if (c->x86 == 0x10) 217 if (c->x86 == 0x10)
218 fam10h_check_enable_mmcfg(); 218 fam10h_check_enable_mmcfg();
219 219
220 if (c->x86 == 0x10)
221 amd_enable_pci_ext_cfg(c);
222
220 if (amd_apic_timer_broken()) 223 if (amd_apic_timer_broken())
221 disable_apic_timer = 1; 224 disable_apic_timer = 1;
222 225
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index 6f80b852a196..d8f171234013 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -136,4 +136,17 @@ void __init setup_per_cpu_areas(void)
136 setup_cpumask_of_cpu(); 136 setup_cpumask_of_cpu();
137} 137}
138 138
139#define ENABLE_CF8_EXT_CFG (1ULL << 46)
140
141void __cpuinit amd_enable_pci_ext_cfg(struct cpuinfo_x86 *c)
142{
143 u64 reg;
144 rdmsrl(MSR_AMD64_NB_CFG, reg);
145 if (!(reg & ENABLE_CF8_EXT_CFG)) {
146 reg |= ENABLE_CF8_EXT_CFG;
147 wrmsrl(MSR_AMD64_NB_CFG, reg);
148 }
149 set_cpu_cap(c, X86_FEATURE_PCI_EXT_CFG);
150}
151
139#endif 152#endif
diff --git a/arch/x86/kernel/setup.h b/arch/x86/kernel/setup.h
new file mode 100644
index 000000000000..66cc2c7f961d
--- /dev/null
+++ b/arch/x86/kernel/setup.h
@@ -0,0 +1,26 @@
1/*
2 * Internal declarations for shared x86 setup code.
3 *
4 * Copyright (c) 2008 Advanced Micro Devices, Inc.
5 * Contributed by Robert Richter <robert.richter@amd.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of version 2 of the GNU General Public
9 * License as published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
19 * 02111-1307 USA
20 */
21
22#ifndef _ARCH_X86_KERNEL_SETUP_H
23
24extern void __cpuinit amd_enable_pci_ext_cfg(struct cpuinfo_x86 *c);
25
26#endif /* _ARCH_X86_KERNEL_SETUP_H */
diff --git a/arch/x86/kernel/setup_64.c b/arch/x86/kernel/setup_64.c
index 25afdd80a3cf..215bd67e5b6c 100644
--- a/arch/x86/kernel/setup_64.c
+++ b/arch/x86/kernel/setup_64.c
@@ -73,6 +73,8 @@
73#include <asm/pat.h> 73#include <asm/pat.h>
74#include <asm/mmconfig.h> 74#include <asm/mmconfig.h>
75 75
76#include "setup.h"
77
76#include <mach_apic.h> 78#include <mach_apic.h>
77#ifdef CONFIG_PARAVIRT 79#ifdef CONFIG_PARAVIRT
78#include <asm/paravirt.h> 80#include <asm/paravirt.h>
diff --git a/arch/x86/pci/direct.c b/arch/x86/pci/direct.c
index 21d1e0e0d535..27d61b63def6 100644
--- a/arch/x86/pci/direct.c
+++ b/arch/x86/pci/direct.c
@@ -8,18 +8,21 @@
8#include "pci.h" 8#include "pci.h"
9 9
10/* 10/*
11 * Functions for accessing PCI configuration space with type 1 accesses 11 * Functions for accessing PCI base (first 256 bytes) and extended
12 * (4096 bytes per PCI function) configuration space with type 1
13 * accesses.
12 */ 14 */
13 15
14#define PCI_CONF1_ADDRESS(bus, devfn, reg) \ 16#define PCI_CONF1_ADDRESS(bus, devfn, reg) \
15 (0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3)) 17 (0x80000000 | ((reg & 0xF00) << 16) | (bus << 16) \
18 | (devfn << 8) | (reg & 0xFC))
16 19
17static int pci_conf1_read(unsigned int seg, unsigned int bus, 20static int pci_conf1_read(unsigned int seg, unsigned int bus,
18 unsigned int devfn, int reg, int len, u32 *value) 21 unsigned int devfn, int reg, int len, u32 *value)
19{ 22{
20 unsigned long flags; 23 unsigned long flags;
21 24
22 if ((bus > 255) || (devfn > 255) || (reg > 255)) { 25 if ((bus > 255) || (devfn > 255) || (reg > 4095)) {
23 *value = -1; 26 *value = -1;
24 return -EINVAL; 27 return -EINVAL;
25 } 28 }
@@ -50,7 +53,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus,
50{ 53{
51 unsigned long flags; 54 unsigned long flags;
52 55
53 if ((bus > 255) || (devfn > 255) || (reg > 255)) 56 if ((bus > 255) || (devfn > 255) || (reg > 4095))
54 return -EINVAL; 57 return -EINVAL;
55 58
56 spin_lock_irqsave(&pci_config_lock, flags); 59 spin_lock_irqsave(&pci_config_lock, flags);
@@ -260,10 +263,16 @@ void __init pci_direct_init(int type)
260 return; 263 return;
261 printk(KERN_INFO "PCI: Using configuration type %d for base access\n", 264 printk(KERN_INFO "PCI: Using configuration type %d for base access\n",
262 type); 265 type);
263 if (type == 1) 266 if (type == 1) {
264 raw_pci_ops = &pci_direct_conf1; 267 raw_pci_ops = &pci_direct_conf1;
265 else 268 if (!raw_pci_ext_ops && cpu_has_pci_ext_cfg) {
269 printk(KERN_INFO "PCI: Using configuration type 1 "
270 "for extended access\n");
271 raw_pci_ext_ops = &pci_direct_conf1;
272 }
273 } else {
266 raw_pci_ops = &pci_direct_conf2; 274 raw_pci_ops = &pci_direct_conf2;
275 }
267} 276}
268 277
269int __init pci_direct_probe(void) 278int __init pci_direct_probe(void)
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 0d609c837a41..40fcbba00f15 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -79,6 +79,7 @@
79#define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */ 79#define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */
80#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */ 80#define X86_FEATURE_MFENCE_RDTSC (3*32+17) /* Mfence synchronizes RDTSC */
81#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */ 81#define X86_FEATURE_LFENCE_RDTSC (3*32+18) /* Lfence synchronizes RDTSC */
82#define X86_FEATURE_PCI_EXT_CFG (3*32+19) /* PCI extended cfg access */
82 83
83/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ 84/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
84#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ 85#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */
@@ -187,6 +188,7 @@ extern const char * const x86_power_flags[32];
187#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES) 188#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
188#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) 189#define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON)
189#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT) 190#define cpu_has_pat boot_cpu_has(X86_FEATURE_PAT)
191#define cpu_has_pci_ext_cfg boot_cpu_has(X86_FEATURE_PCI_EXT_CFG)
190 192
191#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64) 193#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
192# define cpu_has_invlpg 1 194# define cpu_has_invlpg 1