diff options
-rw-r--r-- | drivers/gpu/drm/drm_bufs.c | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/mga/mga_dma.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bo.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_channel.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_mem.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv20_graph.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv40_graph.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_instmem.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/evergreen.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_bios.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cp.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs600.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rs690.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/rv770.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/savage/savage_bci.c | 24 | ||||
-rw-r--r-- | include/drm/drmP.h | 4 |
20 files changed, 53 insertions, 65 deletions
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c index f7ba82ebf65a..7783035871e9 100644 --- a/drivers/gpu/drm/drm_bufs.c +++ b/drivers/gpu/drm/drm_bufs.c | |||
@@ -39,19 +39,6 @@ | |||
39 | #include <asm/shmparam.h> | 39 | #include <asm/shmparam.h> |
40 | #include "drmP.h" | 40 | #include "drmP.h" |
41 | 41 | ||
42 | resource_size_t drm_get_resource_start(struct drm_device *dev, unsigned int resource) | ||
43 | { | ||
44 | return pci_resource_start(dev->pdev, resource); | ||
45 | } | ||
46 | EXPORT_SYMBOL(drm_get_resource_start); | ||
47 | |||
48 | resource_size_t drm_get_resource_len(struct drm_device *dev, unsigned int resource) | ||
49 | { | ||
50 | return pci_resource_len(dev->pdev, resource); | ||
51 | } | ||
52 | |||
53 | EXPORT_SYMBOL(drm_get_resource_len); | ||
54 | |||
55 | static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, | 42 | static struct drm_map_list *drm_find_matching_map(struct drm_device *dev, |
56 | struct drm_local_map *map) | 43 | struct drm_local_map *map) |
57 | { | 44 | { |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 2a6b5de5ae5d..9fe2d08d9e9d 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1429,7 +1429,7 @@ static int i915_load_modeset_init(struct drm_device *dev, | |||
1429 | int fb_bar = IS_I9XX(dev) ? 2 : 0; | 1429 | int fb_bar = IS_I9XX(dev) ? 2 : 0; |
1430 | int ret = 0; | 1430 | int ret = 0; |
1431 | 1431 | ||
1432 | dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) & | 1432 | dev->mode_config.fb_base = pci_resource_start(dev->pdev, fb_bar) & |
1433 | 0xff000000; | 1433 | 0xff000000; |
1434 | 1434 | ||
1435 | /* Basic memrange allocator for stolen space (aka vram) */ | 1435 | /* Basic memrange allocator for stolen space (aka vram) */ |
@@ -1612,8 +1612,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1612 | 1612 | ||
1613 | /* Add register map (needed for suspend/resume) */ | 1613 | /* Add register map (needed for suspend/resume) */ |
1614 | mmio_bar = IS_I9XX(dev) ? 0 : 1; | 1614 | mmio_bar = IS_I9XX(dev) ? 0 : 1; |
1615 | base = drm_get_resource_start(dev, mmio_bar); | 1615 | base = pci_resource_start(dev->pdev, mmio_bar); |
1616 | size = drm_get_resource_len(dev, mmio_bar); | 1616 | size = pci_resource_len(dev->pdev, mmio_bar); |
1617 | 1617 | ||
1618 | if (i915_get_bridge_dev(dev)) { | 1618 | if (i915_get_bridge_dev(dev)) { |
1619 | ret = -EIO; | 1619 | ret = -EIO; |
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c index 3c917fb3a60b..ccc129c328a4 100644 --- a/drivers/gpu/drm/mga/mga_dma.c +++ b/drivers/gpu/drm/mga/mga_dma.c | |||
@@ -405,8 +405,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags) | |||
405 | dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; | 405 | dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT; |
406 | dev_priv->chipset = flags; | 406 | dev_priv->chipset = flags; |
407 | 407 | ||
408 | dev_priv->mmio_base = drm_get_resource_start(dev, 1); | 408 | dev_priv->mmio_base = pci_resource_start(dev->pdev, 1); |
409 | dev_priv->mmio_size = drm_get_resource_len(dev, 1); | 409 | dev_priv->mmio_size = pci_resource_len(dev->pdev, 1); |
410 | 410 | ||
411 | dev->counters += 3; | 411 | dev->counters += 3; |
412 | dev->types[6] = _DRM_STAT_IRQ; | 412 | dev->types[6] = _DRM_STAT_IRQ; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 6f3c19522377..9f5ab4677758 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -783,7 +783,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem) | |||
783 | break; | 783 | break; |
784 | case TTM_PL_VRAM: | 784 | case TTM_PL_VRAM: |
785 | mem->bus.offset = mem->mm_node->start << PAGE_SHIFT; | 785 | mem->bus.offset = mem->mm_node->start << PAGE_SHIFT; |
786 | mem->bus.base = drm_get_resource_start(dev, 1); | 786 | mem->bus.base = pci_resource_start(dev->pdev, 1); |
787 | mem->bus.is_iomem = true; | 787 | mem->bus.is_iomem = true; |
788 | break; | 788 | break; |
789 | default: | 789 | default: |
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 1fc57ef58295..06555c7cde50 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -62,7 +62,8 @@ nouveau_channel_pushbuf_ctxdma_init(struct nouveau_channel *chan) | |||
62 | * VRAM. | 62 | * VRAM. |
63 | */ | 63 | */ |
64 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, | 64 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, |
65 | drm_get_resource_start(dev, 1), | 65 | pci_resource_start(dev->pdev, |
66 | 1), | ||
66 | dev_priv->fb_available_size, | 67 | dev_priv->fb_available_size, |
67 | NV_DMA_ACCESS_RO, | 68 | NV_DMA_ACCESS_RO, |
68 | NV_DMA_TARGET_PCI, &pushbuf); | 69 | NV_DMA_TARGET_PCI, &pushbuf); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 775a7017af64..37c7bf8e8296 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -471,8 +471,9 @@ void nouveau_mem_close(struct drm_device *dev) | |||
471 | } | 471 | } |
472 | 472 | ||
473 | if (dev_priv->fb_mtrr) { | 473 | if (dev_priv->fb_mtrr) { |
474 | drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1), | 474 | drm_mtrr_del(dev_priv->fb_mtrr, |
475 | drm_get_resource_len(dev, 1), DRM_MTRR_WC); | 475 | pci_resource_start(dev->pdev, 1), |
476 | pci_resource_len(dev->pdev, 1), DRM_MTRR_WC); | ||
476 | dev_priv->fb_mtrr = 0; | 477 | dev_priv->fb_mtrr = 0; |
477 | } | 478 | } |
478 | } | 479 | } |
@@ -632,7 +633,7 @@ nouveau_mem_init(struct drm_device *dev) | |||
632 | struct ttm_bo_device *bdev = &dev_priv->ttm.bdev; | 633 | struct ttm_bo_device *bdev = &dev_priv->ttm.bdev; |
633 | int ret, dma_bits = 32; | 634 | int ret, dma_bits = 32; |
634 | 635 | ||
635 | dev_priv->fb_phys = drm_get_resource_start(dev, 1); | 636 | dev_priv->fb_phys = pci_resource_start(dev->pdev, 1); |
636 | dev_priv->gart_info.type = NOUVEAU_GART_NONE; | 637 | dev_priv->gart_info.type = NOUVEAU_GART_NONE; |
637 | 638 | ||
638 | if (dev_priv->card_type >= NV_50 && | 639 | if (dev_priv->card_type >= NV_50 && |
@@ -664,8 +665,9 @@ nouveau_mem_init(struct drm_device *dev) | |||
664 | 665 | ||
665 | dev_priv->fb_available_size = dev_priv->vram_size; | 666 | dev_priv->fb_available_size = dev_priv->vram_size; |
666 | dev_priv->fb_mappable_pages = dev_priv->fb_available_size; | 667 | dev_priv->fb_mappable_pages = dev_priv->fb_available_size; |
667 | if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1)) | 668 | if (dev_priv->fb_mappable_pages > pci_resource_len(dev->pdev, 1)) |
668 | dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1); | 669 | dev_priv->fb_mappable_pages = |
670 | pci_resource_len(dev->pdev, 1); | ||
669 | dev_priv->fb_mappable_pages >>= PAGE_SHIFT; | 671 | dev_priv->fb_mappable_pages >>= PAGE_SHIFT; |
670 | 672 | ||
671 | /* remove reserved space at end of vram from available amount */ | 673 | /* remove reserved space at end of vram from available amount */ |
@@ -717,8 +719,8 @@ nouveau_mem_init(struct drm_device *dev) | |||
717 | return ret; | 719 | return ret; |
718 | } | 720 | } |
719 | 721 | ||
720 | dev_priv->fb_mtrr = drm_mtrr_add(drm_get_resource_start(dev, 1), | 722 | dev_priv->fb_mtrr = drm_mtrr_add(pci_resource_start(dev->pdev, 1), |
721 | drm_get_resource_len(dev, 1), | 723 | pci_resource_len(dev->pdev, 1), |
722 | DRM_MTRR_WC); | 724 | DRM_MTRR_WC); |
723 | 725 | ||
724 | return 0; | 726 | return 0; |
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c index d6fc0a82f03d..fe2349b115f0 100644 --- a/drivers/gpu/drm/nouveau/nv20_graph.c +++ b/drivers/gpu/drm/nouveau/nv20_graph.c | |||
@@ -616,7 +616,7 @@ nv20_graph_init(struct drm_device *dev) | |||
616 | nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp); | 616 | nv_wr32(dev, NV10_PGRAPH_SURFACE, tmp); |
617 | 617 | ||
618 | /* begin RAM config */ | 618 | /* begin RAM config */ |
619 | vramsz = drm_get_resource_len(dev, 0) - 1; | 619 | vramsz = pci_resource_len(dev->pdev, 0) - 1; |
620 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); | 620 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); |
621 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); | 621 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); |
622 | nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000); | 622 | nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0000); |
@@ -717,7 +717,7 @@ nv30_graph_init(struct drm_device *dev) | |||
717 | nv_wr32(dev, 0x0040075c , 0x00000001); | 717 | nv_wr32(dev, 0x0040075c , 0x00000001); |
718 | 718 | ||
719 | /* begin RAM config */ | 719 | /* begin RAM config */ |
720 | /* vramsz = drm_get_resource_len(dev, 0) - 1; */ | 720 | /* vramsz = pci_resource_len(dev->pdev, 0) - 1; */ |
721 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); | 721 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); |
722 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); | 722 | nv_wr32(dev, 0x4009A8, nv_rd32(dev, NV04_PFB_CFG1)); |
723 | if (dev_priv->chipset != 0x34) { | 723 | if (dev_priv->chipset != 0x34) { |
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c index 704a25d04ac9..65b13b54c5ae 100644 --- a/drivers/gpu/drm/nouveau/nv40_graph.c +++ b/drivers/gpu/drm/nouveau/nv40_graph.c | |||
@@ -367,7 +367,7 @@ nv40_graph_init(struct drm_device *dev) | |||
367 | nv40_graph_set_region_tiling(dev, i, 0, 0, 0); | 367 | nv40_graph_set_region_tiling(dev, i, 0, 0, 0); |
368 | 368 | ||
369 | /* begin RAM config */ | 369 | /* begin RAM config */ |
370 | vramsz = drm_get_resource_len(dev, 0) - 1; | 370 | vramsz = pci_resource_len(dev->pdev, 0) - 1; |
371 | switch (dev_priv->chipset) { | 371 | switch (dev_priv->chipset) { |
372 | case 0x40: | 372 | case 0x40: |
373 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); | 373 | nv_wr32(dev, 0x4009A4, nv_rd32(dev, NV04_PFB_CFG0)); |
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index 5f21df31f3aa..71c01b6e5731 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c | |||
@@ -241,7 +241,7 @@ nv50_instmem_init(struct drm_device *dev) | |||
241 | return ret; | 241 | return ret; |
242 | BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000); | 242 | BAR0_WI32(priv->fb_bar->gpuobj, 0x00, 0x7fc00000); |
243 | BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 + | 243 | BAR0_WI32(priv->fb_bar->gpuobj, 0x04, 0x40000000 + |
244 | drm_get_resource_len(dev, 1) - 1); | 244 | pci_resource_len(dev->pdev, 1) - 1); |
245 | BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000); | 245 | BAR0_WI32(priv->fb_bar->gpuobj, 0x08, 0x40000000); |
246 | BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000); | 246 | BAR0_WI32(priv->fb_bar->gpuobj, 0x0c, 0x00000000); |
247 | BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000); | 247 | BAR0_WI32(priv->fb_bar->gpuobj, 0x10, 0x00000000); |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 8c8e4d3cbaa3..a4745e49ecf1 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1300,8 +1300,8 @@ int evergreen_mc_init(struct radeon_device *rdev) | |||
1300 | } | 1300 | } |
1301 | rdev->mc.vram_width = numchan * chansize; | 1301 | rdev->mc.vram_width = numchan * chansize; |
1302 | /* Could aper size report 0 ? */ | 1302 | /* Could aper size report 0 ? */ |
1303 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 1303 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
1304 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 1304 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
1305 | /* Setup GPU memory space */ | 1305 | /* Setup GPU memory space */ |
1306 | /* size in MB on evergreen */ | 1306 | /* size in MB on evergreen */ |
1307 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; | 1307 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024; |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index cc004b05d63e..c485c2cec4da 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -2284,8 +2284,8 @@ void r100_vram_init_sizes(struct radeon_device *rdev) | |||
2284 | u64 config_aper_size; | 2284 | u64 config_aper_size; |
2285 | 2285 | ||
2286 | /* work out accessible VRAM */ | 2286 | /* work out accessible VRAM */ |
2287 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 2287 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
2288 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 2288 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
2289 | rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev); | 2289 | rdev->mc.visible_vram_size = r100_get_accessible_vram(rdev); |
2290 | /* FIXME we don't use the second aperture yet when we could use it */ | 2290 | /* FIXME we don't use the second aperture yet when we could use it */ |
2291 | if (rdev->mc.visible_vram_size > rdev->mc.aper_size) | 2291 | if (rdev->mc.visible_vram_size > rdev->mc.aper_size) |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 44e96a2ae25a..4959619f8851 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -1118,8 +1118,8 @@ int r600_mc_init(struct radeon_device *rdev) | |||
1118 | } | 1118 | } |
1119 | rdev->mc.vram_width = numchan * chansize; | 1119 | rdev->mc.vram_width = numchan * chansize; |
1120 | /* Could aper size report 0 ? */ | 1120 | /* Could aper size report 0 ? */ |
1121 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 1121 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
1122 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 1122 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
1123 | /* Setup GPU memory space */ | 1123 | /* Setup GPU memory space */ |
1124 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); | 1124 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
1125 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | 1125 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); |
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index fbba938f8048..91f5b5a29a9f 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c | |||
@@ -49,7 +49,7 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) | |||
49 | resource_size_t size = 256 * 1024; /* ??? */ | 49 | resource_size_t size = 256 * 1024; /* ??? */ |
50 | 50 | ||
51 | rdev->bios = NULL; | 51 | rdev->bios = NULL; |
52 | vram_base = drm_get_resource_start(rdev->ddev, 0); | 52 | vram_base = pci_resource_start(rdev->pdev, 0); |
53 | bios = ioremap(vram_base, size); | 53 | bios = ioremap(vram_base, size); |
54 | if (!bios) { | 54 | if (!bios) { |
55 | return false; | 55 | return false; |
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index 2f042a3c0e62..eb6b9eed7349 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c | |||
@@ -2120,8 +2120,8 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags) | |||
2120 | else | 2120 | else |
2121 | dev_priv->flags |= RADEON_IS_PCI; | 2121 | dev_priv->flags |= RADEON_IS_PCI; |
2122 | 2122 | ||
2123 | ret = drm_addmap(dev, drm_get_resource_start(dev, 2), | 2123 | ret = drm_addmap(dev, pci_resource_start(dev->pdev, 2), |
2124 | drm_get_resource_len(dev, 2), _DRM_REGISTERS, | 2124 | pci_resource_len(dev->pdev, 2), _DRM_REGISTERS, |
2125 | _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio); | 2125 | _DRM_READ_ONLY | _DRM_DRIVER, &dev_priv->mmio); |
2126 | if (ret != 0) | 2126 | if (ret != 0) |
2127 | return ret; | 2127 | return ret; |
@@ -2194,9 +2194,9 @@ int radeon_driver_firstopen(struct drm_device *dev) | |||
2194 | 2194 | ||
2195 | dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; | 2195 | dev_priv->gart_info.table_size = RADEON_PCIGART_TABLE_SIZE; |
2196 | 2196 | ||
2197 | dev_priv->fb_aper_offset = drm_get_resource_start(dev, 0); | 2197 | dev_priv->fb_aper_offset = pci_resource_start(dev->pdev, 0); |
2198 | ret = drm_addmap(dev, dev_priv->fb_aper_offset, | 2198 | ret = drm_addmap(dev, dev_priv->fb_aper_offset, |
2199 | drm_get_resource_len(dev, 0), _DRM_FRAME_BUFFER, | 2199 | pci_resource_len(dev->pdev, 0), _DRM_FRAME_BUFFER, |
2200 | _DRM_WRITE_COMBINING, &map); | 2200 | _DRM_WRITE_COMBINING, &map); |
2201 | if (ret != 0) | 2201 | if (ret != 0) |
2202 | return ret; | 2202 | return ret; |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index fdc3fdf78acb..2a897a7ca26f 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -648,8 +648,8 @@ int radeon_device_init(struct radeon_device *rdev, | |||
648 | 648 | ||
649 | /* Registers mapping */ | 649 | /* Registers mapping */ |
650 | /* TODO: block userspace mapping of io register */ | 650 | /* TODO: block userspace mapping of io register */ |
651 | rdev->rmmio_base = drm_get_resource_start(rdev->ddev, 2); | 651 | rdev->rmmio_base = pci_resource_start(rdev->pdev, 2); |
652 | rdev->rmmio_size = drm_get_resource_len(rdev->ddev, 2); | 652 | rdev->rmmio_size = pci_resource_len(rdev->pdev, 2); |
653 | rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); | 653 | rdev->rmmio = ioremap(rdev->rmmio_base, rdev->rmmio_size); |
654 | if (rdev->rmmio == NULL) { | 654 | if (rdev->rmmio == NULL) { |
655 | return -ENOMEM; | 655 | return -ENOMEM; |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 79887cac5b54..340c7611f2ac 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -685,8 +685,8 @@ void rs600_mc_init(struct radeon_device *rdev) | |||
685 | { | 685 | { |
686 | u64 base; | 686 | u64 base; |
687 | 687 | ||
688 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 688 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
689 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 689 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
690 | rdev->mc.vram_is_ddr = true; | 690 | rdev->mc.vram_is_ddr = true; |
691 | rdev->mc.vram_width = 128; | 691 | rdev->mc.vram_width = 128; |
692 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); | 692 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index bcc33195ebc2..a18ba98885f3 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -151,8 +151,8 @@ void rs690_mc_init(struct radeon_device *rdev) | |||
151 | rdev->mc.vram_width = 128; | 151 | rdev->mc.vram_width = 128; |
152 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); | 152 | rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE); |
153 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; | 153 | rdev->mc.mc_vram_size = rdev->mc.real_vram_size; |
154 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 154 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
155 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 155 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
156 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 156 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
157 | base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); | 157 | base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); |
158 | base = G_000100_MC_FB_START(base) << 16; | 158 | base = G_000100_MC_FB_START(base) << 16; |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 253f24aec031..5c7f0b97c6aa 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -908,8 +908,8 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
908 | } | 908 | } |
909 | rdev->mc.vram_width = numchan * chansize; | 909 | rdev->mc.vram_width = numchan * chansize; |
910 | /* Could aper size report 0 ? */ | 910 | /* Could aper size report 0 ? */ |
911 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 911 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
912 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 912 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
913 | /* Setup GPU memory space */ | 913 | /* Setup GPU memory space */ |
914 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); | 914 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE); |
915 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); | 915 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE); |
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c index 2d0c9ca484c5..f576232846c3 100644 --- a/drivers/gpu/drm/savage/savage_bci.c +++ b/drivers/gpu/drm/savage/savage_bci.c | |||
@@ -573,13 +573,13 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
573 | dev_priv->mtrr[2].handle = -1; | 573 | dev_priv->mtrr[2].handle = -1; |
574 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { | 574 | if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) { |
575 | fb_rsrc = 0; | 575 | fb_rsrc = 0; |
576 | fb_base = drm_get_resource_start(dev, 0); | 576 | fb_base = pci_resource_start(dev->pdev, 0); |
577 | fb_size = SAVAGE_FB_SIZE_S3; | 577 | fb_size = SAVAGE_FB_SIZE_S3; |
578 | mmio_base = fb_base + SAVAGE_FB_SIZE_S3; | 578 | mmio_base = fb_base + SAVAGE_FB_SIZE_S3; |
579 | aper_rsrc = 0; | 579 | aper_rsrc = 0; |
580 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; | 580 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; |
581 | /* this should always be true */ | 581 | /* this should always be true */ |
582 | if (drm_get_resource_len(dev, 0) == 0x08000000) { | 582 | if (pci_resource_len(dev->pdev, 0) == 0x08000000) { |
583 | /* Don't make MMIO write-cobining! We need 3 | 583 | /* Don't make MMIO write-cobining! We need 3 |
584 | * MTRRs. */ | 584 | * MTRRs. */ |
585 | dev_priv->mtrr[0].base = fb_base; | 585 | dev_priv->mtrr[0].base = fb_base; |
@@ -599,18 +599,19 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
599 | dev_priv->mtrr[2].size, DRM_MTRR_WC); | 599 | dev_priv->mtrr[2].size, DRM_MTRR_WC); |
600 | } else { | 600 | } else { |
601 | DRM_ERROR("strange pci_resource_len %08llx\n", | 601 | DRM_ERROR("strange pci_resource_len %08llx\n", |
602 | (unsigned long long)drm_get_resource_len(dev, 0)); | 602 | (unsigned long long) |
603 | pci_resource_len(dev->pdev, 0)); | ||
603 | } | 604 | } |
604 | } else if (dev_priv->chipset != S3_SUPERSAVAGE && | 605 | } else if (dev_priv->chipset != S3_SUPERSAVAGE && |
605 | dev_priv->chipset != S3_SAVAGE2000) { | 606 | dev_priv->chipset != S3_SAVAGE2000) { |
606 | mmio_base = drm_get_resource_start(dev, 0); | 607 | mmio_base = pci_resource_start(dev->pdev, 0); |
607 | fb_rsrc = 1; | 608 | fb_rsrc = 1; |
608 | fb_base = drm_get_resource_start(dev, 1); | 609 | fb_base = pci_resource_start(dev->pdev, 1); |
609 | fb_size = SAVAGE_FB_SIZE_S4; | 610 | fb_size = SAVAGE_FB_SIZE_S4; |
610 | aper_rsrc = 1; | 611 | aper_rsrc = 1; |
611 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; | 612 | aperture_base = fb_base + SAVAGE_APERTURE_OFFSET; |
612 | /* this should always be true */ | 613 | /* this should always be true */ |
613 | if (drm_get_resource_len(dev, 1) == 0x08000000) { | 614 | if (pci_resource_len(dev->pdev, 1) == 0x08000000) { |
614 | /* Can use one MTRR to cover both fb and | 615 | /* Can use one MTRR to cover both fb and |
615 | * aperture. */ | 616 | * aperture. */ |
616 | dev_priv->mtrr[0].base = fb_base; | 617 | dev_priv->mtrr[0].base = fb_base; |
@@ -620,15 +621,16 @@ int savage_driver_firstopen(struct drm_device *dev) | |||
620 | dev_priv->mtrr[0].size, DRM_MTRR_WC); | 621 | dev_priv->mtrr[0].size, DRM_MTRR_WC); |
621 | } else { | 622 | } else { |
622 | DRM_ERROR("strange pci_resource_len %08llx\n", | 623 | DRM_ERROR("strange pci_resource_len %08llx\n", |
623 | (unsigned long long)drm_get_resource_len(dev, 1)); | 624 | (unsigned long long) |
625 | pci_resource_len(dev->pdev, 1)); | ||
624 | } | 626 | } |
625 | } else { | 627 | } else { |
626 | mmio_base = drm_get_resource_start(dev, 0); | 628 | mmio_base = pci_resource_start(dev->pdev, 0); |
627 | fb_rsrc = 1; | 629 | fb_rsrc = 1; |
628 | fb_base = drm_get_resource_start(dev, 1); | 630 | fb_base = pci_resource_start(dev->pdev, 1); |
629 | fb_size = drm_get_resource_len(dev, 1); | 631 | fb_size = pci_resource_len(dev->pdev, 1); |
630 | aper_rsrc = 2; | 632 | aper_rsrc = 2; |
631 | aperture_base = drm_get_resource_start(dev, 2); | 633 | aperture_base = pci_resource_start(dev->pdev, 2); |
632 | /* Automatic MTRR setup will do the right thing. */ | 634 | /* Automatic MTRR setup will do the right thing. */ |
633 | } | 635 | } |
634 | 636 | ||
diff --git a/include/drm/drmP.h b/include/drm/drmP.h index c1b987158dfa..8f7f5cb4a86d 100644 --- a/include/drm/drmP.h +++ b/include/drm/drmP.h | |||
@@ -1273,10 +1273,6 @@ extern int drm_freebufs(struct drm_device *dev, void *data, | |||
1273 | extern int drm_mapbufs(struct drm_device *dev, void *data, | 1273 | extern int drm_mapbufs(struct drm_device *dev, void *data, |
1274 | struct drm_file *file_priv); | 1274 | struct drm_file *file_priv); |
1275 | extern int drm_order(unsigned long size); | 1275 | extern int drm_order(unsigned long size); |
1276 | extern resource_size_t drm_get_resource_start(struct drm_device *dev, | ||
1277 | unsigned int resource); | ||
1278 | extern resource_size_t drm_get_resource_len(struct drm_device *dev, | ||
1279 | unsigned int resource); | ||
1280 | 1276 | ||
1281 | /* DMA support (drm_dma.h) */ | 1277 | /* DMA support (drm_dma.h) */ |
1282 | extern int drm_dma_setup(struct drm_device *dev); | 1278 | extern int drm_dma_setup(struct drm_device *dev); |