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authorLen Brown <len.brown@intel.com>2012-09-21 00:01:31 -0400
committerLen Brown <len.brown@intel.com>2012-09-26 18:15:48 -0400
commit6574a5d5053cd3b8e7c088900b80a9ff51895450 (patch)
tree69b021fa6d2bed1609be3e66a82ce256e198bca7 /tools/power
parentd7db69016548c4bf3bec3556f6a15b9332dae34f (diff)
tools/power turbostat: print more turbo-limit information
The "turbo-limit" is the maximum opportunistic processor speed, assuming no electrical or thermal constraints. For a given processor, the turbo-limit varies, depending on the number of active cores. Generally, there is more opportunity when fewer cores are active. Under the "-v" verbose option, turbostat would print the turbo-limits for the four cases of 1 to 4 cores active. Expand that capability to cover the cases of turbo opportunities with up to 16 cores active. Note that not all hardware platforms supply this information, and that sometimes a valid limit may be specified for a core which is not actually present. Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'tools/power')
-rw-r--r--tools/power/x86/turbostat/turbostat.c95
1 files changed, 93 insertions, 2 deletions
diff --git a/tools/power/x86/turbostat/turbostat.c b/tools/power/x86/turbostat/turbostat.c
index 3c9dc54c710c..5db4addbe1d9 100644
--- a/tools/power/x86/turbostat/turbostat.c
+++ b/tools/power/x86/turbostat/turbostat.c
@@ -37,6 +37,7 @@
37 37
38#define MSR_NEHALEM_PLATFORM_INFO 0xCE 38#define MSR_NEHALEM_PLATFORM_INFO 0xCE
39#define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x1AD 39#define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x1AD
40#define MSR_IVT_TURBO_RATIO_LIMIT 0x1AE
40#define MSR_APERF 0xE8 41#define MSR_APERF 0xE8
41#define MSR_MPERF 0xE7 42#define MSR_MPERF 0xE7
42#define MSR_PKG_C2_RESIDENCY 0x60D /* SNB only */ 43#define MSR_PKG_C2_RESIDENCY 0x60D /* SNB only */
@@ -61,6 +62,7 @@ unsigned int genuine_intel;
61unsigned int has_invariant_tsc; 62unsigned int has_invariant_tsc;
62unsigned int do_nehalem_platform_info; 63unsigned int do_nehalem_platform_info;
63unsigned int do_nehalem_turbo_ratio_limit; 64unsigned int do_nehalem_turbo_ratio_limit;
65unsigned int do_ivt_turbo_ratio_limit;
64unsigned int extra_msr_offset; 66unsigned int extra_msr_offset;
65double bclk; 67double bclk;
66unsigned int show_pkg; 68unsigned int show_pkg;
@@ -676,6 +678,9 @@ void print_verbose_header(void)
676 678
677 get_msr(0, MSR_NEHALEM_PLATFORM_INFO, &msr); 679 get_msr(0, MSR_NEHALEM_PLATFORM_INFO, &msr);
678 680
681 if (verbose > 1)
682 fprintf(stderr, "MSR_NEHALEM_PLATFORM_INFO: 0x%llx\n", msr);
683
679 ratio = (msr >> 40) & 0xFF; 684 ratio = (msr >> 40) & 0xFF;
680 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n", 685 fprintf(stderr, "%d * %.0f = %.0f MHz max efficiency\n",
681 ratio, bclk, ratio * bclk); 686 ratio, bclk, ratio * bclk);
@@ -684,14 +689,84 @@ void print_verbose_header(void)
684 fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n", 689 fprintf(stderr, "%d * %.0f = %.0f MHz TSC frequency\n",
685 ratio, bclk, ratio * bclk); 690 ratio, bclk, ratio * bclk);
686 691
692 if (!do_ivt_turbo_ratio_limit)
693 goto print_nhm_turbo_ratio_limits;
694
695 get_msr(0, MSR_IVT_TURBO_RATIO_LIMIT, &msr);
696
687 if (verbose > 1) 697 if (verbose > 1)
688 fprintf(stderr, "MSR_NEHALEM_PLATFORM_INFO: 0x%llx\n", msr); 698 fprintf(stderr, "MSR_IVT_TURBO_RATIO_LIMIT: 0x%llx\n", msr);
699
700 ratio = (msr >> 56) & 0xFF;
701 if (ratio)
702 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 16 active cores\n",
703 ratio, bclk, ratio * bclk);
704
705 ratio = (msr >> 48) & 0xFF;
706 if (ratio)
707 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 15 active cores\n",
708 ratio, bclk, ratio * bclk);
709
710 ratio = (msr >> 40) & 0xFF;
711 if (ratio)
712 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 14 active cores\n",
713 ratio, bclk, ratio * bclk);
714
715 ratio = (msr >> 32) & 0xFF;
716 if (ratio)
717 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 13 active cores\n",
718 ratio, bclk, ratio * bclk);
719
720 ratio = (msr >> 24) & 0xFF;
721 if (ratio)
722 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 12 active cores\n",
723 ratio, bclk, ratio * bclk);
724
725 ratio = (msr >> 16) & 0xFF;
726 if (ratio)
727 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 11 active cores\n",
728 ratio, bclk, ratio * bclk);
729
730 ratio = (msr >> 8) & 0xFF;
731 if (ratio)
732 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 10 active cores\n",
733 ratio, bclk, ratio * bclk);
734
735 ratio = (msr >> 0) & 0xFF;
736 if (ratio)
737 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 9 active cores\n",
738 ratio, bclk, ratio * bclk);
739
740print_nhm_turbo_ratio_limits:
689 741
690 if (!do_nehalem_turbo_ratio_limit) 742 if (!do_nehalem_turbo_ratio_limit)
691 return; 743 return;
692 744
693 get_msr(0, MSR_NEHALEM_TURBO_RATIO_LIMIT, &msr); 745 get_msr(0, MSR_NEHALEM_TURBO_RATIO_LIMIT, &msr);
694 746
747 if (verbose > 1)
748 fprintf(stderr, "MSR_NEHALEM_TURBO_RATIO_LIMIT: 0x%llx\n", msr);
749
750 ratio = (msr >> 56) & 0xFF;
751 if (ratio)
752 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 8 active cores\n",
753 ratio, bclk, ratio * bclk);
754
755 ratio = (msr >> 48) & 0xFF;
756 if (ratio)
757 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 7 active cores\n",
758 ratio, bclk, ratio * bclk);
759
760 ratio = (msr >> 40) & 0xFF;
761 if (ratio)
762 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 6 active cores\n",
763 ratio, bclk, ratio * bclk);
764
765 ratio = (msr >> 32) & 0xFF;
766 if (ratio)
767 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 5 active cores\n",
768 ratio, bclk, ratio * bclk);
769
695 ratio = (msr >> 24) & 0xFF; 770 ratio = (msr >> 24) & 0xFF;
696 if (ratio) 771 if (ratio)
697 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n", 772 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 4 active cores\n",
@@ -711,7 +786,6 @@ void print_verbose_header(void)
711 if (ratio) 786 if (ratio)
712 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n", 787 fprintf(stderr, "%d * %.0f = %.0f MHz max turbo 1 active cores\n",
713 ratio, bclk, ratio * bclk); 788 ratio, bclk, ratio * bclk);
714
715} 789}
716 790
717void free_all_buffers(void) 791void free_all_buffers(void)
@@ -1045,6 +1119,22 @@ int has_nehalem_turbo_ratio_limit(unsigned int family, unsigned int model)
1045 return 0; 1119 return 0;
1046 } 1120 }
1047} 1121}
1122int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
1123{
1124 if (!genuine_intel)
1125 return 0;
1126
1127 if (family != 6)
1128 return 0;
1129
1130 switch (model) {
1131 case 0x3E: /* IVB Xeon */
1132 return 1;
1133 default:
1134 return 0;
1135 }
1136}
1137
1048 1138
1049int is_snb(unsigned int family, unsigned int model) 1139int is_snb(unsigned int family, unsigned int model)
1050{ 1140{
@@ -1144,6 +1234,7 @@ void check_cpuid()
1144 bclk = discover_bclk(family, model); 1234 bclk = discover_bclk(family, model);
1145 1235
1146 do_nehalem_turbo_ratio_limit = has_nehalem_turbo_ratio_limit(family, model); 1236 do_nehalem_turbo_ratio_limit = has_nehalem_turbo_ratio_limit(family, model);
1237 do_ivt_turbo_ratio_limit = has_ivt_turbo_ratio_limit(family, model);
1147} 1238}
1148 1239
1149 1240