diff options
author | Rusty Russell <rusty@rustcorp.com.au> | 2015-02-13 01:43:41 -0500 |
---|---|---|
committer | Rusty Russell <rusty@rustcorp.com.au> | 2015-02-13 01:45:47 -0500 |
commit | b2ce1ea4427f0c752f8718a411435cc9527faa3d (patch) | |
tree | 9ca4fa7f046aadbd993f136c34048f0cb1d54cec /tools/lguest | |
parent | 53aceb49f9b7e1d42064ffff4f4df7e9882b182d (diff) |
tools/lguest: rename virtio_pci_cfg_cap field to match spec.
The next patch will insert many quotes from the virtio 1.0 spec; they
make most sense if we copy the spec.
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Diffstat (limited to 'tools/lguest')
-rw-r--r-- | tools/lguest/lguest.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/tools/lguest/lguest.c b/tools/lguest/lguest.c index b3e73f258910..b00263f5febb 100644 --- a/tools/lguest/lguest.c +++ b/tools/lguest/lguest.c | |||
@@ -126,7 +126,7 @@ static struct device_list devices; | |||
126 | 126 | ||
127 | struct virtio_pci_cfg_cap { | 127 | struct virtio_pci_cfg_cap { |
128 | struct virtio_pci_cap cap; | 128 | struct virtio_pci_cap cap; |
129 | u32 window; /* Data for BAR access. */ | 129 | u32 pci_cfg_data; /* Data for BAR access. */ |
130 | }; | 130 | }; |
131 | 131 | ||
132 | struct virtio_pci_mmio { | 132 | struct virtio_pci_mmio { |
@@ -1301,7 +1301,7 @@ static bool pci_data_iowrite(u16 port, u32 mask, u32 val) | |||
1301 | */ | 1301 | */ |
1302 | iowrite(portoff, val, mask, &d->config_words[reg]); | 1302 | iowrite(portoff, val, mask, &d->config_words[reg]); |
1303 | return true; | 1303 | return true; |
1304 | } else if (&d->config_words[reg] == &d->config.cfg_access.window) { | 1304 | } else if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) { |
1305 | u32 write_mask; | 1305 | u32 write_mask; |
1306 | 1306 | ||
1307 | /* Must be bar 0 */ | 1307 | /* Must be bar 0 */ |
@@ -1309,7 +1309,7 @@ static bool pci_data_iowrite(u16 port, u32 mask, u32 val) | |||
1309 | return false; | 1309 | return false; |
1310 | 1310 | ||
1311 | /* First copy what they wrote into the window */ | 1311 | /* First copy what they wrote into the window */ |
1312 | iowrite(portoff, val, mask, &d->config.cfg_access.window); | 1312 | iowrite(portoff, val, mask, &d->config.cfg_access.pci_cfg_data); |
1313 | 1313 | ||
1314 | /* | 1314 | /* |
1315 | * Now emulate a write. The mask we use is set by | 1315 | * Now emulate a write. The mask we use is set by |
@@ -1317,13 +1317,14 @@ static bool pci_data_iowrite(u16 port, u32 mask, u32 val) | |||
1317 | */ | 1317 | */ |
1318 | write_mask = (1ULL<<(8*d->config.cfg_access.cap.length)) - 1; | 1318 | write_mask = (1ULL<<(8*d->config.cfg_access.cap.length)) - 1; |
1319 | verbose("Window writing %#x/%#x to bar %u, offset %u len %u\n", | 1319 | verbose("Window writing %#x/%#x to bar %u, offset %u len %u\n", |
1320 | d->config.cfg_access.window, write_mask, | 1320 | d->config.cfg_access.pci_cfg_data, write_mask, |
1321 | d->config.cfg_access.cap.bar, | 1321 | d->config.cfg_access.cap.bar, |
1322 | d->config.cfg_access.cap.offset, | 1322 | d->config.cfg_access.cap.offset, |
1323 | d->config.cfg_access.cap.length); | 1323 | d->config.cfg_access.cap.length); |
1324 | 1324 | ||
1325 | emulate_mmio_write(d, d->config.cfg_access.cap.offset, | 1325 | emulate_mmio_write(d, d->config.cfg_access.cap.offset, |
1326 | d->config.cfg_access.window, write_mask); | 1326 | d->config.cfg_access.pci_cfg_data, |
1327 | write_mask); | ||
1327 | return true; | 1328 | return true; |
1328 | } | 1329 | } |
1329 | 1330 | ||
@@ -1342,7 +1343,7 @@ static void pci_data_ioread(u16 port, u32 mask, u32 *val) | |||
1342 | return; | 1343 | return; |
1343 | 1344 | ||
1344 | /* Read through the PCI MMIO access window is special */ | 1345 | /* Read through the PCI MMIO access window is special */ |
1345 | if (&d->config_words[reg] == &d->config.cfg_access.window) { | 1346 | if (&d->config_words[reg] == &d->config.cfg_access.pci_cfg_data) { |
1346 | u32 read_mask; | 1347 | u32 read_mask; |
1347 | 1348 | ||
1348 | /* Must be bar 0 */ | 1349 | /* Must be bar 0 */ |
@@ -1357,12 +1358,12 @@ static void pci_data_ioread(u16 port, u32 mask, u32 *val) | |||
1357 | * len, *not* this read! | 1358 | * len, *not* this read! |
1358 | */ | 1359 | */ |
1359 | read_mask = (1ULL<<(8*d->config.cfg_access.cap.length))-1; | 1360 | read_mask = (1ULL<<(8*d->config.cfg_access.cap.length))-1; |
1360 | d->config.cfg_access.window | 1361 | d->config.cfg_access.pci_cfg_data |
1361 | = emulate_mmio_read(d, | 1362 | = emulate_mmio_read(d, |
1362 | d->config.cfg_access.cap.offset, | 1363 | d->config.cfg_access.cap.offset, |
1363 | read_mask); | 1364 | read_mask); |
1364 | verbose("Window read %#x/%#x from bar %u, offset %u len %u\n", | 1365 | verbose("Window read %#x/%#x from bar %u, offset %u len %u\n", |
1365 | d->config.cfg_access.window, read_mask, | 1366 | d->config.cfg_access.pci_cfg_data, read_mask, |
1366 | d->config.cfg_access.cap.bar, | 1367 | d->config.cfg_access.cap.bar, |
1367 | d->config.cfg_access.cap.offset, | 1368 | d->config.cfg_access.cap.offset, |
1368 | d->config.cfg_access.cap.length); | 1369 | d->config.cfg_access.cap.length); |