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authorTakashi Iwai <tiwai@suse.de>2011-07-05 01:33:06 -0400
committerTakashi Iwai <tiwai@suse.de>2011-07-05 01:33:06 -0400
commit63bc9750167ac765827470aa5aed1e79aeaaad9e (patch)
treef9e352364314f2bcb4e450a148f7ee95b2313c70 /sound
parent53dea36c70c1857149a8c447224e3936eb8b5339 (diff)
parent9fb352b18b11124ed1ddebc0d74ebbd7ba8defd7 (diff)
Merge branch 'for-3.0' of git://git.kernel.org/pub/scm/linux/kernel/git/lrg/asoc-2.6 into fix/asoc
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/tlv320aic26.c14
-rw-r--r--sound/soc/codecs/tlv320aic3x.c9
2 files changed, 19 insertions, 4 deletions
diff --git a/sound/soc/codecs/tlv320aic26.c b/sound/soc/codecs/tlv320aic26.c
index e2a7608d3944..7859bdcc93db 100644
--- a/sound/soc/codecs/tlv320aic26.c
+++ b/sound/soc/codecs/tlv320aic26.c
@@ -161,10 +161,18 @@ static int aic26_hw_params(struct snd_pcm_substream *substream,
161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL; 161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
162 } 162 }
163 163
164 /* Configure PLL */ 164 /**
165 * Configure PLL
166 * fsref = (mclk * PLLM) / 2048
167 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
168 */
165 pval = 1; 169 pval = 1;
166 jval = (fsref == 44100) ? 7 : 8; 170 /* compute J portion of multiplier */
167 dval = (fsref == 44100) ? 5264 : 1920; 171 jval = fsref / (aic26->mclk / 2048);
172 /* compute fractional DDDD component of multiplier */
173 dval = fsref - (jval * (aic26->mclk / 2048));
174 dval = (10000 * dval) / (aic26->mclk / 2048);
175 dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
168 qval = 0; 176 qval = 0;
169 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2; 177 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
170 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg); 178 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index c3d96fc8c267..789453d44ec5 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -1114,12 +1114,19 @@ static int aic3x_set_power(struct snd_soc_codec *codec, int power)
1114 1114
1115 /* Sync reg_cache with the hardware */ 1115 /* Sync reg_cache with the hardware */
1116 codec->cache_only = 0; 1116 codec->cache_only = 0;
1117 for (i = 0; i < ARRAY_SIZE(aic3x_reg); i++) 1117 for (i = AIC3X_SAMPLE_RATE_SEL_REG; i < ARRAY_SIZE(aic3x_reg); i++)
1118 snd_soc_write(codec, i, cache[i]); 1118 snd_soc_write(codec, i, cache[i]);
1119 if (aic3x->model == AIC3X_MODEL_3007) 1119 if (aic3x->model == AIC3X_MODEL_3007)
1120 aic3x_init_3007(codec); 1120 aic3x_init_3007(codec);
1121 codec->cache_sync = 0; 1121 codec->cache_sync = 0;
1122 } else { 1122 } else {
1123 /*
1124 * Do soft reset to this codec instance in order to clear
1125 * possible VDD leakage currents in case the supply regulators
1126 * remain on
1127 */
1128 snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
1129 codec->cache_sync = 1;
1123 aic3x->power = 0; 1130 aic3x->power = 0;
1124 /* HW writes are needless when bias is off */ 1131 /* HW writes are needless when bias is off */
1125 codec->cache_only = 1; 1132 codec->cache_only = 1;