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authorPhilipp Zabel <philipp.zabel@gmail.com>2008-05-28 12:58:06 -0400
committerTakashi Iwai <tiwai@suse.de>2008-05-29 02:13:43 -0400
commitb7482f52789266e2548be5d0f6420c9fc12428d8 (patch)
tree8f8960df3f992689523c231c5aeafef1c105061c /sound
parente13ac2e9b18bde51cf32c69c2209df25791ab3e5 (diff)
[ALSA] ASoC: Add UDA1380 driver
The UDA1380 codec is used by the HTC Magician and a number of Samsung reference boards. This driver has had a long out of tree history, having originally been written by Giorgio Padrin and converted to ASoC by Richard Purdie. Since conversion to ASoC most of the work on the driver has been done by Philipp Zabel with some review and updates for new APIs by Liam Girdwood and Mark Brown. Signed-off-by: Richard Purdie <rpurdie@rpsys.net> Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Liam Girdwood <lg@opensource.wolfsonmicro.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/Kconfig3
-rw-r--r--sound/soc/codecs/Makefile2
-rw-r--r--sound/soc/codecs/uda1380.c852
-rw-r--r--sound/soc/codecs/uda1380.h89
4 files changed, 946 insertions, 0 deletions
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index d4a5fe42f6e0..7beefccfa821 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -2,6 +2,9 @@ config SND_SOC_AC97_CODEC
2 tristate 2 tristate
3 select SND_AC97_CODEC 3 select SND_AC97_CODEC
4 4
5config SND_SOC_UDA1380
6 tristate
7
5config SND_SOC_WM8731 8config SND_SOC_WM8731
6 tristate 9 tristate
7 10
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile
index 4e1314c9d3ec..d5926a117078 100644
--- a/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@ -1,4 +1,5 @@
1snd-soc-ac97-objs := ac97.o 1snd-soc-ac97-objs := ac97.o
2snd-soc-uda1380-objs := uda1380.o
2snd-soc-wm8731-objs := wm8731.o 3snd-soc-wm8731-objs := wm8731.o
3snd-soc-wm8750-objs := wm8750.o 4snd-soc-wm8750-objs := wm8750.o
4snd-soc-wm8753-objs := wm8753.o 5snd-soc-wm8753-objs := wm8753.o
@@ -8,6 +9,7 @@ snd-soc-cs4270-objs := cs4270.o
8snd-soc-tlv320aic3x-objs := tlv320aic3x.o 9snd-soc-tlv320aic3x-objs := tlv320aic3x.o
9 10
10obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o 11obj-$(CONFIG_SND_SOC_AC97_CODEC) += snd-soc-ac97.o
12obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o
11obj-$(CONFIG_SND_SOC_WM8731) += snd-soc-wm8731.o 13obj-$(CONFIG_SND_SOC_WM8731) += snd-soc-wm8731.o
12obj-$(CONFIG_SND_SOC_WM8750) += snd-soc-wm8750.o 14obj-$(CONFIG_SND_SOC_WM8750) += snd-soc-wm8750.o
13obj-$(CONFIG_SND_SOC_WM8753) += snd-soc-wm8753.o 15obj-$(CONFIG_SND_SOC_WM8753) += snd-soc-wm8753.o
diff --git a/sound/soc/codecs/uda1380.c b/sound/soc/codecs/uda1380.c
new file mode 100644
index 000000000000..cb50486201f1
--- /dev/null
+++ b/sound/soc/codecs/uda1380.c
@@ -0,0 +1,852 @@
1/*
2 * uda1380.c - Philips UDA1380 ALSA SoC audio driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
9 * Improved support for DAPM and audio routing/mixing capabilities,
10 * added TLV support.
11 *
12 * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
13 * codec model.
14 *
15 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
16 * Copyright 2005 Openedhand Ltd.
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/string.h>
23#include <linux/slab.h>
24#include <linux/errno.h>
25#include <linux/ioctl.h>
26#include <linux/delay.h>
27#include <linux/i2c.h>
28#include <sound/core.h>
29#include <sound/control.h>
30#include <sound/initval.h>
31#include <sound/info.h>
32#include <sound/soc.h>
33#include <sound/soc-dapm.h>
34#include <sound/tlv.h>
35
36#include "uda1380.h"
37
38#define UDA1380_VERSION "0.6"
39#define AUDIO_NAME "uda1380"
40
41/*
42 * uda1380 register cache
43 */
44static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
45 0x0502, 0x0000, 0x0000, 0x3f3f,
46 0x0202, 0x0000, 0x0000, 0x0000,
47 0x0000, 0x0000, 0x0000, 0x0000,
48 0x0000, 0x0000, 0x0000, 0x0000,
49 0x0000, 0xff00, 0x0000, 0x4800,
50 0x0000, 0x0000, 0x0000, 0x0000,
51 0x0000, 0x0000, 0x0000, 0x0000,
52 0x0000, 0x0000, 0x0000, 0x0000,
53 0x0000, 0x8000, 0x0002, 0x0000,
54};
55
56/*
57 * read uda1380 register cache
58 */
59static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
60 unsigned int reg)
61{
62 u16 *cache = codec->reg_cache;
63 if (reg == UDA1380_RESET)
64 return 0;
65 if (reg >= UDA1380_CACHEREGNUM)
66 return -1;
67 return cache[reg];
68}
69
70/*
71 * write uda1380 register cache
72 */
73static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
74 u16 reg, unsigned int value)
75{
76 u16 *cache = codec->reg_cache;
77 if (reg >= UDA1380_CACHEREGNUM)
78 return;
79 cache[reg] = value;
80}
81
82/*
83 * write to the UDA1380 register space
84 */
85static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
86 unsigned int value)
87{
88 u8 data[3];
89
90 /* data is
91 * data[0] is register offset
92 * data[1] is MS byte
93 * data[2] is LS byte
94 */
95 data[0] = reg;
96 data[1] = (value & 0xff00) >> 8;
97 data[2] = value & 0x00ff;
98
99 uda1380_write_reg_cache(codec, reg, value);
100
101 /* the interpolator & decimator regs must only be written when the
102 * codec DAI is active.
103 */
104 if (!codec->active && (reg >= UDA1380_MVOL))
105 return 0;
106 pr_debug("uda1380: hw write %x val %x\n", reg, value);
107 if (codec->hw_write(codec->control_data, data, 3) == 3) {
108 unsigned int val;
109 i2c_master_send(codec->control_data, data, 1);
110 i2c_master_recv(codec->control_data, data, 2);
111 val = (data[0]<<8) | data[1];
112 if (val != value) {
113 pr_debug("uda1380: READ BACK VAL %x\n",
114 (data[0]<<8) | data[1]);
115 return -EIO;
116 }
117 return 0;
118 } else
119 return -EIO;
120}
121
122#define uda1380_reset(c) uda1380_write(c, UDA1380_RESET, 0)
123
124/* declarations of ALSA reg_elem_REAL controls */
125static const char *uda1380_deemp[] = {
126 "None",
127 "32kHz",
128 "44.1kHz",
129 "48kHz",
130 "96kHz",
131};
132static const char *uda1380_input_sel[] = {
133 "Line",
134 "Mic + Line R",
135 "Line L",
136 "Mic",
137};
138static const char *uda1380_output_sel[] = {
139 "DAC",
140 "Analog Mixer",
141};
142static const char *uda1380_spf_mode[] = {
143 "Flat",
144 "Minimum1",
145 "Minimum2",
146 "Maximum"
147};
148static const char *uda1380_capture_sel[] = {
149 "ADC",
150 "Digital Mixer"
151};
152static const char *uda1380_sel_ns[] = {
153 "3rd-order",
154 "5th-order"
155};
156static const char *uda1380_mix_control[] = {
157 "off",
158 "PCM only",
159 "before sound processing",
160 "after sound processing"
161};
162static const char *uda1380_sdet_setting[] = {
163 "3200",
164 "4800",
165 "9600",
166 "19200"
167};
168static const char *uda1380_os_setting[] = {
169 "single-speed",
170 "double-speed (no mixing)",
171 "quad-speed (no mixing)"
172};
173
174static const struct soc_enum uda1380_deemp_enum[] = {
175 SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
176 SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
177};
178static const struct soc_enum uda1380_input_sel_enum =
179 SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
180static const struct soc_enum uda1380_output_sel_enum =
181 SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel); /* R02_EN_AVC */
182static const struct soc_enum uda1380_spf_enum =
183 SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode); /* M */
184static const struct soc_enum uda1380_capture_sel_enum =
185 SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel); /* SEL_SOURCE */
186static const struct soc_enum uda1380_sel_ns_enum =
187 SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns); /* SEL_NS */
188static const struct soc_enum uda1380_mix_enum =
189 SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control); /* MIX, MIX_POS */
190static const struct soc_enum uda1380_sdet_enum =
191 SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting); /* SD_VALUE */
192static const struct soc_enum uda1380_os_enum =
193 SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting); /* OS */
194
195/*
196 * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
197 */
198static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
199
200/*
201 * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
202 * from -66 dB in 0.5 dB steps (2 dB steps, really) and
203 * from -52 dB in 0.25 dB steps
204 */
205static const unsigned int mvol_tlv[] = {
206 TLV_DB_RANGE_HEAD(3),
207 0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
208 16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
209 44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
210};
211
212/*
213 * from -72 dB in 1.5 dB steps (6 dB steps really),
214 * from -66 dB in 0.75 dB steps (3 dB steps really),
215 * from -60 dB in 0.5 dB steps (2 dB steps really) and
216 * from -46 dB in 0.25 dB steps
217 */
218static const unsigned int vc_tlv[] = {
219 TLV_DB_RANGE_HEAD(4),
220 0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
221 8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
222 16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
223 44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
224};
225
226/* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
227static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
228
229/* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
230 * off at 18 dB max) */
231static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
232
233/* from -63 to 24 dB in 0.5 dB steps (-128...48) */
234static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
235
236/* from 0 to 24 dB in 3 dB steps */
237static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
238
239/* from 0 to 30 dB in 2 dB steps */
240static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
241
242static const struct snd_kcontrol_new uda1380_snd_controls[] = {
243 SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
244 SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
245 SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
246 SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
247 SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
248 SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
249 SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
250/**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
251 SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
252 SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
253 SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
254 SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
255 SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
256 SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
257 SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
258 SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0), /* SILENCE, force DAC output to silence */
259 SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
260 SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
261 SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
262 SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
263/**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
264 SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
265 SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
266 SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
267 SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
268 SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
269 SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
270 SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
271 /* -5.5, -8, -11.5, -14 dBFS */
272 SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
273};
274
275/* add non dapm controls */
276static int uda1380_add_controls(struct snd_soc_codec *codec)
277{
278 int err, i;
279
280 for (i = 0; i < ARRAY_SIZE(uda1380_snd_controls); i++) {
281 err = snd_ctl_add(codec->card,
282 snd_soc_cnew(&uda1380_snd_controls[i], codec, NULL));
283 if (err < 0)
284 return err;
285 }
286
287 return 0;
288}
289
290/* Input mux */
291static const struct snd_kcontrol_new uda1380_input_mux_control =
292 SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
293
294/* Output mux */
295static const struct snd_kcontrol_new uda1380_output_mux_control =
296 SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
297
298/* Capture mux */
299static const struct snd_kcontrol_new uda1380_capture_mux_control =
300 SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
301
302
303static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
304 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
305 &uda1380_input_mux_control),
306 SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
307 &uda1380_output_mux_control),
308 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
309 &uda1380_capture_mux_control),
310 SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
311 SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
312 SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
313 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
314 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
315 SND_SOC_DAPM_INPUT("VINM"),
316 SND_SOC_DAPM_INPUT("VINL"),
317 SND_SOC_DAPM_INPUT("VINR"),
318 SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
319 SND_SOC_DAPM_OUTPUT("VOUTLHP"),
320 SND_SOC_DAPM_OUTPUT("VOUTRHP"),
321 SND_SOC_DAPM_OUTPUT("VOUTL"),
322 SND_SOC_DAPM_OUTPUT("VOUTR"),
323 SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
324 SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
325};
326
327static const struct snd_soc_dapm_route audio_map[] = {
328
329 /* output mux */
330 {"HeadPhone Driver", NULL, "Output Mux"},
331 {"VOUTR", NULL, "Output Mux"},
332 {"VOUTL", NULL, "Output Mux"},
333
334 {"Analog Mixer", NULL, "VINR"},
335 {"Analog Mixer", NULL, "VINL"},
336 {"Analog Mixer", NULL, "DAC"},
337
338 {"Output Mux", "DAC", "DAC"},
339 {"Output Mux", "Analog Mixer", "Analog Mixer"},
340
341 /* {"DAC", "Digital Mixer", "I2S" } */
342
343 /* headphone driver */
344 {"VOUTLHP", NULL, "HeadPhone Driver"},
345 {"VOUTRHP", NULL, "HeadPhone Driver"},
346
347 /* input mux */
348 {"Left ADC", NULL, "Input Mux"},
349 {"Input Mux", "Mic", "Mic LNA"},
350 {"Input Mux", "Mic + Line R", "Mic LNA"},
351 {"Input Mux", "Line L", "Left PGA"},
352 {"Input Mux", "Line", "Left PGA"},
353
354 /* right input */
355 {"Right ADC", "Mic + Line R", "Right PGA"},
356 {"Right ADC", "Line", "Right PGA"},
357
358 /* inputs */
359 {"Mic LNA", NULL, "VINM"},
360 {"Left PGA", NULL, "VINL"},
361 {"Right PGA", NULL, "VINR"},
362};
363
364static int uda1380_add_widgets(struct snd_soc_codec *codec)
365{
366 snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
367 ARRAY_SIZE(uda1380_dapm_widgets));
368
369 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
370
371 snd_soc_dapm_new_widgets(codec);
372 return 0;
373}
374
375static int uda1380_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
376 unsigned int fmt)
377{
378 struct snd_soc_codec *codec = codec_dai->codec;
379 int iface;
380
381 /* set up DAI based upon fmt */
382 iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
383 iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
384
385 /* FIXME: how to select I2S for DATAO and MSB for DATAI correctly? */
386 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
387 case SND_SOC_DAIFMT_I2S:
388 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
389 break;
390 case SND_SOC_DAIFMT_LSB:
391 iface |= R01_SFORI_LSB16 | R01_SFORO_I2S;
392 break;
393 case SND_SOC_DAIFMT_MSB:
394 iface |= R01_SFORI_MSB | R01_SFORO_I2S;
395 }
396
397 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
398 iface |= R01_SIM;
399
400 uda1380_write(codec, UDA1380_IFACE, iface);
401
402 return 0;
403}
404
405/*
406 * Flush reg cache
407 * We can only write the interpolator and decimator registers
408 * when the DAI is being clocked by the CPU DAI. It's up to the
409 * machine and cpu DAI driver to do this before we are called.
410 */
411static int uda1380_pcm_prepare(struct snd_pcm_substream *substream)
412{
413 struct snd_soc_pcm_runtime *rtd = substream->private_data;
414 struct snd_soc_device *socdev = rtd->socdev;
415 struct snd_soc_codec *codec = socdev->codec;
416 int reg, reg_start, reg_end, clk;
417
418 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
419 reg_start = UDA1380_MVOL;
420 reg_end = UDA1380_MIXER;
421 } else {
422 reg_start = UDA1380_DEC;
423 reg_end = UDA1380_AGC;
424 }
425
426 /* FIXME disable DAC_CLK */
427 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
428 uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
429
430 for (reg = reg_start; reg <= reg_end; reg++) {
431 pr_debug("uda1380: flush reg %x val %x:", reg,
432 uda1380_read_reg_cache(codec, reg));
433 uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
434 }
435
436 /* FIXME enable DAC_CLK */
437 uda1380_write(codec, UDA1380_CLK, clk | R00_DAC_CLK);
438
439 return 0;
440}
441
442static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
443 struct snd_pcm_hw_params *params)
444{
445 struct snd_soc_pcm_runtime *rtd = substream->private_data;
446 struct snd_soc_device *socdev = rtd->socdev;
447 struct snd_soc_codec *codec = socdev->codec;
448 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
449
450 /* set WSPLL power and divider if running from this clock */
451 if (clk & R00_DAC_CLK) {
452 int rate = params_rate(params);
453 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
454 clk &= ~0x3; /* clear SEL_LOOP_DIV */
455 switch (rate) {
456 case 6250 ... 12500:
457 clk |= 0x0;
458 break;
459 case 12501 ... 25000:
460 clk |= 0x1;
461 break;
462 case 25001 ... 50000:
463 clk |= 0x2;
464 break;
465 case 50001 ... 100000:
466 clk |= 0x3;
467 break;
468 }
469 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
470 }
471
472 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
473 clk |= R00_EN_DAC | R00_EN_INT;
474 else
475 clk |= R00_EN_ADC | R00_EN_DEC;
476
477 uda1380_write(codec, UDA1380_CLK, clk);
478 return 0;
479}
480
481static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream)
482{
483 struct snd_soc_pcm_runtime *rtd = substream->private_data;
484 struct snd_soc_device *socdev = rtd->socdev;
485 struct snd_soc_codec *codec = socdev->codec;
486 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
487
488 /* shut down WSPLL power if running from this clock */
489 if (clk & R00_DAC_CLK) {
490 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
491 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
492 }
493
494 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
495 clk &= ~(R00_EN_DAC | R00_EN_INT);
496 else
497 clk &= ~(R00_EN_ADC | R00_EN_DEC);
498
499 uda1380_write(codec, UDA1380_CLK, clk);
500}
501
502static int uda1380_mute(struct snd_soc_codec_dai *codec_dai, int mute)
503{
504 struct snd_soc_codec *codec = codec_dai->codec;
505 u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
506
507 /* FIXME: mute(codec,0) is called when the magician clock is already
508 * set to WSPLL, but for some unknown reason writing to interpolator
509 * registers works only when clocked by SYSCLK */
510 u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
511 uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
512 if (mute)
513 uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
514 else
515 uda1380_write(codec, UDA1380_DEEMP, mute_reg);
516 uda1380_write(codec, UDA1380_CLK, clk);
517 return 0;
518}
519
520static int uda1380_set_bias_level(struct snd_soc_codec *codec,
521 enum snd_soc_bias_level level)
522{
523 int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
524
525 switch (level) {
526 case SND_SOC_BIAS_ON:
527 case SND_SOC_BIAS_PREPARE:
528 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
529 break;
530 case SND_SOC_BIAS_STANDBY:
531 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
532 break;
533 case SND_SOC_BIAS_OFF:
534 uda1380_write(codec, UDA1380_PM, 0x0);
535 break;
536 }
537 codec->bias_level = level;
538 return 0;
539}
540
541#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
542 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
543 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
544
545struct snd_soc_codec_dai uda1380_dai[] = {
546{
547 .name = "UDA1380",
548 .playback = {
549 .stream_name = "Playback",
550 .channels_min = 1,
551 .channels_max = 2,
552 .rates = UDA1380_RATES,
553 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
554 .capture = {
555 .stream_name = "Capture",
556 .channels_min = 1,
557 .channels_max = 2,
558 .rates = UDA1380_RATES,
559 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
560 .ops = {
561 .hw_params = uda1380_pcm_hw_params,
562 .shutdown = uda1380_pcm_shutdown,
563 .prepare = uda1380_pcm_prepare,
564 },
565 .dai_ops = {
566 .digital_mute = uda1380_mute,
567 .set_fmt = uda1380_set_dai_fmt,
568 },
569},
570{ /* playback only - dual interface */
571 .name = "UDA1380",
572 .playback = {
573 .stream_name = "Playback",
574 .channels_min = 1,
575 .channels_max = 2,
576 .rates = UDA1380_RATES,
577 .formats = SNDRV_PCM_FMTBIT_S16_LE,
578 },
579 .ops = {
580 .hw_params = uda1380_pcm_hw_params,
581 .shutdown = uda1380_pcm_shutdown,
582 .prepare = uda1380_pcm_prepare,
583 },
584 .dai_ops = {
585 .digital_mute = uda1380_mute,
586 .set_fmt = uda1380_set_dai_fmt,
587 },
588},
589{ /* capture only - dual interface*/
590 .name = "UDA1380",
591 .capture = {
592 .stream_name = "Capture",
593 .channels_min = 1,
594 .channels_max = 2,
595 .rates = UDA1380_RATES,
596 .formats = SNDRV_PCM_FMTBIT_S16_LE,
597 },
598 .ops = {
599 .hw_params = uda1380_pcm_hw_params,
600 .shutdown = uda1380_pcm_shutdown,
601 .prepare = uda1380_pcm_prepare,
602 },
603 .dai_ops = {
604 .set_fmt = uda1380_set_dai_fmt,
605 },
606},
607};
608EXPORT_SYMBOL_GPL(uda1380_dai);
609
610static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
611{
612 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
613 struct snd_soc_codec *codec = socdev->codec;
614
615 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
616 return 0;
617}
618
619static int uda1380_resume(struct platform_device *pdev)
620{
621 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
622 struct snd_soc_codec *codec = socdev->codec;
623 int i;
624 u8 data[2];
625 u16 *cache = codec->reg_cache;
626
627 /* Sync reg_cache with the hardware */
628 for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
629 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
630 data[1] = cache[i] & 0x00ff;
631 codec->hw_write(codec->control_data, data, 2);
632 }
633 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
634 uda1380_set_bias_level(codec, codec->suspend_bias_level);
635 return 0;
636}
637
638/*
639 * initialise the UDA1380 driver
640 * register mixer and dsp interfaces with the kernel
641 */
642static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
643{
644 struct snd_soc_codec *codec = socdev->codec;
645 int ret = 0;
646
647 codec->name = "UDA1380";
648 codec->owner = THIS_MODULE;
649 codec->read = uda1380_read_reg_cache;
650 codec->write = uda1380_write;
651 codec->set_bias_level = uda1380_set_bias_level;
652 codec->dai = uda1380_dai;
653 codec->num_dai = ARRAY_SIZE(uda1380_dai);
654 codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
655 GFP_KERNEL);
656 if (codec->reg_cache == NULL)
657 return -ENOMEM;
658 codec->reg_cache_size = sizeof(uda1380_reg);
659 codec->reg_cache_step = 2;
660 uda1380_reset(codec);
661
662 /* register pcms */
663 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
664 if (ret < 0) {
665 pr_err("uda1380: failed to create pcms\n");
666 goto pcm_err;
667 }
668
669 /* power on device */
670 uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
671 /* set clock input */
672 switch (dac_clk) {
673 case UDA1380_DAC_CLK_SYSCLK:
674 uda1380_write(codec, UDA1380_CLK, 0);
675 break;
676 case UDA1380_DAC_CLK_WSPLL:
677 uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
678 break;
679 }
680
681 /* uda1380 init */
682 uda1380_add_controls(codec);
683 uda1380_add_widgets(codec);
684 ret = snd_soc_register_card(socdev);
685 if (ret < 0) {
686 pr_err("uda1380: failed to register card\n");
687 goto card_err;
688 }
689
690 return ret;
691
692card_err:
693 snd_soc_free_pcms(socdev);
694 snd_soc_dapm_free(socdev);
695pcm_err:
696 kfree(codec->reg_cache);
697 return ret;
698}
699
700static struct snd_soc_device *uda1380_socdev;
701
702#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
703
704#define I2C_DRIVERID_UDA1380 0xfefe /* liam - need a proper id */
705
706static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
707
708/* Magic definition of all other variables and things */
709I2C_CLIENT_INSMOD;
710
711static struct i2c_driver uda1380_i2c_driver;
712static struct i2c_client client_template;
713
714/* If the i2c layer weren't so broken, we could pass this kind of data
715 around */
716
717static int uda1380_codec_probe(struct i2c_adapter *adap, int addr, int kind)
718{
719 struct snd_soc_device *socdev = uda1380_socdev;
720 struct uda1380_setup_data *setup = socdev->codec_data;
721 struct snd_soc_codec *codec = socdev->codec;
722 struct i2c_client *i2c;
723 int ret;
724
725 if (addr != setup->i2c_address)
726 return -ENODEV;
727
728 client_template.adapter = adap;
729 client_template.addr = addr;
730
731 i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL);
732 if (i2c == NULL) {
733 kfree(codec);
734 return -ENOMEM;
735 }
736 i2c_set_clientdata(i2c, codec);
737 codec->control_data = i2c;
738
739 ret = i2c_attach_client(i2c);
740 if (ret < 0) {
741 pr_err("uda1380: failed to attach codec at addr %x\n", addr);
742 goto err;
743 }
744
745 ret = uda1380_init(socdev, setup->dac_clk);
746 if (ret < 0) {
747 pr_err("uda1380: failed to initialise UDA1380\n");
748 goto err;
749 }
750 return ret;
751
752err:
753 kfree(codec);
754 kfree(i2c);
755 return ret;
756}
757
758static int uda1380_i2c_detach(struct i2c_client *client)
759{
760 struct snd_soc_codec *codec = i2c_get_clientdata(client);
761 i2c_detach_client(client);
762 kfree(codec->reg_cache);
763 kfree(client);
764 return 0;
765}
766
767static int uda1380_i2c_attach(struct i2c_adapter *adap)
768{
769 return i2c_probe(adap, &addr_data, uda1380_codec_probe);
770}
771
772static struct i2c_driver uda1380_i2c_driver = {
773 .driver = {
774 .name = "UDA1380 I2C Codec",
775 .owner = THIS_MODULE,
776 },
777 .id = I2C_DRIVERID_UDA1380,
778 .attach_adapter = uda1380_i2c_attach,
779 .detach_client = uda1380_i2c_detach,
780 .command = NULL,
781};
782
783static struct i2c_client client_template = {
784 .name = "UDA1380",
785 .driver = &uda1380_i2c_driver,
786};
787#endif
788
789static int uda1380_probe(struct platform_device *pdev)
790{
791 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
792 struct uda1380_setup_data *setup;
793 struct snd_soc_codec *codec;
794 int ret = 0;
795
796 pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION);
797
798 setup = socdev->codec_data;
799 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
800 if (codec == NULL)
801 return -ENOMEM;
802
803 socdev->codec = codec;
804 mutex_init(&codec->mutex);
805 INIT_LIST_HEAD(&codec->dapm_widgets);
806 INIT_LIST_HEAD(&codec->dapm_paths);
807
808 uda1380_socdev = socdev;
809#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
810 if (setup->i2c_address) {
811 normal_i2c[0] = setup->i2c_address;
812 codec->hw_write = (hw_write_t)i2c_master_send;
813 ret = i2c_add_driver(&uda1380_i2c_driver);
814 if (ret != 0)
815 printk(KERN_ERR "can't add i2c driver");
816 }
817#else
818 /* Add other interfaces here */
819#endif
820 return ret;
821}
822
823/* power down chip */
824static int uda1380_remove(struct platform_device *pdev)
825{
826 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
827 struct snd_soc_codec *codec = socdev->codec;
828
829 if (codec->control_data)
830 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
831
832 snd_soc_free_pcms(socdev);
833 snd_soc_dapm_free(socdev);
834#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
835 i2c_del_driver(&uda1380_i2c_driver);
836#endif
837 kfree(codec);
838
839 return 0;
840}
841
842struct snd_soc_codec_device soc_codec_dev_uda1380 = {
843 .probe = uda1380_probe,
844 .remove = uda1380_remove,
845 .suspend = uda1380_suspend,
846 .resume = uda1380_resume,
847};
848EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380);
849
850MODULE_AUTHOR("Giorgio Padrin");
851MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
852MODULE_LICENSE("GPL");
diff --git a/sound/soc/codecs/uda1380.h b/sound/soc/codecs/uda1380.h
new file mode 100644
index 000000000000..f9d885c8bf01
--- /dev/null
+++ b/sound/soc/codecs/uda1380.h
@@ -0,0 +1,89 @@
1/*
2 * Audio support for Philips UDA1380
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
9 */
10
11#ifndef _UDA1380_H
12#define _UDA1380_H
13
14#define UDA1380_CLK 0x00
15#define UDA1380_IFACE 0x01
16#define UDA1380_PM 0x02
17#define UDA1380_AMIX 0x03
18#define UDA1380_HP 0x04
19#define UDA1380_MVOL 0x10
20#define UDA1380_MIXVOL 0x11
21#define UDA1380_MODE 0x12
22#define UDA1380_DEEMP 0x13
23#define UDA1380_MIXER 0x14
24#define UDA1380_INTSTAT 0x18
25#define UDA1380_DEC 0x20
26#define UDA1380_PGA 0x21
27#define UDA1380_ADC 0x22
28#define UDA1380_AGC 0x23
29#define UDA1380_DECSTAT 0x28
30#define UDA1380_RESET 0x7f
31
32#define UDA1380_CACHEREGNUM 0x24
33
34/* Register flags */
35#define R00_EN_ADC 0x0800
36#define R00_EN_DEC 0x0400
37#define R00_EN_DAC 0x0200
38#define R00_EN_INT 0x0100
39#define R00_DAC_CLK 0x0010
40#define R01_SFORI_I2S 0x0000
41#define R01_SFORI_LSB16 0x0100
42#define R01_SFORI_LSB18 0x0200
43#define R01_SFORI_LSB20 0x0300
44#define R01_SFORI_MSB 0x0500
45#define R01_SFORI_MASK 0x0700
46#define R01_SFORO_I2S 0x0000
47#define R01_SFORO_LSB16 0x0001
48#define R01_SFORO_LSB18 0x0002
49#define R01_SFORO_LSB20 0x0003
50#define R01_SFORO_LSB24 0x0004
51#define R01_SFORO_MSB 0x0005
52#define R01_SFORO_MASK 0x0007
53#define R01_SEL_SOURCE 0x0040
54#define R01_SIM 0x0010
55#define R02_PON_PLL 0x8000
56#define R02_PON_HP 0x2000
57#define R02_PON_DAC 0x0400
58#define R02_PON_BIAS 0x0100
59#define R02_EN_AVC 0x0080
60#define R02_PON_AVC 0x0040
61#define R02_PON_LNA 0x0010
62#define R02_PON_PGAL 0x0008
63#define R02_PON_ADCL 0x0004
64#define R02_PON_PGAR 0x0002
65#define R02_PON_ADCR 0x0001
66#define R13_MTM 0x4000
67#define R14_SILENCE 0x0080
68#define R14_SDET_ON 0x0040
69#define R21_MT_ADC 0x8000
70#define R22_SEL_LNA 0x0008
71#define R22_SEL_MIC 0x0004
72#define R22_SKIP_DCFIL 0x0002
73#define R23_AGC_EN 0x0001
74
75struct uda1380_setup_data {
76 unsigned short i2c_address;
77 int dac_clk;
78#define UDA1380_DAC_CLK_SYSCLK 0
79#define UDA1380_DAC_CLK_WSPLL 1
80};
81
82#define UDA1380_DAI_DUPLEX 0 /* playback and capture on single DAI */
83#define UDA1380_DAI_PLAYBACK 1 /* playback DAI */
84#define UDA1380_DAI_CAPTURE 2 /* capture DAI */
85
86extern struct snd_soc_codec_dai uda1380_dai[3];
87extern struct snd_soc_codec_device soc_codec_dev_uda1380;
88
89#endif /* _UDA1380_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 07:43:26 -0500