diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-03-29 12:18:41 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-04-05 11:20:02 -0400 |
commit | 4dcc93d0ede49fae32dd0ee41c685db1be14c529 (patch) | |
tree | a798ec85c798f134c1d31e5f9f241a1c9f0b7fe6 /sound | |
parent | ae9d8607fe24253efc9f14b696f51cfd683801be (diff) |
ASoC: Don't use DCS_DATAPATH_BUSY for WM hubs devices
The DCS_DATAPATH_BUSY bit used to monitor the completion of DC servo
operations has been deprecated and with some more recente revisions
may perform incorrectly, especially when only analogue bypass paths
are in use. Switch to using readback from the DC servo command
register instead, which is supported for all devices. Without this
unacceptably long timeouts may be observed in some circumstances.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/wm_hubs.c | 38 |
1 files changed, 15 insertions, 23 deletions
diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c index e81ba6d2d7cd..e1f225a3ac46 100644 --- a/sound/soc/codecs/wm_hubs.c +++ b/sound/soc/codecs/wm_hubs.c | |||
@@ -62,21 +62,27 @@ static const char *speaker_mode_text[] = { | |||
62 | static const struct soc_enum speaker_mode = | 62 | static const struct soc_enum speaker_mode = |
63 | SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text); | 63 | SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text); |
64 | 64 | ||
65 | static void wait_for_dc_servo(struct snd_soc_codec *codec) | 65 | static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op) |
66 | { | 66 | { |
67 | unsigned int reg; | 67 | unsigned int reg; |
68 | int count = 0; | 68 | int count = 0; |
69 | unsigned int val; | ||
70 | |||
71 | val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1; | ||
72 | |||
73 | /* Trigger the command */ | ||
74 | snd_soc_write(codec, WM8993_DC_SERVO_0, val); | ||
69 | 75 | ||
70 | dev_dbg(codec->dev, "Waiting for DC servo...\n"); | 76 | dev_dbg(codec->dev, "Waiting for DC servo...\n"); |
71 | 77 | ||
72 | do { | 78 | do { |
73 | count++; | 79 | count++; |
74 | msleep(1); | 80 | msleep(1); |
75 | reg = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_0); | 81 | reg = snd_soc_read(codec, WM8993_DC_SERVO_0); |
76 | dev_dbg(codec->dev, "DC servo: %x\n", reg); | 82 | dev_dbg(codec->dev, "DC servo: %x\n", reg); |
77 | } while (reg & WM8993_DCS_DATAPATH_BUSY && count < 400); | 83 | } while (reg & op && count < 400); |
78 | 84 | ||
79 | if (reg & WM8993_DCS_DATAPATH_BUSY) | 85 | if (reg & op) |
80 | dev_err(codec->dev, "Timed out waiting for DC Servo\n"); | 86 | dev_err(codec->dev, "Timed out waiting for DC Servo\n"); |
81 | } | 87 | } |
82 | 88 | ||
@@ -92,18 +98,8 @@ static void calibrate_dc_servo(struct snd_soc_codec *codec) | |||
92 | snd_soc_update_bits(codec, WM8993_DC_SERVO_1, | 98 | snd_soc_update_bits(codec, WM8993_DC_SERVO_1, |
93 | WM8993_DCS_SERIES_NO_01_MASK, | 99 | WM8993_DCS_SERIES_NO_01_MASK, |
94 | 32 << WM8993_DCS_SERIES_NO_01_SHIFT); | 100 | 32 << WM8993_DCS_SERIES_NO_01_SHIFT); |
95 | 101 | wait_for_dc_servo(codec, | |
96 | /* Enable the DC servo. Write all bits to avoid triggering startup | 102 | WM8993_DCS_TRIG_SERIES_0 | WM8993_DCS_TRIG_SERIES_1); |
97 | * or write calibration. | ||
98 | */ | ||
99 | snd_soc_update_bits(codec, WM8993_DC_SERVO_0, | ||
100 | 0xFFFF, | ||
101 | WM8993_DCS_ENA_CHAN_0 | | ||
102 | WM8993_DCS_ENA_CHAN_1 | | ||
103 | WM8993_DCS_TRIG_SERIES_1 | | ||
104 | WM8993_DCS_TRIG_SERIES_0); | ||
105 | |||
106 | wait_for_dc_servo(codec); | ||
107 | 103 | ||
108 | /* Apply correction to DC servo result */ | 104 | /* Apply correction to DC servo result */ |
109 | if (hubs->dcs_codes) { | 105 | if (hubs->dcs_codes) { |
@@ -145,13 +141,9 @@ static void calibrate_dc_servo(struct snd_soc_codec *codec) | |||
145 | 141 | ||
146 | /* Do it */ | 142 | /* Do it */ |
147 | snd_soc_write(codec, WM8993_DC_SERVO_3, dcs_cfg); | 143 | snd_soc_write(codec, WM8993_DC_SERVO_3, dcs_cfg); |
148 | snd_soc_update_bits(codec, WM8993_DC_SERVO_0, | 144 | wait_for_dc_servo(codec, |
149 | WM8993_DCS_TRIG_DAC_WR_0 | | 145 | WM8993_DCS_TRIG_DAC_WR_0 | |
150 | WM8993_DCS_TRIG_DAC_WR_1, | 146 | WM8993_DCS_TRIG_DAC_WR_1); |
151 | WM8993_DCS_TRIG_DAC_WR_0 | | ||
152 | WM8993_DCS_TRIG_DAC_WR_1); | ||
153 | |||
154 | wait_for_dc_servo(codec); | ||
155 | } | 147 | } |
156 | } | 148 | } |
157 | 149 | ||