diff options
author | Joonyoung Shim <jy0922.shim@samsung.com> | 2010-02-02 04:53:19 -0500 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-02-02 06:21:11 -0500 |
commit | 07cd8ada1aba5556b0d5d2264ce0f40d1ff1d131 (patch) | |
tree | 6ec35f91f0591323a52d2ed8024a1252c7e00864 /sound | |
parent | fead215d1c0a385fc27a1fa96b7abbc4d66fb4c6 (diff) |
ASoC: Fix BCLK calculation of WM8994
This fixes BCLK calculation and removes unnecessary check code.
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/codecs/wm8994.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/sound/soc/codecs/wm8994.c b/sound/soc/codecs/wm8994.c index 5dd4b299f69e..29f3771c33a4 100644 --- a/sound/soc/codecs/wm8994.c +++ b/sound/soc/codecs/wm8994.c | |||
@@ -3267,15 +3267,12 @@ static int wm8994_hw_params(struct snd_pcm_substream *substream, | |||
3267 | */ | 3267 | */ |
3268 | best = 0; | 3268 | best = 0; |
3269 | for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { | 3269 | for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { |
3270 | if (bclk_divs[i] < 0) | 3270 | cur_val = (wm8994->aifclk[id] * 10 / bclk_divs[i]) - bclk_rate; |
3271 | continue; | ||
3272 | cur_val = (wm8994->aifclk[id] * 10 / bclk_divs[i]) | ||
3273 | - bclk_rate * 10; | ||
3274 | if (cur_val < 0) /* BCLK table is sorted */ | 3271 | if (cur_val < 0) /* BCLK table is sorted */ |
3275 | break; | 3272 | break; |
3276 | best = i; | 3273 | best = i; |
3277 | } | 3274 | } |
3278 | bclk_rate = wm8994->aifclk[id] / bclk_divs[best]; | 3275 | bclk_rate = wm8994->aifclk[id] * 10 / bclk_divs[best]; |
3279 | dev_dbg(dai->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n", | 3276 | dev_dbg(dai->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n", |
3280 | bclk_divs[best], bclk_rate); | 3277 | bclk_divs[best], bclk_rate); |
3281 | bclk |= best << WM8994_AIF1_BCLK_DIV_SHIFT; | 3278 | bclk |= best << WM8994_AIF1_BCLK_DIV_SHIFT; |