aboutsummaryrefslogtreecommitdiffstats
path: root/sound
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-19 14:37:22 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-19 14:37:22 -0400
commit1d3c6ff44ad4b5f113602e153026a338f0f9b3ff (patch)
tree1e1f2932634fc6d0e4acfe68496c1c727b83a13e /sound
parent7c7cbaf5b82c418cd3b1dcf718f71d0e6057e639 (diff)
parent717e7c2672e37253a4d3aa70e4716b5b0a658761 (diff)
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits) ARM: remove 'select GENERIC_TIME' ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO ARM: 6074/1: oprofile: convert from sysdev to platform device ARM: 6073/1: oprofile: remove old files and update KConfig ARM: 6072/1: oprofile: use perf-events framework as backend ARM: 6071/1: perf-events: allow modules to query the number of hardware counters ARM: 6070/1: perf-events: add support for xscale PMUs ARM: 6069/1: perf-events: use numeric ID to identify PMU ARM: 6064/1: pmu: register IRQs at runtime ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA ARM: 6134/1: Handle instruction cache maintenance fault properly ARM: nwfpe: allow debugging output to be configured at runtime ARM: rename mach_cpu_disable() to platform_cpu_disable() ARM: 6132/1: PL330: Add common core driver ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310 ARM: Move memory mapping into mmu.c ARM: Ensure meminfo is sorted prior to sanity_check_meminfo ARM: Remove useless linux/bootmem.h includes ARM: convert /proc/cpu/aligment to seq_file arm: use asm-generic/scatterlist.h ...
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/pxa/Kconfig1
-rw-r--r--sound/soc/pxa/pxa-ssp.c135
2 files changed, 68 insertions, 68 deletions
diff --git a/sound/soc/pxa/Kconfig b/sound/soc/pxa/Kconfig
index 376e14a9c273..78e612100782 100644
--- a/sound/soc/pxa/Kconfig
+++ b/sound/soc/pxa/Kconfig
@@ -23,6 +23,7 @@ config SND_PXA2XX_SOC_I2S
23 23
24config SND_PXA_SOC_SSP 24config SND_PXA_SOC_SSP
25 tristate 25 tristate
26 select PXA_SSP
26 27
27config SND_PXA2XX_SOC_CORGI 28config SND_PXA2XX_SOC_CORGI
28 tristate "SoC Audio support for Sharp Zaurus SL-C7x0" 29 tristate "SoC Audio support for Sharp Zaurus SL-C7x0"
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index 544fd9566f4d..a1fd23e0e3d0 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -32,9 +32,8 @@
32 32
33#include <mach/hardware.h> 33#include <mach/hardware.h>
34#include <mach/dma.h> 34#include <mach/dma.h>
35#include <mach/regs-ssp.h>
36#include <mach/audio.h> 35#include <mach/audio.h>
37#include <mach/ssp.h> 36#include <plat/ssp.h>
38 37
39#include "pxa2xx-pcm.h" 38#include "pxa2xx-pcm.h"
40#include "pxa-ssp.h" 39#include "pxa-ssp.h"
@@ -57,15 +56,15 @@ struct ssp_priv {
57static void dump_registers(struct ssp_device *ssp) 56static void dump_registers(struct ssp_device *ssp)
58{ 57{
59 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n", 58 dev_dbg(&ssp->pdev->dev, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
60 ssp_read_reg(ssp, SSCR0), ssp_read_reg(ssp, SSCR1), 59 pxa_ssp_read_reg(ssp, SSCR0), pxa_ssp_read_reg(ssp, SSCR1),
61 ssp_read_reg(ssp, SSTO)); 60 pxa_ssp_read_reg(ssp, SSTO));
62 61
63 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n", 62 dev_dbg(&ssp->pdev->dev, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
64 ssp_read_reg(ssp, SSPSP), ssp_read_reg(ssp, SSSR), 63 pxa_ssp_read_reg(ssp, SSPSP), pxa_ssp_read_reg(ssp, SSSR),
65 ssp_read_reg(ssp, SSACD)); 64 pxa_ssp_read_reg(ssp, SSACD));
66} 65}
67 66
68static void ssp_enable(struct ssp_device *ssp) 67static void pxa_ssp_enable(struct ssp_device *ssp)
69{ 68{
70 uint32_t sscr0; 69 uint32_t sscr0;
71 70
@@ -73,7 +72,7 @@ static void ssp_enable(struct ssp_device *ssp)
73 __raw_writel(sscr0, ssp->mmio_base + SSCR0); 72 __raw_writel(sscr0, ssp->mmio_base + SSCR0);
74} 73}
75 74
76static void ssp_disable(struct ssp_device *ssp) 75static void pxa_ssp_disable(struct ssp_device *ssp)
77{ 76{
78 uint32_t sscr0; 77 uint32_t sscr0;
79 78
@@ -87,7 +86,7 @@ struct pxa2xx_pcm_dma_data {
87}; 86};
88 87
89static struct pxa2xx_pcm_dma_params * 88static struct pxa2xx_pcm_dma_params *
90ssp_get_dma_params(struct ssp_device *ssp, int width4, int out) 89pxa_ssp_get_dma_params(struct ssp_device *ssp, int width4, int out)
91{ 90{
92 struct pxa2xx_pcm_dma_data *dma; 91 struct pxa2xx_pcm_dma_data *dma;
93 92
@@ -119,7 +118,7 @@ static int pxa_ssp_startup(struct snd_pcm_substream *substream,
119 118
120 if (!cpu_dai->active) { 119 if (!cpu_dai->active) {
121 clk_enable(ssp->clk); 120 clk_enable(ssp->clk);
122 ssp_disable(ssp); 121 pxa_ssp_disable(ssp);
123 } 122 }
124 123
125 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream)); 124 kfree(snd_soc_dai_get_dma_data(cpu_dai, substream));
@@ -137,7 +136,7 @@ static void pxa_ssp_shutdown(struct snd_pcm_substream *substream,
137 struct ssp_device *ssp = priv->ssp; 136 struct ssp_device *ssp = priv->ssp;
138 137
139 if (!cpu_dai->active) { 138 if (!cpu_dai->active) {
140 ssp_disable(ssp); 139 pxa_ssp_disable(ssp);
141 clk_disable(ssp->clk); 140 clk_disable(ssp->clk);
142 } 141 }
143 142
@@ -160,7 +159,7 @@ static int pxa_ssp_suspend(struct snd_soc_dai *cpu_dai)
160 priv->to = __raw_readl(ssp->mmio_base + SSTO); 159 priv->to = __raw_readl(ssp->mmio_base + SSTO);
161 priv->psp = __raw_readl(ssp->mmio_base + SSPSP); 160 priv->psp = __raw_readl(ssp->mmio_base + SSPSP);
162 161
163 ssp_disable(ssp); 162 pxa_ssp_disable(ssp);
164 clk_disable(ssp->clk); 163 clk_disable(ssp->clk);
165 return 0; 164 return 0;
166} 165}
@@ -180,7 +179,7 @@ static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
180 __raw_writel(priv->psp, ssp->mmio_base + SSPSP); 179 __raw_writel(priv->psp, ssp->mmio_base + SSPSP);
181 180
182 if (cpu_dai->active) 181 if (cpu_dai->active)
183 ssp_enable(ssp); 182 pxa_ssp_enable(ssp);
184 else 183 else
185 clk_disable(ssp->clk); 184 clk_disable(ssp->clk);
186 185
@@ -196,9 +195,9 @@ static int pxa_ssp_resume(struct snd_soc_dai *cpu_dai)
196 * ssp_set_clkdiv - set SSP clock divider 195 * ssp_set_clkdiv - set SSP clock divider
197 * @div: serial clock rate divider 196 * @div: serial clock rate divider
198 */ 197 */
199static void ssp_set_scr(struct ssp_device *ssp, u32 div) 198static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
200{ 199{
201 u32 sscr0 = ssp_read_reg(ssp, SSCR0); 200 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
202 201
203 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) { 202 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
204 sscr0 &= ~0x0000ff00; 203 sscr0 &= ~0x0000ff00;
@@ -207,15 +206,15 @@ static void ssp_set_scr(struct ssp_device *ssp, u32 div)
207 sscr0 &= ~0x000fff00; 206 sscr0 &= ~0x000fff00;
208 sscr0 |= (div - 1) << 8; /* 1..4096 */ 207 sscr0 |= (div - 1) << 8; /* 1..4096 */
209 } 208 }
210 ssp_write_reg(ssp, SSCR0, sscr0); 209 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
211} 210}
212 211
213/** 212/**
214 * ssp_get_clkdiv - get SSP clock divider 213 * pxa_ssp_get_clkdiv - get SSP clock divider
215 */ 214 */
216static u32 ssp_get_scr(struct ssp_device *ssp) 215static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
217{ 216{
218 u32 sscr0 = ssp_read_reg(ssp, SSCR0); 217 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
219 u32 div; 218 u32 div;
220 219
221 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) 220 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
@@ -235,7 +234,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
235 struct ssp_device *ssp = priv->ssp; 234 struct ssp_device *ssp = priv->ssp;
236 int val; 235 int val;
237 236
238 u32 sscr0 = ssp_read_reg(ssp, SSCR0) & 237 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
239 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); 238 ~(SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
240 239
241 dev_dbg(&ssp->pdev->dev, 240 dev_dbg(&ssp->pdev->dev,
@@ -263,7 +262,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
263 break; 262 break;
264 case PXA_SSP_CLK_AUDIO: 263 case PXA_SSP_CLK_AUDIO:
265 priv->sysclk = 0; 264 priv->sysclk = 0;
266 ssp_set_scr(ssp, 1); 265 pxa_ssp_set_scr(ssp, 1);
267 sscr0 |= SSCR0_ACS; 266 sscr0 |= SSCR0_ACS;
268 break; 267 break;
269 default: 268 default:
@@ -274,8 +273,8 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
274 * on PXA2xx. On PXA3xx it must be enabled when doing so. */ 273 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
275 if (!cpu_is_pxa3xx()) 274 if (!cpu_is_pxa3xx())
276 clk_disable(ssp->clk); 275 clk_disable(ssp->clk);
277 val = ssp_read_reg(ssp, SSCR0) | sscr0; 276 val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
278 ssp_write_reg(ssp, SSCR0, val); 277 pxa_ssp_write_reg(ssp, SSCR0, val);
279 if (!cpu_is_pxa3xx()) 278 if (!cpu_is_pxa3xx())
280 clk_enable(ssp->clk); 279 clk_enable(ssp->clk);
281 280
@@ -294,11 +293,11 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
294 293
295 switch (div_id) { 294 switch (div_id) {
296 case PXA_SSP_AUDIO_DIV_ACDS: 295 case PXA_SSP_AUDIO_DIV_ACDS:
297 val = (ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div); 296 val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div);
298 ssp_write_reg(ssp, SSACD, val); 297 pxa_ssp_write_reg(ssp, SSACD, val);
299 break; 298 break;
300 case PXA_SSP_AUDIO_DIV_SCDB: 299 case PXA_SSP_AUDIO_DIV_SCDB:
301 val = ssp_read_reg(ssp, SSACD); 300 val = pxa_ssp_read_reg(ssp, SSACD);
302 val &= ~SSACD_SCDB; 301 val &= ~SSACD_SCDB;
303#if defined(CONFIG_PXA3xx) 302#if defined(CONFIG_PXA3xx)
304 if (cpu_is_pxa3xx()) 303 if (cpu_is_pxa3xx())
@@ -321,10 +320,10 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
321 default: 320 default:
322 return -EINVAL; 321 return -EINVAL;
323 } 322 }
324 ssp_write_reg(ssp, SSACD, val); 323 pxa_ssp_write_reg(ssp, SSACD, val);
325 break; 324 break;
326 case PXA_SSP_DIV_SCR: 325 case PXA_SSP_DIV_SCR:
327 ssp_set_scr(ssp, div); 326 pxa_ssp_set_scr(ssp, div);
328 break; 327 break;
329 default: 328 default:
330 return -ENODEV; 329 return -ENODEV;
@@ -341,11 +340,11 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
341{ 340{
342 struct ssp_priv *priv = cpu_dai->private_data; 341 struct ssp_priv *priv = cpu_dai->private_data;
343 struct ssp_device *ssp = priv->ssp; 342 struct ssp_device *ssp = priv->ssp;
344 u32 ssacd = ssp_read_reg(ssp, SSACD) & ~0x70; 343 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
345 344
346#if defined(CONFIG_PXA3xx) 345#if defined(CONFIG_PXA3xx)
347 if (cpu_is_pxa3xx()) 346 if (cpu_is_pxa3xx())
348 ssp_write_reg(ssp, SSACDD, 0); 347 pxa_ssp_write_reg(ssp, SSACDD, 0);
349#endif 348#endif
350 349
351 switch (freq_out) { 350 switch (freq_out) {
@@ -383,7 +382,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
383 val = tmp; 382 val = tmp;
384 383
385 val = (val << 16) | 64; 384 val = (val << 16) | 64;
386 ssp_write_reg(ssp, SSACDD, val); 385 pxa_ssp_write_reg(ssp, SSACDD, val);
387 386
388 ssacd |= (0x6 << 4); 387 ssacd |= (0x6 << 4);
389 388
@@ -397,7 +396,7 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
397 return -EINVAL; 396 return -EINVAL;
398 } 397 }
399 398
400 ssp_write_reg(ssp, SSACD, ssacd); 399 pxa_ssp_write_reg(ssp, SSACD, ssacd);
401 400
402 return 0; 401 return 0;
403} 402}
@@ -412,7 +411,7 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
412 struct ssp_device *ssp = priv->ssp; 411 struct ssp_device *ssp = priv->ssp;
413 u32 sscr0; 412 u32 sscr0;
414 413
415 sscr0 = ssp_read_reg(ssp, SSCR0); 414 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
416 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS); 415 sscr0 &= ~(SSCR0_MOD | SSCR0_SlotsPerFrm(8) | SSCR0_EDSS | SSCR0_DSS);
417 416
418 /* set slot width */ 417 /* set slot width */
@@ -429,10 +428,10 @@ static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai *cpu_dai,
429 sscr0 |= SSCR0_SlotsPerFrm(slots); 428 sscr0 |= SSCR0_SlotsPerFrm(slots);
430 429
431 /* set active slot mask */ 430 /* set active slot mask */
432 ssp_write_reg(ssp, SSTSA, tx_mask); 431 pxa_ssp_write_reg(ssp, SSTSA, tx_mask);
433 ssp_write_reg(ssp, SSRSA, rx_mask); 432 pxa_ssp_write_reg(ssp, SSRSA, rx_mask);
434 } 433 }
435 ssp_write_reg(ssp, SSCR0, sscr0); 434 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
436 435
437 return 0; 436 return 0;
438} 437}
@@ -447,12 +446,12 @@ static int pxa_ssp_set_dai_tristate(struct snd_soc_dai *cpu_dai,
447 struct ssp_device *ssp = priv->ssp; 446 struct ssp_device *ssp = priv->ssp;
448 u32 sscr1; 447 u32 sscr1;
449 448
450 sscr1 = ssp_read_reg(ssp, SSCR1); 449 sscr1 = pxa_ssp_read_reg(ssp, SSCR1);
451 if (tristate) 450 if (tristate)
452 sscr1 &= ~SSCR1_TTE; 451 sscr1 &= ~SSCR1_TTE;
453 else 452 else
454 sscr1 |= SSCR1_TTE; 453 sscr1 |= SSCR1_TTE;
455 ssp_write_reg(ssp, SSCR1, sscr1); 454 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
456 455
457 return 0; 456 return 0;
458} 457}
@@ -476,14 +475,14 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
476 return 0; 475 return 0;
477 476
478 /* we can only change the settings if the port is not in use */ 477 /* we can only change the settings if the port is not in use */
479 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) { 478 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) {
480 dev_err(&ssp->pdev->dev, 479 dev_err(&ssp->pdev->dev,
481 "can't change hardware dai format: stream is in use"); 480 "can't change hardware dai format: stream is in use");
482 return -EINVAL; 481 return -EINVAL;
483 } 482 }
484 483
485 /* reset port settings */ 484 /* reset port settings */
486 sscr0 = ssp_read_reg(ssp, SSCR0) & 485 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) &
487 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS); 486 (SSCR0_ECS | SSCR0_NCS | SSCR0_MOD | SSCR0_ACS);
488 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7); 487 sscr1 = SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
489 sspsp = 0; 488 sspsp = 0;
@@ -535,9 +534,9 @@ static int pxa_ssp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
535 return -EINVAL; 534 return -EINVAL;
536 } 535 }
537 536
538 ssp_write_reg(ssp, SSCR0, sscr0); 537 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
539 ssp_write_reg(ssp, SSCR1, sscr1); 538 pxa_ssp_write_reg(ssp, SSCR1, sscr1);
540 ssp_write_reg(ssp, SSPSP, sspsp); 539 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
541 540
542 dump_registers(ssp); 541 dump_registers(ssp);
543 542
@@ -566,7 +565,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
566 u32 sscr0; 565 u32 sscr0;
567 u32 sspsp; 566 u32 sspsp;
568 int width = snd_pcm_format_physical_width(params_format(params)); 567 int width = snd_pcm_format_physical_width(params_format(params));
569 int ttsa = ssp_read_reg(ssp, SSTSA) & 0xf; 568 int ttsa = pxa_ssp_read_reg(ssp, SSTSA) & 0xf;
570 struct pxa2xx_pcm_dma_params *dma_data; 569 struct pxa2xx_pcm_dma_params *dma_data;
571 570
572 dma_data = snd_soc_dai_get_dma_data(dai, substream); 571 dma_data = snd_soc_dai_get_dma_data(dai, substream);
@@ -578,22 +577,22 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
578 * to force 16-bit frame width on the wire (for S16_LE), even 577 * to force 16-bit frame width on the wire (for S16_LE), even
579 * with two channels. Use 16-bit DMA transfers for this case. 578 * with two channels. Use 16-bit DMA transfers for this case.
580 */ 579 */
581 dma_data = ssp_get_dma_params(ssp, 580 dma_data = pxa_ssp_get_dma_params(ssp,
582 ((chn == 2) && (ttsa != 1)) || (width == 32), 581 ((chn == 2) && (ttsa != 1)) || (width == 32),
583 substream->stream == SNDRV_PCM_STREAM_PLAYBACK); 582 substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
584 583
585 snd_soc_dai_set_dma_data(dai, substream, dma_data); 584 snd_soc_dai_set_dma_data(dai, substream, dma_data);
586 585
587 /* we can only change the settings if the port is not in use */ 586 /* we can only change the settings if the port is not in use */
588 if (ssp_read_reg(ssp, SSCR0) & SSCR0_SSE) 587 if (pxa_ssp_read_reg(ssp, SSCR0) & SSCR0_SSE)
589 return 0; 588 return 0;
590 589
591 /* clear selected SSP bits */ 590 /* clear selected SSP bits */
592 sscr0 = ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS); 591 sscr0 = pxa_ssp_read_reg(ssp, SSCR0) & ~(SSCR0_DSS | SSCR0_EDSS);
593 ssp_write_reg(ssp, SSCR0, sscr0); 592 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
594 593
595 /* bit size */ 594 /* bit size */
596 sscr0 = ssp_read_reg(ssp, SSCR0); 595 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
597 switch (params_format(params)) { 596 switch (params_format(params)) {
598 case SNDRV_PCM_FORMAT_S16_LE: 597 case SNDRV_PCM_FORMAT_S16_LE:
599#ifdef CONFIG_PXA3xx 598#ifdef CONFIG_PXA3xx
@@ -609,13 +608,13 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
609 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16)); 608 sscr0 |= (SSCR0_EDSS | SSCR0_DataSize(16));
610 break; 609 break;
611 } 610 }
612 ssp_write_reg(ssp, SSCR0, sscr0); 611 pxa_ssp_write_reg(ssp, SSCR0, sscr0);
613 612
614 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 613 switch (priv->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
615 case SND_SOC_DAIFMT_I2S: 614 case SND_SOC_DAIFMT_I2S:
616 sspsp = ssp_read_reg(ssp, SSPSP); 615 sspsp = pxa_ssp_read_reg(ssp, SSPSP);
617 616
618 if ((ssp_get_scr(ssp) == 4) && (width == 16)) { 617 if ((pxa_ssp_get_scr(ssp) == 4) && (width == 16)) {
619 /* This is a special case where the bitclk is 64fs 618 /* This is a special case where the bitclk is 64fs
620 * and we're not dealing with 2*32 bits of audio 619 * and we're not dealing with 2*32 bits of audio
621 * samples. 620 * samples.
@@ -649,7 +648,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
649 sspsp |= SSPSP_DMYSTRT(1); 648 sspsp |= SSPSP_DMYSTRT(1);
650 } 649 }
651 650
652 ssp_write_reg(ssp, SSPSP, sspsp); 651 pxa_ssp_write_reg(ssp, SSPSP, sspsp);
653 break; 652 break;
654 default: 653 default:
655 break; 654 break;
@@ -680,45 +679,45 @@ static int pxa_ssp_trigger(struct snd_pcm_substream *substream, int cmd,
680 679
681 switch (cmd) { 680 switch (cmd) {
682 case SNDRV_PCM_TRIGGER_RESUME: 681 case SNDRV_PCM_TRIGGER_RESUME:
683 ssp_enable(ssp); 682 pxa_ssp_enable(ssp);
684 break; 683 break;
685 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 684 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
686 val = ssp_read_reg(ssp, SSCR1); 685 val = pxa_ssp_read_reg(ssp, SSCR1);
687 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 686 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
688 val |= SSCR1_TSRE; 687 val |= SSCR1_TSRE;
689 else 688 else
690 val |= SSCR1_RSRE; 689 val |= SSCR1_RSRE;
691 ssp_write_reg(ssp, SSCR1, val); 690 pxa_ssp_write_reg(ssp, SSCR1, val);
692 val = ssp_read_reg(ssp, SSSR); 691 val = pxa_ssp_read_reg(ssp, SSSR);
693 ssp_write_reg(ssp, SSSR, val); 692 pxa_ssp_write_reg(ssp, SSSR, val);
694 break; 693 break;
695 case SNDRV_PCM_TRIGGER_START: 694 case SNDRV_PCM_TRIGGER_START:
696 val = ssp_read_reg(ssp, SSCR1); 695 val = pxa_ssp_read_reg(ssp, SSCR1);
697 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 696 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
698 val |= SSCR1_TSRE; 697 val |= SSCR1_TSRE;
699 else 698 else
700 val |= SSCR1_RSRE; 699 val |= SSCR1_RSRE;
701 ssp_write_reg(ssp, SSCR1, val); 700 pxa_ssp_write_reg(ssp, SSCR1, val);
702 ssp_enable(ssp); 701 pxa_ssp_enable(ssp);
703 break; 702 break;
704 case SNDRV_PCM_TRIGGER_STOP: 703 case SNDRV_PCM_TRIGGER_STOP:
705 val = ssp_read_reg(ssp, SSCR1); 704 val = pxa_ssp_read_reg(ssp, SSCR1);
706 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 705 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
707 val &= ~SSCR1_TSRE; 706 val &= ~SSCR1_TSRE;
708 else 707 else
709 val &= ~SSCR1_RSRE; 708 val &= ~SSCR1_RSRE;
710 ssp_write_reg(ssp, SSCR1, val); 709 pxa_ssp_write_reg(ssp, SSCR1, val);
711 break; 710 break;
712 case SNDRV_PCM_TRIGGER_SUSPEND: 711 case SNDRV_PCM_TRIGGER_SUSPEND:
713 ssp_disable(ssp); 712 pxa_ssp_disable(ssp);
714 break; 713 break;
715 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 714 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
716 val = ssp_read_reg(ssp, SSCR1); 715 val = pxa_ssp_read_reg(ssp, SSCR1);
717 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 716 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
718 val &= ~SSCR1_TSRE; 717 val &= ~SSCR1_TSRE;
719 else 718 else
720 val &= ~SSCR1_RSRE; 719 val &= ~SSCR1_RSRE;
721 ssp_write_reg(ssp, SSCR1, val); 720 pxa_ssp_write_reg(ssp, SSCR1, val);
722 break; 721 break;
723 722
724 default: 723 default:
@@ -740,7 +739,7 @@ static int pxa_ssp_probe(struct platform_device *pdev,
740 if (!priv) 739 if (!priv)
741 return -ENOMEM; 740 return -ENOMEM;
742 741
743 priv->ssp = ssp_request(dai->id + 1, "SoC audio"); 742 priv->ssp = pxa_ssp_request(dai->id + 1, "SoC audio");
744 if (priv->ssp == NULL) { 743 if (priv->ssp == NULL) {
745 ret = -ENODEV; 744 ret = -ENODEV;
746 goto err_priv; 745 goto err_priv;
@@ -760,7 +759,7 @@ static void pxa_ssp_remove(struct platform_device *pdev,
760 struct snd_soc_dai *dai) 759 struct snd_soc_dai *dai)
761{ 760{
762 struct ssp_priv *priv = dai->private_data; 761 struct ssp_priv *priv = dai->private_data;
763 ssp_free(priv->ssp); 762 pxa_ssp_free(priv->ssp);
764} 763}
765 764
766#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 765#define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\