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authorDmitry Artamonow <mad_soft@inbox.ru>2009-03-12 20:03:49 -0400
committerTakashi Iwai <tiwai@suse.de>2009-03-17 12:58:13 -0400
commit323a59613e5be6094c93261486de48a08d3a53f2 (patch)
tree8cd9a63e55504c69c5fdc3f14b23befee80a9e13 /sound
parentdbe36c9dd571e035078207862766963c4fc80262 (diff)
ALSA: drop outdated and broken sa11xx-uda1341 driver
It depends on L3 support from 2.4 kernel (CONFIG_L3) that never got merged into mainline. Since there's no way to use it on any of supported machines (iPaq h3100 or h3600), better drop it for now. It can be reimplemented later using ASoC infrastructure (there's already a driver for uda1341 codec in mainline, so only CPU and machine parts need to be written). Signed-off-by: Dmitry Artamonow <mad_soft@inbox.ru> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound')
-rw-r--r--sound/arm/Kconfig11
-rw-r--r--sound/arm/Makefile3
-rw-r--r--sound/arm/sa11xx-uda1341.c984
-rw-r--r--sound/i2c/Makefile2
-rw-r--r--sound/i2c/l3/Makefile8
-rw-r--r--sound/i2c/l3/uda1341.c935
6 files changed, 0 insertions, 1943 deletions
diff --git a/sound/arm/Kconfig b/sound/arm/Kconfig
index f8e6de48d816..885683a3b0bd 100644
--- a/sound/arm/Kconfig
+++ b/sound/arm/Kconfig
@@ -11,17 +11,6 @@ menuconfig SND_ARM
11 11
12if SND_ARM 12if SND_ARM
13 13
14config SND_SA11XX_UDA1341
15 tristate "SA11xx UDA1341TS driver (iPaq H3600)"
16 depends on ARCH_SA1100 && L3
17 select SND_PCM
18 help
19 Say Y here if you have a Compaq iPaq H3x00 handheld computer
20 and want to use its Philips UDA 1341 audio chip.
21
22 To compile this driver as a module, choose M here: the module
23 will be called snd-sa11xx-uda1341.
24
25config SND_ARMAACI 14config SND_ARMAACI
26 tristate "ARM PrimeCell PL041 AC Link support" 15 tristate "ARM PrimeCell PL041 AC Link support"
27 depends on ARM_AMBA 16 depends on ARM_AMBA
diff --git a/sound/arm/Makefile b/sound/arm/Makefile
index 2054de11de8a..5a549ed6c8aa 100644
--- a/sound/arm/Makefile
+++ b/sound/arm/Makefile
@@ -2,9 +2,6 @@
2# Makefile for ALSA 2# Makefile for ALSA
3# 3#
4 4
5obj-$(CONFIG_SND_SA11XX_UDA1341) += snd-sa11xx-uda1341.o
6snd-sa11xx-uda1341-objs := sa11xx-uda1341.o
7
8obj-$(CONFIG_SND_ARMAACI) += snd-aaci.o 5obj-$(CONFIG_SND_ARMAACI) += snd-aaci.o
9snd-aaci-objs := aaci.o devdma.o 6snd-aaci-objs := aaci.o devdma.o
10 7
diff --git a/sound/arm/sa11xx-uda1341.c b/sound/arm/sa11xx-uda1341.c
deleted file mode 100644
index 7101d3d8bae6..000000000000
--- a/sound/arm/sa11xx-uda1341.c
+++ /dev/null
@@ -1,984 +0,0 @@
1/*
2 * Driver for Philips UDA1341TS on Compaq iPAQ H3600 soundcard
3 * Copyright (C) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License.
7 *
8 * History:
9 *
10 * 2002-03-13 Tomas Kasparek initial release - based on h3600-uda1341.c from OSS
11 * 2002-03-20 Tomas Kasparek playback over ALSA is working
12 * 2002-03-28 Tomas Kasparek playback over OSS emulation is working
13 * 2002-03-29 Tomas Kasparek basic capture is working (native ALSA)
14 * 2002-03-29 Tomas Kasparek capture is working (OSS emulation)
15 * 2002-04-04 Tomas Kasparek better rates handling (allow non-standard rates)
16 * 2003-02-14 Brian Avery fixed full duplex mode, other updates
17 * 2003-02-20 Tomas Kasparek merged updates by Brian (except HAL)
18 * 2003-04-19 Jaroslav Kysela recoded DMA stuff to follow 2.4.18rmk3-hh24 kernel
19 * working suspend and resume
20 * 2003-04-28 Tomas Kasparek updated work by Jaroslav to compile it under 2.5.x again
21 * merged HAL layer (patches from Brian)
22 */
23
24/***************************************************************************************************
25*
26* To understand what Alsa Drivers should be doing look at "Writing an Alsa Driver" by Takashi Iwai
27* available in the Alsa doc section on the website
28*
29* A few notes to make things clearer. The UDA1341 is hooked up to Serial port 4 on the SA1100.
30* We are using SSP mode to talk to the UDA1341. The UDA1341 bit & wordselect clocks are generated
31* by this UART. Unfortunately, the clock only runs if the transmit buffer has something in it.
32* So, if we are just recording, we feed the transmit DMA stream a bunch of 0x0000 so that the
33* transmit buffer is full and the clock keeps going. The zeroes come from FLUSH_BASE_PHYS which
34* is a mem loc that always decodes to 0's w/ no off chip access.
35*
36* Some alsa terminology:
37* frame => num_channels * sample_size e.g stereo 16 bit is 2 * 16 = 32 bytes
38* period => the least number of bytes that will generate an interrupt e.g. we have a 1024 byte
39* buffer and 4 periods in the runtime structure this means we'll get an int every 256
40* bytes or 4 times per buffer.
41* A number of the sizes are in frames rather than bytes, use frames_to_bytes and
42* bytes_to_frames to convert. The easiest way to tell the units is to look at the
43* type i.e. runtime-> buffer_size is in frames and its type is snd_pcm_uframes_t
44*
45* Notes about the pointer fxn:
46* The pointer fxn needs to return the offset into the dma buffer in frames.
47* Interrupts must be blocked before calling the dma_get_pos fxn to avoid race with interrupts.
48*
49* Notes about pause/resume
50* Implementing this would be complicated so it's skipped. The problem case is:
51* A full duplex connection is going, then play is paused. At this point you need to start xmitting
52* 0's to keep the record active which means you cant just freeze the dma and resume it later you'd
53* need to save off the dma info, and restore it properly on a resume. Yeach!
54*
55* Notes about transfer methods:
56* The async write calls fail. I probably need to implement something else to support them?
57*
58***************************************************************************************************/
59
60#include <linux/module.h>
61#include <linux/moduleparam.h>
62#include <linux/init.h>
63#include <linux/err.h>
64#include <linux/platform_device.h>
65#include <linux/errno.h>
66#include <linux/ioctl.h>
67#include <linux/delay.h>
68#include <linux/slab.h>
69
70#ifdef CONFIG_PM
71#include <linux/pm.h>
72#endif
73
74#include <mach/hardware.h>
75#include <mach/h3600.h>
76#include <asm/mach-types.h>
77#include <asm/dma.h>
78
79#include <sound/core.h>
80#include <sound/pcm.h>
81#include <sound/initval.h>
82
83#include <linux/l3/l3.h>
84
85#undef DEBUG_MODE
86#undef DEBUG_FUNCTION_NAMES
87#include <sound/uda1341.h>
88
89/*
90 * FIXME: Is this enough as autodetection of 2.4.X-rmkY-hhZ kernels?
91 * We use DMA stuff from 2.4.18-rmk3-hh24 here to be able to compile this
92 * module for Familiar 0.6.1
93 */
94
95/* {{{ Type definitions */
96
97MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
98MODULE_LICENSE("GPL");
99MODULE_DESCRIPTION("SA1100/SA1111 + UDA1341TS driver for ALSA");
100MODULE_SUPPORTED_DEVICE("{{UDA1341,iPAQ H3600 UDA1341TS}}");
101
102static char *id; /* ID for this card */
103
104module_param(id, charp, 0444);
105MODULE_PARM_DESC(id, "ID string for SA1100/SA1111 + UDA1341TS soundcard.");
106
107struct audio_stream {
108 char *id; /* identification string */
109 int stream_id; /* numeric identification */
110 dma_device_t dma_dev; /* device identifier for DMA */
111#ifdef HH_VERSION
112 dmach_t dmach; /* dma channel identification */
113#else
114 dma_regs_t *dma_regs; /* points to our DMA registers */
115#endif
116 unsigned int active:1; /* we are using this stream for transfer now */
117 int period; /* current transfer period */
118 int periods; /* current count of periods registerd in the DMA engine */
119 int tx_spin; /* are we recoding - flag used to do DMA trans. for sync */
120 unsigned int old_offset;
121 spinlock_t dma_lock; /* for locking in DMA operations (see dma-sa1100.c in the kernel) */
122 struct snd_pcm_substream *stream;
123};
124
125struct sa11xx_uda1341 {
126 struct snd_card *card;
127 struct l3_client *uda1341;
128 struct snd_pcm *pcm;
129 long samplerate;
130 struct audio_stream s[2]; /* playback & capture */
131};
132
133static unsigned int rates[] = {
134 8000, 10666, 10985, 14647,
135 16000, 21970, 22050, 24000,
136 29400, 32000, 44100, 48000,
137};
138
139static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
140 .count = ARRAY_SIZE(rates),
141 .list = rates,
142 .mask = 0,
143};
144
145static struct platform_device *device;
146
147/* }}} */
148
149/* {{{ Clock and sample rate stuff */
150
151/*
152 * Stop-gap solution until rest of hh.org HAL stuff is merged.
153 */
154#define GPIO_H3600_CLK_SET0 GPIO_GPIO (12)
155#define GPIO_H3600_CLK_SET1 GPIO_GPIO (13)
156
157#ifdef CONFIG_SA1100_H3XXX
158#define clr_sa11xx_uda1341_egpio(x) clr_h3600_egpio(x)
159#define set_sa11xx_uda1341_egpio(x) set_h3600_egpio(x)
160#else
161#error This driver could serve H3x00 handhelds only!
162#endif
163
164static void sa11xx_uda1341_set_audio_clock(long val)
165{
166 switch (val) {
167 case 24000: case 32000: case 48000: /* 00: 12.288 MHz */
168 GPCR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
169 break;
170
171 case 22050: case 29400: case 44100: /* 01: 11.2896 MHz */
172 GPSR = GPIO_H3600_CLK_SET0;
173 GPCR = GPIO_H3600_CLK_SET1;
174 break;
175
176 case 8000: case 10666: case 16000: /* 10: 4.096 MHz */
177 GPCR = GPIO_H3600_CLK_SET0;
178 GPSR = GPIO_H3600_CLK_SET1;
179 break;
180
181 case 10985: case 14647: case 21970: /* 11: 5.6245 MHz */
182 GPSR = GPIO_H3600_CLK_SET0 | GPIO_H3600_CLK_SET1;
183 break;
184 }
185}
186
187static void sa11xx_uda1341_set_samplerate(struct sa11xx_uda1341 *sa11xx_uda1341, long rate)
188{
189 int clk_div = 0;
190 int clk=0;
191
192 /* We don't want to mess with clocks when frames are in flight */
193 Ser4SSCR0 &= ~SSCR0_SSE;
194 /* wait for any frame to complete */
195 udelay(125);
196
197 /*
198 * We have the following clock sources:
199 * 4.096 MHz, 5.6245 MHz, 11.2896 MHz, 12.288 MHz
200 * Those can be divided either by 256, 384 or 512.
201 * This makes up 12 combinations for the following samplerates...
202 */
203 if (rate >= 48000)
204 rate = 48000;
205 else if (rate >= 44100)
206 rate = 44100;
207 else if (rate >= 32000)
208 rate = 32000;
209 else if (rate >= 29400)
210 rate = 29400;
211 else if (rate >= 24000)
212 rate = 24000;
213 else if (rate >= 22050)
214 rate = 22050;
215 else if (rate >= 21970)
216 rate = 21970;
217 else if (rate >= 16000)
218 rate = 16000;
219 else if (rate >= 14647)
220 rate = 14647;
221 else if (rate >= 10985)
222 rate = 10985;
223 else if (rate >= 10666)
224 rate = 10666;
225 else
226 rate = 8000;
227
228 /* Set the external clock generator */
229
230 sa11xx_uda1341_set_audio_clock(rate);
231
232 /* Select the clock divisor */
233 switch (rate) {
234 case 8000:
235 case 10985:
236 case 22050:
237 case 24000:
238 clk = F512;
239 clk_div = SSCR0_SerClkDiv(16);
240 break;
241 case 16000:
242 case 21970:
243 case 44100:
244 case 48000:
245 clk = F256;
246 clk_div = SSCR0_SerClkDiv(8);
247 break;
248 case 10666:
249 case 14647:
250 case 29400:
251 case 32000:
252 clk = F384;
253 clk_div = SSCR0_SerClkDiv(12);
254 break;
255 }
256
257 /* FMT setting should be moved away when other FMTs are added (FIXME) */
258 l3_command(sa11xx_uda1341->uda1341, CMD_FORMAT, (void *)LSB16);
259
260 l3_command(sa11xx_uda1341->uda1341, CMD_FS, (void *)clk);
261 Ser4SSCR0 = (Ser4SSCR0 & ~0xff00) + clk_div + SSCR0_SSE;
262 sa11xx_uda1341->samplerate = rate;
263}
264
265/* }}} */
266
267/* {{{ HW init and shutdown */
268
269static void sa11xx_uda1341_audio_init(struct sa11xx_uda1341 *sa11xx_uda1341)
270{
271 unsigned long flags;
272
273 /* Setup DMA stuff */
274 sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].id = "UDA1341 out";
275 sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].stream_id = SNDRV_PCM_STREAM_PLAYBACK;
276 sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK].dma_dev = DMA_Ser4SSPWr;
277
278 sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].id = "UDA1341 in";
279 sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].stream_id = SNDRV_PCM_STREAM_CAPTURE;
280 sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE].dma_dev = DMA_Ser4SSPRd;
281
282 /* Initialize the UDA1341 internal state */
283
284 /* Setup the uarts */
285 local_irq_save(flags);
286 GAFR |= (GPIO_SSP_CLK);
287 GPDR &= ~(GPIO_SSP_CLK);
288 Ser4SSCR0 = 0;
289 Ser4SSCR0 = SSCR0_DataSize(16) + SSCR0_TI + SSCR0_SerClkDiv(8);
290 Ser4SSCR1 = SSCR1_SClkIactL + SSCR1_SClk1P + SSCR1_ExtClk;
291 Ser4SSCR0 |= SSCR0_SSE;
292 local_irq_restore(flags);
293
294 /* Enable the audio power */
295
296 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
297 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
298 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
299
300 /* Wait for the UDA1341 to wake up */
301 mdelay(1); //FIXME - was removed by Perex - Why?
302
303 /* Initialize the UDA1341 internal state */
304 l3_open(sa11xx_uda1341->uda1341);
305
306 /* external clock configuration (after l3_open - regs must be initialized */
307 sa11xx_uda1341_set_samplerate(sa11xx_uda1341, sa11xx_uda1341->samplerate);
308
309 /* Wait for the UDA1341 to wake up */
310 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
311 mdelay(1);
312
313 /* make the left and right channels unswapped (flip the WS latch) */
314 Ser4SSDR = 0;
315
316 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
317}
318
319static void sa11xx_uda1341_audio_shutdown(struct sa11xx_uda1341 *sa11xx_uda1341)
320{
321 /* mute on */
322 set_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
323
324 /* disable the audio power and all signals leading to the audio chip */
325 l3_close(sa11xx_uda1341->uda1341);
326 Ser4SSCR0 = 0;
327 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_CODEC_NRESET);
328
329 /* power off and mute off */
330 /* FIXME - is muting off necesary??? */
331
332 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_AUDIO_ON);
333 clr_sa11xx_uda1341_egpio(IPAQ_EGPIO_QMUTE);
334}
335
336/* }}} */
337
338/* {{{ DMA staff */
339
340/*
341 * these are the address and sizes used to fill the xmit buffer
342 * so we can get a clock in record only mode
343 */
344#define FORCE_CLOCK_ADDR (dma_addr_t)FLUSH_BASE_PHYS
345#define FORCE_CLOCK_SIZE 4096 // was 2048
346
347// FIXME Why this value exactly - wrote comment
348#define DMA_BUF_SIZE 8176 /* <= MAX_DMA_SIZE from asm/arch-sa1100/dma.h */
349
350#ifdef HH_VERSION
351
352static int audio_dma_request(struct audio_stream *s, void (*callback)(void *, int))
353{
354 int ret;
355
356 ret = sa1100_request_dma(&s->dmach, s->id, s->dma_dev);
357 if (ret < 0) {
358 printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
359 return ret;
360 }
361 sa1100_dma_set_callback(s->dmach, callback);
362 return 0;
363}
364
365static inline void audio_dma_free(struct audio_stream *s)
366{
367 sa1100_free_dma(s->dmach);
368 s->dmach = -1;
369}
370
371#else
372
373static int audio_dma_request(struct audio_stream *s, void (*callback)(void *))
374{
375 int ret;
376
377 ret = sa1100_request_dma(s->dma_dev, s->id, callback, s, &s->dma_regs);
378 if (ret < 0)
379 printk(KERN_ERR "unable to grab audio dma 0x%x\n", s->dma_dev);
380 return ret;
381}
382
383static void audio_dma_free(struct audio_stream *s)
384{
385 sa1100_free_dma(s->dma_regs);
386 s->dma_regs = 0;
387}
388
389#endif
390
391static u_int audio_get_dma_pos(struct audio_stream *s)
392{
393 struct snd_pcm_substream *substream = s->stream;
394 struct snd_pcm_runtime *runtime = substream->runtime;
395 unsigned int offset;
396 unsigned long flags;
397 dma_addr_t addr;
398
399 // this must be called w/ interrupts locked out see dma-sa1100.c in the kernel
400 spin_lock_irqsave(&s->dma_lock, flags);
401#ifdef HH_VERSION
402 sa1100_dma_get_current(s->dmach, NULL, &addr);
403#else
404 addr = sa1100_get_dma_pos((s)->dma_regs);
405#endif
406 offset = addr - runtime->dma_addr;
407 spin_unlock_irqrestore(&s->dma_lock, flags);
408
409 offset = bytes_to_frames(runtime,offset);
410 if (offset >= runtime->buffer_size)
411 offset = 0;
412
413 return offset;
414}
415
416/*
417 * this stops the dma and clears the dma ptrs
418 */
419static void audio_stop_dma(struct audio_stream *s)
420{
421 unsigned long flags;
422
423 spin_lock_irqsave(&s->dma_lock, flags);
424 s->active = 0;
425 s->period = 0;
426 /* this stops the dma channel and clears the buffer ptrs */
427#ifdef HH_VERSION
428 sa1100_dma_flush_all(s->dmach);
429#else
430 sa1100_clear_dma(s->dma_regs);
431#endif
432 spin_unlock_irqrestore(&s->dma_lock, flags);
433}
434
435static void audio_process_dma(struct audio_stream *s)
436{
437 struct snd_pcm_substream *substream = s->stream;
438 struct snd_pcm_runtime *runtime;
439 unsigned int dma_size;
440 unsigned int offset;
441 int ret;
442
443 /* we are requested to process synchronization DMA transfer */
444 if (s->tx_spin) {
445 if (snd_BUG_ON(s->stream_id != SNDRV_PCM_STREAM_PLAYBACK))
446 return;
447 /* fill the xmit dma buffers and return */
448#ifdef HH_VERSION
449 sa1100_dma_set_spin(s->dmach, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
450#else
451 while (1) {
452 ret = sa1100_start_dma(s->dma_regs, FORCE_CLOCK_ADDR, FORCE_CLOCK_SIZE);
453 if (ret)
454 return;
455 }
456#endif
457 return;
458 }
459
460 /* must be set here - only valid for running streams, not for forced_clock dma fills */
461 runtime = substream->runtime;
462 while (s->active && s->periods < runtime->periods) {
463 dma_size = frames_to_bytes(runtime, runtime->period_size);
464 if (s->old_offset) {
465 /* a little trick, we need resume from old position */
466 offset = frames_to_bytes(runtime, s->old_offset - 1);
467 s->old_offset = 0;
468 s->periods = 0;
469 s->period = offset / dma_size;
470 offset %= dma_size;
471 dma_size = dma_size - offset;
472 if (!dma_size)
473 continue; /* special case */
474 } else {
475 offset = dma_size * s->period;
476 snd_BUG_ON(dma_size > DMA_BUF_SIZE);
477 }
478#ifdef HH_VERSION
479 ret = sa1100_dma_queue_buffer(s->dmach, s, runtime->dma_addr + offset, dma_size);
480 if (ret)
481 return; //FIXME
482#else
483 ret = sa1100_start_dma((s)->dma_regs, runtime->dma_addr + offset, dma_size);
484 if (ret) {
485 printk(KERN_ERR "audio_process_dma: cannot queue DMA buffer (%i)\n", ret);
486 return;
487 }
488#endif
489
490 s->period++;
491 s->period %= runtime->periods;
492 s->periods++;
493 }
494}
495
496#ifdef HH_VERSION
497static void audio_dma_callback(void *data, int size)
498#else
499static void audio_dma_callback(void *data)
500#endif
501{
502 struct audio_stream *s = data;
503
504 /*
505 * If we are getting a callback for an active stream then we inform
506 * the PCM middle layer we've finished a period
507 */
508 if (s->active)
509 snd_pcm_period_elapsed(s->stream);
510
511 spin_lock(&s->dma_lock);
512 if (!s->tx_spin && s->periods > 0)
513 s->periods--;
514 audio_process_dma(s);
515 spin_unlock(&s->dma_lock);
516}
517
518/* }}} */
519
520/* {{{ PCM setting */
521
522/* {{{ trigger & timer */
523
524static int snd_sa11xx_uda1341_trigger(struct snd_pcm_substream *substream, int cmd)
525{
526 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
527 int stream_id = substream->pstr->stream;
528 struct audio_stream *s = &chip->s[stream_id];
529 struct audio_stream *s1 = &chip->s[stream_id ^ 1];
530 int err = 0;
531
532 /* note local interrupts are already disabled in the midlevel code */
533 spin_lock(&s->dma_lock);
534 switch (cmd) {
535 case SNDRV_PCM_TRIGGER_START:
536 /* now we need to make sure a record only stream has a clock */
537 if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
538 /* we need to force fill the xmit DMA with zeros */
539 s1->tx_spin = 1;
540 audio_process_dma(s1);
541 }
542 /* this case is when you were recording then you turn on a
543 * playback stream so we stop (also clears it) the dma first,
544 * clear the sync flag and then we let it turned on
545 */
546 else {
547 s->tx_spin = 0;
548 }
549
550 /* requested stream startup */
551 s->active = 1;
552 audio_process_dma(s);
553 break;
554 case SNDRV_PCM_TRIGGER_STOP:
555 /* requested stream shutdown */
556 audio_stop_dma(s);
557
558 /*
559 * now we need to make sure a record only stream has a clock
560 * so if we're stopping a playback with an active capture
561 * we need to turn the 0 fill dma on for the xmit side
562 */
563 if (stream_id == SNDRV_PCM_STREAM_PLAYBACK && s1->active) {
564 /* we need to force fill the xmit DMA with zeros */
565 s->tx_spin = 1;
566 audio_process_dma(s);
567 }
568 /*
569 * we killed a capture only stream, so we should also kill
570 * the zero fill transmit
571 */
572 else {
573 if (s1->tx_spin) {
574 s1->tx_spin = 0;
575 audio_stop_dma(s1);
576 }
577 }
578
579 break;
580 case SNDRV_PCM_TRIGGER_SUSPEND:
581 s->active = 0;
582#ifdef HH_VERSION
583 sa1100_dma_stop(s->dmach);
584#else
585 //FIXME - DMA API
586#endif
587 s->old_offset = audio_get_dma_pos(s) + 1;
588#ifdef HH_VERSION
589 sa1100_dma_flush_all(s->dmach);
590#else
591 //FIXME - DMA API
592#endif
593 s->periods = 0;
594 break;
595 case SNDRV_PCM_TRIGGER_RESUME:
596 s->active = 1;
597 s->tx_spin = 0;
598 audio_process_dma(s);
599 if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
600 s1->tx_spin = 1;
601 audio_process_dma(s1);
602 }
603 break;
604 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
605#ifdef HH_VERSION
606 sa1100_dma_stop(s->dmach);
607#else
608 //FIXME - DMA API
609#endif
610 s->active = 0;
611 if (stream_id == SNDRV_PCM_STREAM_PLAYBACK) {
612 if (s1->active) {
613 s->tx_spin = 1;
614 s->old_offset = audio_get_dma_pos(s) + 1;
615#ifdef HH_VERSION
616 sa1100_dma_flush_all(s->dmach);
617#else
618 //FIXME - DMA API
619#endif
620 audio_process_dma(s);
621 }
622 } else {
623 if (s1->tx_spin) {
624 s1->tx_spin = 0;
625#ifdef HH_VERSION
626 sa1100_dma_flush_all(s1->dmach);
627#else
628 //FIXME - DMA API
629#endif
630 }
631 }
632 break;
633 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
634 s->active = 1;
635 if (s->old_offset) {
636 s->tx_spin = 0;
637 audio_process_dma(s);
638 break;
639 }
640 if (stream_id == SNDRV_PCM_STREAM_CAPTURE && !s1->active) {
641 s1->tx_spin = 1;
642 audio_process_dma(s1);
643 }
644#ifdef HH_VERSION
645 sa1100_dma_resume(s->dmach);
646#else
647 //FIXME - DMA API
648#endif
649 break;
650 default:
651 err = -EINVAL;
652 break;
653 }
654 spin_unlock(&s->dma_lock);
655 return err;
656}
657
658static int snd_sa11xx_uda1341_prepare(struct snd_pcm_substream *substream)
659{
660 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
661 struct snd_pcm_runtime *runtime = substream->runtime;
662 struct audio_stream *s = &chip->s[substream->pstr->stream];
663
664 /* set requested samplerate */
665 sa11xx_uda1341_set_samplerate(chip, runtime->rate);
666
667 /* set requestd format when available */
668 /* set FMT here !!! FIXME */
669
670 s->period = 0;
671 s->periods = 0;
672
673 return 0;
674}
675
676static snd_pcm_uframes_t snd_sa11xx_uda1341_pointer(struct snd_pcm_substream *substream)
677{
678 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
679 return audio_get_dma_pos(&chip->s[substream->pstr->stream]);
680}
681
682/* }}} */
683
684static struct snd_pcm_hardware snd_sa11xx_uda1341_capture =
685{
686 .info = (SNDRV_PCM_INFO_INTERLEAVED |
687 SNDRV_PCM_INFO_BLOCK_TRANSFER |
688 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
689 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
690 .formats = SNDRV_PCM_FMTBIT_S16_LE,
691 .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
692 SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
693 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
694 SNDRV_PCM_RATE_KNOT),
695 .rate_min = 8000,
696 .rate_max = 48000,
697 .channels_min = 2,
698 .channels_max = 2,
699 .buffer_bytes_max = 64*1024,
700 .period_bytes_min = 64,
701 .period_bytes_max = DMA_BUF_SIZE,
702 .periods_min = 2,
703 .periods_max = 255,
704 .fifo_size = 0,
705};
706
707static struct snd_pcm_hardware snd_sa11xx_uda1341_playback =
708{
709 .info = (SNDRV_PCM_INFO_INTERLEAVED |
710 SNDRV_PCM_INFO_BLOCK_TRANSFER |
711 SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
712 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
713 .formats = SNDRV_PCM_FMTBIT_S16_LE,
714 .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
715 SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |\
716 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
717 SNDRV_PCM_RATE_KNOT),
718 .rate_min = 8000,
719 .rate_max = 48000,
720 .channels_min = 2,
721 .channels_max = 2,
722 .buffer_bytes_max = 64*1024,
723 .period_bytes_min = 64,
724 .period_bytes_max = DMA_BUF_SIZE,
725 .periods_min = 2,
726 .periods_max = 255,
727 .fifo_size = 0,
728};
729
730static int snd_card_sa11xx_uda1341_open(struct snd_pcm_substream *substream)
731{
732 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
733 struct snd_pcm_runtime *runtime = substream->runtime;
734 int stream_id = substream->pstr->stream;
735 int err;
736
737 chip->s[stream_id].stream = substream;
738
739 if (stream_id == SNDRV_PCM_STREAM_PLAYBACK)
740 runtime->hw = snd_sa11xx_uda1341_playback;
741 else
742 runtime->hw = snd_sa11xx_uda1341_capture;
743 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
744 return err;
745 if ((err = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates)) < 0)
746 return err;
747
748 return 0;
749}
750
751static int snd_card_sa11xx_uda1341_close(struct snd_pcm_substream *substream)
752{
753 struct sa11xx_uda1341 *chip = snd_pcm_substream_chip(substream);
754
755 chip->s[substream->pstr->stream].stream = NULL;
756 return 0;
757}
758
759/* {{{ HW params & free */
760
761static int snd_sa11xx_uda1341_hw_params(struct snd_pcm_substream *substream,
762 struct snd_pcm_hw_params *hw_params)
763{
764
765 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
766}
767
768static int snd_sa11xx_uda1341_hw_free(struct snd_pcm_substream *substream)
769{
770 return snd_pcm_lib_free_pages(substream);
771}
772
773/* }}} */
774
775static struct snd_pcm_ops snd_card_sa11xx_uda1341_playback_ops = {
776 .open = snd_card_sa11xx_uda1341_open,
777 .close = snd_card_sa11xx_uda1341_close,
778 .ioctl = snd_pcm_lib_ioctl,
779 .hw_params = snd_sa11xx_uda1341_hw_params,
780 .hw_free = snd_sa11xx_uda1341_hw_free,
781 .prepare = snd_sa11xx_uda1341_prepare,
782 .trigger = snd_sa11xx_uda1341_trigger,
783 .pointer = snd_sa11xx_uda1341_pointer,
784};
785
786static struct snd_pcm_ops snd_card_sa11xx_uda1341_capture_ops = {
787 .open = snd_card_sa11xx_uda1341_open,
788 .close = snd_card_sa11xx_uda1341_close,
789 .ioctl = snd_pcm_lib_ioctl,
790 .hw_params = snd_sa11xx_uda1341_hw_params,
791 .hw_free = snd_sa11xx_uda1341_hw_free,
792 .prepare = snd_sa11xx_uda1341_prepare,
793 .trigger = snd_sa11xx_uda1341_trigger,
794 .pointer = snd_sa11xx_uda1341_pointer,
795};
796
797static int __init snd_card_sa11xx_uda1341_pcm(struct sa11xx_uda1341 *sa11xx_uda1341, int device)
798{
799 struct snd_pcm *pcm;
800 int err;
801
802 if ((err = snd_pcm_new(sa11xx_uda1341->card, "UDA1341 PCM", device, 1, 1, &pcm)) < 0)
803 return err;
804
805 /*
806 * this sets up our initial buffers and sets the dma_type to isa.
807 * isa works but I'm not sure why (or if) it's the right choice
808 * this may be too large, trying it for now
809 */
810 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
811 snd_dma_isa_data(),
812 64*1024, 64*1024);
813
814 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_card_sa11xx_uda1341_playback_ops);
815 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_card_sa11xx_uda1341_capture_ops);
816 pcm->private_data = sa11xx_uda1341;
817 pcm->info_flags = 0;
818 strcpy(pcm->name, "UDA1341 PCM");
819
820 sa11xx_uda1341_audio_init(sa11xx_uda1341);
821
822 /* setup DMA controller */
823 audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_PLAYBACK], audio_dma_callback);
824 audio_dma_request(&sa11xx_uda1341->s[SNDRV_PCM_STREAM_CAPTURE], audio_dma_callback);
825
826 sa11xx_uda1341->pcm = pcm;
827
828 return 0;
829}
830
831/* }}} */
832
833/* {{{ module init & exit */
834
835#ifdef CONFIG_PM
836
837static int snd_sa11xx_uda1341_suspend(struct platform_device *devptr,
838 pm_message_t state)
839{
840 struct snd_card *card = platform_get_drvdata(devptr);
841 struct sa11xx_uda1341 *chip = card->private_data;
842
843 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
844 snd_pcm_suspend_all(chip->pcm);
845#ifdef HH_VERSION
846 sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
847 sa1100_dma_sleep(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
848#else
849 //FIXME
850#endif
851 l3_command(chip->uda1341, CMD_SUSPEND, NULL);
852 sa11xx_uda1341_audio_shutdown(chip);
853
854 return 0;
855}
856
857static int snd_sa11xx_uda1341_resume(struct platform_device *devptr)
858{
859 struct snd_card *card = platform_get_drvdata(devptr);
860 struct sa11xx_uda1341 *chip = card->private_data;
861
862 sa11xx_uda1341_audio_init(chip);
863 l3_command(chip->uda1341, CMD_RESUME, NULL);
864#ifdef HH_VERSION
865 sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_PLAYBACK].dmach);
866 sa1100_dma_wakeup(chip->s[SNDRV_PCM_STREAM_CAPTURE].dmach);
867#else
868 //FIXME
869#endif
870 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
871 return 0;
872}
873#endif /* COMFIG_PM */
874
875void snd_sa11xx_uda1341_free(struct snd_card *card)
876{
877 struct sa11xx_uda1341 *chip = card->private_data;
878
879 audio_dma_free(&chip->s[SNDRV_PCM_STREAM_PLAYBACK]);
880 audio_dma_free(&chip->s[SNDRV_PCM_STREAM_CAPTURE]);
881}
882
883static int __devinit sa11xx_uda1341_probe(struct platform_device *devptr)
884{
885 int err;
886 struct snd_card *card;
887 struct sa11xx_uda1341 *chip;
888
889 /* register the soundcard */
890 err = snd_card_create(-1, id, THIS_MODULE,
891 sizeof(struct sa11xx_uda1341), &card);
892 if (err < 0)
893 return err;
894
895 chip = card->private_data;
896 spin_lock_init(&chip->s[0].dma_lock);
897 spin_lock_init(&chip->s[1].dma_lock);
898
899 card->private_free = snd_sa11xx_uda1341_free;
900 chip->card = card;
901 chip->samplerate = AUDIO_RATE_DEFAULT;
902
903 // mixer
904 if ((err = snd_chip_uda1341_mixer_new(card, &chip->uda1341)))
905 goto nodev;
906
907 // PCM
908 if ((err = snd_card_sa11xx_uda1341_pcm(chip, 0)) < 0)
909 goto nodev;
910
911 strcpy(card->driver, "UDA1341");
912 strcpy(card->shortname, "H3600 UDA1341TS");
913 sprintf(card->longname, "Compaq iPAQ H3600 with Philips UDA1341TS");
914
915 snd_card_set_dev(card, &devptr->dev);
916
917 if ((err = snd_card_register(card)) == 0) {
918 printk(KERN_INFO "iPAQ audio support initialized\n");
919 platform_set_drvdata(devptr, card);
920 return 0;
921 }
922
923 nodev:
924 snd_card_free(card);
925 return err;
926}
927
928static int __devexit sa11xx_uda1341_remove(struct platform_device *devptr)
929{
930 snd_card_free(platform_get_drvdata(devptr));
931 platform_set_drvdata(devptr, NULL);
932 return 0;
933}
934
935#define SA11XX_UDA1341_DRIVER "sa11xx_uda1341"
936
937static struct platform_driver sa11xx_uda1341_driver = {
938 .probe = sa11xx_uda1341_probe,
939 .remove = __devexit_p(sa11xx_uda1341_remove),
940#ifdef CONFIG_PM
941 .suspend = snd_sa11xx_uda1341_suspend,
942 .resume = snd_sa11xx_uda1341_resume,
943#endif
944 .driver = {
945 .name = SA11XX_UDA1341_DRIVER,
946 },
947};
948
949static int __init sa11xx_uda1341_init(void)
950{
951 int err;
952
953 if (!machine_is_h3xxx())
954 return -ENODEV;
955 if ((err = platform_driver_register(&sa11xx_uda1341_driver)) < 0)
956 return err;
957 device = platform_device_register_simple(SA11XX_UDA1341_DRIVER, -1, NULL, 0);
958 if (!IS_ERR(device)) {
959 if (platform_get_drvdata(device))
960 return 0;
961 platform_device_unregister(device);
962 err = -ENODEV;
963 } else
964 err = PTR_ERR(device);
965 platform_driver_unregister(&sa11xx_uda1341_driver);
966 return err;
967}
968
969static void __exit sa11xx_uda1341_exit(void)
970{
971 platform_device_unregister(device);
972 platform_driver_unregister(&sa11xx_uda1341_driver);
973}
974
975module_init(sa11xx_uda1341_init);
976module_exit(sa11xx_uda1341_exit);
977
978/* }}} */
979
980/*
981 * Local variables:
982 * indent-tabs-mode: t
983 * End:
984 */
diff --git a/sound/i2c/Makefile b/sound/i2c/Makefile
index 37970666a453..36879bf88700 100644
--- a/sound/i2c/Makefile
+++ b/sound/i2c/Makefile
@@ -7,8 +7,6 @@ snd-i2c-objs := i2c.o
7snd-cs8427-objs := cs8427.o 7snd-cs8427-objs := cs8427.o
8snd-tea6330t-objs := tea6330t.o 8snd-tea6330t-objs := tea6330t.o
9 9
10obj-$(CONFIG_L3) += l3/
11
12obj-$(CONFIG_SND) += other/ 10obj-$(CONFIG_SND) += other/
13 11
14# Toplevel Module Dependency 12# Toplevel Module Dependency
diff --git a/sound/i2c/l3/Makefile b/sound/i2c/l3/Makefile
deleted file mode 100644
index 49455b8dcc04..000000000000
--- a/sound/i2c/l3/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for ALSA
3#
4
5snd-uda1341-objs := uda1341.o
6
7# Module Dependency
8obj-$(CONFIG_SND_SA11XX_UDA1341) += snd-uda1341.o
diff --git a/sound/i2c/l3/uda1341.c b/sound/i2c/l3/uda1341.c
deleted file mode 100644
index 9840eb43648d..000000000000
--- a/sound/i2c/l3/uda1341.c
+++ /dev/null
@@ -1,935 +0,0 @@
1/*
2 * Philips UDA1341 mixer device driver
3 * Copyright (c) 2002 Tomas Kasparek <tomas.kasparek@seznam.cz>
4 *
5 * Portions are Copyright (C) 2000 Lernout & Hauspie Speech Products, N.V.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License.
9 *
10 * History:
11 *
12 * 2002-03-13 Tomas Kasparek initial release - based on uda1341.c from OSS
13 * 2002-03-28 Tomas Kasparek basic mixer is working (volume, bass, treble)
14 * 2002-03-30 Tomas Kasparek proc filesystem support, complete mixer and DSP
15 * features support
16 * 2002-04-12 Tomas Kasparek proc interface update, code cleanup
17 * 2002-05-12 Tomas Kasparek another code cleanup
18 */
19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/types.h>
23#include <linux/slab.h>
24#include <linux/errno.h>
25#include <linux/ioctl.h>
26
27#include <asm/uaccess.h>
28
29#include <sound/core.h>
30#include <sound/control.h>
31#include <sound/initval.h>
32#include <sound/info.h>
33
34#include <linux/l3/l3.h>
35
36#include <sound/uda1341.h>
37
38/* {{{ HW regs definition */
39
40#define STAT0 0x00
41#define STAT1 0x80
42#define STAT_MASK 0x80
43
44#define DATA0_0 0x00
45#define DATA0_1 0x40
46#define DATA0_2 0x80
47#define DATA_MASK 0xc0
48
49#define IS_DATA0(x) ((x) >= data0_0 && (x) <= data0_2)
50#define IS_DATA1(x) ((x) == data1)
51#define IS_STATUS(x) ((x) == stat0 || (x) == stat1)
52#define IS_EXTEND(x) ((x) >= ext0 && (x) <= ext6)
53
54/* }}} */
55
56
57static const char *peak_names[] = {
58 "before",
59 "after",
60};
61
62static const char *filter_names[] = {
63 "flat",
64 "min",
65 "min",
66 "max",
67};
68
69static const char *mixer_names[] = {
70 "double differential",
71 "input channel 1 (line in)",
72 "input channel 2 (microphone)",
73 "digital mixer",
74};
75
76static const char *deemp_names[] = {
77 "none",
78 "32 kHz",
79 "44.1 kHz",
80 "48 kHz",
81};
82
83enum uda1341_regs_names {
84 stat0,
85 stat1,
86 data0_0,
87 data0_1,
88 data0_2,
89 data1,
90 ext0,
91 ext1,
92 ext2,
93 empty,
94 ext4,
95 ext5,
96 ext6,
97 uda1341_reg_last,
98};
99
100static const char *uda1341_reg_names[] = {
101 "stat 0 ",
102 "stat 1 ",
103 "data 00",
104 "data 01",
105 "data 02",
106 "data 1 ",
107 "ext 0",
108 "ext 1",
109 "ext 2",
110 "empty",
111 "ext 4",
112 "ext 5",
113 "ext 6",
114};
115
116static const int uda1341_enum_items[] = {
117 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
118 2, //peak - before/after
119 4, //deemp - none/32/44.1/48
120 0,
121 4, //filter - flat/min/min/max
122 0, 0, 0,
123 4, //mixer - differ/line/mic/mixer
124 0, 0, 0, 0, 0,
125};
126
127static const char ** uda1341_enum_names[] = {
128 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
129 peak_names, //peak - before/after
130 deemp_names, //deemp - none/32/44.1/48
131 NULL,
132 filter_names, //filter - flat/min/min/max
133 NULL, NULL, NULL,
134 mixer_names, //mixer - differ/line/mic/mixer
135 NULL, NULL, NULL, NULL, NULL,
136};
137
138typedef int uda1341_cfg[CMD_LAST];
139
140struct uda1341 {
141 int (*write) (struct l3_client *uda1341, unsigned short reg, unsigned short val);
142 int (*read) (struct l3_client *uda1341, unsigned short reg);
143 unsigned char regs[uda1341_reg_last];
144 int active;
145 spinlock_t reg_lock;
146 struct snd_card *card;
147 uda1341_cfg cfg;
148#ifdef CONFIG_PM
149 unsigned char suspend_regs[uda1341_reg_last];
150 uda1341_cfg suspend_cfg;
151#endif
152};
153
154/* transfer 8bit integer into string with binary representation */
155static void int2str_bin8(uint8_t val, char *buf)
156{
157 const int size = sizeof(val) * 8;
158 int i;
159
160 for (i= 0; i < size; i++){
161 *(buf++) = (val >> (size - 1)) ? '1' : '0';
162 val <<= 1;
163 }
164 *buf = '\0'; //end the string with zero
165}
166
167/* {{{ HW manipulation routines */
168
169static int snd_uda1341_codec_write(struct l3_client *clnt, unsigned short reg, unsigned short val)
170{
171 struct uda1341 *uda = clnt->driver_data;
172 unsigned char buf[2] = { 0xc0, 0xe0 }; // for EXT addressing
173 int err = 0;
174
175 uda->regs[reg] = val;
176
177 if (uda->active) {
178 if (IS_DATA0(reg)) {
179 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)&val, 1);
180 } else if (IS_DATA1(reg)) {
181 err = l3_write(clnt, UDA1341_DATA1, (const unsigned char *)&val, 1);
182 } else if (IS_STATUS(reg)) {
183 err = l3_write(clnt, UDA1341_STATUS, (const unsigned char *)&val, 1);
184 } else if (IS_EXTEND(reg)) {
185 buf[0] |= (reg - ext0) & 0x7; //EXT address
186 buf[1] |= val; //EXT data
187 err = l3_write(clnt, UDA1341_DATA0, (const unsigned char *)buf, 2);
188 }
189 } else
190 printk(KERN_ERR "UDA1341 codec not active!\n");
191 return err;
192}
193
194static int snd_uda1341_codec_read(struct l3_client *clnt, unsigned short reg)
195{
196 unsigned char val;
197 int err;
198
199 err = l3_read(clnt, reg, &val, 1);
200 if (err == 1)
201 // use just 6bits - the rest is address of the reg
202 return val & 63;
203 return err < 0 ? err : -EIO;
204}
205
206static inline int snd_uda1341_valid_reg(struct l3_client *clnt, unsigned short reg)
207{
208 return reg < uda1341_reg_last;
209}
210
211static int snd_uda1341_update_bits(struct l3_client *clnt, unsigned short reg,
212 unsigned short mask, unsigned short shift,
213 unsigned short value, int flush)
214{
215 int change;
216 unsigned short old, new;
217 struct uda1341 *uda = clnt->driver_data;
218
219#if 0
220 printk(KERN_DEBUG "update_bits: reg: %s mask: %d shift: %d val: %d\n",
221 uda1341_reg_names[reg], mask, shift, value);
222#endif
223
224 if (!snd_uda1341_valid_reg(clnt, reg))
225 return -EINVAL;
226 spin_lock(&uda->reg_lock);
227 old = uda->regs[reg];
228 new = (old & ~(mask << shift)) | (value << shift);
229 change = old != new;
230 if (change) {
231 if (flush) uda->write(clnt, reg, new);
232 uda->regs[reg] = new;
233 }
234 spin_unlock(&uda->reg_lock);
235 return change;
236}
237
238static int snd_uda1341_cfg_write(struct l3_client *clnt, unsigned short what,
239 unsigned short value, int flush)
240{
241 struct uda1341 *uda = clnt->driver_data;
242 int ret = 0;
243#ifdef CONFIG_PM
244 int reg;
245#endif
246
247#if 0
248 printk(KERN_DEBUG "cfg_write what: %d value: %d\n", what, value);
249#endif
250
251 uda->cfg[what] = value;
252
253 switch(what) {
254 case CMD_RESET:
255 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, 1, flush); // MUTE
256 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 1, flush); // RESET
257 ret = snd_uda1341_update_bits(clnt, stat0, 1, 6, 0, flush); // RESTORE
258 uda->cfg[CMD_RESET]=0;
259 break;
260 case CMD_FS:
261 ret = snd_uda1341_update_bits(clnt, stat0, 3, 4, value, flush);
262 break;
263 case CMD_FORMAT:
264 ret = snd_uda1341_update_bits(clnt, stat0, 7, 1, value, flush);
265 break;
266 case CMD_OGAIN:
267 ret = snd_uda1341_update_bits(clnt, stat1, 1, 6, value, flush);
268 break;
269 case CMD_IGAIN:
270 ret = snd_uda1341_update_bits(clnt, stat1, 1, 5, value, flush);
271 break;
272 case CMD_DAC:
273 ret = snd_uda1341_update_bits(clnt, stat1, 1, 0, value, flush);
274 break;
275 case CMD_ADC:
276 ret = snd_uda1341_update_bits(clnt, stat1, 1, 1, value, flush);
277 break;
278 case CMD_VOLUME:
279 ret = snd_uda1341_update_bits(clnt, data0_0, 63, 0, value, flush);
280 break;
281 case CMD_BASS:
282 ret = snd_uda1341_update_bits(clnt, data0_1, 15, 2, value, flush);
283 break;
284 case CMD_TREBBLE:
285 ret = snd_uda1341_update_bits(clnt, data0_1, 3, 0, value, flush);
286 break;
287 case CMD_PEAK:
288 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 5, value, flush);
289 break;
290 case CMD_DEEMP:
291 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 3, value, flush);
292 break;
293 case CMD_MUTE:
294 ret = snd_uda1341_update_bits(clnt, data0_2, 1, 2, value, flush);
295 break;
296 case CMD_FILTER:
297 ret = snd_uda1341_update_bits(clnt, data0_2, 3, 0, value, flush);
298 break;
299 case CMD_CH1:
300 ret = snd_uda1341_update_bits(clnt, ext0, 31, 0, value, flush);
301 break;
302 case CMD_CH2:
303 ret = snd_uda1341_update_bits(clnt, ext1, 31, 0, value, flush);
304 break;
305 case CMD_MIC:
306 ret = snd_uda1341_update_bits(clnt, ext2, 7, 2, value, flush);
307 break;
308 case CMD_MIXER:
309 ret = snd_uda1341_update_bits(clnt, ext2, 3, 0, value, flush);
310 break;
311 case CMD_AGC:
312 ret = snd_uda1341_update_bits(clnt, ext4, 1, 4, value, flush);
313 break;
314 case CMD_IG:
315 ret = snd_uda1341_update_bits(clnt, ext4, 3, 0, value & 0x3, flush);
316 ret = snd_uda1341_update_bits(clnt, ext5, 31, 0, value >> 2, flush);
317 break;
318 case CMD_AGC_TIME:
319 ret = snd_uda1341_update_bits(clnt, ext6, 7, 2, value, flush);
320 break;
321 case CMD_AGC_LEVEL:
322 ret = snd_uda1341_update_bits(clnt, ext6, 3, 0, value, flush);
323 break;
324#ifdef CONFIG_PM
325 case CMD_SUSPEND:
326 for (reg = stat0; reg < uda1341_reg_last; reg++)
327 uda->suspend_regs[reg] = uda->regs[reg];
328 for (reg = 0; reg < CMD_LAST; reg++)
329 uda->suspend_cfg[reg] = uda->cfg[reg];
330 break;
331 case CMD_RESUME:
332 for (reg = stat0; reg < uda1341_reg_last; reg++)
333 snd_uda1341_codec_write(clnt, reg, uda->suspend_regs[reg]);
334 for (reg = 0; reg < CMD_LAST; reg++)
335 uda->cfg[reg] = uda->suspend_cfg[reg];
336 break;
337#endif
338 default:
339 ret = -EINVAL;
340 break;
341 }
342
343 if (!uda->active)
344 printk(KERN_ERR "UDA1341 codec not active!\n");
345 return ret;
346}
347
348/* }}} */
349
350/* {{{ Proc interface */
351#ifdef CONFIG_PROC_FS
352
353static const char *format_names[] = {
354 "I2S-bus",
355 "LSB 16bits",
356 "LSB 18bits",
357 "LSB 20bits",
358 "MSB",
359 "in LSB 16bits/out MSB",
360 "in LSB 18bits/out MSB",
361 "in LSB 20bits/out MSB",
362};
363
364static const char *fs_names[] = {
365 "512*fs",
366 "384*fs",
367 "256*fs",
368 "Unused - bad value!",
369};
370
371static const char* bass_values[][16] = {
372 {"0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB", "0 dB",
373 "0 dB", "0 dB", "0 dB", "0 dB", "undefined", }, //flat
374 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
375 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
376 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "18 dB",
377 "18 dB", "18 dB", "18 dB", "18 dB", "undefined",}, // min
378 {"0 dB", "2 dB", "4 dB", "6 dB", "8 dB", "10 dB", "12 dB", "14 dB", "16 dB", "18 dB", "20 dB",
379 "22 dB", "24 dB", "24 dB", "24 dB", "undefined",}, // max
380};
381
382static const char *mic_sens_value[] = {
383 "-3 dB", "0 dB", "3 dB", "9 dB", "15 dB", "21 dB", "27 dB", "not used",
384};
385
386static const unsigned short AGC_atime[] = {
387 11, 16, 11, 16, 21, 11, 16, 21,
388};
389
390static const unsigned short AGC_dtime[] = {
391 100, 100, 200, 200, 200, 400, 400, 400,
392};
393
394static const char *AGC_level[] = {
395 "-9.0", "-11.5", "-15.0", "-17.5",
396};
397
398static const char *ig_small_value[] = {
399 "-3.0", "-2.5", "-2.0", "-1.5", "-1.0", "-0.5",
400};
401
402/*
403 * this was computed as peak_value[i] = pow((63-i)*1.42,1.013)
404 *
405 * UDA1341 datasheet on page 21: Peak value (dB) = (Peak level - 63.5)*5*log2
406 * There is an table with these values [level]=value: [3]=-90.31, [7]=-84.29
407 * [61]=-2.78, [62] = -1.48, [63] = 0.0
408 * I tried to compute it, but using but even using logarithm with base either 10 or 2
409 * i was'n able to get values in the table from the formula. So I constructed another
410 * formula (see above) to interpolate the values as good as possible. If there is some
411 * mistake, please contact me on tomas.kasparek@seznam.cz. Thanks.
412 * UDA1341TS datasheet is available at:
413 * http://www-us9.semiconductors.com/acrobat/datasheets/UDA1341TS_3.pdf
414 */
415static const char *peak_value[] = {
416 "-INF dB", "N.A.", "N.A", "90.31 dB", "N.A.", "N.A.", "N.A.", "-84.29 dB",
417 "-82.65 dB", "-81.13 dB", "-79.61 dB", "-78.09 dB", "-76.57 dB", "-75.05 dB", "-73.53 dB",
418 "-72.01 dB", "-70.49 dB", "-68.97 dB", "-67.45 dB", "-65.93 dB", "-64.41 dB", "-62.90 dB",
419 "-61.38 dB", "-59.86 dB", "-58.35 dB", "-56.83 dB", "-55.32 dB", "-53.80 dB", "-52.29 dB",
420 "-50.78 dB", "-49.26 dB", "-47.75 dB", "-46.24 dB", "-44.73 dB", "-43.22 dB", "-41.71 dB",
421 "-40.20 dB", "-38.69 dB", "-37.19 dB", "-35.68 dB", "-34.17 dB", "-32.67 dB", "-31.17 dB",
422 "-29.66 dB", "-28.16 dB", "-26.66 dB", "-25.16 dB", "-23.66 dB", "-22.16 dB", "-20.67 dB",
423 "-19.17 dB", "-17.68 dB", "-16.19 dB", "-14.70 dB", "-13.21 dB", "-11.72 dB", "-10.24 dB",
424 "-8.76 dB", "-7.28 dB", "-5.81 dB", "-4.34 dB", "-2.88 dB", "-1.43 dB", "0.00 dB",
425};
426
427static void snd_uda1341_proc_read(struct snd_info_entry *entry,
428 struct snd_info_buffer *buffer)
429{
430 struct l3_client *clnt = entry->private_data;
431 struct uda1341 *uda = clnt->driver_data;
432 int peak;
433
434 peak = snd_uda1341_codec_read(clnt, UDA1341_DATA1);
435 if (peak < 0)
436 peak = 0;
437
438 snd_iprintf(buffer, "%s\n\n", uda->card->longname);
439
440 // for information about computed values see UDA1341TS datasheet pages 15 - 21
441 snd_iprintf(buffer, "DAC power : %s\n", uda->cfg[CMD_DAC] ? "on" : "off");
442 snd_iprintf(buffer, "ADC power : %s\n", uda->cfg[CMD_ADC] ? "on" : "off");
443 snd_iprintf(buffer, "Clock frequency : %s\n", fs_names[uda->cfg[CMD_FS]]);
444 snd_iprintf(buffer, "Data format : %s\n\n", format_names[uda->cfg[CMD_FORMAT]]);
445
446 snd_iprintf(buffer, "Filter mode : %s\n", filter_names[uda->cfg[CMD_FILTER]]);
447 snd_iprintf(buffer, "Mixer mode : %s\n", mixer_names[uda->cfg[CMD_MIXER]]);
448 snd_iprintf(buffer, "De-emphasis : %s\n", deemp_names[uda->cfg[CMD_DEEMP]]);
449 snd_iprintf(buffer, "Peak detection pos. : %s\n", uda->cfg[CMD_PEAK] ? "after" : "before");
450 snd_iprintf(buffer, "Peak value : %s\n\n", peak_value[peak]);
451
452 snd_iprintf(buffer, "Automatic Gain Ctrl : %s\n", uda->cfg[CMD_AGC] ? "on" : "off");
453 snd_iprintf(buffer, "AGC attack time : %d ms\n", AGC_atime[uda->cfg[CMD_AGC_TIME]]);
454 snd_iprintf(buffer, "AGC decay time : %d ms\n", AGC_dtime[uda->cfg[CMD_AGC_TIME]]);
455 snd_iprintf(buffer, "AGC output level : %s dB\n\n", AGC_level[uda->cfg[CMD_AGC_LEVEL]]);
456
457 snd_iprintf(buffer, "Mute : %s\n", uda->cfg[CMD_MUTE] ? "on" : "off");
458
459 if (uda->cfg[CMD_VOLUME] == 0)
460 snd_iprintf(buffer, "Volume : 0 dB\n");
461 else if (uda->cfg[CMD_VOLUME] < 62)
462 snd_iprintf(buffer, "Volume : %d dB\n", -1*uda->cfg[CMD_VOLUME] +1);
463 else
464 snd_iprintf(buffer, "Volume : -INF dB\n");
465 snd_iprintf(buffer, "Bass : %s\n", bass_values[uda->cfg[CMD_FILTER]][uda->cfg[CMD_BASS]]);
466 snd_iprintf(buffer, "Trebble : %d dB\n", uda->cfg[CMD_FILTER] ? 2*uda->cfg[CMD_TREBBLE] : 0);
467 snd_iprintf(buffer, "Input Gain (6dB) : %s\n", uda->cfg[CMD_IGAIN] ? "on" : "off");
468 snd_iprintf(buffer, "Output Gain (6dB) : %s\n", uda->cfg[CMD_OGAIN] ? "on" : "off");
469 snd_iprintf(buffer, "Mic sensitivity : %s\n", mic_sens_value[uda->cfg[CMD_MIC]]);
470
471
472 if(uda->cfg[CMD_CH1] < 31)
473 snd_iprintf(buffer, "Mixer gain channel 1: -%d.%c dB\n",
474 ((uda->cfg[CMD_CH1] >> 1) * 3) + (uda->cfg[CMD_CH1] & 1),
475 uda->cfg[CMD_CH1] & 1 ? '5' : '0');
476 else
477 snd_iprintf(buffer, "Mixer gain channel 1: -INF dB\n");
478 if(uda->cfg[CMD_CH2] < 31)
479 snd_iprintf(buffer, "Mixer gain channel 2: -%d.%c dB\n",
480 ((uda->cfg[CMD_CH2] >> 1) * 3) + (uda->cfg[CMD_CH2] & 1),
481 uda->cfg[CMD_CH2] & 1 ? '5' : '0');
482 else
483 snd_iprintf(buffer, "Mixer gain channel 2: -INF dB\n");
484
485 if(uda->cfg[CMD_IG] > 5)
486 snd_iprintf(buffer, "Input Amp. Gain ch 2: %d.%c dB\n",
487 (uda->cfg[CMD_IG] >> 1) -3, uda->cfg[CMD_IG] & 1 ? '5' : '0');
488 else
489 snd_iprintf(buffer, "Input Amp. Gain ch 2: %s dB\n", ig_small_value[uda->cfg[CMD_IG]]);
490}
491
492static void snd_uda1341_proc_regs_read(struct snd_info_entry *entry,
493 struct snd_info_buffer *buffer)
494{
495 struct l3_client *clnt = entry->private_data;
496 struct uda1341 *uda = clnt->driver_data;
497 int reg;
498 char buf[12];
499
500 for (reg = 0; reg < uda1341_reg_last; reg ++) {
501 if (reg == empty)
502 continue;
503 int2str_bin8(uda->regs[reg], buf);
504 snd_iprintf(buffer, "%s = %s\n", uda1341_reg_names[reg], buf);
505 }
506
507 int2str_bin8(snd_uda1341_codec_read(clnt, UDA1341_DATA1), buf);
508 snd_iprintf(buffer, "DATA1 = %s\n", buf);
509}
510#endif /* CONFIG_PROC_FS */
511
512static void __devinit snd_uda1341_proc_init(struct snd_card *card, struct l3_client *clnt)
513{
514 struct snd_info_entry *entry;
515
516 if (! snd_card_proc_new(card, "uda1341", &entry))
517 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_read);
518 if (! snd_card_proc_new(card, "uda1341-regs", &entry))
519 snd_info_set_text_ops(entry, clnt, snd_uda1341_proc_regs_read);
520}
521
522/* }}} */
523
524/* {{{ Mixer controls setting */
525
526/* {{{ UDA1341 single functions */
527
528#define UDA1341_SINGLE(xname, where, reg, shift, mask, invert) \
529{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_single, \
530 .get = snd_uda1341_get_single, .put = snd_uda1341_put_single, \
531 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
532}
533
534static int snd_uda1341_info_single(struct snd_kcontrol *kcontrol,
535 struct snd_ctl_elem_info *uinfo)
536{
537 int mask = (kcontrol->private_value >> 12) & 63;
538
539 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
540 uinfo->count = 1;
541 uinfo->value.integer.min = 0;
542 uinfo->value.integer.max = mask;
543 return 0;
544}
545
546static int snd_uda1341_get_single(struct snd_kcontrol *kcontrol,
547 struct snd_ctl_elem_value *ucontrol)
548{
549 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
550 struct uda1341 *uda = clnt->driver_data;
551 int where = kcontrol->private_value & 31;
552 int mask = (kcontrol->private_value >> 12) & 63;
553 int invert = (kcontrol->private_value >> 18) & 1;
554
555 ucontrol->value.integer.value[0] = uda->cfg[where];
556 if (invert)
557 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
558
559 return 0;
560}
561
562static int snd_uda1341_put_single(struct snd_kcontrol *kcontrol,
563 struct snd_ctl_elem_value *ucontrol)
564{
565 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
566 struct uda1341 *uda = clnt->driver_data;
567 int where = kcontrol->private_value & 31;
568 int reg = (kcontrol->private_value >> 5) & 15;
569 int shift = (kcontrol->private_value >> 9) & 7;
570 int mask = (kcontrol->private_value >> 12) & 63;
571 int invert = (kcontrol->private_value >> 18) & 1;
572 unsigned short val;
573
574 val = (ucontrol->value.integer.value[0] & mask);
575 if (invert)
576 val = mask - val;
577
578 uda->cfg[where] = val;
579 return snd_uda1341_update_bits(clnt, reg, mask, shift, val, FLUSH);
580}
581
582/* }}} */
583
584/* {{{ UDA1341 enum functions */
585
586#define UDA1341_ENUM(xname, where, reg, shift, mask, invert) \
587{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_uda1341_info_enum, \
588 .get = snd_uda1341_get_enum, .put = snd_uda1341_put_enum, \
589 .private_value = where | (reg << 5) | (shift << 9) | (mask << 12) | (invert << 18) \
590}
591
592static int snd_uda1341_info_enum(struct snd_kcontrol *kcontrol,
593 struct snd_ctl_elem_info *uinfo)
594{
595 int where = kcontrol->private_value & 31;
596 const char **texts;
597
598 // this register we don't handle this way
599 if (!uda1341_enum_items[where])
600 return -EINVAL;
601
602 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
603 uinfo->count = 1;
604 uinfo->value.enumerated.items = uda1341_enum_items[where];
605
606 if (uinfo->value.enumerated.item >= uda1341_enum_items[where])
607 uinfo->value.enumerated.item = uda1341_enum_items[where] - 1;
608
609 texts = uda1341_enum_names[where];
610 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
611 return 0;
612}
613
614static int snd_uda1341_get_enum(struct snd_kcontrol *kcontrol,
615 struct snd_ctl_elem_value *ucontrol)
616{
617 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
618 struct uda1341 *uda = clnt->driver_data;
619 int where = kcontrol->private_value & 31;
620
621 ucontrol->value.enumerated.item[0] = uda->cfg[where];
622 return 0;
623}
624
625static int snd_uda1341_put_enum(struct snd_kcontrol *kcontrol,
626 struct snd_ctl_elem_value *ucontrol)
627{
628 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
629 struct uda1341 *uda = clnt->driver_data;
630 int where = kcontrol->private_value & 31;
631 int reg = (kcontrol->private_value >> 5) & 15;
632 int shift = (kcontrol->private_value >> 9) & 7;
633 int mask = (kcontrol->private_value >> 12) & 63;
634
635 uda->cfg[where] = (ucontrol->value.enumerated.item[0] & mask);
636
637 return snd_uda1341_update_bits(clnt, reg, mask, shift, uda->cfg[where], FLUSH);
638}
639
640/* }}} */
641
642/* {{{ UDA1341 2regs functions */
643
644#define UDA1341_2REGS(xname, where, reg_1, reg_2, shift_1, shift_2, mask_1, mask_2, invert) \
645{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .info = snd_uda1341_info_2regs, \
646 .get = snd_uda1341_get_2regs, .put = snd_uda1341_put_2regs, \
647 .private_value = where | (reg_1 << 5) | (reg_2 << 9) | (shift_1 << 13) | (shift_2 << 16) | \
648 (mask_1 << 19) | (mask_2 << 25) | (invert << 31) \
649}
650
651
652static int snd_uda1341_info_2regs(struct snd_kcontrol *kcontrol,
653 struct snd_ctl_elem_info *uinfo)
654{
655 int mask_1 = (kcontrol->private_value >> 19) & 63;
656 int mask_2 = (kcontrol->private_value >> 25) & 63;
657 int mask;
658
659 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
660 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
661 uinfo->count = 1;
662 uinfo->value.integer.min = 0;
663 uinfo->value.integer.max = mask;
664 return 0;
665}
666
667static int snd_uda1341_get_2regs(struct snd_kcontrol *kcontrol,
668 struct snd_ctl_elem_value *ucontrol)
669{
670 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
671 struct uda1341 *uda = clnt->driver_data;
672 int where = kcontrol->private_value & 31;
673 int mask_1 = (kcontrol->private_value >> 19) & 63;
674 int mask_2 = (kcontrol->private_value >> 25) & 63;
675 int invert = (kcontrol->private_value >> 31) & 1;
676 int mask;
677
678 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
679
680 ucontrol->value.integer.value[0] = uda->cfg[where];
681 if (invert)
682 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
683 return 0;
684}
685
686static int snd_uda1341_put_2regs(struct snd_kcontrol *kcontrol,
687 struct snd_ctl_elem_value *ucontrol)
688{
689 struct l3_client *clnt = snd_kcontrol_chip(kcontrol);
690 struct uda1341 *uda = clnt->driver_data;
691 int where = kcontrol->private_value & 31;
692 int reg_1 = (kcontrol->private_value >> 5) & 15;
693 int reg_2 = (kcontrol->private_value >> 9) & 15;
694 int shift_1 = (kcontrol->private_value >> 13) & 7;
695 int shift_2 = (kcontrol->private_value >> 16) & 7;
696 int mask_1 = (kcontrol->private_value >> 19) & 63;
697 int mask_2 = (kcontrol->private_value >> 25) & 63;
698 int invert = (kcontrol->private_value >> 31) & 1;
699 int mask;
700 unsigned short val1, val2, val;
701
702 val = ucontrol->value.integer.value[0];
703
704 mask = (mask_2 + 1) * (mask_1 + 1) - 1;
705
706 val1 = val & mask_1;
707 val2 = (val / (mask_1 + 1)) & mask_2;
708
709 if (invert) {
710 val1 = mask_1 - val1;
711 val2 = mask_2 - val2;
712 }
713
714 uda->cfg[where] = invert ? mask - val : val;
715
716 //FIXME - return value
717 snd_uda1341_update_bits(clnt, reg_1, mask_1, shift_1, val1, FLUSH);
718 return snd_uda1341_update_bits(clnt, reg_2, mask_2, shift_2, val2, FLUSH);
719}
720
721/* }}} */
722
723static struct snd_kcontrol_new snd_uda1341_controls[] = {
724 UDA1341_SINGLE("Master Playback Switch", CMD_MUTE, data0_2, 2, 1, 1),
725 UDA1341_SINGLE("Master Playback Volume", CMD_VOLUME, data0_0, 0, 63, 1),
726
727 UDA1341_SINGLE("Bass Playback Volume", CMD_BASS, data0_1, 2, 15, 0),
728 UDA1341_SINGLE("Treble Playback Volume", CMD_TREBBLE, data0_1, 0, 3, 0),
729
730 UDA1341_SINGLE("Input Gain Switch", CMD_IGAIN, stat1, 5, 1, 0),
731 UDA1341_SINGLE("Output Gain Switch", CMD_OGAIN, stat1, 6, 1, 0),
732
733 UDA1341_SINGLE("Mixer Gain Channel 1 Volume", CMD_CH1, ext0, 0, 31, 1),
734 UDA1341_SINGLE("Mixer Gain Channel 2 Volume", CMD_CH2, ext1, 0, 31, 1),
735
736 UDA1341_SINGLE("Mic Sensitivity Volume", CMD_MIC, ext2, 2, 7, 0),
737
738 UDA1341_SINGLE("AGC Output Level", CMD_AGC_LEVEL, ext6, 0, 3, 0),
739 UDA1341_SINGLE("AGC Time Constant", CMD_AGC_TIME, ext6, 2, 7, 0),
740 UDA1341_SINGLE("AGC Time Constant Switch", CMD_AGC, ext4, 4, 1, 0),
741
742 UDA1341_SINGLE("DAC Power", CMD_DAC, stat1, 0, 1, 0),
743 UDA1341_SINGLE("ADC Power", CMD_ADC, stat1, 1, 1, 0),
744
745 UDA1341_ENUM("Peak detection", CMD_PEAK, data0_2, 5, 1, 0),
746 UDA1341_ENUM("De-emphasis", CMD_DEEMP, data0_2, 3, 3, 0),
747 UDA1341_ENUM("Mixer mode", CMD_MIXER, ext2, 0, 3, 0),
748 UDA1341_ENUM("Filter mode", CMD_FILTER, data0_2, 0, 3, 0),
749
750 UDA1341_2REGS("Gain Input Amplifier Gain (channel 2)", CMD_IG, ext4, ext5, 0, 0, 3, 31, 0),
751};
752
753static void uda1341_free(struct l3_client *clnt)
754{
755 l3_detach_client(clnt); // calls kfree for driver_data (struct uda1341)
756 kfree(clnt);
757}
758
759static int uda1341_dev_free(struct snd_device *device)
760{
761 struct l3_client *clnt = device->device_data;
762 uda1341_free(clnt);
763 return 0;
764}
765
766int __init snd_chip_uda1341_mixer_new(struct snd_card *card, struct l3_client **clntp)
767{
768 static struct snd_device_ops ops = {
769 .dev_free = uda1341_dev_free,
770 };
771 struct l3_client *clnt;
772 int idx, err;
773
774 if (snd_BUG_ON(!card))
775 return -EINVAL;
776
777 clnt = kzalloc(sizeof(*clnt), GFP_KERNEL);
778 if (clnt == NULL)
779 return -ENOMEM;
780
781 if ((err = l3_attach_client(clnt, "l3-bit-sa1100-gpio", UDA1341_ALSA_NAME))) {
782 kfree(clnt);
783 return err;
784 }
785
786 for (idx = 0; idx < ARRAY_SIZE(snd_uda1341_controls); idx++) {
787 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_uda1341_controls[idx], clnt))) < 0) {
788 uda1341_free(clnt);
789 return err;
790 }
791 }
792
793 if ((err = snd_device_new(card, SNDRV_DEV_CODEC, clnt, &ops)) < 0) {
794 uda1341_free(clnt);
795 return err;
796 }
797
798 *clntp = clnt;
799 strcpy(card->mixername, "UDA1341TS Mixer");
800 ((struct uda1341 *)clnt->driver_data)->card = card;
801
802 snd_uda1341_proc_init(card, clnt);
803
804 return 0;
805}
806
807/* }}} */
808
809/* {{{ L3 operations */
810
811static int uda1341_attach(struct l3_client *clnt)
812{
813 struct uda1341 *uda;
814
815 uda = kzalloc(sizeof(*uda), 0, GFP_KERNEL);
816 if (!uda)
817 return -ENOMEM;
818
819 /* init fixed parts of my copy of registers */
820 uda->regs[stat0] = STAT0;
821 uda->regs[stat1] = STAT1;
822
823 uda->regs[data0_0] = DATA0_0;
824 uda->regs[data0_1] = DATA0_1;
825 uda->regs[data0_2] = DATA0_2;
826
827 uda->write = snd_uda1341_codec_write;
828 uda->read = snd_uda1341_codec_read;
829
830 spin_lock_init(&uda->reg_lock);
831
832 clnt->driver_data = uda;
833 return 0;
834}
835
836static void uda1341_detach(struct l3_client *clnt)
837{
838 kfree(clnt->driver_data);
839}
840
841static int
842uda1341_command(struct l3_client *clnt, int cmd, void *arg)
843{
844 if (cmd != CMD_READ_REG)
845 return snd_uda1341_cfg_write(clnt, cmd, (int) arg, FLUSH);
846
847 return snd_uda1341_codec_read(clnt, (int) arg);
848}
849
850static int uda1341_open(struct l3_client *clnt)
851{
852 struct uda1341 *uda = clnt->driver_data;
853
854 uda->active = 1;
855
856 /* init default configuration */
857 snd_uda1341_cfg_write(clnt, CMD_RESET, 0, REGS_ONLY);
858 snd_uda1341_cfg_write(clnt, CMD_FS, F256, FLUSH); // unknown state after reset
859 snd_uda1341_cfg_write(clnt, CMD_FORMAT, LSB16, FLUSH); // unknown state after reset
860 snd_uda1341_cfg_write(clnt, CMD_OGAIN, ON, FLUSH); // default off after reset
861 snd_uda1341_cfg_write(clnt, CMD_IGAIN, ON, FLUSH); // default off after reset
862 snd_uda1341_cfg_write(clnt, CMD_DAC, ON, FLUSH); // ??? default value after reset
863 snd_uda1341_cfg_write(clnt, CMD_ADC, ON, FLUSH); // ??? default value after reset
864 snd_uda1341_cfg_write(clnt, CMD_VOLUME, 20, FLUSH); // default 0dB after reset
865 snd_uda1341_cfg_write(clnt, CMD_BASS, 0, REGS_ONLY); // default value after reset
866 snd_uda1341_cfg_write(clnt, CMD_TREBBLE, 0, REGS_ONLY); // default value after reset
867 snd_uda1341_cfg_write(clnt, CMD_PEAK, AFTER, REGS_ONLY);// default value after reset
868 snd_uda1341_cfg_write(clnt, CMD_DEEMP, NONE, REGS_ONLY);// default value after reset
869 //at this moment should be QMUTED by h3600_audio_init
870 snd_uda1341_cfg_write(clnt, CMD_MUTE, OFF, REGS_ONLY); // default value after reset
871 snd_uda1341_cfg_write(clnt, CMD_FILTER, MAX, FLUSH); // defaul flat after reset
872 snd_uda1341_cfg_write(clnt, CMD_CH1, 31, FLUSH); // default value after reset
873 snd_uda1341_cfg_write(clnt, CMD_CH2, 4, FLUSH); // default value after reset
874 snd_uda1341_cfg_write(clnt, CMD_MIC, 4, FLUSH); // default 0dB after reset
875 snd_uda1341_cfg_write(clnt, CMD_MIXER, MIXER, FLUSH); // default doub.dif.mode
876 snd_uda1341_cfg_write(clnt, CMD_AGC, OFF, FLUSH); // default value after reset
877 snd_uda1341_cfg_write(clnt, CMD_IG, 0, FLUSH); // unknown state after reset
878 snd_uda1341_cfg_write(clnt, CMD_AGC_TIME, 0, FLUSH); // default value after reset
879 snd_uda1341_cfg_write(clnt, CMD_AGC_LEVEL, 0, FLUSH); // default value after reset
880
881 return 0;
882}
883
884static void uda1341_close(struct l3_client *clnt)
885{
886 struct uda1341 *uda = clnt->driver_data;
887
888 uda->active = 0;
889}
890
891/* }}} */
892
893/* {{{ Module and L3 initialization */
894
895static struct l3_ops uda1341_ops = {
896 .open = uda1341_open,
897 .command = uda1341_command,
898 .close = uda1341_close,
899};
900
901static struct l3_driver uda1341_driver = {
902 .name = UDA1341_ALSA_NAME,
903 .attach_client = uda1341_attach,
904 .detach_client = uda1341_detach,
905 .ops = &uda1341_ops,
906 .owner = THIS_MODULE,
907};
908
909static int __init uda1341_init(void)
910{
911 return l3_add_driver(&uda1341_driver);
912}
913
914static void __exit uda1341_exit(void)
915{
916 l3_del_driver(&uda1341_driver);
917}
918
919module_init(uda1341_init);
920module_exit(uda1341_exit);
921
922MODULE_AUTHOR("Tomas Kasparek <tomas.kasparek@seznam.cz>");
923MODULE_LICENSE("GPL");
924MODULE_DESCRIPTION("Philips UDA1341 CODEC driver for ALSA");
925MODULE_SUPPORTED_DEVICE("{{UDA1341,UDA1341TS}}");
926
927EXPORT_SYMBOL(snd_chip_uda1341_mixer_new);
928
929/* }}} */
930
931/*
932 * Local variables:
933 * indent-tabs-mode: t
934 * End:
935 */
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-21 21:44:15 -0400