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authorMark Brown <broonie@kernel.org>2014-09-03 10:25:17 -0400
committerMark Brown <broonie@kernel.org>2014-09-03 10:25:17 -0400
commit94fe356f4c6e600379a9949a419e880dfe896e11 (patch)
tree25d151586957cb9b29cb8b627d59b96ac297b4a0 /sound
parent085f3ec6fd6c87907c4a19481dc13f02ecfcd316 (diff)
parent03be88ee4ab3acceddca43f11f4d01bcd6edcb93 (diff)
Merge branch 'fix/tlv320aic31xx' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-tlv320aic31xx
Diffstat (limited to 'sound')
-rw-r--r--sound/soc/codecs/tlv320aic31xx.c51
1 files changed, 39 insertions, 12 deletions
diff --git a/sound/soc/codecs/tlv320aic31xx.c b/sound/soc/codecs/tlv320aic31xx.c
index 9f9d23b94c22..40a636f447f1 100644
--- a/sound/soc/codecs/tlv320aic31xx.c
+++ b/sound/soc/codecs/tlv320aic31xx.c
@@ -189,46 +189,57 @@ static const struct aic31xx_rate_divs aic31xx_divs[] = {
189 /* mclk rate pll: p j d dosr ndac mdac aors nadc madc */ 189 /* mclk rate pll: p j d dosr ndac mdac aors nadc madc */
190 /* 8k rate */ 190 /* 8k rate */
191 {12000000, 8000, 1, 8, 1920, 128, 48, 2, 128, 48, 2}, 191 {12000000, 8000, 1, 8, 1920, 128, 48, 2, 128, 48, 2},
192 {12000000, 8000, 1, 8, 1920, 128, 32, 3, 128, 32, 3},
192 {24000000, 8000, 2, 8, 1920, 128, 48, 2, 128, 48, 2}, 193 {24000000, 8000, 2, 8, 1920, 128, 48, 2, 128, 48, 2},
193 {25000000, 8000, 2, 7, 8643, 128, 48, 2, 128, 48, 2}, 194 {25000000, 8000, 2, 7, 8643, 128, 48, 2, 128, 48, 2},
194 /* 11.025k rate */ 195 /* 11.025k rate */
195 {12000000, 11025, 1, 7, 5264, 128, 32, 2, 128, 32, 2}, 196 {12000000, 11025, 1, 7, 5264, 128, 32, 2, 128, 32, 2},
197 {12000000, 11025, 1, 8, 4672, 128, 24, 3, 128, 24, 3},
196 {24000000, 11025, 2, 7, 5264, 128, 32, 2, 128, 32, 2}, 198 {24000000, 11025, 2, 7, 5264, 128, 32, 2, 128, 32, 2},
197 {25000000, 11025, 2, 7, 2253, 128, 32, 2, 128, 32, 2}, 199 {25000000, 11025, 2, 7, 2253, 128, 32, 2, 128, 32, 2},
198 /* 16k rate */ 200 /* 16k rate */
199 {12000000, 16000, 1, 8, 1920, 128, 24, 2, 128, 24, 2}, 201 {12000000, 16000, 1, 8, 1920, 128, 24, 2, 128, 24, 2},
202 {12000000, 16000, 1, 8, 1920, 128, 16, 3, 128, 16, 3},
200 {24000000, 16000, 2, 8, 1920, 128, 24, 2, 128, 24, 2}, 203 {24000000, 16000, 2, 8, 1920, 128, 24, 2, 128, 24, 2},
201 {25000000, 16000, 2, 7, 8643, 128, 24, 2, 128, 24, 2}, 204 {25000000, 16000, 2, 7, 8643, 128, 24, 2, 128, 24, 2},
202 /* 22.05k rate */ 205 /* 22.05k rate */
203 {12000000, 22050, 1, 7, 5264, 128, 16, 2, 128, 16, 2}, 206 {12000000, 22050, 1, 7, 5264, 128, 16, 2, 128, 16, 2},
207 {12000000, 22050, 1, 8, 4672, 128, 12, 3, 128, 12, 3},
204 {24000000, 22050, 2, 7, 5264, 128, 16, 2, 128, 16, 2}, 208 {24000000, 22050, 2, 7, 5264, 128, 16, 2, 128, 16, 2},
205 {25000000, 22050, 2, 7, 2253, 128, 16, 2, 128, 16, 2}, 209 {25000000, 22050, 2, 7, 2253, 128, 16, 2, 128, 16, 2},
206 /* 32k rate */ 210 /* 32k rate */
207 {12000000, 32000, 1, 8, 1920, 128, 12, 2, 128, 12, 2}, 211 {12000000, 32000, 1, 8, 1920, 128, 12, 2, 128, 12, 2},
212 {12000000, 32000, 1, 8, 1920, 128, 8, 3, 128, 8, 3},
208 {24000000, 32000, 2, 8, 1920, 128, 12, 2, 128, 12, 2}, 213 {24000000, 32000, 2, 8, 1920, 128, 12, 2, 128, 12, 2},
209 {25000000, 32000, 2, 7, 8643, 128, 12, 2, 128, 12, 2}, 214 {25000000, 32000, 2, 7, 8643, 128, 12, 2, 128, 12, 2},
210 /* 44.1k rate */ 215 /* 44.1k rate */
211 {12000000, 44100, 1, 7, 5264, 128, 8, 2, 128, 8, 2}, 216 {12000000, 44100, 1, 7, 5264, 128, 8, 2, 128, 8, 2},
217 {12000000, 44100, 1, 8, 4672, 128, 6, 3, 128, 6, 3},
212 {24000000, 44100, 2, 7, 5264, 128, 8, 2, 128, 8, 2}, 218 {24000000, 44100, 2, 7, 5264, 128, 8, 2, 128, 8, 2},
213 {25000000, 44100, 2, 7, 2253, 128, 8, 2, 128, 8, 2}, 219 {25000000, 44100, 2, 7, 2253, 128, 8, 2, 128, 8, 2},
214 /* 48k rate */ 220 /* 48k rate */
215 {12000000, 48000, 1, 8, 1920, 128, 8, 2, 128, 8, 2}, 221 {12000000, 48000, 1, 8, 1920, 128, 8, 2, 128, 8, 2},
222 {12000000, 48000, 1, 7, 6800, 96, 5, 4, 96, 5, 4},
216 {24000000, 48000, 2, 8, 1920, 128, 8, 2, 128, 8, 2}, 223 {24000000, 48000, 2, 8, 1920, 128, 8, 2, 128, 8, 2},
217 {25000000, 48000, 2, 7, 8643, 128, 8, 2, 128, 8, 2}, 224 {25000000, 48000, 2, 7, 8643, 128, 8, 2, 128, 8, 2},
218 /* 88.2k rate */ 225 /* 88.2k rate */
219 {12000000, 88200, 1, 7, 5264, 64, 8, 2, 64, 8, 2}, 226 {12000000, 88200, 1, 7, 5264, 64, 8, 2, 64, 8, 2},
227 {12000000, 88200, 1, 8, 4672, 64, 6, 3, 64, 6, 3},
220 {24000000, 88200, 2, 7, 5264, 64, 8, 2, 64, 8, 2}, 228 {24000000, 88200, 2, 7, 5264, 64, 8, 2, 64, 8, 2},
221 {25000000, 88200, 2, 7, 2253, 64, 8, 2, 64, 8, 2}, 229 {25000000, 88200, 2, 7, 2253, 64, 8, 2, 64, 8, 2},
222 /* 96k rate */ 230 /* 96k rate */
223 {12000000, 96000, 1, 8, 1920, 64, 8, 2, 64, 8, 2}, 231 {12000000, 96000, 1, 8, 1920, 64, 8, 2, 64, 8, 2},
232 {12000000, 96000, 1, 7, 6800, 48, 5, 4, 48, 5, 4},
224 {24000000, 96000, 2, 8, 1920, 64, 8, 2, 64, 8, 2}, 233 {24000000, 96000, 2, 8, 1920, 64, 8, 2, 64, 8, 2},
225 {25000000, 96000, 2, 7, 8643, 64, 8, 2, 64, 8, 2}, 234 {25000000, 96000, 2, 7, 8643, 64, 8, 2, 64, 8, 2},
226 /* 176.4k rate */ 235 /* 176.4k rate */
227 {12000000, 176400, 1, 7, 5264, 32, 8, 2, 32, 8, 2}, 236 {12000000, 176400, 1, 7, 5264, 32, 8, 2, 32, 8, 2},
237 {12000000, 176400, 1, 8, 4672, 32, 6, 3, 32, 6, 3},
228 {24000000, 176400, 2, 7, 5264, 32, 8, 2, 32, 8, 2}, 238 {24000000, 176400, 2, 7, 5264, 32, 8, 2, 32, 8, 2},
229 {25000000, 176400, 2, 7, 2253, 32, 8, 2, 32, 8, 2}, 239 {25000000, 176400, 2, 7, 2253, 32, 8, 2, 32, 8, 2},
230 /* 192k rate */ 240 /* 192k rate */
231 {12000000, 192000, 1, 8, 1920, 32, 8, 2, 32, 8, 2}, 241 {12000000, 192000, 1, 8, 1920, 32, 8, 2, 32, 8, 2},
242 {12000000, 192000, 1, 7, 6800, 24, 5, 4, 24, 5, 4},
232 {24000000, 192000, 2, 8, 1920, 32, 8, 2, 32, 8, 2}, 243 {24000000, 192000, 2, 8, 1920, 32, 8, 2, 32, 8, 2},
233 {25000000, 192000, 2, 7, 8643, 32, 8, 2, 32, 8, 2}, 244 {25000000, 192000, 2, 7, 8643, 32, 8, 2, 32, 8, 2},
234}; 245};
@@ -680,7 +691,9 @@ static int aic31xx_setup_pll(struct snd_soc_codec *codec,
680 struct snd_pcm_hw_params *params) 691 struct snd_pcm_hw_params *params)
681{ 692{
682 struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec); 693 struct aic31xx_priv *aic31xx = snd_soc_codec_get_drvdata(codec);
694 int bclk_score = snd_soc_params_to_frame_size(params);
683 int bclk_n = 0; 695 int bclk_n = 0;
696 int match = -1;
684 int i; 697 int i;
685 698
686 /* Use PLL as CODEC_CLKIN and DAC_CLK as BDIV_CLKIN */ 699 /* Use PLL as CODEC_CLKIN and DAC_CLK as BDIV_CLKIN */
@@ -691,15 +704,37 @@ static int aic31xx_setup_pll(struct snd_soc_codec *codec,
691 704
692 for (i = 0; i < ARRAY_SIZE(aic31xx_divs); i++) { 705 for (i = 0; i < ARRAY_SIZE(aic31xx_divs); i++) {
693 if (aic31xx_divs[i].rate == params_rate(params) && 706 if (aic31xx_divs[i].rate == params_rate(params) &&
694 aic31xx_divs[i].mclk == aic31xx->sysclk) 707 aic31xx_divs[i].mclk == aic31xx->sysclk) {
695 break; 708 int s = (aic31xx_divs[i].dosr * aic31xx_divs[i].mdac) %
709 snd_soc_params_to_frame_size(params);
710 int bn = (aic31xx_divs[i].dosr * aic31xx_divs[i].mdac) /
711 snd_soc_params_to_frame_size(params);
712 if (s < bclk_score && bn > 0) {
713 match = i;
714 bclk_n = bn;
715 bclk_score = s;
716 }
717 }
696 } 718 }
697 719
698 if (i == ARRAY_SIZE(aic31xx_divs)) { 720 if (match == -1) {
699 dev_err(codec->dev, "%s: Sampling rate %u not supported\n", 721 dev_err(codec->dev,
722 "%s: Sample rate (%u) and format not supported\n",
700 __func__, params_rate(params)); 723 __func__, params_rate(params));
724 /* See bellow for details how fix this. */
701 return -EINVAL; 725 return -EINVAL;
702 } 726 }
727 if (bclk_score != 0) {
728 dev_warn(codec->dev, "Can not produce exact bitclock");
729 /* This is fine if using dsp format, but if using i2s
730 there may be trouble. To fix the issue edit the
731 aic31xx_divs table for your mclk and sample
732 rate. Details can be found from:
733 http://www.ti.com/lit/ds/symlink/tlv320aic3100.pdf
734 Section: 5.6 CLOCK Generation and PLL
735 */
736 }
737 i = match;
703 738
704 /* PLL configuration */ 739 /* PLL configuration */
705 snd_soc_update_bits(codec, AIC31XX_PLLPR, AIC31XX_PLL_MASK, 740 snd_soc_update_bits(codec, AIC31XX_PLLPR, AIC31XX_PLL_MASK,
@@ -729,14 +764,6 @@ static int aic31xx_setup_pll(struct snd_soc_codec *codec,
729 snd_soc_write(codec, AIC31XX_AOSR, aic31xx_divs[i].aosr); 764 snd_soc_write(codec, AIC31XX_AOSR, aic31xx_divs[i].aosr);
730 765
731 /* Bit clock divider configuration. */ 766 /* Bit clock divider configuration. */
732 bclk_n = (aic31xx_divs[i].dosr * aic31xx_divs[i].mdac)
733 / snd_soc_params_to_frame_size(params);
734 if (bclk_n == 0) {
735 dev_err(codec->dev, "%s: Not enough BLCK bandwidth\n",
736 __func__);
737 return -EINVAL;
738 }
739
740 snd_soc_update_bits(codec, AIC31XX_BCLKN, 767 snd_soc_update_bits(codec, AIC31XX_BCLKN,
741 AIC31XX_PLL_MASK, bclk_n); 768 AIC31XX_PLL_MASK, bclk_n);
742 769