diff options
author | Thomas Weber <weber@corscience.de> | 2010-09-23 05:46:50 -0400 |
---|---|---|
committer | Jiri Kosina <jkosina@suse.cz> | 2010-09-23 05:46:50 -0400 |
commit | b42e17963c20ecb80905083ceaecc79fd9bd30f1 (patch) | |
tree | b71e8b1caff79d7c0a628ec827d63d745aef6782 /sound | |
parent | 0b1974de66f9ed44f1423449628f4926bf95b854 (diff) |
Fix typo configue => configure in comments
Signed-off-by: Thomas Weber <weber@corscience.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/soc/s3c24xx/neo1973_gta02_wm8753.c | 2 | ||||
-rw-r--r-- | sound/soc/s3c24xx/neo1973_wm8753.c | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/sound/soc/s3c24xx/neo1973_gta02_wm8753.c b/sound/soc/s3c24xx/neo1973_gta02_wm8753.c index 209c25994c7e..4719558289d4 100644 --- a/sound/soc/s3c24xx/neo1973_gta02_wm8753.c +++ b/sound/soc/s3c24xx/neo1973_gta02_wm8753.c | |||
@@ -182,7 +182,7 @@ static int neo1973_gta02_voice_hw_params( | |||
182 | if (ret < 0) | 182 | if (ret < 0) |
183 | return ret; | 183 | return ret; |
184 | 184 | ||
185 | /* configue and enable PLL for 12.288MHz output */ | 185 | /* configure and enable PLL for 12.288MHz output */ |
186 | ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0, | 186 | ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0, |
187 | iis_clkrate / 4, 12288000); | 187 | iis_clkrate / 4, 12288000); |
188 | if (ret < 0) | 188 | if (ret < 0) |
diff --git a/sound/soc/s3c24xx/neo1973_wm8753.c b/sound/soc/s3c24xx/neo1973_wm8753.c index 0cb4f86f6d1e..4ac620988e7c 100644 --- a/sound/soc/s3c24xx/neo1973_wm8753.c +++ b/sound/soc/s3c24xx/neo1973_wm8753.c | |||
@@ -201,7 +201,7 @@ static int neo1973_voice_hw_params(struct snd_pcm_substream *substream, | |||
201 | if (ret < 0) | 201 | if (ret < 0) |
202 | return ret; | 202 | return ret; |
203 | 203 | ||
204 | /* configue and enable PLL for 12.288MHz output */ | 204 | /* configure and enable PLL for 12.288MHz output */ |
205 | ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0, | 205 | ret = snd_soc_dai_set_pll(codec_dai, WM8753_PLL2, 0, |
206 | iis_clkrate / 4, 12288000); | 206 | iis_clkrate / 4, 12288000); |
207 | if (ret < 0) | 207 | if (ret < 0) |