diff options
author | Takashi Iwai <tiwai@suse.de> | 2008-07-30 09:13:28 -0400 |
---|---|---|
committer | Jaroslav Kysela <perex@perex.cz> | 2008-08-25 03:55:50 -0400 |
commit | 955d24881e13a08b9f523f36ae61a58245b8968e (patch) | |
tree | f33249b84f2c3b87c0cbd5930c80cb75da281083 /sound | |
parent | f329bdd439aa24d03dca75cdb3027372ddf691b0 (diff) |
ALSA: hda - Add definitions of HDMI-related verbs
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Jaroslav Kysela <perex@perex.cz>
Diffstat (limited to 'sound')
-rw-r--r-- | sound/pci/hda/hda_codec.h | 82 |
1 files changed, 78 insertions, 4 deletions
diff --git a/sound/pci/hda/hda_codec.h b/sound/pci/hda/hda_codec.h index aeee58161537..780e2fffae3a 100644 --- a/sound/pci/hda/hda_codec.h +++ b/sound/pci/hda/hda_codec.h | |||
@@ -90,6 +90,14 @@ enum { | |||
90 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c | 90 | #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c |
91 | /* f20: AFG/MFG */ | 91 | /* f20: AFG/MFG */ |
92 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 | 92 | #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20 |
93 | #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d | ||
94 | #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e | ||
95 | #define AC_VERB_GET_HDMI_ELDD 0x0f2f | ||
96 | #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30 | ||
97 | #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31 | ||
98 | #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32 | ||
99 | #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33 | ||
100 | #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34 | ||
93 | 101 | ||
94 | /* | 102 | /* |
95 | * SET verbs | 103 | * SET verbs |
@@ -123,6 +131,12 @@ enum { | |||
123 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f | 131 | #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f |
124 | #define AC_VERB_SET_EAPD 0x788 | 132 | #define AC_VERB_SET_EAPD 0x788 |
125 | #define AC_VERB_SET_CODEC_RESET 0x7ff | 133 | #define AC_VERB_SET_CODEC_RESET 0x7ff |
134 | #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d | ||
135 | #define AC_VERB_SET_HDMI_DIP_INDEX 0x730 | ||
136 | #define AC_VERB_SET_HDMI_DIP_DATA 0x731 | ||
137 | #define AC_VERB_SET_HDMI_DIP_XMIT 0x732 | ||
138 | #define AC_VERB_SET_HDMI_CP_CTRL 0x733 | ||
139 | #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734 | ||
126 | 140 | ||
127 | /* | 141 | /* |
128 | * Parameter IDs | 142 | * Parameter IDs |
@@ -144,6 +158,7 @@ enum { | |||
144 | #define AC_PAR_GPIO_CAP 0x11 | 158 | #define AC_PAR_GPIO_CAP 0x11 |
145 | #define AC_PAR_AMP_OUT_CAP 0x12 | 159 | #define AC_PAR_AMP_OUT_CAP 0x12 |
146 | #define AC_PAR_VOL_KNB_CAP 0x13 | 160 | #define AC_PAR_VOL_KNB_CAP 0x13 |
161 | #define AC_PAR_HDMI_LPCM_CAP 0x20 | ||
147 | 162 | ||
148 | /* | 163 | /* |
149 | * AC_VERB_PARAMETERS results (32bit) | 164 | * AC_VERB_PARAMETERS results (32bit) |
@@ -172,6 +187,8 @@ enum { | |||
172 | #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ | 187 | #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */ |
173 | #define AC_WCAP_POWER (1<<10) /* power control */ | 188 | #define AC_WCAP_POWER (1<<10) /* power control */ |
174 | #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ | 189 | #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */ |
190 | #define AC_WCAP_CP_CAPS (1<<12) /* content protection */ | ||
191 | #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */ | ||
175 | #define AC_WCAP_DELAY (0xf<<16) | 192 | #define AC_WCAP_DELAY (0xf<<16) |
176 | #define AC_WCAP_DELAY_SHIFT 16 | 193 | #define AC_WCAP_DELAY_SHIFT 16 |
177 | #define AC_WCAP_TYPE (0xf<<20) | 194 | #define AC_WCAP_TYPE (0xf<<20) |
@@ -207,9 +224,20 @@ enum { | |||
207 | /* Input converter SDI select */ | 224 | /* Input converter SDI select */ |
208 | #define AC_SDI_SELECT (0xf<<0) | 225 | #define AC_SDI_SELECT (0xf<<0) |
209 | 226 | ||
210 | /* Unsolicited response */ | 227 | /* Unsolicited response control */ |
211 | #define AC_UNSOL_TAG (0x3f<<0) | 228 | #define AC_UNSOL_TAG (0x3f<<0) |
212 | #define AC_UNSOL_ENABLED (1<<7) | 229 | #define AC_UNSOL_ENABLED (1<<7) |
230 | #define AC_USRSP_EN AC_UNSOL_ENABLED | ||
231 | |||
232 | /* Unsolicited responses */ | ||
233 | #define AC_UNSOL_RES_TAG (0x3f<<26) | ||
234 | #define AC_UNSOL_RES_TAG_SHIFT 26 | ||
235 | #define AC_UNSOL_RES_SUBTAG (0x1f<<21) | ||
236 | #define AC_UNSOL_RES_SUBTAG_SHIFT 21 | ||
237 | #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */ | ||
238 | #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */ | ||
239 | #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */ | ||
240 | #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */ | ||
213 | 241 | ||
214 | /* Pin widget capabilies */ | 242 | /* Pin widget capabilies */ |
215 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ | 243 | #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */ |
@@ -223,6 +251,10 @@ enum { | |||
223 | * but is marked reserved in the Intel HDA specification. | 251 | * but is marked reserved in the Intel HDA specification. |
224 | */ | 252 | */ |
225 | #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ | 253 | #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */ |
254 | /* Note: The same bit as LR_SWAP is newly defined as HDMI capability | ||
255 | * in HD-audio specification | ||
256 | */ | ||
257 | #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */ | ||
226 | #define AC_PINCAP_VREF (0x37<<8) | 258 | #define AC_PINCAP_VREF (0x37<<8) |
227 | #define AC_PINCAP_VREF_SHIFT 8 | 259 | #define AC_PINCAP_VREF_SHIFT 8 |
228 | #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ | 260 | #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */ |
@@ -273,6 +305,22 @@ enum { | |||
273 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0) | 305 | #define AC_KNBCAP_NUM_STEPS (0x7f<<0) |
274 | #define AC_KNBCAP_DELTA (1<<7) | 306 | #define AC_KNBCAP_DELTA (1<<7) |
275 | 307 | ||
308 | /* HDMI LPCM capabilities */ | ||
309 | #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */ | ||
310 | #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */ | ||
311 | #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */ | ||
312 | #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */ | ||
313 | #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */ | ||
314 | #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */ | ||
315 | #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */ | ||
316 | #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */ | ||
317 | #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */ | ||
318 | #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */ | ||
319 | #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */ | ||
320 | #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */ | ||
321 | #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */ | ||
322 | #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */ | ||
323 | |||
276 | /* | 324 | /* |
277 | * Control Parameters | 325 | * Control Parameters |
278 | */ | 326 | */ |
@@ -318,18 +366,44 @@ enum { | |||
318 | #define AC_PINCTL_OUT_EN (1<<6) | 366 | #define AC_PINCTL_OUT_EN (1<<6) |
319 | #define AC_PINCTL_HP_EN (1<<7) | 367 | #define AC_PINCTL_HP_EN (1<<7) |
320 | 368 | ||
321 | /* Unsolicited response - 8bit */ | ||
322 | #define AC_USRSP_EN (1<<7) | ||
323 | |||
324 | /* Pin sense - 32bit */ | 369 | /* Pin sense - 32bit */ |
325 | #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) | 370 | #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff) |
326 | #define AC_PINSENSE_PRESENCE (1<<31) | 371 | #define AC_PINSENSE_PRESENCE (1<<31) |
372 | #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */ | ||
327 | 373 | ||
328 | /* EAPD/BTL enable - 32bit */ | 374 | /* EAPD/BTL enable - 32bit */ |
329 | #define AC_EAPDBTL_BALANCED (1<<0) | 375 | #define AC_EAPDBTL_BALANCED (1<<0) |
330 | #define AC_EAPDBTL_EAPD (1<<1) | 376 | #define AC_EAPDBTL_EAPD (1<<1) |
331 | #define AC_EAPDBTL_LR_SWAP (1<<2) | 377 | #define AC_EAPDBTL_LR_SWAP (1<<2) |
332 | 378 | ||
379 | /* HDMI ELD data */ | ||
380 | #define AC_ELDD_ELD_VALID (1<<31) | ||
381 | #define AC_ELDD_ELD_DATA 0xff | ||
382 | |||
383 | /* HDMI DIP size */ | ||
384 | #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */ | ||
385 | #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */ | ||
386 | |||
387 | /* HDMI DIP index */ | ||
388 | #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */ | ||
389 | #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */ | ||
390 | |||
391 | /* HDMI DIP xmit (transmit) control */ | ||
392 | #define AC_DIPXMIT_MASK (0x3<<6) | ||
393 | #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */ | ||
394 | #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */ | ||
395 | #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */ | ||
396 | |||
397 | /* HDMI content protection (CP) control */ | ||
398 | #define AC_CPCTRL_CES (1<<9) /* current encryption state */ | ||
399 | #define AC_CPCTRL_READY (1<<8) /* ready bit */ | ||
400 | #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */ | ||
401 | #define AC_CPCTRL_STATE (3<<0) /* current CP request state */ | ||
402 | |||
403 | /* Converter channel <-> HDMI slot mapping */ | ||
404 | #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */ | ||
405 | #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */ | ||
406 | |||
333 | /* configuration default - 32bit */ | 407 | /* configuration default - 32bit */ |
334 | #define AC_DEFCFG_SEQUENCE (0xf<<0) | 408 | #define AC_DEFCFG_SEQUENCE (0xf<<0) |
335 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4) | 409 | #define AC_DEFCFG_DEF_ASSOC (0xf<<4) |