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authorKrzysztof Helt <krzysztof.h1@wp.pl>2006-08-21 13:29:18 -0400
committerJaroslav Kysela <perex@suse.cz>2006-09-23 04:42:24 -0400
commitd1fdf07e22efdb9fa53739c0f0fec1f6b24c2056 (patch)
treecb83b26fd0e84741e80a0a053374fe2fff8e995c /sound/sparc
parent470f1f1a1c2597fab98339ab0966dbf602d604f0 (diff)
[ALSA] sparc dbri: fixed setting of burst size after reset
A proper way to set DBRI's burst size. The size must be set after each chip reset. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/sparc')
-rw-r--r--sound/sparc/dbri.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/sound/sparc/dbri.c b/sound/sparc/dbri.c
index 6fc37c9cb4fc..810f8b99a60e 100644
--- a/sound/sparc/dbri.c
+++ b/sound/sparc/dbri.c
@@ -690,6 +690,7 @@ static void dbri_cmdsend(struct snd_dbri * dbri, volatile s32 * cmd)
690static void dbri_reset(struct snd_dbri * dbri) 690static void dbri_reset(struct snd_dbri * dbri)
691{ 691{
692 int i; 692 int i;
693 u32 tmp;
693 694
694 dprintk(D_GEN, "reset 0:%x 2:%x 8:%x 9:%x\n", 695 dprintk(D_GEN, "reset 0:%x 2:%x 8:%x 9:%x\n",
695 sbus_readl(dbri->regs + REG0), 696 sbus_readl(dbri->regs + REG0),
@@ -699,13 +700,20 @@ static void dbri_reset(struct snd_dbri * dbri)
699 sbus_writel(D_R, dbri->regs + REG0); /* Soft Reset */ 700 sbus_writel(D_R, dbri->regs + REG0); /* Soft Reset */
700 for (i = 0; (sbus_readl(dbri->regs + REG0) & D_R) && i < 64; i++) 701 for (i = 0; (sbus_readl(dbri->regs + REG0) & D_R) && i < 64; i++)
701 udelay(10); 702 udelay(10);
703
704 /* A brute approach - DBRI falls back to working burst size by itself
705 * On SS20 D_S does not work, so do not try so high. */
706 tmp = sbus_readl(dbri->regs + REG0);
707 tmp |= D_G | D_E;
708 tmp &= ~D_S;
709 sbus_writel(tmp, dbri->regs + REG0);
702} 710}
703 711
704/* Lock must not be held before calling this */ 712/* Lock must not be held before calling this */
705static void dbri_initialize(struct snd_dbri * dbri) 713static void dbri_initialize(struct snd_dbri * dbri)
706{ 714{
707 volatile s32 *cmd; 715 volatile s32 *cmd;
708 u32 dma_addr, tmp; 716 u32 dma_addr;
709 unsigned long flags; 717 unsigned long flags;
710 int n; 718 int n;
711 719
@@ -721,13 +729,6 @@ static void dbri_initialize(struct snd_dbri * dbri)
721 for (n = 0; n < DBRI_NO_PIPES; n++) 729 for (n = 0; n < DBRI_NO_PIPES; n++)
722 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1; 730 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1;
723 731
724 /* A brute approach - DBRI falls back to working burst size by itself
725 * On SS20 D_S does not work, so do not try so high. */
726 tmp = sbus_readl(dbri->regs + REG0);
727 tmp |= D_G | D_E;
728 tmp &= ~D_S;
729 sbus_writel(tmp, dbri->regs + REG0);
730
731 /* 732 /*
732 * Initialize the interrupt ringbuffer. 733 * Initialize the interrupt ringbuffer.
733 */ 734 */