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authorKrzysztof Helt <krzysztof.h1@wp.pl>2006-08-16 06:54:29 -0400
committerJaroslav Kysela <perex@suse.cz>2006-09-23 04:40:56 -0400
commit6fb982803522bc86ca61774c6edf317f77165453 (patch)
tree8603d66246dc7bae650febd87a1c6c0b164c75f5 /sound/sparc
parent42fe7647911d0bcaf81aac46db73a3b24387df6d (diff)
[ALSA] sparc dbri removal of DBRI_NO_INTS
This patch removes define DBR_NO_INTS and all code related to handling more than one dbri irq statuses block. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/sparc')
-rw-r--r--sound/sparc/dbri.c31
1 files changed, 8 insertions, 23 deletions
diff --git a/sound/sparc/dbri.c b/sound/sparc/dbri.c
index 652f433a3f0d..4651ff513513 100644
--- a/sound/sparc/dbri.c
+++ b/sound/sparc/dbri.c
@@ -238,12 +238,6 @@ static struct {
238#define REG9 0x24UL /* Interrupt Queue Pointer */ 238#define REG9 0x24UL /* Interrupt Queue Pointer */
239 239
240#define DBRI_NO_CMDS 64 240#define DBRI_NO_CMDS 64
241#define DBRI_NO_INTS 1 /* Note: the value of this define was
242 * originally 2. The ringbuffer to store
243 * interrupts in dma is currently broken.
244 * This is a temporary fix until the ringbuffer
245 * is fixed.
246 */
247#define DBRI_INT_BLK 64 241#define DBRI_INT_BLK 64
248#define DBRI_NO_DESCS 64 242#define DBRI_NO_DESCS 64
249#define DBRI_NO_PIPES 32 243#define DBRI_NO_PIPES 32
@@ -268,7 +262,7 @@ struct dbri_mem {
268 */ 262 */
269struct dbri_dma { 263struct dbri_dma {
270 volatile s32 cmd[DBRI_NO_CMDS]; /* Place for commands */ 264 volatile s32 cmd[DBRI_NO_CMDS]; /* Place for commands */
271 volatile s32 intr[DBRI_NO_INTS * DBRI_INT_BLK]; /* Interrupt field */ 265 volatile s32 intr[DBRI_INT_BLK]; /* Interrupt field */
272 struct dbri_mem desc[DBRI_NO_DESCS]; /* Xmit/receive descriptors */ 266 struct dbri_mem desc[DBRI_NO_DESCS]; /* Xmit/receive descriptors */
273}; 267};
274 268
@@ -741,18 +735,6 @@ static void dbri_initialize(struct snd_dbri * dbri)
741 dprintk(D_GEN, "init: cmd: %p, int: %p\n", 735 dprintk(D_GEN, "init: cmd: %p, int: %p\n",
742 &dbri->dma->cmd[0], &dbri->dma->intr[0]); 736 &dbri->dma->cmd[0], &dbri->dma->intr[0]);
743 737
744 /*
745 * Initialize the interrupt ringbuffer.
746 */
747 for (n = 0; n < DBRI_NO_INTS - 1; n++) {
748 dma_addr = dbri->dma_dvma;
749 dma_addr += dbri_dma_off(intr, ((n + 1) * DBRI_INT_BLK));
750 dbri->dma->intr[n * DBRI_INT_BLK] = dma_addr;
751 }
752 dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0);
753 dbri->dma->intr[n * DBRI_INT_BLK] = dma_addr;
754 dbri->dbri_irqp = 1;
755
756 /* Initialize pipes */ 738 /* Initialize pipes */
757 for (n = 0; n < DBRI_NO_PIPES; n++) 739 for (n = 0; n < DBRI_NO_PIPES; n++)
758 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1; 740 dbri->pipes[n].desc = dbri->pipes[n].first_desc = -1;
@@ -765,9 +747,14 @@ static void dbri_initialize(struct snd_dbri * dbri)
765 sbus_writel(tmp, dbri->regs + REG0); 747 sbus_writel(tmp, dbri->regs + REG0);
766 748
767 /* 749 /*
768 * Set up the interrupt queue 750 * Initialize the interrupt ringbuffer.
769 */ 751 */
770 dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0); 752 dma_addr = dbri->dma_dvma + dbri_dma_off(intr, 0);
753 dbri->dma->intr[0] = dma_addr;
754 dbri->dbri_irqp = 1;
755 /*
756 * Set up the interrupt queue
757 */
771 *(cmd++) = DBRI_CMD(D_IIQ, 0, 0); 758 *(cmd++) = DBRI_CMD(D_IIQ, 0, 0);
772 *(cmd++) = dma_addr; 759 *(cmd++) = dma_addr;
773 760
@@ -1951,10 +1938,8 @@ static void dbri_process_interrupt_buffer(struct snd_dbri * dbri)
1951 while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) { 1938 while ((x = dbri->dma->intr[dbri->dbri_irqp]) != 0) {
1952 dbri->dma->intr[dbri->dbri_irqp] = 0; 1939 dbri->dma->intr[dbri->dbri_irqp] = 0;
1953 dbri->dbri_irqp++; 1940 dbri->dbri_irqp++;
1954 if (dbri->dbri_irqp == (DBRI_NO_INTS * DBRI_INT_BLK)) 1941 if (dbri->dbri_irqp == DBRI_INT_BLK)
1955 dbri->dbri_irqp = 1; 1942 dbri->dbri_irqp = 1;
1956 else if ((dbri->dbri_irqp & (DBRI_INT_BLK - 1)) == 0)
1957 dbri->dbri_irqp++;
1958 1943
1959 dbri_process_one_interrupt(dbri, x); 1944 dbri_process_one_interrupt(dbri, x);
1960 } 1945 }