diff options
author | Ben Gardiner <bengardiner@nanometrics.ca> | 2011-04-21 14:19:04 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-26 06:43:53 -0400 |
commit | db92f43745dc07acd05ca64a06075801c042cb57 (patch) | |
tree | 8c0cb8a91b69b8ace71b4d98476ef6c9497fe6a4 /sound/soc | |
parent | a90f549e25fa77544aaff18bdf534912f3090d39 (diff) |
davinci-mcasp: fix _CBM_CFS pin directions
The current davinci_mcasp_set_dai_fmt() sets bits ACLKX and ACLKR in the PDIR
register for the codec clock-master/frame-slave mode; however, this results in
the ACLKX and ACLKR pins being outputs according to SPRUFM1 [1] which
conflicts with "codec is clock master."
Similarly to the previous patch in this series, "fix _CBM_CFS hw_params" --
For codec clock-master/frame-slave mode (_CMB_CFS), clear bits ACLKX and ACLKR
in the PDIR register to set the pins as inputs and hence allow externally
sourced bit-clocks.
[1] http://www.ti.com/litv/pdf/sprufm1
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: James Nuss <jamesnuss@nanometrics.ca>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/davinci/davinci-mcasp.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c index 09c4ff9b9ac8..4ddc6d3b6678 100644 --- a/sound/soc/davinci/davinci-mcasp.c +++ b/sound/soc/davinci/davinci-mcasp.c | |||
@@ -445,8 +445,10 @@ static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
445 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); | 445 | mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); |
446 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); | 446 | mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); |
447 | 447 | ||
448 | mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, | ||
449 | ACLKX | ACLKR); | ||
448 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, | 450 | mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, |
449 | ACLKX | AFSX | ACLKR | AFSR); | 451 | AFSX | AFSR); |
450 | break; | 452 | break; |
451 | case SND_SOC_DAIFMT_CBM_CFM: | 453 | case SND_SOC_DAIFMT_CBM_CFM: |
452 | /* codec is clock and frame master */ | 454 | /* codec is clock and frame master */ |