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authorMark Brown <broonie@linaro.org>2013-11-22 08:28:55 -0500
committerMark Brown <broonie@linaro.org>2013-11-24 08:53:26 -0500
commita86652e51a8776bc0fe811e32ec3118f03c7e3bb (patch)
tree48b1413d69e4fcc63d1d7489c3b568b244f15766 /sound/soc
parent898249958281ebf52288eb0d3ed6797e1fc4b0bd (diff)
ASoC: wm8991: Convert to direct regmap API usage
Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc')
-rw-r--r--sound/soc/codecs/wm8991.c166
1 files changed, 94 insertions, 72 deletions
diff --git a/sound/soc/codecs/wm8991.c b/sound/soc/codecs/wm8991.c
index 86aa33fd11de..7006f9732af6 100644
--- a/sound/soc/codecs/wm8991.c
+++ b/sound/soc/codecs/wm8991.c
@@ -18,6 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/pm.h> 19#include <linux/pm.h>
20#include <linux/i2c.h> 20#include <linux/i2c.h>
21#include <linux/regmap.h>
21#include <linux/slab.h> 22#include <linux/slab.h>
22#include <sound/core.h> 23#include <sound/core.h>
23#include <sound/pcm.h> 24#include <sound/pcm.h>
@@ -31,76 +32,85 @@
31#include "wm8991.h" 32#include "wm8991.h"
32 33
33struct wm8991_priv { 34struct wm8991_priv {
34 enum snd_soc_control_type control_type; 35 struct regmap *regmap;
35 unsigned int pcmclk; 36 unsigned int pcmclk;
36}; 37};
37 38
38static const u16 wm8991_reg_defs[] = { 39static const struct reg_default wm8991_reg_defaults[] = {
39 0x8991, /* R0 - Reset */ 40 { 1, 0x0000 }, /* R1 - Power Management (1) */
40 0x0000, /* R1 - Power Management (1) */ 41 { 2, 0x6000 }, /* R2 - Power Management (2) */
41 0x6000, /* R2 - Power Management (2) */ 42 { 3, 0x0000 }, /* R3 - Power Management (3) */
42 0x0000, /* R3 - Power Management (3) */ 43 { 4, 0x4050 }, /* R4 - Audio Interface (1) */
43 0x4050, /* R4 - Audio Interface (1) */ 44 { 5, 0x4000 }, /* R5 - Audio Interface (2) */
44 0x4000, /* R5 - Audio Interface (2) */ 45 { 6, 0x01C8 }, /* R6 - Clocking (1) */
45 0x01C8, /* R6 - Clocking (1) */ 46 { 7, 0x0000 }, /* R7 - Clocking (2) */
46 0x0000, /* R7 - Clocking (2) */ 47 { 8, 0x0040 }, /* R8 - Audio Interface (3) */
47 0x0040, /* R8 - Audio Interface (3) */ 48 { 9, 0x0040 }, /* R9 - Audio Interface (4) */
48 0x0040, /* R9 - Audio Interface (4) */ 49 { 10, 0x0004 }, /* R10 - DAC CTRL */
49 0x0004, /* R10 - DAC CTRL */ 50 { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */
50 0x00C0, /* R11 - Left DAC Digital Volume */ 51 { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */
51 0x00C0, /* R12 - Right DAC Digital Volume */ 52 { 13, 0x0000 }, /* R13 - Digital Side Tone */
52 0x0000, /* R13 - Digital Side Tone */ 53 { 14, 0x0100 }, /* R14 - ADC CTRL */
53 0x0100, /* R14 - ADC CTRL */ 54 { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */
54 0x00C0, /* R15 - Left ADC Digital Volume */ 55 { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */
55 0x00C0, /* R16 - Right ADC Digital Volume */ 56
56 0x0000, /* R17 */ 57 { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */
57 0x0000, /* R18 - GPIO CTRL 1 */ 58 { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */
58 0x1000, /* R19 - GPIO1 & GPIO2 */ 59 { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */
59 0x1010, /* R20 - GPIO3 & GPIO4 */ 60 { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */
60 0x1010, /* R21 - GPIO5 & GPIO6 */ 61 { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */
61 0x8000, /* R22 - GPIOCTRL 2 */ 62 { 23, 0x0800 }, /* R23 - GPIO_POL */
62 0x0800, /* R23 - GPIO_POL */ 63 { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */
63 0x008B, /* R24 - Left Line Input 1&2 Volume */ 64 { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */
64 0x008B, /* R25 - Left Line Input 3&4 Volume */ 65 { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */
65 0x008B, /* R26 - Right Line Input 1&2 Volume */ 66 { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */
66 0x008B, /* R27 - Right Line Input 3&4 Volume */ 67 { 28, 0x0000 }, /* R28 - Left Output Volume */
67 0x0000, /* R28 - Left Output Volume */ 68 { 29, 0x0000 }, /* R29 - Right Output Volume */
68 0x0000, /* R29 - Right Output Volume */ 69 { 30, 0x0066 }, /* R30 - Line Outputs Volume */
69 0x0066, /* R30 - Line Outputs Volume */ 70 { 31, 0x0022 }, /* R31 - Out3/4 Volume */
70 0x0022, /* R31 - Out3/4 Volume */ 71 { 32, 0x0079 }, /* R32 - Left OPGA Volume */
71 0x0079, /* R32 - Left OPGA Volume */ 72 { 33, 0x0079 }, /* R33 - Right OPGA Volume */
72 0x0079, /* R33 - Right OPGA Volume */ 73 { 34, 0x0003 }, /* R34 - Speaker Volume */
73 0x0003, /* R34 - Speaker Volume */ 74 { 35, 0x0003 }, /* R35 - ClassD1 */
74 0x0003, /* R35 - ClassD1 */ 75
75 0x0000, /* R36 */ 76 { 37, 0x0100 }, /* R37 - ClassD3 */
76 0x0100, /* R37 - ClassD3 */ 77
77 0x0000, /* R38 */ 78 { 39, 0x0000 }, /* R39 - Input Mixer1 */
78 0x0000, /* R39 - Input Mixer1 */ 79 { 40, 0x0000 }, /* R40 - Input Mixer2 */
79 0x0000, /* R40 - Input Mixer2 */ 80 { 41, 0x0000 }, /* R41 - Input Mixer3 */
80 0x0000, /* R41 - Input Mixer3 */ 81 { 42, 0x0000 }, /* R42 - Input Mixer4 */
81 0x0000, /* R42 - Input Mixer4 */ 82 { 43, 0x0000 }, /* R43 - Input Mixer5 */
82 0x0000, /* R43 - Input Mixer5 */ 83 { 44, 0x0000 }, /* R44 - Input Mixer6 */
83 0x0000, /* R44 - Input Mixer6 */ 84 { 45, 0x0000 }, /* R45 - Output Mixer1 */
84 0x0000, /* R45 - Output Mixer1 */ 85 { 46, 0x0000 }, /* R46 - Output Mixer2 */
85 0x0000, /* R46 - Output Mixer2 */ 86 { 47, 0x0000 }, /* R47 - Output Mixer3 */
86 0x0000, /* R47 - Output Mixer3 */ 87 { 48, 0x0000 }, /* R48 - Output Mixer4 */
87 0x0000, /* R48 - Output Mixer4 */ 88 { 49, 0x0000 }, /* R49 - Output Mixer5 */
88 0x0000, /* R49 - Output Mixer5 */ 89 { 50, 0x0000 }, /* R50 - Output Mixer6 */
89 0x0000, /* R50 - Output Mixer6 */ 90 { 51, 0x0180 }, /* R51 - Out3/4 Mixer */
90 0x0180, /* R51 - Out3/4 Mixer */ 91 { 52, 0x0000 }, /* R52 - Line Mixer1 */
91 0x0000, /* R52 - Line Mixer1 */ 92 { 53, 0x0000 }, /* R53 - Line Mixer2 */
92 0x0000, /* R53 - Line Mixer2 */ 93 { 54, 0x0000 }, /* R54 - Speaker Mixer */
93 0x0000, /* R54 - Speaker Mixer */ 94 { 55, 0x0000 }, /* R55 - Additional Control */
94 0x0000, /* R55 - Additional Control */ 95 { 56, 0x0000 }, /* R56 - AntiPOP1 */
95 0x0000, /* R56 - AntiPOP1 */ 96 { 57, 0x0000 }, /* R57 - AntiPOP2 */
96 0x0000, /* R57 - AntiPOP2 */ 97 { 58, 0x0000 }, /* R58 - MICBIAS */
97 0x0000, /* R58 - MICBIAS */ 98
98 0x0000, /* R59 */ 99 { 60, 0x0008 }, /* R60 - PLL1 */
99 0x0008, /* R60 - PLL1 */ 100 { 61, 0x0031 }, /* R61 - PLL2 */
100 0x0031, /* R61 - PLL2 */ 101 { 62, 0x0026 }, /* R62 - PLL3 */
101 0x0026, /* R62 - PLL3 */
102}; 102};
103 103
104static bool wm8991_volatile(struct device *dev, unsigned int reg)
105{
106 switch (reg) {
107 case WM8991_RESET:
108 return true;
109 default:
110 return false;
111 }
112}
113
104#define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0) 114#define wm8991_reset(c) snd_soc_write(c, WM8991_RESET, 0)
105 115
106static const unsigned int rec_mix_tlv[] = { 116static const unsigned int rec_mix_tlv[] = {
@@ -1110,6 +1120,7 @@ static int wm8991_mute(struct snd_soc_dai *dai, int mute)
1110static int wm8991_set_bias_level(struct snd_soc_codec *codec, 1120static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1111 enum snd_soc_bias_level level) 1121 enum snd_soc_bias_level level)
1112{ 1122{
1123 struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec);
1113 u16 val; 1124 u16 val;
1114 1125
1115 switch (level) { 1126 switch (level) {
@@ -1125,7 +1136,7 @@ static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1125 1136
1126 case SND_SOC_BIAS_STANDBY: 1137 case SND_SOC_BIAS_STANDBY:
1127 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1138 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1128 snd_soc_cache_sync(codec); 1139 regcache_sync(wm8991->regmap);
1129 /* Enable all output discharge bits */ 1140 /* Enable all output discharge bits */
1130 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE | 1141 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE |
1131 WM8991_DIS_RLINE | WM8991_DIS_OUT3 | 1142 WM8991_DIS_RLINE | WM8991_DIS_OUT3 |
@@ -1213,7 +1224,7 @@ static int wm8991_set_bias_level(struct snd_soc_codec *codec,
1213 1224
1214 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 1225 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1215 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0); 1226 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0);
1216 codec->cache_sync = 1; 1227 regcache_mark_dirty(wm8991->regmap);
1217 break; 1228 break;
1218 } 1229 }
1219 1230
@@ -1247,7 +1258,7 @@ static int wm8991_probe(struct snd_soc_codec *codec)
1247 1258
1248 wm8991 = snd_soc_codec_get_drvdata(codec); 1259 wm8991 = snd_soc_codec_get_drvdata(codec);
1249 1260
1250 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8991->control_type); 1261 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1251 if (ret < 0) { 1262 if (ret < 0) {
1252 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret); 1263 dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret);
1253 return ret; 1264 return ret;
@@ -1332,9 +1343,17 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8991 = {
1332 .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets), 1343 .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets),
1333 .dapm_routes = wm8991_dapm_routes, 1344 .dapm_routes = wm8991_dapm_routes,
1334 .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes), 1345 .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes),
1335 .reg_cache_size = WM8991_MAX_REGISTER + 1, 1346};
1336 .reg_word_size = sizeof(u16), 1347
1337 .reg_cache_default = wm8991_reg_defs 1348static const struct regmap_config wm8991_regmap = {
1349 .reg_bits = 8,
1350 .val_bits = 16,
1351
1352 .max_register = WM8991_PLL3,
1353 .volatile_reg = wm8991_volatile,
1354 .reg_defaults = wm8991_reg_defaults,
1355 .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults),
1356 .cache_type = REGCACHE_RBTREE,
1338}; 1357};
1339 1358
1340static int wm8991_i2c_probe(struct i2c_client *i2c, 1359static int wm8991_i2c_probe(struct i2c_client *i2c,
@@ -1347,7 +1366,10 @@ static int wm8991_i2c_probe(struct i2c_client *i2c,
1347 if (!wm8991) 1366 if (!wm8991)
1348 return -ENOMEM; 1367 return -ENOMEM;
1349 1368
1350 wm8991->control_type = SND_SOC_I2C; 1369 wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap);
1370 if (IS_ERR(wm8991->regmap))
1371 return PTR_ERR(wm8991->regmap);
1372
1351 i2c_set_clientdata(i2c, wm8991); 1373 i2c_set_clientdata(i2c, wm8991);
1352 1374
1353 ret = snd_soc_register_codec(&i2c->dev, 1375 ret = snd_soc_register_codec(&i2c->dev,