diff options
author | Misael Lopez Cruz <x0052729@ti.com> | 2010-03-19 07:25:51 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-03-19 07:29:33 -0400 |
commit | 8ecbabd977dc64d2d8c9980420a3d72db06fe551 (patch) | |
tree | 106f18d7d1a403a9eebed27480dcf128154caeac /sound/soc | |
parent | 27648b2f1c464f8827cc01ba4eb21580b5402947 (diff) |
ASoC: TWL6040: Add twl6040 codec driver
Initial version of TWL6040 codec driver.
The TWL6040 codec uses a proprietary PDM-based digital audio interface.
Audio paths supported are:
- Input: Main Mic, Sub Mic, Headset Mic, Auxiliary-FM Left/Right
- Output: Headset Left/Right, Handsfree Left/Right
TWL6040 codec supports power-up/down manual and automatic sequence.
Manual sequence is done through a specific register writes sequence.
Automatic sequence is done when the codec is powered-up through the
external AUDPWRON line. The completion of the sequence is signaled
through the audio interrupt.
TWL6040 codec sysclk can be provided by: low-power or high
performance PLL:
- The low-power PLL takes a low-frequency input at 32,768 Hz and
generates an approximate of 17.64 or 19.2 MHz (for 44.1 KHz and 48 KHz
respectively)
- The high-performance PLL generates an exact 19.2 MHz clock signal
from high-frequency input at 12/19.2/26/38.4 MHz.
Low-power playback mode is a special scenario where only headset path
(headset DAC and driver) is active.
For the particular case of headset path, PLL being used defines the
headset power mode: low-power, high-performance.
Signed-off-by: Misael Lopez Cruz <x0052729@ti.com>
Signed-off-by: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
Signed-off-by: Margarita Olaya Cabrera <magi.olaya@ti.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/codecs/Kconfig | 4 | ||||
-rw-r--r-- | sound/soc/codecs/Makefile | 2 | ||||
-rwxr-xr-x | sound/soc/codecs/twl6040.c | 1227 | ||||
-rw-r--r-- | sound/soc/codecs/twl6040.h | 141 |
4 files changed, 1374 insertions, 0 deletions
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index 16c47edb8266..398cbb0e79fd 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig | |||
@@ -35,6 +35,7 @@ config SND_SOC_ALL_CODECS | |||
35 | select SND_SOC_TPA6130A2 if I2C | 35 | select SND_SOC_TPA6130A2 if I2C |
36 | select SND_SOC_TLV320DAC33 if I2C | 36 | select SND_SOC_TLV320DAC33 if I2C |
37 | select SND_SOC_TWL4030 if TWL4030_CORE | 37 | select SND_SOC_TWL4030 if TWL4030_CORE |
38 | select SND_SOC_TWL6040 if TWL4030_CORE | ||
38 | select SND_SOC_UDA134X | 39 | select SND_SOC_UDA134X |
39 | select SND_SOC_UDA1380 if I2C | 40 | select SND_SOC_UDA1380 if I2C |
40 | select SND_SOC_WM2000 if I2C | 41 | select SND_SOC_WM2000 if I2C |
@@ -168,6 +169,9 @@ config SND_SOC_TWL4030 | |||
168 | select TWL4030_CODEC | 169 | select TWL4030_CODEC |
169 | tristate | 170 | tristate |
170 | 171 | ||
172 | config SND_SOC_TWL6040 | ||
173 | tristate | ||
174 | |||
171 | config SND_SOC_UDA134X | 175 | config SND_SOC_UDA134X |
172 | tristate | 176 | tristate |
173 | 177 | ||
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 69817778b2bd..98bd10c8fd3a 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile | |||
@@ -22,6 +22,7 @@ snd-soc-tlv320aic26-objs := tlv320aic26.o | |||
22 | snd-soc-tlv320aic3x-objs := tlv320aic3x.o | 22 | snd-soc-tlv320aic3x-objs := tlv320aic3x.o |
23 | snd-soc-tlv320dac33-objs := tlv320dac33.o | 23 | snd-soc-tlv320dac33-objs := tlv320dac33.o |
24 | snd-soc-twl4030-objs := twl4030.o | 24 | snd-soc-twl4030-objs := twl4030.o |
25 | snd-soc-twl6040-objs := twl6040.o | ||
25 | snd-soc-uda134x-objs := uda134x.o | 26 | snd-soc-uda134x-objs := uda134x.o |
26 | snd-soc-uda1380-objs := uda1380.o | 27 | snd-soc-uda1380-objs := uda1380.o |
27 | snd-soc-wm8350-objs := wm8350.o | 28 | snd-soc-wm8350-objs := wm8350.o |
@@ -85,6 +86,7 @@ obj-$(CONFIG_SND_SOC_TLV320AIC26) += snd-soc-tlv320aic26.o | |||
85 | obj-$(CONFIG_SND_SOC_TLV320AIC3X) += snd-soc-tlv320aic3x.o | 86 | obj-$(CONFIG_SND_SOC_TLV320AIC3X) += snd-soc-tlv320aic3x.o |
86 | obj-$(CONFIG_SND_SOC_TLV320DAC33) += snd-soc-tlv320dac33.o | 87 | obj-$(CONFIG_SND_SOC_TLV320DAC33) += snd-soc-tlv320dac33.o |
87 | obj-$(CONFIG_SND_SOC_TWL4030) += snd-soc-twl4030.o | 88 | obj-$(CONFIG_SND_SOC_TWL4030) += snd-soc-twl4030.o |
89 | obj-$(CONFIG_SND_SOC_TWL6040) += snd-soc-twl6040.o | ||
88 | obj-$(CONFIG_SND_SOC_UDA134X) += snd-soc-uda134x.o | 90 | obj-$(CONFIG_SND_SOC_UDA134X) += snd-soc-uda134x.o |
89 | obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o | 91 | obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o |
90 | obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o | 92 | obj-$(CONFIG_SND_SOC_WM8350) += snd-soc-wm8350.o |
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c new file mode 100755 index 000000000000..0e4dce7de052 --- /dev/null +++ b/sound/soc/codecs/twl6040.c | |||
@@ -0,0 +1,1227 @@ | |||
1 | /* | ||
2 | * ALSA SoC TWL6040 codec driver | ||
3 | * | ||
4 | * Author: Misael Lopez Cruz <x0052729@ti.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
18 | * 02110-1301 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #include <linux/module.h> | ||
23 | #include <linux/moduleparam.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/pm.h> | ||
27 | #include <linux/i2c.h> | ||
28 | #include <linux/gpio.h> | ||
29 | #include <linux/platform_device.h> | ||
30 | #include <linux/i2c/twl.h> | ||
31 | |||
32 | #include <sound/core.h> | ||
33 | #include <sound/pcm.h> | ||
34 | #include <sound/pcm_params.h> | ||
35 | #include <sound/soc.h> | ||
36 | #include <sound/soc-dapm.h> | ||
37 | #include <sound/initval.h> | ||
38 | #include <sound/tlv.h> | ||
39 | |||
40 | #include "twl6040.h" | ||
41 | |||
42 | #define TWL6040_RATES (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) | ||
43 | #define TWL6040_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) | ||
44 | |||
45 | /* codec private data */ | ||
46 | struct twl6040_data { | ||
47 | struct snd_soc_codec codec; | ||
48 | int audpwron; | ||
49 | int naudint; | ||
50 | int codec_powered; | ||
51 | int pll; | ||
52 | int non_lp; | ||
53 | unsigned int sysclk; | ||
54 | struct snd_pcm_hw_constraint_list *sysclk_constraints; | ||
55 | struct completion ready; | ||
56 | }; | ||
57 | |||
58 | /* | ||
59 | * twl6040 register cache & default register settings | ||
60 | */ | ||
61 | static const u8 twl6040_reg[TWL6040_CACHEREGNUM] = { | ||
62 | 0x00, /* not used 0x00 */ | ||
63 | 0x4B, /* TWL6040_ASICID (ro) 0x01 */ | ||
64 | 0x00, /* TWL6040_ASICREV (ro) 0x02 */ | ||
65 | 0x00, /* TWL6040_INTID 0x03 */ | ||
66 | 0x00, /* TWL6040_INTMR 0x04 */ | ||
67 | 0x00, /* TWL6040_NCPCTRL 0x05 */ | ||
68 | 0x00, /* TWL6040_LDOCTL 0x06 */ | ||
69 | 0x60, /* TWL6040_HPPLLCTL 0x07 */ | ||
70 | 0x00, /* TWL6040_LPPLLCTL 0x08 */ | ||
71 | 0x4A, /* TWL6040_LPPLLDIV 0x09 */ | ||
72 | 0x00, /* TWL6040_AMICBCTL 0x0A */ | ||
73 | 0x00, /* TWL6040_DMICBCTL 0x0B */ | ||
74 | 0x18, /* TWL6040_MICLCTL 0x0C - No input selected on Left Mic */ | ||
75 | 0x18, /* TWL6040_MICRCTL 0x0D - No input selected on Right Mic */ | ||
76 | 0x00, /* TWL6040_MICGAIN 0x0E */ | ||
77 | 0x1B, /* TWL6040_LINEGAIN 0x0F */ | ||
78 | 0x00, /* TWL6040_HSLCTL 0x10 */ | ||
79 | 0x00, /* TWL6040_HSRCTL 0x11 */ | ||
80 | 0x00, /* TWL6040_HSGAIN 0x12 */ | ||
81 | 0x00, /* TWL6040_EARCTL 0x13 */ | ||
82 | 0x00, /* TWL6040_HFLCTL 0x14 */ | ||
83 | 0x00, /* TWL6040_HFLGAIN 0x15 */ | ||
84 | 0x00, /* TWL6040_HFRCTL 0x16 */ | ||
85 | 0x00, /* TWL6040_HFRGAIN 0x17 */ | ||
86 | 0x00, /* TWL6040_VIBCTLL 0x18 */ | ||
87 | 0x00, /* TWL6040_VIBDATL 0x19 */ | ||
88 | 0x00, /* TWL6040_VIBCTLR 0x1A */ | ||
89 | 0x00, /* TWL6040_VIBDATR 0x1B */ | ||
90 | 0x00, /* TWL6040_HKCTL1 0x1C */ | ||
91 | 0x00, /* TWL6040_HKCTL2 0x1D */ | ||
92 | 0x00, /* TWL6040_GPOCTL 0x1E */ | ||
93 | 0x00, /* TWL6040_ALB 0x1F */ | ||
94 | 0x00, /* TWL6040_DLB 0x20 */ | ||
95 | 0x00, /* not used 0x21 */ | ||
96 | 0x00, /* not used 0x22 */ | ||
97 | 0x00, /* not used 0x23 */ | ||
98 | 0x00, /* not used 0x24 */ | ||
99 | 0x00, /* not used 0x25 */ | ||
100 | 0x00, /* not used 0x26 */ | ||
101 | 0x00, /* not used 0x27 */ | ||
102 | 0x00, /* TWL6040_TRIM1 0x28 */ | ||
103 | 0x00, /* TWL6040_TRIM2 0x29 */ | ||
104 | 0x00, /* TWL6040_TRIM3 0x2A */ | ||
105 | 0x00, /* TWL6040_HSOTRIM 0x2B */ | ||
106 | 0x00, /* TWL6040_HFOTRIM 0x2C */ | ||
107 | 0x09, /* TWL6040_ACCCTL 0x2D */ | ||
108 | 0x00, /* TWL6040_STATUS (ro) 0x2E */ | ||
109 | }; | ||
110 | |||
111 | /* | ||
112 | * twl6040 vio/gnd registers: | ||
113 | * registers under vio/gnd supply can be accessed | ||
114 | * before the power-up sequence, after NRESPWRON goes high | ||
115 | */ | ||
116 | static const int twl6040_vio_reg[TWL6040_VIOREGNUM] = { | ||
117 | TWL6040_REG_ASICID, | ||
118 | TWL6040_REG_ASICREV, | ||
119 | TWL6040_REG_INTID, | ||
120 | TWL6040_REG_INTMR, | ||
121 | TWL6040_REG_NCPCTL, | ||
122 | TWL6040_REG_LDOCTL, | ||
123 | TWL6040_REG_AMICBCTL, | ||
124 | TWL6040_REG_DMICBCTL, | ||
125 | TWL6040_REG_HKCTL1, | ||
126 | TWL6040_REG_HKCTL2, | ||
127 | TWL6040_REG_GPOCTL, | ||
128 | TWL6040_REG_TRIM1, | ||
129 | TWL6040_REG_TRIM2, | ||
130 | TWL6040_REG_TRIM3, | ||
131 | TWL6040_REG_HSOTRIM, | ||
132 | TWL6040_REG_HFOTRIM, | ||
133 | TWL6040_REG_ACCCTL, | ||
134 | TWL6040_REG_STATUS, | ||
135 | }; | ||
136 | |||
137 | /* | ||
138 | * twl6040 vdd/vss registers: | ||
139 | * registers under vdd/vss supplies can only be accessed | ||
140 | * after the power-up sequence | ||
141 | */ | ||
142 | static const int twl6040_vdd_reg[TWL6040_VDDREGNUM] = { | ||
143 | TWL6040_REG_HPPLLCTL, | ||
144 | TWL6040_REG_LPPLLCTL, | ||
145 | TWL6040_REG_LPPLLDIV, | ||
146 | TWL6040_REG_MICLCTL, | ||
147 | TWL6040_REG_MICRCTL, | ||
148 | TWL6040_REG_MICGAIN, | ||
149 | TWL6040_REG_LINEGAIN, | ||
150 | TWL6040_REG_HSLCTL, | ||
151 | TWL6040_REG_HSRCTL, | ||
152 | TWL6040_REG_HSGAIN, | ||
153 | TWL6040_REG_EARCTL, | ||
154 | TWL6040_REG_HFLCTL, | ||
155 | TWL6040_REG_HFLGAIN, | ||
156 | TWL6040_REG_HFRCTL, | ||
157 | TWL6040_REG_HFRGAIN, | ||
158 | TWL6040_REG_VIBCTLL, | ||
159 | TWL6040_REG_VIBDATL, | ||
160 | TWL6040_REG_VIBCTLR, | ||
161 | TWL6040_REG_VIBDATR, | ||
162 | TWL6040_REG_ALB, | ||
163 | TWL6040_REG_DLB, | ||
164 | }; | ||
165 | |||
166 | /* | ||
167 | * read twl6040 register cache | ||
168 | */ | ||
169 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, | ||
170 | unsigned int reg) | ||
171 | { | ||
172 | u8 *cache = codec->reg_cache; | ||
173 | |||
174 | if (reg >= TWL6040_CACHEREGNUM) | ||
175 | return -EIO; | ||
176 | |||
177 | return cache[reg]; | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * write twl6040 register cache | ||
182 | */ | ||
183 | static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, | ||
184 | u8 reg, u8 value) | ||
185 | { | ||
186 | u8 *cache = codec->reg_cache; | ||
187 | |||
188 | if (reg >= TWL6040_CACHEREGNUM) | ||
189 | return; | ||
190 | cache[reg] = value; | ||
191 | } | ||
192 | |||
193 | /* | ||
194 | * read from twl6040 hardware register | ||
195 | */ | ||
196 | static int twl6040_read_reg_volatile(struct snd_soc_codec *codec, | ||
197 | unsigned int reg) | ||
198 | { | ||
199 | u8 value; | ||
200 | |||
201 | if (reg >= TWL6040_CACHEREGNUM) | ||
202 | return -EIO; | ||
203 | |||
204 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg); | ||
205 | twl6040_write_reg_cache(codec, reg, value); | ||
206 | |||
207 | return value; | ||
208 | } | ||
209 | |||
210 | /* | ||
211 | * write to the twl6040 register space | ||
212 | */ | ||
213 | static int twl6040_write(struct snd_soc_codec *codec, | ||
214 | unsigned int reg, unsigned int value) | ||
215 | { | ||
216 | if (reg >= TWL6040_CACHEREGNUM) | ||
217 | return -EIO; | ||
218 | |||
219 | twl6040_write_reg_cache(codec, reg, value); | ||
220 | return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg); | ||
221 | } | ||
222 | |||
223 | static void twl6040_init_vio_regs(struct snd_soc_codec *codec) | ||
224 | { | ||
225 | u8 *cache = codec->reg_cache; | ||
226 | int reg, i; | ||
227 | |||
228 | /* allow registers to be accessed by i2c */ | ||
229 | twl6040_write(codec, TWL6040_REG_ACCCTL, cache[TWL6040_REG_ACCCTL]); | ||
230 | |||
231 | for (i = 0; i < TWL6040_VIOREGNUM; i++) { | ||
232 | reg = twl6040_vio_reg[i]; | ||
233 | /* skip read-only registers (ASICID, ASICREV, STATUS) */ | ||
234 | switch (reg) { | ||
235 | case TWL6040_REG_ASICID: | ||
236 | case TWL6040_REG_ASICREV: | ||
237 | case TWL6040_REG_STATUS: | ||
238 | continue; | ||
239 | default: | ||
240 | break; | ||
241 | } | ||
242 | twl6040_write(codec, reg, cache[reg]); | ||
243 | } | ||
244 | } | ||
245 | |||
246 | static void twl6040_init_vdd_regs(struct snd_soc_codec *codec) | ||
247 | { | ||
248 | u8 *cache = codec->reg_cache; | ||
249 | int reg, i; | ||
250 | |||
251 | for (i = 0; i < TWL6040_VDDREGNUM; i++) { | ||
252 | reg = twl6040_vdd_reg[i]; | ||
253 | twl6040_write(codec, reg, cache[reg]); | ||
254 | } | ||
255 | } | ||
256 | |||
257 | /* twl6040 codec manual power-up sequence */ | ||
258 | static void twl6040_power_up(struct snd_soc_codec *codec) | ||
259 | { | ||
260 | u8 ncpctl, ldoctl, lppllctl, accctl; | ||
261 | |||
262 | ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL); | ||
263 | ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL); | ||
264 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | ||
265 | accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL); | ||
266 | |||
267 | /* enable reference system */ | ||
268 | ldoctl |= TWL6040_REFENA; | ||
269 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
270 | msleep(10); | ||
271 | /* enable internal oscillator */ | ||
272 | ldoctl |= TWL6040_OSCENA; | ||
273 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
274 | udelay(10); | ||
275 | /* enable high-side ldo */ | ||
276 | ldoctl |= TWL6040_HSLDOENA; | ||
277 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
278 | udelay(244); | ||
279 | /* enable negative charge pump */ | ||
280 | ncpctl |= TWL6040_NCPENA | TWL6040_NCPOPEN; | ||
281 | twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl); | ||
282 | udelay(488); | ||
283 | /* enable low-side ldo */ | ||
284 | ldoctl |= TWL6040_LSLDOENA; | ||
285 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
286 | udelay(244); | ||
287 | /* enable low-power pll */ | ||
288 | lppllctl |= TWL6040_LPLLENA; | ||
289 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
290 | /* reset state machine */ | ||
291 | accctl |= TWL6040_RESETSPLIT; | ||
292 | twl6040_write(codec, TWL6040_REG_ACCCTL, accctl); | ||
293 | mdelay(5); | ||
294 | accctl &= ~TWL6040_RESETSPLIT; | ||
295 | twl6040_write(codec, TWL6040_REG_ACCCTL, accctl); | ||
296 | /* disable internal oscillator */ | ||
297 | ldoctl &= ~TWL6040_OSCENA; | ||
298 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
299 | } | ||
300 | |||
301 | /* twl6040 codec manual power-down sequence */ | ||
302 | static void twl6040_power_down(struct snd_soc_codec *codec) | ||
303 | { | ||
304 | u8 ncpctl, ldoctl, lppllctl, accctl; | ||
305 | |||
306 | ncpctl = twl6040_read_reg_cache(codec, TWL6040_REG_NCPCTL); | ||
307 | ldoctl = twl6040_read_reg_cache(codec, TWL6040_REG_LDOCTL); | ||
308 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | ||
309 | accctl = twl6040_read_reg_cache(codec, TWL6040_REG_ACCCTL); | ||
310 | |||
311 | /* enable internal oscillator */ | ||
312 | ldoctl |= TWL6040_OSCENA; | ||
313 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
314 | udelay(10); | ||
315 | /* disable low-power pll */ | ||
316 | lppllctl &= ~TWL6040_LPLLENA; | ||
317 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
318 | /* disable low-side ldo */ | ||
319 | ldoctl &= ~TWL6040_LSLDOENA; | ||
320 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
321 | udelay(244); | ||
322 | /* disable negative charge pump */ | ||
323 | ncpctl &= ~(TWL6040_NCPENA | TWL6040_NCPOPEN); | ||
324 | twl6040_write(codec, TWL6040_REG_NCPCTL, ncpctl); | ||
325 | udelay(488); | ||
326 | /* disable high-side ldo */ | ||
327 | ldoctl &= ~TWL6040_HSLDOENA; | ||
328 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
329 | udelay(244); | ||
330 | /* disable internal oscillator */ | ||
331 | ldoctl &= ~TWL6040_OSCENA; | ||
332 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
333 | /* disable reference system */ | ||
334 | ldoctl &= ~TWL6040_REFENA; | ||
335 | twl6040_write(codec, TWL6040_REG_LDOCTL, ldoctl); | ||
336 | msleep(10); | ||
337 | } | ||
338 | |||
339 | /* set headset dac and driver power mode */ | ||
340 | static int headset_power_mode(struct snd_soc_codec *codec, int high_perf) | ||
341 | { | ||
342 | int hslctl, hsrctl; | ||
343 | int mask = TWL6040_HSDRVMODEL | TWL6040_HSDACMODEL; | ||
344 | |||
345 | hslctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSLCTL); | ||
346 | hsrctl = twl6040_read_reg_cache(codec, TWL6040_REG_HSRCTL); | ||
347 | |||
348 | if (high_perf) { | ||
349 | hslctl &= ~mask; | ||
350 | hsrctl &= ~mask; | ||
351 | } else { | ||
352 | hslctl |= mask; | ||
353 | hsrctl |= mask; | ||
354 | } | ||
355 | |||
356 | twl6040_write(codec, TWL6040_REG_HSLCTL, hslctl); | ||
357 | twl6040_write(codec, TWL6040_REG_HSRCTL, hsrctl); | ||
358 | |||
359 | return 0; | ||
360 | } | ||
361 | |||
362 | static int twl6040_power_mode_event(struct snd_soc_dapm_widget *w, | ||
363 | struct snd_kcontrol *kcontrol, int event) | ||
364 | { | ||
365 | struct snd_soc_codec *codec = w->codec; | ||
366 | struct twl6040_data *priv = codec->private_data; | ||
367 | |||
368 | if (SND_SOC_DAPM_EVENT_ON(event)) | ||
369 | priv->non_lp++; | ||
370 | else | ||
371 | priv->non_lp--; | ||
372 | |||
373 | return 0; | ||
374 | } | ||
375 | |||
376 | /* audio interrupt handler */ | ||
377 | static irqreturn_t twl6040_naudint_handler(int irq, void *data) | ||
378 | { | ||
379 | struct snd_soc_codec *codec = data; | ||
380 | struct twl6040_data *priv = codec->private_data; | ||
381 | u8 intid; | ||
382 | |||
383 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid, TWL6040_REG_INTID); | ||
384 | |||
385 | switch (intid) { | ||
386 | case TWL6040_THINT: | ||
387 | dev_alert(codec->dev, "die temp over-limit detection\n"); | ||
388 | break; | ||
389 | case TWL6040_PLUGINT: | ||
390 | case TWL6040_UNPLUGINT: | ||
391 | case TWL6040_HOOKINT: | ||
392 | break; | ||
393 | case TWL6040_HFINT: | ||
394 | dev_alert(codec->dev, "hf drivers over current detection\n"); | ||
395 | break; | ||
396 | case TWL6040_VIBINT: | ||
397 | dev_alert(codec->dev, "vib drivers over current detection\n"); | ||
398 | break; | ||
399 | case TWL6040_READYINT: | ||
400 | complete(&priv->ready); | ||
401 | break; | ||
402 | default: | ||
403 | dev_err(codec->dev, "unknown audio interrupt %d\n", intid); | ||
404 | break; | ||
405 | } | ||
406 | |||
407 | return IRQ_HANDLED; | ||
408 | } | ||
409 | |||
410 | /* | ||
411 | * MICATT volume control: | ||
412 | * from -6 to 0 dB in 6 dB steps | ||
413 | */ | ||
414 | static DECLARE_TLV_DB_SCALE(mic_preamp_tlv, -600, 600, 0); | ||
415 | |||
416 | /* | ||
417 | * MICGAIN volume control: | ||
418 | * from 6 to 30 dB in 6 dB steps | ||
419 | */ | ||
420 | static DECLARE_TLV_DB_SCALE(mic_amp_tlv, 600, 600, 0); | ||
421 | |||
422 | /* | ||
423 | * HSGAIN volume control: | ||
424 | * from -30 to 0 dB in 2 dB steps | ||
425 | */ | ||
426 | static DECLARE_TLV_DB_SCALE(hs_tlv, -3000, 200, 0); | ||
427 | |||
428 | /* | ||
429 | * HFGAIN volume control: | ||
430 | * from -52 to 6 dB in 2 dB steps | ||
431 | */ | ||
432 | static DECLARE_TLV_DB_SCALE(hf_tlv, -5200, 200, 0); | ||
433 | |||
434 | /* Left analog microphone selection */ | ||
435 | static const char *twl6040_amicl_texts[] = | ||
436 | {"Headset Mic", "Main Mic", "Aux/FM Left", "Off"}; | ||
437 | |||
438 | /* Right analog microphone selection */ | ||
439 | static const char *twl6040_amicr_texts[] = | ||
440 | {"Headset Mic", "Sub Mic", "Aux/FM Right", "Off"}; | ||
441 | |||
442 | static const struct soc_enum twl6040_enum[] = { | ||
443 | SOC_ENUM_SINGLE(TWL6040_REG_MICLCTL, 3, 3, twl6040_amicl_texts), | ||
444 | SOC_ENUM_SINGLE(TWL6040_REG_MICRCTL, 3, 3, twl6040_amicr_texts), | ||
445 | }; | ||
446 | |||
447 | static const struct snd_kcontrol_new amicl_control = | ||
448 | SOC_DAPM_ENUM("Route", twl6040_enum[0]); | ||
449 | |||
450 | static const struct snd_kcontrol_new amicr_control = | ||
451 | SOC_DAPM_ENUM("Route", twl6040_enum[1]); | ||
452 | |||
453 | /* Headset DAC playback switches */ | ||
454 | static const struct snd_kcontrol_new hsdacl_switch_controls = | ||
455 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSLCTL, 5, 1, 0); | ||
456 | |||
457 | static const struct snd_kcontrol_new hsdacr_switch_controls = | ||
458 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSRCTL, 5, 1, 0); | ||
459 | |||
460 | /* Handsfree DAC playback switches */ | ||
461 | static const struct snd_kcontrol_new hfdacl_switch_controls = | ||
462 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 2, 1, 0); | ||
463 | |||
464 | static const struct snd_kcontrol_new hfdacr_switch_controls = | ||
465 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 2, 1, 0); | ||
466 | |||
467 | /* Headset driver switches */ | ||
468 | static const struct snd_kcontrol_new hsl_driver_switch_controls = | ||
469 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSLCTL, 2, 1, 0); | ||
470 | |||
471 | static const struct snd_kcontrol_new hsr_driver_switch_controls = | ||
472 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HSRCTL, 2, 1, 0); | ||
473 | |||
474 | /* Handsfree driver switches */ | ||
475 | static const struct snd_kcontrol_new hfl_driver_switch_controls = | ||
476 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFLCTL, 4, 1, 0); | ||
477 | |||
478 | static const struct snd_kcontrol_new hfr_driver_switch_controls = | ||
479 | SOC_DAPM_SINGLE("Switch", TWL6040_REG_HFRCTL, 4, 1, 0); | ||
480 | |||
481 | static const struct snd_kcontrol_new twl6040_snd_controls[] = { | ||
482 | /* Capture gains */ | ||
483 | SOC_DOUBLE_TLV("Capture Preamplifier Volume", | ||
484 | TWL6040_REG_MICGAIN, 6, 7, 1, 1, mic_preamp_tlv), | ||
485 | SOC_DOUBLE_TLV("Capture Volume", | ||
486 | TWL6040_REG_MICGAIN, 0, 3, 4, 0, mic_amp_tlv), | ||
487 | |||
488 | /* Playback gains */ | ||
489 | SOC_DOUBLE_TLV("Headset Playback Volume", | ||
490 | TWL6040_REG_HSGAIN, 0, 4, 0xF, 1, hs_tlv), | ||
491 | SOC_DOUBLE_R_TLV("Handsfree Playback Volume", | ||
492 | TWL6040_REG_HFLGAIN, TWL6040_REG_HFRGAIN, 0, 0x1D, 1, hf_tlv), | ||
493 | |||
494 | }; | ||
495 | |||
496 | static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { | ||
497 | /* Inputs */ | ||
498 | SND_SOC_DAPM_INPUT("MAINMIC"), | ||
499 | SND_SOC_DAPM_INPUT("HSMIC"), | ||
500 | SND_SOC_DAPM_INPUT("SUBMIC"), | ||
501 | SND_SOC_DAPM_INPUT("AFML"), | ||
502 | SND_SOC_DAPM_INPUT("AFMR"), | ||
503 | |||
504 | /* Outputs */ | ||
505 | SND_SOC_DAPM_OUTPUT("HSOL"), | ||
506 | SND_SOC_DAPM_OUTPUT("HSOR"), | ||
507 | SND_SOC_DAPM_OUTPUT("HFL"), | ||
508 | SND_SOC_DAPM_OUTPUT("HFR"), | ||
509 | |||
510 | /* Analog input muxes for the capture amplifiers */ | ||
511 | SND_SOC_DAPM_MUX("Analog Left Capture Route", | ||
512 | SND_SOC_NOPM, 0, 0, &amicl_control), | ||
513 | SND_SOC_DAPM_MUX("Analog Right Capture Route", | ||
514 | SND_SOC_NOPM, 0, 0, &amicr_control), | ||
515 | |||
516 | /* Analog capture PGAs */ | ||
517 | SND_SOC_DAPM_PGA("MicAmpL", | ||
518 | TWL6040_REG_MICLCTL, 0, 0, NULL, 0), | ||
519 | SND_SOC_DAPM_PGA("MicAmpR", | ||
520 | TWL6040_REG_MICRCTL, 0, 0, NULL, 0), | ||
521 | |||
522 | /* ADCs */ | ||
523 | SND_SOC_DAPM_ADC("ADC Left", "Left Front Capture", | ||
524 | TWL6040_REG_MICLCTL, 2, 0), | ||
525 | SND_SOC_DAPM_ADC("ADC Right", "Right Front Capture", | ||
526 | TWL6040_REG_MICRCTL, 2, 0), | ||
527 | |||
528 | /* Microphone bias */ | ||
529 | SND_SOC_DAPM_MICBIAS("Headset Mic Bias", | ||
530 | TWL6040_REG_AMICBCTL, 0, 0), | ||
531 | SND_SOC_DAPM_MICBIAS("Main Mic Bias", | ||
532 | TWL6040_REG_AMICBCTL, 4, 0), | ||
533 | SND_SOC_DAPM_MICBIAS("Digital Mic1 Bias", | ||
534 | TWL6040_REG_DMICBCTL, 0, 0), | ||
535 | SND_SOC_DAPM_MICBIAS("Digital Mic2 Bias", | ||
536 | TWL6040_REG_DMICBCTL, 4, 0), | ||
537 | |||
538 | /* DACs */ | ||
539 | SND_SOC_DAPM_DAC("HSDAC Left", "Headset Playback", | ||
540 | TWL6040_REG_HSLCTL, 0, 0), | ||
541 | SND_SOC_DAPM_DAC("HSDAC Right", "Headset Playback", | ||
542 | TWL6040_REG_HSRCTL, 0, 0), | ||
543 | SND_SOC_DAPM_DAC_E("HFDAC Left", "Handsfree Playback", | ||
544 | TWL6040_REG_HFLCTL, 0, 0, | ||
545 | twl6040_power_mode_event, | ||
546 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
547 | SND_SOC_DAPM_DAC_E("HFDAC Right", "Handsfree Playback", | ||
548 | TWL6040_REG_HFRCTL, 0, 0, | ||
549 | twl6040_power_mode_event, | ||
550 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
551 | |||
552 | /* Analog playback switches */ | ||
553 | SND_SOC_DAPM_SWITCH("HSDAC Left Playback", | ||
554 | SND_SOC_NOPM, 0, 0, &hsdacl_switch_controls), | ||
555 | SND_SOC_DAPM_SWITCH("HSDAC Right Playback", | ||
556 | SND_SOC_NOPM, 0, 0, &hsdacr_switch_controls), | ||
557 | SND_SOC_DAPM_SWITCH("HFDAC Left Playback", | ||
558 | SND_SOC_NOPM, 0, 0, &hfdacl_switch_controls), | ||
559 | SND_SOC_DAPM_SWITCH("HFDAC Right Playback", | ||
560 | SND_SOC_NOPM, 0, 0, &hfdacr_switch_controls), | ||
561 | |||
562 | SND_SOC_DAPM_SWITCH("Headset Left Driver", | ||
563 | SND_SOC_NOPM, 0, 0, &hsl_driver_switch_controls), | ||
564 | SND_SOC_DAPM_SWITCH("Headset Right Driver", | ||
565 | SND_SOC_NOPM, 0, 0, &hsr_driver_switch_controls), | ||
566 | SND_SOC_DAPM_SWITCH_E("Handsfree Left Driver", | ||
567 | SND_SOC_NOPM, 0, 0, &hfl_driver_switch_controls, | ||
568 | twl6040_power_mode_event, | ||
569 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
570 | SND_SOC_DAPM_SWITCH_E("Handsfree Right Driver", | ||
571 | SND_SOC_NOPM, 0, 0, &hfr_driver_switch_controls, | ||
572 | twl6040_power_mode_event, | ||
573 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD), | ||
574 | |||
575 | /* Analog playback PGAs */ | ||
576 | SND_SOC_DAPM_PGA("HFDAC Left PGA", | ||
577 | TWL6040_REG_HFLCTL, 1, 0, NULL, 0), | ||
578 | SND_SOC_DAPM_PGA("HFDAC Right PGA", | ||
579 | TWL6040_REG_HFRCTL, 1, 0, NULL, 0), | ||
580 | |||
581 | }; | ||
582 | |||
583 | static const struct snd_soc_dapm_route intercon[] = { | ||
584 | /* Capture path */ | ||
585 | {"Analog Left Capture Route", "Headset Mic", "HSMIC"}, | ||
586 | {"Analog Left Capture Route", "Main Mic", "MAINMIC"}, | ||
587 | {"Analog Left Capture Route", "Aux/FM Left", "AFML"}, | ||
588 | |||
589 | {"Analog Right Capture Route", "Headset Mic", "HSMIC"}, | ||
590 | {"Analog Right Capture Route", "Sub Mic", "SUBMIC"}, | ||
591 | {"Analog Right Capture Route", "Aux/FM Right", "AFMR"}, | ||
592 | |||
593 | {"MicAmpL", NULL, "Analog Left Capture Route"}, | ||
594 | {"MicAmpR", NULL, "Analog Right Capture Route"}, | ||
595 | |||
596 | {"ADC Left", NULL, "MicAmpL"}, | ||
597 | {"ADC Right", NULL, "MicAmpR"}, | ||
598 | |||
599 | /* Headset playback path */ | ||
600 | {"HSDAC Left Playback", "Switch", "HSDAC Left"}, | ||
601 | {"HSDAC Right Playback", "Switch", "HSDAC Right"}, | ||
602 | |||
603 | {"Headset Left Driver", "Switch", "HSDAC Left Playback"}, | ||
604 | {"Headset Right Driver", "Switch", "HSDAC Right Playback"}, | ||
605 | |||
606 | {"HSOL", NULL, "Headset Left Driver"}, | ||
607 | {"HSOR", NULL, "Headset Right Driver"}, | ||
608 | |||
609 | /* Handsfree playback path */ | ||
610 | {"HFDAC Left Playback", "Switch", "HFDAC Left"}, | ||
611 | {"HFDAC Right Playback", "Switch", "HFDAC Right"}, | ||
612 | |||
613 | {"HFDAC Left PGA", NULL, "HFDAC Left Playback"}, | ||
614 | {"HFDAC Right PGA", NULL, "HFDAC Right Playback"}, | ||
615 | |||
616 | {"Handsfree Left Driver", "Switch", "HFDAC Left PGA"}, | ||
617 | {"Handsfree Right Driver", "Switch", "HFDAC Right PGA"}, | ||
618 | |||
619 | {"HFL", NULL, "Handsfree Left Driver"}, | ||
620 | {"HFR", NULL, "Handsfree Right Driver"}, | ||
621 | }; | ||
622 | |||
623 | static int twl6040_add_widgets(struct snd_soc_codec *codec) | ||
624 | { | ||
625 | snd_soc_dapm_new_controls(codec, twl6040_dapm_widgets, | ||
626 | ARRAY_SIZE(twl6040_dapm_widgets)); | ||
627 | |||
628 | snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon)); | ||
629 | |||
630 | snd_soc_dapm_new_widgets(codec); | ||
631 | |||
632 | return 0; | ||
633 | } | ||
634 | |||
635 | static int twl6040_power_up_completion(struct snd_soc_codec *codec, | ||
636 | int naudint) | ||
637 | { | ||
638 | struct twl6040_data *priv = codec->private_data; | ||
639 | int time_left; | ||
640 | u8 intid; | ||
641 | |||
642 | time_left = wait_for_completion_timeout(&priv->ready, | ||
643 | msecs_to_jiffies(48)); | ||
644 | |||
645 | if (!time_left) { | ||
646 | twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &intid, | ||
647 | TWL6040_REG_INTID); | ||
648 | if (!(intid & TWL6040_READYINT)) { | ||
649 | dev_err(codec->dev, "timeout waiting for READYINT\n"); | ||
650 | return -ETIMEDOUT; | ||
651 | } | ||
652 | } | ||
653 | |||
654 | priv->codec_powered = 1; | ||
655 | |||
656 | return 0; | ||
657 | } | ||
658 | |||
659 | static int twl6040_set_bias_level(struct snd_soc_codec *codec, | ||
660 | enum snd_soc_bias_level level) | ||
661 | { | ||
662 | struct twl6040_data *priv = codec->private_data; | ||
663 | int audpwron = priv->audpwron; | ||
664 | int naudint = priv->naudint; | ||
665 | int ret; | ||
666 | |||
667 | switch (level) { | ||
668 | case SND_SOC_BIAS_ON: | ||
669 | break; | ||
670 | case SND_SOC_BIAS_PREPARE: | ||
671 | break; | ||
672 | case SND_SOC_BIAS_STANDBY: | ||
673 | if (priv->codec_powered) | ||
674 | break; | ||
675 | |||
676 | if (gpio_is_valid(audpwron)) { | ||
677 | /* use AUDPWRON line */ | ||
678 | gpio_set_value(audpwron, 1); | ||
679 | |||
680 | /* wait for power-up completion */ | ||
681 | ret = twl6040_power_up_completion(codec, naudint); | ||
682 | if (ret) | ||
683 | return ret; | ||
684 | |||
685 | /* sync registers updated during power-up sequence */ | ||
686 | twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL); | ||
687 | twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL); | ||
688 | twl6040_read_reg_volatile(codec, TWL6040_REG_LPPLLCTL); | ||
689 | } else { | ||
690 | /* use manual power-up sequence */ | ||
691 | twl6040_power_up(codec); | ||
692 | priv->codec_powered = 1; | ||
693 | } | ||
694 | |||
695 | /* initialize vdd/vss registers with reg_cache */ | ||
696 | twl6040_init_vdd_regs(codec); | ||
697 | break; | ||
698 | case SND_SOC_BIAS_OFF: | ||
699 | if (!priv->codec_powered) | ||
700 | break; | ||
701 | |||
702 | if (gpio_is_valid(audpwron)) { | ||
703 | /* use AUDPWRON line */ | ||
704 | gpio_set_value(audpwron, 0); | ||
705 | |||
706 | /* power-down sequence latency */ | ||
707 | udelay(500); | ||
708 | |||
709 | /* sync registers updated during power-down sequence */ | ||
710 | twl6040_read_reg_volatile(codec, TWL6040_REG_NCPCTL); | ||
711 | twl6040_read_reg_volatile(codec, TWL6040_REG_LDOCTL); | ||
712 | twl6040_write_reg_cache(codec, TWL6040_REG_LPPLLCTL, | ||
713 | 0x00); | ||
714 | } else { | ||
715 | /* use manual power-down sequence */ | ||
716 | twl6040_power_down(codec); | ||
717 | } | ||
718 | |||
719 | priv->codec_powered = 0; | ||
720 | break; | ||
721 | } | ||
722 | |||
723 | codec->bias_level = level; | ||
724 | |||
725 | return 0; | ||
726 | } | ||
727 | |||
728 | /* set of rates for each pll: low-power and high-performance */ | ||
729 | |||
730 | static unsigned int lp_rates[] = { | ||
731 | 88200, | ||
732 | 96000, | ||
733 | }; | ||
734 | |||
735 | static struct snd_pcm_hw_constraint_list lp_constraints = { | ||
736 | .count = ARRAY_SIZE(lp_rates), | ||
737 | .list = lp_rates, | ||
738 | }; | ||
739 | |||
740 | static unsigned int hp_rates[] = { | ||
741 | 96000, | ||
742 | }; | ||
743 | |||
744 | static struct snd_pcm_hw_constraint_list hp_constraints = { | ||
745 | .count = ARRAY_SIZE(hp_rates), | ||
746 | .list = hp_rates, | ||
747 | }; | ||
748 | |||
749 | static int twl6040_startup(struct snd_pcm_substream *substream, | ||
750 | struct snd_soc_dai *dai) | ||
751 | { | ||
752 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
753 | struct snd_soc_device *socdev = rtd->socdev; | ||
754 | struct snd_soc_codec *codec = socdev->card->codec; | ||
755 | struct twl6040_data *priv = codec->private_data; | ||
756 | |||
757 | if (!priv->sysclk) { | ||
758 | dev_err(codec->dev, | ||
759 | "no mclk configured, call set_sysclk() on init\n"); | ||
760 | return -EINVAL; | ||
761 | } | ||
762 | |||
763 | /* | ||
764 | * capture is not supported at 17.64 MHz, | ||
765 | * it's reserved for headset low-power playback scenario | ||
766 | */ | ||
767 | if ((priv->sysclk == 17640000) && substream->stream) { | ||
768 | dev_err(codec->dev, | ||
769 | "capture mode is not supported at %dHz\n", | ||
770 | priv->sysclk); | ||
771 | return -EINVAL; | ||
772 | } | ||
773 | |||
774 | snd_pcm_hw_constraint_list(substream->runtime, 0, | ||
775 | SNDRV_PCM_HW_PARAM_RATE, | ||
776 | priv->sysclk_constraints); | ||
777 | |||
778 | return 0; | ||
779 | } | ||
780 | |||
781 | static int twl6040_hw_params(struct snd_pcm_substream *substream, | ||
782 | struct snd_pcm_hw_params *params, | ||
783 | struct snd_soc_dai *dai) | ||
784 | { | ||
785 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
786 | struct snd_soc_device *socdev = rtd->socdev; | ||
787 | struct snd_soc_codec *codec = socdev->card->codec; | ||
788 | struct twl6040_data *priv = codec->private_data; | ||
789 | u8 lppllctl; | ||
790 | int rate; | ||
791 | |||
792 | /* nothing to do for high-perf pll, it supports only 48 kHz */ | ||
793 | if (priv->pll == TWL6040_HPPLL_ID) | ||
794 | return 0; | ||
795 | |||
796 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | ||
797 | |||
798 | rate = params_rate(params); | ||
799 | switch (rate) { | ||
800 | case 88200: | ||
801 | lppllctl |= TWL6040_LPLLFIN; | ||
802 | priv->sysclk = 17640000; | ||
803 | break; | ||
804 | case 96000: | ||
805 | lppllctl &= ~TWL6040_LPLLFIN; | ||
806 | priv->sysclk = 19200000; | ||
807 | break; | ||
808 | default: | ||
809 | dev_err(codec->dev, "unsupported rate %d\n", rate); | ||
810 | return -EINVAL; | ||
811 | } | ||
812 | |||
813 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
814 | |||
815 | return 0; | ||
816 | } | ||
817 | |||
818 | static int twl6040_trigger(struct snd_pcm_substream *substream, | ||
819 | int cmd, struct snd_soc_dai *dai) | ||
820 | { | ||
821 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | ||
822 | struct snd_soc_device *socdev = rtd->socdev; | ||
823 | struct snd_soc_codec *codec = socdev->card->codec; | ||
824 | struct twl6040_data *priv = codec->private_data; | ||
825 | |||
826 | switch (cmd) { | ||
827 | case SNDRV_PCM_TRIGGER_START: | ||
828 | case SNDRV_PCM_TRIGGER_RESUME: | ||
829 | /* | ||
830 | * low-power playback mode is restricted | ||
831 | * for headset path only | ||
832 | */ | ||
833 | if ((priv->sysclk == 17640000) && priv->non_lp) { | ||
834 | dev_err(codec->dev, | ||
835 | "some enabled paths aren't supported at %dHz\n", | ||
836 | priv->sysclk); | ||
837 | return -EPERM; | ||
838 | } | ||
839 | break; | ||
840 | default: | ||
841 | break; | ||
842 | } | ||
843 | |||
844 | return 0; | ||
845 | } | ||
846 | |||
847 | static int twl6040_set_dai_sysclk(struct snd_soc_dai *codec_dai, | ||
848 | int clk_id, unsigned int freq, int dir) | ||
849 | { | ||
850 | struct snd_soc_codec *codec = codec_dai->codec; | ||
851 | struct twl6040_data *priv = codec->private_data; | ||
852 | u8 hppllctl, lppllctl; | ||
853 | |||
854 | hppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_HPPLLCTL); | ||
855 | lppllctl = twl6040_read_reg_cache(codec, TWL6040_REG_LPPLLCTL); | ||
856 | |||
857 | switch (clk_id) { | ||
858 | case TWL6040_SYSCLK_SEL_LPPLL: | ||
859 | switch (freq) { | ||
860 | case 32768: | ||
861 | /* headset dac and driver must be in low-power mode */ | ||
862 | headset_power_mode(codec, 0); | ||
863 | |||
864 | /* clk32k input requires low-power pll */ | ||
865 | lppllctl |= TWL6040_LPLLENA; | ||
866 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
867 | mdelay(5); | ||
868 | lppllctl &= ~TWL6040_HPLLSEL; | ||
869 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
870 | hppllctl &= ~TWL6040_HPLLENA; | ||
871 | twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl); | ||
872 | break; | ||
873 | default: | ||
874 | dev_err(codec->dev, "unknown mclk freq %d\n", freq); | ||
875 | return -EINVAL; | ||
876 | } | ||
877 | |||
878 | /* lppll divider */ | ||
879 | switch (priv->sysclk) { | ||
880 | case 17640000: | ||
881 | lppllctl |= TWL6040_LPLLFIN; | ||
882 | break; | ||
883 | case 19200000: | ||
884 | lppllctl &= ~TWL6040_LPLLFIN; | ||
885 | break; | ||
886 | default: | ||
887 | /* sysclk not yet configured */ | ||
888 | lppllctl &= ~TWL6040_LPLLFIN; | ||
889 | priv->sysclk = 19200000; | ||
890 | break; | ||
891 | } | ||
892 | |||
893 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
894 | |||
895 | priv->pll = TWL6040_LPPLL_ID; | ||
896 | priv->sysclk_constraints = &lp_constraints; | ||
897 | break; | ||
898 | case TWL6040_SYSCLK_SEL_HPPLL: | ||
899 | hppllctl &= ~TWL6040_MCLK_MSK; | ||
900 | |||
901 | switch (freq) { | ||
902 | case 12000000: | ||
903 | /* mclk input, pll enabled */ | ||
904 | hppllctl |= TWL6040_MCLK_12000KHZ | | ||
905 | TWL6040_HPLLSQRBP | | ||
906 | TWL6040_HPLLENA; | ||
907 | break; | ||
908 | case 19200000: | ||
909 | /* mclk input, pll disabled */ | ||
910 | hppllctl |= TWL6040_MCLK_19200KHZ | | ||
911 | TWL6040_HPLLSQRBP | | ||
912 | TWL6040_HPLLBP; | ||
913 | break; | ||
914 | case 26000000: | ||
915 | /* mclk input, pll enabled */ | ||
916 | hppllctl |= TWL6040_MCLK_26000KHZ | | ||
917 | TWL6040_HPLLSQRBP | | ||
918 | TWL6040_HPLLENA; | ||
919 | break; | ||
920 | case 38400000: | ||
921 | /* clk slicer, pll disabled */ | ||
922 | hppllctl |= TWL6040_MCLK_38400KHZ | | ||
923 | TWL6040_HPLLSQRENA | | ||
924 | TWL6040_HPLLBP; | ||
925 | break; | ||
926 | default: | ||
927 | dev_err(codec->dev, "unknown mclk freq %d\n", freq); | ||
928 | return -EINVAL; | ||
929 | } | ||
930 | |||
931 | /* headset dac and driver must be in high-performance mode */ | ||
932 | headset_power_mode(codec, 1); | ||
933 | |||
934 | twl6040_write(codec, TWL6040_REG_HPPLLCTL, hppllctl); | ||
935 | udelay(500); | ||
936 | lppllctl |= TWL6040_HPLLSEL; | ||
937 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
938 | lppllctl &= ~TWL6040_LPLLENA; | ||
939 | twl6040_write(codec, TWL6040_REG_LPPLLCTL, lppllctl); | ||
940 | |||
941 | /* high-performance pll can provide only 19.2 MHz */ | ||
942 | priv->pll = TWL6040_HPPLL_ID; | ||
943 | priv->sysclk = 19200000; | ||
944 | priv->sysclk_constraints = &hp_constraints; | ||
945 | break; | ||
946 | default: | ||
947 | dev_err(codec->dev, "unknown clk_id %d\n", clk_id); | ||
948 | return -EINVAL; | ||
949 | } | ||
950 | |||
951 | return 0; | ||
952 | } | ||
953 | |||
954 | static struct snd_soc_dai_ops twl6040_dai_ops = { | ||
955 | .startup = twl6040_startup, | ||
956 | .hw_params = twl6040_hw_params, | ||
957 | .trigger = twl6040_trigger, | ||
958 | .set_sysclk = twl6040_set_dai_sysclk, | ||
959 | }; | ||
960 | |||
961 | struct snd_soc_dai twl6040_dai = { | ||
962 | .name = "twl6040", | ||
963 | .playback = { | ||
964 | .stream_name = "Playback", | ||
965 | .channels_min = 1, | ||
966 | .channels_max = 4, | ||
967 | .rates = TWL6040_RATES, | ||
968 | .formats = TWL6040_FORMATS, | ||
969 | }, | ||
970 | .capture = { | ||
971 | .stream_name = "Capture", | ||
972 | .channels_min = 1, | ||
973 | .channels_max = 2, | ||
974 | .rates = TWL6040_RATES, | ||
975 | .formats = TWL6040_FORMATS, | ||
976 | }, | ||
977 | .ops = &twl6040_dai_ops, | ||
978 | }; | ||
979 | EXPORT_SYMBOL_GPL(twl6040_dai); | ||
980 | |||
981 | #ifdef CONFIG_PM | ||
982 | static int twl6040_suspend(struct platform_device *pdev, pm_message_t state) | ||
983 | { | ||
984 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
985 | struct snd_soc_codec *codec = socdev->card->codec; | ||
986 | |||
987 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
988 | |||
989 | return 0; | ||
990 | } | ||
991 | |||
992 | static int twl6040_resume(struct platform_device *pdev) | ||
993 | { | ||
994 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
995 | struct snd_soc_codec *codec = socdev->card->codec; | ||
996 | |||
997 | twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
998 | twl6040_set_bias_level(codec, codec->suspend_bias_level); | ||
999 | |||
1000 | return 0; | ||
1001 | } | ||
1002 | #else | ||
1003 | #define twl6040_suspend NULL | ||
1004 | #define twl6040_resume NULL | ||
1005 | #endif | ||
1006 | |||
1007 | static struct snd_soc_codec *twl6040_codec; | ||
1008 | |||
1009 | static int twl6040_probe(struct platform_device *pdev) | ||
1010 | { | ||
1011 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
1012 | struct snd_soc_codec *codec; | ||
1013 | int ret = 0; | ||
1014 | |||
1015 | BUG_ON(!twl6040_codec); | ||
1016 | |||
1017 | codec = twl6040_codec; | ||
1018 | socdev->card->codec = codec; | ||
1019 | |||
1020 | /* register pcms */ | ||
1021 | ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); | ||
1022 | if (ret < 0) { | ||
1023 | dev_err(&pdev->dev, "failed to create pcms\n"); | ||
1024 | return ret; | ||
1025 | } | ||
1026 | |||
1027 | snd_soc_add_controls(codec, twl6040_snd_controls, | ||
1028 | ARRAY_SIZE(twl6040_snd_controls)); | ||
1029 | twl6040_add_widgets(codec); | ||
1030 | |||
1031 | if (ret < 0) { | ||
1032 | dev_err(&pdev->dev, "failed to register card\n"); | ||
1033 | goto card_err; | ||
1034 | } | ||
1035 | |||
1036 | return ret; | ||
1037 | |||
1038 | card_err: | ||
1039 | snd_soc_free_pcms(socdev); | ||
1040 | snd_soc_dapm_free(socdev); | ||
1041 | return ret; | ||
1042 | } | ||
1043 | |||
1044 | static int twl6040_remove(struct platform_device *pdev) | ||
1045 | { | ||
1046 | struct snd_soc_device *socdev = platform_get_drvdata(pdev); | ||
1047 | struct snd_soc_codec *codec = socdev->card->codec; | ||
1048 | |||
1049 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
1050 | snd_soc_free_pcms(socdev); | ||
1051 | snd_soc_dapm_free(socdev); | ||
1052 | kfree(codec); | ||
1053 | |||
1054 | return 0; | ||
1055 | } | ||
1056 | |||
1057 | struct snd_soc_codec_device soc_codec_dev_twl6040 = { | ||
1058 | .probe = twl6040_probe, | ||
1059 | .remove = twl6040_remove, | ||
1060 | .suspend = twl6040_suspend, | ||
1061 | .resume = twl6040_resume, | ||
1062 | }; | ||
1063 | EXPORT_SYMBOL_GPL(soc_codec_dev_twl6040); | ||
1064 | |||
1065 | static int __devinit twl6040_codec_probe(struct platform_device *pdev) | ||
1066 | { | ||
1067 | struct twl4030_codec_data *twl_codec = pdev->dev.platform_data; | ||
1068 | struct snd_soc_codec *codec; | ||
1069 | struct twl6040_data *priv; | ||
1070 | int audpwron, naudint; | ||
1071 | int ret = 0; | ||
1072 | |||
1073 | priv = kzalloc(sizeof(struct twl6040_data), GFP_KERNEL); | ||
1074 | if (priv == NULL) | ||
1075 | return -ENOMEM; | ||
1076 | |||
1077 | if (twl_codec) { | ||
1078 | audpwron = twl_codec->audpwron_gpio; | ||
1079 | naudint = twl_codec->naudint_irq; | ||
1080 | } else { | ||
1081 | audpwron = -EINVAL; | ||
1082 | naudint = 0; | ||
1083 | } | ||
1084 | |||
1085 | priv->audpwron = audpwron; | ||
1086 | priv->naudint = naudint; | ||
1087 | |||
1088 | codec = &priv->codec; | ||
1089 | codec->dev = &pdev->dev; | ||
1090 | twl6040_dai.dev = &pdev->dev; | ||
1091 | |||
1092 | codec->name = "twl6040"; | ||
1093 | codec->owner = THIS_MODULE; | ||
1094 | codec->read = twl6040_read_reg_cache; | ||
1095 | codec->write = twl6040_write; | ||
1096 | codec->set_bias_level = twl6040_set_bias_level; | ||
1097 | codec->private_data = priv; | ||
1098 | codec->dai = &twl6040_dai; | ||
1099 | codec->num_dai = 1; | ||
1100 | codec->reg_cache_size = ARRAY_SIZE(twl6040_reg); | ||
1101 | codec->reg_cache = kmemdup(twl6040_reg, sizeof(twl6040_reg), | ||
1102 | GFP_KERNEL); | ||
1103 | if (codec->reg_cache == NULL) { | ||
1104 | ret = -ENOMEM; | ||
1105 | goto cache_err; | ||
1106 | } | ||
1107 | |||
1108 | mutex_init(&codec->mutex); | ||
1109 | INIT_LIST_HEAD(&codec->dapm_widgets); | ||
1110 | INIT_LIST_HEAD(&codec->dapm_paths); | ||
1111 | init_completion(&priv->ready); | ||
1112 | |||
1113 | if (gpio_is_valid(audpwron)) { | ||
1114 | ret = gpio_request(audpwron, "audpwron"); | ||
1115 | if (ret) | ||
1116 | goto gpio1_err; | ||
1117 | |||
1118 | ret = gpio_direction_output(audpwron, 0); | ||
1119 | if (ret) | ||
1120 | goto gpio2_err; | ||
1121 | |||
1122 | priv->codec_powered = 0; | ||
1123 | } | ||
1124 | |||
1125 | if (naudint) { | ||
1126 | /* audio interrupt */ | ||
1127 | ret = request_threaded_irq(naudint, NULL, | ||
1128 | twl6040_naudint_handler, | ||
1129 | IRQF_TRIGGER_LOW | IRQF_ONESHOT, | ||
1130 | "twl6040_codec", codec); | ||
1131 | if (ret) | ||
1132 | goto gpio2_err; | ||
1133 | } else { | ||
1134 | if (gpio_is_valid(audpwron)) { | ||
1135 | /* enable only codec ready interrupt */ | ||
1136 | twl6040_write_reg_cache(codec, TWL6040_REG_INTMR, | ||
1137 | ~TWL6040_READYMSK & TWL6040_ALLINT_MSK); | ||
1138 | } else { | ||
1139 | /* no interrupts at all */ | ||
1140 | twl6040_write_reg_cache(codec, TWL6040_REG_INTMR, | ||
1141 | TWL6040_ALLINT_MSK); | ||
1142 | } | ||
1143 | } | ||
1144 | |||
1145 | /* init vio registers */ | ||
1146 | twl6040_init_vio_regs(codec); | ||
1147 | |||
1148 | /* power on device */ | ||
1149 | ret = twl6040_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | ||
1150 | if (ret) | ||
1151 | goto irq_err; | ||
1152 | |||
1153 | ret = snd_soc_register_codec(codec); | ||
1154 | if (ret) | ||
1155 | goto reg_err; | ||
1156 | |||
1157 | twl6040_codec = codec; | ||
1158 | |||
1159 | ret = snd_soc_register_dai(&twl6040_dai); | ||
1160 | if (ret) | ||
1161 | goto dai_err; | ||
1162 | |||
1163 | return 0; | ||
1164 | |||
1165 | dai_err: | ||
1166 | snd_soc_unregister_codec(codec); | ||
1167 | twl6040_codec = NULL; | ||
1168 | reg_err: | ||
1169 | twl6040_set_bias_level(codec, SND_SOC_BIAS_OFF); | ||
1170 | irq_err: | ||
1171 | if (naudint) | ||
1172 | free_irq(naudint, codec); | ||
1173 | gpio2_err: | ||
1174 | if (gpio_is_valid(audpwron)) | ||
1175 | gpio_free(audpwron); | ||
1176 | gpio1_err: | ||
1177 | kfree(codec->reg_cache); | ||
1178 | cache_err: | ||
1179 | kfree(priv); | ||
1180 | return ret; | ||
1181 | } | ||
1182 | |||
1183 | static int __devexit twl6040_codec_remove(struct platform_device *pdev) | ||
1184 | { | ||
1185 | struct twl6040_data *priv = twl6040_codec->private_data; | ||
1186 | int audpwron = priv->audpwron; | ||
1187 | int naudint = priv->naudint; | ||
1188 | |||
1189 | if (gpio_is_valid(audpwron)) | ||
1190 | gpio_free(audpwron); | ||
1191 | |||
1192 | if (naudint) | ||
1193 | free_irq(naudint, twl6040_codec); | ||
1194 | |||
1195 | snd_soc_unregister_dai(&twl6040_dai); | ||
1196 | snd_soc_unregister_codec(twl6040_codec); | ||
1197 | |||
1198 | kfree(twl6040_codec); | ||
1199 | twl6040_codec = NULL; | ||
1200 | |||
1201 | return 0; | ||
1202 | } | ||
1203 | |||
1204 | static struct platform_driver twl6040_codec_driver = { | ||
1205 | .driver = { | ||
1206 | .name = "twl6040_codec", | ||
1207 | .owner = THIS_MODULE, | ||
1208 | }, | ||
1209 | .probe = twl6040_codec_probe, | ||
1210 | .remove = __devexit_p(twl6040_codec_remove), | ||
1211 | }; | ||
1212 | |||
1213 | static int __init twl6040_codec_init(void) | ||
1214 | { | ||
1215 | return platform_driver_register(&twl6040_codec_driver); | ||
1216 | } | ||
1217 | module_init(twl6040_codec_init); | ||
1218 | |||
1219 | static void __exit twl6040_codec_exit(void) | ||
1220 | { | ||
1221 | platform_driver_unregister(&twl6040_codec_driver); | ||
1222 | } | ||
1223 | module_exit(twl6040_codec_exit); | ||
1224 | |||
1225 | MODULE_DESCRIPTION("ASoC TWL6040 codec driver"); | ||
1226 | MODULE_AUTHOR("Misael Lopez Cruz"); | ||
1227 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/twl6040.h b/sound/soc/codecs/twl6040.h new file mode 100644 index 000000000000..c472070a1da2 --- /dev/null +++ b/sound/soc/codecs/twl6040.h | |||
@@ -0,0 +1,141 @@ | |||
1 | /* | ||
2 | * ALSA SoC TWL6040 codec driver | ||
3 | * | ||
4 | * Author: Misael Lopez Cruz <x0052729@ti.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
18 | * 02110-1301 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #ifndef __TWL6040_H__ | ||
23 | #define __TWL6040_H__ | ||
24 | |||
25 | #define TWL6040_REG_ASICID 0x01 | ||
26 | #define TWL6040_REG_ASICREV 0x02 | ||
27 | #define TWL6040_REG_INTID 0x03 | ||
28 | #define TWL6040_REG_INTMR 0x04 | ||
29 | #define TWL6040_REG_NCPCTL 0x05 | ||
30 | #define TWL6040_REG_LDOCTL 0x06 | ||
31 | #define TWL6040_REG_HPPLLCTL 0x07 | ||
32 | #define TWL6040_REG_LPPLLCTL 0x08 | ||
33 | #define TWL6040_REG_LPPLLDIV 0x09 | ||
34 | #define TWL6040_REG_AMICBCTL 0x0A | ||
35 | #define TWL6040_REG_DMICBCTL 0x0B | ||
36 | #define TWL6040_REG_MICLCTL 0x0C | ||
37 | #define TWL6040_REG_MICRCTL 0x0D | ||
38 | #define TWL6040_REG_MICGAIN 0x0E | ||
39 | #define TWL6040_REG_LINEGAIN 0x0F | ||
40 | #define TWL6040_REG_HSLCTL 0x10 | ||
41 | #define TWL6040_REG_HSRCTL 0x11 | ||
42 | #define TWL6040_REG_HSGAIN 0x12 | ||
43 | #define TWL6040_REG_EARCTL 0x13 | ||
44 | #define TWL6040_REG_HFLCTL 0x14 | ||
45 | #define TWL6040_REG_HFLGAIN 0x15 | ||
46 | #define TWL6040_REG_HFRCTL 0x16 | ||
47 | #define TWL6040_REG_HFRGAIN 0x17 | ||
48 | #define TWL6040_REG_VIBCTLL 0x18 | ||
49 | #define TWL6040_REG_VIBDATL 0x19 | ||
50 | #define TWL6040_REG_VIBCTLR 0x1A | ||
51 | #define TWL6040_REG_VIBDATR 0x1B | ||
52 | #define TWL6040_REG_HKCTL1 0x1C | ||
53 | #define TWL6040_REG_HKCTL2 0x1D | ||
54 | #define TWL6040_REG_GPOCTL 0x1E | ||
55 | #define TWL6040_REG_ALB 0x1F | ||
56 | #define TWL6040_REG_DLB 0x20 | ||
57 | #define TWL6040_REG_TRIM1 0x28 | ||
58 | #define TWL6040_REG_TRIM2 0x29 | ||
59 | #define TWL6040_REG_TRIM3 0x2A | ||
60 | #define TWL6040_REG_HSOTRIM 0x2B | ||
61 | #define TWL6040_REG_HFOTRIM 0x2C | ||
62 | #define TWL6040_REG_ACCCTL 0x2D | ||
63 | #define TWL6040_REG_STATUS 0x2E | ||
64 | |||
65 | #define TWL6040_CACHEREGNUM (TWL6040_REG_STATUS + 1) | ||
66 | |||
67 | #define TWL6040_VIOREGNUM 18 | ||
68 | #define TWL6040_VDDREGNUM 21 | ||
69 | |||
70 | /* INTID (0x03) fields */ | ||
71 | |||
72 | #define TWL6040_THINT 0x01 | ||
73 | #define TWL6040_PLUGINT 0x02 | ||
74 | #define TWL6040_UNPLUGINT 0x04 | ||
75 | #define TWL6040_HOOKINT 0x08 | ||
76 | #define TWL6040_HFINT 0x10 | ||
77 | #define TWL6040_VIBINT 0x20 | ||
78 | #define TWL6040_READYINT 0x40 | ||
79 | |||
80 | /* INTMR (0x04) fields */ | ||
81 | |||
82 | #define TWL6040_READYMSK 0x40 | ||
83 | #define TWL6040_ALLINT_MSK 0x7B | ||
84 | |||
85 | /* NCPCTL (0x05) fields */ | ||
86 | |||
87 | #define TWL6040_NCPENA 0x01 | ||
88 | #define TWL6040_NCPOPEN 0x40 | ||
89 | |||
90 | /* LDOCTL (0x06) fields */ | ||
91 | |||
92 | #define TWL6040_LSLDOENA 0x01 | ||
93 | #define TWL6040_HSLDOENA 0x04 | ||
94 | #define TWL6040_REFENA 0x40 | ||
95 | #define TWL6040_OSCENA 0x80 | ||
96 | |||
97 | /* HPPLLCTL (0x07) fields */ | ||
98 | |||
99 | #define TWL6040_HPLLENA 0x01 | ||
100 | #define TWL6040_HPLLRST 0x02 | ||
101 | #define TWL6040_HPLLBP 0x04 | ||
102 | #define TWL6040_HPLLSQRENA 0x08 | ||
103 | #define TWL6040_HPLLSQRBP 0x10 | ||
104 | #define TWL6040_MCLK_12000KHZ (0 << 5) | ||
105 | #define TWL6040_MCLK_19200KHZ (1 << 5) | ||
106 | #define TWL6040_MCLK_26000KHZ (2 << 5) | ||
107 | #define TWL6040_MCLK_38400KHZ (3 << 5) | ||
108 | #define TWL6040_MCLK_MSK 0x60 | ||
109 | |||
110 | /* LPPLLCTL (0x08) fields */ | ||
111 | |||
112 | #define TWL6040_LPLLENA 0x01 | ||
113 | #define TWL6040_LPLLRST 0x02 | ||
114 | #define TWL6040_LPLLSEL 0x04 | ||
115 | #define TWL6040_LPLLFIN 0x08 | ||
116 | #define TWL6040_HPLLSEL 0x10 | ||
117 | |||
118 | /* HSLCTL (0x10) fields */ | ||
119 | |||
120 | #define TWL6040_HSDACMODEL 0x02 | ||
121 | #define TWL6040_HSDRVMODEL 0x08 | ||
122 | |||
123 | /* HSRCTL (0x11) fields */ | ||
124 | |||
125 | #define TWL6040_HSDACMODER 0x02 | ||
126 | #define TWL6040_HSDRVMODER 0x08 | ||
127 | |||
128 | /* ACCCTL (0x2D) fields */ | ||
129 | |||
130 | #define TWL6040_RESETSPLIT 0x04 | ||
131 | |||
132 | #define TWL6040_SYSCLK_SEL_LPPLL 1 | ||
133 | #define TWL6040_SYSCLK_SEL_HPPLL 2 | ||
134 | |||
135 | #define TWL6040_HPPLL_ID 1 | ||
136 | #define TWL6040_LPPLL_ID 2 | ||
137 | |||
138 | extern struct snd_soc_dai twl6040_dai; | ||
139 | extern struct snd_soc_codec_device soc_codec_dev_twl6040; | ||
140 | |||
141 | #endif /* End of __TWL6040_H__ */ | ||