diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-01-13 08:58:23 -0500 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-01-13 08:58:23 -0500 |
commit | 3e8e2cc45c9d6b5c1265838a8cff701815321dbc (patch) | |
tree | 708e85b74bac0427389d6f41e04522dfced1773c /sound/soc | |
parent | a193436c5d52e8398af22462beaa03407fa89b2e (diff) | |
parent | 7bd1fd8a96098b84664acdca5361defaf1e6ce9f (diff) |
Merge branch 'for-2.6.38' into for-2.6.39
Diffstat (limited to 'sound/soc')
-rw-r--r-- | sound/soc/codecs/Kconfig | 3 | ||||
-rw-r--r-- | sound/soc/codecs/Makefile | 2 | ||||
-rw-r--r-- | sound/soc/codecs/cs4270.c | 161 | ||||
-rw-r--r-- | sound/soc/codecs/dmic.c | 81 | ||||
-rw-r--r-- | sound/soc/codecs/tlv320dac33.c | 269 | ||||
-rw-r--r-- | sound/soc/codecs/tpa6130a2.c | 1 | ||||
-rw-r--r-- | sound/soc/codecs/twl6040.c | 8 | ||||
-rw-r--r-- | sound/soc/codecs/wm8995.c | 2 | ||||
-rw-r--r-- | sound/soc/omap/omap-mcbsp.c | 35 | ||||
-rw-r--r-- | sound/soc/omap/omap-mcbsp.h | 4 | ||||
-rw-r--r-- | sound/soc/samsung/rx1950_uda1380.c | 1 | ||||
-rw-r--r-- | sound/soc/sh/migor.c | 2 | ||||
-rw-r--r-- | sound/soc/soc-cache.c | 2 |
13 files changed, 286 insertions, 285 deletions
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig index fa42be529a73..61e36efbf279 100644 --- a/sound/soc/codecs/Kconfig +++ b/sound/soc/codecs/Kconfig | |||
@@ -168,6 +168,9 @@ config SND_SOC_L3 | |||
168 | config SND_SOC_DA7210 | 168 | config SND_SOC_DA7210 |
169 | tristate | 169 | tristate |
170 | 170 | ||
171 | config SND_SOC_DMIC | ||
172 | tristate | ||
173 | |||
171 | config SND_SOC_MAX98088 | 174 | config SND_SOC_MAX98088 |
172 | tristate | 175 | tristate |
173 | 176 | ||
diff --git a/sound/soc/codecs/Makefile b/sound/soc/codecs/Makefile index 76304d478912..333910a9f8fb 100644 --- a/sound/soc/codecs/Makefile +++ b/sound/soc/codecs/Makefile | |||
@@ -14,6 +14,7 @@ snd-soc-cs42l51-objs := cs42l51.o | |||
14 | snd-soc-cs4270-objs := cs4270.o | 14 | snd-soc-cs4270-objs := cs4270.o |
15 | snd-soc-cx20442-objs := cx20442.o | 15 | snd-soc-cx20442-objs := cx20442.o |
16 | snd-soc-da7210-objs := da7210.o | 16 | snd-soc-da7210-objs := da7210.o |
17 | snd-soc-dmic-objs := dmic.o | ||
17 | snd-soc-l3-objs := l3.o | 18 | snd-soc-l3-objs := l3.o |
18 | snd-soc-max98088-objs := max98088.o | 19 | snd-soc-max98088-objs := max98088.o |
19 | snd-soc-pcm3008-objs := pcm3008.o | 20 | snd-soc-pcm3008-objs := pcm3008.o |
@@ -93,6 +94,7 @@ obj-$(CONFIG_SND_SOC_CS42L51) += snd-soc-cs42l51.o | |||
93 | obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o | 94 | obj-$(CONFIG_SND_SOC_CS4270) += snd-soc-cs4270.o |
94 | obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o | 95 | obj-$(CONFIG_SND_SOC_CX20442) += snd-soc-cx20442.o |
95 | obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o | 96 | obj-$(CONFIG_SND_SOC_DA7210) += snd-soc-da7210.o |
97 | obj-$(CONFIG_SND_SOC_DMIC) += snd-soc-dmic.o | ||
96 | obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o | 98 | obj-$(CONFIG_SND_SOC_L3) += snd-soc-l3.o |
97 | obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o | 99 | obj-$(CONFIG_SND_SOC_JZ4740_CODEC) += snd-soc-jz4740-codec.o |
98 | obj-$(CONFIG_SND_SOC_MAX98088) += snd-soc-max98088.o | 100 | obj-$(CONFIG_SND_SOC_MAX98088) += snd-soc-max98088.o |
diff --git a/sound/soc/codecs/cs4270.c b/sound/soc/codecs/cs4270.c index 3a582caa6ef9..8b51245f2318 100644 --- a/sound/soc/codecs/cs4270.c +++ b/sound/soc/codecs/cs4270.c | |||
@@ -106,6 +106,21 @@ | |||
106 | #define CS4270_MUTE_DAC_A 0x01 | 106 | #define CS4270_MUTE_DAC_A 0x01 |
107 | #define CS4270_MUTE_DAC_B 0x02 | 107 | #define CS4270_MUTE_DAC_B 0x02 |
108 | 108 | ||
109 | /* Power-on default values for the registers | ||
110 | * | ||
111 | * This array contains the power-on default values of the registers, with the | ||
112 | * exception of the "CHIPID" register (01h). The lower four bits of that | ||
113 | * register contain the hardware revision, so it is treated as volatile. | ||
114 | * | ||
115 | * Also note that on the CS4270, the first readable register is 1, but ASoC | ||
116 | * assumes the first register is 0. Therfore, the array must have an entry for | ||
117 | * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't | ||
118 | * be read. | ||
119 | */ | ||
120 | static const u8 cs4270_default_reg_cache[CS4270_LASTREG + 1] = { | ||
121 | 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00 | ||
122 | }; | ||
123 | |||
109 | static const char *supply_names[] = { | 124 | static const char *supply_names[] = { |
110 | "va", "vd", "vlc" | 125 | "va", "vd", "vlc" |
111 | }; | 126 | }; |
@@ -178,6 +193,20 @@ static struct cs4270_mode_ratios cs4270_mode_ratios[] = { | |||
178 | /* The number of MCLK/LRCK ratios supported by the CS4270 */ | 193 | /* The number of MCLK/LRCK ratios supported by the CS4270 */ |
179 | #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) | 194 | #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios) |
180 | 195 | ||
196 | static int cs4270_reg_is_readable(unsigned int reg) | ||
197 | { | ||
198 | return (reg >= CS4270_FIRSTREG) && (reg <= CS4270_LASTREG); | ||
199 | } | ||
200 | |||
201 | static int cs4270_reg_is_volatile(unsigned int reg) | ||
202 | { | ||
203 | /* Unreadable registers are considered volatile */ | ||
204 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) | ||
205 | return 1; | ||
206 | |||
207 | return reg == CS4270_CHIPID; | ||
208 | } | ||
209 | |||
181 | /** | 210 | /** |
182 | * cs4270_set_dai_sysclk - determine the CS4270 samples rates. | 211 | * cs4270_set_dai_sysclk - determine the CS4270 samples rates. |
183 | * @codec_dai: the codec DAI | 212 | * @codec_dai: the codec DAI |
@@ -263,97 +292,6 @@ static int cs4270_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
263 | } | 292 | } |
264 | 293 | ||
265 | /** | 294 | /** |
266 | * cs4270_fill_cache - pre-fill the CS4270 register cache. | ||
267 | * @codec: the codec for this CS4270 | ||
268 | * | ||
269 | * This function fills in the CS4270 register cache by reading the register | ||
270 | * values from the hardware. | ||
271 | * | ||
272 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | ||
273 | * After the initial read to pre-fill the cache, the CS4270 never updates | ||
274 | * the register values, so we won't have a cache coherency problem. | ||
275 | * | ||
276 | * We use the auto-increment feature of the CS4270 to read all registers in | ||
277 | * one shot. | ||
278 | */ | ||
279 | static int cs4270_fill_cache(struct snd_soc_codec *codec) | ||
280 | { | ||
281 | u8 *cache = codec->reg_cache; | ||
282 | struct i2c_client *i2c_client = codec->control_data; | ||
283 | s32 length; | ||
284 | |||
285 | length = i2c_smbus_read_i2c_block_data(i2c_client, | ||
286 | CS4270_FIRSTREG | CS4270_I2C_INCR, CS4270_NUMREGS, cache); | ||
287 | |||
288 | if (length != CS4270_NUMREGS) { | ||
289 | dev_err(codec->dev, "i2c read failure, addr=0x%x\n", | ||
290 | i2c_client->addr); | ||
291 | return -EIO; | ||
292 | } | ||
293 | |||
294 | return 0; | ||
295 | } | ||
296 | |||
297 | /** | ||
298 | * cs4270_read_reg_cache - read from the CS4270 register cache. | ||
299 | * @codec: the codec for this CS4270 | ||
300 | * @reg: the register to read | ||
301 | * | ||
302 | * This function returns the value for a given register. It reads only from | ||
303 | * the register cache, not the hardware itself. | ||
304 | * | ||
305 | * This CS4270 registers are cached to avoid excessive I2C I/O operations. | ||
306 | * After the initial read to pre-fill the cache, the CS4270 never updates | ||
307 | * the register values, so we won't have a cache coherency problem. | ||
308 | */ | ||
309 | static unsigned int cs4270_read_reg_cache(struct snd_soc_codec *codec, | ||
310 | unsigned int reg) | ||
311 | { | ||
312 | u8 *cache = codec->reg_cache; | ||
313 | |||
314 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) | ||
315 | return -EIO; | ||
316 | |||
317 | return cache[reg - CS4270_FIRSTREG]; | ||
318 | } | ||
319 | |||
320 | /** | ||
321 | * cs4270_i2c_write - write to a CS4270 register via the I2C bus. | ||
322 | * @codec: the codec for this CS4270 | ||
323 | * @reg: the register to write | ||
324 | * @value: the value to write to the register | ||
325 | * | ||
326 | * This function writes the given value to the given CS4270 register, and | ||
327 | * also updates the register cache. | ||
328 | * | ||
329 | * Note that we don't use the hw_write function pointer of snd_soc_codec. | ||
330 | * That's because it's too clunky: the hw_write_t prototype does not match | ||
331 | * i2c_smbus_write_byte_data(), and it's just another layer of overhead. | ||
332 | */ | ||
333 | static int cs4270_i2c_write(struct snd_soc_codec *codec, unsigned int reg, | ||
334 | unsigned int value) | ||
335 | { | ||
336 | u8 *cache = codec->reg_cache; | ||
337 | |||
338 | if ((reg < CS4270_FIRSTREG) || (reg > CS4270_LASTREG)) | ||
339 | return -EIO; | ||
340 | |||
341 | /* Only perform an I2C operation if the new value is different */ | ||
342 | if (cache[reg - CS4270_FIRSTREG] != value) { | ||
343 | struct i2c_client *client = codec->control_data; | ||
344 | if (i2c_smbus_write_byte_data(client, reg, value)) { | ||
345 | dev_err(codec->dev, "i2c write failed\n"); | ||
346 | return -EIO; | ||
347 | } | ||
348 | |||
349 | /* We've written to the hardware, so update the cache */ | ||
350 | cache[reg - CS4270_FIRSTREG] = value; | ||
351 | } | ||
352 | |||
353 | return 0; | ||
354 | } | ||
355 | |||
356 | /** | ||
357 | * cs4270_hw_params - program the CS4270 with the given hardware parameters. | 295 | * cs4270_hw_params - program the CS4270 with the given hardware parameters. |
358 | * @substream: the audio stream | 296 | * @substream: the audio stream |
359 | * @params: the hardware parameters to set | 297 | * @params: the hardware parameters to set |
@@ -550,15 +488,16 @@ static struct snd_soc_dai_driver cs4270_dai = { | |||
550 | static int cs4270_probe(struct snd_soc_codec *codec) | 488 | static int cs4270_probe(struct snd_soc_codec *codec) |
551 | { | 489 | { |
552 | struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec); | 490 | struct cs4270_private *cs4270 = snd_soc_codec_get_drvdata(codec); |
553 | int i, ret, reg; | 491 | int i, ret; |
554 | 492 | ||
555 | codec->control_data = cs4270->control_data; | 493 | codec->control_data = cs4270->control_data; |
556 | 494 | ||
557 | /* The I2C interface is set up, so pre-fill our register cache */ | 495 | /* Tell ASoC what kind of I/O to use to read the registers. ASoC will |
558 | 496 | * then do the I2C transactions itself. | |
559 | ret = cs4270_fill_cache(codec); | 497 | */ |
498 | ret = snd_soc_codec_set_cache_io(codec, 8, 8, cs4270->control_type); | ||
560 | if (ret < 0) { | 499 | if (ret < 0) { |
561 | dev_err(codec->dev, "failed to fill register cache\n"); | 500 | dev_err(codec->dev, "failed to set cache I/O (ret=%i)\n", ret); |
562 | return ret; | 501 | return ret; |
563 | } | 502 | } |
564 | 503 | ||
@@ -567,10 +506,7 @@ static int cs4270_probe(struct snd_soc_codec *codec) | |||
567 | * this feature disabled by default. An application (e.g. alsactl) can | 506 | * this feature disabled by default. An application (e.g. alsactl) can |
568 | * re-enabled it by using the controls. | 507 | * re-enabled it by using the controls. |
569 | */ | 508 | */ |
570 | 509 | ret = snd_soc_update_bits(codec, CS4270_MUTE, CS4270_MUTE_AUTO, 0); | |
571 | reg = cs4270_read_reg_cache(codec, CS4270_MUTE); | ||
572 | reg &= ~CS4270_MUTE_AUTO; | ||
573 | ret = cs4270_i2c_write(codec, CS4270_MUTE, reg); | ||
574 | if (ret < 0) { | 510 | if (ret < 0) { |
575 | dev_err(codec->dev, "i2c write failed\n"); | 511 | dev_err(codec->dev, "i2c write failed\n"); |
576 | return ret; | 512 | return ret; |
@@ -581,10 +517,8 @@ static int cs4270_probe(struct snd_soc_codec *codec) | |||
581 | * playback has started. An application (e.g. alsactl) can | 517 | * playback has started. An application (e.g. alsactl) can |
582 | * re-enabled it by using the controls. | 518 | * re-enabled it by using the controls. |
583 | */ | 519 | */ |
584 | 520 | ret = snd_soc_update_bits(codec, CS4270_TRANS, | |
585 | reg = cs4270_read_reg_cache(codec, CS4270_TRANS); | 521 | CS4270_TRANS_SOFT | CS4270_TRANS_ZERO, 0); |
586 | reg &= ~(CS4270_TRANS_SOFT | CS4270_TRANS_ZERO); | ||
587 | ret = cs4270_i2c_write(codec, CS4270_TRANS, reg); | ||
588 | if (ret < 0) { | 522 | if (ret < 0) { |
589 | dev_err(codec->dev, "i2c write failed\n"); | 523 | dev_err(codec->dev, "i2c write failed\n"); |
590 | return ret; | 524 | return ret; |
@@ -707,15 +641,16 @@ static int cs4270_soc_resume(struct snd_soc_codec *codec) | |||
707 | * Assign this variable to the codec_dev field of the machine driver's | 641 | * Assign this variable to the codec_dev field of the machine driver's |
708 | * snd_soc_device structure. | 642 | * snd_soc_device structure. |
709 | */ | 643 | */ |
710 | static struct snd_soc_codec_driver soc_codec_device_cs4270 = { | 644 | static const struct snd_soc_codec_driver soc_codec_device_cs4270 = { |
711 | .probe = cs4270_probe, | 645 | .probe = cs4270_probe, |
712 | .remove = cs4270_remove, | 646 | .remove = cs4270_remove, |
713 | .suspend = cs4270_soc_suspend, | 647 | .suspend = cs4270_soc_suspend, |
714 | .resume = cs4270_soc_resume, | 648 | .resume = cs4270_soc_resume, |
715 | .read = cs4270_read_reg_cache, | 649 | .volatile_register = cs4270_reg_is_volatile, |
716 | .write = cs4270_i2c_write, | 650 | .readable_register = cs4270_reg_is_readable, |
717 | .reg_cache_size = CS4270_NUMREGS, | 651 | .reg_cache_size = CS4270_LASTREG + 1, |
718 | .reg_word_size = sizeof(u8), | 652 | .reg_word_size = sizeof(u8), |
653 | .reg_cache_default = cs4270_default_reg_cache, | ||
719 | }; | 654 | }; |
720 | 655 | ||
721 | /** | 656 | /** |
diff --git a/sound/soc/codecs/dmic.c b/sound/soc/codecs/dmic.c new file mode 100644 index 000000000000..57e9dac88d38 --- /dev/null +++ b/sound/soc/codecs/dmic.c | |||
@@ -0,0 +1,81 @@ | |||
1 | /* | ||
2 | * dmic.c -- SoC audio for Generic Digital MICs | ||
3 | * | ||
4 | * Author: Liam Girdwood <lrg@slimlogic.co.uk> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * version 2 as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, but | ||
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
13 | * General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
18 | * 02110-1301 USA | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #include <linux/platform_device.h> | ||
23 | #include <linux/slab.h> | ||
24 | #include <sound/core.h> | ||
25 | #include <sound/pcm.h> | ||
26 | #include <sound/soc.h> | ||
27 | #include <sound/soc-dapm.h> | ||
28 | |||
29 | static struct snd_soc_dai_driver dmic_dai = { | ||
30 | .name = "dmic-hifi", | ||
31 | .capture = { | ||
32 | .stream_name = "Capture", | ||
33 | .channels_min = 1, | ||
34 | .channels_max = 8, | ||
35 | .rates = SNDRV_PCM_RATE_CONTINUOUS, | ||
36 | .formats = SNDRV_PCM_FMTBIT_S32_LE | ||
37 | | SNDRV_PCM_FMTBIT_S24_LE | ||
38 | | SNDRV_PCM_FMTBIT_S16_LE, | ||
39 | }, | ||
40 | }; | ||
41 | |||
42 | static struct snd_soc_codec_driver soc_dmic = {}; | ||
43 | |||
44 | static int __devinit dmic_dev_probe(struct platform_device *pdev) | ||
45 | { | ||
46 | return snd_soc_register_codec(&pdev->dev, | ||
47 | &soc_dmic, &dmic_dai, 1); | ||
48 | } | ||
49 | |||
50 | static int __devexit dmic_dev_remove(struct platform_device *pdev) | ||
51 | { | ||
52 | snd_soc_unregister_codec(&pdev->dev); | ||
53 | return 0; | ||
54 | } | ||
55 | |||
56 | MODULE_ALIAS("platform:dmic-codec"); | ||
57 | |||
58 | static struct platform_driver dmic_driver = { | ||
59 | .driver = { | ||
60 | .name = "dmic-codec", | ||
61 | .owner = THIS_MODULE, | ||
62 | }, | ||
63 | .probe = dmic_dev_probe, | ||
64 | .remove = __devexit_p(dmic_dev_remove), | ||
65 | }; | ||
66 | |||
67 | static int __init dmic_init(void) | ||
68 | { | ||
69 | return platform_driver_register(&dmic_driver); | ||
70 | } | ||
71 | module_init(dmic_init); | ||
72 | |||
73 | static void __exit dmic_exit(void) | ||
74 | { | ||
75 | platform_driver_unregister(&dmic_driver); | ||
76 | } | ||
77 | module_exit(dmic_exit); | ||
78 | |||
79 | MODULE_DESCRIPTION("Generic DMIC driver"); | ||
80 | MODULE_AUTHOR("Liam Girdwood <lrg@slimlogic.co.uk>"); | ||
81 | MODULE_LICENSE("GPL"); | ||
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c index 776ac80cc1a8..71d7be8ac488 100644 --- a/sound/soc/codecs/tlv320dac33.c +++ b/sound/soc/codecs/tlv320dac33.c | |||
@@ -42,14 +42,15 @@ | |||
42 | #include <sound/tlv320dac33-plat.h> | 42 | #include <sound/tlv320dac33-plat.h> |
43 | #include "tlv320dac33.h" | 43 | #include "tlv320dac33.h" |
44 | 44 | ||
45 | #define DAC33_BUFFER_SIZE_BYTES 24576 /* bytes, 12288 16 bit words, | 45 | /* |
46 | * 6144 stereo */ | 46 | * The internal FIFO is 24576 bytes long |
47 | #define DAC33_BUFFER_SIZE_SAMPLES 6144 | 47 | * It can be configured to hold 16bit or 24bit samples |
48 | 48 | * In 16bit configuration the FIFO can hold 6144 stereo samples | |
49 | #define NSAMPLE_MAX 5700 | 49 | * In 24bit configuration the FIFO can hold 4096 stereo samples |
50 | 50 | */ | |
51 | #define MODE7_LTHR 10 | 51 | #define DAC33_FIFO_SIZE_16BIT 6144 |
52 | #define MODE7_UTHR (DAC33_BUFFER_SIZE_SAMPLES - 10) | 52 | #define DAC33_FIFO_SIZE_24BIT 4096 |
53 | #define DAC33_MODE7_MARGIN 10 /* Safety margin for FIFO in Mode7 */ | ||
53 | 54 | ||
54 | #define BURST_BASEFREQ_HZ 49152000 | 55 | #define BURST_BASEFREQ_HZ 49152000 |
55 | 56 | ||
@@ -99,16 +100,11 @@ struct tlv320dac33_priv { | |||
99 | unsigned int refclk; | 100 | unsigned int refclk; |
100 | 101 | ||
101 | unsigned int alarm_threshold; /* set to be half of LATENCY_TIME_MS */ | 102 | unsigned int alarm_threshold; /* set to be half of LATENCY_TIME_MS */ |
102 | unsigned int nsample_min; /* nsample should not be lower than | ||
103 | * this */ | ||
104 | unsigned int nsample_max; /* nsample should not be higher than | ||
105 | * this */ | ||
106 | enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */ | 103 | enum dac33_fifo_modes fifo_mode;/* FIFO mode selection */ |
104 | unsigned int fifo_size; /* Size of the FIFO in samples */ | ||
107 | unsigned int nsample; /* burst read amount from host */ | 105 | unsigned int nsample; /* burst read amount from host */ |
108 | int mode1_latency; /* latency caused by the i2c writes in | 106 | int mode1_latency; /* latency caused by the i2c writes in |
109 | * us */ | 107 | * us */ |
110 | int auto_fifo_config; /* Configure the FIFO based on the | ||
111 | * period size */ | ||
112 | u8 burst_bclkdiv; /* BCLK divider value in burst mode */ | 108 | u8 burst_bclkdiv; /* BCLK divider value in burst mode */ |
113 | unsigned int burst_rate; /* Interface speed in Burst modes */ | 109 | unsigned int burst_rate; /* Interface speed in Burst modes */ |
114 | 110 | ||
@@ -302,7 +298,6 @@ static void dac33_init_chip(struct snd_soc_codec *codec) | |||
302 | if (unlikely(!dac33->chip_power)) | 298 | if (unlikely(!dac33->chip_power)) |
303 | return; | 299 | return; |
304 | 300 | ||
305 | /* 44-46: DAC Control Registers */ | ||
306 | /* A : DAC sample rate Fsref/1.5 */ | 301 | /* A : DAC sample rate Fsref/1.5 */ |
307 | dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0)); | 302 | dac33_write(codec, DAC33_DAC_CTRL_A, DAC33_DACRATE(0)); |
308 | /* B : DAC src=normal, not muted */ | 303 | /* B : DAC src=normal, not muted */ |
@@ -325,6 +320,10 @@ static void dac33_init_chip(struct snd_soc_codec *codec) | |||
325 | dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL)); | 320 | dac33_read_reg_cache(codec, DAC33_LINEL_TO_LLO_VOL)); |
326 | dac33_write(codec, DAC33_LINER_TO_RLO_VOL, | 321 | dac33_write(codec, DAC33_LINER_TO_RLO_VOL, |
327 | dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL)); | 322 | dac33_read_reg_cache(codec, DAC33_LINER_TO_RLO_VOL)); |
323 | |||
324 | dac33_write(codec, DAC33_OUT_AMP_CTRL, | ||
325 | dac33_read_reg_cache(codec, DAC33_OUT_AMP_CTRL)); | ||
326 | |||
328 | } | 327 | } |
329 | 328 | ||
330 | static inline int dac33_read_id(struct snd_soc_codec *codec) | 329 | static inline int dac33_read_id(struct snd_soc_codec *codec) |
@@ -436,73 +435,6 @@ static int dac33_playback_event(struct snd_soc_dapm_widget *w, | |||
436 | return 0; | 435 | return 0; |
437 | } | 436 | } |
438 | 437 | ||
439 | static int dac33_get_nsample(struct snd_kcontrol *kcontrol, | ||
440 | struct snd_ctl_elem_value *ucontrol) | ||
441 | { | ||
442 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | ||
443 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); | ||
444 | |||
445 | ucontrol->value.integer.value[0] = dac33->nsample; | ||
446 | |||
447 | return 0; | ||
448 | } | ||
449 | |||
450 | static int dac33_set_nsample(struct snd_kcontrol *kcontrol, | ||
451 | struct snd_ctl_elem_value *ucontrol) | ||
452 | { | ||
453 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | ||
454 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); | ||
455 | int ret = 0; | ||
456 | |||
457 | if (dac33->nsample == ucontrol->value.integer.value[0]) | ||
458 | return 0; | ||
459 | |||
460 | if (ucontrol->value.integer.value[0] < dac33->nsample_min || | ||
461 | ucontrol->value.integer.value[0] > dac33->nsample_max) { | ||
462 | ret = -EINVAL; | ||
463 | } else { | ||
464 | dac33->nsample = ucontrol->value.integer.value[0]; | ||
465 | /* Re calculate the burst time */ | ||
466 | dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate, | ||
467 | dac33->nsample); | ||
468 | } | ||
469 | |||
470 | return ret; | ||
471 | } | ||
472 | |||
473 | static int dac33_get_uthr(struct snd_kcontrol *kcontrol, | ||
474 | struct snd_ctl_elem_value *ucontrol) | ||
475 | { | ||
476 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | ||
477 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); | ||
478 | |||
479 | ucontrol->value.integer.value[0] = dac33->uthr; | ||
480 | |||
481 | return 0; | ||
482 | } | ||
483 | |||
484 | static int dac33_set_uthr(struct snd_kcontrol *kcontrol, | ||
485 | struct snd_ctl_elem_value *ucontrol) | ||
486 | { | ||
487 | struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); | ||
488 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); | ||
489 | int ret = 0; | ||
490 | |||
491 | if (dac33->substream) | ||
492 | return -EBUSY; | ||
493 | |||
494 | if (dac33->uthr == ucontrol->value.integer.value[0]) | ||
495 | return 0; | ||
496 | |||
497 | if (ucontrol->value.integer.value[0] < (MODE7_LTHR + 10) || | ||
498 | ucontrol->value.integer.value[0] > MODE7_UTHR) | ||
499 | ret = -EINVAL; | ||
500 | else | ||
501 | dac33->uthr = ucontrol->value.integer.value[0]; | ||
502 | |||
503 | return ret; | ||
504 | } | ||
505 | |||
506 | static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol, | 438 | static int dac33_get_fifo_mode(struct snd_kcontrol *kcontrol, |
507 | struct snd_ctl_elem_value *ucontrol) | 439 | struct snd_ctl_elem_value *ucontrol) |
508 | { | 440 | { |
@@ -587,13 +519,6 @@ static const struct snd_kcontrol_new dac33_mode_snd_controls[] = { | |||
587 | dac33_get_fifo_mode, dac33_set_fifo_mode), | 519 | dac33_get_fifo_mode, dac33_set_fifo_mode), |
588 | }; | 520 | }; |
589 | 521 | ||
590 | static const struct snd_kcontrol_new dac33_fifo_snd_controls[] = { | ||
591 | SOC_SINGLE_EXT("nSample", 0, 0, 5900, 0, | ||
592 | dac33_get_nsample, dac33_set_nsample), | ||
593 | SOC_SINGLE_EXT("UTHR", 0, 0, MODE7_UTHR, 0, | ||
594 | dac33_get_uthr, dac33_set_uthr), | ||
595 | }; | ||
596 | |||
597 | /* Analog bypass */ | 522 | /* Analog bypass */ |
598 | static const struct snd_kcontrol_new dac33_dapm_abypassl_control = | 523 | static const struct snd_kcontrol_new dac33_dapm_abypassl_control = |
599 | SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1); | 524 | SOC_DAPM_SINGLE("Switch", DAC33_LINEL_TO_LLO_VOL, 7, 1, 1); |
@@ -601,6 +526,25 @@ static const struct snd_kcontrol_new dac33_dapm_abypassl_control = | |||
601 | static const struct snd_kcontrol_new dac33_dapm_abypassr_control = | 526 | static const struct snd_kcontrol_new dac33_dapm_abypassr_control = |
602 | SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1); | 527 | SOC_DAPM_SINGLE("Switch", DAC33_LINER_TO_RLO_VOL, 7, 1, 1); |
603 | 528 | ||
529 | /* LOP L/R invert selection */ | ||
530 | static const char *dac33_lr_lom_texts[] = {"DAC", "LOP"}; | ||
531 | |||
532 | static const struct soc_enum dac33_left_lom_enum = | ||
533 | SOC_ENUM_SINGLE(DAC33_OUT_AMP_CTRL, 3, | ||
534 | ARRAY_SIZE(dac33_lr_lom_texts), | ||
535 | dac33_lr_lom_texts); | ||
536 | |||
537 | static const struct snd_kcontrol_new dac33_dapm_left_lom_control = | ||
538 | SOC_DAPM_ENUM("Route", dac33_left_lom_enum); | ||
539 | |||
540 | static const struct soc_enum dac33_right_lom_enum = | ||
541 | SOC_ENUM_SINGLE(DAC33_OUT_AMP_CTRL, 2, | ||
542 | ARRAY_SIZE(dac33_lr_lom_texts), | ||
543 | dac33_lr_lom_texts); | ||
544 | |||
545 | static const struct snd_kcontrol_new dac33_dapm_right_lom_control = | ||
546 | SOC_DAPM_ENUM("Route", dac33_right_lom_enum); | ||
547 | |||
604 | static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = { | 548 | static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = { |
605 | SND_SOC_DAPM_OUTPUT("LEFT_LO"), | 549 | SND_SOC_DAPM_OUTPUT("LEFT_LO"), |
606 | SND_SOC_DAPM_OUTPUT("RIGHT_LO"), | 550 | SND_SOC_DAPM_OUTPUT("RIGHT_LO"), |
@@ -617,6 +561,18 @@ static const struct snd_soc_dapm_widget dac33_dapm_widgets[] = { | |||
617 | SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0, | 561 | SND_SOC_DAPM_SWITCH("Analog Right Bypass", SND_SOC_NOPM, 0, 0, |
618 | &dac33_dapm_abypassr_control), | 562 | &dac33_dapm_abypassr_control), |
619 | 563 | ||
564 | SND_SOC_DAPM_MUX("Left LOM Inverted From", SND_SOC_NOPM, 0, 0, | ||
565 | &dac33_dapm_left_lom_control), | ||
566 | SND_SOC_DAPM_MUX("Right LOM Inverted From", SND_SOC_NOPM, 0, 0, | ||
567 | &dac33_dapm_right_lom_control), | ||
568 | /* | ||
569 | * For DAPM path, when only the anlog bypass path is enabled, and the | ||
570 | * LOP inverted from the corresponding DAC side. | ||
571 | * This is needed, so we can attach the DAC power supply in this case. | ||
572 | */ | ||
573 | SND_SOC_DAPM_PGA("Left Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
574 | SND_SOC_DAPM_PGA("Right Bypass PGA", SND_SOC_NOPM, 0, 0, NULL, 0), | ||
575 | |||
620 | SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier", | 576 | SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Left Amplifier", |
621 | DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0), | 577 | DAC33_OUT_AMP_PWR_CTRL, 6, 3, 3, 0), |
622 | SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier", | 578 | SND_SOC_DAPM_REG(snd_soc_dapm_mixer, "Output Right Amplifier", |
@@ -639,11 +595,22 @@ static const struct snd_soc_dapm_route audio_map[] = { | |||
639 | {"Output Left Amplifier", NULL, "DACL"}, | 595 | {"Output Left Amplifier", NULL, "DACL"}, |
640 | {"Output Right Amplifier", NULL, "DACR"}, | 596 | {"Output Right Amplifier", NULL, "DACR"}, |
641 | 597 | ||
642 | {"Output Left Amplifier", NULL, "Analog Left Bypass"}, | 598 | {"Left Bypass PGA", NULL, "Analog Left Bypass"}, |
643 | {"Output Right Amplifier", NULL, "Analog Right Bypass"}, | 599 | {"Right Bypass PGA", NULL, "Analog Right Bypass"}, |
644 | 600 | ||
645 | {"Output Left Amplifier", NULL, "Left DAC Power"}, | 601 | {"Left LOM Inverted From", "DAC", "Left Bypass PGA"}, |
646 | {"Output Right Amplifier", NULL, "Right DAC Power"}, | 602 | {"Right LOM Inverted From", "DAC", "Right Bypass PGA"}, |
603 | {"Left LOM Inverted From", "LOP", "Analog Left Bypass"}, | ||
604 | {"Right LOM Inverted From", "LOP", "Analog Right Bypass"}, | ||
605 | |||
606 | {"Output Left Amplifier", NULL, "Left LOM Inverted From"}, | ||
607 | {"Output Right Amplifier", NULL, "Right LOM Inverted From"}, | ||
608 | |||
609 | {"DACL", NULL, "Left DAC Power"}, | ||
610 | {"DACR", NULL, "Right DAC Power"}, | ||
611 | |||
612 | {"Left Bypass PGA", NULL, "Left DAC Power"}, | ||
613 | {"Right Bypass PGA", NULL, "Right DAC Power"}, | ||
647 | 614 | ||
648 | /* output */ | 615 | /* output */ |
649 | {"LEFT_LO", NULL, "Output Left Amplifier"}, | 616 | {"LEFT_LO", NULL, "Output Left Amplifier"}, |
@@ -732,7 +699,7 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33) | |||
732 | spin_unlock_irq(&dac33->lock); | 699 | spin_unlock_irq(&dac33->lock); |
733 | 700 | ||
734 | dac33_write16(codec, DAC33_PREFILL_MSB, | 701 | dac33_write16(codec, DAC33_PREFILL_MSB, |
735 | DAC33_THRREG(MODE7_LTHR)); | 702 | DAC33_THRREG(DAC33_MODE7_MARGIN)); |
736 | 703 | ||
737 | /* Enable Upper Threshold IRQ */ | 704 | /* Enable Upper Threshold IRQ */ |
738 | dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT); | 705 | dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MUT); |
@@ -842,6 +809,8 @@ static int dac33_startup(struct snd_pcm_substream *substream, | |||
842 | /* Stream started, save the substream pointer */ | 809 | /* Stream started, save the substream pointer */ |
843 | dac33->substream = substream; | 810 | dac33->substream = substream; |
844 | 811 | ||
812 | snd_pcm_hw_constraint_msbits(substream->runtime, 0, 32, 24); | ||
813 | |||
845 | return 0; | 814 | return 0; |
846 | } | 815 | } |
847 | 816 | ||
@@ -853,18 +822,17 @@ static void dac33_shutdown(struct snd_pcm_substream *substream, | |||
853 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); | 822 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); |
854 | 823 | ||
855 | dac33->substream = NULL; | 824 | dac33->substream = NULL; |
856 | |||
857 | /* Reset the nSample restrictions */ | ||
858 | dac33->nsample_min = 0; | ||
859 | dac33->nsample_max = NSAMPLE_MAX; | ||
860 | } | 825 | } |
861 | 826 | ||
827 | #define CALC_BURST_RATE(bclkdiv, bclk_per_sample) \ | ||
828 | (BURST_BASEFREQ_HZ / bclkdiv / bclk_per_sample) | ||
862 | static int dac33_hw_params(struct snd_pcm_substream *substream, | 829 | static int dac33_hw_params(struct snd_pcm_substream *substream, |
863 | struct snd_pcm_hw_params *params, | 830 | struct snd_pcm_hw_params *params, |
864 | struct snd_soc_dai *dai) | 831 | struct snd_soc_dai *dai) |
865 | { | 832 | { |
866 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 833 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
867 | struct snd_soc_codec *codec = rtd->codec; | 834 | struct snd_soc_codec *codec = rtd->codec; |
835 | struct tlv320dac33_priv *dac33 = snd_soc_codec_get_drvdata(codec); | ||
868 | 836 | ||
869 | /* Check parameters for validity */ | 837 | /* Check parameters for validity */ |
870 | switch (params_rate(params)) { | 838 | switch (params_rate(params)) { |
@@ -879,6 +847,12 @@ static int dac33_hw_params(struct snd_pcm_substream *substream, | |||
879 | 847 | ||
880 | switch (params_format(params)) { | 848 | switch (params_format(params)) { |
881 | case SNDRV_PCM_FORMAT_S16_LE: | 849 | case SNDRV_PCM_FORMAT_S16_LE: |
850 | dac33->fifo_size = DAC33_FIFO_SIZE_16BIT; | ||
851 | dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32); | ||
852 | break; | ||
853 | case SNDRV_PCM_FORMAT_S32_LE: | ||
854 | dac33->fifo_size = DAC33_FIFO_SIZE_24BIT; | ||
855 | dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64); | ||
882 | break; | 856 | break; |
883 | default: | 857 | default: |
884 | dev_err(codec->dev, "unsupported format %d\n", | 858 | dev_err(codec->dev, "unsupported format %d\n", |
@@ -933,6 +907,9 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
933 | aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16); | 907 | aictrl_a |= (DAC33_NCYCL_16 | DAC33_WLEN_16); |
934 | fifoctrl_a |= DAC33_WIDTH; | 908 | fifoctrl_a |= DAC33_WIDTH; |
935 | break; | 909 | break; |
910 | case SNDRV_PCM_FORMAT_S32_LE: | ||
911 | aictrl_a |= (DAC33_NCYCL_32 | DAC33_WLEN_24); | ||
912 | break; | ||
936 | default: | 913 | default: |
937 | dev_err(codec->dev, "unsupported format %d\n", | 914 | dev_err(codec->dev, "unsupported format %d\n", |
938 | substream->runtime->format); | 915 | substream->runtime->format); |
@@ -1067,7 +1044,10 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
1067 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, | 1044 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, |
1068 | dac33->burst_bclkdiv); | 1045 | dac33->burst_bclkdiv); |
1069 | else | 1046 | else |
1070 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32); | 1047 | if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE) |
1048 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 32); | ||
1049 | else | ||
1050 | dac33_write(codec, DAC33_SER_AUDIOIF_CTRL_C, 16); | ||
1071 | 1051 | ||
1072 | switch (dac33->fifo_mode) { | 1052 | switch (dac33->fifo_mode) { |
1073 | case DAC33_FIFO_MODE1: | 1053 | case DAC33_FIFO_MODE1: |
@@ -1080,7 +1060,8 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream) | |||
1080 | * at the bottom, and also at the top of the FIFO | 1060 | * at the bottom, and also at the top of the FIFO |
1081 | */ | 1061 | */ |
1082 | dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr)); | 1062 | dac33_write16(codec, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr)); |
1083 | dac33_write16(codec, DAC33_LTHR_MSB, DAC33_THRREG(MODE7_LTHR)); | 1063 | dac33_write16(codec, DAC33_LTHR_MSB, |
1064 | DAC33_THRREG(DAC33_MODE7_MARGIN)); | ||
1084 | break; | 1065 | break; |
1085 | default: | 1066 | default: |
1086 | break; | 1067 | break; |
@@ -1109,42 +1090,21 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream) | |||
1109 | /* Number of samples under i2c latency */ | 1090 | /* Number of samples under i2c latency */ |
1110 | dac33->alarm_threshold = US_TO_SAMPLES(rate, | 1091 | dac33->alarm_threshold = US_TO_SAMPLES(rate, |
1111 | dac33->mode1_latency); | 1092 | dac33->mode1_latency); |
1112 | nsample_limit = DAC33_BUFFER_SIZE_SAMPLES - | 1093 | nsample_limit = dac33->fifo_size - dac33->alarm_threshold; |
1113 | dac33->alarm_threshold; | 1094 | |
1114 | 1095 | if (period_size <= dac33->alarm_threshold) | |
1115 | if (dac33->auto_fifo_config) { | ||
1116 | if (period_size <= dac33->alarm_threshold) | ||
1117 | /* | ||
1118 | * Configure nSamaple to number of periods, | ||
1119 | * which covers the latency requironment. | ||
1120 | */ | ||
1121 | dac33->nsample = period_size * | ||
1122 | ((dac33->alarm_threshold / period_size) + | ||
1123 | (dac33->alarm_threshold % period_size ? | ||
1124 | 1 : 0)); | ||
1125 | else if (period_size > nsample_limit) | ||
1126 | dac33->nsample = nsample_limit; | ||
1127 | else | ||
1128 | dac33->nsample = period_size; | ||
1129 | } else { | ||
1130 | /* nSample time shall not be shorter than i2c latency */ | ||
1131 | dac33->nsample_min = dac33->alarm_threshold; | ||
1132 | /* | 1096 | /* |
1133 | * nSample should not be bigger than alsa buffer minus | 1097 | * Configure nSamaple to number of periods, |
1134 | * size of one period to avoid overruns | 1098 | * which covers the latency requironment. |
1135 | */ | 1099 | */ |
1136 | dac33->nsample_max = substream->runtime->buffer_size - | 1100 | dac33->nsample = period_size * |
1137 | period_size; | 1101 | ((dac33->alarm_threshold / period_size) + |
1138 | 1102 | (dac33->alarm_threshold % period_size ? | |
1139 | if (dac33->nsample_max > nsample_limit) | 1103 | 1 : 0)); |
1140 | dac33->nsample_max = nsample_limit; | 1104 | else if (period_size > nsample_limit) |
1141 | 1105 | dac33->nsample = nsample_limit; | |
1142 | /* Correct the nSample if it is outside of the ranges */ | 1106 | else |
1143 | if (dac33->nsample < dac33->nsample_min) | 1107 | dac33->nsample = period_size; |
1144 | dac33->nsample = dac33->nsample_min; | ||
1145 | if (dac33->nsample > dac33->nsample_max) | ||
1146 | dac33->nsample = dac33->nsample_max; | ||
1147 | } | ||
1148 | 1108 | ||
1149 | dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate, | 1109 | dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate, |
1150 | dac33->nsample); | 1110 | dac33->nsample); |
@@ -1152,19 +1112,16 @@ static void dac33_calculate_times(struct snd_pcm_substream *substream) | |||
1152 | dac33->t_stamp2 = 0; | 1112 | dac33->t_stamp2 = 0; |
1153 | break; | 1113 | break; |
1154 | case DAC33_FIFO_MODE7: | 1114 | case DAC33_FIFO_MODE7: |
1155 | if (dac33->auto_fifo_config) { | 1115 | dac33->uthr = UTHR_FROM_PERIOD_SIZE(period_size, rate, |
1156 | dac33->uthr = UTHR_FROM_PERIOD_SIZE( | 1116 | dac33->burst_rate) + 9; |
1157 | period_size, | 1117 | if (dac33->uthr > (dac33->fifo_size - DAC33_MODE7_MARGIN)) |
1158 | rate, | 1118 | dac33->uthr = dac33->fifo_size - DAC33_MODE7_MARGIN; |
1159 | dac33->burst_rate) + 9; | 1119 | if (dac33->uthr < (DAC33_MODE7_MARGIN + 10)) |
1160 | if (dac33->uthr > MODE7_UTHR) | 1120 | dac33->uthr = (DAC33_MODE7_MARGIN + 10); |
1161 | dac33->uthr = MODE7_UTHR; | 1121 | |
1162 | if (dac33->uthr < (MODE7_LTHR + 10)) | ||
1163 | dac33->uthr = (MODE7_LTHR + 10); | ||
1164 | } | ||
1165 | dac33->mode7_us_to_lthr = | 1122 | dac33->mode7_us_to_lthr = |
1166 | SAMPLES_TO_US(substream->runtime->rate, | 1123 | SAMPLES_TO_US(substream->runtime->rate, |
1167 | dac33->uthr - MODE7_LTHR + 1); | 1124 | dac33->uthr - DAC33_MODE7_MARGIN + 1); |
1168 | dac33->t_stamp1 = 0; | 1125 | dac33->t_stamp1 = 0; |
1169 | break; | 1126 | break; |
1170 | default: | 1127 | default: |
@@ -1282,8 +1239,8 @@ static snd_pcm_sframes_t dac33_dai_delay( | |||
1282 | samples += (samples_in - samples_out); | 1239 | samples += (samples_in - samples_out); |
1283 | 1240 | ||
1284 | if (likely(samples > 0)) | 1241 | if (likely(samples > 0)) |
1285 | delay = samples > DAC33_BUFFER_SIZE_SAMPLES ? | 1242 | delay = samples > dac33->fifo_size ? |
1286 | DAC33_BUFFER_SIZE_SAMPLES : samples; | 1243 | dac33->fifo_size : samples; |
1287 | else | 1244 | else |
1288 | delay = 0; | 1245 | delay = 0; |
1289 | } | 1246 | } |
@@ -1335,7 +1292,7 @@ static snd_pcm_sframes_t dac33_dai_delay( | |||
1335 | samples_in = US_TO_SAMPLES( | 1292 | samples_in = US_TO_SAMPLES( |
1336 | dac33->burst_rate, | 1293 | dac33->burst_rate, |
1337 | time_delta); | 1294 | time_delta); |
1338 | delay = MODE7_LTHR + samples_in - samples_out; | 1295 | delay = DAC33_MODE7_MARGIN + samples_in - samples_out; |
1339 | 1296 | ||
1340 | if (unlikely(delay > uthr)) | 1297 | if (unlikely(delay > uthr)) |
1341 | delay = uthr; | 1298 | delay = uthr; |
@@ -1486,14 +1443,10 @@ static int dac33_soc_probe(struct snd_soc_codec *codec) | |||
1486 | snd_soc_add_controls(codec, dac33_snd_controls, | 1443 | snd_soc_add_controls(codec, dac33_snd_controls, |
1487 | ARRAY_SIZE(dac33_snd_controls)); | 1444 | ARRAY_SIZE(dac33_snd_controls)); |
1488 | /* Only add the FIFO controls, if we have valid IRQ number */ | 1445 | /* Only add the FIFO controls, if we have valid IRQ number */ |
1489 | if (dac33->irq >= 0) { | 1446 | if (dac33->irq >= 0) |
1490 | snd_soc_add_controls(codec, dac33_mode_snd_controls, | 1447 | snd_soc_add_controls(codec, dac33_mode_snd_controls, |
1491 | ARRAY_SIZE(dac33_mode_snd_controls)); | 1448 | ARRAY_SIZE(dac33_mode_snd_controls)); |
1492 | /* FIFO usage controls only, if autoio config is not selected */ | 1449 | |
1493 | if (!dac33->auto_fifo_config) | ||
1494 | snd_soc_add_controls(codec, dac33_fifo_snd_controls, | ||
1495 | ARRAY_SIZE(dac33_fifo_snd_controls)); | ||
1496 | } | ||
1497 | dac33_add_widgets(codec); | 1450 | dac33_add_widgets(codec); |
1498 | 1451 | ||
1499 | err_power: | 1452 | err_power: |
@@ -1542,7 +1495,7 @@ static struct snd_soc_codec_driver soc_codec_dev_tlv320dac33 = { | |||
1542 | 1495 | ||
1543 | #define DAC33_RATES (SNDRV_PCM_RATE_44100 | \ | 1496 | #define DAC33_RATES (SNDRV_PCM_RATE_44100 | \ |
1544 | SNDRV_PCM_RATE_48000) | 1497 | SNDRV_PCM_RATE_48000) |
1545 | #define DAC33_FORMATS SNDRV_PCM_FMTBIT_S16_LE | 1498 | #define DAC33_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) |
1546 | 1499 | ||
1547 | static struct snd_soc_dai_ops dac33_dai_ops = { | 1500 | static struct snd_soc_dai_ops dac33_dai_ops = { |
1548 | .startup = dac33_startup, | 1501 | .startup = dac33_startup, |
@@ -1590,17 +1543,11 @@ static int __devinit dac33_i2c_probe(struct i2c_client *client, | |||
1590 | 1543 | ||
1591 | dac33->power_gpio = pdata->power_gpio; | 1544 | dac33->power_gpio = pdata->power_gpio; |
1592 | dac33->burst_bclkdiv = pdata->burst_bclkdiv; | 1545 | dac33->burst_bclkdiv = pdata->burst_bclkdiv; |
1593 | /* Pre calculate the burst rate */ | ||
1594 | dac33->burst_rate = BURST_BASEFREQ_HZ / dac33->burst_bclkdiv / 32; | ||
1595 | dac33->keep_bclk = pdata->keep_bclk; | 1546 | dac33->keep_bclk = pdata->keep_bclk; |
1596 | dac33->auto_fifo_config = pdata->auto_fifo_config; | ||
1597 | dac33->mode1_latency = pdata->mode1_latency; | 1547 | dac33->mode1_latency = pdata->mode1_latency; |
1598 | if (!dac33->mode1_latency) | 1548 | if (!dac33->mode1_latency) |
1599 | dac33->mode1_latency = 10000; /* 10ms */ | 1549 | dac33->mode1_latency = 10000; /* 10ms */ |
1600 | dac33->irq = client->irq; | 1550 | dac33->irq = client->irq; |
1601 | dac33->nsample = NSAMPLE_MAX; | ||
1602 | dac33->nsample_max = NSAMPLE_MAX; | ||
1603 | dac33->uthr = MODE7_UTHR; | ||
1604 | /* Disable FIFO use by default */ | 1551 | /* Disable FIFO use by default */ |
1605 | dac33->fifo_mode = DAC33_FIFO_BYPASS; | 1552 | dac33->fifo_mode = DAC33_FIFO_BYPASS; |
1606 | 1553 | ||
diff --git a/sound/soc/codecs/tpa6130a2.c b/sound/soc/codecs/tpa6130a2.c index 0a99f313e218..1f1ac8110bef 100644 --- a/sound/soc/codecs/tpa6130a2.c +++ b/sound/soc/codecs/tpa6130a2.c | |||
@@ -339,7 +339,6 @@ EXPORT_SYMBOL_GPL(tpa6130a2_stereo_enable); | |||
339 | int tpa6130a2_add_controls(struct snd_soc_codec *codec) | 339 | int tpa6130a2_add_controls(struct snd_soc_codec *codec) |
340 | { | 340 | { |
341 | struct tpa6130a2_data *data; | 341 | struct tpa6130a2_data *data; |
342 | struct snd_soc_dapm_context *dapm = &codec->dapm; | ||
343 | 342 | ||
344 | if (tpa6130a2_client == NULL) | 343 | if (tpa6130a2_client == NULL) |
345 | return -ENODEV; | 344 | return -ENODEV; |
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index 2f68f5949a63..4bbf1b15a493 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c | |||
@@ -1138,19 +1138,19 @@ static const struct snd_soc_dapm_widget twl6040_dapm_widgets[] = { | |||
1138 | SND_SOC_NOPM, 0, 0, &hsr_mux_controls), | 1138 | SND_SOC_NOPM, 0, 0, &hsr_mux_controls), |
1139 | 1139 | ||
1140 | /* Analog playback drivers */ | 1140 | /* Analog playback drivers */ |
1141 | SND_SOC_DAPM_PGA_E("Handsfree Left Driver", | 1141 | SND_SOC_DAPM_OUT_DRV_E("Handsfree Left Driver", |
1142 | TWL6040_REG_HFLCTL, 4, 0, NULL, 0, | 1142 | TWL6040_REG_HFLCTL, 4, 0, NULL, 0, |
1143 | pga_event, | 1143 | pga_event, |
1144 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | 1144 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
1145 | SND_SOC_DAPM_PGA_E("Handsfree Right Driver", | 1145 | SND_SOC_DAPM_OUT_DRV_E("Handsfree Right Driver", |
1146 | TWL6040_REG_HFRCTL, 4, 0, NULL, 0, | 1146 | TWL6040_REG_HFRCTL, 4, 0, NULL, 0, |
1147 | pga_event, | 1147 | pga_event, |
1148 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | 1148 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
1149 | SND_SOC_DAPM_PGA_E("Headset Left Driver", | 1149 | SND_SOC_DAPM_OUT_DRV_E("Headset Left Driver", |
1150 | TWL6040_REG_HSLCTL, 2, 0, NULL, 0, | 1150 | TWL6040_REG_HSLCTL, 2, 0, NULL, 0, |
1151 | pga_event, | 1151 | pga_event, |
1152 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | 1152 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
1153 | SND_SOC_DAPM_PGA_E("Headset Right Driver", | 1153 | SND_SOC_DAPM_OUT_DRV_E("Headset Right Driver", |
1154 | TWL6040_REG_HSRCTL, 2, 0, NULL, 0, | 1154 | TWL6040_REG_HSRCTL, 2, 0, NULL, 0, |
1155 | pga_event, | 1155 | pga_event, |
1156 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), | 1156 | SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), |
diff --git a/sound/soc/codecs/wm8995.c b/sound/soc/codecs/wm8995.c index 96e0dc09f203..ac210ccebd4b 100644 --- a/sound/soc/codecs/wm8995.c +++ b/sound/soc/codecs/wm8995.c | |||
@@ -30,7 +30,7 @@ | |||
30 | 30 | ||
31 | #include "wm8995.h" | 31 | #include "wm8995.h" |
32 | 32 | ||
33 | static const u16 wm8995_reg_defs[WM8995_MAX_REGISTER + 1] __devinitconst = { | 33 | static const u16 wm8995_reg_defs[WM8995_MAX_REGISTER + 1] = { |
34 | [0] = 0x8995, [5] = 0x0100, [16] = 0x000b, [17] = 0x000b, | 34 | [0] = 0x8995, [5] = 0x0100, [16] = 0x000b, [17] = 0x000b, |
35 | [24] = 0x02c0, [25] = 0x02c0, [26] = 0x02c0, [27] = 0x02c0, | 35 | [24] = 0x02c0, [25] = 0x02c0, [26] = 0x02c0, [27] = 0x02c0, |
36 | [28] = 0x000f, [32] = 0x0005, [33] = 0x0005, [40] = 0x0003, | 36 | [28] = 0x000f, [32] = 0x0005, [33] = 0x0005, [40] = 0x0003, |
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 7e84f24b9a88..d203f4da18a0 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c | |||
@@ -102,6 +102,17 @@ static const int omap24xx_dma_reqs[][2] = { | |||
102 | static const int omap24xx_dma_reqs[][2] = {}; | 102 | static const int omap24xx_dma_reqs[][2] = {}; |
103 | #endif | 103 | #endif |
104 | 104 | ||
105 | #if defined(CONFIG_ARCH_OMAP4) | ||
106 | static const int omap44xx_dma_reqs[][2] = { | ||
107 | { OMAP44XX_DMA_MCBSP1_TX, OMAP44XX_DMA_MCBSP1_RX }, | ||
108 | { OMAP44XX_DMA_MCBSP2_TX, OMAP44XX_DMA_MCBSP2_RX }, | ||
109 | { OMAP44XX_DMA_MCBSP3_TX, OMAP44XX_DMA_MCBSP3_RX }, | ||
110 | { OMAP44XX_DMA_MCBSP4_TX, OMAP44XX_DMA_MCBSP4_RX }, | ||
111 | }; | ||
112 | #else | ||
113 | static const int omap44xx_dma_reqs[][2] = {}; | ||
114 | #endif | ||
115 | |||
105 | #if defined(CONFIG_ARCH_OMAP2420) | 116 | #if defined(CONFIG_ARCH_OMAP2420) |
106 | static const unsigned long omap2420_mcbsp_port[][2] = { | 117 | static const unsigned long omap2420_mcbsp_port[][2] = { |
107 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, | 118 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, |
@@ -147,6 +158,21 @@ static const unsigned long omap34xx_mcbsp_port[][2] = { | |||
147 | static const unsigned long omap34xx_mcbsp_port[][2] = {}; | 158 | static const unsigned long omap34xx_mcbsp_port[][2] = {}; |
148 | #endif | 159 | #endif |
149 | 160 | ||
161 | #if defined(CONFIG_ARCH_OMAP4) | ||
162 | static const unsigned long omap44xx_mcbsp_port[][2] = { | ||
163 | { OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, | ||
164 | OMAP44XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, | ||
165 | { OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, | ||
166 | OMAP44XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, | ||
167 | { OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, | ||
168 | OMAP44XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, | ||
169 | { OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, | ||
170 | OMAP44XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, | ||
171 | }; | ||
172 | #else | ||
173 | static const unsigned long omap44xx_mcbsp_port[][2] = {}; | ||
174 | #endif | ||
175 | |||
150 | static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) | 176 | static void omap_mcbsp_set_threshold(struct snd_pcm_substream *substream) |
151 | { | 177 | { |
152 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 178 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
@@ -224,7 +250,7 @@ static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream, | |||
224 | * 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words) | 250 | * 2 channels (stereo): size is 128 / 2 = 64 frames (2 * 64 words) |
225 | * 4 channels: size is 128 / 4 = 32 frames (4 * 32 words) | 251 | * 4 channels: size is 128 / 4 = 32 frames (4 * 32 words) |
226 | */ | 252 | */ |
227 | if (cpu_is_omap343x()) { | 253 | if (cpu_is_omap343x() || cpu_is_omap44xx()) { |
228 | /* | 254 | /* |
229 | * Rule for the buffer size. We should not allow | 255 | * Rule for the buffer size. We should not allow |
230 | * smaller buffer than the FIFO size to avoid underruns | 256 | * smaller buffer than the FIFO size to avoid underruns |
@@ -332,6 +358,9 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, | |||
332 | } else if (cpu_is_omap343x()) { | 358 | } else if (cpu_is_omap343x()) { |
333 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; | 359 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; |
334 | port = omap34xx_mcbsp_port[bus_id][substream->stream]; | 360 | port = omap34xx_mcbsp_port[bus_id][substream->stream]; |
361 | } else if (cpu_is_omap44xx()) { | ||
362 | dma = omap44xx_dma_reqs[bus_id][substream->stream]; | ||
363 | port = omap44xx_mcbsp_port[bus_id][substream->stream]; | ||
335 | } else { | 364 | } else { |
336 | return -ENODEV; | 365 | return -ENODEV; |
337 | } | 366 | } |
@@ -498,11 +527,11 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, | |||
498 | regs->spcr2 |= XINTM(3) | FREE; | 527 | regs->spcr2 |= XINTM(3) | FREE; |
499 | regs->spcr1 |= RINTM(3); | 528 | regs->spcr1 |= RINTM(3); |
500 | /* RFIG and XFIG are not defined in 34xx */ | 529 | /* RFIG and XFIG are not defined in 34xx */ |
501 | if (!cpu_is_omap34xx()) { | 530 | if (!cpu_is_omap34xx() && !cpu_is_omap44xx()) { |
502 | regs->rcr2 |= RFIG; | 531 | regs->rcr2 |= RFIG; |
503 | regs->xcr2 |= XFIG; | 532 | regs->xcr2 |= XFIG; |
504 | } | 533 | } |
505 | if (cpu_is_omap2430() || cpu_is_omap34xx()) { | 534 | if (cpu_is_omap2430() || cpu_is_omap34xx() || cpu_is_omap44xx()) { |
506 | regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE; | 535 | regs->xccr = DXENDLY(1) | XDMAEN | XDISABLE; |
507 | regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE; | 536 | regs->rccr = RFULL_CYCLE | RDMAEN | RDISABLE; |
508 | } | 537 | } |
diff --git a/sound/soc/omap/omap-mcbsp.h b/sound/soc/omap/omap-mcbsp.h index ffdcc5abb7b9..110c106611d3 100644 --- a/sound/soc/omap/omap-mcbsp.h +++ b/sound/soc/omap/omap-mcbsp.h | |||
@@ -50,6 +50,10 @@ enum omap_mcbsp_div { | |||
50 | #undef NUM_LINKS | 50 | #undef NUM_LINKS |
51 | #define NUM_LINKS 3 | 51 | #define NUM_LINKS 3 |
52 | #endif | 52 | #endif |
53 | #if defined(CONFIG_ARCH_OMAP4) | ||
54 | #undef NUM_LINKS | ||
55 | #define NUM_LINKS 4 | ||
56 | #endif | ||
53 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) | 57 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) |
54 | #undef NUM_LINKS | 58 | #undef NUM_LINKS |
55 | #define NUM_LINKS 5 | 59 | #define NUM_LINKS 5 |
diff --git a/sound/soc/samsung/rx1950_uda1380.c b/sound/soc/samsung/rx1950_uda1380.c index 5f2479ce9dde..1e574a5d440d 100644 --- a/sound/soc/samsung/rx1950_uda1380.c +++ b/sound/soc/samsung/rx1950_uda1380.c | |||
@@ -235,6 +235,7 @@ static int rx1950_uda1380_init(struct snd_soc_pcm_runtime *rtd) | |||
235 | 235 | ||
236 | snd_soc_dapm_enable_pin(dapm, "Headphone Jack"); | 236 | snd_soc_dapm_enable_pin(dapm, "Headphone Jack"); |
237 | snd_soc_dapm_enable_pin(dapm, "Speaker"); | 237 | snd_soc_dapm_enable_pin(dapm, "Speaker"); |
238 | snd_soc_dapm_enable_pin(dapm, "Mic Jack"); | ||
238 | 239 | ||
239 | snd_soc_dapm_sync(dapm); | 240 | snd_soc_dapm_sync(dapm); |
240 | 241 | ||
diff --git a/sound/soc/sh/migor.c b/sound/soc/sh/migor.c index df13338cb3e2..6088a6a3238a 100644 --- a/sound/soc/sh/migor.c +++ b/sound/soc/sh/migor.c | |||
@@ -8,11 +8,11 @@ | |||
8 | * published by the Free Software Foundation. | 8 | * published by the Free Software Foundation. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/clkdev.h> | ||
11 | #include <linux/device.h> | 12 | #include <linux/device.h> |
12 | #include <linux/firmware.h> | 13 | #include <linux/firmware.h> |
13 | #include <linux/module.h> | 14 | #include <linux/module.h> |
14 | 15 | ||
15 | #include <asm/clkdev.h> | ||
16 | #include <asm/clock.h> | 16 | #include <asm/clock.h> |
17 | 17 | ||
18 | #include <cpu/sh7722.h> | 18 | #include <cpu/sh7722.h> |
diff --git a/sound/soc/soc-cache.c b/sound/soc/soc-cache.c index b2e333f5a388..1a36b36c5baa 100644 --- a/sound/soc/soc-cache.c +++ b/sound/soc/soc-cache.c | |||
@@ -1339,7 +1339,7 @@ static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec) | |||
1339 | goto err; | 1339 | goto err; |
1340 | } | 1340 | } |
1341 | lzo_blocks[i]->sync_bmp = sync_bmp; | 1341 | lzo_blocks[i]->sync_bmp = sync_bmp; |
1342 | lzo_blocks[i]->sync_bmp_nbits = reg_size; | 1342 | lzo_blocks[i]->sync_bmp_nbits = bmp_size; |
1343 | /* alloc the working space for the compressed block */ | 1343 | /* alloc the working space for the compressed block */ |
1344 | ret = snd_soc_lzo_prepare(lzo_blocks[i]); | 1344 | ret = snd_soc_lzo_prepare(lzo_blocks[i]); |
1345 | if (ret < 0) | 1345 | if (ret < 0) |