ASoC: tegra: Use flat regcache

When using an rbtree cache, there can be allocations the first time a
register is accessed.  This can cause an attempt to schedule while
atomic in the case that the regmap is using a spinlock.  This could be
fixed by either initializing all the registers or using a flat cache.
The register maps for tegra30_ahub and tegra30_i2s are dense and don't
save much from using a tree so convert them to flat.

Tegra30 changes tested on Norrin, Tegra20 changes compile.

Signed-off-by: Dylan Reid <dgreid@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

1 files changed, 2 insertions, 2 deletions

diff --git a/sound/soc/tegra/tegra30_ahub.c b/sound/soc/tegra/tegra30_ahub.c
index d6f4c9940e0c..0db68f49f4d9 100644
--- a/sound/soc/tegra/tegra30_ahub.c
+++ b/sound/soc/tegra/tegra30_ahub.c
@@ -471,7 +471,7 @@ static const struct regmap_config tegra30_ahub_apbif_regmap_config = {
         .readable_reg = tegra30_ahub_apbif_wr_rd_reg,
         .volatile_reg = tegra30_ahub_apbif_volatile_reg,
         .precious_reg = tegra30_ahub_apbif_precious_reg,
-        .cache_type = REGCACHE_RBTREE,
+        .cache_type = REGCACHE_FLAT,
 };
 
 static bool tegra30_ahub_ahub_wr_rd_reg(struct device *dev, unsigned int reg)
@@ -490,7 +490,7 @@ static const struct regmap_config tegra30_ahub_ahub_regmap_config = {
         .max_register = LAST_REG(AUDIO_RX),
         .writeable_reg = tegra30_ahub_ahub_wr_rd_reg,
         .readable_reg = tegra30_ahub_ahub_wr_rd_reg,
-        .cache_type = REGCACHE_RBTREE,
+        .cache_type = REGCACHE_FLAT,
 };
 
 static struct tegra30_ahub_soc_data soc_data_tegra30 = {