diff options
author | Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | 2010-12-03 03:36:24 -0500 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2010-12-03 07:23:14 -0500 |
commit | f7d711e3bb92fcf01ee14b7decf0059ac184efc2 (patch) | |
tree | f20a6b8089ac7fb4acaf6bc2ca295d2d1f5fb9c1 /sound/soc/sh/fsi.c | |
parent | c3acec2671cc448bc549b06b561ae2454238e9a0 (diff) |
ASoC: sh: fsi: clean up SPDIF defines
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/sh/fsi.c')
-rw-r--r-- | sound/soc/sh/fsi.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/sound/soc/sh/fsi.c b/sound/soc/sh/fsi.c index 507e709f2807..76ef3f34dd02 100644 --- a/sound/soc/sh/fsi.c +++ b/sound/soc/sh/fsi.c | |||
@@ -50,13 +50,20 @@ | |||
50 | 50 | ||
51 | /* DO_FMT */ | 51 | /* DO_FMT */ |
52 | /* DI_FMT */ | 52 | /* DI_FMT */ |
53 | #define CR_BWS_24 (0x0 << 20) /* FSI2 */ | ||
54 | #define CR_BWS_16 (0x1 << 20) /* FSI2 */ | ||
55 | #define CR_BWS_20 (0x2 << 20) /* FSI2 */ | ||
56 | |||
57 | #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */ | ||
58 | #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */ | ||
59 | #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */ | ||
60 | |||
53 | #define CR_MONO (0x0 << 4) | 61 | #define CR_MONO (0x0 << 4) |
54 | #define CR_MONO_D (0x1 << 4) | 62 | #define CR_MONO_D (0x1 << 4) |
55 | #define CR_PCM (0x2 << 4) | 63 | #define CR_PCM (0x2 << 4) |
56 | #define CR_I2S (0x3 << 4) | 64 | #define CR_I2S (0x3 << 4) |
57 | #define CR_TDM (0x4 << 4) | 65 | #define CR_TDM (0x4 << 4) |
58 | #define CR_TDM_D (0x5 << 4) | 66 | #define CR_TDM_D (0x5 << 4) |
59 | #define CR_SPDIF 0x00100120 | ||
60 | 67 | ||
61 | /* DOFF_CTL */ | 68 | /* DOFF_CTL */ |
62 | /* DIFF_CTL */ | 69 | /* DIFF_CTL */ |
@@ -93,6 +100,10 @@ | |||
93 | #define IR (1 << 4) /* Interrupt Reset */ | 100 | #define IR (1 << 4) /* Interrupt Reset */ |
94 | #define FSISR (1 << 0) /* Software Reset */ | 101 | #define FSISR (1 << 0) /* Software Reset */ |
95 | 102 | ||
103 | /* OUT_SEL (FSI2) */ | ||
104 | #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */ | ||
105 | /* 1: Biphase and serial */ | ||
106 | |||
96 | /* FIFO_SZ */ | 107 | /* FIFO_SZ */ |
97 | #define FIFO_SZ_MASK 0x7 | 108 | #define FIFO_SZ_MASK 0x7 |
98 | 109 | ||
@@ -828,10 +839,10 @@ static int fsi_dai_startup(struct snd_pcm_substream *substream, | |||
828 | dev_err(dai->dev, "This FSI can not use SPDIF\n"); | 839 | dev_err(dai->dev, "This FSI can not use SPDIF\n"); |
829 | return -EINVAL; | 840 | return -EINVAL; |
830 | } | 841 | } |
831 | data = CR_SPDIF; | 842 | data = CR_BWS_16 | CR_DTMD_SPDIF_PCM | CR_PCM; |
832 | io->chan_num = 2; | 843 | io->chan_num = 2; |
833 | fsi_spdif_clk_ctrl(fsi, 1); | 844 | fsi_spdif_clk_ctrl(fsi, 1); |
834 | fsi_reg_mask_set(fsi, OUT_SEL, 0x0010, 0x0010); | 845 | fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD); |
835 | break; | 846 | break; |
836 | default: | 847 | default: |
837 | dev_err(dai->dev, "unknown format.\n"); | 848 | dev_err(dai->dev, "unknown format.\n"); |