ASoC: correct s6000 I2S clock polarity

According to the data sheet data is clocked out on the falling edge
and latched on the rising edge of the bit clock. While the left sample
is transmitted the word clock line is low.

Signed-off-by: Daniel Glöckner <dg@emlix.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

1 files changed, 2 insertions, 2 deletions

diff --git a/sound/soc/s6000/s6000-i2s.c b/sound/soc/s6000/s6000-i2s.c
index dcc79040bdac..c5cda187ecab 100644
--- a/sound/soc/s6000/s6000-i2s.c
+++ b/sound/soc/s6000/s6000-i2s.c
@@ -252,10 +252,10 @@ static int s6000_i2s_set_dai_fmt(struct snd_soc_dai *cpu_dai,
         }
 
         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
-        case SND_SOC_DAIFMT_IB_IF:
+        case SND_SOC_DAIFMT_NB_NF:
                 w |= S6_I2S_LEFT_FIRST;
                 break;
-        case SND_SOC_DAIFMT_IB_NF:
+        case SND_SOC_DAIFMT_NB_IF:
                 w |= S6_I2S_RIGHT_FIRST;
                 break;
         default: