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authorMark Brown <broonie@opensource.wolfsonmicro.com>2012-06-25 04:52:59 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2012-06-25 04:52:59 -0400
commitd1e16c1a61d68692dba346f4a841315343b085f4 (patch)
tree249ec07d1489769fe83b4ec507708455cc0c5138 /sound/soc/pxa
parent1573ee81cb9ef24fa5acee6b7442e215e63ede2f (diff)
parent6b16351acbd415e66ba16bf7d473ece1574cf0bc (diff)
Merge tag 'v3.5-rc4' into for-3.6
Linux 3.5-rc4 contains some bug fixes which overlap with new features.
Diffstat (limited to 'sound/soc/pxa')
-rw-r--r--sound/soc/pxa/pxa-ssp.c38
1 files changed, 11 insertions, 27 deletions
diff --git a/sound/soc/pxa/pxa-ssp.c b/sound/soc/pxa/pxa-ssp.c
index 1c2aa7fab3fd..4da5fc55c7ee 100644
--- a/sound/soc/pxa/pxa-ssp.c
+++ b/sound/soc/pxa/pxa-ssp.c
@@ -33,7 +33,6 @@
33 33
34#include <mach/hardware.h> 34#include <mach/hardware.h>
35#include <mach/dma.h> 35#include <mach/dma.h>
36#include <mach/audio.h>
37 36
38#include "../../arm/pxa2xx-pcm.h" 37#include "../../arm/pxa2xx-pcm.h"
39#include "pxa-ssp.h" 38#include "pxa-ssp.h"
@@ -194,7 +193,7 @@ static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
194{ 193{
195 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0); 194 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
196 195
197 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) { 196 if (ssp->type == PXA25x_SSP) {
198 sscr0 &= ~0x0000ff00; 197 sscr0 &= ~0x0000ff00;
199 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */ 198 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
200 } else { 199 } else {
@@ -212,7 +211,7 @@ static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
212 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0); 211 u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
213 u32 div; 212 u32 div;
214 213
215 if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) 214 if (ssp->type == PXA25x_SSP)
216 div = ((sscr0 >> 8) & 0xff) * 2 + 2; 215 div = ((sscr0 >> 8) & 0xff) * 2 + 2;
217 else 216 else
218 div = ((sscr0 >> 8) & 0xfff) + 1; 217 div = ((sscr0 >> 8) & 0xfff) + 1;
@@ -242,7 +241,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
242 break; 241 break;
243 case PXA_SSP_CLK_PLL: 242 case PXA_SSP_CLK_PLL:
244 /* Internal PLL is fixed */ 243 /* Internal PLL is fixed */
245 if (cpu_is_pxa25x()) 244 if (ssp->type == PXA25x_SSP)
246 priv->sysclk = 1843200; 245 priv->sysclk = 1843200;
247 else 246 else
248 priv->sysclk = 13000000; 247 priv->sysclk = 13000000;
@@ -266,11 +265,11 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
266 265
267 /* The SSP clock must be disabled when changing SSP clock mode 266 /* The SSP clock must be disabled when changing SSP clock mode
268 * on PXA2xx. On PXA3xx it must be enabled when doing so. */ 267 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
269 if (!cpu_is_pxa3xx()) 268 if (ssp->type != PXA3xx_SSP)
270 clk_disable(ssp->clk); 269 clk_disable(ssp->clk);
271 val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0; 270 val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
272 pxa_ssp_write_reg(ssp, SSCR0, val); 271 pxa_ssp_write_reg(ssp, SSCR0, val);
273 if (!cpu_is_pxa3xx()) 272 if (ssp->type != PXA3xx_SSP)
274 clk_enable(ssp->clk); 273 clk_enable(ssp->clk);
275 274
276 return 0; 275 return 0;
@@ -294,24 +293,20 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
294 case PXA_SSP_AUDIO_DIV_SCDB: 293 case PXA_SSP_AUDIO_DIV_SCDB:
295 val = pxa_ssp_read_reg(ssp, SSACD); 294 val = pxa_ssp_read_reg(ssp, SSACD);
296 val &= ~SSACD_SCDB; 295 val &= ~SSACD_SCDB;
297#if defined(CONFIG_PXA3xx) 296 if (ssp->type == PXA3xx_SSP)
298 if (cpu_is_pxa3xx())
299 val &= ~SSACD_SCDX8; 297 val &= ~SSACD_SCDX8;
300#endif
301 switch (div) { 298 switch (div) {
302 case PXA_SSP_CLK_SCDB_1: 299 case PXA_SSP_CLK_SCDB_1:
303 val |= SSACD_SCDB; 300 val |= SSACD_SCDB;
304 break; 301 break;
305 case PXA_SSP_CLK_SCDB_4: 302 case PXA_SSP_CLK_SCDB_4:
306 break; 303 break;
307#if defined(CONFIG_PXA3xx)
308 case PXA_SSP_CLK_SCDB_8: 304 case PXA_SSP_CLK_SCDB_8:
309 if (cpu_is_pxa3xx()) 305 if (ssp->type == PXA3xx_SSP)
310 val |= SSACD_SCDX8; 306 val |= SSACD_SCDX8;
311 else 307 else
312 return -EINVAL; 308 return -EINVAL;
313 break; 309 break;
314#endif
315 default: 310 default:
316 return -EINVAL; 311 return -EINVAL;
317 } 312 }
@@ -337,10 +332,8 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
337 struct ssp_device *ssp = priv->ssp; 332 struct ssp_device *ssp = priv->ssp;
338 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70; 333 u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
339 334
340#if defined(CONFIG_PXA3xx) 335 if (ssp->type == PXA3xx_SSP)
341 if (cpu_is_pxa3xx())
342 pxa_ssp_write_reg(ssp, SSACDD, 0); 336 pxa_ssp_write_reg(ssp, SSACDD, 0);
343#endif
344 337
345 switch (freq_out) { 338 switch (freq_out) {
346 case 5622000: 339 case 5622000:
@@ -365,11 +358,10 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
365 break; 358 break;
366 359
367 default: 360 default:
368#ifdef CONFIG_PXA3xx
369 /* PXA3xx has a clock ditherer which can be used to generate 361 /* PXA3xx has a clock ditherer which can be used to generate
370 * a wider range of frequencies - calculate a value for it. 362 * a wider range of frequencies - calculate a value for it.
371 */ 363 */
372 if (cpu_is_pxa3xx()) { 364 if (ssp->type == PXA3xx_SSP) {
373 u32 val; 365 u32 val;
374 u64 tmp = 19968; 366 u64 tmp = 19968;
375 tmp *= 1000000; 367 tmp *= 1000000;
@@ -386,7 +378,6 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
386 val, freq_out); 378 val, freq_out);
387 break; 379 break;
388 } 380 }
389#endif
390 381
391 return -EINVAL; 382 return -EINVAL;
392 } 383 }
@@ -590,10 +581,8 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
590 /* bit size */ 581 /* bit size */
591 switch (params_format(params)) { 582 switch (params_format(params)) {
592 case SNDRV_PCM_FORMAT_S16_LE: 583 case SNDRV_PCM_FORMAT_S16_LE:
593#ifdef CONFIG_PXA3xx 584 if (ssp->type == PXA3xx_SSP)
594 if (cpu_is_pxa3xx())
595 sscr0 |= SSCR0_FPCKE; 585 sscr0 |= SSCR0_FPCKE;
596#endif
597 sscr0 |= SSCR0_DataSize(16); 586 sscr0 |= SSCR0_DataSize(16);
598 break; 587 break;
599 case SNDRV_PCM_FORMAT_S24_LE: 588 case SNDRV_PCM_FORMAT_S24_LE:
@@ -618,9 +607,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
618 * trying and failing a lot; some of the registers 607 * trying and failing a lot; some of the registers
619 * needed for that mode are only available on PXA3xx. 608 * needed for that mode are only available on PXA3xx.
620 */ 609 */
621 610 if (ssp->type != PXA3xx_SSP)
622#ifdef CONFIG_PXA3xx
623 if (!cpu_is_pxa3xx())
624 return -EINVAL; 611 return -EINVAL;
625 612
626 sspsp |= SSPSP_SFRMWDTH(width * 2); 613 sspsp |= SSPSP_SFRMWDTH(width * 2);
@@ -628,9 +615,6 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
628 sspsp |= SSPSP_EDMYSTOP(3); 615 sspsp |= SSPSP_EDMYSTOP(3);
629 sspsp |= SSPSP_DMYSTOP(3); 616 sspsp |= SSPSP_DMYSTOP(3);
630 sspsp |= SSPSP_DMYSTRT(1); 617 sspsp |= SSPSP_DMYSTRT(1);
631#else
632 return -EINVAL;
633#endif
634 } else { 618 } else {
635 /* The frame width is the width the LRCLK is 619 /* The frame width is the width the LRCLK is
636 * asserted for; the delay is expressed in 620 * asserted for; the delay is expressed in