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authorMark Brown <broonie@opensource.wolfsonmicro.com>2008-04-22 11:08:52 -0400
committerTakashi Iwai <tiwai@suse.de>2008-04-24 06:00:41 -0400
commit7a22323b231fe5d47804f98f31a70eb34c6104a9 (patch)
treeda5d3424f1fef8371a091fe82a4b3520df4279d6 /sound/soc/pxa/pxa2xx-ac97.c
parentd80fd0935e2c177ae58d85cb736684ff6c00314d (diff)
[ALSA] soc - Support PXA3xx AC97
The PXA3xx does not support the use of interrupts during reset and access to the GPIO status requires similar handling to that for PXA27x. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/soc/pxa/pxa2xx-ac97.c')
-rw-r--r--sound/soc/pxa/pxa2xx-ac97.c29
1 files changed, 27 insertions, 2 deletions
diff --git a/sound/soc/pxa/pxa2xx-ac97.c b/sound/soc/pxa/pxa2xx-ac97.c
index 1092d58e8523..97ec2d90547c 100644
--- a/sound/soc/pxa/pxa2xx-ac97.c
+++ b/sound/soc/pxa/pxa2xx-ac97.c
@@ -61,7 +61,7 @@ static unsigned short pxa2xx_ac97_read(struct snd_ac97 *ac97,
61 mutex_lock(&car_mutex); 61 mutex_lock(&car_mutex);
62 62
63 /* set up primary or secondary codec/modem space */ 63 /* set up primary or secondary codec/modem space */
64#ifdef CONFIG_PXA27x 64#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
65 reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE; 65 reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
66#else 66#else
67 if (reg == AC97_GPIO_STATUS) 67 if (reg == AC97_GPIO_STATUS)
@@ -111,7 +111,7 @@ static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
111 mutex_lock(&car_mutex); 111 mutex_lock(&car_mutex);
112 112
113 /* set up primary or secondary codec/modem space */ 113 /* set up primary or secondary codec/modem space */
114#ifdef CONFIG_PXA27x 114#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
115 reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE; 115 reg_addr = ac97->num ? &SAC_REG_BASE : &PAC_REG_BASE;
116#else 116#else
117 if (reg == AC97_GPIO_STATUS) 117 if (reg == AC97_GPIO_STATUS)
@@ -134,6 +134,9 @@ static void pxa2xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
134 134
135static void pxa2xx_ac97_warm_reset(struct snd_ac97 *ac97) 135static void pxa2xx_ac97_warm_reset(struct snd_ac97 *ac97)
136{ 136{
137#ifdef CONFIG_PXA3xx
138 int timeout = 100;
139#endif
137 gsr_bits = 0; 140 gsr_bits = 0;
138 141
139#ifdef CONFIG_PXA27x 142#ifdef CONFIG_PXA27x
@@ -144,6 +147,11 @@ static void pxa2xx_ac97_warm_reset(struct snd_ac97 *ac97)
144 GCR |= GCR_WARM_RST; 147 GCR |= GCR_WARM_RST;
145 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT); 148 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT);
146 udelay(500); 149 udelay(500);
150#elif defined(CONFIG_PXA3xx)
151 /* Can't use interrupts */
152 GCR |= GCR_WARM_RST;
153 while (!((GSR | gsr_bits) & (GSR_PCR | GSR_SCR)) && timeout--)
154 mdelay(1);
147#else 155#else
148 GCR |= GCR_WARM_RST | GCR_PRIRDY_IEN | GCR_SECRDY_IEN; 156 GCR |= GCR_WARM_RST | GCR_PRIRDY_IEN | GCR_SECRDY_IEN;
149 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1); 157 wait_event_timeout(gsr_wq, gsr_bits & (GSR_PCR | GSR_SCR), 1);
@@ -159,6 +167,16 @@ static void pxa2xx_ac97_warm_reset(struct snd_ac97 *ac97)
159 167
160static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97) 168static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97)
161{ 169{
170#ifdef CONFIG_PXA3xx
171 int timeout = 1000;
172
173 /* Hold CLKBPB for 100us */
174 GCR = 0;
175 GCR = GCR_CLKBPB;
176 udelay(100);
177 GCR = 0;
178#endif
179
162 GCR &= GCR_COLD_RST; /* clear everything but nCRST */ 180 GCR &= GCR_COLD_RST; /* clear everything but nCRST */
163 GCR &= ~GCR_COLD_RST; /* then assert nCRST */ 181 GCR &= ~GCR_COLD_RST; /* then assert nCRST */
164 182
@@ -170,6 +188,13 @@ static void pxa2xx_ac97_cold_reset(struct snd_ac97 *ac97)
170 clk_disable(ac97conf_clk); 188 clk_disable(ac97conf_clk);
171 GCR = GCR_COLD_RST; 189 GCR = GCR_COLD_RST;
172 udelay(50); 190 udelay(50);
191#elif defined(CONFIG_PXA3xx)
192 /* Can't use interrupts on PXA3xx */
193 GCR &= ~(GCR_PRIRDY_IEN|GCR_SECRDY_IEN);
194
195 GCR = GCR_WARM_RST | GCR_COLD_RST;
196 while (!(GSR & (GSR_PCR | GSR_SCR)) && timeout--)
197 mdelay(10);
173#else 198#else
174 GCR = GCR_COLD_RST; 199 GCR = GCR_COLD_RST;
175 GCR |= GCR_CDONE_IE|GCR_SDONE_IE; 200 GCR |= GCR_CDONE_IE|GCR_SDONE_IE;