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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2013-03-20 05:47:12 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2013-03-20 05:59:52 -0400
commit623766318aeb5f8dee83b2e8926c39cf83568197 (patch)
tree1ba1a06bac2e4f0a79b849c1231201c797cb86c2 /sound/soc/omap/omap-mcpdm.c
parent77c641d3468a66377752ee9ae06e65dee41fe804 (diff)
ASoC: omap-mcpdm: Collect link direction configuration under a struct
mcpdm_link_config will collect the link direction related configurations like channel masks, FIFO threshold. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/omap/omap-mcpdm.c')
-rw-r--r--sound/soc/omap/omap-mcpdm.c41
1 files changed, 24 insertions, 17 deletions
diff --git a/sound/soc/omap/omap-mcpdm.c b/sound/soc/omap/omap-mcpdm.c
index ddfcc1834ff0..6e19f440a28c 100644
--- a/sound/soc/omap/omap-mcpdm.c
+++ b/sound/soc/omap/omap-mcpdm.c
@@ -45,6 +45,11 @@
45 45
46#define OMAP44XX_MCPDM_L3_BASE 0x49032000 46#define OMAP44XX_MCPDM_L3_BASE 0x49032000
47 47
48struct mcpdm_link_config {
49 u32 link_mask; /* channel mask for the direction */
50 u32 threshold; /* FIFO threshold */
51};
52
48struct omap_mcpdm { 53struct omap_mcpdm {
49 struct device *dev; 54 struct device *dev;
50 unsigned long phys_base; 55 unsigned long phys_base;
@@ -53,13 +58,8 @@ struct omap_mcpdm {
53 58
54 struct mutex mutex; 59 struct mutex mutex;
55 60
56 /* channel data */ 61 /* Playback/Capture configuration */
57 u32 dn_channels; 62 struct mcpdm_link_config config[2];
58 u32 up_channels;
59
60 /* McPDM FIFO thresholds */
61 u32 dn_threshold;
62 u32 up_threshold;
63 63
64 /* McPDM dn offsets for rx1, and 2 channels */ 64 /* McPDM dn offsets for rx1, and 2 channels */
65 u32 dn_rx_offset; 65 u32 dn_rx_offset;
@@ -130,11 +130,12 @@ static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
130static void omap_mcpdm_start(struct omap_mcpdm *mcpdm) 130static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
131{ 131{
132 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL); 132 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
133 u32 link_mask = mcpdm->config[0].link_mask | mcpdm->config[1].link_mask;
133 134
134 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST); 135 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
135 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl); 136 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
136 137
137 ctrl |= mcpdm->dn_channels | mcpdm->up_channels; 138 ctrl |= link_mask;
138 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl); 139 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
139 140
140 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST); 141 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
@@ -148,11 +149,12 @@ static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
148static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm) 149static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
149{ 150{
150 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL); 151 u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
152 u32 link_mask = mcpdm->config[0].link_mask | mcpdm->config[1].link_mask;
151 153
152 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST); 154 ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
153 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl); 155 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
154 156
155 ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels); 157 ctrl &= ~(link_mask);
156 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl); 158 omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
157 159
158 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST); 160 ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
@@ -188,8 +190,10 @@ static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
188 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset); 190 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
189 } 191 }
190 192
191 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold); 193 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN,
192 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold); 194 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold);
195 omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP,
196 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold);
193 197
194 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET, 198 omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
195 MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE); 199 MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
@@ -296,6 +300,7 @@ static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
296 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai); 300 struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
297 int stream = substream->stream; 301 int stream = substream->stream;
298 struct omap_pcm_dma_data *dma_data; 302 struct omap_pcm_dma_data *dma_data;
303 u32 threshold;
299 int channels; 304 int channels;
300 int link_mask = 0; 305 int link_mask = 0;
301 306
@@ -325,15 +330,16 @@ static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
325 330
326 dma_data = snd_soc_dai_get_dma_data(dai, substream); 331 dma_data = snd_soc_dai_get_dma_data(dai, substream);
327 332
333 threshold = mcpdm->config[stream].threshold;
328 /* Configure McPDM channels, and DMA packet size */ 334 /* Configure McPDM channels, and DMA packet size */
329 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 335 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
330 mcpdm->dn_channels = link_mask << 3; 336 link_mask <<= 3;
331 dma_data->packet_size = 337 dma_data->packet_size =
332 (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels; 338 (MCPDM_DN_THRES_MAX - threshold) * channels;
333 } else { 339 } else {
334 mcpdm->up_channels = link_mask << 0; 340 dma_data->packet_size = threshold * channels;
335 dma_data->packet_size = mcpdm->up_threshold * channels;
336 } 341 }
342 mcpdm->config[stream].link_mask = link_mask;
337 343
338 return 0; 344 return 0;
339} 345}
@@ -380,8 +386,9 @@ static int omap_mcpdm_probe(struct snd_soc_dai *dai)
380 } 386 }
381 387
382 /* Configure McPDM threshold values */ 388 /* Configure McPDM threshold values */
383 mcpdm->dn_threshold = 2; 389 mcpdm->config[SNDRV_PCM_STREAM_PLAYBACK].threshold = 2;
384 mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3; 390 mcpdm->config[SNDRV_PCM_STREAM_CAPTURE].threshold =
391 MCPDM_UP_THRES_MAX - 3;
385 return ret; 392 return ret;
386} 393}
387 394