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authorMark Brown <broonie@opensource.wolfsonmicro.com>2009-09-02 13:51:19 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-09-02 14:36:22 -0400
commit2eff31e8096513d03b0b6484b85fd2c417eb87e8 (patch)
treed84f4ada91be0842a03ea8a973b8ae7a3b1664e9 /sound/soc/codecs
parent5c0d38c9478e79ab7deb1b470dd181d2308a608e (diff)
ASoC: Fully specify DC servo bits to update in wm_hubs
Avoids potential issues if we read back unexpected values during a read/modify/write cycle. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs')
-rw-r--r--sound/soc/codecs/wm_hubs.c12
1 files changed, 2 insertions, 10 deletions
diff --git a/sound/soc/codecs/wm_hubs.c b/sound/soc/codecs/wm_hubs.c
index 41699bd1986c..e542027eea89 100644
--- a/sound/soc/codecs/wm_hubs.c
+++ b/sound/soc/codecs/wm_hubs.c
@@ -273,17 +273,12 @@ static int hp_event(struct snd_soc_dapm_widget *w,
273 273
274 /* Start the DC servo */ 274 /* Start the DC servo */
275 snd_soc_update_bits(codec, WM8993_DC_SERVO_0, 275 snd_soc_update_bits(codec, WM8993_DC_SERVO_0,
276 WM8993_DCS_ENA_CHAN_0 | 276 0xFFFF,
277 WM8993_DCS_ENA_CHAN_1 |
278 WM8993_DCS_TRIG_STARTUP_1 |
279 WM8993_DCS_TRIG_STARTUP_0,
280 WM8993_DCS_ENA_CHAN_0 | 277 WM8993_DCS_ENA_CHAN_0 |
281 WM8993_DCS_ENA_CHAN_1 | 278 WM8993_DCS_ENA_CHAN_1 |
282 WM8993_DCS_TRIG_STARTUP_1 | 279 WM8993_DCS_TRIG_STARTUP_1 |
283 WM8993_DCS_TRIG_STARTUP_0); 280 WM8993_DCS_TRIG_STARTUP_0);
284 wait_for_dc_servo(codec); 281 wait_for_dc_servo(codec);
285 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
286 WM8993_DCS_TIMER_PERIOD_01_MASK, 0xa);
287 282
288 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT | 283 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
289 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT; 284 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
@@ -298,11 +293,8 @@ static int hp_event(struct snd_soc_dapm_widget *w,
298 WM8993_HPOUT1R_DLY | 293 WM8993_HPOUT1R_DLY |
299 WM8993_HPOUT1R_OUTP); 294 WM8993_HPOUT1R_OUTP);
300 295
301 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
302 WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
303 snd_soc_update_bits(codec, WM8993_DC_SERVO_0, 296 snd_soc_update_bits(codec, WM8993_DC_SERVO_0,
304 WM8993_DCS_ENA_CHAN_0 | 297 0xffff, 0);
305 WM8993_DCS_ENA_CHAN_1, 0);
306 298
307 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 299 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
308 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 300 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,