diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-01-16 11:31:03 -0500 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-01-16 13:00:33 -0500 |
commit | c42f69bb064333624dcc1452ed109441c3c9e7b4 (patch) | |
tree | 437787cddbc4ebc262d9294519f3b5887b6b08c3 /sound/soc/codecs | |
parent | 2905a5df4a1600bc3c9ecace2fa65404196d1fda (diff) |
ASoC: Ignore output frequency for WM9713 PLL
The WM9713 driver does not support configuring the PLL output frequency
so the output frequency parameter is irrelevant. Allow users to set it
to zero by ignoring it.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs')
-rw-r--r-- | sound/soc/codecs/wm9713.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/sound/soc/codecs/wm9713.c b/sound/soc/codecs/wm9713.c index a45622620db7..e636d8a18ed6 100644 --- a/sound/soc/codecs/wm9713.c +++ b/sound/soc/codecs/wm9713.c | |||
@@ -32,7 +32,6 @@ | |||
32 | 32 | ||
33 | struct wm9713_priv { | 33 | struct wm9713_priv { |
34 | u32 pll_in; /* PLL input frequency */ | 34 | u32 pll_in; /* PLL input frequency */ |
35 | u32 pll_out; /* PLL output frequency */ | ||
36 | }; | 35 | }; |
37 | 36 | ||
38 | static unsigned int ac97_read(struct snd_soc_codec *codec, | 37 | static unsigned int ac97_read(struct snd_soc_codec *codec, |
@@ -723,13 +722,13 @@ static int wm9713_set_pll(struct snd_soc_codec *codec, | |||
723 | struct _pll_div pll_div; | 722 | struct _pll_div pll_div; |
724 | 723 | ||
725 | /* turn PLL off ? */ | 724 | /* turn PLL off ? */ |
726 | if (freq_in == 0 || freq_out == 0) { | 725 | if (freq_in == 0) { |
727 | /* disable PLL power and select ext source */ | 726 | /* disable PLL power and select ext source */ |
728 | reg = ac97_read(codec, AC97_HANDSET_RATE); | 727 | reg = ac97_read(codec, AC97_HANDSET_RATE); |
729 | ac97_write(codec, AC97_HANDSET_RATE, reg | 0x0080); | 728 | ac97_write(codec, AC97_HANDSET_RATE, reg | 0x0080); |
730 | reg = ac97_read(codec, AC97_EXTENDED_MID); | 729 | reg = ac97_read(codec, AC97_EXTENDED_MID); |
731 | ac97_write(codec, AC97_EXTENDED_MID, reg | 0x0200); | 730 | ac97_write(codec, AC97_EXTENDED_MID, reg | 0x0200); |
732 | wm9713->pll_out = 0; | 731 | wm9713->pll_in = 0; |
733 | return 0; | 732 | return 0; |
734 | } | 733 | } |
735 | 734 | ||
@@ -773,7 +772,6 @@ static int wm9713_set_pll(struct snd_soc_codec *codec, | |||
773 | ac97_write(codec, AC97_EXTENDED_MID, reg & 0xfdff); | 772 | ac97_write(codec, AC97_EXTENDED_MID, reg & 0xfdff); |
774 | reg = ac97_read(codec, AC97_HANDSET_RATE); | 773 | reg = ac97_read(codec, AC97_HANDSET_RATE); |
775 | ac97_write(codec, AC97_HANDSET_RATE, reg & 0xff7f); | 774 | ac97_write(codec, AC97_HANDSET_RATE, reg & 0xff7f); |
776 | wm9713->pll_out = freq_out; | ||
777 | wm9713->pll_in = freq_in; | 775 | wm9713->pll_in = freq_in; |
778 | 776 | ||
779 | /* wait 10ms AC97 link frames for the link to stabilise */ | 777 | /* wait 10ms AC97 link frames for the link to stabilise */ |
@@ -1149,8 +1147,8 @@ static int wm9713_soc_resume(struct platform_device *pdev) | |||
1149 | wm9713_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1147 | wm9713_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1150 | 1148 | ||
1151 | /* do we need to re-start the PLL ? */ | 1149 | /* do we need to re-start the PLL ? */ |
1152 | if (wm9713->pll_out) | 1150 | if (wm9713->pll_in) |
1153 | wm9713_set_pll(codec, 0, wm9713->pll_in, wm9713->pll_out); | 1151 | wm9713_set_pll(codec, 0, wm9713->pll_in, 0); |
1154 | 1152 | ||
1155 | /* only synchronise the codec if warm reset failed */ | 1153 | /* only synchronise the codec if warm reset failed */ |
1156 | if (ret == 0) { | 1154 | if (ret == 0) { |