diff options
author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-07-10 18:12:01 -0400 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2009-08-03 11:59:16 -0400 |
commit | 8d50e447d19fec64adebeef55f2b60d695435412 (patch) | |
tree | aac4234db113cf40abc4c7779ddecb76d7e0946b /sound/soc/codecs/wm8990.c | |
parent | afa2f1066e7288a9e4f8e3fda277da245219dffc (diff) |
ASoC: Factor out I/O for Wolfson 8 bit data 16 bit register CODECs
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/wm8990.c')
-rw-r--r-- | sound/soc/codecs/wm8990.c | 194 |
1 files changed, 76 insertions, 118 deletions
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index d029818350e9..2d702db4131d 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c | |||
@@ -108,53 +108,7 @@ static const u16 wm8990_reg[] = { | |||
108 | 0x0000, /* R63 - Driver internal */ | 108 | 0x0000, /* R63 - Driver internal */ |
109 | }; | 109 | }; |
110 | 110 | ||
111 | /* | 111 | #define wm8990_reset(c) snd_soc_write(c, WM8990_RESET, 0) |
112 | * read wm8990 register cache | ||
113 | */ | ||
114 | static inline unsigned int wm8990_read_reg_cache(struct snd_soc_codec *codec, | ||
115 | unsigned int reg) | ||
116 | { | ||
117 | u16 *cache = codec->reg_cache; | ||
118 | BUG_ON(reg >= ARRAY_SIZE(wm8990_reg)); | ||
119 | return cache[reg]; | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * write wm8990 register cache | ||
124 | */ | ||
125 | static inline void wm8990_write_reg_cache(struct snd_soc_codec *codec, | ||
126 | unsigned int reg, unsigned int value) | ||
127 | { | ||
128 | u16 *cache = codec->reg_cache; | ||
129 | |||
130 | /* Reset register and reserved registers are uncached */ | ||
131 | if (reg == 0 || reg >= ARRAY_SIZE(wm8990_reg)) | ||
132 | return; | ||
133 | |||
134 | cache[reg] = value; | ||
135 | } | ||
136 | |||
137 | /* | ||
138 | * write to the wm8990 register space | ||
139 | */ | ||
140 | static int wm8990_write(struct snd_soc_codec *codec, unsigned int reg, | ||
141 | unsigned int value) | ||
142 | { | ||
143 | u8 data[3]; | ||
144 | |||
145 | data[0] = reg & 0xFF; | ||
146 | data[1] = (value >> 8) & 0xFF; | ||
147 | data[2] = value & 0xFF; | ||
148 | |||
149 | wm8990_write_reg_cache(codec, reg, value); | ||
150 | |||
151 | if (codec->hw_write(codec->control_data, data, 3) == 2) | ||
152 | return 0; | ||
153 | else | ||
154 | return -EIO; | ||
155 | } | ||
156 | |||
157 | #define wm8990_reset(c) wm8990_write(c, WM8990_RESET, 0) | ||
158 | 112 | ||
159 | static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600); | 113 | static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv, -1500, 600); |
160 | 114 | ||
@@ -187,8 +141,8 @@ static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, | |||
187 | return ret; | 141 | return ret; |
188 | 142 | ||
189 | /* now hit the volume update bits (always bit 8) */ | 143 | /* now hit the volume update bits (always bit 8) */ |
190 | val = wm8990_read_reg_cache(codec, reg); | 144 | val = snd_soc_read(codec, reg); |
191 | return wm8990_write(codec, reg, val | 0x0100); | 145 | return snd_soc_write(codec, reg, val | 0x0100); |
192 | } | 146 | } |
193 | 147 | ||
194 | #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ | 148 | #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\ |
@@ -427,8 +381,8 @@ static int inmixer_event(struct snd_soc_dapm_widget *w, | |||
427 | { | 381 | { |
428 | u16 reg, fakepower; | 382 | u16 reg, fakepower; |
429 | 383 | ||
430 | reg = wm8990_read_reg_cache(w->codec, WM8990_POWER_MANAGEMENT_2); | 384 | reg = snd_soc_read(w->codec, WM8990_POWER_MANAGEMENT_2); |
431 | fakepower = wm8990_read_reg_cache(w->codec, WM8990_INTDRIVBITS); | 385 | fakepower = snd_soc_read(w->codec, WM8990_INTDRIVBITS); |
432 | 386 | ||
433 | if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | | 387 | if (fakepower & ((1 << WM8990_INMIXL_PWR_BIT) | |
434 | (1 << WM8990_AINLMUX_PWR_BIT))) { | 388 | (1 << WM8990_AINLMUX_PWR_BIT))) { |
@@ -443,7 +397,7 @@ static int inmixer_event(struct snd_soc_dapm_widget *w, | |||
443 | } else { | 397 | } else { |
444 | reg &= ~WM8990_AINL_ENA; | 398 | reg &= ~WM8990_AINL_ENA; |
445 | } | 399 | } |
446 | wm8990_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); | 400 | snd_soc_write(w->codec, WM8990_POWER_MANAGEMENT_2, reg); |
447 | 401 | ||
448 | return 0; | 402 | return 0; |
449 | } | 403 | } |
@@ -457,7 +411,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w, | |||
457 | 411 | ||
458 | switch (reg_shift) { | 412 | switch (reg_shift) { |
459 | case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : | 413 | case WM8990_SPEAKER_MIXER | (WM8990_LDSPK_BIT << 8) : |
460 | reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER1); | 414 | reg = snd_soc_read(w->codec, WM8990_OUTPUT_MIXER1); |
461 | if (reg & WM8990_LDLO) { | 415 | if (reg & WM8990_LDLO) { |
462 | printk(KERN_WARNING | 416 | printk(KERN_WARNING |
463 | "Cannot set as Output Mixer 1 LDLO Set\n"); | 417 | "Cannot set as Output Mixer 1 LDLO Set\n"); |
@@ -465,7 +419,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w, | |||
465 | } | 419 | } |
466 | break; | 420 | break; |
467 | case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): | 421 | case WM8990_SPEAKER_MIXER | (WM8990_RDSPK_BIT << 8): |
468 | reg = wm8990_read_reg_cache(w->codec, WM8990_OUTPUT_MIXER2); | 422 | reg = snd_soc_read(w->codec, WM8990_OUTPUT_MIXER2); |
469 | if (reg & WM8990_RDRO) { | 423 | if (reg & WM8990_RDRO) { |
470 | printk(KERN_WARNING | 424 | printk(KERN_WARNING |
471 | "Cannot set as Output Mixer 2 RDRO Set\n"); | 425 | "Cannot set as Output Mixer 2 RDRO Set\n"); |
@@ -473,7 +427,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w, | |||
473 | } | 427 | } |
474 | break; | 428 | break; |
475 | case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): | 429 | case WM8990_OUTPUT_MIXER1 | (WM8990_LDLO_BIT << 8): |
476 | reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); | 430 | reg = snd_soc_read(w->codec, WM8990_SPEAKER_MIXER); |
477 | if (reg & WM8990_LDSPK) { | 431 | if (reg & WM8990_LDSPK) { |
478 | printk(KERN_WARNING | 432 | printk(KERN_WARNING |
479 | "Cannot set as Speaker Mixer LDSPK Set\n"); | 433 | "Cannot set as Speaker Mixer LDSPK Set\n"); |
@@ -481,7 +435,7 @@ static int outmixer_event(struct snd_soc_dapm_widget *w, | |||
481 | } | 435 | } |
482 | break; | 436 | break; |
483 | case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): | 437 | case WM8990_OUTPUT_MIXER2 | (WM8990_RDRO_BIT << 8): |
484 | reg = wm8990_read_reg_cache(w->codec, WM8990_SPEAKER_MIXER); | 438 | reg = snd_soc_read(w->codec, WM8990_SPEAKER_MIXER); |
485 | if (reg & WM8990_RDSPK) { | 439 | if (reg & WM8990_RDSPK) { |
486 | printk(KERN_WARNING | 440 | printk(KERN_WARNING |
487 | "Cannot set as Speaker Mixer RDSPK Set\n"); | 441 | "Cannot set as Speaker Mixer RDSPK Set\n"); |
@@ -1029,24 +983,24 @@ static int wm8990_set_dai_pll(struct snd_soc_dai *codec_dai, | |||
1029 | pll_factors(&pll_div, freq_out * 4, freq_in); | 983 | pll_factors(&pll_div, freq_out * 4, freq_in); |
1030 | 984 | ||
1031 | /* Turn on PLL */ | 985 | /* Turn on PLL */ |
1032 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); | 986 | reg = snd_soc_read(codec, WM8990_POWER_MANAGEMENT_2); |
1033 | reg |= WM8990_PLL_ENA; | 987 | reg |= WM8990_PLL_ENA; |
1034 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); | 988 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_2, reg); |
1035 | 989 | ||
1036 | /* sysclk comes from PLL */ | 990 | /* sysclk comes from PLL */ |
1037 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2); | 991 | reg = snd_soc_read(codec, WM8990_CLOCKING_2); |
1038 | wm8990_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC); | 992 | snd_soc_write(codec, WM8990_CLOCKING_2, reg | WM8990_SYSCLK_SRC); |
1039 | 993 | ||
1040 | /* set up N , fractional mode and pre-divisor if neccessary */ | 994 | /* set up N , fractional mode and pre-divisor if neccessary */ |
1041 | wm8990_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | | 995 | snd_soc_write(codec, WM8990_PLL1, pll_div.n | WM8990_SDM | |
1042 | (pll_div.div2?WM8990_PRESCALE:0)); | 996 | (pll_div.div2?WM8990_PRESCALE:0)); |
1043 | wm8990_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); | 997 | snd_soc_write(codec, WM8990_PLL2, (u8)(pll_div.k>>8)); |
1044 | wm8990_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); | 998 | snd_soc_write(codec, WM8990_PLL3, (u8)(pll_div.k & 0xFF)); |
1045 | } else { | 999 | } else { |
1046 | /* Turn on PLL */ | 1000 | /* Turn on PLL */ |
1047 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); | 1001 | reg = snd_soc_read(codec, WM8990_POWER_MANAGEMENT_2); |
1048 | reg &= ~WM8990_PLL_ENA; | 1002 | reg &= ~WM8990_PLL_ENA; |
1049 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg); | 1003 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_2, reg); |
1050 | } | 1004 | } |
1051 | return 0; | 1005 | return 0; |
1052 | } | 1006 | } |
@@ -1073,8 +1027,8 @@ static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
1073 | struct snd_soc_codec *codec = codec_dai->codec; | 1027 | struct snd_soc_codec *codec = codec_dai->codec; |
1074 | u16 audio1, audio3; | 1028 | u16 audio1, audio3; |
1075 | 1029 | ||
1076 | audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); | 1030 | audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1); |
1077 | audio3 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_3); | 1031 | audio3 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_3); |
1078 | 1032 | ||
1079 | /* set master/slave audio interface */ | 1033 | /* set master/slave audio interface */ |
1080 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { | 1034 | switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { |
@@ -1115,8 +1069,8 @@ static int wm8990_set_dai_fmt(struct snd_soc_dai *codec_dai, | |||
1115 | return -EINVAL; | 1069 | return -EINVAL; |
1116 | } | 1070 | } |
1117 | 1071 | ||
1118 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); | 1072 | snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); |
1119 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); | 1073 | snd_soc_write(codec, WM8990_AUDIO_INTERFACE_3, audio3); |
1120 | return 0; | 1074 | return 0; |
1121 | } | 1075 | } |
1122 | 1076 | ||
@@ -1128,24 +1082,24 @@ static int wm8990_set_dai_clkdiv(struct snd_soc_dai *codec_dai, | |||
1128 | 1082 | ||
1129 | switch (div_id) { | 1083 | switch (div_id) { |
1130 | case WM8990_MCLK_DIV: | 1084 | case WM8990_MCLK_DIV: |
1131 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & | 1085 | reg = snd_soc_read(codec, WM8990_CLOCKING_2) & |
1132 | ~WM8990_MCLK_DIV_MASK; | 1086 | ~WM8990_MCLK_DIV_MASK; |
1133 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); | 1087 | snd_soc_write(codec, WM8990_CLOCKING_2, reg | div); |
1134 | break; | 1088 | break; |
1135 | case WM8990_DACCLK_DIV: | 1089 | case WM8990_DACCLK_DIV: |
1136 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & | 1090 | reg = snd_soc_read(codec, WM8990_CLOCKING_2) & |
1137 | ~WM8990_DAC_CLKDIV_MASK; | 1091 | ~WM8990_DAC_CLKDIV_MASK; |
1138 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); | 1092 | snd_soc_write(codec, WM8990_CLOCKING_2, reg | div); |
1139 | break; | 1093 | break; |
1140 | case WM8990_ADCCLK_DIV: | 1094 | case WM8990_ADCCLK_DIV: |
1141 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_2) & | 1095 | reg = snd_soc_read(codec, WM8990_CLOCKING_2) & |
1142 | ~WM8990_ADC_CLKDIV_MASK; | 1096 | ~WM8990_ADC_CLKDIV_MASK; |
1143 | wm8990_write(codec, WM8990_CLOCKING_2, reg | div); | 1097 | snd_soc_write(codec, WM8990_CLOCKING_2, reg | div); |
1144 | break; | 1098 | break; |
1145 | case WM8990_BCLK_DIV: | 1099 | case WM8990_BCLK_DIV: |
1146 | reg = wm8990_read_reg_cache(codec, WM8990_CLOCKING_1) & | 1100 | reg = snd_soc_read(codec, WM8990_CLOCKING_1) & |
1147 | ~WM8990_BCLK_DIV_MASK; | 1101 | ~WM8990_BCLK_DIV_MASK; |
1148 | wm8990_write(codec, WM8990_CLOCKING_1, reg | div); | 1102 | snd_soc_write(codec, WM8990_CLOCKING_1, reg | div); |
1149 | break; | 1103 | break; |
1150 | default: | 1104 | default: |
1151 | return -EINVAL; | 1105 | return -EINVAL; |
@@ -1164,7 +1118,7 @@ static int wm8990_hw_params(struct snd_pcm_substream *substream, | |||
1164 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 1118 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
1165 | struct snd_soc_device *socdev = rtd->socdev; | 1119 | struct snd_soc_device *socdev = rtd->socdev; |
1166 | struct snd_soc_codec *codec = socdev->card->codec; | 1120 | struct snd_soc_codec *codec = socdev->card->codec; |
1167 | u16 audio1 = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_1); | 1121 | u16 audio1 = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_1); |
1168 | 1122 | ||
1169 | audio1 &= ~WM8990_AIF_WL_MASK; | 1123 | audio1 &= ~WM8990_AIF_WL_MASK; |
1170 | /* bit size */ | 1124 | /* bit size */ |
@@ -1182,7 +1136,7 @@ static int wm8990_hw_params(struct snd_pcm_substream *substream, | |||
1182 | break; | 1136 | break; |
1183 | } | 1137 | } |
1184 | 1138 | ||
1185 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); | 1139 | snd_soc_write(codec, WM8990_AUDIO_INTERFACE_1, audio1); |
1186 | return 0; | 1140 | return 0; |
1187 | } | 1141 | } |
1188 | 1142 | ||
@@ -1191,12 +1145,12 @@ static int wm8990_mute(struct snd_soc_dai *dai, int mute) | |||
1191 | struct snd_soc_codec *codec = dai->codec; | 1145 | struct snd_soc_codec *codec = dai->codec; |
1192 | u16 val; | 1146 | u16 val; |
1193 | 1147 | ||
1194 | val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; | 1148 | val = snd_soc_read(codec, WM8990_DAC_CTRL) & ~WM8990_DAC_MUTE; |
1195 | 1149 | ||
1196 | if (mute) | 1150 | if (mute) |
1197 | wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); | 1151 | snd_soc_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); |
1198 | else | 1152 | else |
1199 | wm8990_write(codec, WM8990_DAC_CTRL, val); | 1153 | snd_soc_write(codec, WM8990_DAC_CTRL, val); |
1200 | 1154 | ||
1201 | return 0; | 1155 | return 0; |
1202 | } | 1156 | } |
@@ -1212,21 +1166,21 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, | |||
1212 | 1166 | ||
1213 | case SND_SOC_BIAS_PREPARE: | 1167 | case SND_SOC_BIAS_PREPARE: |
1214 | /* VMID=2*50k */ | 1168 | /* VMID=2*50k */ |
1215 | val = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_1) & | 1169 | val = snd_soc_read(codec, WM8990_POWER_MANAGEMENT_1) & |
1216 | ~WM8990_VMID_MODE_MASK; | 1170 | ~WM8990_VMID_MODE_MASK; |
1217 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, val | 0x2); | 1171 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, val | 0x2); |
1218 | break; | 1172 | break; |
1219 | 1173 | ||
1220 | case SND_SOC_BIAS_STANDBY: | 1174 | case SND_SOC_BIAS_STANDBY: |
1221 | if (codec->bias_level == SND_SOC_BIAS_OFF) { | 1175 | if (codec->bias_level == SND_SOC_BIAS_OFF) { |
1222 | /* Enable all output discharge bits */ | 1176 | /* Enable all output discharge bits */ |
1223 | wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | | 1177 | snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | |
1224 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | | 1178 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | |
1225 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | | 1179 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | |
1226 | WM8990_DIS_ROUT); | 1180 | WM8990_DIS_ROUT); |
1227 | 1181 | ||
1228 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ | 1182 | /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ |
1229 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | 1183 | snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
1230 | WM8990_BUFDCOPEN | WM8990_POBCTRL | | 1184 | WM8990_BUFDCOPEN | WM8990_POBCTRL | |
1231 | WM8990_VMIDTOG); | 1185 | WM8990_VMIDTOG); |
1232 | 1186 | ||
@@ -1234,83 +1188,83 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec, | |||
1234 | msleep(msecs_to_jiffies(300)); | 1188 | msleep(msecs_to_jiffies(300)); |
1235 | 1189 | ||
1236 | /* Disable VMIDTOG */ | 1190 | /* Disable VMIDTOG */ |
1237 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | 1191 | snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
1238 | WM8990_BUFDCOPEN | WM8990_POBCTRL); | 1192 | WM8990_BUFDCOPEN | WM8990_POBCTRL); |
1239 | 1193 | ||
1240 | /* disable all output discharge bits */ | 1194 | /* disable all output discharge bits */ |
1241 | wm8990_write(codec, WM8990_ANTIPOP1, 0); | 1195 | snd_soc_write(codec, WM8990_ANTIPOP1, 0); |
1242 | 1196 | ||
1243 | /* Enable outputs */ | 1197 | /* Enable outputs */ |
1244 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); | 1198 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1b00); |
1245 | 1199 | ||
1246 | msleep(msecs_to_jiffies(50)); | 1200 | msleep(msecs_to_jiffies(50)); |
1247 | 1201 | ||
1248 | /* Enable VMID at 2x50k */ | 1202 | /* Enable VMID at 2x50k */ |
1249 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); | 1203 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f02); |
1250 | 1204 | ||
1251 | msleep(msecs_to_jiffies(100)); | 1205 | msleep(msecs_to_jiffies(100)); |
1252 | 1206 | ||
1253 | /* Enable VREF */ | 1207 | /* Enable VREF */ |
1254 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); | 1208 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); |
1255 | 1209 | ||
1256 | msleep(msecs_to_jiffies(600)); | 1210 | msleep(msecs_to_jiffies(600)); |
1257 | 1211 | ||
1258 | /* Enable BUFIOEN */ | 1212 | /* Enable BUFIOEN */ |
1259 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | 1213 | snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
1260 | WM8990_BUFDCOPEN | WM8990_POBCTRL | | 1214 | WM8990_BUFDCOPEN | WM8990_POBCTRL | |
1261 | WM8990_BUFIOEN); | 1215 | WM8990_BUFIOEN); |
1262 | 1216 | ||
1263 | /* Disable outputs */ | 1217 | /* Disable outputs */ |
1264 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); | 1218 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x3); |
1265 | 1219 | ||
1266 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | 1220 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1267 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); | 1221 | snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); |
1268 | 1222 | ||
1269 | /* Enable workaround for ADC clocking issue. */ | 1223 | /* Enable workaround for ADC clocking issue. */ |
1270 | wm8990_write(codec, WM8990_EXT_ACCESS_ENA, 0x2); | 1224 | snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0x2); |
1271 | wm8990_write(codec, WM8990_EXT_CTL1, 0xa003); | 1225 | snd_soc_write(codec, WM8990_EXT_CTL1, 0xa003); |
1272 | wm8990_write(codec, WM8990_EXT_ACCESS_ENA, 0); | 1226 | snd_soc_write(codec, WM8990_EXT_ACCESS_ENA, 0); |
1273 | } | 1227 | } |
1274 | 1228 | ||
1275 | /* VMID=2*250k */ | 1229 | /* VMID=2*250k */ |
1276 | val = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_1) & | 1230 | val = snd_soc_read(codec, WM8990_POWER_MANAGEMENT_1) & |
1277 | ~WM8990_VMID_MODE_MASK; | 1231 | ~WM8990_VMID_MODE_MASK; |
1278 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, val | 0x4); | 1232 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, val | 0x4); |
1279 | break; | 1233 | break; |
1280 | 1234 | ||
1281 | case SND_SOC_BIAS_OFF: | 1235 | case SND_SOC_BIAS_OFF: |
1282 | /* Enable POBCTRL and SOFT_ST */ | 1236 | /* Enable POBCTRL and SOFT_ST */ |
1283 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | 1237 | snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
1284 | WM8990_POBCTRL | WM8990_BUFIOEN); | 1238 | WM8990_POBCTRL | WM8990_BUFIOEN); |
1285 | 1239 | ||
1286 | /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ | 1240 | /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1287 | wm8990_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | | 1241 | snd_soc_write(codec, WM8990_ANTIPOP2, WM8990_SOFTST | |
1288 | WM8990_BUFDCOPEN | WM8990_POBCTRL | | 1242 | WM8990_BUFDCOPEN | WM8990_POBCTRL | |
1289 | WM8990_BUFIOEN); | 1243 | WM8990_BUFIOEN); |
1290 | 1244 | ||
1291 | /* mute DAC */ | 1245 | /* mute DAC */ |
1292 | val = wm8990_read_reg_cache(codec, WM8990_DAC_CTRL); | 1246 | val = snd_soc_read(codec, WM8990_DAC_CTRL); |
1293 | wm8990_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); | 1247 | snd_soc_write(codec, WM8990_DAC_CTRL, val | WM8990_DAC_MUTE); |
1294 | 1248 | ||
1295 | /* Enable any disabled outputs */ | 1249 | /* Enable any disabled outputs */ |
1296 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); | 1250 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f03); |
1297 | 1251 | ||
1298 | /* Disable VMID */ | 1252 | /* Disable VMID */ |
1299 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); | 1253 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x1f01); |
1300 | 1254 | ||
1301 | msleep(msecs_to_jiffies(300)); | 1255 | msleep(msecs_to_jiffies(300)); |
1302 | 1256 | ||
1303 | /* Enable all output discharge bits */ | 1257 | /* Enable all output discharge bits */ |
1304 | wm8990_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | | 1258 | snd_soc_write(codec, WM8990_ANTIPOP1, WM8990_DIS_LLINE | |
1305 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | | 1259 | WM8990_DIS_RLINE | WM8990_DIS_OUT3 | |
1306 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | | 1260 | WM8990_DIS_OUT4 | WM8990_DIS_LOUT | |
1307 | WM8990_DIS_ROUT); | 1261 | WM8990_DIS_ROUT); |
1308 | 1262 | ||
1309 | /* Disable VREF */ | 1263 | /* Disable VREF */ |
1310 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); | 1264 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_1, 0x0); |
1311 | 1265 | ||
1312 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ | 1266 | /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ |
1313 | wm8990_write(codec, WM8990_ANTIPOP2, 0x0); | 1267 | snd_soc_write(codec, WM8990_ANTIPOP2, 0x0); |
1314 | break; | 1268 | break; |
1315 | } | 1269 | } |
1316 | 1270 | ||
@@ -1411,8 +1365,6 @@ static int wm8990_init(struct snd_soc_device *socdev) | |||
1411 | 1365 | ||
1412 | codec->name = "WM8990"; | 1366 | codec->name = "WM8990"; |
1413 | codec->owner = THIS_MODULE; | 1367 | codec->owner = THIS_MODULE; |
1414 | codec->read = wm8990_read_reg_cache; | ||
1415 | codec->write = wm8990_write; | ||
1416 | codec->set_bias_level = wm8990_set_bias_level; | 1368 | codec->set_bias_level = wm8990_set_bias_level; |
1417 | codec->dai = &wm8990_dai; | 1369 | codec->dai = &wm8990_dai; |
1418 | codec->num_dai = 2; | 1370 | codec->num_dai = 2; |
@@ -1422,6 +1374,12 @@ static int wm8990_init(struct snd_soc_device *socdev) | |||
1422 | if (codec->reg_cache == NULL) | 1374 | if (codec->reg_cache == NULL) |
1423 | return -ENOMEM; | 1375 | return -ENOMEM; |
1424 | 1376 | ||
1377 | ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C); | ||
1378 | if (ret < 0) { | ||
1379 | printk(KERN_ERR "wm8990: failed to set cache I/O: %d\n", ret); | ||
1380 | goto pcm_err; | ||
1381 | } | ||
1382 | |||
1425 | wm8990_reset(codec); | 1383 | wm8990_reset(codec); |
1426 | 1384 | ||
1427 | /* register pcms */ | 1385 | /* register pcms */ |
@@ -1435,18 +1393,18 @@ static int wm8990_init(struct snd_soc_device *socdev) | |||
1435 | codec->bias_level = SND_SOC_BIAS_OFF; | 1393 | codec->bias_level = SND_SOC_BIAS_OFF; |
1436 | wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); | 1394 | wm8990_set_bias_level(codec, SND_SOC_BIAS_STANDBY); |
1437 | 1395 | ||
1438 | reg = wm8990_read_reg_cache(codec, WM8990_AUDIO_INTERFACE_4); | 1396 | reg = snd_soc_read(codec, WM8990_AUDIO_INTERFACE_4); |
1439 | wm8990_write(codec, WM8990_AUDIO_INTERFACE_4, reg | WM8990_ALRCGPIO1); | 1397 | snd_soc_write(codec, WM8990_AUDIO_INTERFACE_4, reg | WM8990_ALRCGPIO1); |
1440 | 1398 | ||
1441 | reg = wm8990_read_reg_cache(codec, WM8990_GPIO1_GPIO2) & | 1399 | reg = snd_soc_read(codec, WM8990_GPIO1_GPIO2) & |
1442 | ~WM8990_GPIO1_SEL_MASK; | 1400 | ~WM8990_GPIO1_SEL_MASK; |
1443 | wm8990_write(codec, WM8990_GPIO1_GPIO2, reg | 1); | 1401 | snd_soc_write(codec, WM8990_GPIO1_GPIO2, reg | 1); |
1444 | 1402 | ||
1445 | reg = wm8990_read_reg_cache(codec, WM8990_POWER_MANAGEMENT_2); | 1403 | reg = snd_soc_read(codec, WM8990_POWER_MANAGEMENT_2); |
1446 | wm8990_write(codec, WM8990_POWER_MANAGEMENT_2, reg | WM8990_OPCLK_ENA); | 1404 | snd_soc_write(codec, WM8990_POWER_MANAGEMENT_2, reg | WM8990_OPCLK_ENA); |
1447 | 1405 | ||
1448 | wm8990_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); | 1406 | snd_soc_write(codec, WM8990_LEFT_OUTPUT_VOLUME, 0x50 | (1<<8)); |
1449 | wm8990_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); | 1407 | snd_soc_write(codec, WM8990_RIGHT_OUTPUT_VOLUME, 0x50 | (1<<8)); |
1450 | 1408 | ||
1451 | snd_soc_add_controls(codec, wm8990_snd_controls, | 1409 | snd_soc_add_controls(codec, wm8990_snd_controls, |
1452 | ARRAY_SIZE(wm8990_snd_controls)); | 1410 | ARRAY_SIZE(wm8990_snd_controls)); |