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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-11-01 15:32:25 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-11-08 09:13:41 -0500
commit7b16f5601295d0dfd0d48753b9253d41957587fe (patch)
treee3a38b2de6b84bd41ca990b2d8c80062fb716757 /sound/soc/codecs/wm8962.c
parentb2d1e23373fde66d5532ffdfd0f1e650174b83f6 (diff)
ASoC: Convert WM8962 to direct regmap usage
This initial conversion just moves the register init, regulator acquisition and device verification out to the I2C probe(). Movement of other parts of the driver like the GPIO and beep generation code will follow. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/wm8962.c')
-rw-r--r--sound/soc/codecs/wm8962.c1593
1 files changed, 802 insertions, 791 deletions
diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index 3fc9d2f74735..6d82b35a70d0 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -21,6 +21,7 @@
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <linux/input.h> 22#include <linux/input.h>
23#include <linux/platform_device.h> 23#include <linux/platform_device.h>
24#include <linux/regmap.h>
24#include <linux/regulator/consumer.h> 25#include <linux/regulator/consumer.h>
25#include <linux/slab.h> 26#include <linux/slab.h>
26#include <linux/workqueue.h> 27#include <linux/workqueue.h>
@@ -50,6 +51,7 @@ static const char *wm8962_supply_names[WM8962_NUM_SUPPLIES] = {
50 51
51/* codec private data */ 52/* codec private data */
52struct wm8962_priv { 53struct wm8962_priv {
54 struct regmap *regmap;
53 struct snd_soc_codec *codec; 55 struct snd_soc_codec *codec;
54 56
55 int sysclk; 57 int sysclk;
@@ -95,7 +97,7 @@ static int wm8962_regulator_event_##n(struct notifier_block *nb, \
95 struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \ 97 struct wm8962_priv *wm8962 = container_of(nb, struct wm8962_priv, \
96 disable_nb[n]); \ 98 disable_nb[n]); \
97 if (event & REGULATOR_EVENT_DISABLE) { \ 99 if (event & REGULATOR_EVENT_DISABLE) { \
98 wm8962->codec->cache_sync = 1; \ 100 regcache_cache_only(wm8962->regmap, true); \
99 } \ 101 } \
100 return 0; \ 102 return 0; \
101} 103}
@@ -109,691 +111,691 @@ WM8962_REGULATOR_EVENT(5)
109WM8962_REGULATOR_EVENT(6) 111WM8962_REGULATOR_EVENT(6)
110WM8962_REGULATOR_EVENT(7) 112WM8962_REGULATOR_EVENT(7)
111 113
112static const u16 wm8962_reg[WM8962_MAX_REGISTER + 1] = { 114static struct reg_default wm8962_reg[] = {
113 [0] = 0x009F, /* R0 - Left Input volume */ 115 { 0, 0x009F }, /* R0 - Left Input volume */
114 [1] = 0x049F, /* R1 - Right Input volume */ 116 { 1, 0x049F }, /* R1 - Right Input volume */
115 [2] = 0x0000, /* R2 - HPOUTL volume */ 117 { 2, 0x0000 }, /* R2 - HPOUTL volume */
116 [3] = 0x0000, /* R3 - HPOUTR volume */ 118 { 3, 0x0000 }, /* R3 - HPOUTR volume */
117 [4] = 0x0020, /* R4 - Clocking1 */ 119 { 4, 0x0020 }, /* R4 - Clocking1 */
118 [5] = 0x0018, /* R5 - ADC & DAC Control 1 */ 120 { 5, 0x0018 }, /* R5 - ADC & DAC Control 1 */
119 [6] = 0x2008, /* R6 - ADC & DAC Control 2 */ 121 { 6, 0x2008 }, /* R6 - ADC & DAC Control 2 */
120 [7] = 0x000A, /* R7 - Audio Interface 0 */ 122 { 7, 0x000A }, /* R7 - Audio Interface 0 */
121 [8] = 0x01E4, /* R8 - Clocking2 */ 123 { 8, 0x01E4 }, /* R8 - Clocking2 */
122 [9] = 0x0300, /* R9 - Audio Interface 1 */ 124 { 9, 0x0300 }, /* R9 - Audio Interface 1 */
123 [10] = 0x00C0, /* R10 - Left DAC volume */ 125 { 10, 0x00C0 }, /* R10 - Left DAC volume */
124 [11] = 0x00C0, /* R11 - Right DAC volume */ 126 { 11, 0x00C0 }, /* R11 - Right DAC volume */
125 127
126 [14] = 0x0040, /* R14 - Audio Interface 2 */ 128 { 14, 0x0040 }, /* R14 - Audio Interface 2 */
127 [15] = 0x6243, /* R15 - Software Reset */ 129 { 15, 0x6243 }, /* R15 - Software Reset */
128 130
129 [17] = 0x007B, /* R17 - ALC1 */ 131 { 17, 0x007B }, /* R17 - ALC1 */
130 [18] = 0x0000, /* R18 - ALC2 */ 132 { 18, 0x0000 }, /* R18 - ALC2 */
131 [19] = 0x1C32, /* R19 - ALC3 */ 133 { 19, 0x1C32 }, /* R19 - ALC3 */
132 [20] = 0x3200, /* R20 - Noise Gate */ 134 { 20, 0x3200 }, /* R20 - Noise Gate */
133 [21] = 0x00C0, /* R21 - Left ADC volume */ 135 { 21, 0x00C0 }, /* R21 - Left ADC volume */
134 [22] = 0x00C0, /* R22 - Right ADC volume */ 136 { 22, 0x00C0 }, /* R22 - Right ADC volume */
135 [23] = 0x0160, /* R23 - Additional control(1) */ 137 { 23, 0x0160 }, /* R23 - Additional control(1) */
136 [24] = 0x0000, /* R24 - Additional control(2) */ 138 { 24, 0x0000 }, /* R24 - Additional control(2) */
137 [25] = 0x0000, /* R25 - Pwr Mgmt (1) */ 139 { 25, 0x0000 }, /* R25 - Pwr Mgmt (1) */
138 [26] = 0x0000, /* R26 - Pwr Mgmt (2) */ 140 { 26, 0x0000 }, /* R26 - Pwr Mgmt (2) */
139 [27] = 0x0010, /* R27 - Additional Control (3) */ 141 { 27, 0x0010 }, /* R27 - Additional Control (3) */
140 [28] = 0x0000, /* R28 - Anti-pop */ 142 { 28, 0x0000 }, /* R28 - Anti-pop */
141 143
142 [30] = 0x005E, /* R30 - Clocking 3 */ 144 { 30, 0x005E }, /* R30 - Clocking 3 */
143 [31] = 0x0000, /* R31 - Input mixer control (1) */ 145 { 31, 0x0000 }, /* R31 - Input mixer control (1) */
144 [32] = 0x0145, /* R32 - Left input mixer volume */ 146 { 32, 0x0145 }, /* R32 - Left input mixer volume */
145 [33] = 0x0145, /* R33 - Right input mixer volume */ 147 { 33, 0x0145 }, /* R33 - Right input mixer volume */
146 [34] = 0x0009, /* R34 - Input mixer control (2) */ 148 { 34, 0x0009 }, /* R34 - Input mixer control (2) */
147 [35] = 0x0003, /* R35 - Input bias control */ 149 { 35, 0x0003 }, /* R35 - Input bias control */
148 [37] = 0x0008, /* R37 - Left input PGA control */ 150 { 37, 0x0008 }, /* R37 - Left input PGA control */
149 [38] = 0x0008, /* R38 - Right input PGA control */ 151 { 38, 0x0008 }, /* R38 - Right input PGA control */
150 152
151 [40] = 0x0000, /* R40 - SPKOUTL volume */ 153 { 40, 0x0000 }, /* R40 - SPKOUTL volume */
152 [41] = 0x0000, /* R41 - SPKOUTR volume */ 154 { 41, 0x0000 }, /* R41 - SPKOUTR volume */
153 155
154 [47] = 0x0000, /* R47 - Thermal Shutdown Status */ 156 { 47, 0x0000 }, /* R47 - Thermal Shutdown Status */
155 [48] = 0x8027, /* R48 - Additional Control (4) */ 157 { 48, 0x8027 }, /* R48 - Additional Control (4) */
156 [49] = 0x0010, /* R49 - Class D Control 1 */ 158 { 49, 0x0010 }, /* R49 - Class D Control 1 */
157 159
158 [51] = 0x0003, /* R51 - Class D Control 2 */ 160 { 51, 0x0003 }, /* R51 - Class D Control 2 */
159 161
160 [56] = 0x0506, /* R56 - Clocking 4 */ 162 { 56, 0x0506 }, /* R56 - Clocking 4 */
161 [57] = 0x0000, /* R57 - DAC DSP Mixing (1) */ 163 { 57, 0x0000 }, /* R57 - DAC DSP Mixing (1) */
162 [58] = 0x0000, /* R58 - DAC DSP Mixing (2) */ 164 { 58, 0x0000 }, /* R58 - DAC DSP Mixing (2) */
163 165
164 [60] = 0x0300, /* R60 - DC Servo 0 */ 166 { 60, 0x0300 }, /* R60 - DC Servo 0 */
165 [61] = 0x0300, /* R61 - DC Servo 1 */ 167 { 61, 0x0300 }, /* R61 - DC Servo 1 */
166 168
167 [64] = 0x0810, /* R64 - DC Servo 4 */ 169 { 64, 0x0810 }, /* R64 - DC Servo 4 */
168 170
169 [66] = 0x0000, /* R66 - DC Servo 6 */ 171 { 66, 0x0000 }, /* R66 - DC Servo 6 */
170 172
171 [68] = 0x001B, /* R68 - Analogue PGA Bias */ 173 { 68, 0x001B }, /* R68 - Analogue PGA Bias */
172 [69] = 0x0000, /* R69 - Analogue HP 0 */ 174 { 69, 0x0000 }, /* R69 - Analogue HP 0 */
173 175
174 [71] = 0x01FB, /* R71 - Analogue HP 2 */ 176 { 71, 0x01FB }, /* R71 - Analogue HP 2 */
175 [72] = 0x0000, /* R72 - Charge Pump 1 */ 177 { 72, 0x0000 }, /* R72 - Charge Pump 1 */
176 178
177 [82] = 0x0004, /* R82 - Charge Pump B */ 179 { 82, 0x0004 }, /* R82 - Charge Pump B */
178 180
179 [87] = 0x0000, /* R87 - Write Sequencer Control 1 */ 181 { 87, 0x0000 }, /* R87 - Write Sequencer Control 1 */
180 182
181 [90] = 0x0000, /* R90 - Write Sequencer Control 2 */ 183 { 90, 0x0000 }, /* R90 - Write Sequencer Control 2 */
182 184
183 [93] = 0x0000, /* R93 - Write Sequencer Control 3 */ 185 { 93, 0x0000 }, /* R93 - Write Sequencer Control 3 */
184 [94] = 0x0000, /* R94 - Control Interface */ 186 { 94, 0x0000 }, /* R94 - Control Interface */
185 187
186 [99] = 0x0000, /* R99 - Mixer Enables */ 188 { 99, 0x0000 }, /* R99 - Mixer Enables */
187 [100] = 0x0000, /* R100 - Headphone Mixer (1) */ 189 { 100, 0x0000 }, /* R100 - Headphone Mixer (1) */
188 [101] = 0x0000, /* R101 - Headphone Mixer (2) */ 190 { 101, 0x0000 }, /* R101 - Headphone Mixer (2) */
189 [102] = 0x013F, /* R102 - Headphone Mixer (3) */ 191 { 102, 0x013F }, /* R102 - Headphone Mixer (3) */
190 [103] = 0x013F, /* R103 - Headphone Mixer (4) */ 192 { 103, 0x013F }, /* R103 - Headphone Mixer (4) */
191 193
192 [105] = 0x0000, /* R105 - Speaker Mixer (1) */ 194 { 105, 0x0000 }, /* R105 - Speaker Mixer (1) */
193 [106] = 0x0000, /* R106 - Speaker Mixer (2) */ 195 { 106, 0x0000 }, /* R106 - Speaker Mixer (2) */
194 [107] = 0x013F, /* R107 - Speaker Mixer (3) */ 196 { 107, 0x013F }, /* R107 - Speaker Mixer (3) */
195 [108] = 0x013F, /* R108 - Speaker Mixer (4) */ 197 { 108, 0x013F }, /* R108 - Speaker Mixer (4) */
196 [109] = 0x0003, /* R109 - Speaker Mixer (5) */ 198 { 109, 0x0003 }, /* R109 - Speaker Mixer (5) */
197 [110] = 0x0002, /* R110 - Beep Generator (1) */ 199 { 110, 0x0002 }, /* R110 - Beep Generator (1) */
198 200
199 [115] = 0x0006, /* R115 - Oscillator Trim (3) */ 201 { 115, 0x0006 }, /* R115 - Oscillator Trim (3) */
200 [116] = 0x0026, /* R116 - Oscillator Trim (4) */ 202 { 116, 0x0026 }, /* R116 - Oscillator Trim (4) */
201 203
202 [119] = 0x0000, /* R119 - Oscillator Trim (7) */ 204 { 119, 0x0000 }, /* R119 - Oscillator Trim (7) */
203 205
204 [124] = 0x0011, /* R124 - Analogue Clocking1 */ 206 { 124, 0x0011 }, /* R124 - Analogue Clocking1 */
205 [125] = 0x004B, /* R125 - Analogue Clocking2 */ 207 { 125, 0x004B }, /* R125 - Analogue Clocking2 */
206 [126] = 0x000D, /* R126 - Analogue Clocking3 */ 208 { 126, 0x000D }, /* R126 - Analogue Clocking3 */
207 [127] = 0x0000, /* R127 - PLL Software Reset */ 209 { 127, 0x0000 }, /* R127 - PLL Software Reset */
208 210
209 [129] = 0x0000, /* R129 - PLL2 */ 211 { 129, 0x0000 }, /* R129 - PLL2 */
210 212
211 [131] = 0x0000, /* R131 - PLL 4 */ 213 { 131, 0x0000 }, /* R131 - PLL 4 */
212 214
213 [136] = 0x0067, /* R136 - PLL 9 */ 215 { 136, 0x0067 }, /* R136 - PLL 9 */
214 [137] = 0x001C, /* R137 - PLL 10 */ 216 { 137, 0x001C }, /* R137 - PLL 10 */
215 [138] = 0x0071, /* R138 - PLL 11 */ 217 { 138, 0x0071 }, /* R138 - PLL 11 */
216 [139] = 0x00C7, /* R139 - PLL 12 */ 218 { 139, 0x00C7 }, /* R139 - PLL 12 */
217 [140] = 0x0067, /* R140 - PLL 13 */ 219 { 140, 0x0067 }, /* R140 - PLL 13 */
218 [141] = 0x0048, /* R141 - PLL 14 */ 220 { 141, 0x0048 }, /* R141 - PLL 14 */
219 [142] = 0x0022, /* R142 - PLL 15 */ 221 { 142, 0x0022 }, /* R142 - PLL 15 */
220 [143] = 0x0097, /* R143 - PLL 16 */ 222 { 143, 0x0097 }, /* R143 - PLL 16 */
221 223
222 [155] = 0x000C, /* R155 - FLL Control (1) */ 224 { 155, 0x000C }, /* R155 - FLL Control (1) */
223 [156] = 0x0039, /* R156 - FLL Control (2) */ 225 { 156, 0x0039 }, /* R156 - FLL Control (2) */
224 [157] = 0x0180, /* R157 - FLL Control (3) */ 226 { 157, 0x0180 }, /* R157 - FLL Control (3) */
225 227
226 [159] = 0x0032, /* R159 - FLL Control (5) */ 228 { 159, 0x0032 }, /* R159 - FLL Control (5) */
227 [160] = 0x0018, /* R160 - FLL Control (6) */ 229 { 160, 0x0018 }, /* R160 - FLL Control (6) */
228 [161] = 0x007D, /* R161 - FLL Control (7) */ 230 { 161, 0x007D }, /* R161 - FLL Control (7) */
229 [162] = 0x0008, /* R162 - FLL Control (8) */ 231 { 162, 0x0008 }, /* R162 - FLL Control (8) */
230 232
231 [252] = 0x0005, /* R252 - General test 1 */ 233 { 252, 0x0005 }, /* R252 - General test 1 */
232 234
233 [256] = 0x0000, /* R256 - DF1 */ 235 { 256, 0x0000 }, /* R256 - DF1 */
234 [257] = 0x0000, /* R257 - DF2 */ 236 { 257, 0x0000 }, /* R257 - DF2 */
235 [258] = 0x0000, /* R258 - DF3 */ 237 { 258, 0x0000 }, /* R258 - DF3 */
236 [259] = 0x0000, /* R259 - DF4 */ 238 { 259, 0x0000 }, /* R259 - DF4 */
237 [260] = 0x0000, /* R260 - DF5 */ 239 { 260, 0x0000 }, /* R260 - DF5 */
238 [261] = 0x0000, /* R261 - DF6 */ 240 { 261, 0x0000 }, /* R261 - DF6 */
239 [262] = 0x0000, /* R262 - DF7 */ 241 { 262, 0x0000 }, /* R262 - DF7 */
240 242
241 [264] = 0x0000, /* R264 - LHPF1 */ 243 { 264, 0x0000 }, /* R264 - LHPF1 */
242 [265] = 0x0000, /* R265 - LHPF2 */ 244 { 265, 0x0000 }, /* R265 - LHPF2 */
243 245
244 [268] = 0x0000, /* R268 - THREED1 */ 246 { 268, 0x0000 }, /* R268 - THREED1 */
245 [269] = 0x0000, /* R269 - THREED2 */ 247 { 269, 0x0000 }, /* R269 - THREED2 */
246 [270] = 0x0000, /* R270 - THREED3 */ 248 { 270, 0x0000 }, /* R270 - THREED3 */
247 [271] = 0x0000, /* R271 - THREED4 */ 249 { 271, 0x0000 }, /* R271 - THREED4 */
248 250
249 [276] = 0x000C, /* R276 - DRC 1 */ 251 { 276, 0x000C }, /* R276 - DRC 1 */
250 [277] = 0x0925, /* R277 - DRC 2 */ 252 { 277, 0x0925 }, /* R277 - DRC 2 */
251 [278] = 0x0000, /* R278 - DRC 3 */ 253 { 278, 0x0000 }, /* R278 - DRC 3 */
252 [279] = 0x0000, /* R279 - DRC 4 */ 254 { 279, 0x0000 }, /* R279 - DRC 4 */
253 [280] = 0x0000, /* R280 - DRC 5 */ 255 { 280, 0x0000 }, /* R280 - DRC 5 */
254 256
255 [285] = 0x0000, /* R285 - Tloopback */ 257 { 285, 0x0000 }, /* R285 - Tloopback */
256 258
257 [335] = 0x0004, /* R335 - EQ1 */ 259 { 335, 0x0004 }, /* R335 - EQ1 */
258 [336] = 0x6318, /* R336 - EQ2 */ 260 { 336, 0x6318 }, /* R336 - EQ2 */
259 [337] = 0x6300, /* R337 - EQ3 */ 261 { 337, 0x6300 }, /* R337 - EQ3 */
260 [338] = 0x0FCA, /* R338 - EQ4 */ 262 { 338, 0x0FCA }, /* R338 - EQ4 */
261 [339] = 0x0400, /* R339 - EQ5 */ 263 { 339, 0x0400 }, /* R339 - EQ5 */
262 [340] = 0x00D8, /* R340 - EQ6 */ 264 { 340, 0x00D8 }, /* R340 - EQ6 */
263 [341] = 0x1EB5, /* R341 - EQ7 */ 265 { 341, 0x1EB5 }, /* R341 - EQ7 */
264 [342] = 0xF145, /* R342 - EQ8 */ 266 { 342, 0xF145 }, /* R342 - EQ8 */
265 [343] = 0x0B75, /* R343 - EQ9 */ 267 { 343, 0x0B75 }, /* R343 - EQ9 */
266 [344] = 0x01C5, /* R344 - EQ10 */ 268 { 344, 0x01C5 }, /* R344 - EQ10 */
267 [345] = 0x1C58, /* R345 - EQ11 */ 269 { 345, 0x1C58 }, /* R345 - EQ11 */
268 [346] = 0xF373, /* R346 - EQ12 */ 270 { 346, 0xF373 }, /* R346 - EQ12 */
269 [347] = 0x0A54, /* R347 - EQ13 */ 271 { 347, 0x0A54 }, /* R347 - EQ13 */
270 [348] = 0x0558, /* R348 - EQ14 */ 272 { 348, 0x0558 }, /* R348 - EQ14 */
271 [349] = 0x168E, /* R349 - EQ15 */ 273 { 349, 0x168E }, /* R349 - EQ15 */
272 [350] = 0xF829, /* R350 - EQ16 */ 274 { 350, 0xF829 }, /* R350 - EQ16 */
273 [351] = 0x07AD, /* R351 - EQ17 */ 275 { 351, 0x07AD }, /* R351 - EQ17 */
274 [352] = 0x1103, /* R352 - EQ18 */ 276 { 352, 0x1103 }, /* R352 - EQ18 */
275 [353] = 0x0564, /* R353 - EQ19 */ 277 { 353, 0x0564 }, /* R353 - EQ19 */
276 [354] = 0x0559, /* R354 - EQ20 */ 278 { 354, 0x0559 }, /* R354 - EQ20 */
277 [355] = 0x4000, /* R355 - EQ21 */ 279 { 355, 0x4000 }, /* R355 - EQ21 */
278 [356] = 0x6318, /* R356 - EQ22 */ 280 { 356, 0x6318 }, /* R356 - EQ22 */
279 [357] = 0x6300, /* R357 - EQ23 */ 281 { 357, 0x6300 }, /* R357 - EQ23 */
280 [358] = 0x0FCA, /* R358 - EQ24 */ 282 { 358, 0x0FCA }, /* R358 - EQ24 */
281 [359] = 0x0400, /* R359 - EQ25 */ 283 { 359, 0x0400 }, /* R359 - EQ25 */
282 [360] = 0x00D8, /* R360 - EQ26 */ 284 { 360, 0x00D8 }, /* R360 - EQ26 */
283 [361] = 0x1EB5, /* R361 - EQ27 */ 285 { 361, 0x1EB5 }, /* R361 - EQ27 */
284 [362] = 0xF145, /* R362 - EQ28 */ 286 { 362, 0xF145 }, /* R362 - EQ28 */
285 [363] = 0x0B75, /* R363 - EQ29 */ 287 { 363, 0x0B75 }, /* R363 - EQ29 */
286 [364] = 0x01C5, /* R364 - EQ30 */ 288 { 364, 0x01C5 }, /* R364 - EQ30 */
287 [365] = 0x1C58, /* R365 - EQ31 */ 289 { 365, 0x1C58 }, /* R365 - EQ31 */
288 [366] = 0xF373, /* R366 - EQ32 */ 290 { 366, 0xF373 }, /* R366 - EQ32 */
289 [367] = 0x0A54, /* R367 - EQ33 */ 291 { 367, 0x0A54 }, /* R367 - EQ33 */
290 [368] = 0x0558, /* R368 - EQ34 */ 292 { 368, 0x0558 }, /* R368 - EQ34 */
291 [369] = 0x168E, /* R369 - EQ35 */ 293 { 369, 0x168E }, /* R369 - EQ35 */
292 [370] = 0xF829, /* R370 - EQ36 */ 294 { 370, 0xF829 }, /* R370 - EQ36 */
293 [371] = 0x07AD, /* R371 - EQ37 */ 295 { 371, 0x07AD }, /* R371 - EQ37 */
294 [372] = 0x1103, /* R372 - EQ38 */ 296 { 372, 0x1103 }, /* R372 - EQ38 */
295 [373] = 0x0564, /* R373 - EQ39 */ 297 { 373, 0x0564 }, /* R373 - EQ39 */
296 [374] = 0x0559, /* R374 - EQ40 */ 298 { 374, 0x0559 }, /* R374 - EQ40 */
297 [375] = 0x4000, /* R375 - EQ41 */ 299 { 375, 0x4000 }, /* R375 - EQ41 */
298 300
299 [513] = 0x0000, /* R513 - GPIO 2 */ 301 { 513, 0x0000 }, /* R513 - GPIO 2 */
300 [514] = 0x0000, /* R514 - GPIO 3 */ 302 { 514, 0x0000 }, /* R514 - GPIO 3 */
301 303
302 [516] = 0x8100, /* R516 - GPIO 5 */ 304 { 516, 0x8100 }, /* R516 - GPIO 5 */
303 [517] = 0x8100, /* R517 - GPIO 6 */ 305 { 517, 0x8100 }, /* R517 - GPIO 6 */
304 306
305 [560] = 0x0000, /* R560 - Interrupt Status 1 */ 307 { 560, 0x0000 }, /* R560 - Interrupt Status 1 */
306 [561] = 0x0000, /* R561 - Interrupt Status 2 */ 308 { 561, 0x0000 }, /* R561 - Interrupt Status 2 */
307 309
308 [568] = 0x0030, /* R568 - Interrupt Status 1 Mask */ 310 { 568, 0x0030 }, /* R568 - Interrupt Status 1 Mask */
309 [569] = 0xFFED, /* R569 - Interrupt Status 2 Mask */ 311 { 569, 0xFFED }, /* R569 - Interrupt Status 2 Mask */
310 312
311 [576] = 0x0000, /* R576 - Interrupt Control */ 313 { 576, 0x0000 }, /* R576 - Interrupt Control */
312 314
313 [584] = 0x002D, /* R584 - IRQ Debounce */ 315 { 584, 0x002D }, /* R584 - IRQ Debounce */
314 316
315 [586] = 0x0000, /* R586 - MICINT Source Pol */ 317 { 586, 0x0000 }, /* R586 - MICINT Source Pol */
316 318
317 [768] = 0x1C00, /* R768 - DSP2 Power Management */ 319 { 768, 0x1C00 }, /* R768 - DSP2 Power Management */
318 320
319 [1037] = 0x0000, /* R1037 - DSP2_ExecControl */ 321 { 1037, 0x0000 }, /* R1037 - DSP2_ExecControl */
320 322
321 [8192] = 0x0000, /* R8192 - DSP2 Instruction RAM 0 */ 323 { 8192, 0x0000 }, /* R8192 - DSP2 Instruction RAM 0 */
322 324
323 [9216] = 0x0030, /* R9216 - DSP2 Address RAM 2 */ 325 { 9216, 0x0030 }, /* R9216 - DSP2 Address RAM 2 */
324 [9217] = 0x0000, /* R9217 - DSP2 Address RAM 1 */ 326 { 9217, 0x0000 }, /* R9217 - DSP2 Address RAM 1 */
325 [9218] = 0x0000, /* R9218 - DSP2 Address RAM 0 */ 327 { 9218, 0x0000 }, /* R9218 - DSP2 Address RAM 0 */
326 328
327 [12288] = 0x0000, /* R12288 - DSP2 Data1 RAM 1 */ 329 { 12288, 0x0000 }, /* R12288 - DSP2 Data1 RAM 1 */
328 [12289] = 0x0000, /* R12289 - DSP2 Data1 RAM 0 */ 330 { 12289, 0x0000 }, /* R12289 - DSP2 Data1 RAM 0 */
329 331
330 [13312] = 0x0000, /* R13312 - DSP2 Data2 RAM 1 */ 332 { 13312, 0x0000 }, /* R13312 - DSP2 Data2 RAM 1 */
331 [13313] = 0x0000, /* R13313 - DSP2 Data2 RAM 0 */ 333 { 13313, 0x0000 }, /* R13313 - DSP2 Data2 RAM 0 */
332 334
333 [14336] = 0x0000, /* R14336 - DSP2 Data3 RAM 1 */ 335 { 14336, 0x0000 }, /* R14336 - DSP2 Data3 RAM 1 */
334 [14337] = 0x0000, /* R14337 - DSP2 Data3 RAM 0 */ 336 { 14337, 0x0000 }, /* R14337 - DSP2 Data3 RAM 0 */
335 337
336 [15360] = 0x000A, /* R15360 - DSP2 Coeff RAM 0 */ 338 { 15360, 0x000A }, /* R15360 - DSP2 Coeff RAM 0 */
337 339
338 [16384] = 0x0000, /* R16384 - RETUNEADC_SHARED_COEFF_1 */ 340 { 16384, 0x0000 }, /* R16384 - RETUNEADC_SHARED_COEFF_1 */
339 [16385] = 0x0000, /* R16385 - RETUNEADC_SHARED_COEFF_0 */ 341 { 16385, 0x0000 }, /* R16385 - RETUNEADC_SHARED_COEFF_0 */
340 [16386] = 0x0000, /* R16386 - RETUNEDAC_SHARED_COEFF_1 */ 342 { 16386, 0x0000 }, /* R16386 - RETUNEDAC_SHARED_COEFF_1 */
341 [16387] = 0x0000, /* R16387 - RETUNEDAC_SHARED_COEFF_0 */ 343 { 16387, 0x0000 }, /* R16387 - RETUNEDAC_SHARED_COEFF_0 */
342 [16388] = 0x0000, /* R16388 - SOUNDSTAGE_ENABLES_1 */ 344 { 16388, 0x0000 }, /* R16388 - SOUNDSTAGE_ENABLES_1 */
343 [16389] = 0x0000, /* R16389 - SOUNDSTAGE_ENABLES_0 */ 345 { 16389, 0x0000 }, /* R16389 - SOUNDSTAGE_ENABLES_0 */
344 346
345 [16896] = 0x0002, /* R16896 - HDBASS_AI_1 */ 347 { 16896, 0x0002 }, /* R16896 - HDBASS_AI_1 */
346 [16897] = 0xBD12, /* R16897 - HDBASS_AI_0 */ 348 { 16897, 0xBD12 }, /* R16897 - HDBASS_AI_0 */
347 [16898] = 0x007C, /* R16898 - HDBASS_AR_1 */ 349 { 16898, 0x007C }, /* R16898 - HDBASS_AR_1 */
348 [16899] = 0x586C, /* R16899 - HDBASS_AR_0 */ 350 { 16899, 0x586C }, /* R16899 - HDBASS_AR_0 */
349 [16900] = 0x0053, /* R16900 - HDBASS_B_1 */ 351 { 16900, 0x0053 }, /* R16900 - HDBASS_B_1 */
350 [16901] = 0x8121, /* R16901 - HDBASS_B_0 */ 352 { 16901, 0x8121 }, /* R16901 - HDBASS_B_0 */
351 [16902] = 0x003F, /* R16902 - HDBASS_K_1 */ 353 { 16902, 0x003F }, /* R16902 - HDBASS_K_1 */
352 [16903] = 0x8BD8, /* R16903 - HDBASS_K_0 */ 354 { 16903, 0x8BD8 }, /* R16903 - HDBASS_K_0 */
353 [16904] = 0x0032, /* R16904 - HDBASS_N1_1 */ 355 { 16904, 0x0032 }, /* R16904 - HDBASS_N1_1 */
354 [16905] = 0xF52D, /* R16905 - HDBASS_N1_0 */ 356 { 16905, 0xF52D }, /* R16905 - HDBASS_N1_0 */
355 [16906] = 0x0065, /* R16906 - HDBASS_N2_1 */ 357 { 16906, 0x0065 }, /* R16906 - HDBASS_N2_1 */
356 [16907] = 0xAC8C, /* R16907 - HDBASS_N2_0 */ 358 { 16907, 0xAC8C }, /* R16907 - HDBASS_N2_0 */
357 [16908] = 0x006B, /* R16908 - HDBASS_N3_1 */ 359 { 16908, 0x006B }, /* R16908 - HDBASS_N3_1 */
358 [16909] = 0xE087, /* R16909 - HDBASS_N3_0 */ 360 { 16909, 0xE087 }, /* R16909 - HDBASS_N3_0 */
359 [16910] = 0x0072, /* R16910 - HDBASS_N4_1 */ 361 { 16910, 0x0072 }, /* R16910 - HDBASS_N4_1 */
360 [16911] = 0x1483, /* R16911 - HDBASS_N4_0 */ 362 { 16911, 0x1483 }, /* R16911 - HDBASS_N4_0 */
361 [16912] = 0x0072, /* R16912 - HDBASS_N5_1 */ 363 { 16912, 0x0072 }, /* R16912 - HDBASS_N5_1 */
362 [16913] = 0x1483, /* R16913 - HDBASS_N5_0 */ 364 { 16913, 0x1483 }, /* R16913 - HDBASS_N5_0 */
363 [16914] = 0x0043, /* R16914 - HDBASS_X1_1 */ 365 { 16914, 0x0043 }, /* R16914 - HDBASS_X1_1 */
364 [16915] = 0x3525, /* R16915 - HDBASS_X1_0 */ 366 { 16915, 0x3525 }, /* R16915 - HDBASS_X1_0 */
365 [16916] = 0x0006, /* R16916 - HDBASS_X2_1 */ 367 { 16916, 0x0006 }, /* R16916 - HDBASS_X2_1 */
366 [16917] = 0x6A4A, /* R16917 - HDBASS_X2_0 */ 368 { 16917, 0x6A4A }, /* R16917 - HDBASS_X2_0 */
367 [16918] = 0x0043, /* R16918 - HDBASS_X3_1 */ 369 { 16918, 0x0043 }, /* R16918 - HDBASS_X3_1 */
368 [16919] = 0x6079, /* R16919 - HDBASS_X3_0 */ 370 { 16919, 0x6079 }, /* R16919 - HDBASS_X3_0 */
369 [16920] = 0x0008, /* R16920 - HDBASS_ATK_1 */ 371 { 16920, 0x0008 }, /* R16920 - HDBASS_ATK_1 */
370 [16921] = 0x0000, /* R16921 - HDBASS_ATK_0 */ 372 { 16921, 0x0000 }, /* R16921 - HDBASS_ATK_0 */
371 [16922] = 0x0001, /* R16922 - HDBASS_DCY_1 */ 373 { 16922, 0x0001 }, /* R16922 - HDBASS_DCY_1 */
372 [16923] = 0x0000, /* R16923 - HDBASS_DCY_0 */ 374 { 16923, 0x0000 }, /* R16923 - HDBASS_DCY_0 */
373 [16924] = 0x0059, /* R16924 - HDBASS_PG_1 */ 375 { 16924, 0x0059 }, /* R16924 - HDBASS_PG_1 */
374 [16925] = 0x999A, /* R16925 - HDBASS_PG_0 */ 376 { 16925, 0x999A }, /* R16925 - HDBASS_PG_0 */
375 377
376 [17048] = 0x0083, /* R17408 - HPF_C_1 */ 378 { 17048, 0x0083 }, /* R17408 - HPF_C_1 */
377 [17049] = 0x98AD, /* R17409 - HPF_C_0 */ 379 { 17049, 0x98AD }, /* R17409 - HPF_C_0 */
378 380
379 [17920] = 0x007F, /* R17920 - ADCL_RETUNE_C1_1 */ 381 { 17920, 0x007F }, /* R17920 - ADCL_RETUNE_C1_1 */
380 [17921] = 0xFFFF, /* R17921 - ADCL_RETUNE_C1_0 */ 382 { 17921, 0xFFFF }, /* R17921 - ADCL_RETUNE_C1_0 */
381 [17922] = 0x0000, /* R17922 - ADCL_RETUNE_C2_1 */ 383 { 17922, 0x0000 }, /* R17922 - ADCL_RETUNE_C2_1 */
382 [17923] = 0x0000, /* R17923 - ADCL_RETUNE_C2_0 */ 384 { 17923, 0x0000 }, /* R17923 - ADCL_RETUNE_C2_0 */
383 [17924] = 0x0000, /* R17924 - ADCL_RETUNE_C3_1 */ 385 { 17924, 0x0000 }, /* R17924 - ADCL_RETUNE_C3_1 */
384 [17925] = 0x0000, /* R17925 - ADCL_RETUNE_C3_0 */ 386 { 17925, 0x0000 }, /* R17925 - ADCL_RETUNE_C3_0 */
385 [17926] = 0x0000, /* R17926 - ADCL_RETUNE_C4_1 */ 387 { 17926, 0x0000 }, /* R17926 - ADCL_RETUNE_C4_1 */
386 [17927] = 0x0000, /* R17927 - ADCL_RETUNE_C4_0 */ 388 { 17927, 0x0000 }, /* R17927 - ADCL_RETUNE_C4_0 */
387 [17928] = 0x0000, /* R17928 - ADCL_RETUNE_C5_1 */ 389 { 17928, 0x0000 }, /* R17928 - ADCL_RETUNE_C5_1 */
388 [17929] = 0x0000, /* R17929 - ADCL_RETUNE_C5_0 */ 390 { 17929, 0x0000 }, /* R17929 - ADCL_RETUNE_C5_0 */
389 [17930] = 0x0000, /* R17930 - ADCL_RETUNE_C6_1 */ 391 { 17930, 0x0000 }, /* R17930 - ADCL_RETUNE_C6_1 */
390 [17931] = 0x0000, /* R17931 - ADCL_RETUNE_C6_0 */ 392 { 17931, 0x0000 }, /* R17931 - ADCL_RETUNE_C6_0 */
391 [17932] = 0x0000, /* R17932 - ADCL_RETUNE_C7_1 */ 393 { 17932, 0x0000 }, /* R17932 - ADCL_RETUNE_C7_1 */
392 [17933] = 0x0000, /* R17933 - ADCL_RETUNE_C7_0 */ 394 { 17933, 0x0000 }, /* R17933 - ADCL_RETUNE_C7_0 */
393 [17934] = 0x0000, /* R17934 - ADCL_RETUNE_C8_1 */ 395 { 17934, 0x0000 }, /* R17934 - ADCL_RETUNE_C8_1 */
394 [17935] = 0x0000, /* R17935 - ADCL_RETUNE_C8_0 */ 396 { 17935, 0x0000 }, /* R17935 - ADCL_RETUNE_C8_0 */
395 [17936] = 0x0000, /* R17936 - ADCL_RETUNE_C9_1 */ 397 { 17936, 0x0000 }, /* R17936 - ADCL_RETUNE_C9_1 */
396 [17937] = 0x0000, /* R17937 - ADCL_RETUNE_C9_0 */ 398 { 17937, 0x0000 }, /* R17937 - ADCL_RETUNE_C9_0 */
397 [17938] = 0x0000, /* R17938 - ADCL_RETUNE_C10_1 */ 399 { 17938, 0x0000 }, /* R17938 - ADCL_RETUNE_C10_1 */
398 [17939] = 0x0000, /* R17939 - ADCL_RETUNE_C10_0 */ 400 { 17939, 0x0000 }, /* R17939 - ADCL_RETUNE_C10_0 */
399 [17940] = 0x0000, /* R17940 - ADCL_RETUNE_C11_1 */ 401 { 17940, 0x0000 }, /* R17940 - ADCL_RETUNE_C11_1 */
400 [17941] = 0x0000, /* R17941 - ADCL_RETUNE_C11_0 */ 402 { 17941, 0x0000 }, /* R17941 - ADCL_RETUNE_C11_0 */
401 [17942] = 0x0000, /* R17942 - ADCL_RETUNE_C12_1 */ 403 { 17942, 0x0000 }, /* R17942 - ADCL_RETUNE_C12_1 */
402 [17943] = 0x0000, /* R17943 - ADCL_RETUNE_C12_0 */ 404 { 17943, 0x0000 }, /* R17943 - ADCL_RETUNE_C12_0 */
403 [17944] = 0x0000, /* R17944 - ADCL_RETUNE_C13_1 */ 405 { 17944, 0x0000 }, /* R17944 - ADCL_RETUNE_C13_1 */
404 [17945] = 0x0000, /* R17945 - ADCL_RETUNE_C13_0 */ 406 { 17945, 0x0000 }, /* R17945 - ADCL_RETUNE_C13_0 */
405 [17946] = 0x0000, /* R17946 - ADCL_RETUNE_C14_1 */ 407 { 17946, 0x0000 }, /* R17946 - ADCL_RETUNE_C14_1 */
406 [17947] = 0x0000, /* R17947 - ADCL_RETUNE_C14_0 */ 408 { 17947, 0x0000 }, /* R17947 - ADCL_RETUNE_C14_0 */
407 [17948] = 0x0000, /* R17948 - ADCL_RETUNE_C15_1 */ 409 { 17948, 0x0000 }, /* R17948 - ADCL_RETUNE_C15_1 */
408 [17949] = 0x0000, /* R17949 - ADCL_RETUNE_C15_0 */ 410 { 17949, 0x0000 }, /* R17949 - ADCL_RETUNE_C15_0 */
409 [17950] = 0x0000, /* R17950 - ADCL_RETUNE_C16_1 */ 411 { 17950, 0x0000 }, /* R17950 - ADCL_RETUNE_C16_1 */
410 [17951] = 0x0000, /* R17951 - ADCL_RETUNE_C16_0 */ 412 { 17951, 0x0000 }, /* R17951 - ADCL_RETUNE_C16_0 */
411 [17952] = 0x0000, /* R17952 - ADCL_RETUNE_C17_1 */ 413 { 17952, 0x0000 }, /* R17952 - ADCL_RETUNE_C17_1 */
412 [17953] = 0x0000, /* R17953 - ADCL_RETUNE_C17_0 */ 414 { 17953, 0x0000 }, /* R17953 - ADCL_RETUNE_C17_0 */
413 [17954] = 0x0000, /* R17954 - ADCL_RETUNE_C18_1 */ 415 { 17954, 0x0000 }, /* R17954 - ADCL_RETUNE_C18_1 */
414 [17955] = 0x0000, /* R17955 - ADCL_RETUNE_C18_0 */ 416 { 17955, 0x0000 }, /* R17955 - ADCL_RETUNE_C18_0 */
415 [17956] = 0x0000, /* R17956 - ADCL_RETUNE_C19_1 */ 417 { 17956, 0x0000 }, /* R17956 - ADCL_RETUNE_C19_1 */
416 [17957] = 0x0000, /* R17957 - ADCL_RETUNE_C19_0 */ 418 { 17957, 0x0000 }, /* R17957 - ADCL_RETUNE_C19_0 */
417 [17958] = 0x0000, /* R17958 - ADCL_RETUNE_C20_1 */ 419 { 17958, 0x0000 }, /* R17958 - ADCL_RETUNE_C20_1 */
418 [17959] = 0x0000, /* R17959 - ADCL_RETUNE_C20_0 */ 420 { 17959, 0x0000 }, /* R17959 - ADCL_RETUNE_C20_0 */
419 [17960] = 0x0000, /* R17960 - ADCL_RETUNE_C21_1 */ 421 { 17960, 0x0000 }, /* R17960 - ADCL_RETUNE_C21_1 */
420 [17961] = 0x0000, /* R17961 - ADCL_RETUNE_C21_0 */ 422 { 17961, 0x0000 }, /* R17961 - ADCL_RETUNE_C21_0 */
421 [17962] = 0x0000, /* R17962 - ADCL_RETUNE_C22_1 */ 423 { 17962, 0x0000 }, /* R17962 - ADCL_RETUNE_C22_1 */
422 [17963] = 0x0000, /* R17963 - ADCL_RETUNE_C22_0 */ 424 { 17963, 0x0000 }, /* R17963 - ADCL_RETUNE_C22_0 */
423 [17964] = 0x0000, /* R17964 - ADCL_RETUNE_C23_1 */ 425 { 17964, 0x0000 }, /* R17964 - ADCL_RETUNE_C23_1 */
424 [17965] = 0x0000, /* R17965 - ADCL_RETUNE_C23_0 */ 426 { 17965, 0x0000 }, /* R17965 - ADCL_RETUNE_C23_0 */
425 [17966] = 0x0000, /* R17966 - ADCL_RETUNE_C24_1 */ 427 { 17966, 0x0000 }, /* R17966 - ADCL_RETUNE_C24_1 */
426 [17967] = 0x0000, /* R17967 - ADCL_RETUNE_C24_0 */ 428 { 17967, 0x0000 }, /* R17967 - ADCL_RETUNE_C24_0 */
427 [17968] = 0x0000, /* R17968 - ADCL_RETUNE_C25_1 */ 429 { 17968, 0x0000 }, /* R17968 - ADCL_RETUNE_C25_1 */
428 [17969] = 0x0000, /* R17969 - ADCL_RETUNE_C25_0 */ 430 { 17969, 0x0000 }, /* R17969 - ADCL_RETUNE_C25_0 */
429 [17970] = 0x0000, /* R17970 - ADCL_RETUNE_C26_1 */ 431 { 17970, 0x0000 }, /* R17970 - ADCL_RETUNE_C26_1 */
430 [17971] = 0x0000, /* R17971 - ADCL_RETUNE_C26_0 */ 432 { 17971, 0x0000 }, /* R17971 - ADCL_RETUNE_C26_0 */
431 [17972] = 0x0000, /* R17972 - ADCL_RETUNE_C27_1 */ 433 { 17972, 0x0000 }, /* R17972 - ADCL_RETUNE_C27_1 */
432 [17973] = 0x0000, /* R17973 - ADCL_RETUNE_C27_0 */ 434 { 17973, 0x0000 }, /* R17973 - ADCL_RETUNE_C27_0 */
433 [17974] = 0x0000, /* R17974 - ADCL_RETUNE_C28_1 */ 435 { 17974, 0x0000 }, /* R17974 - ADCL_RETUNE_C28_1 */
434 [17975] = 0x0000, /* R17975 - ADCL_RETUNE_C28_0 */ 436 { 17975, 0x0000 }, /* R17975 - ADCL_RETUNE_C28_0 */
435 [17976] = 0x0000, /* R17976 - ADCL_RETUNE_C29_1 */ 437 { 17976, 0x0000 }, /* R17976 - ADCL_RETUNE_C29_1 */
436 [17977] = 0x0000, /* R17977 - ADCL_RETUNE_C29_0 */ 438 { 17977, 0x0000 }, /* R17977 - ADCL_RETUNE_C29_0 */
437 [17978] = 0x0000, /* R17978 - ADCL_RETUNE_C30_1 */ 439 { 17978, 0x0000 }, /* R17978 - ADCL_RETUNE_C30_1 */
438 [17979] = 0x0000, /* R17979 - ADCL_RETUNE_C30_0 */ 440 { 17979, 0x0000 }, /* R17979 - ADCL_RETUNE_C30_0 */
439 [17980] = 0x0000, /* R17980 - ADCL_RETUNE_C31_1 */ 441 { 17980, 0x0000 }, /* R17980 - ADCL_RETUNE_C31_1 */
440 [17981] = 0x0000, /* R17981 - ADCL_RETUNE_C31_0 */ 442 { 17981, 0x0000 }, /* R17981 - ADCL_RETUNE_C31_0 */
441 [17982] = 0x0000, /* R17982 - ADCL_RETUNE_C32_1 */ 443 { 17982, 0x0000 }, /* R17982 - ADCL_RETUNE_C32_1 */
442 [17983] = 0x0000, /* R17983 - ADCL_RETUNE_C32_0 */ 444 { 17983, 0x0000 }, /* R17983 - ADCL_RETUNE_C32_0 */
443 445
444 [18432] = 0x0020, /* R18432 - RETUNEADC_PG2_1 */ 446 { 18432, 0x0020 }, /* R18432 - RETUNEADC_PG2_1 */
445 [18433] = 0x0000, /* R18433 - RETUNEADC_PG2_0 */ 447 { 18433, 0x0000 }, /* R18433 - RETUNEADC_PG2_0 */
446 [18434] = 0x0040, /* R18434 - RETUNEADC_PG_1 */ 448 { 18434, 0x0040 }, /* R18434 - RETUNEADC_PG_1 */
447 [18435] = 0x0000, /* R18435 - RETUNEADC_PG_0 */ 449 { 18435, 0x0000 }, /* R18435 - RETUNEADC_PG_0 */
448 450
449 [18944] = 0x007F, /* R18944 - ADCR_RETUNE_C1_1 */ 451 { 18944, 0x007F }, /* R18944 - ADCR_RETUNE_C1_1 */
450 [18945] = 0xFFFF, /* R18945 - ADCR_RETUNE_C1_0 */ 452 { 18945, 0xFFFF }, /* R18945 - ADCR_RETUNE_C1_0 */
451 [18946] = 0x0000, /* R18946 - ADCR_RETUNE_C2_1 */ 453 { 18946, 0x0000 }, /* R18946 - ADCR_RETUNE_C2_1 */
452 [18947] = 0x0000, /* R18947 - ADCR_RETUNE_C2_0 */ 454 { 18947, 0x0000 }, /* R18947 - ADCR_RETUNE_C2_0 */
453 [18948] = 0x0000, /* R18948 - ADCR_RETUNE_C3_1 */ 455 { 18948, 0x0000 }, /* R18948 - ADCR_RETUNE_C3_1 */
454 [18949] = 0x0000, /* R18949 - ADCR_RETUNE_C3_0 */ 456 { 18949, 0x0000 }, /* R18949 - ADCR_RETUNE_C3_0 */
455 [18950] = 0x0000, /* R18950 - ADCR_RETUNE_C4_1 */ 457 { 18950, 0x0000 }, /* R18950 - ADCR_RETUNE_C4_1 */
456 [18951] = 0x0000, /* R18951 - ADCR_RETUNE_C4_0 */ 458 { 18951, 0x0000 }, /* R18951 - ADCR_RETUNE_C4_0 */
457 [18952] = 0x0000, /* R18952 - ADCR_RETUNE_C5_1 */ 459 { 18952, 0x0000 }, /* R18952 - ADCR_RETUNE_C5_1 */
458 [18953] = 0x0000, /* R18953 - ADCR_RETUNE_C5_0 */ 460 { 18953, 0x0000 }, /* R18953 - ADCR_RETUNE_C5_0 */
459 [18954] = 0x0000, /* R18954 - ADCR_RETUNE_C6_1 */ 461 { 18954, 0x0000 }, /* R18954 - ADCR_RETUNE_C6_1 */
460 [18955] = 0x0000, /* R18955 - ADCR_RETUNE_C6_0 */ 462 { 18955, 0x0000 }, /* R18955 - ADCR_RETUNE_C6_0 */
461 [18956] = 0x0000, /* R18956 - ADCR_RETUNE_C7_1 */ 463 { 18956, 0x0000 }, /* R18956 - ADCR_RETUNE_C7_1 */
462 [18957] = 0x0000, /* R18957 - ADCR_RETUNE_C7_0 */ 464 { 18957, 0x0000 }, /* R18957 - ADCR_RETUNE_C7_0 */
463 [18958] = 0x0000, /* R18958 - ADCR_RETUNE_C8_1 */ 465 { 18958, 0x0000 }, /* R18958 - ADCR_RETUNE_C8_1 */
464 [18959] = 0x0000, /* R18959 - ADCR_RETUNE_C8_0 */ 466 { 18959, 0x0000 }, /* R18959 - ADCR_RETUNE_C8_0 */
465 [18960] = 0x0000, /* R18960 - ADCR_RETUNE_C9_1 */ 467 { 18960, 0x0000 }, /* R18960 - ADCR_RETUNE_C9_1 */
466 [18961] = 0x0000, /* R18961 - ADCR_RETUNE_C9_0 */ 468 { 18961, 0x0000 }, /* R18961 - ADCR_RETUNE_C9_0 */
467 [18962] = 0x0000, /* R18962 - ADCR_RETUNE_C10_1 */ 469 { 18962, 0x0000 }, /* R18962 - ADCR_RETUNE_C10_1 */
468 [18963] = 0x0000, /* R18963 - ADCR_RETUNE_C10_0 */ 470 { 18963, 0x0000 }, /* R18963 - ADCR_RETUNE_C10_0 */
469 [18964] = 0x0000, /* R18964 - ADCR_RETUNE_C11_1 */ 471 { 18964, 0x0000 }, /* R18964 - ADCR_RETUNE_C11_1 */
470 [18965] = 0x0000, /* R18965 - ADCR_RETUNE_C11_0 */ 472 { 18965, 0x0000 }, /* R18965 - ADCR_RETUNE_C11_0 */
471 [18966] = 0x0000, /* R18966 - ADCR_RETUNE_C12_1 */ 473 { 18966, 0x0000 }, /* R18966 - ADCR_RETUNE_C12_1 */
472 [18967] = 0x0000, /* R18967 - ADCR_RETUNE_C12_0 */ 474 { 18967, 0x0000 }, /* R18967 - ADCR_RETUNE_C12_0 */
473 [18968] = 0x0000, /* R18968 - ADCR_RETUNE_C13_1 */ 475 { 18968, 0x0000 }, /* R18968 - ADCR_RETUNE_C13_1 */
474 [18969] = 0x0000, /* R18969 - ADCR_RETUNE_C13_0 */ 476 { 18969, 0x0000 }, /* R18969 - ADCR_RETUNE_C13_0 */
475 [18970] = 0x0000, /* R18970 - ADCR_RETUNE_C14_1 */ 477 { 18970, 0x0000 }, /* R18970 - ADCR_RETUNE_C14_1 */
476 [18971] = 0x0000, /* R18971 - ADCR_RETUNE_C14_0 */ 478 { 18971, 0x0000 }, /* R18971 - ADCR_RETUNE_C14_0 */
477 [18972] = 0x0000, /* R18972 - ADCR_RETUNE_C15_1 */ 479 { 18972, 0x0000 }, /* R18972 - ADCR_RETUNE_C15_1 */
478 [18973] = 0x0000, /* R18973 - ADCR_RETUNE_C15_0 */ 480 { 18973, 0x0000 }, /* R18973 - ADCR_RETUNE_C15_0 */
479 [18974] = 0x0000, /* R18974 - ADCR_RETUNE_C16_1 */ 481 { 18974, 0x0000 }, /* R18974 - ADCR_RETUNE_C16_1 */
480 [18975] = 0x0000, /* R18975 - ADCR_RETUNE_C16_0 */ 482 { 18975, 0x0000 }, /* R18975 - ADCR_RETUNE_C16_0 */
481 [18976] = 0x0000, /* R18976 - ADCR_RETUNE_C17_1 */ 483 { 18976, 0x0000 }, /* R18976 - ADCR_RETUNE_C17_1 */
482 [18977] = 0x0000, /* R18977 - ADCR_RETUNE_C17_0 */ 484 { 18977, 0x0000 }, /* R18977 - ADCR_RETUNE_C17_0 */
483 [18978] = 0x0000, /* R18978 - ADCR_RETUNE_C18_1 */ 485 { 18978, 0x0000 }, /* R18978 - ADCR_RETUNE_C18_1 */
484 [18979] = 0x0000, /* R18979 - ADCR_RETUNE_C18_0 */ 486 { 18979, 0x0000 }, /* R18979 - ADCR_RETUNE_C18_0 */
485 [18980] = 0x0000, /* R18980 - ADCR_RETUNE_C19_1 */ 487 { 18980, 0x0000 }, /* R18980 - ADCR_RETUNE_C19_1 */
486 [18981] = 0x0000, /* R18981 - ADCR_RETUNE_C19_0 */ 488 { 18981, 0x0000 }, /* R18981 - ADCR_RETUNE_C19_0 */
487 [18982] = 0x0000, /* R18982 - ADCR_RETUNE_C20_1 */ 489 { 18982, 0x0000 }, /* R18982 - ADCR_RETUNE_C20_1 */
488 [18983] = 0x0000, /* R18983 - ADCR_RETUNE_C20_0 */ 490 { 18983, 0x0000 }, /* R18983 - ADCR_RETUNE_C20_0 */
489 [18984] = 0x0000, /* R18984 - ADCR_RETUNE_C21_1 */ 491 { 18984, 0x0000 }, /* R18984 - ADCR_RETUNE_C21_1 */
490 [18985] = 0x0000, /* R18985 - ADCR_RETUNE_C21_0 */ 492 { 18985, 0x0000 }, /* R18985 - ADCR_RETUNE_C21_0 */
491 [18986] = 0x0000, /* R18986 - ADCR_RETUNE_C22_1 */ 493 { 18986, 0x0000 }, /* R18986 - ADCR_RETUNE_C22_1 */
492 [18987] = 0x0000, /* R18987 - ADCR_RETUNE_C22_0 */ 494 { 18987, 0x0000 }, /* R18987 - ADCR_RETUNE_C22_0 */
493 [18988] = 0x0000, /* R18988 - ADCR_RETUNE_C23_1 */ 495 { 18988, 0x0000 }, /* R18988 - ADCR_RETUNE_C23_1 */
494 [18989] = 0x0000, /* R18989 - ADCR_RETUNE_C23_0 */ 496 { 18989, 0x0000 }, /* R18989 - ADCR_RETUNE_C23_0 */
495 [18990] = 0x0000, /* R18990 - ADCR_RETUNE_C24_1 */ 497 { 18990, 0x0000 }, /* R18990 - ADCR_RETUNE_C24_1 */
496 [18991] = 0x0000, /* R18991 - ADCR_RETUNE_C24_0 */ 498 { 18991, 0x0000 }, /* R18991 - ADCR_RETUNE_C24_0 */
497 [18992] = 0x0000, /* R18992 - ADCR_RETUNE_C25_1 */ 499 { 18992, 0x0000 }, /* R18992 - ADCR_RETUNE_C25_1 */
498 [18993] = 0x0000, /* R18993 - ADCR_RETUNE_C25_0 */ 500 { 18993, 0x0000 }, /* R18993 - ADCR_RETUNE_C25_0 */
499 [18994] = 0x0000, /* R18994 - ADCR_RETUNE_C26_1 */ 501 { 18994, 0x0000 }, /* R18994 - ADCR_RETUNE_C26_1 */
500 [18995] = 0x0000, /* R18995 - ADCR_RETUNE_C26_0 */ 502 { 18995, 0x0000 }, /* R18995 - ADCR_RETUNE_C26_0 */
501 [18996] = 0x0000, /* R18996 - ADCR_RETUNE_C27_1 */ 503 { 18996, 0x0000 }, /* R18996 - ADCR_RETUNE_C27_1 */
502 [18997] = 0x0000, /* R18997 - ADCR_RETUNE_C27_0 */ 504 { 18997, 0x0000 }, /* R18997 - ADCR_RETUNE_C27_0 */
503 [18998] = 0x0000, /* R18998 - ADCR_RETUNE_C28_1 */ 505 { 18998, 0x0000 }, /* R18998 - ADCR_RETUNE_C28_1 */
504 [18999] = 0x0000, /* R18999 - ADCR_RETUNE_C28_0 */ 506 { 18999, 0x0000 }, /* R18999 - ADCR_RETUNE_C28_0 */
505 [19000] = 0x0000, /* R19000 - ADCR_RETUNE_C29_1 */ 507 { 19000, 0x0000 }, /* R19000 - ADCR_RETUNE_C29_1 */
506 [19001] = 0x0000, /* R19001 - ADCR_RETUNE_C29_0 */ 508 { 19001, 0x0000 }, /* R19001 - ADCR_RETUNE_C29_0 */
507 [19002] = 0x0000, /* R19002 - ADCR_RETUNE_C30_1 */ 509 { 19002, 0x0000 }, /* R19002 - ADCR_RETUNE_C30_1 */
508 [19003] = 0x0000, /* R19003 - ADCR_RETUNE_C30_0 */ 510 { 19003, 0x0000 }, /* R19003 - ADCR_RETUNE_C30_0 */
509 [19004] = 0x0000, /* R19004 - ADCR_RETUNE_C31_1 */ 511 { 19004, 0x0000 }, /* R19004 - ADCR_RETUNE_C31_1 */
510 [19005] = 0x0000, /* R19005 - ADCR_RETUNE_C31_0 */ 512 { 19005, 0x0000 }, /* R19005 - ADCR_RETUNE_C31_0 */
511 [19006] = 0x0000, /* R19006 - ADCR_RETUNE_C32_1 */ 513 { 19006, 0x0000 }, /* R19006 - ADCR_RETUNE_C32_1 */
512 [19007] = 0x0000, /* R19007 - ADCR_RETUNE_C32_0 */ 514 { 19007, 0x0000 }, /* R19007 - ADCR_RETUNE_C32_0 */
513 515
514 [19456] = 0x007F, /* R19456 - DACL_RETUNE_C1_1 */ 516 { 19456, 0x007F }, /* R19456 - DACL_RETUNE_C1_1 */
515 [19457] = 0xFFFF, /* R19457 - DACL_RETUNE_C1_0 */ 517 { 19457, 0xFFFF }, /* R19457 - DACL_RETUNE_C1_0 */
516 [19458] = 0x0000, /* R19458 - DACL_RETUNE_C2_1 */ 518 { 19458, 0x0000 }, /* R19458 - DACL_RETUNE_C2_1 */
517 [19459] = 0x0000, /* R19459 - DACL_RETUNE_C2_0 */ 519 { 19459, 0x0000 }, /* R19459 - DACL_RETUNE_C2_0 */
518 [19460] = 0x0000, /* R19460 - DACL_RETUNE_C3_1 */ 520 { 19460, 0x0000 }, /* R19460 - DACL_RETUNE_C3_1 */
519 [19461] = 0x0000, /* R19461 - DACL_RETUNE_C3_0 */ 521 { 19461, 0x0000 }, /* R19461 - DACL_RETUNE_C3_0 */
520 [19462] = 0x0000, /* R19462 - DACL_RETUNE_C4_1 */ 522 { 19462, 0x0000 }, /* R19462 - DACL_RETUNE_C4_1 */
521 [19463] = 0x0000, /* R19463 - DACL_RETUNE_C4_0 */ 523 { 19463, 0x0000 }, /* R19463 - DACL_RETUNE_C4_0 */
522 [19464] = 0x0000, /* R19464 - DACL_RETUNE_C5_1 */ 524 { 19464, 0x0000 }, /* R19464 - DACL_RETUNE_C5_1 */
523 [19465] = 0x0000, /* R19465 - DACL_RETUNE_C5_0 */ 525 { 19465, 0x0000 }, /* R19465 - DACL_RETUNE_C5_0 */
524 [19466] = 0x0000, /* R19466 - DACL_RETUNE_C6_1 */ 526 { 19466, 0x0000 }, /* R19466 - DACL_RETUNE_C6_1 */
525 [19467] = 0x0000, /* R19467 - DACL_RETUNE_C6_0 */ 527 { 19467, 0x0000 }, /* R19467 - DACL_RETUNE_C6_0 */
526 [19468] = 0x0000, /* R19468 - DACL_RETUNE_C7_1 */ 528 { 19468, 0x0000 }, /* R19468 - DACL_RETUNE_C7_1 */
527 [19469] = 0x0000, /* R19469 - DACL_RETUNE_C7_0 */ 529 { 19469, 0x0000 }, /* R19469 - DACL_RETUNE_C7_0 */
528 [19470] = 0x0000, /* R19470 - DACL_RETUNE_C8_1 */ 530 { 19470, 0x0000 }, /* R19470 - DACL_RETUNE_C8_1 */
529 [19471] = 0x0000, /* R19471 - DACL_RETUNE_C8_0 */ 531 { 19471, 0x0000 }, /* R19471 - DACL_RETUNE_C8_0 */
530 [19472] = 0x0000, /* R19472 - DACL_RETUNE_C9_1 */ 532 { 19472, 0x0000 }, /* R19472 - DACL_RETUNE_C9_1 */
531 [19473] = 0x0000, /* R19473 - DACL_RETUNE_C9_0 */ 533 { 19473, 0x0000 }, /* R19473 - DACL_RETUNE_C9_0 */
532 [19474] = 0x0000, /* R19474 - DACL_RETUNE_C10_1 */ 534 { 19474, 0x0000 }, /* R19474 - DACL_RETUNE_C10_1 */
533 [19475] = 0x0000, /* R19475 - DACL_RETUNE_C10_0 */ 535 { 19475, 0x0000 }, /* R19475 - DACL_RETUNE_C10_0 */
534 [19476] = 0x0000, /* R19476 - DACL_RETUNE_C11_1 */ 536 { 19476, 0x0000 }, /* R19476 - DACL_RETUNE_C11_1 */
535 [19477] = 0x0000, /* R19477 - DACL_RETUNE_C11_0 */ 537 { 19477, 0x0000 }, /* R19477 - DACL_RETUNE_C11_0 */
536 [19478] = 0x0000, /* R19478 - DACL_RETUNE_C12_1 */ 538 { 19478, 0x0000 }, /* R19478 - DACL_RETUNE_C12_1 */
537 [19479] = 0x0000, /* R19479 - DACL_RETUNE_C12_0 */ 539 { 19479, 0x0000 }, /* R19479 - DACL_RETUNE_C12_0 */
538 [19480] = 0x0000, /* R19480 - DACL_RETUNE_C13_1 */ 540 { 19480, 0x0000 }, /* R19480 - DACL_RETUNE_C13_1 */
539 [19481] = 0x0000, /* R19481 - DACL_RETUNE_C13_0 */ 541 { 19481, 0x0000 }, /* R19481 - DACL_RETUNE_C13_0 */
540 [19482] = 0x0000, /* R19482 - DACL_RETUNE_C14_1 */ 542 { 19482, 0x0000 }, /* R19482 - DACL_RETUNE_C14_1 */
541 [19483] = 0x0000, /* R19483 - DACL_RETUNE_C14_0 */ 543 { 19483, 0x0000 }, /* R19483 - DACL_RETUNE_C14_0 */
542 [19484] = 0x0000, /* R19484 - DACL_RETUNE_C15_1 */ 544 { 19484, 0x0000 }, /* R19484 - DACL_RETUNE_C15_1 */
543 [19485] = 0x0000, /* R19485 - DACL_RETUNE_C15_0 */ 545 { 19485, 0x0000 }, /* R19485 - DACL_RETUNE_C15_0 */
544 [19486] = 0x0000, /* R19486 - DACL_RETUNE_C16_1 */ 546 { 19486, 0x0000 }, /* R19486 - DACL_RETUNE_C16_1 */
545 [19487] = 0x0000, /* R19487 - DACL_RETUNE_C16_0 */ 547 { 19487, 0x0000 }, /* R19487 - DACL_RETUNE_C16_0 */
546 [19488] = 0x0000, /* R19488 - DACL_RETUNE_C17_1 */ 548 { 19488, 0x0000 }, /* R19488 - DACL_RETUNE_C17_1 */
547 [19489] = 0x0000, /* R19489 - DACL_RETUNE_C17_0 */ 549 { 19489, 0x0000 }, /* R19489 - DACL_RETUNE_C17_0 */
548 [19490] = 0x0000, /* R19490 - DACL_RETUNE_C18_1 */ 550 { 19490, 0x0000 }, /* R19490 - DACL_RETUNE_C18_1 */
549 [19491] = 0x0000, /* R19491 - DACL_RETUNE_C18_0 */ 551 { 19491, 0x0000 }, /* R19491 - DACL_RETUNE_C18_0 */
550 [19492] = 0x0000, /* R19492 - DACL_RETUNE_C19_1 */ 552 { 19492, 0x0000 }, /* R19492 - DACL_RETUNE_C19_1 */
551 [19493] = 0x0000, /* R19493 - DACL_RETUNE_C19_0 */ 553 { 19493, 0x0000 }, /* R19493 - DACL_RETUNE_C19_0 */
552 [19494] = 0x0000, /* R19494 - DACL_RETUNE_C20_1 */ 554 { 19494, 0x0000 }, /* R19494 - DACL_RETUNE_C20_1 */
553 [19495] = 0x0000, /* R19495 - DACL_RETUNE_C20_0 */ 555 { 19495, 0x0000 }, /* R19495 - DACL_RETUNE_C20_0 */
554 [19496] = 0x0000, /* R19496 - DACL_RETUNE_C21_1 */ 556 { 19496, 0x0000 }, /* R19496 - DACL_RETUNE_C21_1 */
555 [19497] = 0x0000, /* R19497 - DACL_RETUNE_C21_0 */ 557 { 19497, 0x0000 }, /* R19497 - DACL_RETUNE_C21_0 */
556 [19498] = 0x0000, /* R19498 - DACL_RETUNE_C22_1 */ 558 { 19498, 0x0000 }, /* R19498 - DACL_RETUNE_C22_1 */
557 [19499] = 0x0000, /* R19499 - DACL_RETUNE_C22_0 */ 559 { 19499, 0x0000 }, /* R19499 - DACL_RETUNE_C22_0 */
558 [19500] = 0x0000, /* R19500 - DACL_RETUNE_C23_1 */ 560 { 19500, 0x0000 }, /* R19500 - DACL_RETUNE_C23_1 */
559 [19501] = 0x0000, /* R19501 - DACL_RETUNE_C23_0 */ 561 { 19501, 0x0000 }, /* R19501 - DACL_RETUNE_C23_0 */
560 [19502] = 0x0000, /* R19502 - DACL_RETUNE_C24_1 */ 562 { 19502, 0x0000 }, /* R19502 - DACL_RETUNE_C24_1 */
561 [19503] = 0x0000, /* R19503 - DACL_RETUNE_C24_0 */ 563 { 19503, 0x0000 }, /* R19503 - DACL_RETUNE_C24_0 */
562 [19504] = 0x0000, /* R19504 - DACL_RETUNE_C25_1 */ 564 { 19504, 0x0000 }, /* R19504 - DACL_RETUNE_C25_1 */
563 [19505] = 0x0000, /* R19505 - DACL_RETUNE_C25_0 */ 565 { 19505, 0x0000 }, /* R19505 - DACL_RETUNE_C25_0 */
564 [19506] = 0x0000, /* R19506 - DACL_RETUNE_C26_1 */ 566 { 19506, 0x0000 }, /* R19506 - DACL_RETUNE_C26_1 */
565 [19507] = 0x0000, /* R19507 - DACL_RETUNE_C26_0 */ 567 { 19507, 0x0000 }, /* R19507 - DACL_RETUNE_C26_0 */
566 [19508] = 0x0000, /* R19508 - DACL_RETUNE_C27_1 */ 568 { 19508, 0x0000 }, /* R19508 - DACL_RETUNE_C27_1 */
567 [19509] = 0x0000, /* R19509 - DACL_RETUNE_C27_0 */ 569 { 19509, 0x0000 }, /* R19509 - DACL_RETUNE_C27_0 */
568 [19510] = 0x0000, /* R19510 - DACL_RETUNE_C28_1 */ 570 { 19510, 0x0000 }, /* R19510 - DACL_RETUNE_C28_1 */
569 [19511] = 0x0000, /* R19511 - DACL_RETUNE_C28_0 */ 571 { 19511, 0x0000 }, /* R19511 - DACL_RETUNE_C28_0 */
570 [19512] = 0x0000, /* R19512 - DACL_RETUNE_C29_1 */ 572 { 19512, 0x0000 }, /* R19512 - DACL_RETUNE_C29_1 */
571 [19513] = 0x0000, /* R19513 - DACL_RETUNE_C29_0 */ 573 { 19513, 0x0000 }, /* R19513 - DACL_RETUNE_C29_0 */
572 [19514] = 0x0000, /* R19514 - DACL_RETUNE_C30_1 */ 574 { 19514, 0x0000 }, /* R19514 - DACL_RETUNE_C30_1 */
573 [19515] = 0x0000, /* R19515 - DACL_RETUNE_C30_0 */ 575 { 19515, 0x0000 }, /* R19515 - DACL_RETUNE_C30_0 */
574 [19516] = 0x0000, /* R19516 - DACL_RETUNE_C31_1 */ 576 { 19516, 0x0000 }, /* R19516 - DACL_RETUNE_C31_1 */
575 [19517] = 0x0000, /* R19517 - DACL_RETUNE_C31_0 */ 577 { 19517, 0x0000 }, /* R19517 - DACL_RETUNE_C31_0 */
576 [19518] = 0x0000, /* R19518 - DACL_RETUNE_C32_1 */ 578 { 19518, 0x0000 }, /* R19518 - DACL_RETUNE_C32_1 */
577 [19519] = 0x0000, /* R19519 - DACL_RETUNE_C32_0 */ 579 { 19519, 0x0000 }, /* R19519 - DACL_RETUNE_C32_0 */
578 580
579 [19968] = 0x0020, /* R19968 - RETUNEDAC_PG2_1 */ 581 { 19968, 0x0020 }, /* R19968 - RETUNEDAC_PG2_1 */
580 [19969] = 0x0000, /* R19969 - RETUNEDAC_PG2_0 */ 582 { 19969, 0x0000 }, /* R19969 - RETUNEDAC_PG2_0 */
581 [19970] = 0x0040, /* R19970 - RETUNEDAC_PG_1 */ 583 { 19970, 0x0040 }, /* R19970 - RETUNEDAC_PG_1 */
582 [19971] = 0x0000, /* R19971 - RETUNEDAC_PG_0 */ 584 { 19971, 0x0000 }, /* R19971 - RETUNEDAC_PG_0 */
583 585
584 [20480] = 0x007F, /* R20480 - DACR_RETUNE_C1_1 */ 586 { 20480, 0x007F }, /* R20480 - DACR_RETUNE_C1_1 */
585 [20481] = 0xFFFF, /* R20481 - DACR_RETUNE_C1_0 */ 587 { 20481, 0xFFFF }, /* R20481 - DACR_RETUNE_C1_0 */
586 [20482] = 0x0000, /* R20482 - DACR_RETUNE_C2_1 */ 588 { 20482, 0x0000 }, /* R20482 - DACR_RETUNE_C2_1 */
587 [20483] = 0x0000, /* R20483 - DACR_RETUNE_C2_0 */ 589 { 20483, 0x0000 }, /* R20483 - DACR_RETUNE_C2_0 */
588 [20484] = 0x0000, /* R20484 - DACR_RETUNE_C3_1 */ 590 { 20484, 0x0000 }, /* R20484 - DACR_RETUNE_C3_1 */
589 [20485] = 0x0000, /* R20485 - DACR_RETUNE_C3_0 */ 591 { 20485, 0x0000 }, /* R20485 - DACR_RETUNE_C3_0 */
590 [20486] = 0x0000, /* R20486 - DACR_RETUNE_C4_1 */ 592 { 20486, 0x0000 }, /* R20486 - DACR_RETUNE_C4_1 */
591 [20487] = 0x0000, /* R20487 - DACR_RETUNE_C4_0 */ 593 { 20487, 0x0000 }, /* R20487 - DACR_RETUNE_C4_0 */
592 [20488] = 0x0000, /* R20488 - DACR_RETUNE_C5_1 */ 594 { 20488, 0x0000 }, /* R20488 - DACR_RETUNE_C5_1 */
593 [20489] = 0x0000, /* R20489 - DACR_RETUNE_C5_0 */ 595 { 20489, 0x0000 }, /* R20489 - DACR_RETUNE_C5_0 */
594 [20490] = 0x0000, /* R20490 - DACR_RETUNE_C6_1 */ 596 { 20490, 0x0000 }, /* R20490 - DACR_RETUNE_C6_1 */
595 [20491] = 0x0000, /* R20491 - DACR_RETUNE_C6_0 */ 597 { 20491, 0x0000 }, /* R20491 - DACR_RETUNE_C6_0 */
596 [20492] = 0x0000, /* R20492 - DACR_RETUNE_C7_1 */ 598 { 20492, 0x0000 }, /* R20492 - DACR_RETUNE_C7_1 */
597 [20493] = 0x0000, /* R20493 - DACR_RETUNE_C7_0 */ 599 { 20493, 0x0000 }, /* R20493 - DACR_RETUNE_C7_0 */
598 [20494] = 0x0000, /* R20494 - DACR_RETUNE_C8_1 */ 600 { 20494, 0x0000 }, /* R20494 - DACR_RETUNE_C8_1 */
599 [20495] = 0x0000, /* R20495 - DACR_RETUNE_C8_0 */ 601 { 20495, 0x0000 }, /* R20495 - DACR_RETUNE_C8_0 */
600 [20496] = 0x0000, /* R20496 - DACR_RETUNE_C9_1 */ 602 { 20496, 0x0000 }, /* R20496 - DACR_RETUNE_C9_1 */
601 [20497] = 0x0000, /* R20497 - DACR_RETUNE_C9_0 */ 603 { 20497, 0x0000 }, /* R20497 - DACR_RETUNE_C9_0 */
602 [20498] = 0x0000, /* R20498 - DACR_RETUNE_C10_1 */ 604 { 20498, 0x0000 }, /* R20498 - DACR_RETUNE_C10_1 */
603 [20499] = 0x0000, /* R20499 - DACR_RETUNE_C10_0 */ 605 { 20499, 0x0000 }, /* R20499 - DACR_RETUNE_C10_0 */
604 [20500] = 0x0000, /* R20500 - DACR_RETUNE_C11_1 */ 606 { 20500, 0x0000 }, /* R20500 - DACR_RETUNE_C11_1 */
605 [20501] = 0x0000, /* R20501 - DACR_RETUNE_C11_0 */ 607 { 20501, 0x0000 }, /* R20501 - DACR_RETUNE_C11_0 */
606 [20502] = 0x0000, /* R20502 - DACR_RETUNE_C12_1 */ 608 { 20502, 0x0000 }, /* R20502 - DACR_RETUNE_C12_1 */
607 [20503] = 0x0000, /* R20503 - DACR_RETUNE_C12_0 */ 609 { 20503, 0x0000 }, /* R20503 - DACR_RETUNE_C12_0 */
608 [20504] = 0x0000, /* R20504 - DACR_RETUNE_C13_1 */ 610 { 20504, 0x0000 }, /* R20504 - DACR_RETUNE_C13_1 */
609 [20505] = 0x0000, /* R20505 - DACR_RETUNE_C13_0 */ 611 { 20505, 0x0000 }, /* R20505 - DACR_RETUNE_C13_0 */
610 [20506] = 0x0000, /* R20506 - DACR_RETUNE_C14_1 */ 612 { 20506, 0x0000 }, /* R20506 - DACR_RETUNE_C14_1 */
611 [20507] = 0x0000, /* R20507 - DACR_RETUNE_C14_0 */ 613 { 20507, 0x0000 }, /* R20507 - DACR_RETUNE_C14_0 */
612 [20508] = 0x0000, /* R20508 - DACR_RETUNE_C15_1 */ 614 { 20508, 0x0000 }, /* R20508 - DACR_RETUNE_C15_1 */
613 [20509] = 0x0000, /* R20509 - DACR_RETUNE_C15_0 */ 615 { 20509, 0x0000 }, /* R20509 - DACR_RETUNE_C15_0 */
614 [20510] = 0x0000, /* R20510 - DACR_RETUNE_C16_1 */ 616 { 20510, 0x0000 }, /* R20510 - DACR_RETUNE_C16_1 */
615 [20511] = 0x0000, /* R20511 - DACR_RETUNE_C16_0 */ 617 { 20511, 0x0000 }, /* R20511 - DACR_RETUNE_C16_0 */
616 [20512] = 0x0000, /* R20512 - DACR_RETUNE_C17_1 */ 618 { 20512, 0x0000 }, /* R20512 - DACR_RETUNE_C17_1 */
617 [20513] = 0x0000, /* R20513 - DACR_RETUNE_C17_0 */ 619 { 20513, 0x0000 }, /* R20513 - DACR_RETUNE_C17_0 */
618 [20514] = 0x0000, /* R20514 - DACR_RETUNE_C18_1 */ 620 { 20514, 0x0000 }, /* R20514 - DACR_RETUNE_C18_1 */
619 [20515] = 0x0000, /* R20515 - DACR_RETUNE_C18_0 */ 621 { 20515, 0x0000 }, /* R20515 - DACR_RETUNE_C18_0 */
620 [20516] = 0x0000, /* R20516 - DACR_RETUNE_C19_1 */ 622 { 20516, 0x0000 }, /* R20516 - DACR_RETUNE_C19_1 */
621 [20517] = 0x0000, /* R20517 - DACR_RETUNE_C19_0 */ 623 { 20517, 0x0000 }, /* R20517 - DACR_RETUNE_C19_0 */
622 [20518] = 0x0000, /* R20518 - DACR_RETUNE_C20_1 */ 624 { 20518, 0x0000 }, /* R20518 - DACR_RETUNE_C20_1 */
623 [20519] = 0x0000, /* R20519 - DACR_RETUNE_C20_0 */ 625 { 20519, 0x0000 }, /* R20519 - DACR_RETUNE_C20_0 */
624 [20520] = 0x0000, /* R20520 - DACR_RETUNE_C21_1 */ 626 { 20520, 0x0000 }, /* R20520 - DACR_RETUNE_C21_1 */
625 [20521] = 0x0000, /* R20521 - DACR_RETUNE_C21_0 */ 627 { 20521, 0x0000 }, /* R20521 - DACR_RETUNE_C21_0 */
626 [20522] = 0x0000, /* R20522 - DACR_RETUNE_C22_1 */ 628 { 20522, 0x0000 }, /* R20522 - DACR_RETUNE_C22_1 */
627 [20523] = 0x0000, /* R20523 - DACR_RETUNE_C22_0 */ 629 { 20523, 0x0000 }, /* R20523 - DACR_RETUNE_C22_0 */
628 [20524] = 0x0000, /* R20524 - DACR_RETUNE_C23_1 */ 630 { 20524, 0x0000 }, /* R20524 - DACR_RETUNE_C23_1 */
629 [20525] = 0x0000, /* R20525 - DACR_RETUNE_C23_0 */ 631 { 20525, 0x0000 }, /* R20525 - DACR_RETUNE_C23_0 */
630 [20526] = 0x0000, /* R20526 - DACR_RETUNE_C24_1 */ 632 { 20526, 0x0000 }, /* R20526 - DACR_RETUNE_C24_1 */
631 [20527] = 0x0000, /* R20527 - DACR_RETUNE_C24_0 */ 633 { 20527, 0x0000 }, /* R20527 - DACR_RETUNE_C24_0 */
632 [20528] = 0x0000, /* R20528 - DACR_RETUNE_C25_1 */ 634 { 20528, 0x0000 }, /* R20528 - DACR_RETUNE_C25_1 */
633 [20529] = 0x0000, /* R20529 - DACR_RETUNE_C25_0 */ 635 { 20529, 0x0000 }, /* R20529 - DACR_RETUNE_C25_0 */
634 [20530] = 0x0000, /* R20530 - DACR_RETUNE_C26_1 */ 636 { 20530, 0x0000 }, /* R20530 - DACR_RETUNE_C26_1 */
635 [20531] = 0x0000, /* R20531 - DACR_RETUNE_C26_0 */ 637 { 20531, 0x0000 }, /* R20531 - DACR_RETUNE_C26_0 */
636 [20532] = 0x0000, /* R20532 - DACR_RETUNE_C27_1 */ 638 { 20532, 0x0000 }, /* R20532 - DACR_RETUNE_C27_1 */
637 [20533] = 0x0000, /* R20533 - DACR_RETUNE_C27_0 */ 639 { 20533, 0x0000 }, /* R20533 - DACR_RETUNE_C27_0 */
638 [20534] = 0x0000, /* R20534 - DACR_RETUNE_C28_1 */ 640 { 20534, 0x0000 }, /* R20534 - DACR_RETUNE_C28_1 */
639 [20535] = 0x0000, /* R20535 - DACR_RETUNE_C28_0 */ 641 { 20535, 0x0000 }, /* R20535 - DACR_RETUNE_C28_0 */
640 [20536] = 0x0000, /* R20536 - DACR_RETUNE_C29_1 */ 642 { 20536, 0x0000 }, /* R20536 - DACR_RETUNE_C29_1 */
641 [20537] = 0x0000, /* R20537 - DACR_RETUNE_C29_0 */ 643 { 20537, 0x0000 }, /* R20537 - DACR_RETUNE_C29_0 */
642 [20538] = 0x0000, /* R20538 - DACR_RETUNE_C30_1 */ 644 { 20538, 0x0000 }, /* R20538 - DACR_RETUNE_C30_1 */
643 [20539] = 0x0000, /* R20539 - DACR_RETUNE_C30_0 */ 645 { 20539, 0x0000 }, /* R20539 - DACR_RETUNE_C30_0 */
644 [20540] = 0x0000, /* R20540 - DACR_RETUNE_C31_1 */ 646 { 20540, 0x0000 }, /* R20540 - DACR_RETUNE_C31_1 */
645 [20541] = 0x0000, /* R20541 - DACR_RETUNE_C31_0 */ 647 { 20541, 0x0000 }, /* R20541 - DACR_RETUNE_C31_0 */
646 [20542] = 0x0000, /* R20542 - DACR_RETUNE_C32_1 */ 648 { 20542, 0x0000 }, /* R20542 - DACR_RETUNE_C32_1 */
647 [20543] = 0x0000, /* R20543 - DACR_RETUNE_C32_0 */ 649 { 20543, 0x0000 }, /* R20543 - DACR_RETUNE_C32_0 */
648 650
649 [20992] = 0x008C, /* R20992 - VSS_XHD2_1 */ 651 { 20992, 0x008C }, /* R20992 - VSS_XHD2_1 */
650 [20993] = 0x0200, /* R20993 - VSS_XHD2_0 */ 652 { 20993, 0x0200 }, /* R20993 - VSS_XHD2_0 */
651 [20994] = 0x0035, /* R20994 - VSS_XHD3_1 */ 653 { 20994, 0x0035 }, /* R20994 - VSS_XHD3_1 */
652 [20995] = 0x0700, /* R20995 - VSS_XHD3_0 */ 654 { 20995, 0x0700 }, /* R20995 - VSS_XHD3_0 */
653 [20996] = 0x003A, /* R20996 - VSS_XHN1_1 */ 655 { 20996, 0x003A }, /* R20996 - VSS_XHN1_1 */
654 [20997] = 0x4100, /* R20997 - VSS_XHN1_0 */ 656 { 20997, 0x4100 }, /* R20997 - VSS_XHN1_0 */
655 [20998] = 0x008B, /* R20998 - VSS_XHN2_1 */ 657 { 20998, 0x008B }, /* R20998 - VSS_XHN2_1 */
656 [20999] = 0x7D00, /* R20999 - VSS_XHN2_0 */ 658 { 20999, 0x7D00 }, /* R20999 - VSS_XHN2_0 */
657 [21000] = 0x003A, /* R21000 - VSS_XHN3_1 */ 659 { 21000, 0x003A }, /* R21000 - VSS_XHN3_1 */
658 [21001] = 0x4100, /* R21001 - VSS_XHN3_0 */ 660 { 21001, 0x4100 }, /* R21001 - VSS_XHN3_0 */
659 [21002] = 0x008C, /* R21002 - VSS_XLA_1 */ 661 { 21002, 0x008C }, /* R21002 - VSS_XLA_1 */
660 [21003] = 0xFEE8, /* R21003 - VSS_XLA_0 */ 662 { 21003, 0xFEE8 }, /* R21003 - VSS_XLA_0 */
661 [21004] = 0x0078, /* R21004 - VSS_XLB_1 */ 663 { 21004, 0x0078 }, /* R21004 - VSS_XLB_1 */
662 [21005] = 0x0000, /* R21005 - VSS_XLB_0 */ 664 { 21005, 0x0000 }, /* R21005 - VSS_XLB_0 */
663 [21006] = 0x003F, /* R21006 - VSS_XLG_1 */ 665 { 21006, 0x003F }, /* R21006 - VSS_XLG_1 */
664 [21007] = 0xB260, /* R21007 - VSS_XLG_0 */ 666 { 21007, 0xB260 }, /* R21007 - VSS_XLG_0 */
665 [21008] = 0x002D, /* R21008 - VSS_PG2_1 */ 667 { 21008, 0x002D }, /* R21008 - VSS_PG2_1 */
666 [21009] = 0x1818, /* R21009 - VSS_PG2_0 */ 668 { 21009, 0x1818 }, /* R21009 - VSS_PG2_0 */
667 [21010] = 0x0020, /* R21010 - VSS_PG_1 */ 669 { 21010, 0x0020 }, /* R21010 - VSS_PG_1 */
668 [21011] = 0x0000, /* R21011 - VSS_PG_0 */ 670 { 21011, 0x0000 }, /* R21011 - VSS_PG_0 */
669 [21012] = 0x00F1, /* R21012 - VSS_XTD1_1 */ 671 { 21012, 0x00F1 }, /* R21012 - VSS_XTD1_1 */
670 [21013] = 0x8340, /* R21013 - VSS_XTD1_0 */ 672 { 21013, 0x8340 }, /* R21013 - VSS_XTD1_0 */
671 [21014] = 0x00FB, /* R21014 - VSS_XTD2_1 */ 673 { 21014, 0x00FB }, /* R21014 - VSS_XTD2_1 */
672 [21015] = 0x8300, /* R21015 - VSS_XTD2_0 */ 674 { 21015, 0x8300 }, /* R21015 - VSS_XTD2_0 */
673 [21016] = 0x00EE, /* R21016 - VSS_XTD3_1 */ 675 { 21016, 0x00EE }, /* R21016 - VSS_XTD3_1 */
674 [21017] = 0xAEC0, /* R21017 - VSS_XTD3_0 */ 676 { 21017, 0xAEC0 }, /* R21017 - VSS_XTD3_0 */
675 [21018] = 0x00FB, /* R21018 - VSS_XTD4_1 */ 677 { 21018, 0x00FB }, /* R21018 - VSS_XTD4_1 */
676 [21019] = 0xAC40, /* R21019 - VSS_XTD4_0 */ 678 { 21019, 0xAC40 }, /* R21019 - VSS_XTD4_0 */
677 [21020] = 0x00F1, /* R21020 - VSS_XTD5_1 */ 679 { 21020, 0x00F1 }, /* R21020 - VSS_XTD5_1 */
678 [21021] = 0x7F80, /* R21021 - VSS_XTD5_0 */ 680 { 21021, 0x7F80 }, /* R21021 - VSS_XTD5_0 */
679 [21022] = 0x00F4, /* R21022 - VSS_XTD6_1 */ 681 { 21022, 0x00F4 }, /* R21022 - VSS_XTD6_1 */
680 [21023] = 0x3B40, /* R21023 - VSS_XTD6_0 */ 682 { 21023, 0x3B40 }, /* R21023 - VSS_XTD6_0 */
681 [21024] = 0x00F5, /* R21024 - VSS_XTD7_1 */ 683 { 21024, 0x00F5 }, /* R21024 - VSS_XTD7_1 */
682 [21025] = 0xFB00, /* R21025 - VSS_XTD7_0 */ 684 { 21025, 0xFB00 }, /* R21025 - VSS_XTD7_0 */
683 [21026] = 0x00EA, /* R21026 - VSS_XTD8_1 */ 685 { 21026, 0x00EA }, /* R21026 - VSS_XTD8_1 */
684 [21027] = 0x10C0, /* R21027 - VSS_XTD8_0 */ 686 { 21027, 0x10C0 }, /* R21027 - VSS_XTD8_0 */
685 [21028] = 0x00FC, /* R21028 - VSS_XTD9_1 */ 687 { 21028, 0x00FC }, /* R21028 - VSS_XTD9_1 */
686 [21029] = 0xC580, /* R21029 - VSS_XTD9_0 */ 688 { 21029, 0xC580 }, /* R21029 - VSS_XTD9_0 */
687 [21030] = 0x00E2, /* R21030 - VSS_XTD10_1 */ 689 { 21030, 0x00E2 }, /* R21030 - VSS_XTD10_1 */
688 [21031] = 0x75C0, /* R21031 - VSS_XTD10_0 */ 690 { 21031, 0x75C0 }, /* R21031 - VSS_XTD10_0 */
689 [21032] = 0x0004, /* R21032 - VSS_XTD11_1 */ 691 { 21032, 0x0004 }, /* R21032 - VSS_XTD11_1 */
690 [21033] = 0xB480, /* R21033 - VSS_XTD11_0 */ 692 { 21033, 0xB480 }, /* R21033 - VSS_XTD11_0 */
691 [21034] = 0x00D4, /* R21034 - VSS_XTD12_1 */ 693 { 21034, 0x00D4 }, /* R21034 - VSS_XTD12_1 */
692 [21035] = 0xF980, /* R21035 - VSS_XTD12_0 */ 694 { 21035, 0xF980 }, /* R21035 - VSS_XTD12_0 */
693 [21036] = 0x0004, /* R21036 - VSS_XTD13_1 */ 695 { 21036, 0x0004 }, /* R21036 - VSS_XTD13_1 */
694 [21037] = 0x9140, /* R21037 - VSS_XTD13_0 */ 696 { 21037, 0x9140 }, /* R21037 - VSS_XTD13_0 */
695 [21038] = 0x00D8, /* R21038 - VSS_XTD14_1 */ 697 { 21038, 0x00D8 }, /* R21038 - VSS_XTD14_1 */
696 [21039] = 0xA480, /* R21039 - VSS_XTD14_0 */ 698 { 21039, 0xA480 }, /* R21039 - VSS_XTD14_0 */
697 [21040] = 0x0002, /* R21040 - VSS_XTD15_1 */ 699 { 21040, 0x0002 }, /* R21040 - VSS_XTD15_1 */
698 [21041] = 0x3DC0, /* R21041 - VSS_XTD15_0 */ 700 { 21041, 0x3DC0 }, /* R21041 - VSS_XTD15_0 */
699 [21042] = 0x00CF, /* R21042 - VSS_XTD16_1 */ 701 { 21042, 0x00CF }, /* R21042 - VSS_XTD16_1 */
700 [21043] = 0x7A80, /* R21043 - VSS_XTD16_0 */ 702 { 21043, 0x7A80 }, /* R21043 - VSS_XTD16_0 */
701 [21044] = 0x00DC, /* R21044 - VSS_XTD17_1 */ 703 { 21044, 0x00DC }, /* R21044 - VSS_XTD17_1 */
702 [21045] = 0x0600, /* R21045 - VSS_XTD17_0 */ 704 { 21045, 0x0600 }, /* R21045 - VSS_XTD17_0 */
703 [21046] = 0x00F2, /* R21046 - VSS_XTD18_1 */ 705 { 21046, 0x00F2 }, /* R21046 - VSS_XTD18_1 */
704 [21047] = 0xDAC0, /* R21047 - VSS_XTD18_0 */ 706 { 21047, 0xDAC0 }, /* R21047 - VSS_XTD18_0 */
705 [21048] = 0x00BA, /* R21048 - VSS_XTD19_1 */ 707 { 21048, 0x00BA }, /* R21048 - VSS_XTD19_1 */
706 [21049] = 0xF340, /* R21049 - VSS_XTD19_0 */ 708 { 21049, 0xF340 }, /* R21049 - VSS_XTD19_0 */
707 [21050] = 0x000A, /* R21050 - VSS_XTD20_1 */ 709 { 21050, 0x000A }, /* R21050 - VSS_XTD20_1 */
708 [21051] = 0x7940, /* R21051 - VSS_XTD20_0 */ 710 { 21051, 0x7940 }, /* R21051 - VSS_XTD20_0 */
709 [21052] = 0x001C, /* R21052 - VSS_XTD21_1 */ 711 { 21052, 0x001C }, /* R21052 - VSS_XTD21_1 */
710 [21053] = 0x0680, /* R21053 - VSS_XTD21_0 */ 712 { 21053, 0x0680 }, /* R21053 - VSS_XTD21_0 */
711 [21054] = 0x00FD, /* R21054 - VSS_XTD22_1 */ 713 { 21054, 0x00FD }, /* R21054 - VSS_XTD22_1 */
712 [21055] = 0x2D00, /* R21055 - VSS_XTD22_0 */ 714 { 21055, 0x2D00 }, /* R21055 - VSS_XTD22_0 */
713 [21056] = 0x001C, /* R21056 - VSS_XTD23_1 */ 715 { 21056, 0x001C }, /* R21056 - VSS_XTD23_1 */
714 [21057] = 0xE840, /* R21057 - VSS_XTD23_0 */ 716 { 21057, 0xE840 }, /* R21057 - VSS_XTD23_0 */
715 [21058] = 0x000D, /* R21058 - VSS_XTD24_1 */ 717 { 21058, 0x000D }, /* R21058 - VSS_XTD24_1 */
716 [21059] = 0xDC40, /* R21059 - VSS_XTD24_0 */ 718 { 21059, 0xDC40 }, /* R21059 - VSS_XTD24_0 */
717 [21060] = 0x00FC, /* R21060 - VSS_XTD25_1 */ 719 { 21060, 0x00FC }, /* R21060 - VSS_XTD25_1 */
718 [21061] = 0x9D00, /* R21061 - VSS_XTD25_0 */ 720 { 21061, 0x9D00 }, /* R21061 - VSS_XTD25_0 */
719 [21062] = 0x0009, /* R21062 - VSS_XTD26_1 */ 721 { 21062, 0x0009 }, /* R21062 - VSS_XTD26_1 */
720 [21063] = 0x5580, /* R21063 - VSS_XTD26_0 */ 722 { 21063, 0x5580 }, /* R21063 - VSS_XTD26_0 */
721 [21064] = 0x00FE, /* R21064 - VSS_XTD27_1 */ 723 { 21064, 0x00FE }, /* R21064 - VSS_XTD27_1 */
722 [21065] = 0x7E80, /* R21065 - VSS_XTD27_0 */ 724 { 21065, 0x7E80 }, /* R21065 - VSS_XTD27_0 */
723 [21066] = 0x000E, /* R21066 - VSS_XTD28_1 */ 725 { 21066, 0x000E }, /* R21066 - VSS_XTD28_1 */
724 [21067] = 0xAB40, /* R21067 - VSS_XTD28_0 */ 726 { 21067, 0xAB40 }, /* R21067 - VSS_XTD28_0 */
725 [21068] = 0x00F9, /* R21068 - VSS_XTD29_1 */ 727 { 21068, 0x00F9 }, /* R21068 - VSS_XTD29_1 */
726 [21069] = 0x9880, /* R21069 - VSS_XTD29_0 */ 728 { 21069, 0x9880 }, /* R21069 - VSS_XTD29_0 */
727 [21070] = 0x0009, /* R21070 - VSS_XTD30_1 */ 729 { 21070, 0x0009 }, /* R21070 - VSS_XTD30_1 */
728 [21071] = 0x87C0, /* R21071 - VSS_XTD30_0 */ 730 { 21071, 0x87C0 }, /* R21071 - VSS_XTD30_0 */
729 [21072] = 0x00FD, /* R21072 - VSS_XTD31_1 */ 731 { 21072, 0x00FD }, /* R21072 - VSS_XTD31_1 */
730 [21073] = 0x2C40, /* R21073 - VSS_XTD31_0 */ 732 { 21073, 0x2C40 }, /* R21073 - VSS_XTD31_0 */
731 [21074] = 0x0009, /* R21074 - VSS_XTD32_1 */ 733 { 21074, 0x0009 }, /* R21074 - VSS_XTD32_1 */
732 [21075] = 0x4800, /* R21075 - VSS_XTD32_0 */ 734 { 21075, 0x4800 }, /* R21075 - VSS_XTD32_0 */
733 [21076] = 0x0003, /* R21076 - VSS_XTS1_1 */ 735 { 21076, 0x0003 }, /* R21076 - VSS_XTS1_1 */
734 [21077] = 0x5F40, /* R21077 - VSS_XTS1_0 */ 736 { 21077, 0x5F40 }, /* R21077 - VSS_XTS1_0 */
735 [21078] = 0x0000, /* R21078 - VSS_XTS2_1 */ 737 { 21078, 0x0000 }, /* R21078 - VSS_XTS2_1 */
736 [21079] = 0x8700, /* R21079 - VSS_XTS2_0 */ 738 { 21079, 0x8700 }, /* R21079 - VSS_XTS2_0 */
737 [21080] = 0x00FA, /* R21080 - VSS_XTS3_1 */ 739 { 21080, 0x00FA }, /* R21080 - VSS_XTS3_1 */
738 [21081] = 0xE4C0, /* R21081 - VSS_XTS3_0 */ 740 { 21081, 0xE4C0 }, /* R21081 - VSS_XTS3_0 */
739 [21082] = 0x0000, /* R21082 - VSS_XTS4_1 */ 741 { 21082, 0x0000 }, /* R21082 - VSS_XTS4_1 */
740 [21083] = 0x0B40, /* R21083 - VSS_XTS4_0 */ 742 { 21083, 0x0B40 }, /* R21083 - VSS_XTS4_0 */
741 [21084] = 0x0004, /* R21084 - VSS_XTS5_1 */ 743 { 21084, 0x0004 }, /* R21084 - VSS_XTS5_1 */
742 [21085] = 0xE180, /* R21085 - VSS_XTS5_0 */ 744 { 21085, 0xE180 }, /* R21085 - VSS_XTS5_0 */
743 [21086] = 0x0001, /* R21086 - VSS_XTS6_1 */ 745 { 21086, 0x0001 }, /* R21086 - VSS_XTS6_1 */
744 [21087] = 0x1F40, /* R21087 - VSS_XTS6_0 */ 746 { 21087, 0x1F40 }, /* R21087 - VSS_XTS6_0 */
745 [21088] = 0x00F8, /* R21088 - VSS_XTS7_1 */ 747 { 21088, 0x00F8 }, /* R21088 - VSS_XTS7_1 */
746 [21089] = 0xB000, /* R21089 - VSS_XTS7_0 */ 748 { 21089, 0xB000 }, /* R21089 - VSS_XTS7_0 */
747 [21090] = 0x00FB, /* R21090 - VSS_XTS8_1 */ 749 { 21090, 0x00FB }, /* R21090 - VSS_XTS8_1 */
748 [21091] = 0xCBC0, /* R21091 - VSS_XTS8_0 */ 750 { 21091, 0xCBC0 }, /* R21091 - VSS_XTS8_0 */
749 [21092] = 0x0004, /* R21092 - VSS_XTS9_1 */ 751 { 21092, 0x0004 }, /* R21092 - VSS_XTS9_1 */
750 [21093] = 0xF380, /* R21093 - VSS_XTS9_0 */ 752 { 21093, 0xF380 }, /* R21093 - VSS_XTS9_0 */
751 [21094] = 0x0007, /* R21094 - VSS_XTS10_1 */ 753 { 21094, 0x0007 }, /* R21094 - VSS_XTS10_1 */
752 [21095] = 0xDF40, /* R21095 - VSS_XTS10_0 */ 754 { 21095, 0xDF40 }, /* R21095 - VSS_XTS10_0 */
753 [21096] = 0x00FF, /* R21096 - VSS_XTS11_1 */ 755 { 21096, 0x00FF }, /* R21096 - VSS_XTS11_1 */
754 [21097] = 0x0700, /* R21097 - VSS_XTS11_0 */ 756 { 21097, 0x0700 }, /* R21097 - VSS_XTS11_0 */
755 [21098] = 0x00EF, /* R21098 - VSS_XTS12_1 */ 757 { 21098, 0x00EF }, /* R21098 - VSS_XTS12_1 */
756 [21099] = 0xD700, /* R21099 - VSS_XTS12_0 */ 758 { 21099, 0xD700 }, /* R21099 - VSS_XTS12_0 */
757 [21100] = 0x00FB, /* R21100 - VSS_XTS13_1 */ 759 { 21100, 0x00FB }, /* R21100 - VSS_XTS13_1 */
758 [21101] = 0xAF40, /* R21101 - VSS_XTS13_0 */ 760 { 21101, 0xAF40 }, /* R21101 - VSS_XTS13_0 */
759 [21102] = 0x0010, /* R21102 - VSS_XTS14_1 */ 761 { 21102, 0x0010 }, /* R21102 - VSS_XTS14_1 */
760 [21103] = 0x8A80, /* R21103 - VSS_XTS14_0 */ 762 { 21103, 0x8A80 }, /* R21103 - VSS_XTS14_0 */
761 [21104] = 0x0011, /* R21104 - VSS_XTS15_1 */ 763 { 21104, 0x0011 }, /* R21104 - VSS_XTS15_1 */
762 [21105] = 0x07C0, /* R21105 - VSS_XTS15_0 */ 764 { 21105, 0x07C0 }, /* R21105 - VSS_XTS15_0 */
763 [21106] = 0x00E0, /* R21106 - VSS_XTS16_1 */ 765 { 21106, 0x00E0 }, /* R21106 - VSS_XTS16_1 */
764 [21107] = 0x0800, /* R21107 - VSS_XTS16_0 */ 766 { 21107, 0x0800 }, /* R21107 - VSS_XTS16_0 */
765 [21108] = 0x00D2, /* R21108 - VSS_XTS17_1 */ 767 { 21108, 0x00D2 }, /* R21108 - VSS_XTS17_1 */
766 [21109] = 0x7600, /* R21109 - VSS_XTS17_0 */ 768 { 21109, 0x7600 }, /* R21109 - VSS_XTS17_0 */
767 [21110] = 0x0020, /* R21110 - VSS_XTS18_1 */ 769 { 21110, 0x0020 }, /* R21110 - VSS_XTS18_1 */
768 [21111] = 0xCF40, /* R21111 - VSS_XTS18_0 */ 770 { 21111, 0xCF40 }, /* R21111 - VSS_XTS18_0 */
769 [21112] = 0x0030, /* R21112 - VSS_XTS19_1 */ 771 { 21112, 0x0030 }, /* R21112 - VSS_XTS19_1 */
770 [21113] = 0x2340, /* R21113 - VSS_XTS19_0 */ 772 { 21113, 0x2340 }, /* R21113 - VSS_XTS19_0 */
771 [21114] = 0x00FD, /* R21114 - VSS_XTS20_1 */ 773 { 21114, 0x00FD }, /* R21114 - VSS_XTS20_1 */
772 [21115] = 0x69C0, /* R21115 - VSS_XTS20_0 */ 774 { 21115, 0x69C0 }, /* R21115 - VSS_XTS20_0 */
773 [21116] = 0x0028, /* R21116 - VSS_XTS21_1 */ 775 { 21116, 0x0028 }, /* R21116 - VSS_XTS21_1 */
774 [21117] = 0x3500, /* R21117 - VSS_XTS21_0 */ 776 { 21117, 0x3500 }, /* R21117 - VSS_XTS21_0 */
775 [21118] = 0x0006, /* R21118 - VSS_XTS22_1 */ 777 { 21118, 0x0006 }, /* R21118 - VSS_XTS22_1 */
776 [21119] = 0x3300, /* R21119 - VSS_XTS22_0 */ 778 { 21119, 0x3300 }, /* R21119 - VSS_XTS22_0 */
777 [21120] = 0x00D9, /* R21120 - VSS_XTS23_1 */ 779 { 21120, 0x00D9 }, /* R21120 - VSS_XTS23_1 */
778 [21121] = 0xF6C0, /* R21121 - VSS_XTS23_0 */ 780 { 21121, 0xF6C0 }, /* R21121 - VSS_XTS23_0 */
779 [21122] = 0x00F3, /* R21122 - VSS_XTS24_1 */ 781 { 21122, 0x00F3 }, /* R21122 - VSS_XTS24_1 */
780 [21123] = 0x3340, /* R21123 - VSS_XTS24_0 */ 782 { 21123, 0x3340 }, /* R21123 - VSS_XTS24_0 */
781 [21124] = 0x000F, /* R21124 - VSS_XTS25_1 */ 783 { 21124, 0x000F }, /* R21124 - VSS_XTS25_1 */
782 [21125] = 0x4200, /* R21125 - VSS_XTS25_0 */ 784 { 21125, 0x4200 }, /* R21125 - VSS_XTS25_0 */
783 [21126] = 0x0004, /* R21126 - VSS_XTS26_1 */ 785 { 21126, 0x0004 }, /* R21126 - VSS_XTS26_1 */
784 [21127] = 0x0C80, /* R21127 - VSS_XTS26_0 */ 786 { 21127, 0x0C80 }, /* R21127 - VSS_XTS26_0 */
785 [21128] = 0x00FB, /* R21128 - VSS_XTS27_1 */ 787 { 21128, 0x00FB }, /* R21128 - VSS_XTS27_1 */
786 [21129] = 0x3F80, /* R21129 - VSS_XTS27_0 */ 788 { 21129, 0x3F80 }, /* R21129 - VSS_XTS27_0 */
787 [21130] = 0x00F7, /* R21130 - VSS_XTS28_1 */ 789 { 21130, 0x00F7 }, /* R21130 - VSS_XTS28_1 */
788 [21131] = 0x57C0, /* R21131 - VSS_XTS28_0 */ 790 { 21131, 0x57C0 }, /* R21131 - VSS_XTS28_0 */
789 [21132] = 0x0003, /* R21132 - VSS_XTS29_1 */ 791 { 21132, 0x0003 }, /* R21132 - VSS_XTS29_1 */
790 [21133] = 0x5400, /* R21133 - VSS_XTS29_0 */ 792 { 21133, 0x5400 }, /* R21133 - VSS_XTS29_0 */
791 [21134] = 0x0000, /* R21134 - VSS_XTS30_1 */ 793 { 21134, 0x0000 }, /* R21134 - VSS_XTS30_1 */
792 [21135] = 0xC6C0, /* R21135 - VSS_XTS30_0 */ 794 { 21135, 0xC6C0 }, /* R21135 - VSS_XTS30_0 */
793 [21136] = 0x0003, /* R21136 - VSS_XTS31_1 */ 795 { 21136, 0x0003 }, /* R21136 - VSS_XTS31_1 */
794 [21137] = 0x12C0, /* R21137 - VSS_XTS31_0 */ 796 { 21137, 0x12C0 }, /* R21137 - VSS_XTS31_0 */
795 [21138] = 0x00FD, /* R21138 - VSS_XTS32_1 */ 797 { 21138, 0x00FD }, /* R21138 - VSS_XTS32_1 */
796 [21139] = 0x8580, /* R21139 - VSS_XTS32_0 */ 798 { 21139, 0x8580 }, /* R21139 - VSS_XTS32_0 */
797}; 799};
798 800
799static const struct wm8962_reg_access { 801static const struct wm8962_reg_access {
@@ -802,7 +804,7 @@ static const struct wm8962_reg_access {
802 u16 vol; 804 u16 vol;
803} wm8962_reg_access[WM8962_MAX_REGISTER + 1] = { 805} wm8962_reg_access[WM8962_MAX_REGISTER + 1] = {
804 [0] = { 0x00FF, 0x01FF, 0x0000 }, /* R0 - Left Input volume */ 806 [0] = { 0x00FF, 0x01FF, 0x0000 }, /* R0 - Left Input volume */
805 [1] = { 0xFEFF, 0x01FF, 0xFFFF }, /* R1 - Right Input volume */ 807 [1] = { 0xFEFF, 0x01FF, 0x0000 }, /* R1 - Right Input volume */
806 [2] = { 0x00FF, 0x01FF, 0x0000 }, /* R2 - HPOUTL volume */ 808 [2] = { 0x00FF, 0x01FF, 0x0000 }, /* R2 - HPOUTL volume */
807 [3] = { 0x00FF, 0x01FF, 0x0000 }, /* R3 - HPOUTR volume */ 809 [3] = { 0x00FF, 0x01FF, 0x0000 }, /* R3 - HPOUTR volume */
808 [4] = { 0x07FE, 0x07FE, 0xFFFF }, /* R4 - Clocking1 */ 810 [4] = { 0x07FE, 0x07FE, 0xFFFF }, /* R4 - Clocking1 */
@@ -1943,7 +1945,7 @@ static const struct wm8962_reg_access {
1943 [21139] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21139 - VSS_XTS32_0 */ 1945 [21139] = { 0xFFFF, 0xFFFF, 0x0000 }, /* R21139 - VSS_XTS32_0 */
1944}; 1946};
1945 1947
1946static int wm8962_volatile_register(struct snd_soc_codec *codec, unsigned int reg) 1948static bool wm8962_volatile_register(struct device *dev, unsigned int reg)
1947{ 1949{
1948 if (wm8962_reg_access[reg].vol) 1950 if (wm8962_reg_access[reg].vol)
1949 return 1; 1951 return 1;
@@ -1951,7 +1953,7 @@ static int wm8962_volatile_register(struct snd_soc_codec *codec, unsigned int re
1951 return 0; 1953 return 0;
1952} 1954}
1953 1955
1954static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int reg) 1956static bool wm8962_readable_register(struct device *dev, unsigned int reg)
1955{ 1957{
1956 if (wm8962_reg_access[reg].read) 1958 if (wm8962_reg_access[reg].read)
1957 return 1; 1959 return 1;
@@ -1959,15 +1961,15 @@ static int wm8962_readable_register(struct snd_soc_codec *codec, unsigned int re
1959 return 0; 1961 return 0;
1960} 1962}
1961 1963
1962static int wm8962_reset(struct snd_soc_codec *codec) 1964static int wm8962_reset(struct wm8962_priv *wm8962)
1963{ 1965{
1964 int ret; 1966 int ret;
1965 1967
1966 ret = snd_soc_write(codec, WM8962_SOFTWARE_RESET, 0x6243); 1968 ret = regmap_write(wm8962->regmap, WM8962_SOFTWARE_RESET, 0x6243);
1967 if (ret != 0) 1969 if (ret != 0)
1968 return ret; 1970 return ret;
1969 1971
1970 return snd_soc_write(codec, WM8962_PLL_SOFTWARE_RESET, 0); 1972 return regmap_write(wm8962->regmap, WM8962_PLL_SOFTWARE_RESET, 0);
1971} 1973}
1972 1974
1973static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0); 1975static const DECLARE_TLV_DB_SCALE(inpga_tlv, -2325, 75, 0);
@@ -2345,6 +2347,10 @@ static int sysclk_event(struct snd_soc_dapm_widget *w,
2345 int src; 2347 int src;
2346 int fll; 2348 int fll;
2347 2349
2350 /* Ignore attempts to run the event during startup */
2351 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
2352 return 0;
2353
2348 src = snd_soc_read(codec, WM8962_CLOCKING2) & WM8962_SYSCLK_SRC_MASK; 2354 src = snd_soc_read(codec, WM8962_CLOCKING2) & WM8962_SYSCLK_SRC_MASK;
2349 2355
2350 switch (src) { 2356 switch (src) {
@@ -2939,33 +2945,6 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec)
2939 return 0; 2945 return 0;
2940} 2946}
2941 2947
2942static void wm8962_sync_cache(struct snd_soc_codec *codec)
2943{
2944 u16 *reg_cache = codec->reg_cache;
2945 int i;
2946
2947 if (!codec->cache_sync)
2948 return;
2949
2950 dev_dbg(codec->dev, "Syncing cache\n");
2951
2952 codec->cache_only = 0;
2953
2954 /* Sync back cached values if they're different from the
2955 * hardware default.
2956 */
2957 for (i = 1; i < codec->driver->reg_cache_size; i++) {
2958 if (i == WM8962_SOFTWARE_RESET)
2959 continue;
2960 if (reg_cache[i] == wm8962_reg[i])
2961 continue;
2962
2963 snd_soc_write(codec, i, reg_cache[i]);
2964 }
2965
2966 codec->cache_sync = 0;
2967}
2968
2969/* -1 for reserved values */ 2948/* -1 for reserved values */
2970static const int bclk_divs[] = { 2949static const int bclk_divs[] = {
2971 1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32 2950 1, -1, 2, 3, 4, -1, 6, 8, -1, 12, 16, 24, -1, 32, 32, 32
@@ -3093,7 +3072,8 @@ static int wm8962_set_bias_level(struct snd_soc_codec *codec,
3093 return ret; 3072 return ret;
3094 } 3073 }
3095 3074
3096 wm8962_sync_cache(codec); 3075 regcache_cache_only(wm8962->regmap, false);
3076 regcache_sync(wm8962->regmap);
3097 3077
3098 snd_soc_update_bits(codec, WM8962_ANTI_POP, 3078 snd_soc_update_bits(codec, WM8962_ANTI_POP,
3099 WM8962_STARTUP_BIAS_ENA | 3079 WM8962_STARTUP_BIAS_ENA |
@@ -3966,26 +3946,12 @@ static int wm8962_probe(struct snd_soc_codec *codec)
3966 bool dmicclk, dmicdat; 3946 bool dmicclk, dmicdat;
3967 3947
3968 wm8962->codec = codec; 3948 wm8962->codec = codec;
3969 INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work); 3949 codec->control_data = wm8962->regmap;
3970 init_completion(&wm8962->fll_lock);
3971
3972 codec->cache_sync = 1;
3973 codec->dapm.idle_bias_off = 1;
3974 3950
3975 ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_I2C); 3951 ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP);
3976 if (ret != 0) { 3952 if (ret != 0) {
3977 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 3953 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
3978 goto err; 3954 return ret;
3979 }
3980
3981 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
3982 wm8962->supplies[i].supply = wm8962_supply_names[i];
3983
3984 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8962->supplies),
3985 wm8962->supplies);
3986 if (ret != 0) {
3987 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
3988 goto err;
3989 } 3955 }
3990 3956
3991 wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0; 3957 wm8962->disable_nb[0].notifier_call = wm8962_regulator_event_0;
@@ -4008,43 +3974,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
4008 } 3974 }
4009 } 3975 }
4010 3976
4011 ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
4012 wm8962->supplies);
4013 if (ret != 0) {
4014 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
4015 goto err_get;
4016 }
4017
4018 ret = snd_soc_read(codec, WM8962_SOFTWARE_RESET);
4019 if (ret < 0) {
4020 dev_err(codec->dev, "Failed to read ID register\n");
4021 goto err_enable;
4022 }
4023 if (ret != wm8962_reg[WM8962_SOFTWARE_RESET]) {
4024 dev_err(codec->dev, "Device is not a WM8962, ID %x != %x\n",
4025 ret, wm8962_reg[WM8962_SOFTWARE_RESET]);
4026 ret = -EINVAL;
4027 goto err_enable;
4028 }
4029
4030 ret = snd_soc_read(codec, WM8962_RIGHT_INPUT_VOLUME);
4031 if (ret < 0) {
4032 dev_err(codec->dev, "Failed to read device revision: %d\n",
4033 ret);
4034 goto err_enable;
4035 }
4036
4037 dev_info(codec->dev, "customer id %x revision %c\n",
4038 (ret & WM8962_CUST_ID_MASK) >> WM8962_CUST_ID_SHIFT,
4039 ((ret & WM8962_CHIP_REV_MASK) >> WM8962_CHIP_REV_SHIFT)
4040 + 'A');
4041
4042 ret = wm8962_reset(codec);
4043 if (ret < 0) {
4044 dev_err(codec->dev, "Failed to issue reset\n");
4045 goto err_enable;
4046 }
4047
4048 /* SYSCLK defaults to on; make sure it is off so we can safely 3977 /* SYSCLK defaults to on; make sure it is off so we can safely
4049 * write to registers if the device is declocked. 3978 * write to registers if the device is declocked.
4050 */ 3979 */
@@ -4059,8 +3988,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
4059 WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA, 3988 WM8962_OSC_ENA | WM8962_PLL2_ENA | WM8962_PLL3_ENA,
4060 0); 3989 0);
4061 3990
4062 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4063
4064 if (pdata) { 3991 if (pdata) {
4065 /* Apply static configuration for GPIOs */ 3992 /* Apply static configuration for GPIOs */
4066 for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++) 3993 for (i = 0; i < ARRAY_SIZE(pdata->gpio_init); i++)
@@ -4170,13 +4097,6 @@ static int wm8962_probe(struct snd_soc_codec *codec)
4170 } 4097 }
4171 4098
4172 return 0; 4099 return 0;
4173
4174err_enable:
4175 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4176err_get:
4177 regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4178err:
4179 return ret;
4180} 4100}
4181 4101
4182static int wm8962_remove(struct snd_soc_codec *codec) 4102static int wm8962_remove(struct snd_soc_codec *codec)
@@ -4194,7 +4114,6 @@ static int wm8962_remove(struct snd_soc_codec *codec)
4194 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++) 4114 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
4195 regulator_unregister_notifier(wm8962->supplies[i].consumer, 4115 regulator_unregister_notifier(wm8962->supplies[i].consumer,
4196 &wm8962->disable_nb[i]); 4116 &wm8962->disable_nb[i]);
4197 regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4198 4117
4199 return 0; 4118 return 0;
4200} 4119}
@@ -4203,20 +4122,28 @@ static struct snd_soc_codec_driver soc_codec_dev_wm8962 = {
4203 .probe = wm8962_probe, 4122 .probe = wm8962_probe,
4204 .remove = wm8962_remove, 4123 .remove = wm8962_remove,
4205 .set_bias_level = wm8962_set_bias_level, 4124 .set_bias_level = wm8962_set_bias_level,
4206 .reg_cache_size = WM8962_MAX_REGISTER + 1,
4207 .reg_word_size = sizeof(u16),
4208 .reg_cache_default = wm8962_reg,
4209 .volatile_register = wm8962_volatile_register,
4210 .readable_register = wm8962_readable_register,
4211 .set_pll = wm8962_set_fll, 4125 .set_pll = wm8962_set_fll,
4212}; 4126};
4213 4127
4128static const struct regmap_config wm8962_regmap = {
4129 .reg_bits = 16,
4130 .val_bits = 16,
4131
4132 .max_register = WM8962_MAX_REGISTER,
4133 .reg_defaults = wm8962_reg,
4134 .num_reg_defaults = ARRAY_SIZE(wm8962_reg),
4135 .volatile_reg = wm8962_volatile_register,
4136 .readable_reg = wm8962_readable_register,
4137 .cache_type = REGCACHE_RBTREE,
4138};
4139
4214#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 4140#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
4215static __devinit int wm8962_i2c_probe(struct i2c_client *i2c, 4141static __devinit int wm8962_i2c_probe(struct i2c_client *i2c,
4216 const struct i2c_device_id *id) 4142 const struct i2c_device_id *id)
4217{ 4143{
4218 struct wm8962_priv *wm8962; 4144 struct wm8962_priv *wm8962;
4219 int ret; 4145 unsigned int reg;
4146 int ret, i;
4220 4147
4221 wm8962 = kzalloc(sizeof(struct wm8962_priv), GFP_KERNEL); 4148 wm8962 = kzalloc(sizeof(struct wm8962_priv), GFP_KERNEL);
4222 if (wm8962 == NULL) 4149 if (wm8962 == NULL)
@@ -4224,19 +4151,103 @@ static __devinit int wm8962_i2c_probe(struct i2c_client *i2c,
4224 4151
4225 i2c_set_clientdata(i2c, wm8962); 4152 i2c_set_clientdata(i2c, wm8962);
4226 4153
4154 INIT_DELAYED_WORK(&wm8962->mic_work, wm8962_mic_work);
4155 init_completion(&wm8962->fll_lock);
4227 wm8962->irq = i2c->irq; 4156 wm8962->irq = i2c->irq;
4228 4157
4158 for (i = 0; i < ARRAY_SIZE(wm8962->supplies); i++)
4159 wm8962->supplies[i].supply = wm8962_supply_names[i];
4160
4161 ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8962->supplies),
4162 wm8962->supplies);
4163 if (ret != 0) {
4164 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
4165 goto err_alloc;
4166 }
4167
4168 ret = regulator_bulk_enable(ARRAY_SIZE(wm8962->supplies),
4169 wm8962->supplies);
4170 if (ret != 0) {
4171 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
4172 goto err_get;
4173 }
4174
4175 wm8962->regmap = regmap_init_i2c(i2c, &wm8962_regmap);
4176 if (IS_ERR(wm8962->regmap)) {
4177 ret = PTR_ERR(wm8962->regmap);
4178 dev_err(&i2c->dev, "Failed to allocate regmap: %d\n", ret);
4179 goto err_enable;
4180 }
4181
4182 /*
4183 * We haven't marked the chip revision as volatile due to
4184 * sharing a register with the right input volume; explicitly
4185 * bypass the cache to read it.
4186 */
4187 regcache_cache_bypass(wm8962->regmap, true);
4188
4189 ret = regmap_read(wm8962->regmap, WM8962_SOFTWARE_RESET, &reg);
4190 if (ret < 0) {
4191 dev_err(&i2c->dev, "Failed to read ID register\n");
4192 goto err_regmap;
4193 }
4194 if (reg != 0x6243) {
4195 dev_err(&i2c->dev,
4196 "Device is not a WM8962, ID %x != 0x6243\n", ret);
4197 ret = -EINVAL;
4198 goto err_regmap;
4199 }
4200
4201 ret = regmap_read(wm8962->regmap, WM8962_RIGHT_INPUT_VOLUME, &reg);
4202 if (ret < 0) {
4203 dev_err(&i2c->dev, "Failed to read device revision: %d\n",
4204 ret);
4205 goto err_regmap;
4206 }
4207
4208 dev_info(&i2c->dev, "customer id %x revision %c\n",
4209 (reg & WM8962_CUST_ID_MASK) >> WM8962_CUST_ID_SHIFT,
4210 ((reg & WM8962_CHIP_REV_MASK) >> WM8962_CHIP_REV_SHIFT)
4211 + 'A');
4212
4213 regcache_cache_bypass(wm8962->regmap, false);
4214
4215 ret = wm8962_reset(wm8962);
4216 if (ret < 0) {
4217 dev_err(&i2c->dev, "Failed to issue reset\n");
4218 goto err_regmap;
4219 }
4220
4221 regcache_cache_only(wm8962->regmap, true);
4222
4229 ret = snd_soc_register_codec(&i2c->dev, 4223 ret = snd_soc_register_codec(&i2c->dev,
4230 &soc_codec_dev_wm8962, &wm8962_dai, 1); 4224 &soc_codec_dev_wm8962, &wm8962_dai, 1);
4231 if (ret < 0) 4225 if (ret < 0)
4232 kfree(wm8962); 4226 goto err_regmap;
4227
4228 /* The drivers should power up as needed */
4229 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4230
4231 return 0;
4233 4232
4233err_regmap:
4234 regmap_exit(wm8962->regmap);
4235err_enable:
4236 regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4237err_get:
4238 regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4239err_alloc:
4240 kfree(wm8962);
4234 return ret; 4241 return ret;
4235} 4242}
4236 4243
4237static __devexit int wm8962_i2c_remove(struct i2c_client *client) 4244static __devexit int wm8962_i2c_remove(struct i2c_client *client)
4238{ 4245{
4246 struct wm8962_priv *wm8962 = dev_get_drvdata(&client->dev);
4247
4239 snd_soc_unregister_codec(&client->dev); 4248 snd_soc_unregister_codec(&client->dev);
4249 regmap_exit(wm8962->regmap);
4250 regulator_bulk_free(ARRAY_SIZE(wm8962->supplies), wm8962->supplies);
4240 kfree(i2c_get_clientdata(client)); 4251 kfree(i2c_get_clientdata(client));
4241 return 0; 4252 return 0;
4242} 4253}
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-06 23:31:01 -0500