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authorAxel Lin <axel.lin@gmail.com>2011-10-27 04:27:33 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2011-10-27 05:59:26 -0400
commitb272cc769ac22014c0c60f2ebac46a2ae01300bf (patch)
tree86a0c8e101d9973dec33713085802c7b6a438224 /sound/soc/codecs/wm8940.c
parent5927f94700e860ae27ff24e7f3bc9e4f7b9922eb (diff)
ASoC: wm8940: Fix mask for setting BCLKDIV
According to the datasheet: BCLK is controlled by BIT[4:2] of WM8940_CLOCK(06h) register. Signed-off-by: Chris Paulson-Ellis <chris@edesix.com> Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/wm8940.c')
-rw-r--r--sound/soc/codecs/wm8940.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/codecs/wm8940.c b/sound/soc/codecs/wm8940.c
index dc5cb3150857..de9ec9b8b7d9 100644
--- a/sound/soc/codecs/wm8940.c
+++ b/sound/soc/codecs/wm8940.c
@@ -621,7 +621,7 @@ static int wm8940_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
621 621
622 switch (div_id) { 622 switch (div_id) {
623 case WM8940_BCLKDIV: 623 case WM8940_BCLKDIV:
624 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFEF3; 624 reg = snd_soc_read(codec, WM8940_CLOCK) & 0xFFE3;
625 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2)); 625 ret = snd_soc_write(codec, WM8940_CLOCK, reg | (div << 2));
626 break; 626 break;
627 case WM8940_MCLKDIV: 627 case WM8940_MCLKDIV: