ASoC: Fix offset of freqmode in WM8580 PLL configuration

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: stable@kernel.org

1 files changed, 1 insertions, 1 deletions

diff --git a/sound/soc/codecs/wm8580.c b/sound/soc/codecs/wm8580.c
index 442ea6f160fc..41aab4a7a254 100644
--- a/sound/soc/codecs/wm8580.c
+++ b/sound/soc/codecs/wm8580.c
@@ -522,7 +522,7 @@ static int wm8580_set_dai_pll(struct snd_soc_dai *codec_dai,
         reg = wm8580_read(codec, WM8580_PLLA4 + offset);
         reg &= ~0x3f;
         reg |= pll_div.prescale | pll_div.postscale << 1 |
-                pll_div.freqmode << 4;
+                pll_div.freqmode << 3;
 
         wm8580_write(codec, WM8580_PLLA4 + offset, reg);