diff options
author | Peter Ujfalusi <peter.ujfalusi@ti.com> | 2013-11-29 09:03:44 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2013-12-19 13:37:06 -0500 |
commit | 53509108f7372f786576d7d43f8f881cdf51d38a (patch) | |
tree | a0505f039dd4268a295ea0e969b3bcf8a191e7f1 /sound/soc/codecs/twl6040.c | |
parent | 0d35d080ac93f317b6c47180d75c8e1a8109b4c4 (diff) |
ASoC: twl6040: Custom caching for sensitive DL1/2 path registers
Introduce a small register cache for registers which needs special caching
to reduce pop noise:
TWL6040_REG_HSLCTL, TWL6040_REG_HSRCTL, TWL6040_REG_EARCTL, TWL6040_REG_HFLCTL
and TWL6040_REG_HFRCTL.
Switch over and use the new small cache for these registers instead of the
main reg_cache.
This is in preparation to remove the local ASoC reg_cache from the driver.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/twl6040.c')
-rw-r--r-- | sound/soc/codecs/twl6040.c | 51 |
1 files changed, 49 insertions, 2 deletions
diff --git a/sound/soc/codecs/twl6040.c b/sound/soc/codecs/twl6040.c index ef13a501a7b4..fb8c65bd6e5d 100644 --- a/sound/soc/codecs/twl6040.c +++ b/sound/soc/codecs/twl6040.c | |||
@@ -72,6 +72,7 @@ struct twl6040_data { | |||
72 | int hs_power_mode_locked; | 72 | int hs_power_mode_locked; |
73 | bool dl1_unmuted; | 73 | bool dl1_unmuted; |
74 | bool dl2_unmuted; | 74 | bool dl2_unmuted; |
75 | u8 dl12_cache[TWL6040_REG_HFRCTL - TWL6040_REG_HSLCTL + 1]; | ||
75 | unsigned int clk_in; | 76 | unsigned int clk_in; |
76 | unsigned int sysclk; | 77 | unsigned int sysclk; |
77 | struct twl6040_jack_data hs_jack; | 78 | struct twl6040_jack_data hs_jack; |
@@ -174,18 +175,62 @@ static struct snd_pcm_hw_constraint_list sysclk_constraints[] = { | |||
174 | { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, }, | 175 | { .count = ARRAY_SIZE(hp_rates), .list = hp_rates, }, |
175 | }; | 176 | }; |
176 | 177 | ||
178 | static inline int twl6040_read_dl12_cache(struct snd_soc_codec *codec, | ||
179 | u8 reg, u8 *value) | ||
180 | { | ||
181 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | ||
182 | int ret = 0; | ||
183 | |||
184 | switch (reg) { | ||
185 | case TWL6040_REG_HSLCTL: | ||
186 | case TWL6040_REG_HSRCTL: | ||
187 | case TWL6040_REG_EARCTL: | ||
188 | case TWL6040_REG_HFLCTL: | ||
189 | case TWL6040_REG_HFRCTL: | ||
190 | *value = priv->dl12_cache[reg - TWL6040_REG_HSLCTL]; | ||
191 | break; | ||
192 | default: | ||
193 | ret = -EINVAL; | ||
194 | break; | ||
195 | } | ||
196 | |||
197 | return ret; | ||
198 | } | ||
199 | |||
177 | /* | 200 | /* |
178 | * read twl6040 register cache | 201 | * read twl6040 register cache |
179 | */ | 202 | */ |
180 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, | 203 | static inline unsigned int twl6040_read_reg_cache(struct snd_soc_codec *codec, |
181 | unsigned int reg) | 204 | unsigned int reg) |
182 | { | 205 | { |
183 | u8 *cache = codec->reg_cache; | 206 | u8 *cache = codec->reg_cache; |
207 | u8 value; | ||
184 | 208 | ||
185 | if (reg >= TWL6040_CACHEREGNUM) | 209 | if (reg >= TWL6040_CACHEREGNUM) |
186 | return -EIO; | 210 | return -EIO; |
187 | 211 | ||
188 | return cache[reg]; | 212 | if (twl6040_read_dl12_cache(codec, reg, &value)) |
213 | value = cache[reg]; | ||
214 | |||
215 | return value; | ||
216 | } | ||
217 | |||
218 | static inline void twl6040_update_dl12_cache(struct snd_soc_codec *codec, | ||
219 | u8 reg, u8 value) | ||
220 | { | ||
221 | struct twl6040_data *priv = snd_soc_codec_get_drvdata(codec); | ||
222 | |||
223 | switch (reg) { | ||
224 | case TWL6040_REG_HSLCTL: | ||
225 | case TWL6040_REG_HSRCTL: | ||
226 | case TWL6040_REG_EARCTL: | ||
227 | case TWL6040_REG_HFLCTL: | ||
228 | case TWL6040_REG_HFRCTL: | ||
229 | priv->dl12_cache[reg - TWL6040_REG_HSLCTL] = value; | ||
230 | break; | ||
231 | default: | ||
232 | break; | ||
233 | } | ||
189 | } | 234 | } |
190 | 235 | ||
191 | /* | 236 | /* |
@@ -199,6 +244,8 @@ static inline void twl6040_write_reg_cache(struct snd_soc_codec *codec, | |||
199 | if (reg >= TWL6040_CACHEREGNUM) | 244 | if (reg >= TWL6040_CACHEREGNUM) |
200 | return; | 245 | return; |
201 | cache[reg] = value; | 246 | cache[reg] = value; |
247 | |||
248 | twl6040_update_dl12_cache(codec, reg, value); | ||
202 | } | 249 | } |
203 | 250 | ||
204 | /* | 251 | /* |