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authorPeter Ujfalusi <peter.ujfalusi@nokia.com>2010-04-23 03:09:57 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2010-04-26 10:16:18 -0400
commitf4d593280652025f797d432e90f49d49b9334689 (patch)
tree3493429917b0255c55adce876869cb0fc9508a88 /sound/soc/codecs/tlv320dac33.c
parent7add84aa779b4f7ca39484a82a11e01d7acd4dca (diff)
ASoC: tlv320dac33: Fix for early interrupt in FIFO Mode1
Alarm threshold interrupt is triggered right after the playback start. This interrupt is recieved during the first burst period, and caused the state machine to write additional nSample command, which has to be avoided. To fix this issue move the DAC33 interrupt unmasking after we configured the PREFILL register with a small delay. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
Diffstat (limited to 'sound/soc/codecs/tlv320dac33.c')
-rw-r--r--sound/soc/codecs/tlv320dac33.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/sound/soc/codecs/tlv320dac33.c b/sound/soc/codecs/tlv320dac33.c
index 824bb354ebc9..520377bdb61c 100644
--- a/sound/soc/codecs/tlv320dac33.c
+++ b/sound/soc/codecs/tlv320dac33.c
@@ -557,9 +557,13 @@ static inline void dac33_prefill_handler(struct tlv320dac33_priv *dac33)
557 switch (dac33->fifo_mode) { 557 switch (dac33->fifo_mode) {
558 case DAC33_FIFO_MODE1: 558 case DAC33_FIFO_MODE1:
559 dac33_write16(codec, DAC33_NSAMPLE_MSB, 559 dac33_write16(codec, DAC33_NSAMPLE_MSB,
560 DAC33_THRREG(dac33->nsample)); 560 DAC33_THRREG(dac33->nsample + dac33->alarm_threshold));
561 dac33_write16(codec, DAC33_PREFILL_MSB, 561 dac33_write16(codec, DAC33_PREFILL_MSB,
562 DAC33_THRREG(dac33->alarm_threshold)); 562 DAC33_THRREG(dac33->alarm_threshold));
563 /* Enable Alarm Threshold IRQ with a delay */
564 udelay(SAMPLES_TO_US(dac33->burst_rate,
565 dac33->alarm_threshold));
566 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
563 break; 567 break;
564 case DAC33_FIFO_MODE7: 568 case DAC33_FIFO_MODE7:
565 dac33_write16(codec, DAC33_PREFILL_MSB, 569 dac33_write16(codec, DAC33_PREFILL_MSB,
@@ -782,7 +786,6 @@ static int dac33_prepare_chip(struct snd_pcm_substream *substream)
782 case DAC33_FIFO_MODE1: 786 case DAC33_FIFO_MODE1:
783 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B, 787 dac33_write(codec, DAC33_FIFO_IRQ_MODE_B,
784 DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL)); 788 DAC33_ATM(DAC33_FIFO_IRQ_MODE_LEVEL));
785 dac33_write(codec, DAC33_FIFO_IRQ_MASK, DAC33_MAT);
786 break; 789 break;
787 case DAC33_FIFO_MODE7: 790 case DAC33_FIFO_MODE7:
788 /* Disable all interrupts */ 791 /* Disable all interrupts */