diff options
author | Daniel Mack <daniel@caiaq.org> | 2008-11-26 11:47:36 -0500 |
---|---|---|
committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2008-11-26 13:30:59 -0500 |
commit | 54f01916297bafc18bd7df4e2300a0544a84fce3 (patch) | |
tree | 0f4a819087c89004bd059036d7518ed95bedd833 /sound/soc/codecs/tlv320aic3x.h | |
parent | 414ff491b2ab68359c7a2037b30ccfea20d829d4 (diff) |
ASoC: Allow more routing features for tlv320aic3x
This patch enables more routing functions for tlv320aic3x codecs.
It is now possible to
- control the volume of the PGA bypass path for the HPL, HPR, HPLCOM
and HPRCOM outputs individually
- route right line1 input to the left ADC channel
- route left line1 input to the right ADC channel
- route right mic3 input to left DAC channel
- route left mic3 input to right DAC channel
- route left line1 input to right line1 output
- route right line1 input to left line1 output
Signed-off-by: Daniel Mack <daniel@caiaq.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/tlv320aic3x.h')
-rw-r--r-- | sound/soc/codecs/tlv320aic3x.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/sound/soc/codecs/tlv320aic3x.h b/sound/soc/codecs/tlv320aic3x.h index 00a195aa02e4..7e982acf3996 100644 --- a/sound/soc/codecs/tlv320aic3x.h +++ b/sound/soc/codecs/tlv320aic3x.h | |||
@@ -48,7 +48,9 @@ | |||
48 | #define MIC3LR_2_RADC_CTRL 18 | 48 | #define MIC3LR_2_RADC_CTRL 18 |
49 | /* Line1 Input control registers */ | 49 | /* Line1 Input control registers */ |
50 | #define LINE1L_2_LADC_CTRL 19 | 50 | #define LINE1L_2_LADC_CTRL 19 |
51 | #define LINE1R_2_LADC_CTRL 21 | ||
51 | #define LINE1R_2_RADC_CTRL 22 | 52 | #define LINE1R_2_RADC_CTRL 22 |
53 | #define LINE1L_2_RADC_CTRL 24 | ||
52 | /* Line2 Input control registers */ | 54 | /* Line2 Input control registers */ |
53 | #define LINE2L_2_LADC_CTRL 20 | 55 | #define LINE2L_2_LADC_CTRL 20 |
54 | #define LINE2R_2_RADC_CTRL 23 | 56 | #define LINE2R_2_RADC_CTRL 23 |
@@ -79,6 +81,8 @@ | |||
79 | #define LINE2L_2_HPLOUT_VOL 45 | 81 | #define LINE2L_2_HPLOUT_VOL 45 |
80 | #define LINE2R_2_HPROUT_VOL 62 | 82 | #define LINE2R_2_HPROUT_VOL 62 |
81 | #define PGAL_2_HPLOUT_VOL 46 | 83 | #define PGAL_2_HPLOUT_VOL 46 |
84 | #define PGAL_2_HPROUT_VOL 60 | ||
85 | #define PGAR_2_HPLOUT_VOL 49 | ||
82 | #define PGAR_2_HPROUT_VOL 63 | 86 | #define PGAR_2_HPROUT_VOL 63 |
83 | #define DACL1_2_HPLOUT_VOL 47 | 87 | #define DACL1_2_HPLOUT_VOL 47 |
84 | #define DACR1_2_HPROUT_VOL 64 | 88 | #define DACR1_2_HPROUT_VOL 64 |
@@ -88,6 +92,8 @@ | |||
88 | #define LINE2L_2_HPLCOM_VOL 52 | 92 | #define LINE2L_2_HPLCOM_VOL 52 |
89 | #define LINE2R_2_HPRCOM_VOL 69 | 93 | #define LINE2R_2_HPRCOM_VOL 69 |
90 | #define PGAL_2_HPLCOM_VOL 53 | 94 | #define PGAL_2_HPLCOM_VOL 53 |
95 | #define PGAR_2_HPLCOM_VOL 56 | ||
96 | #define PGAL_2_HPRCOM_VOL 67 | ||
91 | #define PGAR_2_HPRCOM_VOL 70 | 97 | #define PGAR_2_HPRCOM_VOL 70 |
92 | #define DACL1_2_HPLCOM_VOL 54 | 98 | #define DACL1_2_HPLCOM_VOL 54 |
93 | #define DACR1_2_HPRCOM_VOL 71 | 99 | #define DACR1_2_HPRCOM_VOL 71 |
@@ -103,11 +109,17 @@ | |||
103 | #define MONOLOPM_CTRL 79 | 109 | #define MONOLOPM_CTRL 79 |
104 | /* Line Output Plus/Minus control registers */ | 110 | /* Line Output Plus/Minus control registers */ |
105 | #define LINE2L_2_LLOPM_VOL 80 | 111 | #define LINE2L_2_LLOPM_VOL 80 |
112 | #define LINE2L_2_RLOPM_VOL 87 | ||
113 | #define LINE2R_2_LLOPM_VOL 83 | ||
106 | #define LINE2R_2_RLOPM_VOL 90 | 114 | #define LINE2R_2_RLOPM_VOL 90 |
107 | #define PGAL_2_LLOPM_VOL 81 | 115 | #define PGAL_2_LLOPM_VOL 81 |
116 | #define PGAL_2_RLOPM_VOL 88 | ||
117 | #define PGAR_2_LLOPM_VOL 84 | ||
108 | #define PGAR_2_RLOPM_VOL 91 | 118 | #define PGAR_2_RLOPM_VOL 91 |
109 | #define DACL1_2_LLOPM_VOL 82 | 119 | #define DACL1_2_LLOPM_VOL 82 |
120 | #define DACL1_2_RLOPM_VOL 89 | ||
110 | #define DACR1_2_RLOPM_VOL 92 | 121 | #define DACR1_2_RLOPM_VOL 92 |
122 | #define DACR1_2_LLOPM_VOL 85 | ||
111 | #define LLOPM_CTRL 86 | 123 | #define LLOPM_CTRL 86 |
112 | #define RLOPM_CTRL 93 | 124 | #define RLOPM_CTRL 93 |
113 | /* GPIO/IRQ registers */ | 125 | /* GPIO/IRQ registers */ |