aboutsummaryrefslogtreecommitdiffstats
path: root/sound/soc/codecs/tlv320aic3x.c
diff options
context:
space:
mode:
authorLiam Girdwood <lrg@slimlogic.co.uk>2010-09-20 04:53:29 -0400
committerLiam Girdwood <lrg@slimlogic.co.uk>2010-09-20 04:53:29 -0400
commit826ca0bd53f443c830630c1532bf142c4e0f7d13 (patch)
tree800290e7f4a959eb2a66ae586c06351fa0731c19 /sound/soc/codecs/tlv320aic3x.c
parent19f7ac5038dc11e1ee2c54bb411326d23b40ccff (diff)
parent9900daa81b9e668c28ecf568c714ee49090aa187 (diff)
Merge remote branch 'asoc/for-2.6.37' into for-2.6.37
Diffstat (limited to 'sound/soc/codecs/tlv320aic3x.c')
-rw-r--r--sound/soc/codecs/tlv320aic3x.c263
1 files changed, 115 insertions, 148 deletions
diff --git a/sound/soc/codecs/tlv320aic3x.c b/sound/soc/codecs/tlv320aic3x.c
index 92030f527d39..6190351965a4 100644
--- a/sound/soc/codecs/tlv320aic3x.c
+++ b/sound/soc/codecs/tlv320aic3x.c
@@ -112,62 +112,21 @@ static const u8 aic3x_reg[AIC3X_CACHEREGNUM] = {
112}; 112};
113 113
114/* 114/*
115 * read aic3x register cache 115 * read from the aic3x register space. Only use for this function is if
116 * wanting to read volatile bits from those registers that has both read-only
117 * and read/write bits. All other cases should use snd_soc_read.
116 */ 118 */
117static inline unsigned int aic3x_read_reg_cache(struct snd_soc_codec *codec, 119static int aic3x_read(struct snd_soc_codec *codec, unsigned int reg,
118 unsigned int reg) 120 u8 *value)
119{ 121{
120 u8 *cache = codec->reg_cache; 122 u8 *cache = codec->reg_cache;
121 if (reg >= AIC3X_CACHEREGNUM)
122 return -1;
123 return cache[reg];
124}
125 123
126/*
127 * write aic3x register cache
128 */
129static inline void aic3x_write_reg_cache(struct snd_soc_codec *codec,
130 u8 reg, u8 value)
131{
132 u8 *cache = codec->reg_cache;
133 if (reg >= AIC3X_CACHEREGNUM) 124 if (reg >= AIC3X_CACHEREGNUM)
134 return; 125 return -1;
135 cache[reg] = value;
136}
137
138/*
139 * write to the aic3x register space
140 */
141static int aic3x_write(struct snd_soc_codec *codec, unsigned int reg,
142 unsigned int value)
143{
144 u8 data[2];
145
146 /* data is
147 * D15..D8 aic3x register offset
148 * D7...D0 register data
149 */
150 data[0] = reg & 0xff;
151 data[1] = value & 0xff;
152
153 aic3x_write_reg_cache(codec, data[0], data[1]);
154 if (codec->hw_write(codec->control_data, data, 2) == 2)
155 return 0;
156 else
157 return -EIO;
158}
159
160/*
161 * read from the aic3x register space
162 */
163static int aic3x_read(struct snd_soc_codec *codec, unsigned int reg,
164 u8 *value)
165{
166 *value = reg & 0xff;
167 126
168 value[0] = i2c_smbus_read_byte_data(codec->control_data, value[0]); 127 *value = codec->hw_read(codec, reg);
128 cache[reg] = *value;
169 129
170 aic3x_write_reg_cache(codec, reg, *value);
171 return 0; 130 return 0;
172} 131}
173 132
@@ -847,8 +806,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
847 int clk; 806 int clk;
848 807
849 /* select data word length */ 808 /* select data word length */
850 data = 809 data = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4));
851 aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLB) & (~(0x3 << 4));
852 switch (params_format(params)) { 810 switch (params_format(params)) {
853 case SNDRV_PCM_FORMAT_S16_LE: 811 case SNDRV_PCM_FORMAT_S16_LE:
854 break; 812 break;
@@ -862,7 +820,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
862 data |= (0x03 << 4); 820 data |= (0x03 << 4);
863 break; 821 break;
864 } 822 }
865 aic3x_write(codec, AIC3X_ASD_INTF_CTRLB, data); 823 snd_soc_write(codec, AIC3X_ASD_INTF_CTRLB, data);
866 824
867 /* Fsref can be 44100 or 48000 */ 825 /* Fsref can be 44100 or 48000 */
868 fsref = (params_rate(params) % 11025 == 0) ? 44100 : 48000; 826 fsref = (params_rate(params) % 11025 == 0) ? 44100 : 48000;
@@ -877,17 +835,17 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
877 835
878 if (bypass_pll) { 836 if (bypass_pll) {
879 pll_q &= 0xf; 837 pll_q &= 0xf;
880 aic3x_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT); 838 snd_soc_write(codec, AIC3X_PLL_PROGA_REG, pll_q << PLLQ_SHIFT);
881 aic3x_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV); 839 snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_CLKDIV);
882 /* disable PLL if it is bypassed */ 840 /* disable PLL if it is bypassed */
883 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); 841 reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
884 aic3x_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE); 842 snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg & ~PLL_ENABLE);
885 843
886 } else { 844 } else {
887 aic3x_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV); 845 snd_soc_write(codec, AIC3X_GPIOB_REG, CODEC_CLKIN_PLLDIV);
888 /* enable PLL when it is used */ 846 /* enable PLL when it is used */
889 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); 847 reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
890 aic3x_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE); 848 snd_soc_write(codec, AIC3X_PLL_PROGA_REG, reg | PLL_ENABLE);
891 } 849 }
892 850
893 /* Route Left DAC to left channel input and 851 /* Route Left DAC to left channel input and
@@ -896,7 +854,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
896 data |= (fsref == 44100) ? FSREF_44100 : FSREF_48000; 854 data |= (fsref == 44100) ? FSREF_44100 : FSREF_48000;
897 if (params_rate(params) >= 64000) 855 if (params_rate(params) >= 64000)
898 data |= DUAL_RATE_MODE; 856 data |= DUAL_RATE_MODE;
899 aic3x_write(codec, AIC3X_CODEC_DATAPATH_REG, data); 857 snd_soc_write(codec, AIC3X_CODEC_DATAPATH_REG, data);
900 858
901 /* codec sample rate select */ 859 /* codec sample rate select */
902 data = (fsref * 20) / params_rate(params); 860 data = (fsref * 20) / params_rate(params);
@@ -905,7 +863,7 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
905 data /= 5; 863 data /= 5;
906 data -= 2; 864 data -= 2;
907 data |= (data << 4); 865 data |= (data << 4);
908 aic3x_write(codec, AIC3X_SAMPLE_RATE_SEL_REG, data); 866 snd_soc_write(codec, AIC3X_SAMPLE_RATE_SEL_REG, data);
909 867
910 if (bypass_pll) 868 if (bypass_pll)
911 return 0; 869 return 0;
@@ -974,13 +932,16 @@ static int aic3x_hw_params(struct snd_pcm_substream *substream,
974 } 932 }
975 933
976found: 934found:
977 data = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); 935 data = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
978 aic3x_write(codec, AIC3X_PLL_PROGA_REG, data | (pll_p << PLLP_SHIFT)); 936 snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
979 aic3x_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG, pll_r << PLLR_SHIFT); 937 data | (pll_p << PLLP_SHIFT));
980 aic3x_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT); 938 snd_soc_write(codec, AIC3X_OVRF_STATUS_AND_PLLR_REG,
981 aic3x_write(codec, AIC3X_PLL_PROGC_REG, (pll_d >> 6) << PLLD_MSB_SHIFT); 939 pll_r << PLLR_SHIFT);
982 aic3x_write(codec, AIC3X_PLL_PROGD_REG, 940 snd_soc_write(codec, AIC3X_PLL_PROGB_REG, pll_j << PLLJ_SHIFT);
983 (pll_d & 0x3F) << PLLD_LSB_SHIFT); 941 snd_soc_write(codec, AIC3X_PLL_PROGC_REG,
942 (pll_d >> 6) << PLLD_MSB_SHIFT);
943 snd_soc_write(codec, AIC3X_PLL_PROGD_REG,
944 (pll_d & 0x3F) << PLLD_LSB_SHIFT);
984 945
985 return 0; 946 return 0;
986} 947}
@@ -988,15 +949,15 @@ found:
988static int aic3x_mute(struct snd_soc_dai *dai, int mute) 949static int aic3x_mute(struct snd_soc_dai *dai, int mute)
989{ 950{
990 struct snd_soc_codec *codec = dai->codec; 951 struct snd_soc_codec *codec = dai->codec;
991 u8 ldac_reg = aic3x_read_reg_cache(codec, LDAC_VOL) & ~MUTE_ON; 952 u8 ldac_reg = snd_soc_read(codec, LDAC_VOL) & ~MUTE_ON;
992 u8 rdac_reg = aic3x_read_reg_cache(codec, RDAC_VOL) & ~MUTE_ON; 953 u8 rdac_reg = snd_soc_read(codec, RDAC_VOL) & ~MUTE_ON;
993 954
994 if (mute) { 955 if (mute) {
995 aic3x_write(codec, LDAC_VOL, ldac_reg | MUTE_ON); 956 snd_soc_write(codec, LDAC_VOL, ldac_reg | MUTE_ON);
996 aic3x_write(codec, RDAC_VOL, rdac_reg | MUTE_ON); 957 snd_soc_write(codec, RDAC_VOL, rdac_reg | MUTE_ON);
997 } else { 958 } else {
998 aic3x_write(codec, LDAC_VOL, ldac_reg); 959 snd_soc_write(codec, LDAC_VOL, ldac_reg);
999 aic3x_write(codec, RDAC_VOL, rdac_reg); 960 snd_soc_write(codec, RDAC_VOL, rdac_reg);
1000 } 961 }
1001 962
1002 return 0; 963 return 0;
@@ -1020,8 +981,8 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai,
1020 u8 iface_areg, iface_breg; 981 u8 iface_areg, iface_breg;
1021 int delay = 0; 982 int delay = 0;
1022 983
1023 iface_areg = aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLA) & 0x3f; 984 iface_areg = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLA) & 0x3f;
1024 iface_breg = aic3x_read_reg_cache(codec, AIC3X_ASD_INTF_CTRLB) & 0x3f; 985 iface_breg = snd_soc_read(codec, AIC3X_ASD_INTF_CTRLB) & 0x3f;
1025 986
1026 /* set master/slave audio interface */ 987 /* set master/slave audio interface */
1027 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 988 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@@ -1060,9 +1021,9 @@ static int aic3x_set_dai_fmt(struct snd_soc_dai *codec_dai,
1060 } 1021 }
1061 1022
1062 /* set iface */ 1023 /* set iface */
1063 aic3x_write(codec, AIC3X_ASD_INTF_CTRLA, iface_areg); 1024 snd_soc_write(codec, AIC3X_ASD_INTF_CTRLA, iface_areg);
1064 aic3x_write(codec, AIC3X_ASD_INTF_CTRLB, iface_breg); 1025 snd_soc_write(codec, AIC3X_ASD_INTF_CTRLB, iface_breg);
1065 aic3x_write(codec, AIC3X_ASD_INTF_CTRLC, delay); 1026 snd_soc_write(codec, AIC3X_ASD_INTF_CTRLC, delay);
1066 1027
1067 return 0; 1028 return 0;
1068} 1029}
@@ -1080,18 +1041,18 @@ static int aic3x_set_bias_level(struct snd_soc_codec *codec,
1080 if (codec->bias_level == SND_SOC_BIAS_STANDBY && 1041 if (codec->bias_level == SND_SOC_BIAS_STANDBY &&
1081 aic3x->master) { 1042 aic3x->master) {
1082 /* enable pll */ 1043 /* enable pll */
1083 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); 1044 reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
1084 aic3x_write(codec, AIC3X_PLL_PROGA_REG, 1045 snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
1085 reg | PLL_ENABLE); 1046 reg | PLL_ENABLE);
1086 } 1047 }
1087 break; 1048 break;
1088 case SND_SOC_BIAS_STANDBY: 1049 case SND_SOC_BIAS_STANDBY:
1089 if (codec->bias_level == SND_SOC_BIAS_PREPARE && 1050 if (codec->bias_level == SND_SOC_BIAS_PREPARE &&
1090 aic3x->master) { 1051 aic3x->master) {
1091 /* disable pll */ 1052 /* disable pll */
1092 reg = aic3x_read_reg_cache(codec, AIC3X_PLL_PROGA_REG); 1053 reg = snd_soc_read(codec, AIC3X_PLL_PROGA_REG);
1093 aic3x_write(codec, AIC3X_PLL_PROGA_REG, 1054 snd_soc_write(codec, AIC3X_PLL_PROGA_REG,
1094 reg & ~PLL_ENABLE); 1055 reg & ~PLL_ENABLE);
1095 } 1056 }
1096 break; 1057 break;
1097 case SND_SOC_BIAS_OFF: 1058 case SND_SOC_BIAS_OFF:
@@ -1106,8 +1067,8 @@ void aic3x_set_gpio(struct snd_soc_codec *codec, int gpio, int state)
1106{ 1067{
1107 u8 reg = gpio ? AIC3X_GPIO2_REG : AIC3X_GPIO1_REG; 1068 u8 reg = gpio ? AIC3X_GPIO2_REG : AIC3X_GPIO1_REG;
1108 u8 bit = gpio ? 3: 0; 1069 u8 bit = gpio ? 3: 0;
1109 u8 val = aic3x_read_reg_cache(codec, reg) & ~(1 << bit); 1070 u8 val = snd_soc_read(codec, reg) & ~(1 << bit);
1110 aic3x_write(codec, reg, val | (!!state << bit)); 1071 snd_soc_write(codec, reg, val | (!!state << bit));
1111} 1072}
1112EXPORT_SYMBOL_GPL(aic3x_set_gpio); 1073EXPORT_SYMBOL_GPL(aic3x_set_gpio);
1113 1074
@@ -1136,7 +1097,7 @@ void aic3x_set_headset_detection(struct snd_soc_codec *codec, int detect,
1136 if (detect & AIC3X_HEADSET_DETECT_MASK) 1097 if (detect & AIC3X_HEADSET_DETECT_MASK)
1137 val |= AIC3X_HEADSET_DETECT_ENABLED; 1098 val |= AIC3X_HEADSET_DETECT_ENABLED;
1138 1099
1139 aic3x_write(codec, AIC3X_HEADSET_DETECT_CTRL_A, val); 1100 snd_soc_write(codec, AIC3X_HEADSET_DETECT_CTRL_A, val);
1140} 1101}
1141EXPORT_SYMBOL_GPL(aic3x_set_headset_detection); 1102EXPORT_SYMBOL_GPL(aic3x_set_headset_detection);
1142 1103
@@ -1219,81 +1180,81 @@ static int aic3x_init(struct snd_soc_codec *codec)
1219 struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); 1180 struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
1220 int reg; 1181 int reg;
1221 1182
1222 aic3x_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT); 1183 snd_soc_write(codec, AIC3X_PAGE_SELECT, PAGE0_SELECT);
1223 aic3x_write(codec, AIC3X_RESET, SOFT_RESET); 1184 snd_soc_write(codec, AIC3X_RESET, SOFT_RESET);
1224 1185
1225 /* DAC default volume and mute */ 1186 /* DAC default volume and mute */
1226 aic3x_write(codec, LDAC_VOL, DEFAULT_VOL | MUTE_ON); 1187 snd_soc_write(codec, LDAC_VOL, DEFAULT_VOL | MUTE_ON);
1227 aic3x_write(codec, RDAC_VOL, DEFAULT_VOL | MUTE_ON); 1188 snd_soc_write(codec, RDAC_VOL, DEFAULT_VOL | MUTE_ON);
1228 1189
1229 /* DAC to HP default volume and route to Output mixer */ 1190 /* DAC to HP default volume and route to Output mixer */
1230 aic3x_write(codec, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON); 1191 snd_soc_write(codec, DACL1_2_HPLOUT_VOL, DEFAULT_VOL | ROUTE_ON);
1231 aic3x_write(codec, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON); 1192 snd_soc_write(codec, DACR1_2_HPROUT_VOL, DEFAULT_VOL | ROUTE_ON);
1232 aic3x_write(codec, DACL1_2_HPLCOM_VOL, DEFAULT_VOL | ROUTE_ON); 1193 snd_soc_write(codec, DACL1_2_HPLCOM_VOL, DEFAULT_VOL | ROUTE_ON);
1233 aic3x_write(codec, DACR1_2_HPRCOM_VOL, DEFAULT_VOL | ROUTE_ON); 1194 snd_soc_write(codec, DACR1_2_HPRCOM_VOL, DEFAULT_VOL | ROUTE_ON);
1234 /* DAC to Line Out default volume and route to Output mixer */ 1195 /* DAC to Line Out default volume and route to Output mixer */
1235 aic3x_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON); 1196 snd_soc_write(codec, DACL1_2_LLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
1236 aic3x_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON); 1197 snd_soc_write(codec, DACR1_2_RLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
1237 /* DAC to Mono Line Out default volume and route to Output mixer */ 1198 /* DAC to Mono Line Out default volume and route to Output mixer */
1238 aic3x_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); 1199 snd_soc_write(codec, DACL1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
1239 aic3x_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON); 1200 snd_soc_write(codec, DACR1_2_MONOLOPM_VOL, DEFAULT_VOL | ROUTE_ON);
1240 1201
1241 /* unmute all outputs */ 1202 /* unmute all outputs */
1242 reg = aic3x_read_reg_cache(codec, LLOPM_CTRL); 1203 reg = snd_soc_read(codec, LLOPM_CTRL);
1243 aic3x_write(codec, LLOPM_CTRL, reg | UNMUTE); 1204 snd_soc_write(codec, LLOPM_CTRL, reg | UNMUTE);
1244 reg = aic3x_read_reg_cache(codec, RLOPM_CTRL); 1205 reg = snd_soc_read(codec, RLOPM_CTRL);
1245 aic3x_write(codec, RLOPM_CTRL, reg | UNMUTE); 1206 snd_soc_write(codec, RLOPM_CTRL, reg | UNMUTE);
1246 reg = aic3x_read_reg_cache(codec, MONOLOPM_CTRL); 1207 reg = snd_soc_read(codec, MONOLOPM_CTRL);
1247 aic3x_write(codec, MONOLOPM_CTRL, reg | UNMUTE); 1208 snd_soc_write(codec, MONOLOPM_CTRL, reg | UNMUTE);
1248 reg = aic3x_read_reg_cache(codec, HPLOUT_CTRL); 1209 reg = snd_soc_read(codec, HPLOUT_CTRL);
1249 aic3x_write(codec, HPLOUT_CTRL, reg | UNMUTE); 1210 snd_soc_write(codec, HPLOUT_CTRL, reg | UNMUTE);
1250 reg = aic3x_read_reg_cache(codec, HPROUT_CTRL); 1211 reg = snd_soc_read(codec, HPROUT_CTRL);
1251 aic3x_write(codec, HPROUT_CTRL, reg | UNMUTE); 1212 snd_soc_write(codec, HPROUT_CTRL, reg | UNMUTE);
1252 reg = aic3x_read_reg_cache(codec, HPLCOM_CTRL); 1213 reg = snd_soc_read(codec, HPLCOM_CTRL);
1253 aic3x_write(codec, HPLCOM_CTRL, reg | UNMUTE); 1214 snd_soc_write(codec, HPLCOM_CTRL, reg | UNMUTE);
1254 reg = aic3x_read_reg_cache(codec, HPRCOM_CTRL); 1215 reg = snd_soc_read(codec, HPRCOM_CTRL);
1255 aic3x_write(codec, HPRCOM_CTRL, reg | UNMUTE); 1216 snd_soc_write(codec, HPRCOM_CTRL, reg | UNMUTE);
1256 1217
1257 /* ADC default volume and unmute */ 1218 /* ADC default volume and unmute */
1258 aic3x_write(codec, LADC_VOL, DEFAULT_GAIN); 1219 snd_soc_write(codec, LADC_VOL, DEFAULT_GAIN);
1259 aic3x_write(codec, RADC_VOL, DEFAULT_GAIN); 1220 snd_soc_write(codec, RADC_VOL, DEFAULT_GAIN);
1260 /* By default route Line1 to ADC PGA mixer */ 1221 /* By default route Line1 to ADC PGA mixer */
1261 aic3x_write(codec, LINE1L_2_LADC_CTRL, 0x0); 1222 snd_soc_write(codec, LINE1L_2_LADC_CTRL, 0x0);
1262 aic3x_write(codec, LINE1R_2_RADC_CTRL, 0x0); 1223 snd_soc_write(codec, LINE1R_2_RADC_CTRL, 0x0);
1263 1224
1264 /* PGA to HP Bypass default volume, disconnect from Output Mixer */ 1225 /* PGA to HP Bypass default volume, disconnect from Output Mixer */
1265 aic3x_write(codec, PGAL_2_HPLOUT_VOL, DEFAULT_VOL); 1226 snd_soc_write(codec, PGAL_2_HPLOUT_VOL, DEFAULT_VOL);
1266 aic3x_write(codec, PGAR_2_HPROUT_VOL, DEFAULT_VOL); 1227 snd_soc_write(codec, PGAR_2_HPROUT_VOL, DEFAULT_VOL);
1267 aic3x_write(codec, PGAL_2_HPLCOM_VOL, DEFAULT_VOL); 1228 snd_soc_write(codec, PGAL_2_HPLCOM_VOL, DEFAULT_VOL);
1268 aic3x_write(codec, PGAR_2_HPRCOM_VOL, DEFAULT_VOL); 1229 snd_soc_write(codec, PGAR_2_HPRCOM_VOL, DEFAULT_VOL);
1269 /* PGA to Line Out default volume, disconnect from Output Mixer */ 1230 /* PGA to Line Out default volume, disconnect from Output Mixer */
1270 aic3x_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL); 1231 snd_soc_write(codec, PGAL_2_LLOPM_VOL, DEFAULT_VOL);
1271 aic3x_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL); 1232 snd_soc_write(codec, PGAR_2_RLOPM_VOL, DEFAULT_VOL);
1272 /* PGA to Mono Line Out default volume, disconnect from Output Mixer */ 1233 /* PGA to Mono Line Out default volume, disconnect from Output Mixer */
1273 aic3x_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL); 1234 snd_soc_write(codec, PGAL_2_MONOLOPM_VOL, DEFAULT_VOL);
1274 aic3x_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL); 1235 snd_soc_write(codec, PGAR_2_MONOLOPM_VOL, DEFAULT_VOL);
1275 1236
1276 /* Line2 to HP Bypass default volume, disconnect from Output Mixer */ 1237 /* Line2 to HP Bypass default volume, disconnect from Output Mixer */
1277 aic3x_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL); 1238 snd_soc_write(codec, LINE2L_2_HPLOUT_VOL, DEFAULT_VOL);
1278 aic3x_write(codec, LINE2R_2_HPROUT_VOL, DEFAULT_VOL); 1239 snd_soc_write(codec, LINE2R_2_HPROUT_VOL, DEFAULT_VOL);
1279 aic3x_write(codec, LINE2L_2_HPLCOM_VOL, DEFAULT_VOL); 1240 snd_soc_write(codec, LINE2L_2_HPLCOM_VOL, DEFAULT_VOL);
1280 aic3x_write(codec, LINE2R_2_HPRCOM_VOL, DEFAULT_VOL); 1241 snd_soc_write(codec, LINE2R_2_HPRCOM_VOL, DEFAULT_VOL);
1281 /* Line2 Line Out default volume, disconnect from Output Mixer */ 1242 /* Line2 Line Out default volume, disconnect from Output Mixer */
1282 aic3x_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL); 1243 snd_soc_write(codec, LINE2L_2_LLOPM_VOL, DEFAULT_VOL);
1283 aic3x_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL); 1244 snd_soc_write(codec, LINE2R_2_RLOPM_VOL, DEFAULT_VOL);
1284 /* Line2 to Mono Out default volume, disconnect from Output Mixer */ 1245 /* Line2 to Mono Out default volume, disconnect from Output Mixer */
1285 aic3x_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL); 1246 snd_soc_write(codec, LINE2L_2_MONOLOPM_VOL, DEFAULT_VOL);
1286 aic3x_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL); 1247 snd_soc_write(codec, LINE2R_2_MONOLOPM_VOL, DEFAULT_VOL);
1287 1248
1288 if (aic3x->model == AIC3X_MODEL_3007) { 1249 if (aic3x->model == AIC3X_MODEL_3007) {
1289 /* Class-D speaker driver init; datasheet p. 46 */ 1250 /* Class-D speaker driver init; datasheet p. 46 */
1290 aic3x_write(codec, AIC3X_PAGE_SELECT, 0x0D); 1251 snd_soc_write(codec, AIC3X_PAGE_SELECT, 0x0D);
1291 aic3x_write(codec, 0xD, 0x0D); 1252 snd_soc_write(codec, 0xD, 0x0D);
1292 aic3x_write(codec, 0x8, 0x5C); 1253 snd_soc_write(codec, 0x8, 0x5C);
1293 aic3x_write(codec, 0x8, 0x5D); 1254 snd_soc_write(codec, 0x8, 0x5D);
1294 aic3x_write(codec, 0x8, 0x5C); 1255 snd_soc_write(codec, 0x8, 0x5C);
1295 aic3x_write(codec, AIC3X_PAGE_SELECT, 0x00); 1256 snd_soc_write(codec, AIC3X_PAGE_SELECT, 0x00);
1296 aic3x_write(codec, CLASSD_CTRL, 0); 1257 snd_soc_write(codec, CLASSD_CTRL, 0);
1297 } 1258 }
1298 1259
1299 /* off, with power on */ 1260 /* off, with power on */
@@ -1305,18 +1266,24 @@ static int aic3x_init(struct snd_soc_codec *codec)
1305static int aic3x_probe(struct snd_soc_codec *codec) 1266static int aic3x_probe(struct snd_soc_codec *codec)
1306{ 1267{
1307 struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec); 1268 struct aic3x_priv *aic3x = snd_soc_codec_get_drvdata(codec);
1269 int ret;
1308 1270
1309 codec->hw_write = (hw_write_t) i2c_master_send;
1310 codec->control_data = aic3x->control_data; 1271 codec->control_data = aic3x->control_data;
1311 1272
1273 ret = snd_soc_codec_set_cache_io(codec, 8, 8, aic3x->control_type);
1274 if (ret != 0) {
1275 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1276 return ret;
1277 }
1278
1312 aic3x_init(codec); 1279 aic3x_init(codec);
1313 1280
1314 if (aic3x->setup) { 1281 if (aic3x->setup) {
1315 /* setup GPIO functions */ 1282 /* setup GPIO functions */
1316 aic3x_write(codec, AIC3X_GPIO1_REG, 1283 snd_soc_write(codec, AIC3X_GPIO1_REG,
1317 (aic3x->setup->gpio_func[0] & 0xf) << 4); 1284 (aic3x->setup->gpio_func[0] & 0xf) << 4);
1318 aic3x_write(codec, AIC3X_GPIO2_REG, 1285 snd_soc_write(codec, AIC3X_GPIO2_REG,
1319 (aic3x->setup->gpio_func[1] & 0xf) << 4); 1286 (aic3x->setup->gpio_func[1] & 0xf) << 4);
1320 } 1287 }
1321 1288
1322 snd_soc_add_controls(codec, aic3x_snd_controls, 1289 snd_soc_add_controls(codec, aic3x_snd_controls,
@@ -1336,8 +1303,6 @@ static int aic3x_remove(struct snd_soc_codec *codec)
1336} 1303}
1337 1304
1338static struct snd_soc_codec_driver soc_codec_dev_aic3x = { 1305static struct snd_soc_codec_driver soc_codec_dev_aic3x = {
1339 .read = aic3x_read_reg_cache,
1340 .write = aic3x_write,
1341 .set_bias_level = aic3x_set_bias_level, 1306 .set_bias_level = aic3x_set_bias_level,
1342 .reg_cache_size = ARRAY_SIZE(aic3x_reg), 1307 .reg_cache_size = ARRAY_SIZE(aic3x_reg),
1343 .reg_word_size = sizeof(u8), 1308 .reg_word_size = sizeof(u8),
@@ -1381,6 +1346,8 @@ static int aic3x_i2c_probe(struct i2c_client *i2c,
1381 } 1346 }
1382 1347
1383 aic3x->control_data = i2c; 1348 aic3x->control_data = i2c;
1349 aic3x->control_type = SND_SOC_I2C;
1350
1384 i2c_set_clientdata(i2c, aic3x); 1351 i2c_set_clientdata(i2c, aic3x);
1385 if (pdata) { 1352 if (pdata) {
1386 aic3x->gpio_reset = pdata->gpio_reset; 1353 aic3x->gpio_reset = pdata->gpio_reset;
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-10 09:25:21 -0500