diff options
author | Bard Liao <bardliao@realtek.com> | 2014-11-04 00:15:10 -0500 |
---|---|---|
committer | Mark Brown <broonie@kernel.org> | 2014-11-04 06:37:35 -0500 |
commit | 0b2e4959ceacb26eb586698d9ceecc0a6bd30f72 (patch) | |
tree | 8ec24952894895a7a8556a91fd0c65d2bc1bba2d /sound/soc/codecs/rt5645.c | |
parent | cd6e82b814ca73c474b1a2fa48a54b251da44655 (diff) |
ASoC: rt5645: make bias level more reasonale
This patah separate bias level off to standby and off. The standby
level will provide the necessary power for JD and push button
functions.
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/rt5645.c')
-rw-r--r-- | sound/soc/codecs/rt5645.c | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c index 57ba74292259..1423cb283f15 100644 --- a/sound/soc/codecs/rt5645.c +++ b/sound/soc/codecs/rt5645.c | |||
@@ -2069,8 +2069,8 @@ static int rt5645_set_bias_level(struct snd_soc_codec *codec, | |||
2069 | enum snd_soc_bias_level level) | 2069 | enum snd_soc_bias_level level) |
2070 | { | 2070 | { |
2071 | switch (level) { | 2071 | switch (level) { |
2072 | case SND_SOC_BIAS_STANDBY: | 2072 | case SND_SOC_BIAS_PREPARE: |
2073 | if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) { | 2073 | if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) { |
2074 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | 2074 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, |
2075 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | 2075 | RT5645_PWR_VREF1 | RT5645_PWR_MB | |
2076 | RT5645_PWR_BG | RT5645_PWR_VREF2, | 2076 | RT5645_PWR_BG | RT5645_PWR_VREF2, |
@@ -2085,15 +2085,24 @@ static int rt5645_set_bias_level(struct snd_soc_codec *codec, | |||
2085 | } | 2085 | } |
2086 | break; | 2086 | break; |
2087 | 2087 | ||
2088 | case SND_SOC_BIAS_STANDBY: | ||
2089 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | ||
2090 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | ||
2091 | RT5645_PWR_BG | RT5645_PWR_VREF2, | ||
2092 | RT5645_PWR_VREF1 | RT5645_PWR_MB | | ||
2093 | RT5645_PWR_BG | RT5645_PWR_VREF2); | ||
2094 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, | ||
2095 | RT5645_PWR_FV1 | RT5645_PWR_FV2, | ||
2096 | RT5645_PWR_FV1 | RT5645_PWR_FV2); | ||
2097 | break; | ||
2098 | |||
2088 | case SND_SOC_BIAS_OFF: | 2099 | case SND_SOC_BIAS_OFF: |
2089 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100); | 2100 | snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100); |
2090 | snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128); | 2101 | snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128); |
2091 | snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000); | 2102 | snd_soc_update_bits(codec, RT5645_PWR_ANLG1, |
2092 | snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000); | 2103 | RT5645_PWR_VREF1 | RT5645_PWR_MB | |
2093 | snd_soc_write(codec, RT5645_PWR_VOL, 0x0000); | 2104 | RT5645_PWR_BG | RT5645_PWR_VREF2 | |
2094 | snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000); | 2105 | RT5645_PWR_FV1 | RT5645_PWR_FV2, 0x0); |
2095 | snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000); | ||
2096 | snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000); | ||
2097 | break; | 2106 | break; |
2098 | 2107 | ||
2099 | default: | 2108 | default: |