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authorBrian Austin <brian.austin@cirrus.com>2013-10-17 12:03:34 -0400
committerMark Brown <broonie@linaro.org>2013-10-17 19:37:29 -0400
commitf9ca060680e7c26a88d990ad9370572274b0d54b (patch)
tree6ed33bd02e7f60e259645ed2facdeb460ff0569e /sound/soc/codecs/cs42l73.h
parent3d8c8bc0250f7cb11f887691b7473b51adcd2bcb (diff)
ASoC: cs42l73: Namespace defines for cs42l73 codec
Cleanup to namespace the defines for the cs42l73 driver Signed-off-by: Brian Austin <brian.austin@cirrus.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/codecs/cs42l73.h')
-rw-r--r--sound/soc/codecs/cs42l73.h104
1 files changed, 51 insertions, 53 deletions
diff --git a/sound/soc/codecs/cs42l73.h b/sound/soc/codecs/cs42l73.h
index 4f83d39496a8..45746186a678 100644
--- a/sound/soc/codecs/cs42l73.h
+++ b/sound/soc/codecs/cs42l73.h
@@ -128,60 +128,60 @@
128/* Bitfield Definitions */ 128/* Bitfield Definitions */
129 129
130/* CS42L73_PWRCTL1 */ 130/* CS42L73_PWRCTL1 */
131#define PDN_ADCB (1 << 7) 131#define CS42L73_PDN_ADCB (1 << 7)
132#define PDN_DMICB (1 << 6) 132#define CS42L73_PDN_DMICB (1 << 6)
133#define PDN_ADCA (1 << 5) 133#define CS42L73_PDN_ADCA (1 << 5)
134#define PDN_DMICA (1 << 4) 134#define CS42L73_PDN_DMICA (1 << 4)
135#define PDN_LDO (1 << 2) 135#define CS42L73_PDN_LDO (1 << 2)
136#define DISCHG_FILT (1 << 1) 136#define CS42L73_DISCHG_FILT (1 << 1)
137#define PDN (1 << 0) 137#define CS42L73_PDN (1 << 0)
138 138
139/* CS42L73_PWRCTL2 */ 139/* CS42L73_PWRCTL2 */
140#define PDN_MIC2_BIAS (1 << 7) 140#define CS42L73_PDN_MIC2_BIAS (1 << 7)
141#define PDN_MIC1_BIAS (1 << 6) 141#define CS42L73_PDN_MIC1_BIAS (1 << 6)
142#define PDN_VSP (1 << 4) 142#define CS42L73_PDN_VSP (1 << 4)
143#define PDN_ASP_SDOUT (1 << 3) 143#define CS42L73_PDN_ASP_SDOUT (1 << 3)
144#define PDN_ASP_SDIN (1 << 2) 144#define CS42L73_PDN_ASP_SDIN (1 << 2)
145#define PDN_XSP_SDOUT (1 << 1) 145#define CS42L73_PDN_XSP_SDOUT (1 << 1)
146#define PDN_XSP_SDIN (1 << 0) 146#define CS42L73_PDN_XSP_SDIN (1 << 0)
147 147
148/* CS42L73_PWRCTL3 */ 148/* CS42L73_PWRCTL3 */
149#define PDN_THMS (1 << 5) 149#define CS42L73_PDN_THMS (1 << 5)
150#define PDN_SPKLO (1 << 4) 150#define CS42L73_PDN_SPKLO (1 << 4)
151#define PDN_EAR (1 << 3) 151#define CS42L73_PDN_EAR (1 << 3)
152#define PDN_SPK (1 << 2) 152#define CS42L73_PDN_SPK (1 << 2)
153#define PDN_LO (1 << 1) 153#define CS42L73_PDN_LO (1 << 1)
154#define PDN_HP (1 << 0) 154#define CS42L73_PDN_HP (1 << 0)
155 155
156/* Thermal Overload Detect. Requires interrupt ... */ 156/* Thermal Overload Detect. Requires interrupt ... */
157#define THMOVLD_150C 0 157#define CS42L73_THMOVLD_150C 0
158#define THMOVLD_132C 1 158#define CS42L73_THMOVLD_132C 1
159#define THMOVLD_115C 2 159#define CS42L73_THMOVLD_115C 2
160#define THMOVLD_098C 3 160#define CS42L73_THMOVLD_098C 3
161 161
162#define CS42L73_CHARGEPUMP_MASK (0xF0) 162#define CS42L73_CHARGEPUMP_MASK (0xF0)
163 163
164/* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */ 164/* CS42L73_ASPC, CS42L73_XSPC, CS42L73_VSPC */
165#define SP_3ST (1 << 7) 165#define CS42L73_SP_3ST (1 << 7)
166#define SPDIF_I2S (0 << 6) 166#define CS42L73_SPDIF_I2S (0 << 6)
167#define SPDIF_PCM (1 << 6) 167#define CS42L73_SPDIF_PCM (1 << 6)
168#define PCM_MODE0 (0 << 4) 168#define CS42L73_PCM_MODE0 (0 << 4)
169#define PCM_MODE1 (1 << 4) 169#define CS42L73_PCM_MODE1 (1 << 4)
170#define PCM_MODE2 (2 << 4) 170#define CS42L73_PCM_MODE2 (2 << 4)
171#define PCM_MODE_MASK (3 << 4) 171#define CS42L73_PCM_MODE_MASK (3 << 4)
172#define PCM_BIT_ORDER (1 << 3) 172#define CS42L73_PCM_BIT_ORDER (1 << 3)
173#define MCK_SCLK_64FS (0 << 0) 173#define CS42L73_MCK_SCLK_64FS (0 << 0)
174#define MCK_SCLK_MCLK (2 << 0) 174#define CS42L73_MCK_SCLK_MCLK (2 << 0)
175#define MCK_SCLK_PREMCLK (3 << 0) 175#define CS42L73_MCK_SCLK_PREMCLK (3 << 0)
176 176
177/* CS42L73_xSPMMCC */ 177/* CS42L73_xSPMMCC */
178#define MS_MASTER (1 << 7) 178#define CS42L73_MS_MASTER (1 << 7)
179 179
180 180
181/* CS42L73_DMMCC */ 181/* CS42L73_DMMCC */
182#define MCLKDIS (1 << 0) 182#define CS42L73_MCLKDIS (1 << 0)
183#define MCLKSEL_MCLK2 (1 << 4) 183#define CS42L73_MCLKSEL_MCLK2 (1 << 4)
184#define MCLKSEL_MCLK1 (0 << 4) 184#define CS42L73_MCLKSEL_MCLK1 (0 << 4)
185 185
186/* CS42L73 MCLK derived from MCLK1 or MCLK2 */ 186/* CS42L73 MCLK derived from MCLK1 or MCLK2 */
187#define CS42L73_CLKID_MCLK1 0 187#define CS42L73_CLKID_MCLK1 0
@@ -195,28 +195,26 @@
195#define CS42L73_VSP 2 195#define CS42L73_VSP 2
196 196
197/* IS1, IM1 */ 197/* IS1, IM1 */
198#define MIC2_SDET (1 << 6) 198#define CS42L73_MIC2_SDET (1 << 6)
199#define THMOVLD (1 << 4) 199#define CS42L73_THMOVLD (1 << 4)
200#define DIGMIXOVFL (1 << 3) 200#define CS42L73_DIGMIXOVFL (1 << 3)
201#define IPBOVFL (1 << 1) 201#define CS42L73_IPBOVFL (1 << 1)
202#define IPAOVFL (1 << 0) 202#define CS42L73_IPAOVFL (1 << 0)
203 203
204/* Analog Softramp */ 204/* Analog Softramp */
205#define ANLGOSFT (1 << 0) 205#define CS42L73_ANLGOSFT (1 << 0)
206 206
207/* HP A/B Analog Mute */ 207/* HP A/B Analog Mute */
208#define HPA_MUTE (1 << 7) 208#define CS42L73_HPA_MUTE (1 << 7)
209/* LO A/B Analog Mute */ 209/* LO A/B Analog Mute */
210#define LOA_MUTE (1 << 7) 210#define CS42L73_LOA_MUTE (1 << 7)
211/* Digital Mute */ 211/* Digital Mute */
212#define HLAD_MUTE (1 << 0) 212#define CS42L73_HLAD_MUTE (1 << 0)
213#define HLBD_MUTE (1 << 1) 213#define CS42L73_HLBD_MUTE (1 << 1)
214#define SPKD_MUTE (1 << 2) 214#define CS42L73_SPKD_MUTE (1 << 2)
215#define ESLD_MUTE (1 << 3) 215#define CS42L73_ESLD_MUTE (1 << 3)
216 216
217/* Misc defines for codec */ 217/* Misc defines for codec */
218#define CS42L73_RESET_GPIO 143
219
220#define CS42L73_DEVID 0x00042A73 218#define CS42L73_DEVID 0x00042A73
221#define CS42L73_MCLKX_MIN 5644800 219#define CS42L73_MCLKX_MIN 5644800
222#define CS42L73_MCLKX_MAX 38400000 220#define CS42L73_MCLKX_MAX 38400000