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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2010-10-15 01:23:18 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2010-10-15 06:54:51 -0400
commita34712391a66260e442a9ab1eb7edb22a2d0ca3c (patch)
treecda8ad5d806d0bfee805542459482227c7794621 /sound/soc/codecs/ak4642.c
parentc14c05c19f2a2ab87b8ebabd245f53945a97695b (diff)
ASoC: ak4642: make sure name of register/value
This patch replace magic code with defined name, and remove unnecessary settings which set default value Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Diffstat (limited to 'sound/soc/codecs/ak4642.c')
-rw-r--r--sound/soc/codecs/ak4642.c64
1 files changed, 46 insertions, 18 deletions
diff --git a/sound/soc/codecs/ak4642.c b/sound/soc/codecs/ak4642.c
index 009068f57375..90c90b7f4a2e 100644
--- a/sound/soc/codecs/ak4642.c
+++ b/sound/soc/codecs/ak4642.c
@@ -72,6 +72,12 @@
72 72
73#define AK4642_CACHEREGNUM 0x25 73#define AK4642_CACHEREGNUM 0x25
74 74
75/* PW_MGMT1*/
76#define PMVCM (1 << 6) /* VCOM Power Management */
77#define PMMIN (1 << 5) /* MIN Input Power Management */
78#define PMDAC (1 << 2) /* DAC Power Management */
79#define PMADL (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
80
75/* PW_MGMT2 */ 81/* PW_MGMT2 */
76#define HPMTN (1 << 6) 82#define HPMTN (1 << 6)
77#define PMHPL (1 << 5) 83#define PMHPL (1 << 5)
@@ -83,6 +89,23 @@
83#define PMHP_MASK (PMHPL | PMHPR) 89#define PMHP_MASK (PMHPL | PMHPR)
84#define PMHP PMHP_MASK 90#define PMHP PMHP_MASK
85 91
92/* PW_MGMT3 */
93#define PMADR (1 << 0) /* MIC L / ADC R Power Management */
94
95/* SG_SL1 */
96#define MINS (1 << 6) /* Switch from MIN to Speaker */
97#define DACL (1 << 4) /* Switch from DAC to Stereo or Receiver */
98#define PMMP (1 << 2) /* MPWR pin Power Management */
99#define MGAIN0 (1 << 0) /* MIC amp gain*/
100
101/* TIMER */
102#define ZTM(param) ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
103#define WTM(param) (((param & 0x4) << 4) | ((param & 0x3) << 2))
104
105/* ALC_CTL1 */
106#define ALC (1 << 5) /* ALC Enable */
107#define LMTH0 (1 << 0) /* ALC Limiter / Recovery Level */
108
86/* MD_CTL1 */ 109/* MD_CTL1 */
87#define PLL3 (1 << 7) 110#define PLL3 (1 << 7)
88#define PLL2 (1 << 6) 111#define PLL2 (1 << 6)
@@ -100,6 +123,11 @@
100#define FS3 (1 << 5) 123#define FS3 (1 << 5)
101#define FS_MASK (FS0 | FS1 | FS2 | FS3) 124#define FS_MASK (FS0 | FS1 | FS2 | FS3)
102 125
126/* MD_CTL3 */
127#define BST1 (1 << 3)
128
129/* MD_CTL4 */
130#define DACH (1 << 0)
103 131
104/* 132/*
105 * Playback Volume (table 39) 133 * Playback Volume (table 39)
@@ -216,11 +244,12 @@ static int ak4642_dai_startup(struct snd_pcm_substream *substream,
216 * This operation came from example code of 244 * This operation came from example code of
217 * "ASAHI KASEI AK4642" (japanese) manual p97. 245 * "ASAHI KASEI AK4642" (japanese) manual p97.
218 */ 246 */
219 ak4642_write(codec, 0x0f, 0x09); 247 snd_soc_update_bits(codec, MD_CTL4, DACH, DACH);
220 ak4642_write(codec, 0x0e, 0x19); 248 snd_soc_update_bits(codec, MD_CTL3, BST1, BST1);
221 ak4642_write(codec, 0x09, 0x91); 249 ak4642_write(codec, L_IVC, 0x91); /* volume */
222 ak4642_write(codec, 0x0c, 0x91); 250 ak4642_write(codec, R_IVC, 0x91); /* volume */
223 snd_soc_update_bits(codec, 0x00, 0x64, 0x64); 251 snd_soc_update_bits(codec, PW_MGMT1, PMVCM | PMMIN | PMDAC,
252 PMVCM | PMMIN | PMDAC);
224 snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, PMHP); 253 snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, PMHP);
225 snd_soc_update_bits(codec, PW_MGMT2, HPMTN, HPMTN); 254 snd_soc_update_bits(codec, PW_MGMT2, HPMTN, HPMTN);
226 } else { 255 } else {
@@ -237,13 +266,12 @@ static int ak4642_dai_startup(struct snd_pcm_substream *substream,
237 * This operation came from example code of 266 * This operation came from example code of
238 * "ASAHI KASEI AK4642" (japanese) manual p94. 267 * "ASAHI KASEI AK4642" (japanese) manual p94.
239 */ 268 */
240 ak4642_write(codec, 0x02, 0x05); 269 ak4642_write(codec, SG_SL1, PMMP | MGAIN0);
241 ak4642_write(codec, 0x06, 0x3c); 270 ak4642_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
242 ak4642_write(codec, 0x08, 0xe1); 271 ak4642_write(codec, ALC_CTL1, ALC | LMTH0);
243 ak4642_write(codec, 0x0b, 0x00); 272 snd_soc_update_bits(codec, PW_MGMT1, PMVCM | PMADL,
244 ak4642_write(codec, 0x07, 0x21); 273 PMVCM | PMADL);
245 snd_soc_update_bits(codec, 0x00, 0x41, 0x41); 274 snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
246 ak4642_write(codec, 0x10, 0x01);
247 } 275 }
248 276
249 return 0; 277 return 0;
@@ -259,14 +287,14 @@ static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
259 /* stop headphone output */ 287 /* stop headphone output */
260 snd_soc_update_bits(codec, PW_MGMT2, HPMTN, 0); 288 snd_soc_update_bits(codec, PW_MGMT2, HPMTN, 0);
261 snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, 0); 289 snd_soc_update_bits(codec, PW_MGMT2, PMHP_MASK, 0);
262 snd_soc_update_bits(codec, 0x00, 0x64, 0x40); 290 snd_soc_update_bits(codec, PW_MGMT1, PMMIN | PMDAC, 0);
263 ak4642_write(codec, 0x0e, 0x11); 291 snd_soc_update_bits(codec, MD_CTL3, BST1, 0);
264 ak4642_write(codec, 0x0f, 0x08); 292 snd_soc_update_bits(codec, MD_CTL4, DACH, 0);
265 } else { 293 } else {
266 /* stop stereo input */ 294 /* stop stereo input */
267 snd_soc_update_bits(codec, 0x00, 0x41, 0x40); 295 snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
268 ak4642_write(codec, 0x10, 0x00); 296 snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
269 ak4642_write(codec, 0x07, 0x01); 297 snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
270 } 298 }
271} 299}
272 300