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authorMasakazu Mokuno <mokuno@sm.sony.co.jp>2007-07-03 06:54:49 -0400
committerJaroslav Kysela <perex@suse.cz>2007-07-20 05:11:40 -0400
commitc454fd4e888dc2b1423b6a65106a619e99a2deb4 (patch)
tree23b7b38c0990de70e3d029eef14d30243f7afaa5 /sound/ppc
parent87823090a8bd373f34bdb6f1d5cdc5f2f4da4905 (diff)
[ALSA] Add PS3 sound driver
The patch adds the support for the sound feature of PS3 - the digital output of HDMI and SPDIF optical, and the analog output of AV multi. Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp> Signed-off-by: Takashi Iwai <tiwai@suse.de> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
Diffstat (limited to 'sound/ppc')
-rw-r--r--sound/ppc/Kconfig20
-rw-r--r--sound/ppc/Makefile3
-rw-r--r--sound/ppc/snd_ps3.c1125
-rw-r--r--sound/ppc/snd_ps3.h135
-rw-r--r--sound/ppc/snd_ps3_reg.h891
5 files changed, 2173 insertions, 1 deletions
diff --git a/sound/ppc/Kconfig b/sound/ppc/Kconfig
index a3fb1496e4dc..cacb0b136883 100644
--- a/sound/ppc/Kconfig
+++ b/sound/ppc/Kconfig
@@ -33,3 +33,23 @@ config SND_POWERMAC_AUTO_DRC
33 option. 33 option.
34 34
35endmenu 35endmenu
36
37menu "ALSA PowerPC devices"
38 depends on SND!=n && ( PPC64 || PPC32 )
39
40config SND_PS3
41 tristate "PS3 Audio support"
42 depends on SND && PS3_PS3AV
43 select SND_PCM
44 default m
45 help
46 Say Y here to include support for audio on the PS3
47
48 To compile this driver as a module, choose M here: the module
49 will be called snd_ps3.
50
51config SND_PS3_DEFAULT_START_DELAY
52 int "Startup delay time in ms"
53 depends on SND_PS3
54 default "2000"
55endmenu
diff --git a/sound/ppc/Makefile b/sound/ppc/Makefile
index 4d95c652c8ca..eacee2d0675c 100644
--- a/sound/ppc/Makefile
+++ b/sound/ppc/Makefile
@@ -6,4 +6,5 @@
6snd-powermac-objs := powermac.o pmac.o awacs.o burgundy.o daca.o tumbler.o keywest.o beep.o 6snd-powermac-objs := powermac.o pmac.o awacs.o burgundy.o daca.o tumbler.o keywest.o beep.o
7 7
8# Toplevel Module Dependency 8# Toplevel Module Dependency
9obj-$(CONFIG_SND_POWERMAC) += snd-powermac.o 9obj-$(CONFIG_SND_POWERMAC) += snd-powermac.o
10obj-$(CONFIG_SND_PS3) += snd_ps3.o
diff --git a/sound/ppc/snd_ps3.c b/sound/ppc/snd_ps3.c
new file mode 100644
index 000000000000..1aa0b467599f
--- /dev/null
+++ b/sound/ppc/snd_ps3.c
@@ -0,0 +1,1125 @@
1/*
2 * Audio support for PS3
3 * Copyright (C) 2007 Sony Computer Entertainment Inc.
4 * All rights reserved.
5 * Copyright 2006, 2007 Sony Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the Licence.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#include <linux/init.h>
22#include <linux/slab.h>
23#include <linux/io.h>
24#include <linux/interrupt.h>
25#include <sound/driver.h>
26#include <sound/core.h>
27#include <sound/initval.h>
28#include <sound/pcm.h>
29#include <sound/asound.h>
30#include <sound/memalloc.h>
31#include <sound/pcm_params.h>
32#include <sound/control.h>
33#include <linux/dmapool.h>
34#include <linux/dma-mapping.h>
35#include <asm/firmware.h>
36#include <linux/io.h>
37#include <asm/dma.h>
38#include <asm/lv1call.h>
39#include <asm/ps3.h>
40#include <asm/ps3av.h>
41
42#include "snd_ps3_reg.h"
43#include "snd_ps3.h"
44
45MODULE_LICENSE("GPL v2");
46MODULE_DESCRIPTION("PS3 sound driver");
47MODULE_AUTHOR("Sony Computer Entertainment Inc.");
48
49/* module entries */
50static int __init snd_ps3_init(void);
51static void __exit snd_ps3_exit(void);
52
53/* ALSA snd driver ops */
54static int snd_ps3_pcm_open(struct snd_pcm_substream *substream);
55static int snd_ps3_pcm_close(struct snd_pcm_substream *substream);
56static int snd_ps3_pcm_prepare(struct snd_pcm_substream *substream);
57static int snd_ps3_pcm_trigger(struct snd_pcm_substream *substream,
58 int cmd);
59static snd_pcm_uframes_t snd_ps3_pcm_pointer(struct snd_pcm_substream
60 *substream);
61static int snd_ps3_pcm_hw_params(struct snd_pcm_substream *substream,
62 struct snd_pcm_hw_params *hw_params);
63static int snd_ps3_pcm_hw_free(struct snd_pcm_substream *substream);
64
65
66/* ps3_system_bus_driver entries */
67static int __init snd_ps3_driver_probe(struct ps3_system_bus_device *dev);
68static int snd_ps3_driver_remove(struct ps3_system_bus_device *dev);
69
70/* address setup */
71static int snd_ps3_map_mmio(void);
72static void snd_ps3_unmap_mmio(void);
73static int snd_ps3_allocate_irq(void);
74static void snd_ps3_free_irq(void);
75static void snd_ps3_audio_set_base_addr(uint64_t ioaddr_start);
76
77/* interrupt handler */
78static irqreturn_t snd_ps3_interrupt(int irq, void *dev_id);
79
80
81/* set sampling rate/format */
82static int snd_ps3_set_avsetting(struct snd_pcm_substream *substream);
83/* take effect parameter change */
84static int snd_ps3_change_avsetting(struct snd_ps3_card_info *card);
85/* initialize avsetting and take it effect */
86static int snd_ps3_init_avsetting(struct snd_ps3_card_info *card);
87/* setup dma */
88static int snd_ps3_program_dma(struct snd_ps3_card_info *card,
89 enum snd_ps3_dma_filltype filltype);
90static void snd_ps3_wait_for_dma_stop(struct snd_ps3_card_info *card);
91
92static dma_addr_t v_to_bus(struct snd_ps3_card_info *, void *vaddr, int ch);
93
94
95module_init(snd_ps3_init);
96module_exit(snd_ps3_exit);
97
98/*
99 * global
100 */
101static struct snd_ps3_card_info the_card;
102
103static int snd_ps3_start_delay = CONFIG_SND_PS3_DEFAULT_START_DELAY;
104
105module_param_named(start_delay, snd_ps3_start_delay, uint, 0644);
106MODULE_PARM_DESC(start_delay, "time to insert silent data in milisec");
107
108static int index = SNDRV_DEFAULT_IDX1;
109static char *id = SNDRV_DEFAULT_STR1;
110
111module_param(index, int, 0444);
112MODULE_PARM_DESC(index, "Index value for PS3 soundchip.");
113module_param(id, charp, 0444);
114MODULE_PARM_DESC(id, "ID string for PS3 soundchip.");
115
116
117/*
118 * PS3 audio register access
119 */
120static inline u32 read_reg(unsigned int reg)
121{
122 return in_be32(the_card.mapped_mmio_vaddr + reg);
123}
124static inline void write_reg(unsigned int reg, u32 val)
125{
126 out_be32(the_card.mapped_mmio_vaddr + reg, val);
127}
128static inline void update_reg(unsigned int reg, u32 or_val)
129{
130 u32 newval = read_reg(reg) | or_val;
131 write_reg(reg, newval);
132}
133static inline void update_mask_reg(unsigned int reg, u32 mask, u32 or_val)
134{
135 u32 newval = (read_reg(reg) & mask) | or_val;
136 write_reg(reg, newval);
137}
138
139/*
140 * ALSA defs
141 */
142const static struct snd_pcm_hardware snd_ps3_pcm_hw = {
143 .info = (SNDRV_PCM_INFO_MMAP |
144 SNDRV_PCM_INFO_NONINTERLEAVED |
145 SNDRV_PCM_INFO_MMAP_VALID),
146 .formats = (SNDRV_PCM_FMTBIT_S16_BE |
147 SNDRV_PCM_FMTBIT_S24_BE),
148 .rates = (SNDRV_PCM_RATE_44100 |
149 SNDRV_PCM_RATE_48000 |
150 SNDRV_PCM_RATE_88200 |
151 SNDRV_PCM_RATE_96000),
152 .rate_min = 44100,
153 .rate_max = 96000,
154
155 .channels_min = 2, /* stereo only */
156 .channels_max = 2,
157
158 .buffer_bytes_max = PS3_AUDIO_FIFO_SIZE * 64,
159
160 /* interrupt by four stages */
161 .period_bytes_min = PS3_AUDIO_FIFO_STAGE_SIZE * 4,
162 .period_bytes_max = PS3_AUDIO_FIFO_STAGE_SIZE * 4,
163
164 .periods_min = 16,
165 .periods_max = 32, /* buffer_size_max/ period_bytes_max */
166
167 .fifo_size = PS3_AUDIO_FIFO_SIZE
168};
169
170static struct snd_pcm_ops snd_ps3_pcm_spdif_ops =
171{
172 .open = snd_ps3_pcm_open,
173 .close = snd_ps3_pcm_close,
174 .prepare = snd_ps3_pcm_prepare,
175 .ioctl = snd_pcm_lib_ioctl,
176 .trigger = snd_ps3_pcm_trigger,
177 .pointer = snd_ps3_pcm_pointer,
178 .hw_params = snd_ps3_pcm_hw_params,
179 .hw_free = snd_ps3_pcm_hw_free
180};
181
182static int snd_ps3_verify_dma_stop(struct snd_ps3_card_info *card,
183 int count, int force_stop)
184{
185 int dma_ch, done, retries, stop_forced = 0;
186 uint32_t status;
187
188 for (dma_ch = 0; dma_ch < 8; dma_ch ++) {
189 retries = count;
190 do {
191 status = read_reg(PS3_AUDIO_KICK(dma_ch)) &
192 PS3_AUDIO_KICK_STATUS_MASK;
193 switch (status) {
194 case PS3_AUDIO_KICK_STATUS_DONE:
195 case PS3_AUDIO_KICK_STATUS_NOTIFY:
196 case PS3_AUDIO_KICK_STATUS_CLEAR:
197 case PS3_AUDIO_KICK_STATUS_ERROR:
198 done = 1;
199 break;
200 default:
201 done = 0;
202 udelay(10);
203 }
204 } while (!done && --retries);
205 if (!retries && force_stop) {
206 pr_info("%s: DMA ch %d is not stopped.",
207 __func__, dma_ch);
208 /* last resort. force to stop dma.
209 * NOTE: this cause DMA done interrupts
210 */
211 update_reg(PS3_AUDIO_CONFIG, PS3_AUDIO_CONFIG_CLEAR);
212 stop_forced = 1;
213 }
214 }
215 return stop_forced;
216}
217
218/*
219 * wait for all dma is done.
220 * NOTE: caller should reset card->running before call.
221 * If not, the interrupt handler will re-start DMA,
222 * then DMA is never stopped.
223 */
224static void snd_ps3_wait_for_dma_stop(struct snd_ps3_card_info *card)
225{
226 int stop_forced;
227 /*
228 * wait for the last dma is done
229 */
230
231 /*
232 * expected maximum DMA done time is 5.7ms + something (DMA itself).
233 * 5.7ms is from 16bit/sample 2ch 44.1Khz; the time next
234 * DMA kick event would occur.
235 */
236 stop_forced = snd_ps3_verify_dma_stop(card, 700, 1);
237
238 /*
239 * clear outstanding interrupts.
240 */
241 update_reg(PS3_AUDIO_INTR_0, 0);
242 update_reg(PS3_AUDIO_AX_IS, 0);
243
244 /*
245 *revert CLEAR bit since it will not reset automatically after DMA stop
246 */
247 if (stop_forced)
248 update_mask_reg(PS3_AUDIO_CONFIG, ~PS3_AUDIO_CONFIG_CLEAR, 0);
249 /* ensure the hardware sees changes */
250 wmb();
251}
252
253static void snd_ps3_kick_dma(struct snd_ps3_card_info *card)
254{
255
256 update_reg(PS3_AUDIO_KICK(0), PS3_AUDIO_KICK_REQUEST);
257 /* ensure the hardware sees the change */
258 wmb();
259}
260
261/*
262 * convert virtual addr to ioif bus addr.
263 */
264static dma_addr_t v_to_bus(struct snd_ps3_card_info *card,
265 void * paddr,
266 int ch)
267{
268 return card->dma_start_bus_addr[ch] +
269 (paddr - card->dma_start_vaddr[ch]);
270};
271
272
273/*
274 * increment ring buffer pointer.
275 * NOTE: caller must hold write spinlock
276 */
277static void snd_ps3_bump_buffer(struct snd_ps3_card_info *card,
278 enum snd_ps3_ch ch, size_t byte_count,
279 int stage)
280{
281 if (!stage)
282 card->dma_last_transfer_vaddr[ch] =
283 card->dma_next_transfer_vaddr[ch];
284 card->dma_next_transfer_vaddr[ch] += byte_count;
285 if ((card->dma_start_vaddr[ch] + (card->dma_buffer_size / 2)) <=
286 card->dma_next_transfer_vaddr[ch]) {
287 card->dma_next_transfer_vaddr[ch] = card->dma_start_vaddr[ch];
288 }
289}
290/*
291 * setup dmac to send data to audio and attenuate samples on the ring buffer
292 */
293static int snd_ps3_program_dma(struct snd_ps3_card_info *card,
294 enum snd_ps3_dma_filltype filltype)
295{
296 /* this dmac does not support over 4G */
297 uint32_t dma_addr;
298 int fill_stages, dma_ch, stage;
299 enum snd_ps3_ch ch;
300 uint32_t ch0_kick_event = 0; /* initialize to mute gcc */
301 void *start_vaddr;
302 unsigned long irqsave;
303 int silent = 0;
304
305 switch (filltype) {
306 case SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL:
307 silent = 1;
308 /* intentionally fall thru */
309 case SND_PS3_DMA_FILLTYPE_FIRSTFILL:
310 ch0_kick_event = PS3_AUDIO_KICK_EVENT_ALWAYS;
311 break;
312
313 case SND_PS3_DMA_FILLTYPE_SILENT_RUNNING:
314 silent = 1;
315 /* intentionally fall thru */
316 case SND_PS3_DMA_FILLTYPE_RUNNING:
317 ch0_kick_event = PS3_AUDIO_KICK_EVENT_SERIALOUT0_EMPTY;
318 break;
319 }
320
321 snd_ps3_verify_dma_stop(card, 700, 0);
322 fill_stages = 4;
323 spin_lock_irqsave(&card->dma_lock, irqsave);
324 for (ch = 0; ch < 2; ch++) {
325 start_vaddr = card->dma_next_transfer_vaddr[0];
326 for (stage = 0; stage < fill_stages; stage ++) {
327 dma_ch = stage * 2 + ch;
328 if (silent)
329 dma_addr = card->null_buffer_start_dma_addr;
330 else
331 dma_addr =
332 v_to_bus(card,
333 card->dma_next_transfer_vaddr[ch],
334 ch);
335
336 write_reg(PS3_AUDIO_SOURCE(dma_ch),
337 (PS3_AUDIO_SOURCE_TARGET_SYSTEM_MEMORY |
338 dma_addr));
339
340 /* dst: fixed to 3wire#0 */
341 if (ch == 0)
342 write_reg(PS3_AUDIO_DEST(dma_ch),
343 (PS3_AUDIO_DEST_TARGET_AUDIOFIFO |
344 PS3_AUDIO_AO_3W_LDATA(0)));
345 else
346 write_reg(PS3_AUDIO_DEST(dma_ch),
347 (PS3_AUDIO_DEST_TARGET_AUDIOFIFO |
348 PS3_AUDIO_AO_3W_RDATA(0)));
349
350 /* count always 1 DMA block (1/2 stage = 128 bytes) */
351 write_reg(PS3_AUDIO_DMASIZE(dma_ch), 0);
352 /* bump pointer if needed */
353 if (!silent)
354 snd_ps3_bump_buffer(card, ch,
355 PS3_AUDIO_DMAC_BLOCK_SIZE,
356 stage);
357
358 /* kick event */
359 if (dma_ch == 0)
360 write_reg(PS3_AUDIO_KICK(dma_ch),
361 ch0_kick_event);
362 else
363 write_reg(PS3_AUDIO_KICK(dma_ch),
364 PS3_AUDIO_KICK_EVENT_AUDIO_DMA(dma_ch
365 - 1) |
366 PS3_AUDIO_KICK_REQUEST);
367 }
368 }
369 /* ensure the hardware sees the change */
370 wmb();
371 spin_unlock_irqrestore(&card->dma_lock, irqsave);
372
373 return 0;
374}
375
376/*
377 * audio mute on/off
378 * mute_on : 0 output enabled
379 * 1 mute
380 */
381static int snd_ps3_mute(int mute_on)
382{
383 return ps3av_audio_mute(mute_on);
384}
385
386/*
387 * PCM operators
388 */
389static int snd_ps3_pcm_open(struct snd_pcm_substream *substream)
390{
391 struct snd_pcm_runtime *runtime = substream->runtime;
392 struct snd_ps3_card_info *card = snd_pcm_substream_chip(substream);
393 int pcm_index;
394
395 pcm_index = substream->pcm->device;
396 /* to retrieve substream/runtime in interrupt handler */
397 card->substream = substream;
398
399 runtime->hw = snd_ps3_pcm_hw;
400
401 card->start_delay = snd_ps3_start_delay;
402
403 /* mute off */
404 snd_ps3_mute(0); /* this function sleep */
405
406 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
407 PS3_AUDIO_FIFO_STAGE_SIZE * 4 * 2);
408 return 0;
409};
410
411static int snd_ps3_pcm_hw_params(struct snd_pcm_substream *substream,
412 struct snd_pcm_hw_params *hw_params)
413{
414 size_t size;
415
416 /* alloc transport buffer */
417 size = params_buffer_bytes(hw_params);
418 snd_pcm_lib_malloc_pages(substream, size);
419 return 0;
420};
421
422static int snd_ps3_delay_to_bytes(struct snd_pcm_substream *substream,
423 unsigned int delay_ms)
424{
425 int ret;
426 int rate ;
427
428 rate = substream->runtime->rate;
429 ret = snd_pcm_format_size(substream->runtime->format,
430 rate * delay_ms / 1000)
431 * substream->runtime->channels;
432
433 pr_debug(KERN_ERR "%s: time=%d rate=%d bytes=%ld, frames=%d, ret=%d\n",
434 __func__,
435 delay_ms,
436 rate,
437 snd_pcm_format_size(substream->runtime->format, rate),
438 rate * delay_ms / 1000,
439 ret);
440
441 return ret;
442};
443
444static int snd_ps3_pcm_prepare(struct snd_pcm_substream *substream)
445{
446 struct snd_pcm_runtime *runtime = substream->runtime;
447 struct snd_ps3_card_info *card = snd_pcm_substream_chip(substream);
448 unsigned long irqsave;
449
450 if (!snd_ps3_set_avsetting(substream)) {
451 /* some parameter changed */
452 write_reg(PS3_AUDIO_AX_IE,
453 PS3_AUDIO_AX_IE_ASOBEIE(0) |
454 PS3_AUDIO_AX_IE_ASOBUIE(0));
455 /*
456 * let SPDIF device re-lock with SPDIF signal,
457 * start with some silence
458 */
459 card->silent = snd_ps3_delay_to_bytes(substream,
460 card->start_delay) /
461 (PS3_AUDIO_FIFO_STAGE_SIZE * 4); /* every 4 times */
462 }
463
464 /* restart ring buffer pointer */
465 spin_lock_irqsave(&card->dma_lock, irqsave);
466 {
467 card->dma_buffer_size = runtime->dma_bytes;
468
469 card->dma_last_transfer_vaddr[SND_PS3_CH_L] =
470 card->dma_next_transfer_vaddr[SND_PS3_CH_L] =
471 card->dma_start_vaddr[SND_PS3_CH_L] =
472 runtime->dma_area;
473 card->dma_start_bus_addr[SND_PS3_CH_L] = runtime->dma_addr;
474
475 card->dma_last_transfer_vaddr[SND_PS3_CH_R] =
476 card->dma_next_transfer_vaddr[SND_PS3_CH_R] =
477 card->dma_start_vaddr[SND_PS3_CH_R] =
478 runtime->dma_area + (runtime->dma_bytes / 2);
479 card->dma_start_bus_addr[SND_PS3_CH_R] =
480 runtime->dma_addr + (runtime->dma_bytes / 2);
481
482 pr_debug("%s: vaddr=%p bus=%#lx\n", __func__,
483 card->dma_start_vaddr[SND_PS3_CH_L],
484 card->dma_start_bus_addr[SND_PS3_CH_L]);
485
486 }
487 spin_unlock_irqrestore(&card->dma_lock, irqsave);
488
489 /* ensure the hardware sees the change */
490 mb();
491
492 return 0;
493};
494
495static int snd_ps3_pcm_trigger(struct snd_pcm_substream *substream,
496 int cmd)
497{
498 struct snd_ps3_card_info *card = snd_pcm_substream_chip(substream);
499 int ret = 0;
500
501 switch (cmd) {
502 case SNDRV_PCM_TRIGGER_START:
503 /* clear outstanding interrupts */
504 update_reg(PS3_AUDIO_AX_IS, 0);
505
506 spin_lock(&card->dma_lock);
507 {
508 card->running = 1;
509 }
510 spin_unlock(&card->dma_lock);
511
512 snd_ps3_program_dma(card,
513 SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL);
514 snd_ps3_kick_dma(card);
515 while (read_reg(PS3_AUDIO_KICK(7)) &
516 PS3_AUDIO_KICK_STATUS_MASK) {
517 udelay(1);
518 }
519 snd_ps3_program_dma(card, SND_PS3_DMA_FILLTYPE_SILENT_RUNNING);
520 snd_ps3_kick_dma(card);
521 break;
522
523 case SNDRV_PCM_TRIGGER_STOP:
524 spin_lock(&card->dma_lock);
525 {
526 card->running = 0;
527 }
528 spin_unlock(&card->dma_lock);
529 snd_ps3_wait_for_dma_stop(card);
530 break;
531 default:
532 break;
533
534 }
535
536 return ret;
537};
538
539/*
540 * report current pointer
541 */
542static snd_pcm_uframes_t snd_ps3_pcm_pointer(
543 struct snd_pcm_substream *substream)
544{
545 struct snd_ps3_card_info *card = snd_pcm_substream_chip(substream);
546 size_t bytes;
547 snd_pcm_uframes_t ret;
548
549 spin_lock(&card->dma_lock);
550 {
551 bytes = (size_t)(card->dma_last_transfer_vaddr[SND_PS3_CH_L] -
552 card->dma_start_vaddr[SND_PS3_CH_L]);
553 }
554 spin_unlock(&card->dma_lock);
555
556 ret = bytes_to_frames(substream->runtime, bytes * 2);
557
558 return ret;
559};
560
561static int snd_ps3_pcm_hw_free(struct snd_pcm_substream *substream)
562{
563 int ret;
564 ret = snd_pcm_lib_free_pages(substream);
565 return ret;
566};
567
568static int snd_ps3_pcm_close(struct snd_pcm_substream *substream)
569{
570 /* mute on */
571 snd_ps3_mute(1);
572 return 0;
573};
574
575static void snd_ps3_audio_fixup(struct snd_ps3_card_info *card)
576{
577 /*
578 * avsetting driver seems to never change the followings
579 * so, init them here once
580 */
581
582 /* no dma interrupt needed */
583 write_reg(PS3_AUDIO_INTR_EN_0, 0);
584
585 /* use every 4 buffer empty interrupt */
586 update_mask_reg(PS3_AUDIO_AX_IC,
587 PS3_AUDIO_AX_IC_AASOIMD_MASK,
588 PS3_AUDIO_AX_IC_AASOIMD_EVERY4);
589
590 /* enable 3wire clocks */
591 update_mask_reg(PS3_AUDIO_AO_3WMCTRL,
592 ~(PS3_AUDIO_AO_3WMCTRL_ASOBCLKD_DISABLED |
593 PS3_AUDIO_AO_3WMCTRL_ASOLRCKD_DISABLED),
594 0);
595 update_reg(PS3_AUDIO_AO_3WMCTRL,
596 PS3_AUDIO_AO_3WMCTRL_ASOPLRCK_DEFAULT);
597}
598
599/*
600 * av setting
601 * NOTE: calling this function may generate audio interrupt.
602 */
603static int snd_ps3_change_avsetting(struct snd_ps3_card_info *card)
604{
605 int ret, retries, i;
606 pr_debug("%s: start\n", __func__);
607
608 ret = ps3av_set_audio_mode(card->avs.avs_audio_ch,
609 card->avs.avs_audio_rate,
610 card->avs.avs_audio_width,
611 card->avs.avs_audio_format,
612 card->avs.avs_audio_source);
613 /*
614 * Reset the following unwanted settings:
615 */
616
617 /* disable all 3wire buffers */
618 update_mask_reg(PS3_AUDIO_AO_3WMCTRL,
619 ~(PS3_AUDIO_AO_3WMCTRL_ASOEN(0) |
620 PS3_AUDIO_AO_3WMCTRL_ASOEN(1) |
621 PS3_AUDIO_AO_3WMCTRL_ASOEN(2) |
622 PS3_AUDIO_AO_3WMCTRL_ASOEN(3)),
623 0);
624 wmb(); /* ensure the hardware sees the change */
625 /* wait for actually stopped */
626 retries = 1000;
627 while ((read_reg(PS3_AUDIO_AO_3WMCTRL) &
628 (PS3_AUDIO_AO_3WMCTRL_ASORUN(0) |
629 PS3_AUDIO_AO_3WMCTRL_ASORUN(1) |
630 PS3_AUDIO_AO_3WMCTRL_ASORUN(2) |
631 PS3_AUDIO_AO_3WMCTRL_ASORUN(3))) &&
632 --retries) {
633 udelay(1);
634 }
635
636 /* reset buffer pointer */
637 for (i = 0; i < 4; i++) {
638 update_reg(PS3_AUDIO_AO_3WCTRL(i),
639 PS3_AUDIO_AO_3WCTRL_ASOBRST_RESET);
640 udelay(10);
641 }
642 wmb(); /* ensure the hardware actually start resetting */
643
644 /* enable 3wire#0 buffer */
645 update_reg(PS3_AUDIO_AO_3WMCTRL, PS3_AUDIO_AO_3WMCTRL_ASOEN(0));
646
647
648 /* In 24bit mode,ALSA inserts a zero byte at first byte of per sample */
649 update_mask_reg(PS3_AUDIO_AO_3WCTRL(0),
650 ~PS3_AUDIO_AO_3WCTRL_ASODF,
651 PS3_AUDIO_AO_3WCTRL_ASODF_LSB);
652 update_mask_reg(PS3_AUDIO_AO_SPDCTRL(0),
653 ~PS3_AUDIO_AO_SPDCTRL_SPODF,
654 PS3_AUDIO_AO_SPDCTRL_SPODF_LSB);
655 /* ensure all the setting above is written back to register */
656 wmb();
657 /* avsetting driver altered AX_IE, caller must reset it if you want */
658 pr_debug("%s: end\n", __func__);
659 return ret;
660}
661
662static int snd_ps3_init_avsetting(struct snd_ps3_card_info *card)
663{
664 int ret;
665 pr_debug("%s: start\n", __func__);
666 card->avs.avs_audio_ch = PS3AV_CMD_AUDIO_NUM_OF_CH_2;
667 card->avs.avs_audio_rate = PS3AV_CMD_AUDIO_FS_48K;
668 card->avs.avs_audio_width = PS3AV_CMD_AUDIO_WORD_BITS_16;
669 card->avs.avs_audio_format = PS3AV_CMD_AUDIO_FORMAT_PCM;
670 card->avs.avs_audio_source = PS3AV_CMD_AUDIO_SOURCE_SERIAL;
671
672 ret = snd_ps3_change_avsetting(card);
673
674 snd_ps3_audio_fixup(card);
675
676 /* to start to generate SPDIF signal, fill data */
677 snd_ps3_program_dma(card, SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL);
678 snd_ps3_kick_dma(card);
679 pr_debug("%s: end\n", __func__);
680 return ret;
681}
682
683/*
684 * set sampling rate according to the substream
685 */
686static int snd_ps3_set_avsetting(struct snd_pcm_substream *substream)
687{
688 struct snd_ps3_card_info *card = snd_pcm_substream_chip(substream);
689 struct snd_ps3_avsetting_info avs;
690
691 avs = card->avs;
692
693 pr_debug("%s: called freq=%d width=%d\n", __func__,
694 substream->runtime->rate,
695 snd_pcm_format_width(substream->runtime->format));
696
697 pr_debug("%s: before freq=%d width=%d\n", __func__,
698 card->avs.avs_audio_rate, card->avs.avs_audio_width);
699
700 /* sample rate */
701 switch (substream->runtime->rate) {
702 case 44100:
703 avs.avs_audio_rate = PS3AV_CMD_AUDIO_FS_44K;
704 break;
705 case 48000:
706 avs.avs_audio_rate = PS3AV_CMD_AUDIO_FS_48K;
707 break;
708 case 88200:
709 avs.avs_audio_rate = PS3AV_CMD_AUDIO_FS_88K;
710 break;
711 case 96000:
712 avs.avs_audio_rate = PS3AV_CMD_AUDIO_FS_96K;
713 break;
714 default:
715 pr_info("%s: invalid rate %d\n", __func__,
716 substream->runtime->rate);
717 return 1;
718 }
719
720 /* width */
721 switch (snd_pcm_format_width(substream->runtime->format)) {
722 case 16:
723 avs.avs_audio_width = PS3AV_CMD_AUDIO_WORD_BITS_16;
724 break;
725 case 24:
726 avs.avs_audio_width = PS3AV_CMD_AUDIO_WORD_BITS_24;
727 break;
728 default:
729 pr_info("%s: invalid width %d\n", __func__,
730 snd_pcm_format_width(substream->runtime->format));
731 return 1;
732 }
733
734 if ((card->avs.avs_audio_width != avs.avs_audio_width) ||
735 (card->avs.avs_audio_rate != avs.avs_audio_rate)) {
736 card->avs = avs;
737 snd_ps3_change_avsetting(card);
738
739 pr_debug("%s: after freq=%d width=%d\n", __func__,
740 card->avs.avs_audio_rate, card->avs.avs_audio_width);
741
742 return 0;
743 } else
744 return 1;
745}
746
747
748
749static int snd_ps3_map_mmio(void)
750{
751 the_card.mapped_mmio_vaddr =
752 ioremap(the_card.ps3_dev->m_region->bus_addr,
753 the_card.ps3_dev->m_region->len);
754
755 if (!the_card.mapped_mmio_vaddr) {
756 pr_info("%s: ioremap 0 failed p=%#lx l=%#lx \n",
757 __func__, the_card.ps3_dev->m_region->lpar_addr,
758 the_card.ps3_dev->m_region->len);
759 return -ENXIO;
760 }
761
762 return 0;
763};
764
765static void snd_ps3_unmap_mmio(void)
766{
767 iounmap(the_card.mapped_mmio_vaddr);
768 the_card.mapped_mmio_vaddr = NULL;
769}
770
771static int snd_ps3_allocate_irq(void)
772{
773 int ret;
774 u64 lpar_addr, lpar_size;
775 u64 __iomem *mapped;
776
777 /* FIXME: move this to device_init (H/W probe) */
778
779 /* get irq outlet */
780 ret = lv1_gpu_device_map(1, &lpar_addr, &lpar_size);
781 if (ret) {
782 pr_info("%s: device map 1 failed %d\n", __func__,
783 ret);
784 return -ENXIO;
785 }
786
787 mapped = ioremap(lpar_addr, lpar_size);
788 if (!mapped) {
789 pr_info("%s: ioremap 1 failed \n", __func__);
790 return -ENXIO;
791 }
792
793 the_card.audio_irq_outlet = in_be64(mapped);
794
795 iounmap(mapped);
796 ret = lv1_gpu_device_unmap(1);
797 if (ret)
798 pr_info("%s: unmap 1 failed\n", __func__);
799
800 /* irq */
801 ret = ps3_irq_plug_setup(PS3_BINDING_CPU_ANY,
802 the_card.audio_irq_outlet,
803 &the_card.irq_no);
804 if (ret) {
805 pr_info("%s:ps3_alloc_irq failed (%d)\n", __func__, ret);
806 return ret;
807 }
808
809 ret = request_irq(the_card.irq_no, snd_ps3_interrupt, IRQF_DISABLED,
810 SND_PS3_DRIVER_NAME, &the_card);
811 if (ret) {
812 pr_info("%s: request_irq failed (%d)\n", __func__, ret);
813 goto cleanup_irq;
814 }
815
816 return 0;
817
818 cleanup_irq:
819 ps3_irq_plug_destroy(the_card.irq_no);
820 return ret;
821};
822
823static void snd_ps3_free_irq(void)
824{
825 free_irq(the_card.irq_no, &the_card);
826 ps3_irq_plug_destroy(the_card.irq_no);
827}
828
829static void snd_ps3_audio_set_base_addr(uint64_t ioaddr_start)
830{
831 uint64_t val;
832 int ret;
833
834 val = (ioaddr_start & (0x0fUL << 32)) >> (32 - 20) |
835 (0x03UL << 24) |
836 (0x0fUL << 12) |
837 (PS3_AUDIO_IOID);
838
839 ret = lv1_gpu_attribute(0x100, 0x007, val, 0, 0);
840 if (ret)
841 pr_info("%s: gpu_attribute failed %d\n", __func__,
842 ret);
843}
844
845static int __init snd_ps3_driver_probe(struct ps3_system_bus_device *dev)
846{
847 int ret;
848 u64 lpar_addr, lpar_size;
849
850 BUG_ON(!firmware_has_feature(FW_FEATURE_PS3_LV1));
851 BUG_ON(dev->match_id != PS3_MATCH_ID_SOUND);
852
853 the_card.ps3_dev = dev;
854
855 ret = ps3_open_hv_device(dev);
856
857 if (ret)
858 return -ENXIO;
859
860 /* setup MMIO */
861 ret = lv1_gpu_device_map(2, &lpar_addr, &lpar_size);
862 if (ret) {
863 pr_info("%s: device map 2 failed %d\n", __func__, ret);
864 goto clean_open;
865 }
866 ps3_mmio_region_init(dev, dev->m_region, lpar_addr, lpar_size,
867 PAGE_SHIFT);
868
869 ret = snd_ps3_map_mmio();
870 if (ret)
871 goto clean_dev_map;
872
873 /* setup DMA area */
874 ps3_dma_region_init(dev, dev->d_region,
875 PAGE_SHIFT, /* use system page size */
876 0, /* dma type; not used */
877 NULL,
878 _ALIGN_UP(SND_PS3_DMA_REGION_SIZE, PAGE_SIZE));
879 dev->d_region->ioid = PS3_AUDIO_IOID;
880
881 ret = ps3_dma_region_create(dev->d_region);
882 if (ret) {
883 pr_info("%s: region_create\n", __func__);
884 goto clean_mmio;
885 }
886
887 snd_ps3_audio_set_base_addr(dev->d_region->bus_addr);
888
889 /* CONFIG_SND_PS3_DEFAULT_START_DELAY */
890 the_card.start_delay = snd_ps3_start_delay;
891
892 /* irq */
893 if (snd_ps3_allocate_irq()) {
894 ret = -ENXIO;
895 goto clean_dma_region;
896 }
897
898 /* create card instance */
899 the_card.card = snd_card_new(index, id, THIS_MODULE, 0);
900 if (!the_card.card) {
901 ret = -ENXIO;
902 goto clean_irq;
903 }
904
905 strcpy(the_card.card->driver, "PS3");
906 strcpy(the_card.card->shortname, "PS3");
907 strcpy(the_card.card->longname, "PS3 sound");
908 /* create PCM devices instance */
909 /* NOTE:this driver works assuming pcm:substream = 1:1 */
910 ret = snd_pcm_new(the_card.card,
911 "SPDIF",
912 0, /* instance index, will be stored pcm.device*/
913 1, /* output substream */
914 0, /* input substream */
915 &(the_card.pcm));
916 if (ret)
917 goto clean_card;
918
919 the_card.pcm->private_data = &the_card;
920 strcpy(the_card.pcm->name, "SPDIF");
921
922 /* set pcm ops */
923 snd_pcm_set_ops(the_card.pcm, SNDRV_PCM_STREAM_PLAYBACK,
924 &snd_ps3_pcm_spdif_ops);
925
926 the_card.pcm->info_flags = SNDRV_PCM_INFO_NONINTERLEAVED;
927 /* pre-alloc PCM DMA buffer*/
928 ret = snd_pcm_lib_preallocate_pages_for_all(the_card.pcm,
929 SNDRV_DMA_TYPE_DEV,
930 &dev->core,
931 SND_PS3_PCM_PREALLOC_SIZE,
932 SND_PS3_PCM_PREALLOC_SIZE);
933 if (ret < 0) {
934 pr_info("%s: prealloc failed\n", __func__);
935 goto clean_card;
936 }
937
938 /*
939 * allocate null buffer
940 * its size should be lager than PS3_AUDIO_FIFO_STAGE_SIZE * 2
941 * PAGE_SIZE is enogh
942 */
943 if (!(the_card.null_buffer_start_vaddr =
944 dma_alloc_coherent(&the_card.ps3_dev->core,
945 PAGE_SIZE,
946 &the_card.null_buffer_start_dma_addr,
947 GFP_KERNEL))) {
948 pr_info("%s: nullbuffer alloc failed\n", __func__);
949 goto clean_preallocate;
950 }
951 pr_debug("%s: null vaddr=%p dma=%#lx\n", __func__,
952 the_card.null_buffer_start_vaddr,
953 the_card.null_buffer_start_dma_addr);
954 /* set default sample rate/word width */
955 snd_ps3_init_avsetting(&the_card);
956
957 /* register the card */
958 ret = snd_card_register(the_card.card);
959 if (ret < 0)
960 goto clean_dma_map;
961
962 pr_info("%s started. start_delay=%dms\n",
963 the_card.card->longname, the_card.start_delay);
964 return 0;
965
966clean_dma_map:
967 dma_free_coherent(&the_card.ps3_dev->core,
968 PAGE_SIZE,
969 the_card.null_buffer_start_vaddr,
970 the_card.null_buffer_start_dma_addr);
971clean_preallocate:
972 snd_pcm_lib_preallocate_free_for_all(the_card.pcm);
973clean_card:
974 snd_card_free(the_card.card);
975clean_irq:
976 snd_ps3_free_irq();
977clean_dma_region:
978 ps3_dma_region_free(dev->d_region);
979clean_mmio:
980 snd_ps3_unmap_mmio();
981clean_dev_map:
982 lv1_gpu_device_unmap(2);
983clean_open:
984 ps3_close_hv_device(dev);
985 /*
986 * there is no destructor function to pcm.
987 * midlayer automatically releases if the card removed
988 */
989 return ret;
990}; /* snd_ps3_probe */
991
992/* called when module removal */
993static int snd_ps3_driver_remove(struct ps3_system_bus_device *dev)
994{
995 int ret;
996 pr_info("%s:start id=%d\n", __func__, dev->match_id);
997 if (dev->match_id != PS3_MATCH_ID_SOUND)
998 return -ENXIO;
999
1000 /*
1001 * ctl and preallocate buffer will be freed in
1002 * snd_card_free
1003 */
1004 ret = snd_card_free(the_card.card);
1005 if (ret)
1006 pr_info("%s: ctl freecard=%d\n", __func__, ret);
1007
1008 dma_free_coherent(&dev->core,
1009 PAGE_SIZE,
1010 the_card.null_buffer_start_vaddr,
1011 the_card.null_buffer_start_dma_addr);
1012
1013 ps3_dma_region_free(dev->d_region);
1014
1015 snd_ps3_free_irq();
1016 snd_ps3_unmap_mmio();
1017
1018 lv1_gpu_device_unmap(2);
1019 ps3_close_hv_device(dev);
1020 pr_info("%s:end id=%d\n", __func__, dev->match_id);
1021 return 0;
1022} /* snd_ps3_remove */
1023
1024static struct ps3_system_bus_driver snd_ps3_bus_driver_info = {
1025 .match_id = PS3_MATCH_ID_SOUND,
1026 .probe = snd_ps3_driver_probe,
1027 .remove = snd_ps3_driver_remove,
1028 .shutdown = snd_ps3_driver_remove,
1029 .core = {
1030 .name = SND_PS3_DRIVER_NAME,
1031 .owner = THIS_MODULE,
1032 },
1033};
1034
1035
1036/*
1037 * Interrupt handler
1038 */
1039static irqreturn_t snd_ps3_interrupt(int irq, void *dev_id)
1040{
1041
1042 uint32_t port_intr;
1043 int underflow_occured = 0;
1044 struct snd_ps3_card_info *card = dev_id;
1045
1046 if (!card->running) {
1047 update_reg(PS3_AUDIO_AX_IS, 0);
1048 update_reg(PS3_AUDIO_INTR_0, 0);
1049 return IRQ_HANDLED;
1050 }
1051
1052 port_intr = read_reg(PS3_AUDIO_AX_IS);
1053 /*
1054 *serial buffer empty detected (every 4 times),
1055 *program next dma and kick it
1056 */
1057 if (port_intr & PS3_AUDIO_AX_IE_ASOBEIE(0)) {
1058 write_reg(PS3_AUDIO_AX_IS, PS3_AUDIO_AX_IE_ASOBEIE(0));
1059 if (port_intr & PS3_AUDIO_AX_IE_ASOBUIE(0)) {
1060 write_reg(PS3_AUDIO_AX_IS, port_intr);
1061 underflow_occured = 1;
1062 }
1063 if (card->silent) {
1064 /* we are still in silent time */
1065 snd_ps3_program_dma(card,
1066 (underflow_occured) ?
1067 SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL :
1068 SND_PS3_DMA_FILLTYPE_SILENT_RUNNING);
1069 snd_ps3_kick_dma(card);
1070 card->silent --;
1071 } else {
1072 snd_ps3_program_dma(card,
1073 (underflow_occured) ?
1074 SND_PS3_DMA_FILLTYPE_FIRSTFILL :
1075 SND_PS3_DMA_FILLTYPE_RUNNING);
1076 snd_ps3_kick_dma(card);
1077 snd_pcm_period_elapsed(card->substream);
1078 }
1079 } else if (port_intr & PS3_AUDIO_AX_IE_ASOBUIE(0)) {
1080 write_reg(PS3_AUDIO_AX_IS, PS3_AUDIO_AX_IE_ASOBUIE(0));
1081 /*
1082 * serial out underflow, but buffer empty not detected.
1083 * in this case, fill fifo with 0 to recover. After
1084 * filling dummy data, serial automatically start to
1085 * consume them and then will generate normal buffer
1086 * empty interrupts.
1087 * If both buffer underflow and buffer empty are occured,
1088 * it is better to do nomal data transfer than empty one
1089 */
1090 snd_ps3_program_dma(card,
1091 SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL);
1092 snd_ps3_kick_dma(card);
1093 snd_ps3_program_dma(card,
1094 SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL);
1095 snd_ps3_kick_dma(card);
1096 }
1097 /* clear interrupt cause */
1098 return IRQ_HANDLED;
1099};
1100
1101/*
1102 * module/subsystem initialize/terminate
1103 */
1104static int __init snd_ps3_init(void)
1105{
1106 int ret;
1107
1108 if (!firmware_has_feature(FW_FEATURE_PS3_LV1))
1109 return -ENXIO;
1110
1111 memset(&the_card, 0, sizeof(the_card));
1112 spin_lock_init(&the_card.dma_lock);
1113
1114 /* register systembus DRIVER, this calls our probe() func */
1115 ret = ps3_system_bus_driver_register(&snd_ps3_bus_driver_info);
1116
1117 return ret;
1118}
1119
1120static void __exit snd_ps3_exit(void)
1121{
1122 ps3_system_bus_driver_unregister(&snd_ps3_bus_driver_info);
1123}
1124
1125MODULE_ALIAS(PS3_MODULE_ALIAS_SOUND);
diff --git a/sound/ppc/snd_ps3.h b/sound/ppc/snd_ps3.h
new file mode 100644
index 000000000000..4b7e6fbbe500
--- /dev/null
+++ b/sound/ppc/snd_ps3.h
@@ -0,0 +1,135 @@
1/*
2 * Audio support for PS3
3 * Copyright (C) 2007 Sony Computer Entertainment Inc.
4 * All rights reserved.
5 * Copyright 2006, 2007 Sony Corporation
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the Licence.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#if !defined(_SND_PS3_H_)
22#define _SND_PS3_H_
23
24#include <linux/irqreturn.h>
25
26#define SND_PS3_DRIVER_NAME "snd_ps3"
27
28enum snd_ps3_out_channel {
29 SND_PS3_OUT_SPDIF_0,
30 SND_PS3_OUT_SPDIF_1,
31 SND_PS3_OUT_SERIAL_0,
32 SND_PS3_OUT_DEVS
33};
34
35enum snd_ps3_dma_filltype {
36 SND_PS3_DMA_FILLTYPE_FIRSTFILL,
37 SND_PS3_DMA_FILLTYPE_RUNNING,
38 SND_PS3_DMA_FILLTYPE_SILENT_FIRSTFILL,
39 SND_PS3_DMA_FILLTYPE_SILENT_RUNNING
40};
41
42enum snd_ps3_ch {
43 SND_PS3_CH_L = 0,
44 SND_PS3_CH_R = 1,
45 SND_PS3_CH_MAX = 2
46};
47
48struct snd_ps3_avsetting_info {
49 uint32_t avs_audio_ch; /* fixed */
50 uint32_t avs_audio_rate;
51 uint32_t avs_audio_width;
52 uint32_t avs_audio_format; /* fixed */
53 uint32_t avs_audio_source; /* fixed */
54};
55/*
56 * PS3 audio 'card' instance
57 * there should be only ONE hardware.
58 */
59struct snd_ps3_card_info {
60 struct ps3_system_bus_device *ps3_dev;
61 struct snd_card *card;
62
63 struct snd_pcm *pcm;
64 struct snd_pcm_substream *substream;
65
66 /* hvc info */
67 u64 audio_lpar_addr;
68 u64 audio_lpar_size;
69
70 /* registers */
71 void __iomem *mapped_mmio_vaddr;
72
73 /* irq */
74 u64 audio_irq_outlet;
75 unsigned int irq_no;
76
77 /* remember avsetting */
78 struct snd_ps3_avsetting_info avs;
79
80 /* dma buffer management */
81 spinlock_t dma_lock;
82 /* dma_lock start */
83 void * dma_start_vaddr[2]; /* 0 for L, 1 for R */
84 dma_addr_t dma_start_bus_addr[2];
85 size_t dma_buffer_size;
86 void * dma_last_transfer_vaddr[2];
87 void * dma_next_transfer_vaddr[2];
88 int silent;
89 /* dma_lock end */
90
91 int running;
92
93 /* null buffer */
94 void *null_buffer_start_vaddr;
95 dma_addr_t null_buffer_start_dma_addr;
96
97 /* start delay */
98 unsigned int start_delay;
99
100};
101
102
103/* PS3 audio DMAC block size in bytes */
104#define PS3_AUDIO_DMAC_BLOCK_SIZE (128)
105/* one stage (stereo) of audio FIFO in bytes */
106#define PS3_AUDIO_FIFO_STAGE_SIZE (256)
107/* how many stages the fifo have */
108#define PS3_AUDIO_FIFO_STAGE_COUNT (8)
109/* fifo size 128 bytes * 8 stages * stereo (2ch) */
110#define PS3_AUDIO_FIFO_SIZE \
111 (PS3_AUDIO_FIFO_STAGE_SIZE * PS3_AUDIO_FIFO_STAGE_COUNT)
112
113/* PS3 audio DMAC max block count in one dma shot = 128 (0x80) blocks*/
114#define PS3_AUDIO_DMAC_MAX_BLOCKS (PS3_AUDIO_DMASIZE_BLOCKS_MASK + 1)
115
116#define PS3_AUDIO_NORMAL_DMA_START_CH (0)
117#define PS3_AUDIO_NORMAL_DMA_COUNT (8)
118#define PS3_AUDIO_NULL_DMA_START_CH \
119 (PS3_AUDIO_NORMAL_DMA_START_CH + PS3_AUDIO_NORMAL_DMA_COUNT)
120#define PS3_AUDIO_NULL_DMA_COUNT (2)
121
122#define SND_PS3_MAX_VOL (0x0F)
123#define SND_PS3_MIN_VOL (0x00)
124#define SND_PS3_MIN_ATT SND_PS3_MIN_VOL
125#define SND_PS3_MAX_ATT SND_PS3_MAX_VOL
126
127#define SND_PS3_PCM_PREALLOC_SIZE \
128 (PS3_AUDIO_DMAC_BLOCK_SIZE * PS3_AUDIO_DMAC_MAX_BLOCKS * 4)
129
130#define SND_PS3_DMA_REGION_SIZE \
131 (SND_PS3_PCM_PREALLOC_SIZE + PAGE_SIZE)
132
133#define PS3_AUDIO_IOID (1UL)
134
135#endif /* _SND_PS3_H_ */
diff --git a/sound/ppc/snd_ps3_reg.h b/sound/ppc/snd_ps3_reg.h
new file mode 100644
index 000000000000..03fdee4aaaf2
--- /dev/null
+++ b/sound/ppc/snd_ps3_reg.h
@@ -0,0 +1,891 @@
1/*
2 * Audio support for PS3
3 * Copyright (C) 2007 Sony Computer Entertainment Inc.
4 * Copyright 2006, 2007 Sony Corporation
5 * All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21/*
22 * interrupt / configure registers
23 */
24
25#define PS3_AUDIO_INTR_0 (0x00000100)
26#define PS3_AUDIO_INTR_EN_0 (0x00000140)
27#define PS3_AUDIO_CONFIG (0x00000200)
28
29/*
30 * DMAC registers
31 * n:0..9
32 */
33#define PS3_AUDIO_DMAC_REGBASE(x) (0x0000210 + 0x20 * (x))
34
35#define PS3_AUDIO_KICK(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x00)
36#define PS3_AUDIO_SOURCE(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x04)
37#define PS3_AUDIO_DEST(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x08)
38#define PS3_AUDIO_DMASIZE(n) (PS3_AUDIO_DMAC_REGBASE(n) + 0x0C)
39
40/*
41 * mute control
42 */
43#define PS3_AUDIO_AX_MCTRL (0x00004000)
44#define PS3_AUDIO_AX_ISBP (0x00004004)
45#define PS3_AUDIO_AX_AOBP (0x00004008)
46#define PS3_AUDIO_AX_IC (0x00004010)
47#define PS3_AUDIO_AX_IE (0x00004014)
48#define PS3_AUDIO_AX_IS (0x00004018)
49
50/*
51 * three wire serial
52 * n:0..3
53 */
54#define PS3_AUDIO_AO_MCTRL (0x00006000)
55#define PS3_AUDIO_AO_3WMCTRL (0x00006004)
56
57#define PS3_AUDIO_AO_3WCTRL(n) (0x00006200 + 0x200 * (n))
58
59/*
60 * S/PDIF
61 * n:0..1
62 * x:0..11
63 * y:0..5
64 */
65#define PS3_AUDIO_AO_SPD_REGBASE(n) (0x00007200 + 0x200 * (n))
66
67#define PS3_AUDIO_AO_SPDCTRL(n) \
68 (PS3_AUDIO_AO_SPD_REGBASE(n) + 0x00)
69#define PS3_AUDIO_AO_SPDUB(n, x) \
70 (PS3_AUDIO_AO_SPD_REGBASE(n) + 0x04 + 0x04 * (x))
71#define PS3_AUDIO_AO_SPDCS(n, y) \
72 (PS3_AUDIO_AO_SPD_REGBASE(n) + 0x34 + 0x04 * (y))
73
74
75/*
76 PS3_AUDIO_INTR_0 register tells an interrupt handler which audio
77 DMA channel triggered the interrupt. The interrupt status for a channel
78 can be cleared by writing a '1' to the corresponding bit. A new interrupt
79 cannot be generated until the previous interrupt has been cleared.
80
81 Note that the status reported by PS3_AUDIO_INTR_0 is independent of the
82 value of PS3_AUDIO_INTR_EN_0.
83
84 31 24 23 16 15 8 7 0
85 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
86 |0 0 0 0 0 0 0 0 0 0 0 0 0|C|0|C|0|C|0|C|0|C|0|C|0|C|0|C|0|C|0|C| INTR_0
87 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
88*/
89#define PS3_AUDIO_INTR_0_CHAN(n) (1 << ((n) * 2))
90#define PS3_AUDIO_INTR_0_CHAN9 PS3_AUDIO_INTR_0_CHAN(9)
91#define PS3_AUDIO_INTR_0_CHAN8 PS3_AUDIO_INTR_0_CHAN(8)
92#define PS3_AUDIO_INTR_0_CHAN7 PS3_AUDIO_INTR_0_CHAN(7)
93#define PS3_AUDIO_INTR_0_CHAN6 PS3_AUDIO_INTR_0_CHAN(6)
94#define PS3_AUDIO_INTR_0_CHAN5 PS3_AUDIO_INTR_0_CHAN(5)
95#define PS3_AUDIO_INTR_0_CHAN4 PS3_AUDIO_INTR_0_CHAN(4)
96#define PS3_AUDIO_INTR_0_CHAN3 PS3_AUDIO_INTR_0_CHAN(3)
97#define PS3_AUDIO_INTR_0_CHAN2 PS3_AUDIO_INTR_0_CHAN(2)
98#define PS3_AUDIO_INTR_0_CHAN1 PS3_AUDIO_INTR_0_CHAN(1)
99#define PS3_AUDIO_INTR_0_CHAN0 PS3_AUDIO_INTR_0_CHAN(0)
100
101/*
102 The PS3_AUDIO_INTR_EN_0 register specifies which DMA channels can generate
103 an interrupt to the PU. Each bit of PS3_AUDIO_INTR_EN_0 is ANDed with the
104 corresponding bit in PS3_AUDIO_INTR_0. The resulting bits are OR'd together
105 to generate the Audio interrupt.
106
107 31 24 23 16 15 8 7 0
108 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
109 |0 0 0 0 0 0 0 0 0 0 0 0 0|C|0|C|0|C|0|C|0|C|0|C|0|C|0|C|0|C|0|C| INTR_EN_0
110 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
111
112 Bit assignments are same as PS3_AUDIO_INTR_0
113*/
114
115/*
116 PS3_AUDIO_CONFIG
117 31 24 23 16 15 8 7 0
118 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
119 |0 0 0 0 0 0 0 0|0 0 0 0 0 0 0 0|0 0 0 0 0 0 0 C|0 0 0 0 0 0 0 0| CONFIG
120 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
121
122*/
123
124/* The CLEAR field cancels all pending transfers, and stops any running DMA
125 transfers. Any interrupts associated with the canceled transfers
126 will occur as if the transfer had finished.
127 Since this bit is designed to recover from DMA related issues
128 which are caused by unpredictable situations, it is prefered to wait
129 for normal DMA transfer end without using this bit.
130*/
131#define PS3_AUDIO_CONFIG_CLEAR (1 << 8) /* RWIVF */
132
133/*
134 PS3_AUDIO_AX_MCTRL: Audio Port Mute Control Register
135
136 31 24 23 16 15 8 7 0
137 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
138 |0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0|A|A|A|0 0 0 0 0 0 0|S|S|A|A|A|A| AX_MCTRL
139 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
140*/
141
142/* 3 Wire Audio Serial Output Channel Mutes (0..3) */
143#define PS3_AUDIO_AX_MCTRL_ASOMT(n) (1 << (3 - (n))) /* RWIVF */
144#define PS3_AUDIO_AX_MCTRL_ASO3MT (1 << 0) /* RWIVF */
145#define PS3_AUDIO_AX_MCTRL_ASO2MT (1 << 1) /* RWIVF */
146#define PS3_AUDIO_AX_MCTRL_ASO1MT (1 << 2) /* RWIVF */
147#define PS3_AUDIO_AX_MCTRL_ASO0MT (1 << 3) /* RWIVF */
148
149/* S/PDIF mutes (0,1)*/
150#define PS3_AUDIO_AX_MCTRL_SPOMT(n) (1 << (5 - (n))) /* RWIVF */
151#define PS3_AUDIO_AX_MCTRL_SPO1MT (1 << 4) /* RWIVF */
152#define PS3_AUDIO_AX_MCTRL_SPO0MT (1 << 5) /* RWIVF */
153
154/* All 3 Wire Serial Outputs Mute */
155#define PS3_AUDIO_AX_MCTRL_AASOMT (1 << 13) /* RWIVF */
156
157/* All S/PDIF Mute */
158#define PS3_AUDIO_AX_MCTRL_ASPOMT (1 << 14) /* RWIVF */
159
160/* All Audio Outputs Mute */
161#define PS3_AUDIO_AX_MCTRL_AAOMT (1 << 15) /* RWIVF */
162
163/*
164 S/PDIF Outputs Buffer Read/Write Pointer Register
165
166 31 24 23 16 15 8 7 0
167 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
168 |0 0 0 0 0 0 0 0|0|SPO0B|0|SPO1B|0 0 0 0 0 0 0 0|0|SPO0B|0|SPO1B| AX_ISBP
169 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
170
171*/
172/*
173 S/PDIF Output Channel Read Buffer Numbers
174 Buffer number is value of field.
175 Indicates current read access buffer ID from Audio Data
176 Transfer controller of S/PDIF Output
177*/
178
179#define PS3_AUDIO_AX_ISBP_SPOBRN_MASK(n) (0x7 << 4 * (1 - (n))) /* R-IUF */
180#define PS3_AUDIO_AX_ISBP_SPO1BRN_MASK (0x7 << 0) /* R-IUF */
181#define PS3_AUDIO_AX_ISBP_SPO0BRN_MASK (0x7 << 4) /* R-IUF */
182
183/*
184S/PDIF Output Channel Buffer Write Numbers
185Indicates current write access buffer ID from bus master.
186*/
187#define PS3_AUDIO_AX_ISBP_SPOBWN_MASK(n) (0x7 << 4 * (5 - (n))) /* R-IUF */
188#define PS3_AUDIO_AX_ISBP_SPO1BWN_MASK (0x7 << 16) /* R-IUF */
189#define PS3_AUDIO_AX_ISBP_SPO0BWN_MASK (0x7 << 20) /* R-IUF */
190
191/*
192 3 Wire Audio Serial Outputs Buffer Read/Write
193 Pointer Register
194 Buffer number is value of field
195
196 31 24 23 16 15 8 7 0
197 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
198 |0|ASO0B|0|ASO1B|0|ASO2B|0|ASO3B|0|ASO0B|0|ASO1B|0|ASO2B|0|ASO3B| AX_AOBP
199 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
200*/
201
202/*
2033 Wire Audio Serial Output Channel Buffer Read Numbers
204Indicates current read access buffer Id from Audio Data Transfer
205Controller of 3 Wire Audio Serial Output Channels
206*/
207#define PS3_AUDIO_AX_AOBP_ASOBRN_MASK(n) (0x7 << 4 * (3 - (n))) /* R-IUF */
208
209#define PS3_AUDIO_AX_AOBP_ASO3BRN_MASK (0x7 << 0) /* R-IUF */
210#define PS3_AUDIO_AX_AOBP_ASO2BRN_MASK (0x7 << 4) /* R-IUF */
211#define PS3_AUDIO_AX_AOBP_ASO1BRN_MASK (0x7 << 8) /* R-IUF */
212#define PS3_AUDIO_AX_AOBP_ASO0BRN_MASK (0x7 << 12) /* R-IUF */
213
214/*
2153 Wire Audio Serial Output Channel Buffer Write Numbers
216Indicates current write access buffer ID from bus master.
217*/
218#define PS3_AUDIO_AX_AOBP_ASOBWN_MASK(n) (0x7 << 4 * (7 - (n))) /* R-IUF */
219
220#define PS3_AUDIO_AX_AOBP_ASO3BWN_MASK (0x7 << 16) /* R-IUF */
221#define PS3_AUDIO_AX_AOBP_ASO2BWN_MASK (0x7 << 20) /* R-IUF */
222#define PS3_AUDIO_AX_AOBP_ASO1BWN_MASK (0x7 << 24) /* R-IUF */
223#define PS3_AUDIO_AX_AOBP_ASO0BWN_MASK (0x7 << 28) /* R-IUF */
224
225
226
227/*
228Audio Port Interrupt Condition Register
229For the fields in this register, the following values apply:
2300 = Interrupt is generated every interrupt event.
2311 = Interrupt is generated every 2 interrupt events.
2322 = Interrupt is generated every 4 interrupt events.
2333 = Reserved
234
235
236 31 24 23 16 15 8 7 0
237 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
238 |0 0 0 0 0 0 0 0|0 0|SPO|0 0|SPO|0 0|AAS|0 0 0 0 0 0 0 0 0 0 0 0| AX_IC
239 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
240*/
241/*
242All 3-Wire Audio Serial Outputs Interrupt Mode
243Configures the Interrupt and Signal Notification
244condition of all 3-wire Audio Serial Outputs.
245*/
246#define PS3_AUDIO_AX_IC_AASOIMD_MASK (0x3 << 12) /* RWIVF */
247#define PS3_AUDIO_AX_IC_AASOIMD_EVERY1 (0x0 << 12) /* RWI-V */
248#define PS3_AUDIO_AX_IC_AASOIMD_EVERY2 (0x1 << 12) /* RW--V */
249#define PS3_AUDIO_AX_IC_AASOIMD_EVERY4 (0x2 << 12) /* RW--V */
250
251/*
252S/PDIF Output Channel Interrupt Modes
253Configures the Interrupt and signal Notification
254conditions of S/PDIF output channels.
255*/
256#define PS3_AUDIO_AX_IC_SPO1IMD_MASK (0x3 << 16) /* RWIVF */
257#define PS3_AUDIO_AX_IC_SPO1IMD_EVERY1 (0x0 << 16) /* RWI-V */
258#define PS3_AUDIO_AX_IC_SPO1IMD_EVERY2 (0x1 << 16) /* RW--V */
259#define PS3_AUDIO_AX_IC_SPO1IMD_EVERY4 (0x2 << 16) /* RW--V */
260
261#define PS3_AUDIO_AX_IC_SPO0IMD_MASK (0x3 << 20) /* RWIVF */
262#define PS3_AUDIO_AX_IC_SPO0IMD_EVERY1 (0x0 << 20) /* RWI-V */
263#define PS3_AUDIO_AX_IC_SPO0IMD_EVERY2 (0x1 << 20) /* RW--V */
264#define PS3_AUDIO_AX_IC_SPO0IMD_EVERY4 (0x2 << 20) /* RW--V */
265
266/*
267Audio Port interrupt Enable Register
268Configures whether to enable or disable each Interrupt Generation.
269
270
271 31 24 23 16 15 8 7 0
272 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
273 |0 0 0 0 0 0 0 0|S|S|0 0|A|A|A|A|0 0 0 0|S|S|0 0|S|S|0 0|A|A|A|A| AX_IE
274 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
275
276*/
277
278/*
2793 Wire Audio Serial Output Channel Buffer Underflow
280Interrupt Enables
281Select enable/disable of Buffer Underflow Interrupts for
2823-Wire Audio Serial Output Channels
283DISABLED=Interrupt generation disabled.
284*/
285#define PS3_AUDIO_AX_IE_ASOBUIE(n) (1 << (3 - (n))) /* RWIVF */
286#define PS3_AUDIO_AX_IE_ASO3BUIE (1 << 0) /* RWIVF */
287#define PS3_AUDIO_AX_IE_ASO2BUIE (1 << 1) /* RWIVF */
288#define PS3_AUDIO_AX_IE_ASO1BUIE (1 << 2) /* RWIVF */
289#define PS3_AUDIO_AX_IE_ASO0BUIE (1 << 3) /* RWIVF */
290
291/* S/PDIF Output Channel Buffer Underflow Interrupt Enables */
292
293#define PS3_AUDIO_AX_IE_SPOBUIE(n) (1 << (7 - (n))) /* RWIVF */
294#define PS3_AUDIO_AX_IE_SPO1BUIE (1 << 6) /* RWIVF */
295#define PS3_AUDIO_AX_IE_SPO0BUIE (1 << 7) /* RWIVF */
296
297/* S/PDIF Output Channel One Block Transfer Completion Interrupt Enables */
298
299#define PS3_AUDIO_AX_IE_SPOBTCIE(n) (1 << (11 - (n))) /* RWIVF */
300#define PS3_AUDIO_AX_IE_SPO1BTCIE (1 << 10) /* RWIVF */
301#define PS3_AUDIO_AX_IE_SPO0BTCIE (1 << 11) /* RWIVF */
302
303/* 3-Wire Audio Serial Output Channel Buffer Empty Interrupt Enables */
304
305#define PS3_AUDIO_AX_IE_ASOBEIE(n) (1 << (19 - (n))) /* RWIVF */
306#define PS3_AUDIO_AX_IE_ASO3BEIE (1 << 16) /* RWIVF */
307#define PS3_AUDIO_AX_IE_ASO2BEIE (1 << 17) /* RWIVF */
308#define PS3_AUDIO_AX_IE_ASO1BEIE (1 << 18) /* RWIVF */
309#define PS3_AUDIO_AX_IE_ASO0BEIE (1 << 19) /* RWIVF */
310
311/* S/PDIF Output Channel Buffer Empty Interrupt Enables */
312
313#define PS3_AUDIO_AX_IE_SPOBEIE(n) (1 << (23 - (n))) /* RWIVF */
314#define PS3_AUDIO_AX_IE_SPO1BEIE (1 << 22) /* RWIVF */
315#define PS3_AUDIO_AX_IE_SPO0BEIE (1 << 23) /* RWIVF */
316
317/*
318Audio Port Interrupt Status Register
319Indicates Interrupt status, which interrupt has occured, and can clear
320each interrupt in this register.
321Writing 1b to a field containing 1b clears field and de-asserts interrupt.
322Writing 0b to a field has no effect.
323Field vaules are the following:
3240 - Interrupt hasn't occured.
3251 - Interrupt has occured.
326
327
328 31 24 23 16 15 8 7 0
329 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
330 |0 0 0 0 0 0 0 0|S|S|0 0|A|A|A|A|0 0 0 0|S|S|0 0|S|S|0 0|A|A|A|A| AX_IS
331 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
332
333 Bit assignment are same as AX_IE
334*/
335
336/*
337Audio Output Master Control Register
338Configures Master Clock and other master Audio Output Settings
339
340
341 31 24 23 16 15 8 7 0
342 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
343 |0|SCKSE|0|SCKSE| MR0 | MR1 |MCL|MCL|0 0 0 0|0 0 0 0 0 0 0 0| AO_MCTRL
344 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
345*/
346
347/*
348MCLK Output Control
349Controls mclko[1] output.
3500 - Disable output (fixed at High)
3511 - Output clock produced by clock selected
352with scksel1 by mr1
3532 - Reserved
3543 - Reserved
355*/
356
357#define PS3_AUDIO_AO_MCTRL_MCLKC1_MASK (0x3 << 12) /* RWIVF */
358#define PS3_AUDIO_AO_MCTRL_MCLKC1_DISABLED (0x0 << 12) /* RWI-V */
359#define PS3_AUDIO_AO_MCTRL_MCLKC1_ENABLED (0x1 << 12) /* RW--V */
360#define PS3_AUDIO_AO_MCTRL_MCLKC1_RESVD2 (0x2 << 12) /* RW--V */
361#define PS3_AUDIO_AO_MCTRL_MCLKC1_RESVD3 (0x3 << 12) /* RW--V */
362
363/*
364MCLK Output Control
365Controls mclko[0] output.
3660 - Disable output (fixed at High)
3671 - Output clock produced by clock selected
368with SCKSEL0 by MR0
3692 - Reserved
3703 - Reserved
371*/
372#define PS3_AUDIO_AO_MCTRL_MCLKC0_MASK (0x3 << 14) /* RWIVF */
373#define PS3_AUDIO_AO_MCTRL_MCLKC0_DISABLED (0x0 << 14) /* RWI-V */
374#define PS3_AUDIO_AO_MCTRL_MCLKC0_ENABLED (0x1 << 14) /* RW--V */
375#define PS3_AUDIO_AO_MCTRL_MCLKC0_RESVD2 (0x2 << 14) /* RW--V */
376#define PS3_AUDIO_AO_MCTRL_MCLKC0_RESVD3 (0x3 << 14) /* RW--V */
377/*
378Master Clock Rate 1
379Sets the divide ration of Master Clock1 (clock output from
380mclko[1] for the input clock selected by scksel1.
381*/
382#define PS3_AUDIO_AO_MCTRL_MR1_MASK (0xf << 16)
383#define PS3_AUDIO_AO_MCTRL_MR1_DEFAULT (0x0 << 16) /* RWI-V */
384/*
385Master Clock Rate 0
386Sets the divide ratio of Master Clock0 (clock output from
387mclko[0] for the input clock selected by scksel0).
388*/
389#define PS3_AUDIO_AO_MCTRL_MR0_MASK (0xf << 20) /* RWIVF */
390#define PS3_AUDIO_AO_MCTRL_MR0_DEFAULT (0x0 << 20) /* RWI-V */
391/*
392System Clock Select 0/1
393Selects the system clock to be used as Master Clock 0/1
394Input the system clock that is appropriate for the sampling
395rate.
396*/
397#define PS3_AUDIO_AO_MCTRL_SCKSEL1_MASK (0x7 << 24) /* RWIVF */
398#define PS3_AUDIO_AO_MCTRL_SCKSEL1_DEFAULT (0x2 << 24) /* RWI-V */
399
400#define PS3_AUDIO_AO_MCTRL_SCKSEL0_MASK (0x7 << 28) /* RWIVF */
401#define PS3_AUDIO_AO_MCTRL_SCKSEL0_DEFAULT (0x2 << 28) /* RWI-V */
402
403
404/*
4053-Wire Audio Output Master Control Register
406Configures clock, 3-Wire Audio Serial Output Enable, and
407other 3-Wire Audio Serial Output Master Settings
408
409
410 31 24 23 16 15 8 7 0
411 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
412 |A|A|A|A|0 0 0|A| ASOSR |0 0 0 0|A|A|A|A|A|A|0|1|0 0 0 0 0 0 0 0| AO_3WMCTRL
413 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
414*/
415
416
417/*
418LRCKO Polarity
4190 - Reserved
4201 - default
421*/
422#define PS3_AUDIO_AO_3WMCTRL_ASOPLRCK (1 << 8) /* RWIVF */
423#define PS3_AUDIO_AO_3WMCTRL_ASOPLRCK_DEFAULT (1 << 8) /* RW--V */
424
425/* LRCK Output Disable */
426
427#define PS3_AUDIO_AO_3WMCTRL_ASOLRCKD (1 << 10) /* RWIVF */
428#define PS3_AUDIO_AO_3WMCTRL_ASOLRCKD_ENABLED (0 << 10) /* RW--V */
429#define PS3_AUDIO_AO_3WMCTRL_ASOLRCKD_DISABLED (1 << 10) /* RWI-V */
430
431/* Bit Clock Output Disable */
432
433#define PS3_AUDIO_AO_3WMCTRL_ASOBCLKD (1 << 11) /* RWIVF */
434#define PS3_AUDIO_AO_3WMCTRL_ASOBCLKD_ENABLED (0 << 11) /* RW--V */
435#define PS3_AUDIO_AO_3WMCTRL_ASOBCLKD_DISABLED (1 << 11) /* RWI-V */
436
437/*
4383-Wire Audio Serial Output Channel 0-3 Operational
439Status. Each bit becomes 1 after each 3-Wire Audio
440Serial Output Channel N is in action by setting 1 to
441asoen.
442Each bit becomes 0 after each 3-Wire Audio Serial Output
443Channel N is out of action by setting 0 to asoen.
444*/
445#define PS3_AUDIO_AO_3WMCTRL_ASORUN(n) (1 << (15 - (n))) /* R-IVF */
446#define PS3_AUDIO_AO_3WMCTRL_ASORUN_STOPPED(n) (0 << (15 - (n))) /* R-I-V */
447#define PS3_AUDIO_AO_3WMCTRL_ASORUN_RUNNING(n) (1 << (15 - (n))) /* R---V */
448#define PS3_AUDIO_AO_3WMCTRL_ASORUN0 \
449 PS3_AUDIO_AO_3WMCTRL_ASORUN(0)
450#define PS3_AUDIO_AO_3WMCTRL_ASORUN0_STOPPED \
451 PS3_AUDIO_AO_3WMCTRL_ASORUN_STOPPED(0)
452#define PS3_AUDIO_AO_3WMCTRL_ASORUN0_RUNNING \
453 PS3_AUDIO_AO_3WMCTRL_ASORUN_RUNNING(0)
454#define PS3_AUDIO_AO_3WMCTRL_ASORUN1 \
455 PS3_AUDIO_AO_3WMCTRL_ASORUN(1)
456#define PS3_AUDIO_AO_3WMCTRL_ASORUN1_STOPPED \
457 PS3_AUDIO_AO_3WMCTRL_ASORUN_STOPPED(1)
458#define PS3_AUDIO_AO_3WMCTRL_ASORUN1_RUNNING \
459 PS3_AUDIO_AO_3WMCTRL_ASORUN_RUNNING(1)
460#define PS3_AUDIO_AO_3WMCTRL_ASORUN2 \
461 PS3_AUDIO_AO_3WMCTRL_ASORUN(2)
462#define PS3_AUDIO_AO_3WMCTRL_ASORUN2_STOPPED \
463 PS3_AUDIO_AO_3WMCTRL_ASORUN_STOPPED(2)
464#define PS3_AUDIO_AO_3WMCTRL_ASORUN2_RUNNING \
465 PS3_AUDIO_AO_3WMCTRL_ASORUN_RUNNING(2)
466#define PS3_AUDIO_AO_3WMCTRL_ASORUN3 \
467 PS3_AUDIO_AO_3WMCTRL_ASORUN(3)
468#define PS3_AUDIO_AO_3WMCTRL_ASORUN3_STOPPED \
469 PS3_AUDIO_AO_3WMCTRL_ASORUN_STOPPED(3)
470#define PS3_AUDIO_AO_3WMCTRL_ASORUN3_RUNNING \
471 PS3_AUDIO_AO_3WMCTRL_ASORUN_RUNNING(3)
472
473/*
474Sampling Rate
475Specifies the divide ratio of the bit clock (clock output
476from bclko) used by the 3-wire Audio Output Clock, whcih
477is applied to the master clock selected by mcksel.
478Data output is synchronized with this clock.
479*/
480#define PS3_AUDIO_AO_3WMCTRL_ASOSR_MASK (0xf << 20) /* RWIVF */
481#define PS3_AUDIO_AO_3WMCTRL_ASOSR_DIV2 (0x1 << 20) /* RWI-V */
482#define PS3_AUDIO_AO_3WMCTRL_ASOSR_DIV4 (0x2 << 20) /* RW--V */
483#define PS3_AUDIO_AO_3WMCTRL_ASOSR_DIV8 (0x4 << 20) /* RW--V */
484#define PS3_AUDIO_AO_3WMCTRL_ASOSR_DIV12 (0x6 << 20) /* RW--V */
485
486/*
487Master Clock Select
4880 - Master Clock 0
4891 - Master Clock 1
490*/
491#define PS3_AUDIO_AO_3WMCTRL_ASOMCKSEL (1 << 24) /* RWIVF */
492#define PS3_AUDIO_AO_3WMCTRL_ASOMCKSEL_CLK0 (0 << 24) /* RWI-V */
493#define PS3_AUDIO_AO_3WMCTRL_ASOMCKSEL_CLK1 (1 << 24) /* RW--V */
494
495/*
496Enables and disables 4ch 3-Wire Audio Serial Output
497operation. Each Bit from 0 to 3 corresponds to an
498output channel, which means that each output channel
499can be enabled or disabled individually. When
500multiple channels are enabled at the same time, output
501operations are performed in synchronization.
502Bit 0 - Output Channel 0 (SDOUT[0])
503Bit 1 - Output Channel 1 (SDOUT[1])
504Bit 2 - Output Channel 2 (SDOUT[2])
505Bit 3 - Output Channel 3 (SDOUT[3])
506*/
507#define PS3_AUDIO_AO_3WMCTRL_ASOEN(n) (1 << (31 - (n))) /* RWIVF */
508#define PS3_AUDIO_AO_3WMCTRL_ASOEN_DISABLED(n) (0 << (31 - (n))) /* RWI-V */
509#define PS3_AUDIO_AO_3WMCTRL_ASOEN_ENABLED(n) (1 << (31 - (n))) /* RW--V */
510
511#define PS3_AUDIO_AO_3WMCTRL_ASOEN0 \
512 PS3_AUDIO_AO_3WMCTRL_ASOEN(0) /* RWIVF */
513#define PS3_AUDIO_AO_3WMCTRL_ASOEN0_DISABLED \
514 PS3_AUDIO_AO_3WMCTRL_ASOEN_DISABLED(0) /* RWI-V */
515#define PS3_AUDIO_AO_3WMCTRL_ASOEN0_ENABLED \
516 PS3_AUDIO_AO_3WMCTRL_ASOEN_ENABLED(0) /* RW--V */
517#define PS3_AUDIO_A1_3WMCTRL_ASOEN0 \
518 PS3_AUDIO_AO_3WMCTRL_ASOEN(1) /* RWIVF */
519#define PS3_AUDIO_A1_3WMCTRL_ASOEN0_DISABLED \
520 PS3_AUDIO_AO_3WMCTRL_ASOEN_DISABLED(1) /* RWI-V */
521#define PS3_AUDIO_A1_3WMCTRL_ASOEN0_ENABLED \
522 PS3_AUDIO_AO_3WMCTRL_ASOEN_ENABLED(1) /* RW--V */
523#define PS3_AUDIO_A2_3WMCTRL_ASOEN0 \
524 PS3_AUDIO_AO_3WMCTRL_ASOEN(2) /* RWIVF */
525#define PS3_AUDIO_A2_3WMCTRL_ASOEN0_DISABLED \
526 PS3_AUDIO_AO_3WMCTRL_ASOEN_DISABLED(2) /* RWI-V */
527#define PS3_AUDIO_A2_3WMCTRL_ASOEN0_ENABLED \
528 PS3_AUDIO_AO_3WMCTRL_ASOEN_ENABLED(2) /* RW--V */
529#define PS3_AUDIO_A3_3WMCTRL_ASOEN0 \
530 PS3_AUDIO_AO_3WMCTRL_ASOEN(3) /* RWIVF */
531#define PS3_AUDIO_A3_3WMCTRL_ASOEN0_DISABLED \
532 PS3_AUDIO_AO_3WMCTRL_ASOEN_DISABLED(3) /* RWI-V */
533#define PS3_AUDIO_A3_3WMCTRL_ASOEN0_ENABLED \
534 PS3_AUDIO_AO_3WMCTRL_ASOEN_ENABLED(3) /* RW--V */
535
536/*
5373-Wire Audio Serial output Channel 0-3 Control Register
538Configures settings for 3-Wire Serial Audio Output Channel 0-3
539
540
541 31 24 23 16 15 8 7 0
542 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
543 |0 0 0 0 0 0 0 0 0 0 0 0 0 0 0|A|0 0 0 0|A|0|ASO|0 0 0|0|0|0|0|0| AO_3WCTRL
544 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
545
546*/
547/*
548Data Bit Mode
549Specifies the number of data bits
5500 - 16 bits
5511 - reserved
5522 - 20 bits
5533 - 24 bits
554*/
555#define PS3_AUDIO_AO_3WCTRL_ASODB_MASK (0x3 << 8) /* RWIVF */
556#define PS3_AUDIO_AO_3WCTRL_ASODB_16BIT (0x0 << 8) /* RWI-V */
557#define PS3_AUDIO_AO_3WCTRL_ASODB_RESVD (0x1 << 8) /* RWI-V */
558#define PS3_AUDIO_AO_3WCTRL_ASODB_20BIT (0x2 << 8) /* RW--V */
559#define PS3_AUDIO_AO_3WCTRL_ASODB_24BIT (0x3 << 8) /* RW--V */
560/*
561Data Format Mode
562Specifies the data format where (LSB side or MSB) the data(in 20 bit
563or 24 bit resolution mode) is put in a 32 bit field.
5640 - Data put on LSB side
5651 - Data put on MSB side
566*/
567#define PS3_AUDIO_AO_3WCTRL_ASODF (1 << 11) /* RWIVF */
568#define PS3_AUDIO_AO_3WCTRL_ASODF_LSB (0 << 11) /* RWI-V */
569#define PS3_AUDIO_AO_3WCTRL_ASODF_MSB (1 << 11) /* RW--V */
570/*
571Buffer Reset
572Performs buffer reset. Writing 1 to this bit initializes the
573corresponding 3-Wire Audio Output buffers(both L and R).
574*/
575#define PS3_AUDIO_AO_3WCTRL_ASOBRST (1 << 16) /* CWIVF */
576#define PS3_AUDIO_AO_3WCTRL_ASOBRST_IDLE (0 << 16) /* -WI-V */
577#define PS3_AUDIO_AO_3WCTRL_ASOBRST_RESET (1 << 16) /* -W--T */
578
579/*
580S/PDIF Audio Output Channel 0/1 Control Register
581Configures settings for S/PDIF Audio Output Channel 0/1.
582
583 31 24 23 16 15 8 7 0
584 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
585 |S|0 0 0|S|0 0|S| SPOSR |0 0|SPO|0 0 0 0|S|0|SPO|0 0 0 0 0 0 0|S| AO_SPDCTRL
586 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
587*/
588/*
589Buffer reset. Writing 1 to this bit initializes the
590corresponding S/PDIF output buffer pointer.
591*/
592#define PS3_AUDIO_AO_SPDCTRL_SPOBRST (1 << 0) /* CWIVF */
593#define PS3_AUDIO_AO_SPDCTRL_SPOBRST_IDLE (0 << 0) /* -WI-V */
594#define PS3_AUDIO_AO_SPDCTRL_SPOBRST_RESET (1 << 0) /* -W--T */
595
596/*
597Data Bit Mode
598Specifies number of data bits
5990 - 16 bits
6001 - Reserved
6012 - 20 bits
6023 - 24 bits
603*/
604#define PS3_AUDIO_AO_SPDCTRL_SPODB_MASK (0x3 << 8) /* RWIVF */
605#define PS3_AUDIO_AO_SPDCTRL_SPODB_16BIT (0x0 << 8) /* RWI-V */
606#define PS3_AUDIO_AO_SPDCTRL_SPODB_RESVD (0x1 << 8) /* RW--V */
607#define PS3_AUDIO_AO_SPDCTRL_SPODB_20BIT (0x2 << 8) /* RW--V */
608#define PS3_AUDIO_AO_SPDCTRL_SPODB_24BIT (0x3 << 8) /* RW--V */
609/*
610Data format Mode
611Specifies the data format, where (LSB side or MSB)
612the data(in 20 or 24 bit resolution) is put in the
61332 bit field.
6140 - LSB Side
6151 - MSB Side
616*/
617#define PS3_AUDIO_AO_SPDCTRL_SPODF (1 << 11) /* RWIVF */
618#define PS3_AUDIO_AO_SPDCTRL_SPODF_LSB (0 << 11) /* RWI-V */
619#define PS3_AUDIO_AO_SPDCTRL_SPODF_MSB (1 << 11) /* RW--V */
620/*
621Source Select
622Specifies the source of the S/PDIF output. When 0, output
623operation is controlled by 3wen[0] of AO_3WMCTRL register.
624The SR must have the same setting as the a0_3wmctrl reg.
6250 - 3-Wire Audio OUT Ch0 Buffer
6261 - S/PDIF buffer
627*/
628#define PS3_AUDIO_AO_SPDCTRL_SPOSS_MASK (0x3 << 16) /* RWIVF */
629#define PS3_AUDIO_AO_SPDCTRL_SPOSS_3WEN (0x0 << 16) /* RWI-V */
630#define PS3_AUDIO_AO_SPDCTRL_SPOSS_SPDIF (0x1 << 16) /* RW--V */
631/*
632Sampling Rate
633Specifies the divide ratio of the bit clock (clock output
634from bclko) used by the S/PDIF Output Clock, which
635is applied to the master clock selected by mcksel.
636*/
637#define PS3_AUDIO_AO_SPDCTRL_SPOSR (0xf << 20) /* RWIVF */
638#define PS3_AUDIO_AO_SPDCTRL_SPOSR_DIV2 (0x1 << 20) /* RWI-V */
639#define PS3_AUDIO_AO_SPDCTRL_SPOSR_DIV4 (0x2 << 20) /* RW--V */
640#define PS3_AUDIO_AO_SPDCTRL_SPOSR_DIV8 (0x4 << 20) /* RW--V */
641#define PS3_AUDIO_AO_SPDCTRL_SPOSR_DIV12 (0x6 << 20) /* RW--V */
642/*
643Master Clock Select
6440 - Master Clock 0
6451 - Master Clock 1
646*/
647#define PS3_AUDIO_AO_SPDCTRL_SPOMCKSEL (1 << 24) /* RWIVF */
648#define PS3_AUDIO_AO_SPDCTRL_SPOMCKSEL_CLK0 (0 << 24) /* RWI-V */
649#define PS3_AUDIO_AO_SPDCTRL_SPOMCKSEL_CLK1 (1 << 24) /* RW--V */
650
651/*
652S/PDIF Output Channel Operational Status
653This bit becomes 1 after S/PDIF Output Channel is in
654action by setting 1 to spoen. This bit becomes 0
655after S/PDIF Output Channel is out of action by setting
6560 to spoen.
657*/
658#define PS3_AUDIO_AO_SPDCTRL_SPORUN (1 << 27) /* R-IVF */
659#define PS3_AUDIO_AO_SPDCTRL_SPORUN_STOPPED (0 << 27) /* R-I-V */
660#define PS3_AUDIO_AO_SPDCTRL_SPORUN_RUNNING (1 << 27) /* R---V */
661
662/*
663S/PDIF Audio Output Channel Output Enable
664Enables and disables output operation. This bit is used
665only when sposs = 1
666*/
667#define PS3_AUDIO_AO_SPDCTRL_SPOEN (1 << 31) /* RWIVF */
668#define PS3_AUDIO_AO_SPDCTRL_SPOEN_DISABLED (0 << 31) /* RWI-V */
669#define PS3_AUDIO_AO_SPDCTRL_SPOEN_ENABLED (1 << 31) /* RW--V */
670
671/*
672S/PDIF Audio Output Channel Channel Status
673Setting Registers.
674Configures channel status bit settings for each block
675(192 bits).
676Output is performed from the MSB(AO_SPDCS0 register bit 31).
677The same value is added for subframes within the same frame.
678 31 24 23 16 15 8 7 0
679 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
680 | SPOCS | AO_SPDCS
681 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
682
683S/PDIF Audio Output Channel User Bit Setting
684Configures user bit settings for each block (384 bits).
685Output is performed from the MSB(ao_spdub0 register bit 31).
686
687
688 31 24 23 16 15 8 7 0
689 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
690 | SPOUB | AO_SPDUB
691 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
692*/
693/*****************************************************************************
694 *
695 * DMAC register
696 *
697 *****************************************************************************/
698/*
699The PS3_AUDIO_KICK register is used to initiate a DMA transfer and monitor
700its status
701
702 31 24 23 16 15 8 7 0
703 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
704 |0 0 0 0 0|STATU|0 0 0| EVENT |0 0 0 0 0 0 0 0 0 0 0 0 0 0 0|R| KICK
705 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
706*/
707/*
708The REQUEST field is written to ACTIVE to initiate a DMA request when EVENT
709occurs.
710It will return to the DONE state when the request is completed.
711The registers for a DMA channel should only be written if REQUEST is IDLE.
712*/
713
714#define PS3_AUDIO_KICK_REQUEST (1 << 0) /* RWIVF */
715#define PS3_AUDIO_KICK_REQUEST_IDLE (0 << 0) /* RWI-V */
716#define PS3_AUDIO_KICK_REQUEST_ACTIVE (1 << 0) /* -W--T */
717
718/*
719 *The EVENT field is used to set the event in which
720 *the DMA request becomes active.
721 */
722#define PS3_AUDIO_KICK_EVENT_MASK (0x1f << 16) /* RWIVF */
723#define PS3_AUDIO_KICK_EVENT_ALWAYS (0x00 << 16) /* RWI-V */
724#define PS3_AUDIO_KICK_EVENT_SERIALOUT0_EMPTY (0x01 << 16) /* RW--V */
725#define PS3_AUDIO_KICK_EVENT_SERIALOUT0_UNDERFLOW (0x02 << 16) /* RW--V */
726#define PS3_AUDIO_KICK_EVENT_SERIALOUT1_EMPTY (0x03 << 16) /* RW--V */
727#define PS3_AUDIO_KICK_EVENT_SERIALOUT1_UNDERFLOW (0x04 << 16) /* RW--V */
728#define PS3_AUDIO_KICK_EVENT_SERIALOUT2_EMPTY (0x05 << 16) /* RW--V */
729#define PS3_AUDIO_KICK_EVENT_SERIALOUT2_UNDERFLOW (0x06 << 16) /* RW--V */
730#define PS3_AUDIO_KICK_EVENT_SERIALOUT3_EMPTY (0x07 << 16) /* RW--V */
731#define PS3_AUDIO_KICK_EVENT_SERIALOUT3_UNDERFLOW (0x08 << 16) /* RW--V */
732#define PS3_AUDIO_KICK_EVENT_SPDIF0_BLOCKTRANSFERCOMPLETE \
733 (0x09 << 16) /* RW--V */
734#define PS3_AUDIO_KICK_EVENT_SPDIF0_UNDERFLOW (0x0A << 16) /* RW--V */
735#define PS3_AUDIO_KICK_EVENT_SPDIF0_EMPTY (0x0B << 16) /* RW--V */
736#define PS3_AUDIO_KICK_EVENT_SPDIF1_BLOCKTRANSFERCOMPLETE \
737 (0x0C << 16) /* RW--V */
738#define PS3_AUDIO_KICK_EVENT_SPDIF1_UNDERFLOW (0x0D << 16) /* RW--V */
739#define PS3_AUDIO_KICK_EVENT_SPDIF1_EMPTY (0x0E << 16) /* RW--V */
740
741#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA(n) \
742 ((0x13 + (n)) << 16) /* RW--V */
743#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA0 (0x13 << 16) /* RW--V */
744#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA1 (0x14 << 16) /* RW--V */
745#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA2 (0x15 << 16) /* RW--V */
746#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA3 (0x16 << 16) /* RW--V */
747#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA4 (0x17 << 16) /* RW--V */
748#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA5 (0x18 << 16) /* RW--V */
749#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA6 (0x19 << 16) /* RW--V */
750#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA7 (0x1A << 16) /* RW--V */
751#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA8 (0x1B << 16) /* RW--V */
752#define PS3_AUDIO_KICK_EVENT_AUDIO_DMA9 (0x1C << 16) /* RW--V */
753
754/*
755The STATUS field can be used to monitor the progress of a DMA request.
756DONE indicates the previous request has completed.
757EVENT indicates that the DMA engine is waiting for the EVENT to occur.
758PENDING indicates that the DMA engine has not started processing this
759request, but the EVENT has occured.
760DMA indicates that the data transfer is in progress.
761NOTIFY indicates that the notifier signalling end of transfer is being written.
762CLEAR indicated that the previous transfer was cleared.
763ERROR indicates the previous transfer requested an unsupported
764source/destination combination.
765*/
766
767#define PS3_AUDIO_KICK_STATUS_MASK (0x7 << 24) /* R-IVF */
768#define PS3_AUDIO_KICK_STATUS_DONE (0x0 << 24) /* R-I-V */
769#define PS3_AUDIO_KICK_STATUS_EVENT (0x1 << 24) /* R---V */
770#define PS3_AUDIO_KICK_STATUS_PENDING (0x2 << 24) /* R---V */
771#define PS3_AUDIO_KICK_STATUS_DMA (0x3 << 24) /* R---V */
772#define PS3_AUDIO_KICK_STATUS_NOTIFY (0x4 << 24) /* R---V */
773#define PS3_AUDIO_KICK_STATUS_CLEAR (0x5 << 24) /* R---V */
774#define PS3_AUDIO_KICK_STATUS_ERROR (0x6 << 24) /* R---V */
775
776/*
777The PS3_AUDIO_SOURCE register specifies the source address for transfers.
778
779
780 31 24 23 16 15 8 7 0
781 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
782 | START |0 0 0 0 0|TAR| SOURCE
783 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
784*/
785
786/*
787The Audio DMA engine uses 128-byte transfers, thus the address must be aligned
788to a 128 byte boundary. The low seven bits are assumed to be 0.
789*/
790
791#define PS3_AUDIO_SOURCE_START_MASK (0x01FFFFFF << 7) /* RWIUF */
792
793/*
794The TARGET field specifies the memory space containing the source address.
795*/
796
797#define PS3_AUDIO_SOURCE_TARGET_MASK (3 << 0) /* RWIVF */
798#define PS3_AUDIO_SOURCE_TARGET_SYSTEM_MEMORY (2 << 0) /* RW--V */
799
800/*
801The PS3_AUDIO_DEST register specifies the destination address for transfers.
802
803
804 31 24 23 16 15 8 7 0
805 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
806 | START |0 0 0 0 0|TAR| DEST
807 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
808*/
809
810/*
811The Audio DMA engine uses 128-byte transfers, thus the address must be aligned
812to a 128 byte boundary. The low seven bits are assumed to be 0.
813*/
814
815#define PS3_AUDIO_DEST_START_MASK (0x01FFFFFF << 7) /* RWIUF */
816
817/*
818The TARGET field specifies the memory space containing the destination address
819AUDIOFIFO = Audio WriteData FIFO,
820*/
821
822#define PS3_AUDIO_DEST_TARGET_MASK (3 << 0) /* RWIVF */
823#define PS3_AUDIO_DEST_TARGET_AUDIOFIFO (1 << 0) /* RW--V */
824
825/*
826PS3_AUDIO_DMASIZE specifies the number of 128-byte blocks + 1 to transfer.
827So a value of 0 means 128-bytes will get transfered.
828
829
830 31 24 23 16 15 8 7 0
831 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
832 |0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0| BLOCKS | DMASIZE
833 +-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-|-+-+-+-+-+-+-+-+
834*/
835
836
837#define PS3_AUDIO_DMASIZE_BLOCKS_MASK (0x7f << 0) /* RWIUF */
838
839/*
840 * source/destination address for internal fifos
841 */
842#define PS3_AUDIO_AO_3W_LDATA(n) (0x1000 + (0x100 * (n)))
843#define PS3_AUDIO_AO_3W_RDATA(n) (0x1080 + (0x100 * (n)))
844
845#define PS3_AUDIO_AO_SPD_DATA(n) (0x2000 + (0x400 * (n)))
846
847
848/*
849 * field attiribute
850 *
851 * Read
852 * ' ' = Other Information
853 * '-' = Field is part of a write-only register
854 * 'C' = Value read is always the same, constant value line follows (C)
855 * 'R' = Value is read
856 *
857 * Write
858 * ' ' = Other Information
859 * '-' = Must not be written (D), value ignored when written (R,A,F)
860 * 'W' = Can be written
861 *
862 * Internal State
863 * ' ' = Other Information
864 * '-' = No internal state
865 * 'X' = Internal state, initial value is unknown
866 * 'I' = Internal state, initial value is known and follows (I)
867 *
868 * Declaration/Size
869 * ' ' = Other Information
870 * '-' = Does Not Apply
871 * 'V' = Type is void
872 * 'U' = Type is unsigned integer
873 * 'S' = Type is signed integer
874 * 'F' = Type is IEEE floating point
875 * '1' = Byte size (008)
876 * '2' = Short size (016)
877 * '3' = Three byte size (024)
878 * '4' = Word size (032)
879 * '8' = Double size (064)
880 *
881 * Define Indicator
882 * ' ' = Other Information
883 * 'D' = Device
884 * 'M' = Memory
885 * 'R' = Register
886 * 'A' = Array of Registers
887 * 'F' = Field
888 * 'V' = Value
889 * 'T' = Task
890 */
891
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-07 07:37:14 -0500